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openwrt-xburst/target/linux/cns21xx/patches-3.6/104-cns21xx-usb-ehci-support.patch

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--- /dev/null
+++ b/drivers/usb/host/ehci-cns21xx.c
@@ -0,0 +1,186 @@
+/*
+ * Copyright (c) 2008 Cavium Networks
+ * Copyright (c) 2010-2012 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This file is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, Version 2, as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/platform_device.h>
+#include <linux/irq.h>
+
+#include <mach/cns21xx.h>
+
+#define DRIVER_NAME "cns21xx-ehci"
+
+static int cns21xx_ehci_reset(struct usb_hcd *hcd)
+{
+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
+ int ret;
+
+ ret = ehci_halt(ehci);
+ if (ret)
+ return ret;
+
+ ret = ehci_init(hcd);
+ if (ret)
+ return ret;
+
+ ehci_reset(ehci);
+ ehci_port_power(ehci, 0);
+
+ return 0;
+}
+
+static const struct hc_driver ehci_cns21xx_hc_driver = {
+ .description = hcd_name,
+ .product_desc = DRIVER_NAME,
+ .hcd_priv_size = sizeof(struct ehci_hcd),
+
+ /*
+ * generic hardware linkage
+ */
+ .irq = ehci_irq,
+ .flags = HCD_MEMORY | HCD_USB2,
+
+ /*
+ * basic lifecycle operations
+ */
+ .reset = cns21xx_ehci_reset,
+ .start = ehci_run,
+ .stop = ehci_stop,
+ .shutdown = ehci_shutdown,
+
+ /*
+ * managing i/o requests and associated device resources
+ */
+ .urb_enqueue = ehci_urb_enqueue,
+ .urb_dequeue = ehci_urb_dequeue,
+ .endpoint_disable = ehci_endpoint_disable,
+ .endpoint_reset = ehci_endpoint_reset,
+
+ /*
+ * scheduling support
+ */
+ .get_frame_number = ehci_get_frame,
+
+ /*
+ * root hub support
+ */
+ .hub_status_data = ehci_hub_status_data,
+ .hub_control = ehci_hub_control,
+ .relinquish_port = ehci_relinquish_port,
+ .port_handed_over = ehci_port_handed_over,
+
+ .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
+};
+
+static void cns21xx_ehci_init_hc(void)
+{
+ __raw_writel(0x106, CNS21XX_EHCI_CONFIG_BASE_VIRT + 0x04);
+ __raw_writel((3 << 5) | 0x2000, CNS21XX_EHCI_CONFIG_BASE_VIRT + 0x40);
+ msleep(100);
+}
+
+static int ehci_cns21xx_probe(struct platform_device *pdev)
+{
+ struct usb_hcd *hcd;
+ struct ehci_hcd *ehci;
+ struct resource *res;
+ int irq;
+ int ret;
+
+ if (usb_disabled())
+ return -ENODEV;
+
+ res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ if (!res) {
+ dev_dbg(&pdev->dev, "no IRQ specified for %s\n",
+ dev_name(&pdev->dev));
+ return -ENODEV;
+ }
+ irq = res->start;
+
+ hcd = usb_create_hcd(&ehci_cns21xx_hc_driver, &pdev->dev,
+ dev_name(&pdev->dev));
+ if (!hcd)
+ return -ENOMEM;
+
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ if (!res) {
+ dev_dbg(&pdev->dev, "no base address specified for %s\n",
+ dev_name(&pdev->dev));
+ ret = -ENODEV;
+ goto err_put_hcd;
+ }
+ hcd->rsrc_start = res->start;
+ hcd->rsrc_len = res->end - res->start + 1;
+
+ if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
+ dev_dbg(&pdev->dev, "controller already in use\n");
+ ret = -EBUSY;
+ goto err_put_hcd;
+ }
+
+ hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
+ if (!hcd->regs) {
+ dev_dbg(&pdev->dev, "error mapping memory\n");
+ ret = -EFAULT;
+ goto err_release_region;
+ }
+
+ cns21xx_ehci_init_hc();
+
+ ehci = hcd_to_ehci(hcd);
+
+ ehci->caps = hcd->regs;
+ ehci->regs = hcd->regs +
+ HC_LENGTH(ehci, ehci_readl(ehci, &ehci->caps->hc_capbase));
+ dbg_hcs_params(ehci, "reset");
+ dbg_hcc_params(ehci, "reset");
+
+ /* cache this readonly data; minimize chip reads */
+ ehci->hcs_params = readl(&ehci->caps->hcs_params);
+ ehci->sbrn = 0x20;
+
+ ret = usb_add_hcd(hcd, CNS21XX_IRQ_EHCI, IRQF_DISABLED);
+ if (ret)
+ goto err_unmap;
+
+ platform_set_drvdata(pdev, hcd);
+ return 0;
+
+err_unmap:
+ iounmap(hcd->regs);
+err_release_region:
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+err_put_hcd:
+ usb_put_hcd(hcd);
+ return ret;
+}
+
+static int ehci_cns21xx_remove(struct platform_device *pdev)
+{
+ struct usb_hcd *hcd = platform_get_drvdata(pdev);
+
+ usb_remove_hcd(hcd);
+ iounmap(hcd->regs);
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
+ usb_put_hcd(hcd);
+ platform_set_drvdata(pdev, NULL);
+
+ return 0;
+}
+
+static struct platform_driver ehci_cns21xx_driver = {
+ .probe = ehci_cns21xx_probe,
+ .remove = ehci_cns21xx_remove,
+ .shutdown = usb_hcd_platform_shutdown,
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = DRIVER_NAME,
+ },
+};
+
+MODULE_ALIAS("platform:" DRIVER_NAME);
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1334,14 +1334,19 @@ MODULE_LICENSE ("GPL");
#define PLATFORM_DRIVER ehci_hcd_sead3_driver
#endif
+#ifdef CONFIG_ARCH_CNS21XX
+#include "ehci-cns21xx.c"
+#define PLATFORM_DRIVER ehci_cns21xx_driver
+#endif
+
#ifdef CONFIG_USB_EHCI_HCD_PLATFORM
#include "ehci-platform.c"
-#define PLATFORM_DRIVER ehci_platform_driver
+#define EHCI_PLATFORM_DRIVER ehci_platform_driver
#endif
#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
!defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
- !defined(XILINX_OF_PLATFORM_DRIVER)
+ !defined(XILINX_OF_PLATFORM_DRIVER) && !defined(EHCI_PLATFORM_DRIVER)
#error "missing bus glue for ehci-hcd"
#endif
@@ -1401,10 +1406,21 @@ static int __init ehci_hcd_init(void)
if (retval < 0)
goto clean4;
#endif
+
+#ifdef EHCI_PLATFORM_DRIVER
+ retval = platform_driver_register(&EHCI_PLATFORM_DRIVER);
+ if (retval < 0)
+ goto clean5;
+#endif
+
return retval;
+#ifdef EHCI_PLATFORM_DRIVER
+ platform_driver_unregister(&EHCI_PLATFORM_DRIVER);
+clean5:
+#endif
#ifdef XILINX_OF_PLATFORM_DRIVER
- /* platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER); */
+ platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
clean4:
#endif
#ifdef OF_PLATFORM_DRIVER
@@ -1435,6 +1451,9 @@ module_init(ehci_hcd_init);
static void __exit ehci_hcd_cleanup(void)
{
+#ifdef EHCI_PLATFORM_DRIVER
+ platform_driver_unregister(&EHCI_PLATFORM_DRIVER);
+#endif
#ifdef XILINX_OF_PLATFORM_DRIVER
platform_driver_unregister(&XILINX_OF_PLATFORM_DRIVER);
#endif
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -394,6 +394,7 @@ config ARCH_CNS21XX
select ARCH_REQUIRE_GPIOLIB
select ARM_L1_CACHE_SHIFT_4
select USB_ARCH_HAS_OHCI
+ select USB_ARCH_HAS_EHCI
help
Support for Cavium Networks CNS21xx family.