mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-14 20:44:03 +02:00
61 lines
2.1 KiB
Diff
61 lines
2.1 KiB
Diff
|
From 8fc2eacbe332fbf6bfd09425fb141bb47d843a78 Mon Sep 17 00:00:00 2001
|
||
|
|
From: John Crispin <blogic@openwrt.org>
|
||
|
|
Date: Mon, 22 Oct 2012 09:32:46 +0200
|
||
|
|
Subject: [PATCH 104/113] MIPS: lantiq: xway: split ltq_reset_once into 2
|
||
|
|
subfunctions
|
||
|
|
|
||
|
|
We need to call the reset functions from within the phy reset code and dont
|
||
|
|
want to duplicate the access code for the reset registers.
|
||
|
|
|
||
|
|
Signed-off-by: John Crispin <blogic@openwrt.org>
|
||
|
|
---
|
||
|
|
arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h | 3 +++
|
||
|
|
arch/mips/lantiq/xway/reset.c | 14 ++++++++++++--
|
||
|
|
2 files changed, 15 insertions(+), 2 deletions(-)
|
||
|
|
|
||
|
|
diff --git a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
|
||
|
|
index 6a2df70..6b9f5be 100644
|
||
|
|
--- a/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
|
||
|
|
+++ b/arch/mips/include/asm/mach-lantiq/xway/lantiq_soc.h
|
||
|
|
@@ -87,5 +87,8 @@ extern __iomem void *ltq_cgu_membase;
|
||
|
|
extern void ltq_pmu_enable(unsigned int module);
|
||
|
|
extern void ltq_pmu_disable(unsigned int module);
|
||
|
|
|
||
|
|
+/* allow drivers to reset clock domains and ip cores */
|
||
|
|
+void ltq_reset_once(unsigned int module, ulong u);
|
||
|
|
+
|
||
|
|
#endif /* CONFIG_SOC_TYPE_XWAY */
|
||
|
|
#endif /* _LTQ_XWAY_H__ */
|
||
|
|
diff --git a/arch/mips/lantiq/xway/reset.c b/arch/mips/lantiq/xway/reset.c
|
||
|
|
index a89d1a3..1b77f82 100644
|
||
|
|
--- a/arch/mips/lantiq/xway/reset.c
|
||
|
|
+++ b/arch/mips/lantiq/xway/reset.c
|
||
|
|
@@ -55,12 +55,22 @@ unsigned char ltq_boot_select(void)
|
||
|
|
return (val >> RCU_BOOT_SEL_SHIFT) & RCU_BOOT_SEL_MASK;
|
||
|
|
}
|
||
|
|
|
||
|
|
+static void ltq_reset_enter(unsigned int module)
|
||
|
|
+{
|
||
|
|
+ ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | module, RCU_RST_REQ);
|
||
|
|
+}
|
||
|
|
+
|
||
|
|
+static void ltq_reset_leave(unsigned int module)
|
||
|
|
+{
|
||
|
|
+ ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) & ~module, RCU_RST_REQ);
|
||
|
|
+}
|
||
|
|
+
|
||
|
|
/* reset a io domain for u micro seconds */
|
||
|
|
void ltq_reset_once(unsigned int module, ulong u)
|
||
|
|
{
|
||
|
|
- ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) | module, RCU_RST_REQ);
|
||
|
|
+ ltq_reset_enter(RCU_RST_REQ);
|
||
|
|
udelay(u);
|
||
|
|
- ltq_rcu_w32(ltq_rcu_r32(RCU_RST_REQ) & ~module, RCU_RST_REQ);
|
||
|
|
+ ltq_reset_leave(RCU_RST_REQ);
|
||
|
|
}
|
||
|
|
|
||
|
|
static void ltq_machine_restart(char *command)
|
||
|
|
--
|
||
|
|
1.7.10.4
|
||
|
|
|