mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-07 22:39:42 +02:00
422 lines
9.6 KiB
C
422 lines
9.6 KiB
C
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/*
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* Broadcom BCM5325E/536x switch configuration module
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*
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* Copyright (C) 2005 Felix Fietkau <nbd@nbd.name>
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* Based on 'robocfg' by Oleg I. Vdovikin
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*/
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#include <linux/config.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/if.h>
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#include <linux/if_arp.h>
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#include <linux/sockios.h>
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#include <linux/ethtool.h>
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#include <linux/mii.h>
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#include <asm/uaccess.h>
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#include "switch-core.h"
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#include "etc53xx.h"
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#define DRIVER_NAME "bcm53xx"
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#define ROBO_PHY_ADDR 0x1E /* robo switch phy address */
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/* MII registers */
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#define REG_MII_PAGE 0x10 /* MII Page register */
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#define REG_MII_ADDR 0x11 /* MII Address register */
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#define REG_MII_DATA0 0x18 /* MII Data register 0 */
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#define REG_MII_PAGE_ENABLE 1
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#define REG_MII_ADDR_WRITE 1
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#define REG_MII_ADDR_READ 2
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/* Private et.o ioctls */
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#define SIOCGETCPHYRD (SIOCDEVPRIVATE + 9)
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#define SIOCSETCPHYWR (SIOCDEVPRIVATE + 10)
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static int use_et = 0;
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static int is_5350 = 0;
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static int max_vlans, max_ports;
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static struct ifreq ifr;
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static struct net_device *dev;
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static int isspace(char c) {
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switch(c) {
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case ' ':
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case 0x09:
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case 0x0a:
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case 0x0d:
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return 1;
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default:
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return 0;
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}
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}
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static int do_ioctl(int cmd, void *buf)
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{
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mm_segment_t old_fs = get_fs();
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int ret;
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if (buf != NULL)
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ifr.ifr_data = (caddr_t) buf;
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set_fs(KERNEL_DS);
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ret = dev->do_ioctl(dev, &ifr, cmd);
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set_fs(old_fs);
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return ret;
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}
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static u16 mdio_read(__u16 phy_id, __u8 reg)
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{
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if (use_et) {
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int args[2] = { reg };
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if (phy_id != ROBO_PHY_ADDR) {
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printk(
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"Access to real 'phy' registers unavaliable.\n"
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"Upgrade kernel driver.\n");
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return 0xffff;
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}
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if (do_ioctl(SIOCGETCPHYRD, &args) < 0) {
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printk("[%s:%d] SIOCGETCPHYRD failed!\n", __FILE__, __LINE__);
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return 0xffff;
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}
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return args[1];
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} else {
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struct mii_ioctl_data *mii = (struct mii_ioctl_data *) &ifr.ifr_data;
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mii->phy_id = phy_id;
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mii->reg_num = reg;
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if (do_ioctl(SIOCGMIIREG, NULL) < 0) {
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printk("[%s:%d] SIOCGMIIREG failed!\n", __FILE__, __LINE__);
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return 0xffff;
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}
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return mii->val_out;
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}
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}
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static void mdio_write(__u16 phy_id, __u8 reg, __u16 val)
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{
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if (use_et) {
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int args[2] = { reg, val };
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if (phy_id != ROBO_PHY_ADDR) {
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printk(
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"Access to real 'phy' registers unavaliable.\n"
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"Upgrade kernel driver.\n");
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return;
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}
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if (do_ioctl(SIOCSETCPHYWR, args) < 0) {
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printk("[%s:%d] SIOCGETCPHYWR failed!\n", __FILE__, __LINE__);
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return;
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}
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} else {
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struct mii_ioctl_data *mii = (struct mii_ioctl_data *)&ifr.ifr_data;
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mii->phy_id = phy_id;
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mii->reg_num = reg;
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mii->val_in = val;
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if (do_ioctl(SIOCSMIIREG, NULL) < 0) {
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printk("[%s:%d] SIOCSMIIREG failed!\n", __FILE__, __LINE__);
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return;
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}
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}
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}
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static int robo_reg(__u8 page, __u8 reg, __u8 op)
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{
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int i = 3;
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/* set page number */
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mdio_write(ROBO_PHY_ADDR, REG_MII_PAGE,
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(page << 8) | REG_MII_PAGE_ENABLE);
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/* set register address */
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mdio_write(ROBO_PHY_ADDR, REG_MII_ADDR,
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(reg << 8) | op);
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/* check if operation completed */
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while (i--) {
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if ((mdio_read(ROBO_PHY_ADDR, REG_MII_ADDR) & 3) == 0)
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return 0;
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}
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printk("[%s:%d] timeout in robo_reg!\n", __FILE__, __LINE__);
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return 0;
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}
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static void robo_read(__u8 page, __u8 reg, __u16 *val, int count)
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{
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int i;
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robo_reg(page, reg, REG_MII_ADDR_READ);
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for (i = 0; i < count; i++)
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val[i] = mdio_read(ROBO_PHY_ADDR, REG_MII_DATA0 + i);
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}
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static __u16 robo_read16(__u8 page, __u8 reg)
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{
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robo_reg(page, reg, REG_MII_ADDR_READ);
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return mdio_read(ROBO_PHY_ADDR, REG_MII_DATA0);
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}
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static __u32 robo_read32(__u8 page, __u8 reg)
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{
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robo_reg(page, reg, REG_MII_ADDR_READ);
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return mdio_read(ROBO_PHY_ADDR, REG_MII_DATA0) +
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(mdio_read(ROBO_PHY_ADDR, REG_MII_DATA0 + 1) << 16);
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}
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static void robo_write16(__u8 page, __u8 reg, __u16 val16)
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{
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/* write data */
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mdio_write(ROBO_PHY_ADDR, REG_MII_DATA0, val16);
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robo_reg(page, reg, REG_MII_ADDR_WRITE);
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}
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static void robo_write32(__u8 page, __u8 reg, __u32 val32)
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{
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/* write data */
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mdio_write(ROBO_PHY_ADDR, REG_MII_DATA0, val32 & 65535);
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mdio_write(ROBO_PHY_ADDR, REG_MII_DATA0 + 1, val32 >> 16);
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robo_reg(page, reg, REG_MII_ADDR_WRITE);
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}
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/* checks that attached switch is 5325E/5350 */
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static int robo_vlan5350()
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{
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/* set vlan access id to 15 and read it back */
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__u16 val16 = 15;
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robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS_5350, val16);
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/* 5365 will refuse this as it does not have this reg */
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return (robo_read16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS_5350) == val16);
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}
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static int robo_probe(char *devname)
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{
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struct ethtool_drvinfo info;
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int i;
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__u32 phyid;
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printk("Probing device %s: ", devname);
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strcpy(ifr.ifr_name, devname);
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if ((dev = dev_get_by_name(devname)) == NULL) {
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printk("No such device\n");
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return 1;
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}
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info.cmd = ETHTOOL_GDRVINFO;
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if (do_ioctl(SIOCETHTOOL, (void *) &info) < 0) {
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printk("SIOCETHTOOL: not supported\n");
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return 1;
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}
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/* try access using MII ioctls - get phy address */
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if (do_ioctl(SIOCGMIIPHY, NULL) < 0) {
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use_et = 1;
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} else {
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/* got phy address check for robo address */
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struct mii_ioctl_data *mii = (struct mii_ioctl_data *) &ifr.ifr_data;
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if (mii->phy_id != ROBO_PHY_ADDR) {
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printk("Invalid phy address (%d)\n", mii->phy_id);
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return 1;
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}
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}
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phyid = mdio_read(ROBO_PHY_ADDR, 0x2) |
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(mdio_read(ROBO_PHY_ADDR, 0x3) << 16);
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if (phyid == 0xffffffff || phyid == 0x55210022) {
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printk("No Robo switch in managed mode found\n");
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return 1;
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}
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is_5350 = robo_vlan5350();
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max_ports = 6;
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for (i = 0; i <= (is_5350 ? VLAN_ID_MAX5350 : VLAN_ID_MAX); i++) {
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/* issue read */
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__u16 val16 = (i) /* vlan */ | (0 << 12) /* read */ | (1 << 13) /* enable */;
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if (is_5350) {
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u32 val32;
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robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS_5350, val16);
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/* actual read */
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val32 = robo_read32(ROBO_VLAN_PAGE, ROBO_VLAN_READ);
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if ((val32 & (1 << 20)) /* valid */) {
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max_vlans = i + 1;
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}
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} else {
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robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS, val16);
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/* actual read */
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val16 = robo_read16(ROBO_VLAN_PAGE, ROBO_VLAN_READ);
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if ((val16 & (1 << 14)) /* valid */) {
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max_vlans = i + 1;
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}
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}
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}
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printk("found!\n");
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return 0;
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}
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static int handle_vlan_port_read(char *buf, int nr)
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{
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__u16 val16;
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int len = 0;
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int j;
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val16 = (nr) /* vlan */ | (0 << 12) /* read */ | (1 << 13) /* enable */;
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if (is_5350) {
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u32 val32;
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robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS_5350, val16);
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/* actual read */
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val32 = robo_read32(ROBO_VLAN_PAGE, ROBO_VLAN_READ);
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if ((val32 & (1 << 20)) /* valid */) {
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for (j = 0; j < 6; j++) {
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if (val32 & (1 << j)) {
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len += sprintf(buf + len, "%d%s\t", j,
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(val32 & (1 << (j + 6))) ? (j == 5 ? "u" : "") : "t");
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}
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}
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len += sprintf(buf + len, "\n");
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}
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} else {
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robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS, val16);
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/* actual read */
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val16 = robo_read16(ROBO_VLAN_PAGE, ROBO_VLAN_READ);
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if ((val16 & (1 << 14)) /* valid */) {
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for (j = 0; j < 6; j++) {
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if (val16 & (1 << j)) {
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len += sprintf(buf + len, "%d%s\t", j, (val16 & (1 << (j + 7))) ?
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(j == 5 ? "u" : "") : "t");
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}
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}
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len += sprintf(buf + len, "\n");
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}
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}
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return len;
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}
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static int handle_vlan_port_write(char *buf, int nr)
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{
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int untag = 0;
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int member = 0;
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int j;
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__u16 val16;
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while (*buf >= '0' && *buf <= '9') {
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j = *buf++ - '0';
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member |= 1 << j;
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/* untag if needed, CPU port requires special handling */
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if (*buf == 'u' || (j != 5 && (isspace(*buf) || *buf == 0))) {
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untag |= 1 << j;
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if (*buf) buf++;
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/* change default vlan tag */
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robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_PORT0_DEF_TAG + (j << 1), nr);
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} else if (*buf == '*' || *buf == 't' || isspace(*buf)) {
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buf++;
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} else break;
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while (isspace(*buf)) buf++;
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}
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if (*buf) {
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return -1;
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} else {
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/* write config now */
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val16 = (nr) /* vlan */ | (1 << 12) /* write */ | (1 << 13) /* enable */;
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if (is_5350) {
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robo_write32(ROBO_VLAN_PAGE, ROBO_VLAN_WRITE_5350,
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(1 << 20) /* valid */ | (untag << 6) | member);
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robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS_5350, val16);
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} else {
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robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_WRITE,
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(1 << 14) /* valid */ | (untag << 7) | member);
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robo_write16(ROBO_VLAN_PAGE, ROBO_VLAN_TABLE_ACCESS, val16);
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}
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}
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return 0;
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}
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static int __init robo_init()
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{
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char *device = "ethX";
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int notfound = 1;
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for (device[3] = '0'; (device[3] <= '3') && notfound; device[3]++) {
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notfound = robo_probe(device);
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}
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if (notfound)
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return -ENODEV;
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else {
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switch_config vlan[] = {
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{"ports", handle_vlan_port_read, handle_vlan_port_write},
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{NULL, NULL, NULL}
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};
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switch_driver driver = {
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name: DRIVER_NAME,
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ports: max_ports,
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vlans: max_vlans,
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driver_handlers: NULL,
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port_handlers: NULL,
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vlan_handlers: vlan,
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};
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return switch_register_driver(&driver);
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}
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}
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static void __exit robo_exit()
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{
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switch_unregister_driver(DRIVER_NAME);
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}
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MODULE_AUTHOR("Felix Fietkau <openwrt@nbd.name>");
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MODULE_LICENSE("GPL");
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module_init(robo_init);
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module_exit(robo_exit);
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