1
0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-12-18 18:33:43 +02:00
openwrt-xburst/target/linux/brcm47xx/patches-2.6.23/220-bcm5354.patch

49 lines
2.2 KiB
Diff
Raw Normal View History

Index: linux-2.6.23.16/drivers/ssb/driver_chipcommon.c
===================================================================
--- linux-2.6.23.16.orig/drivers/ssb/driver_chipcommon.c 2008-02-19 13:46:08.000000000 +0100
+++ linux-2.6.23.16/drivers/ssb/driver_chipcommon.c 2008-02-19 13:46:17.000000000 +0100
@@ -270,6 +270,8 @@ void ssb_chipco_resume(struct ssb_chipco
void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m)
{
+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354)
+ return;
*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
switch (*plltype) {
@@ -293,6 +295,8 @@ void ssb_chipco_get_clockcpu(struct ssb_
void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m)
{
+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354)
+ return;
*n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
*plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
switch (*plltype) {
Index: linux-2.6.23.16/drivers/ssb/driver_mipscore.c
===================================================================
--- linux-2.6.23.16.orig/drivers/ssb/driver_mipscore.c 2008-02-19 13:46:08.000000000 +0100
+++ linux-2.6.23.16/drivers/ssb/driver_mipscore.c 2008-02-19 13:46:17.000000000 +0100
@@ -160,6 +160,8 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m
if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) {
rate = 200000000;
+ } else if (bus->chip_id == 0x5354) {
+ rate = 240000000;
} else {
rate = ssb_calc_clock_rate(pll_type, n, m);
}
Index: linux-2.6.23.16/drivers/ssb/main.c
===================================================================
--- linux-2.6.23.16.orig/drivers/ssb/main.c 2008-02-19 13:46:08.000000000 +0100
+++ linux-2.6.23.16/drivers/ssb/main.c 2008-02-19 13:46:17.000000000 +0100
@@ -862,6 +862,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus)
if (bus->chip_id == 0x5365) {
rate = 100000000;
+ } else if (bus->chip_id == 0x5354) {
+ rate = 120000000;
} else {
rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m);
if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */