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192 lines
4.4 KiB
C
192 lines
4.4 KiB
C
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/*
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* (C) Copyright 2010
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* Michael Kurz <michi.kurz@googlemail.com>
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*
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* See file CREDITS for list of people who contributed to this
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* project.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*/
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#include <common.h>
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#include <malloc.h>
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#include <spi.h>
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#include <asm/addrspace.h>
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#include <asm/types.h>
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#include <asm/ar71xx.h>
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/*-----------------------------------------------------------------------
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* Definitions
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*/
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#ifdef DEBUG_SPI
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#define PRINTD(fmt,args...) printf (fmt ,##args)
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#else
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#define PRINTD(fmt,args...)
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#endif
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struct ar71xx_spi_slave {
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struct spi_slave slave;
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unsigned int mode;
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};
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static inline struct ar71xx_spi_slave *to_ar71xx_spi(struct spi_slave *slave)
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{
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return container_of(slave, struct ar71xx_spi_slave, slave);
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}
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/*=====================================================================*/
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/* Public Functions */
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/*=====================================================================*/
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/*-----------------------------------------------------------------------
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* Initialization
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*/
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void spi_init()
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{
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PRINTD("ar71xx_spi: spi_init");
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// Init SPI Hardware, disable remap, set clock
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__raw_writel(0x43, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_CTRL));
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PRINTD(" ---> out\n");
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}
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struct spi_slave *spi_setup_slave(unsigned int bus, unsigned int cs,
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unsigned int max_hz, unsigned int mode)
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{
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struct ar71xx_spi_slave *ss;
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PRINTD("ar71xx_spi: spi_setup_slave");
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if ((bus != 0) || (cs > 2))
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return NULL;
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ss = malloc(sizeof(struct ar71xx_spi_slave));
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if (!ss)
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return NULL;
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ss->slave.bus = bus;
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ss->slave.cs = cs;
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ss->mode = mode;
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/* TODO: Use max_hz to limit the SCK rate */
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PRINTD(" ---> out\n");
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return &ss->slave;
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}
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void spi_free_slave(struct spi_slave *slave)
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{
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struct ar71xx_spi_slave *ss = to_ar71xx_spi(slave);
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free(ss);
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}
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int spi_claim_bus(struct spi_slave *slave)
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{
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return 0;
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}
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void spi_release_bus(struct spi_slave *slave)
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{
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}
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int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout,
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void *din, unsigned long flags)
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{
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struct ar71xx_spi_slave *ss = to_ar71xx_spi(slave);
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uint8_t *rx = din;
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const uint8_t *tx = dout;
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uint8_t curbyte, curbitlen, restbits;
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uint32_t bytes = bitlen / 8;
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uint32_t out;
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uint32_t in;
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PRINTD("ar71xx_spi: spi_xfer: slave:%p bitlen:%08x dout:%p din:%p flags:%08x\n", slave, bitlen, dout, din, flags);
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if (flags & SPI_XFER_BEGIN) {
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__raw_writel(SPI_FS_GPIO, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_FS));
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__raw_writel(SPI_IOC_CS_ALL, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_IOC));
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}
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restbits = (bitlen % 8);
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if (restbits != 0)
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bytes++;
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// enable chip select
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out = SPI_IOC_CS_ALL & ~(SPI_IOC_CS(slave->cs));
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while (bytes--) {
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curbyte = 0;
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if (tx) {
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curbyte = *tx++;
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}
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if (restbits != 0) {
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curbitlen = restbits;
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curbyte <<= 8 - restbits;
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} else {
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curbitlen = 8;
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}
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PRINTD("ar71xx_spi: sending: data:%02x length:%d\n", curbyte, curbitlen);
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/* clock starts at inactive polarity */
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for (curbyte <<= (8 - curbitlen); curbitlen; curbitlen--) {
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if (curbyte & (1 << 7))
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out |= SPI_IOC_DO;
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else
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out &= ~(SPI_IOC_DO);
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/* setup MSB (to slave) on trailing edge */
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__raw_writel(out, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_IOC));
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__raw_writel(out | SPI_IOC_CLK, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_IOC));
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curbyte <<= 1;
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}
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in = __raw_readl(KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_RDS));
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PRINTD("ar71xx_spi: received:%02x\n", in);
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if (rx) {
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if (restbits == 0) {
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*rx++ = in;
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} else {
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*rx++ = (in << (8 - restbits));
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}
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}
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}
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if (flags & SPI_XFER_END) {
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__raw_writel(SPI_IOC_CS(slave->cs), KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_IOC));
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__raw_writel(SPI_IOC_CS_ALL, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_IOC));
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__raw_writel(0, KSEG1ADDR(AR71XX_SPI_BASE + SPI_REG_FS));
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}
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PRINTD(" ---> out\n");
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return 0;
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}
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