mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-12-11 22:05:20 +02:00
141 lines
4.3 KiB
Diff
141 lines
4.3 KiB
Diff
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--- a/drivers/bcma/driver_chipcommon.c
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+++ b/drivers/bcma/driver_chipcommon.c
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@@ -70,6 +70,8 @@ void bcma_core_chipcommon_init(struct bc
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(leddc_off << BCMA_CC_GPIOTIMER_OFFTIME_SHIFT)));
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}
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+ spin_lock_init(&cc->gpio_lock);
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+
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cc->setup_done = true;
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}
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@@ -92,34 +94,81 @@ u32 bcma_chipco_irq_status(struct bcma_d
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u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask)
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{
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- return bcma_cc_read32(cc, BCMA_CC_GPIOIN) & mask;
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+ unsigned long flags;
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+ u32 res;
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+
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+ spin_lock_irqsave(&cc->gpio_lock, flags);
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+ res = bcma_cc_read32(cc, BCMA_CC_GPIOIN) & mask;
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+ spin_unlock_irqrestore(&cc->gpio_lock, flags);
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+
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+ return res;
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}
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+EXPORT_SYMBOL_GPL(bcma_chipco_gpio_in);
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u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value)
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{
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- return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUT, mask, value);
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+ unsigned long flags;
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+ u32 res;
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+
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+ spin_lock_irqsave(&cc->gpio_lock, flags);
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+ res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUT, mask, value);
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+ spin_unlock_irqrestore(&cc->gpio_lock, flags);
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+
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+ return res;
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}
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+EXPORT_SYMBOL_GPL(bcma_chipco_gpio_out);
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u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value)
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{
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- return bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUTEN, mask, value);
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+ unsigned long flags;
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+ u32 res;
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+
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+ spin_lock_irqsave(&cc->gpio_lock, flags);
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+ res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOOUTEN, mask, value);
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+ spin_unlock_irqrestore(&cc->gpio_lock, flags);
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+
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+ return res;
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}
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+EXPORT_SYMBOL_GPL(bcma_chipco_gpio_outen);
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u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value)
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{
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- return bcma_cc_write32_masked(cc, BCMA_CC_GPIOCTL, mask, value);
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+ unsigned long flags;
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+ u32 res;
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+
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+ spin_lock_irqsave(&cc->gpio_lock, flags);
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+ res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOCTL, mask, value);
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+ spin_unlock_irqrestore(&cc->gpio_lock, flags);
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+
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+ return res;
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}
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EXPORT_SYMBOL_GPL(bcma_chipco_gpio_control);
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u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value)
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{
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- return bcma_cc_write32_masked(cc, BCMA_CC_GPIOIRQ, mask, value);
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+ unsigned long flags;
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+ u32 res;
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+
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+ spin_lock_irqsave(&cc->gpio_lock, flags);
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+ res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOIRQ, mask, value);
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+ spin_unlock_irqrestore(&cc->gpio_lock, flags);
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+
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+ return res;
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}
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+EXPORT_SYMBOL_GPL(bcma_chipco_gpio_intmask);
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u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value)
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{
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- return bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value);
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+ unsigned long flags;
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+ u32 res;
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+
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+ spin_lock_irqsave(&cc->gpio_lock, flags);
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+ res = bcma_cc_write32_masked(cc, BCMA_CC_GPIOPOL, mask, value);
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+ spin_unlock_irqrestore(&cc->gpio_lock, flags);
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+
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+ return res;
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}
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+EXPORT_SYMBOL_GPL(bcma_chipco_gpio_polarity);
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#ifdef CONFIG_BCMA_DRIVER_MIPS
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void bcma_chipco_serial_init(struct bcma_drv_cc *cc)
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--- a/include/linux/bcma/bcma_driver_chipcommon.h
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+++ b/include/linux/bcma/bcma_driver_chipcommon.h
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@@ -551,6 +551,9 @@ struct bcma_drv_cc {
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int nr_serial_ports;
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struct bcma_serial_port serial_ports[4];
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#endif /* CONFIG_BCMA_DRIVER_MIPS */
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+
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+ /* Lock for GPIO register access. */
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+ spinlock_t gpio_lock;
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};
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/* Register access */
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@@ -581,13 +584,22 @@ void bcma_chipco_irq_mask(struct bcma_dr
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u32 bcma_chipco_irq_status(struct bcma_drv_cc *cc, u32 mask);
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+#define BCMA_CC_GPIO_LINES 16
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+
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/* Chipcommon GPIO pin access. */
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-u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask);
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-u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value);
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-u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value);
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-u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask, u32 value);
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-u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask, u32 value);
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-u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask, u32 value);
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+extern u32 bcma_chipco_gpio_in(struct bcma_drv_cc *cc, u32 mask);
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+extern u32 bcma_chipco_gpio_out(struct bcma_drv_cc *cc, u32 mask, u32 value);
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+extern u32 bcma_chipco_gpio_outen(struct bcma_drv_cc *cc, u32 mask, u32 value);
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+extern u32 bcma_chipco_gpio_control(struct bcma_drv_cc *cc, u32 mask,
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+ u32 value);
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+extern u32 bcma_chipco_gpio_intmask(struct bcma_drv_cc *cc, u32 mask,
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+ u32 value);
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+extern u32 bcma_chipco_gpio_polarity(struct bcma_drv_cc *cc, u32 mask,
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+ u32 value);
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+static inline int bcma_chipco_gpio_count(void)
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+{
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+ return BCMA_CC_GPIO_LINES;
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+}
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/* PMU support */
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extern void bcma_pmu_init(struct bcma_drv_cc *cc);
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