1
0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-11-19 20:10:39 +02:00
openwrt-xburst/target/linux/s3c24xx/patches-2.6.26/1041-s3c2440-nand-disable-hwecc.patch.patch

29 lines
1013 B
Diff
Raw Normal View History

From bc0d09dd89a8837b9a4eeb63585caded6b290cf9 Mon Sep 17 00:00:00 2001
From: mokopatches <mokopatches@openmoko.org>
Date: Fri, 25 Jul 2008 22:21:22 +0100
Subject: [PATCH] s3c2440-nand-disable-hwecc.patch
Disable the hardware ECC checking on S3C2440 based platforms (HXD8, SMDK2440,
GTA02) for the time being, since our u-boot doesn't yet support it for 2k page
size NAND
---
drivers/mtd/nand/s3c2410.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/mtd/nand/s3c2410.c b/drivers/mtd/nand/s3c2410.c
index 6e7a5b9..8e1e482 100644
--- a/drivers/mtd/nand/s3c2410.c
+++ b/drivers/mtd/nand/s3c2410.c
@@ -665,7 +665,7 @@ static void s3c2410_nand_init_chip(struct s3c2410_nand_info *info,
nmtd->mtd.owner = THIS_MODULE;
nmtd->set = set;
- if (hardware_ecc) {
+ if (info->cpu_type == TYPE_S3C2410 && hardware_ecc) {
chip->ecc.calculate = s3c2410_nand_calculate_ecc;
chip->ecc.correct = s3c2410_nand_correct_data;
chip->ecc.mode = NAND_ECC_HW;
--
1.5.6.3