2008-07-19 01:50:46 +03:00
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--- a/ath_hal/ah_os.c
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+++ b/ath_hal/ah_os.c
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2008-07-17 05:30:08 +03:00
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@@ -917,9 +917,56 @@
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* NB: see the comments in ah_osdep.h about byte-swapping register
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* reads and writes to understand what's going on below.
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*/
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+
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+#ifdef CONFIG_IFXMIPS
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+extern int ifxmips_has_brn_block(void);
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+static int ifxmips_emulate = 0;
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+#define EEPROM_EMULATION 1
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+#endif
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+
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+#ifdef EEPROM_EMULATION
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+static int ath_hal_eeprom(struct ath_hal *ah, unsigned long addr, int val, int write)
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+{
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+ static int addrsel = 0;
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+ static int rc = 0;
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+
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+ if (write) {
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+ if(addr == 0x6000) {
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+ addrsel = val * 2;
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+ rc = 0;
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+ }
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+ } else {
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+ switch(addr)
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+ {
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+ case 0x600c:
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+ if(rc++ < 2)
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+ val = 0x00000000;
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+ else
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+ val = 0x00000002;
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+ break;
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+ case 0x6004:
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+ val = cpu_to_le16(__raw_readw((u16 *) KSEG1ADDR(0xb07f0400 + addrsel)));
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+ /* this forces the regdomain to 0x00 (worldwide), as the original setting
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+ * causes issues with the HAL */
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+ if (addrsel == 0x17e)
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+ val = 0;
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+ break;
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+ }
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+ }
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+ return val;
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+}
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+#endif
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+
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void __ahdecl
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ath_hal_reg_write(struct ath_hal *ah, u_int address, u_int32_t value)
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{
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+#ifdef EEPROM_EMULATION
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+ if((address >= 0x6000) && (address <= 0x6010) && ifxmips_emulate) {
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+ ath_hal_eeprom(ah, address, value, 1);
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+ return;
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+ }
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+#endif
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+
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_trace_regop(ah, REGOP_WRITE, address, value);
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_OS_REG_WRITE(ah, address, value);
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}
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@@ -929,7 +976,14 @@
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u_int32_t __ahdecl
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ath_hal_reg_read(struct ath_hal *ah, u_int address)
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{
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- u_int32_t val = _OS_REG_READ(ah, address);
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+ u_int32_t val;
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+
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+#ifdef EEPROM_EMULATION
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+ if((address >= 0x6000) && (address <= 0x6010) && ifxmips_emulate)
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+ val = ath_hal_eeprom(ah, address, 0, 0);
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+ else
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+#endif
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+ val = _OS_REG_READ(ah, address);
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_trace_regop(ah, REGOP_READ, address, val);
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return val;
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}
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@@ -1123,6 +1177,9 @@
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#ifdef MMIOTRACE
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kmmio_logmsg = _kmmio_logmsg;
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#endif
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+#ifdef CONFIG_IFXMIPS
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+ ifxmips_emulate = ifxmips_has_brn_block();
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+#endif
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sep = "";
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for (i = 0; ath_hal_buildopts[i] != NULL; i++) {
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