mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-11 13:37:30 +02:00
77 lines
1.9 KiB
Diff
77 lines
1.9 KiB
Diff
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--- a/arch/arm/mach-cns3xxx/cns3420vb.c
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+++ b/arch/arm/mach-cns3xxx/cns3420vb.c
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@@ -32,6 +32,7 @@
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#include <asm/mach/time.h>
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#include <mach/cns3xxx.h>
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#include <mach/irqs.h>
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+#include <mach/platform.h>
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#include "core.h"
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#include "devices.h"
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@@ -199,6 +200,8 @@ static void __init cns3420_init(void)
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cns3xxx_ahci_init();
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cns3xxx_sdhci_init();
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+ cns3xxx_pcie_init(0x3);
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+
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pm_power_off = cns3xxx_power_off;
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}
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--- a/arch/arm/mach-cns3xxx/core.h
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+++ b/arch/arm/mach-cns3xxx/core.h
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@@ -12,6 +12,8 @@
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#define __CNS3XXX_CORE_H
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extern struct sys_timer cns3xxx_timer;
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+extern int cns3xxx_pcie_init(u8 bitmap);
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+extern void cns3xxx_pcie_iotable_init(u8 bitmap);
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#ifdef CONFIG_CACHE_L2X0
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void __init cns3xxx_l2x0_init(void);
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--- a/arch/arm/mach-cns3xxx/pcie.c
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+++ b/arch/arm/mach-cns3xxx/pcie.c
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@@ -365,7 +365,23 @@ static int cns3xxx_pcie_abort_handler(un
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return 0;
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}
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-static int __init cns3xxx_pcie_init(void)
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+void __init cns3xxx_pcie_iotable_init(u8 bitmap)
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+{
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+ static int _iotable_init = 0;
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+ int i;
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+
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+ bitmap &= ~_iotable_init;
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+ for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
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+ if (!(bitmap & (1 << i)))
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+ continue;
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+
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+ iotable_init(cns3xxx_pcie[i].cfg_bases,
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+ ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
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+ }
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+ _iotable_init |= bitmap;
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+}
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+
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+int __init cns3xxx_pcie_init(u8 bitmap)
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{
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int i;
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@@ -375,9 +391,11 @@ static int __init cns3xxx_pcie_init(void
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hook_fault_code(16 + 6, cns3xxx_pcie_abort_handler, SIGBUS, 0,
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"imprecise external abort");
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+ cns3xxx_pcie_iotable_init(bitmap);
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for (i = 0; i < ARRAY_SIZE(cns3xxx_pcie); i++) {
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- iotable_init(cns3xxx_pcie[i].cfg_bases,
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- ARRAY_SIZE(cns3xxx_pcie[i].cfg_bases));
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+ if (!(bitmap & (1 << i)))
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+ continue;
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+
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cns3xxx_pcie_check_link(&cns3xxx_pcie[i]);
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cns3xxx_pcie_hw_init(&cns3xxx_pcie[i]);
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pci_common_init(&cns3xxx_pcie[i].hw_pci);
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@@ -387,4 +405,3 @@ static int __init cns3xxx_pcie_init(void
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return 0;
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}
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-device_initcall(cns3xxx_pcie_init);
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