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31 lines
2.2 KiB
C
31 lines
2.2 KiB
C
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#ifndef IFXMIPS_ATM_FW_REGS_DANUBE_H
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#define IFXMIPS_ATM_FW_REGS_DANUBE_H
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/*
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* Host-PPE Communication Data Address Mapping
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*/
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#define FW_VER_ID SB_BUFFER(0x2001)
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#define CFG_WRX_HTUTS SB_BUFFER(0x2400) /* WAN RX HTU Table Size, must be configured before enable PPE firmware. */
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#define CFG_WRX_QNUM SB_BUFFER(0x2401) /* WAN RX Queue Number */
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#define CFG_WRX_DCHNUM SB_BUFFER(0x2402) /* WAN RX DMA Channel Number, no more than 8, must be configured before enable PPE firmware. */
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#define CFG_WTX_DCHNUM SB_BUFFER(0x2403) /* WAN TX DMA Channel Number, no more than 16, must be configured before enable PPE firmware. */
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#define CFG_WRDES_DELAY SB_BUFFER(0x2404) /* WAN Descriptor Write Delay, must be configured before enable PPE firmware. */
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#define WRX_DMACH_ON SB_BUFFER(0x2405) /* WAN RX DMA Channel Enable, must be configured before enable PPE firmware. */
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#define WTX_DMACH_ON SB_BUFFER(0x2406) /* WAN TX DMA Channel Enable, must be configured before enable PPE firmware. */
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#define WRX_HUNT_BITTH SB_BUFFER(0x2407) /* WAN RX HUNT Threshold, must be between 2 to 8. */
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#define WRX_QUEUE_CONFIG(i) ((struct wrx_queue_config*) SB_BUFFER(0x2500 + (i) * 20))
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#define WRX_DMA_CHANNEL_CONFIG(i) ((struct wrx_dma_channel_config*) SB_BUFFER(0x2640 + (i) * 7))
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#define WTX_PORT_CONFIG(i) ((struct wtx_port_config*) SB_BUFFER(0x2440 + (i)))
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#define WTX_QUEUE_CONFIG(i) ((struct wtx_queue_config*) SB_BUFFER(0x2710 + (i) * 27))
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#define WTX_DMA_CHANNEL_CONFIG(i) ((struct wtx_dma_channel_config*) SB_BUFFER(0x2711 + (i) * 27))
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#define WAN_MIB_TABLE ((struct wan_mib_table*) SB_BUFFER(0x2410))
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#define HTU_ENTRY(i) ((struct htu_entry*) SB_BUFFER(0x2000 + (i)))
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#define HTU_MASK(i) ((struct htu_mask*) SB_BUFFER(0x2020 + (i)))
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#define HTU_RESULT(i) ((struct htu_result*) SB_BUFFER(0x2040 + (i)))
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#endif // IFXMIPS_ATM_FW_REGS_DANUBE_H
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