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cns3xxx: convert dwc_otg patches to files
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@34162 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
luka
266
target/linux/cns3xxx/files/drivers/usb/dwc/otg_plat.h
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266
target/linux/cns3xxx/files/drivers/usb/dwc/otg_plat.h
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/* ==========================================================================
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* $File: //dwh/usb_iip/dev/software/otg/linux/platform/dwc_otg_plat.h $
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* $Revision: #23 $
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* $Date: 2008/07/15 $
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* $Change: 1064915 $
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*
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* Synopsys HS OTG Linux Software Driver and documentation (hereinafter,
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* "Software") is an Unsupported proprietary work of Synopsys, Inc. unless
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* otherwise expressly agreed to in writing between Synopsys and you.
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*
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* The Software IS NOT an item of Licensed Software or Licensed Product under
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* any End User Software License Agreement or Agreement for Licensed Product
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* with Synopsys or any supplement thereto. You are permitted to use and
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* redistribute this Software in source and binary forms, with or without
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* modification, provided that redistributions of source code must retain this
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* notice. You may not view, use, disclose, copy or distribute this file or
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* any information contained herein except pursuant to this license grant from
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* Synopsys. If you do not agree with this notice, including the disclaimer
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* below, then you are not authorized to use the Software.
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*
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* THIS SOFTWARE IS BEING DISTRIBUTED BY SYNOPSYS SOLELY ON AN "AS IS" BASIS
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE HEREBY DISCLAIMED. IN NO EVENT SHALL SYNOPSYS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
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* DAMAGE.
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* ========================================================================== */
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#if !defined(__DWC_OTG_PLAT_H__)
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#define __DWC_OTG_PLAT_H__
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/delay.h>
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#include <asm/io.h>
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/* Changed all readl and writel to __raw_readl, __raw_writel */
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/**
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* @file
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*
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* This file contains the Platform Specific constants, interfaces
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* (functions and macros) for Linux.
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*
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*/
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//#if !defined(__LINUX_ARM_ARCH__)
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//#error "The contents of this file is Linux specific!!!"
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//#endif
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/**
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* Reads the content of a register.
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*
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* @param reg address of register to read.
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* @return contents of the register.
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*
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* Usage:<br>
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* <code>uint32_t dev_ctl = dwc_read_reg32(&dev_regs->dctl);</code>
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*/
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static __inline__ uint32_t dwc_read_reg32( volatile uint32_t *reg)
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{
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return __raw_readl(reg);
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// return readl(reg);
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};
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/**
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* Writes a register with a 32 bit value.
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*
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* @param reg address of register to read.
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* @param value to write to _reg.
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*
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* Usage:<br>
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* <code>dwc_write_reg32(&dev_regs->dctl, 0); </code>
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*/
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static __inline__ void dwc_write_reg32( volatile uint32_t *reg, const uint32_t value)
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{
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// writel( value, reg );
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__raw_writel(value, reg);
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};
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/**
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* This function modifies bit values in a register. Using the
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* algorithm: (reg_contents & ~clear_mask) | set_mask.
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*
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* @param reg address of register to read.
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* @param clear_mask bit mask to be cleared.
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* @param set_mask bit mask to be set.
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*
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* Usage:<br>
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* <code> // Clear the SOF Interrupt Mask bit and <br>
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* // set the OTG Interrupt mask bit, leaving all others as they were.
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* dwc_modify_reg32(&dev_regs->gintmsk, DWC_SOF_INT, DWC_OTG_INT);</code>
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*/
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static __inline__
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void dwc_modify_reg32( volatile uint32_t *reg, const uint32_t clear_mask, const uint32_t set_mask)
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{
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// writel( (readl(reg) & ~clear_mask) | set_mask, reg );
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__raw_writel( (__raw_readl(reg) & ~clear_mask) | set_mask, reg );
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};
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/**
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* Wrapper for the OS micro-second delay function.
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* @param[in] usecs Microseconds of delay
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*/
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static __inline__ void UDELAY( const uint32_t usecs )
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{
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udelay( usecs );
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}
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/**
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* Wrapper for the OS milli-second delay function.
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* @param[in] msecs milliseconds of delay
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*/
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static __inline__ void MDELAY( const uint32_t msecs )
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{
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mdelay( msecs );
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}
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/**
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* Wrapper for the Linux spin_lock. On the ARM (Integrator)
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* spin_lock() is a nop.
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*
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* @param lock Pointer to the spinlock.
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*/
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static __inline__ void SPIN_LOCK( spinlock_t *lock )
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{
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spin_lock(lock);
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}
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/**
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* Wrapper for the Linux spin_unlock. On the ARM (Integrator)
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* spin_lock() is a nop.
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*
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* @param lock Pointer to the spinlock.
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*/
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static __inline__ void SPIN_UNLOCK( spinlock_t *lock )
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{
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spin_unlock(lock);
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}
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/**
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* Wrapper (macro) for the Linux spin_lock_irqsave. On the ARM
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* (Integrator) spin_lock() is a nop.
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*
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* @param l Pointer to the spinlock.
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* @param f unsigned long for irq flags storage.
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*/
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#define SPIN_LOCK_IRQSAVE( l, f ) spin_lock_irqsave(l,f);
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/**
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* Wrapper (macro) for the Linux spin_unlock_irqrestore. On the ARM
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* (Integrator) spin_lock() is a nop.
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*
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* @param l Pointer to the spinlock.
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* @param f unsigned long for irq flags storage.
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*/
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#define SPIN_UNLOCK_IRQRESTORE( l,f ) spin_unlock_irqrestore(l,f);
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/*
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* Debugging support vanishes in non-debug builds.
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*/
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/**
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* The Debug Level bit-mask variable.
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*/
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extern uint32_t g_dbg_lvl;
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/**
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* Set the Debug Level variable.
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*/
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static inline uint32_t SET_DEBUG_LEVEL( const uint32_t new )
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{
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uint32_t old = g_dbg_lvl;
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g_dbg_lvl = new;
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return old;
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}
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/** When debug level has the DBG_CIL bit set, display CIL Debug messages. */
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#define DBG_CIL (0x2)
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/** When debug level has the DBG_CILV bit set, display CIL Verbose debug
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* messages */
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#define DBG_CILV (0x20)
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/** When debug level has the DBG_PCD bit set, display PCD (Device) debug
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* messages */
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#define DBG_PCD (0x4)
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/** When debug level has the DBG_PCDV set, display PCD (Device) Verbose debug
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* messages */
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#define DBG_PCDV (0x40)
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/** When debug level has the DBG_HCD bit set, display Host debug messages */
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#define DBG_HCD (0x8)
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/** When debug level has the DBG_HCDV bit set, display Verbose Host debug
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* messages */
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#define DBG_HCDV (0x80)
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/** When debug level has the DBG_HCD_URB bit set, display enqueued URBs in host
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* mode. */
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#define DBG_HCD_URB (0x800)
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/** When debug level has any bit set, display debug messages */
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#define DBG_ANY (0xFF)
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/** All debug messages off */
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#define DBG_OFF 0
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/** Prefix string for DWC_DEBUG print macros. */
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#define USB_DWC "DWC_otg: "
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/**
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* Print a debug message when the Global debug level variable contains
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* the bit defined in <code>lvl</code>.
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*
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* @param[in] lvl - Debug level, use one of the DBG_ constants above.
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* @param[in] x - like printf
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*
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* Example:<p>
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* <code>
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* DWC_DEBUGPL( DBG_ANY, "%s(%p)\n", __func__, _reg_base_addr);
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* </code>
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* <br>
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* results in:<br>
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* <code>
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* usb-DWC_otg: dwc_otg_cil_init(ca867000)
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* </code>
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*/
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#ifdef DEBUG
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# define DWC_DEBUGPL(lvl, x...) do{ if ((lvl)&g_dbg_lvl)printk( KERN_DEBUG USB_DWC x ); }while(0)
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# define DWC_DEBUGP(x...) DWC_DEBUGPL(DBG_ANY, x )
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# define CHK_DEBUG_LEVEL(level) ((level) & g_dbg_lvl)
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#else
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# define DWC_DEBUGPL(lvl, x...) do{}while(0)
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# define DWC_DEBUGP(x...)
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# define CHK_DEBUG_LEVEL(level) (0)
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#endif /*DEBUG*/
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/**
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* Print an Error message.
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*/
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#define DWC_ERROR(x...) printk( KERN_ERR USB_DWC x )
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/**
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* Print a Warning message.
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*/
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#define DWC_WARN(x...) printk( KERN_WARNING USB_DWC x )
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/**
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* Print a notice (normal but significant message).
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*/
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#define DWC_NOTICE(x...) printk( KERN_NOTICE USB_DWC x )
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/**
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* Basic message printing.
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*/
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#define DWC_PRINT(x...) printk( KERN_INFO USB_DWC x )
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#endif
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