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[adm5120] refactor kernel code (part 1), mark it as broken now
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7916 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
@@ -1,90 +1,179 @@
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/*****************************************************************************
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* Carsten Langgaard, carstenl@mips.com
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* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
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* Copyright (C) 2003 ADMtek Incorporated.
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* daniell@admtek.com.tw
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* Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
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/*
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* $Id$
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*
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* ########################################################################
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* Copyright (C) 2007 OpenWrt.org
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* Copyright (C) 2007 Gabor Juhos <juhosg@freemail.hu>
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*
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* This program is free software; you can distribute it and/or modify it
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* under the terms of the GNU General Public License (Version 2) as
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* published by the Free Software Foundation.
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* for more details.
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the
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* Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
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* Boston, MA 02110-1301, USA.
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*
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* ########################################################################
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*
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*****************************************************************************/
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*/
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#include <linux/autoconf.h>
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#include <linux/init.h>
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#include <linux/mm.h>
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#include <linux/bootmem.h>
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#include <linux/pfn.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <asm/bootinfo.h>
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#include <asm/page.h>
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#include <asm/sections.h>
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#include <asm/addrspace.h>
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#include <asm/mach-adm5120/adm5120_info.h>
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#include <asm-mips/mips-boards/prom.h>
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#include <asm/mach-adm5120/adm5120_defs.h>
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#include <asm/mach-adm5120/adm5120_switch.h>
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#include <asm/mach-adm5120/adm5120_mpmc.h>
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#define PFN_ALIGN(x) (((unsigned long)(x) + (PAGE_SIZE - 1)) & PAGE_MASK)
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#define SWITCH_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))
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#define SWITCH_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))=(v)
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struct prom_pmemblock mdesc[PROM_MAX_PMEMBLOCKS];
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#define MPMC_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))
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#define MPMC_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))=(v)
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struct prom_pmemblock * __init prom_getmdesc(void)
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#if 1
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# define mem_dbg(f, a...) printk("mem_detect: " f, ## a)
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#else
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# define mem_dbg(f, a...)
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#endif
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#define MEM_WR_DELAY 10000 /* 0.01 usec */
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unsigned long adm5120_memsize;
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static int __init mem_check_pattern(u8 *addr, unsigned long offs)
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{
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unsigned int memsize;
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char cmdline[CL_SIZE], *ptr;
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volatile u32 *p1 = (volatile u32 *)addr;
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volatile u32 *p2 = (volatile u32 *)(addr+offs);
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u32 t,u,v;
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memsize = adm5120_memsize;
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/* Check the command line for a memsize directive that overrides
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* the physical/default amount */
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strcpy(cmdline, arcs_cmdline);
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ptr = strstr(cmdline, "memsize=");
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if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' '))
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ptr = strstr(ptr, " memsize=");
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/* save original value */
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t = *p1;
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u = *p2;
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if (ptr)
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memsize = memparse(ptr + 8, &ptr);
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memset(mdesc, 0, sizeof(mdesc));
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mdesc[0].type = BOOT_MEM_RAM;
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mdesc[0].base = CPHYSADDR(PFN_ALIGN(&_end));
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mdesc[0].size = memsize - mdesc[0].base;
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if (t != u)
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return 0;
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return &mdesc[0];
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v = 0x55555555;
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if (u == v)
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v = 0xAAAAAAAA;
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mem_dbg("write 0x%08lX to 0x%08lX\n", v, (unsigned long)p1);
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*p1 = v;
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mem_dbg("delay %d ns\n", MEM_WR_DELAY);
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adm5120_ndelay(MEM_WR_DELAY);
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u = *p2;
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mem_dbg("pattern at 0x%08lX is 0x%08lX\n", (unsigned long)p2, u);
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/* restore original value */
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*p1 = t;
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return (v == u);
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}
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void __init prom_meminit(void)
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static void __init adm5120_detect_memsize(void)
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{
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struct prom_pmemblock *p;
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u32 memctrl;
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u32 size, maxsize;
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u8 *p;
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p = prom_getmdesc();
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while (p->size)
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{
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long type;
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unsigned long base, size;
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base = p->base;
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type = p->type,
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size = p->size;
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add_memory_region(base, size, type);
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p++;
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memctrl = SWITCH_READ(SWITCH_REG_MEMCTRL);
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switch (memctrl & MEMCTRL_SDRS_MASK) {
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case MEMCTRL_SDRS_4M:
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maxsize = 4 << 20;
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break;
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case MEMCTRL_SDRS_8M:
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maxsize = 8 << 20;
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break;
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case MEMCTRL_SDRS_16M:
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maxsize = 16 << 20;
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break;
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default:
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maxsize = 64 << 20;
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break;
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}
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/* disable buffers for both SDRAM banks */
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mem_dbg("disable buffers for both banks\n");
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MPMC_WRITE(MPMC_REG_DC0, MPMC_READ(MPMC_REG_DC0) & ~DC_BE);
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MPMC_WRITE(MPMC_REG_DC1, MPMC_READ(MPMC_REG_DC1) & ~DC_BE);
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mem_dbg("checking for %ldMB chip in 1st bank\n", maxsize >> 20);
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/* detect size of the 1st SDRAM bank */
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p = (u8 *)KSEG1ADDR(0);
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for (size = 2<<20; size <= (maxsize >> 1); size <<= 1) {
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if (mem_check_pattern(p, size)) {
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/* mirrored address */
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mem_dbg("mirrored data found at offset 0x%lX\n", size);
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break;
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}
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}
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mem_dbg("chip size in 1st bank is %ldMB\n", size >> 20);
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adm5120_memsize = size;
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if (size != maxsize)
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/* 2nd bank is not supported */
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goto out;
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if ((memctrl & MEMCTRL_SDR1_ENABLE) == 0)
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/* 2nd bank is disabled */
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goto out;
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/*
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* some bootloaders enable 2nd bank, even if the 2nd SDRAM chip
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* are missing.
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*/
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mem_dbg("check presence of 2nd bank\n");
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p = (u8 *)KSEG1ADDR(maxsize+size-4);
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if (mem_check_pattern(p, 0)) {
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adm5120_memsize += size;
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}
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if (maxsize != size) {
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/* adjusting MECTRL register */
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memctrl &= ~(MEMCTRL_SDRS_MASK);
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switch (size>>20) {
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case 4:
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memctrl |= MEMCTRL_SDRS_4M;
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break;
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case 8:
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memctrl |= MEMCTRL_SDRS_8M;
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break;
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case 16:
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memctrl |= MEMCTRL_SDRS_16M;
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break;
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default:
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memctrl |= MEMCTRL_SDRS_64M;
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break;
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}
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SWITCH_WRITE(SWITCH_REG_MEMCTRL, memctrl);
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}
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out:
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/* reenable buffer for both SDRAM banks */
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mem_dbg("enable buffers for both banks\n");
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MPMC_WRITE(MPMC_REG_DC0, MPMC_READ(MPMC_REG_DC0) | DC_BE);
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MPMC_WRITE(MPMC_REG_DC1, MPMC_READ(MPMC_REG_DC1) | DC_BE);
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mem_dbg("%dx%ldMB memory found\n", (adm5120_memsize == size) ? 1 : 2 ,
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size >>20);
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}
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void __init prom_free_prom_memory(void)
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void __init adm5120_mem_init(void)
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{
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/* We do not have to prom memory to free */
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adm5120_detect_memsize();
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add_memory_region(0, adm5120_memsize, BOOT_MEM_RAM);
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}
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