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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2025-04-21 12:27:27 +03:00

Merge commit 'nbd/master' into xburst

This commit is contained in:
Lars-Peter Clausen
2010-01-30 14:20:57 +01:00
468 changed files with 155637 additions and 6272 deletions

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@@ -15,7 +15,7 @@ INITRAMFS_EXTRA_FILES:=
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += admswconfig hostapd-mini kmod-input-core \
DEFAULT_PACKAGES += admswconfig wpad-mini kmod-input-core \
kmod-input-polldev kmod-input-gpio-buttons kmod-button-hotplug \
kmod-leds-gpio kmod-ledtrig-adm5120-switch

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@@ -1,16 +0,0 @@
. /etc/functions.sh
insmod input-core
insmod input-polldev
insmod gpio_buttons
insmod button-hotplug
ifname=eth0
failsafe_ip
netmsg 192.168.1.255 "Press reset now, to enter Failsafe!"
ifconfig "$ifname" 0.0.0.0 down
sleep 2

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@@ -0,0 +1,12 @@
#!/bin/sh
enable_reset_button() {
insmod input-core
insmod input-polldev
insmod gpio_buttons
insmod button-hotplug
}
boot_hook_add preinit_main enable_reset_button

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@@ -0,0 +1,9 @@
#!/bin/sh
set_preinit_ifname() {
ifname=eth0
}
boot_hook_add preinit_main set_preinit_ifname

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@@ -454,6 +454,7 @@ static int __init ar7_register_devices(void)
uart_port[0].mapbase = AR7_REGS_UART0;
uart_port[0].membase = ioremap(uart_port[0].mapbase, 256);
uart_port[0].regshift = 2;
uart_port[0].flags = UPF_IOREMAP;
res = early_serial_setup(&uart_port[0]);
if (res)
return res;
@@ -469,6 +470,7 @@ static int __init ar7_register_devices(void)
uart_port[1].mapbase = UR8_REGS_UART1;
uart_port[1].membase = ioremap(uart_port[1].mapbase, 256);
uart_port[1].regshift = 2;
uart_port[1].flags = UPF_IOREMAP;
res = early_serial_setup(&uart_port[1]);
if (res)
return res;

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@@ -1,5 +1,5 @@
#
# Copyright (C) 2008-2009 OpenWrt.org
# Copyright (C) 2008-2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
@@ -12,13 +12,13 @@ BOARDNAME:=Atheros AR71xx/AR7240/AR913x
FEATURES:=squashfs jffs2 tgz
CFLAGS:=-Os -pipe -mips32r2 -mtune=mips32r2 -funit-at-a-time
LINUX_VERSION:=2.6.30.10
LINUX_VERSION:=2.6.32.7
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += \
kmod-leds-gpio kmod-input-core kmod-input-polldev \
kmod-input-gpio-buttons kmod-button-hotplug
kmod-input-gpio-buttons kmod-button-hotplug swconfig
define Target/Description
Build firmware images for Atheros AR71xx/AR913x based boards.

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@@ -14,3 +14,13 @@ config interface lan
config interface wan
option ifname eth1
option proto dhcp
config switch
option name rtl8366s
option reset 1
option enable_vlan 1
config switch_vlan
option device rtl8366s
option vlan 0
option ports "0 1 2 3 5"

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@@ -14,3 +14,13 @@ config interface lan
config interface wan
option ifname eth1
option proto dhcp
config switch
option name rtl8366s
option reset 1
option enable_vlan 1
config switch_vlan
option device rtl8366s
option vlan 0
option ports "0 1 2 3 5"

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@@ -15,7 +15,8 @@ config interface wan
option ifname eth1
option proto dhcp
config switch eth0
config switch
option name eth0
option reset 1
option enable_vlan 1

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@@ -0,0 +1,26 @@
config interface loopback
option ifname lo
option proto static
option ipaddr 127.0.0.1
option netmask 255.0.0.0
config interface lan
option ifname eth0
option type bridge
option proto static
option ipaddr 192.168.1.1
option netmask 255.255.255.0
config interface wan
option ifname eth1
option proto dhcp
config switch
option name rtl8366s
option reset 1
option enable_vlan 1
config switch_vlan
option device rtl8366s
option vlan 0
option ports "0 1 2 3 5"

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@@ -96,6 +96,9 @@ get_status_led() {
wrt160nl)
status_led="wrt160nl:blue:wps"
;;
wzr-hp-g300nh)
status_led="wzr-hp-g300nh:green:router"
;;
esac;
}

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@@ -100,6 +100,9 @@ ar71xx_board_name() {
*WRT400N)
name="wrt400n"
;;
*WZR-HP-G300NH)
name="wzr-hp-g300nh"
;;
*)
name="generic"
;;

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@@ -0,0 +1,16 @@
#
# Copyright (C) 2009 OpenWrt.org
#
. /lib/ar71xx.sh
preinit_enable_reset_button() {
insmod input-core
insmod input-polldev
insmod gpio_buttons
insmod button-hotplug
}
boot_hook_add preinit_main preinit_enable_reset_button

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@@ -20,13 +20,6 @@ fetch_mac_from_mtd() {
[ ! -z $mac ] && ifconfig eth1 hw ether $mac 2>/dev/null
}
preinit_load_modules() {
insmod input-core
insmod input-polldev
insmod gpio_buttons
insmod button-hotplug
}
preinit_set_mac_address() {
case $(ar71xx_board_name) in
tew-632brp)
@@ -42,15 +35,5 @@ preinit_set_mac_address() {
esac
}
preinit_set_mac_address
preinit_load_modules
boot_hook_add preinit_main preinit_set_mac_address
ifname=eth0
failsafe_ip
netmsg 192.168.1.255 "Press reset now, to enter Failsafe!"
ifconfig "$ifname" 0.0.0.0 down
sleep 2

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@@ -0,0 +1,16 @@
#!/bin/sh
#
# Copyright (C) 2009 OpenWrt.org
#
. /lib/ar71xx.sh
set_preinit_iface() {
ifname=eth0
}
boot_hook_add preinit_main set_preinit_iface

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@@ -68,7 +68,7 @@ platform_check_image() {
[ "$ARGC" -gt 1 ] && return 1
case "$board" in
ap81 | ap83 | dir-600-a1 | dir-615-c1 | dir-825-b1 | mzk-w04nu | mzk-w300nh | tew-632brp | wrt-400n | bullet-m | nano-m | rocket-m)
ap81 | ap83 | dir-600-a1 | dir-615-c1 | dir-825-b1 | mzk-w04nu | mzk-w300nh | tew-632brp | wrt-400n | bullet-m | nano-m | rocket-m | wzr-hp-g300nh)
[ "$magic" != "2705" ] && {
echo "Invalid image type."
return 1

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@@ -19,7 +19,6 @@ CONFIG_AR71XX_MACH_AW_NR580=y
CONFIG_AR71XX_MACH_DIR_600_A1=y
CONFIG_AR71XX_MACH_DIR_615_C1=y
CONFIG_AR71XX_MACH_DIR_825_B1=y
CONFIG_AR71XX_MACH_GENERIC=y
CONFIG_AR71XX_MACH_MZK_W04NU=y
CONFIG_AR71XX_MACH_MZK_W300NH=y
CONFIG_AR71XX_MACH_PB42=y
@@ -36,6 +35,7 @@ CONFIG_AR71XX_MACH_WNR2000=y
CONFIG_AR71XX_MACH_WP543=y
CONFIG_AR71XX_MACH_WRT160NL=y
CONFIG_AR71XX_MACH_WRT400N=y
CONFIG_AR71XX_MACH_WZR_HP_G300NH=y
CONFIG_AR71XX_NVRAM=y
CONFIG_AR71XX_WDT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -102,6 +102,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_NXP_74HC153=y
CONFIG_GPIO_PCF857X=y
CONFIG_GPIO_SYSFS=y
CONFIG_HARDWARE_WATCHPOINTS=y
@@ -148,7 +149,6 @@ CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SIM is not set
CONFIG_MTD_AR91XX_FLASH=y
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_CFI_INTELEXT is not set
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_JEDECPROBE=y
@@ -183,6 +183,8 @@ CONFIG_PHYLIB=y
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_RTL8306_PHY=y
CONFIG_RTL8366S_PHY=y
CONFIG_RTL8366S_PHY_DEBUG_FS=y
CONFIG_RTL8366_SMI=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set

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@@ -21,7 +21,6 @@ CONFIG_AR71XX_MACH_AW_NR580=y
CONFIG_AR71XX_MACH_DIR_600_A1=y
CONFIG_AR71XX_MACH_DIR_615_C1=y
CONFIG_AR71XX_MACH_DIR_825_B1=y
CONFIG_AR71XX_MACH_GENERIC=y
CONFIG_AR71XX_MACH_MZK_W04NU=y
CONFIG_AR71XX_MACH_MZK_W300NH=y
CONFIG_AR71XX_MACH_PB42=y
@@ -38,6 +37,7 @@ CONFIG_AR71XX_MACH_WNR2000=y
CONFIG_AR71XX_MACH_WP543=y
CONFIG_AR71XX_MACH_WRT160NL=y
CONFIG_AR71XX_MACH_WRT400N=y
CONFIG_AR71XX_MACH_WZR_HP_G300NH=y
CONFIG_AR71XX_NVRAM=y
CONFIG_AR71XX_WDT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -105,7 +105,7 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
CONFIG_GPIO_PCF857X=y
CONFIG_GPIO_NXP_74HC153=y
CONFIG_GPIO_SYSFS=y
CONFIG_HARDWARE_WATCHPOINTS=y
CONFIG_HAS_DMA=y
@@ -187,6 +187,8 @@ CONFIG_PHYLIB=y
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_RTL8306_PHY=y
CONFIG_RTL8366S_PHY=y
# CONFIG_RTL8366S_PHY_DEBUG_FS is not set
CONFIG_RTL8366_SMI=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set

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@@ -21,7 +21,6 @@ CONFIG_AR71XX_MACH_AW_NR580=y
CONFIG_AR71XX_MACH_DIR_600_A1=y
CONFIG_AR71XX_MACH_DIR_615_C1=y
CONFIG_AR71XX_MACH_DIR_825_B1=y
CONFIG_AR71XX_MACH_GENERIC=y
CONFIG_AR71XX_MACH_MZK_W04NU=y
CONFIG_AR71XX_MACH_MZK_W300NH=y
CONFIG_AR71XX_MACH_PB42=y
@@ -38,6 +37,7 @@ CONFIG_AR71XX_MACH_WNR2000=y
CONFIG_AR71XX_MACH_WP543=y
CONFIG_AR71XX_MACH_WRT160NL=y
CONFIG_AR71XX_MACH_WRT400N=y
CONFIG_AR71XX_MACH_WZR_HP_G300NH=y
CONFIG_AR71XX_NVRAM=y
CONFIG_AR71XX_WDT=y
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
@@ -107,6 +107,7 @@ CONFIG_GENERIC_GPIO=y
CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y
CONFIG_GPIOLIB=y
# CONFIG_GPIO_MC33880 is not set
CONFIG_GPIO_NXP_74HC153=y
CONFIG_GPIO_PCF857X=y
CONFIG_GPIO_SYSFS=y
CONFIG_HARDWARE_WATCHPOINTS=y
@@ -190,6 +191,8 @@ CONFIG_PHYLIB=y
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PROBE_INITRD_HEADER is not set
CONFIG_RTL8306_PHY=y
CONFIG_RTL8366S_PHY=y
# CONFIG_RTL8366S_PHY_DEBUG_FS is not set
CONFIG_RTL8366_SMI=y
CONFIG_SCHED_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_DMA is not set

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@@ -68,8 +68,12 @@ config AR71XX_MACH_AW_NR580
select AR71XX_DEV_LEDS_GPIO
default n
config AR71XX_MACH_GENERIC
bool "Generic AR71xx based machine support"
config AR71XX_MACH_WZR_HP_G300NH
bool "Buffalo WZR-HP-G300NH board support"
select AR71XX_DEV_AR913X_WMAC
select AR71XX_DEV_GPIO_BUTTONS
select AR71XX_DEV_LEDS_GPIO
select AR71XX_DEV_USB
default y
config AR71XX_MACH_WP543

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@@ -31,7 +31,6 @@ obj-$(CONFIG_AR71XX_MACH_AW_NR580) += mach-aw-nr580.o
obj-$(CONFIG_AR71XX_MACH_DIR_600_A1) += mach-dir-600-a1.o
obj-$(CONFIG_AR71XX_MACH_DIR_615_C1) += mach-dir-615-c1.o
obj-$(CONFIG_AR71XX_MACH_DIR_825_B1) += mach-dir-825-b1.o
obj-$(CONFIG_AR71XX_MACH_GENERIC) += mach-generic.o
obj-$(CONFIG_AR71XX_MACH_MZK_W04NU) += mach-mzk-w04nu.o
obj-$(CONFIG_AR71XX_MACH_MZK_W300NH) += mach-mzk-w300nh.o
obj-$(CONFIG_AR71XX_MACH_PB42) += mach-pb42.o
@@ -48,3 +47,4 @@ obj-$(CONFIG_AR71XX_MACH_WNR2000) += mach-wnr2000.o
obj-$(CONFIG_AR71XX_MACH_WP543) += mach-wp543.o
obj-$(CONFIG_AR71XX_MACH_WRT160NL) += mach-wrt160nl.o
obj-$(CONFIG_AR71XX_MACH_WRT400N) += mach-wrt400n.o
obj-$(CONFIG_AR71XX_MACH_WZR_HP_G300NH) += mach-wzr-hp-g300nh.o

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@@ -14,7 +14,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/delay.h>
#include <linux/rtl8366_smi.h>
#include <linux/rtl8366s.h>
#include <asm/mach-ar71xx/ar71xx.h>
@@ -130,16 +130,16 @@ static struct gpio_button dir825b1_gpio_buttons[] __initdata = {
}
};
static struct rtl8366_smi_platform_data dir825b1_rtl8366_smi_data = {
static struct rtl8366s_platform_data dir825b1_rtl8366s_data = {
.gpio_sda = DIR825B1_GPIO_RTL8366_SDA,
.gpio_sck = DIR825B1_GPIO_RTL8366_SCK,
};
static struct platform_device dir825b1_rtl8366_smi_device = {
.name = "rtl8366-smi",
static struct platform_device dir825b1_rtl8366s_device = {
.name = RTL8366S_DRIVER_NAME,
.id = -1,
.dev = {
.platform_data = &dir825b1_rtl8366_smi_data,
.platform_data = &dir825b1_rtl8366s_data,
}
};
@@ -155,13 +155,13 @@ static void __init dir825b1_setup(void)
ar71xx_add_device_mdio(0x0);
ar71xx_eth0_data.mii_bus_dev = &dir825b1_rtl8366_smi_device.dev;
ar71xx_eth0_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ar71xx_eth0_data.speed = SPEED_1000;
ar71xx_eth0_data.duplex = DUPLEX_FULL;
ar71xx_eth0_pll_data.pll_1000 = 0x11110000;
ar71xx_eth1_data.mii_bus_dev = &dir825b1_rtl8366_smi_device.dev;
ar71xx_eth1_data.mii_bus_dev = &dir825b1_rtl8366s_device.dev;
ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ar71xx_eth1_data.phy_mask = 0x10;
ar71xx_eth1_pll_data.pll_1000 = 0x11110000;
@@ -180,7 +180,7 @@ static void __init dir825b1_setup(void)
ar71xx_add_device_usb();
platform_device_register(&dir825b1_rtl8366_smi_device);
platform_device_register(&dir825b1_rtl8366s_device);
ap94_pci_init((u8 *) KSEG1ADDR(DIR825B1_CAL_LOCATION_0),
(u8 *) KSEG1ADDR(DIR825B1_MAC_LOCATION_0),

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@@ -1,23 +0,0 @@
/*
* Generic AR71xx machine support
*
* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/init.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include "machtype.h"
static void __init ar71xx_generic_init(void)
{
/* Nothing to do */
}
MIPS_MACHINE(AR71XX_MACH_GENERIC, "Generic", "Generic AR71xx board",
ar71xx_generic_init);

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@@ -56,6 +56,10 @@ static struct platform_device rb4xx_nand_device = {
static struct ar71xx_pci_irq rb4xx_pci_irqs[] __initdata = {
{
.slot = 0,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV2,
}, {
.slot = 1,
.pin = 1,
.irq = AR71XX_PCI_IRQ_DEV0,
@@ -244,12 +248,12 @@ static void __init rb450_generic_setup(int gige)
ar71xx_add_device_mdio(0xffffffe0);
ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
ar71xx_eth0_data.phy_if_mode = (gige) ? PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII;
ar71xx_eth0_data.phy_mask = 0x0000000f;
ar71xx_eth0_data.speed = (gige) ? SPEED_1000 : SPEED_100;
ar71xx_eth0_data.duplex = DUPLEX_FULL;
ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
ar71xx_eth1_data.phy_if_mode = (gige) ? PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII;
ar71xx_eth1_data.phy_mask = 0x00000010;
ar71xx_add_device_eth(1);

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@@ -13,7 +13,7 @@
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/delay.h>
#include <linux/rtl8366_smi.h>
#include <linux/rtl8366s.h>
#include <asm/mach-ar71xx/ar71xx.h>
@@ -143,16 +143,16 @@ static struct gpio_button wndr3700_gpio_buttons[] __initdata = {
}
};
static struct rtl8366_smi_platform_data wndr3700_rtl8366_smi_data = {
static struct rtl8366s_platform_data wndr3700_rtl8366s_data = {
.gpio_sda = WNDR3700_GPIO_RTL8366_SDA,
.gpio_sck = WNDR3700_GPIO_RTL8366_SCK,
};
static struct platform_device wndr3700_rtl8366_smi_device = {
.name = "rtl8366-smi",
static struct platform_device wndr3700_rtl8366s_device = {
.name = RTL8366S_DRIVER_NAME,
.id = -1,
.dev = {
.platform_data = &wndr3700_rtl8366_smi_data,
.platform_data = &wndr3700_rtl8366s_data,
}
};
@@ -163,14 +163,14 @@ static void __init wndr3700_setup(void)
ar71xx_set_mac_base(art);
ar71xx_eth0_pll_data.pll_1000 = 0x11110000;
ar71xx_eth0_data.mii_bus_dev = &wndr3700_rtl8366_smi_device.dev;
ar71xx_eth0_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev;
ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ar71xx_eth0_data.phy_mask = 0xf;
ar71xx_eth0_data.speed = SPEED_1000;
ar71xx_eth0_data.duplex = DUPLEX_FULL;
ar71xx_eth1_pll_data.pll_1000 = 0x11110000;
ar71xx_eth1_data.mii_bus_dev = &wndr3700_rtl8366_smi_device.dev;
ar71xx_eth1_data.mii_bus_dev = &wndr3700_rtl8366s_device.dev;
ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ar71xx_eth1_data.phy_mask = 0x10;
@@ -188,7 +188,7 @@ static void __init wndr3700_setup(void)
ARRAY_SIZE(wndr3700_gpio_buttons),
wndr3700_gpio_buttons);
platform_device_register(&wndr3700_rtl8366_smi_device);
platform_device_register(&wndr3700_rtl8366s_device);
platform_device_register_simple("wndr3700-led-usb", -1, NULL, 0);
ap94_pci_init(art + WNDR3700_CALDATA0_OFFSET,

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@@ -0,0 +1,266 @@
/*
* Buffalo WZR-HP-G300NH board support
*
* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/nxp_74hc153.h>
#include <linux/rtl8366s.h>
#include <asm/mips_machine.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/ar91xx_flash.h>
#include "machtype.h"
#include "devices.h"
#include "dev-ar913x-wmac.h"
#include "dev-gpio-buttons.h"
#include "dev-leds-gpio.h"
#include "dev-usb.h"
#define WZRHPG300NH_GPIO_LED_USB 0
#define WZRHPG300NH_GPIO_LED_DIAG 1
#define WZRHPG300NH_GPIO_LED_WIRELESS 6
#define WZRHPG300NH_GPIO_LED_SECURITY 17
#define WZRHPG300NH_GPIO_LED_ROUTER 18
#define WZRHPG300NH_GPIO_RTL8366_SDA 19
#define WZRHPG300NH_GPIO_RTL8366_SCK 20
#define WZRHPG300NH_GPIO_74HC153_S0 9
#define WZRHPG300NH_GPIO_74HC153_S1 11
#define WZRHPG300NH_GPIO_74HC153_1Y 12
#define WZRHPG300NH_GPIO_74HC153_2Y 14
#define WZRHPG300NH_GPIO_EXP_BASE 32
#define WZRHPG300NH_GPIO_BTN_AOSS (WZRHPG300NH_GPIO_EXP_BASE + 0)
#define WZRHPG300NH_GPIO_BTN_RESET (WZRHPG300NH_GPIO_EXP_BASE + 1)
#define WZRHPG300NH_GPIO_BTN_ROUTER_ON (WZRHPG300NH_GPIO_EXP_BASE + 2)
#define WZRHPG300NH_GPIO_BTN_QOS_ON (WZRHPG300NH_GPIO_EXP_BASE + 3)
#define WZRHPG300NH_GPIO_BTN_USB (WZRHPG300NH_GPIO_EXP_BASE + 5)
#define WZRHPG300NH_GPIO_BTN_ROUTER_AUTO (WZRHPG300NH_GPIO_EXP_BASE + 6)
#define WZRHPG300NH_GPIO_BTN_QOS_OFF (WZRHPG300NH_GPIO_EXP_BASE + 7)
#define WZRHPG300NH_BUTTONS_POLL_INTERVAL 20
#define WZRHPG300NH_MAC_OFFSET 0x20c
#ifdef CONFIG_MTD_PARTITIONS
static struct mtd_partition wzrhpg300nh_flash_partitions[] = {
{
.name = "u-boot",
.offset = 0,
.size = 0x0040000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "u-boot-env",
.offset = 0x0040000,
.size = 0x0020000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "kernel",
.offset = 0x0060000,
.size = 0x0100000,
}, {
.name = "rootfs",
.offset = 0x0160000,
.size = 0x1e60000,
}, {
.name = "user_property",
.offset = 0x1fc0000,
.size = 0x0020000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "art",
.offset = 0x1fe0000,
.size = 0x0020000,
.mask_flags = MTD_WRITEABLE,
}, {
.name = "firmware",
.offset = 0x0060000,
.size = 0x1f60000,
}
};
#endif /* CONFIG_MTD_PARTITIONS */
static struct ar91xx_flash_platform_data wzrhpg300nh_flash_data = {
.width = 2,
#ifdef CONFIG_MTD_PARTITIONS
.parts = wzrhpg300nh_flash_partitions,
.nr_parts = ARRAY_SIZE(wzrhpg300nh_flash_partitions),
#endif
};
#define WZRHPG300NH_FLASH_BASE 0x1e000000
#define WZRHPG300NH_FLASH_SIZE (32 * 1024 * 1024)
static struct resource wzrhpg300nh_flash_resources[] = {
[0] = {
.start = WZRHPG300NH_FLASH_BASE,
.end = WZRHPG300NH_FLASH_BASE + WZRHPG300NH_FLASH_SIZE - 1,
.flags = IORESOURCE_MEM,
},
};
static struct platform_device wzrhpg300nh_flash_device = {
.name = "ar91xx-flash",
.id = -1,
.resource = wzrhpg300nh_flash_resources,
.num_resources = ARRAY_SIZE(wzrhpg300nh_flash_resources),
.dev = {
.platform_data = &wzrhpg300nh_flash_data,
}
};
static struct gpio_led wzrhpg300nh_leds_gpio[] __initdata = {
{
.name = "wzr-hp-g300nh:orange:security",
.gpio = WZRHPG300NH_GPIO_LED_SECURITY,
.active_low = 1,
}, {
.name = "wzr-hp-g300nh:green:wireless",
.gpio = WZRHPG300NH_GPIO_LED_WIRELESS,
.active_low = 1,
}, {
.name = "wzr-hp-g300nh:green:router",
.gpio = WZRHPG300NH_GPIO_LED_ROUTER,
.active_low = 1,
}, {
.name = "wzr-hp-g300nh:red:diag",
.gpio = WZRHPG300NH_GPIO_LED_DIAG,
.active_low = 1,
}, {
.name = "wzr-hp-g300nh:blue:usb",
.gpio = WZRHPG300NH_GPIO_LED_USB,
.active_low = 1,
}
};
static struct gpio_button wzrhpg300nh_gpio_buttons[] __initdata = {
{
.desc = "reset",
.type = EV_KEY,
.code = BTN_0,
.threshold = 3,
.gpio = WZRHPG300NH_GPIO_BTN_RESET,
.active_low = 1,
}, {
.desc = "aoss",
.type = EV_KEY,
.code = BTN_1,
.threshold = 3,
.gpio = WZRHPG300NH_GPIO_BTN_AOSS,
.active_low = 1,
}, {
.desc = "usb",
.type = EV_KEY,
.code = BTN_2,
.threshold = 3,
.gpio = WZRHPG300NH_GPIO_BTN_USB,
.active_low = 1,
}, {
.desc = "qos_on",
.type = EV_KEY,
.code = BTN_3,
.threshold = 3,
.gpio = WZRHPG300NH_GPIO_BTN_QOS_ON,
.active_low = 0,
}, {
.desc = "qos_off",
.type = EV_KEY,
.code = BTN_4,
.threshold = 3,
.gpio = WZRHPG300NH_GPIO_BTN_QOS_OFF,
.active_low = 0,
}, {
.desc = "router_on",
.type = EV_KEY,
.code = BTN_5,
.threshold = 3,
.gpio = WZRHPG300NH_GPIO_BTN_ROUTER_ON,
.active_low = 0,
}, {
.desc = "router_auto",
.type = EV_KEY,
.code = BTN_6,
.threshold = 3,
.gpio = WZRHPG300NH_GPIO_BTN_ROUTER_AUTO,
.active_low = 0,
}
};
static struct nxp_74hc153_platform_data wzrhpg300nh_74hc153_data = {
.gpio_base = WZRHPG300NH_GPIO_EXP_BASE,
.gpio_pin_s0 = WZRHPG300NH_GPIO_74HC153_S0,
.gpio_pin_s1 = WZRHPG300NH_GPIO_74HC153_S1,
.gpio_pin_1y = WZRHPG300NH_GPIO_74HC153_1Y,
.gpio_pin_2y = WZRHPG300NH_GPIO_74HC153_2Y,
};
static struct platform_device wzrhpg300nh_74hc153_device = {
.name = NXP_74HC153_DRIVER_NAME,
.id = -1,
.dev = {
.platform_data = &wzrhpg300nh_74hc153_data,
}
};
static struct rtl8366s_platform_data wzrhpg300nh_rtl8366s_data = {
.gpio_sda = WZRHPG300NH_GPIO_RTL8366_SDA,
.gpio_sck = WZRHPG300NH_GPIO_RTL8366_SCK,
};
static struct platform_device wzrhpg300nh_rtl8366s_device = {
.name = RTL8366S_DRIVER_NAME,
.id = -1,
.dev = {
.platform_data = &wzrhpg300nh_rtl8366s_data,
}
};
static void __init wzrhpg300nh_setup(void)
{
u8 *eeprom = (u8 *) KSEG1ADDR(0x1fff1000);
ar71xx_set_mac_base(eeprom + WZRHPG300NH_MAC_OFFSET);
ar71xx_eth0_pll_data.pll_1000 = 0x1e000100;
ar71xx_eth0_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev;
ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ar71xx_eth0_data.phy_mask = 0xf;
ar71xx_eth0_data.speed = SPEED_1000;
ar71xx_eth0_data.duplex = DUPLEX_FULL;
ar71xx_eth1_pll_data.pll_1000 = 0x1e000100;
ar71xx_eth1_data.mii_bus_dev = &wzrhpg300nh_rtl8366s_device.dev;
ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
ar71xx_eth1_data.phy_mask = 0x10;
ar71xx_add_device_eth(0);
ar71xx_add_device_eth(1);
ar71xx_add_device_usb();
ar913x_add_device_wmac(eeprom, NULL);
platform_device_register(&wzrhpg300nh_74hc153_device);
platform_device_register(&wzrhpg300nh_flash_device);
platform_device_register(&wzrhpg300nh_rtl8366s_device);
ar71xx_add_device_leds_gpio(-1, ARRAY_SIZE(wzrhpg300nh_leds_gpio),
wzrhpg300nh_leds_gpio);
ar71xx_add_device_gpio_buttons(-1, WZRHPG300NH_BUTTONS_POLL_INTERVAL,
ARRAY_SIZE(wzrhpg300nh_gpio_buttons),
wzrhpg300nh_gpio_buttons);
}
MIPS_MACHINE(AR71XX_MACH_WZR_HP_G300NH, "WZR-HP-G300NH",
"Buffalo WZR-HP-G300NH", wzrhpg300nh_setup);

View File

@@ -51,6 +51,7 @@ enum ar71xx_mach_type {
AR71XX_MACH_WP543, /* Compex WP543 */
AR71XX_MACH_WRT160NL, /* Linksys WRT160NL */
AR71XX_MACH_WRT400N, /* Linksys WRT400N */
AR71XX_MACH_WZR_HP_G300NH, /* Buffalo WZR-HP-G300NH */
};
#endif /* _AR71XX_MACHTYPE_H */

View File

@@ -288,3 +288,11 @@ static int __init ar71xx_machine_setup(void)
}
arch_initcall(ar71xx_machine_setup);
static void __init ar71xx_generic_init(void)
{
/* Nothing to do */
}
MIPS_MACHINE(AR71XX_MACH_GENERIC, "Generic", "Generic AR71xx board",
ar71xx_generic_init);

View File

@@ -0,0 +1,246 @@
/*
* NXP 74HC153 - Dual 4-input multiplexer GPIO driver
*
* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/platform_device.h>
#include <linux/nxp_74hc153.h>
#define NXP_74HC153_NUM_GPIOS 8
#define NXP_74HC153_S0_MASK 0x1
#define NXP_74HC153_S1_MASK 0x2
#define NXP_74HC153_BANK_MASK 0x4
struct nxp_74hc153_chip {
struct device *parent;
struct gpio_chip gpio_chip;
struct mutex lock;
};
static struct nxp_74hc153_chip *gpio_to_nxp(struct gpio_chip *gc)
{
return container_of(gc, struct nxp_74hc153_chip, gpio_chip);
}
static int nxp_74hc153_direction_input(struct gpio_chip *gc, unsigned offset)
{
return 0;
}
static int nxp_74hc153_direction_output(struct gpio_chip *gc,
unsigned offset, int val)
{
return -EINVAL;
}
static int nxp_74hc153_get_value(struct gpio_chip *gc, unsigned offset)
{
struct nxp_74hc153_chip *nxp;
struct nxp_74hc153_platform_data *pdata;
unsigned s0;
unsigned s1;
unsigned pin;
int ret;
nxp = gpio_to_nxp(gc);
pdata = nxp->parent->platform_data;
s0 = !!(offset & NXP_74HC153_S0_MASK);
s1 = !!(offset & NXP_74HC153_S1_MASK);
pin = (offset & NXP_74HC153_BANK_MASK) ? pdata->gpio_pin_2y
: pdata->gpio_pin_1y;
mutex_lock(&nxp->lock);
gpio_set_value(pdata->gpio_pin_s0, s0);
gpio_set_value(pdata->gpio_pin_s1, s1);
ret = gpio_get_value(pin);
mutex_unlock(&nxp->lock);
return ret;
}
static void nxp_74hc153_set_value(struct gpio_chip *gc,
unsigned offset, int val)
{
/* not supported */
}
static int __devinit nxp_74hc153_probe(struct platform_device *pdev)
{
struct nxp_74hc153_platform_data *pdata;
struct nxp_74hc153_chip *nxp;
struct gpio_chip *gc;
int err;
pdata = pdev->dev.platform_data;
if (pdata == NULL) {
dev_dbg(&pdev->dev, "no platform data specified\n");
return -EINVAL;
}
nxp = kzalloc(sizeof(struct nxp_74hc153_chip), GFP_KERNEL);
if (nxp == NULL) {
dev_err(&pdev->dev, "no memory for private data\n");
return -ENOMEM;
}
err = gpio_request(pdata->gpio_pin_s0, dev_name(&pdev->dev));
if (err) {
dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n",
pdata->gpio_pin_s0, err);
goto err_free_nxp;
}
err = gpio_request(pdata->gpio_pin_s1, dev_name(&pdev->dev));
if (err) {
dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n",
pdata->gpio_pin_s1, err);
goto err_free_s0;
}
err = gpio_request(pdata->gpio_pin_1y, dev_name(&pdev->dev));
if (err) {
dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n",
pdata->gpio_pin_1y, err);
goto err_free_s1;
}
err = gpio_request(pdata->gpio_pin_2y, dev_name(&pdev->dev));
if (err) {
dev_err(&pdev->dev, "unable to claim gpio %u, err=%d\n",
pdata->gpio_pin_2y, err);
goto err_free_1y;
}
err = gpio_direction_output(pdata->gpio_pin_s0, 0);
if (err) {
dev_err(&pdev->dev,
"unable to set direction of gpio %u, err=%d\n",
pdata->gpio_pin_s0, err);
goto err_free_2y;
}
err = gpio_direction_output(pdata->gpio_pin_s1, 0);
if (err) {
dev_err(&pdev->dev,
"unable to set direction of gpio %u, err=%d\n",
pdata->gpio_pin_s1, err);
goto err_free_2y;
}
err = gpio_direction_input(pdata->gpio_pin_1y);
if (err) {
dev_err(&pdev->dev,
"unable to set direction of gpio %u, err=%d\n",
pdata->gpio_pin_1y, err);
goto err_free_2y;
}
err = gpio_direction_input(pdata->gpio_pin_2y);
if (err) {
dev_err(&pdev->dev,
"unable to set direction of gpio %u, err=%d\n",
pdata->gpio_pin_2y, err);
goto err_free_2y;
}
nxp->parent = &pdev->dev;
mutex_init(&nxp->lock);
gc = &nxp->gpio_chip;
gc->direction_input = nxp_74hc153_direction_input;
gc->direction_output = nxp_74hc153_direction_output;
gc->get = nxp_74hc153_get_value;
gc->set = nxp_74hc153_set_value;
gc->can_sleep = 1;
gc->base = pdata->gpio_base;
gc->ngpio = NXP_74HC153_NUM_GPIOS;
gc->label = dev_name(nxp->parent);
gc->dev = nxp->parent;
gc->owner = THIS_MODULE;
err = gpiochip_add(&nxp->gpio_chip);
if (err) {
dev_err(&pdev->dev, "unable to add gpio chip, err=%d\n", err);
goto err_free_2y;
}
platform_set_drvdata(pdev, nxp);
return 0;
err_free_2y:
gpio_free(pdata->gpio_pin_2y);
err_free_1y:
gpio_free(pdata->gpio_pin_1y);
err_free_s1:
gpio_free(pdata->gpio_pin_s1);
err_free_s0:
gpio_free(pdata->gpio_pin_s0);
err_free_nxp:
kfree(nxp);
return err;
}
static int nxp_74hc153_remove(struct platform_device *pdev)
{
struct nxp_74hc153_chip *nxp = platform_get_drvdata(pdev);
struct nxp_74hc153_platform_data *pdata = pdev->dev.platform_data;
if (nxp) {
int err;
err = gpiochip_remove(&nxp->gpio_chip);
if (err) {
dev_err(&pdev->dev,
"unable to remove gpio chip, err=%d\n",
err);
return err;
}
gpio_free(pdata->gpio_pin_2y);
gpio_free(pdata->gpio_pin_1y);
gpio_free(pdata->gpio_pin_s1);
gpio_free(pdata->gpio_pin_s0);
kfree(nxp);
platform_set_drvdata(pdev, NULL);
}
return 0;
}
static struct platform_driver nxp_74hc153_driver = {
.probe = nxp_74hc153_probe,
.remove = __devexit_p(nxp_74hc153_remove),
.driver = {
.name = NXP_74HC153_DRIVER_NAME,
.owner = THIS_MODULE,
},
};
static int __init nxp_74hc153_init(void)
{
return platform_driver_register(&nxp_74hc153_driver);
}
subsys_initcall(nxp_74hc153_init);
static void __exit nxp_74hc153_exit(void)
{
platform_driver_unregister(&nxp_74hc153_driver);
}
module_exit(nxp_74hc153_exit);
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
MODULE_DESCRIPTION("GPIO expander driver for NXP 74HC153");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:" NXP_74HC153_DRIVER_NAME);

View File

@@ -1,661 +0,0 @@
/*
* Platform driver for the Realtek RTL8366 ethernet switch
*
* Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/spinlock.h>
#include <linux/skbuff.h>
#include <linux/phy.h>
#include <linux/rtl8366_smi.h>
//#define DEBUG 1
#define RTL8366_SMI_DRIVER_NAME "rtl8366-smi"
#define RTL8366_SMI_DRIVER_DESC "Realtek RTL8366 switch driver"
#define RTL8366_SMI_DRIVER_VER "0.1.0"
#define RTL8366S_PHY_NO_MAX 4
#define RTL8366S_PHY_PAGE_MAX 7
#define RTL8366S_PHY_ADDR_MAX 31
#define RTL8366S_CHIP_VERSION_CTRL_REG 0x0104
#define RTL8366S_CHIP_VERSION_MASK 0xf
#define RTL8366S_CHIP_ID_REG 0x0105
#define RTL8366S_CHIP_ID_8366 0x8366
/* PHY registers control */
#define RTL8366S_PHY_ACCESS_CTRL_REG 0x8028
#define RTL8366S_PHY_ACCESS_DATA_REG 0x8029
#define RTL8366S_PHY_CTRL_READ 1
#define RTL8366S_PHY_CTRL_WRITE 0
#define RTL8366S_PHY_REG_MASK 0x1f
#define RTL8366S_PHY_PAGE_OFFSET 5
#define RTL8366S_PHY_PAGE_MASK (0x7 << 5)
#define RTL8366S_PHY_NO_OFFSET 9
#define RTL8366S_PHY_NO_MASK (0x1f << 9)
#define RTL8366_SMI_ACK_RETRY_COUNT 5
#define RTL8366_SMI_CLK_DELAY 10 /* nsec */
struct rtl8366_smi {
struct platform_device *pdev;
struct rtl8366_smi_platform_data *pdata;
spinlock_t lock;
struct mii_bus *mii_bus;
int mii_irq[PHY_MAX_ADDR];
};
static inline void rtl8366_smi_clk_delay(struct rtl8366_smi *smi)
{
ndelay(RTL8366_SMI_CLK_DELAY);
}
static void rtl8366_smi_start(struct rtl8366_smi *smi)
{
unsigned int sda = smi->pdata->gpio_sda;
unsigned int sck = smi->pdata->gpio_sck;
/*
* Set GPIO pins to output mode, with initial state:
* SCK = 0, SDA = 1
*/
gpio_direction_output(sck, 0);
gpio_direction_output(sda, 1);
rtl8366_smi_clk_delay(smi);
/* CLK 1: 0 -> 1, 1 -> 0 */
gpio_set_value(sck, 1);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 0);
rtl8366_smi_clk_delay(smi);
/* CLK 2: */
gpio_set_value(sck, 1);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sda, 0);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 0);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sda, 1);
}
static void rtl8366_smi_stop(struct rtl8366_smi *smi)
{
unsigned int sda = smi->pdata->gpio_sda;
unsigned int sck = smi->pdata->gpio_sck;
rtl8366_smi_clk_delay(smi);
gpio_set_value(sda, 0);
gpio_set_value(sck, 1);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sda, 1);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 1);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 0);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 1);
/* add a click */
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 0);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 1);
/* set GPIO pins to input mode */
gpio_direction_input(sda);
gpio_direction_input(sck);
}
static void rtl8366_smi_write_bits(struct rtl8366_smi *smi, u32 data, u32 len)
{
unsigned int sda = smi->pdata->gpio_sda;
unsigned int sck = smi->pdata->gpio_sck;
for (; len > 0; len--) {
rtl8366_smi_clk_delay(smi);
/* prepare data */
if ( data & ( 1 << (len - 1)) )
gpio_set_value(sda, 1);
else
gpio_set_value(sda, 0);
rtl8366_smi_clk_delay(smi);
/* clocking */
gpio_set_value(sck, 1);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 0);
}
}
static void rtl8366_smi_read_bits(struct rtl8366_smi *smi, u32 len, u32 *data)
{
unsigned int sda = smi->pdata->gpio_sda;
unsigned int sck = smi->pdata->gpio_sck;
gpio_direction_input(sda);
for (*data = 0; len > 0; len--) {
u32 u;
rtl8366_smi_clk_delay(smi);
/* clocking */
gpio_set_value(sck, 1);
rtl8366_smi_clk_delay(smi);
u = gpio_get_value(sda);
gpio_set_value(sck, 0);
*data |= (u << (len - 1));
}
gpio_direction_output(sda, 0);
}
static int rtl8366_smi_wait_for_ack(struct rtl8366_smi *smi)
{
int retry_cnt;
retry_cnt = 0;
do {
u32 ack;
rtl8366_smi_read_bits(smi, 1, &ack);
if (ack == 0)
break;
if (++retry_cnt > RTL8366_SMI_ACK_RETRY_COUNT)
return -EIO;
} while (1);
return 0;
}
static int rtl8366_smi_write_byte(struct rtl8366_smi *smi, u8 data)
{
rtl8366_smi_write_bits(smi, data, 8);
return rtl8366_smi_wait_for_ack(smi);
}
static int rtl8366_smi_read_byte0(struct rtl8366_smi *smi, u8 *data)
{
u32 t;
/* read data */
rtl8366_smi_read_bits(smi, 8, &t);
*data = (t & 0xff);
/* send an ACK */
rtl8366_smi_write_bits(smi, 0x00, 1);
return 0;
}
static int rtl8366_smi_read_byte1(struct rtl8366_smi *smi, u8 *data)
{
u32 t;
/* read data */
rtl8366_smi_read_bits(smi, 8, &t);
*data = (t & 0xff);
/* send an ACK */
rtl8366_smi_write_bits(smi, 0x01, 1);
return 0;
}
static int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
{
unsigned long flags;
u8 lo = 0;
u8 hi = 0;
int ret;
spin_lock_irqsave(&smi->lock, flags);
rtl8366_smi_start(smi);
/* send READ command */
ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x01);
if (ret)
goto out;
/* set ADDR[7:0] */
ret = rtl8366_smi_write_byte(smi, addr & 0xff);
if (ret)
goto out;
/* set ADDR[15:8] */
ret = rtl8366_smi_write_byte(smi, addr >> 8);
if (ret)
goto out;
/* read DATA[7:0] */
rtl8366_smi_read_byte0(smi, &lo);
/* read DATA[15:8] */
rtl8366_smi_read_byte1(smi, &hi);
*data = ((u32) lo) | (((u32) hi) << 8);
ret = 0;
out:
rtl8366_smi_stop(smi);
spin_unlock_irqrestore(&smi->lock, flags);
return ret;
}
static int rtl8366_smi_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data)
{
unsigned long flags;
int ret;
spin_lock_irqsave(&smi->lock, flags);
rtl8366_smi_start(smi);
/* send WRITE command */
ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x00);
if (ret)
goto out;
/* set ADDR[7:0] */
ret = rtl8366_smi_write_byte(smi, addr & 0xff);
if (ret)
goto out;
/* set ADDR[15:8] */
ret = rtl8366_smi_write_byte(smi, addr >> 8);
if (ret)
goto out;
/* write DATA[7:0] */
ret = rtl8366_smi_write_byte(smi, data & 0xff);
if (ret)
goto out;
/* write DATA[15:8] */
ret = rtl8366_smi_write_byte(smi, data >> 8);
if (ret)
goto out;
ret = 0;
out:
rtl8366_smi_stop(smi);
spin_unlock_irqrestore(&smi->lock, flags);
return ret;
}
static int rtl8366_smi_read_phy_reg(struct rtl8366_smi *smi,
u32 phy_no, u32 page, u32 addr, u32 *data)
{
u32 reg;
int ret;
if (phy_no > RTL8366S_PHY_NO_MAX)
return -EINVAL;
if (page > RTL8366S_PHY_PAGE_MAX)
return -EINVAL;
if (addr > RTL8366S_PHY_ADDR_MAX)
return -EINVAL;
ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
RTL8366S_PHY_CTRL_READ);
if (ret)
return ret;
reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
(addr & RTL8366S_PHY_REG_MASK);
ret = rtl8366_smi_write_reg(smi, reg, 0);
if (ret)
return ret;
ret = rtl8366_smi_read_reg(smi, RTL8366S_PHY_ACCESS_DATA_REG, data);
if (ret)
return ret;
return 0;
}
static int rtl8366_smi_write_phy_reg(struct rtl8366_smi *smi,
u32 phy_no, u32 page, u32 addr, u32 data)
{
u32 reg;
int ret;
if (phy_no > RTL8366S_PHY_NO_MAX)
return -EINVAL;
if (page > RTL8366S_PHY_PAGE_MAX)
return -EINVAL;
if (addr > RTL8366S_PHY_ADDR_MAX)
return -EINVAL;
ret = rtl8366_smi_write_reg(smi, RTL8366S_PHY_ACCESS_CTRL_REG,
RTL8366S_PHY_CTRL_WRITE);
if (ret)
return ret;
reg = 0x8000 | (1 << (phy_no + RTL8366S_PHY_NO_OFFSET)) |
((page << RTL8366S_PHY_PAGE_OFFSET) & RTL8366S_PHY_PAGE_MASK) |
(addr & RTL8366S_PHY_REG_MASK);
ret = rtl8366_smi_write_reg(smi, reg, data);
if (ret)
return ret;
return 0;
}
#ifdef DEBUG
static void rtl8366_smi_dump_regs(struct rtl8366_smi *smi)
{
u32 t;
int err;
int i;
for (i = 0; i < 0x200; i++) {
err = rtl8366_smi_read_reg(smi, i, &t);
if (err) {
dev_err(&smi->pdev->dev,
"unable to read register %04x\n", i);
return;
}
dev_info(&smi->pdev->dev, "reg %04x: %04x\n", i, t);
}
for (i = 0; i <= RTL8366S_PHY_NO_MAX; i++) {
int j;
for (j = 0; j <= RTL8366S_PHY_ADDR_MAX; j++) {
err = rtl8366_smi_read_phy_reg(smi, i, 0, j, &t);
if (err) {
dev_err(&smi->pdev->dev,
"unable to read PHY%u:%02x register\n",
i, j);
return;
}
dev_info(&smi->pdev->dev,
"PHY%u:%02x: %04x\n", i, j, t);
}
}
}
#else
static inline void rtl8366_smi_dump_regs(struct rtl8366_smi *smi) {}
#endif
static int rtl8366_smi_mii_read(struct mii_bus *bus, int addr, int reg)
{
struct rtl8366_smi *smi = bus->priv;
u32 val = 0;
int err;
err = rtl8366_smi_read_phy_reg(smi, addr, 0, reg, &val);
if (err)
return 0xffff;
return val;
}
static int rtl8366_smi_mii_write(struct mii_bus *bus, int addr, int reg,
u16 val)
{
struct rtl8366_smi *smi = bus->priv;
u32 t;
int err;
err = rtl8366_smi_write_phy_reg(smi, addr, 0, reg, val);
/* flush write */
(void) rtl8366_smi_read_phy_reg(smi, addr, 0, reg, &t);
return err;
}
static int rtl8366_smi_mii_init(struct rtl8366_smi *smi)
{
int ret;
int i;
smi->mii_bus = mdiobus_alloc();
if (smi->mii_bus == NULL) {
ret = -ENOMEM;
goto err;
}
spin_lock_init(&smi->lock);
smi->mii_bus->priv = (void *) smi;
smi->mii_bus->name = "rtl8366-smi";
smi->mii_bus->read = rtl8366_smi_mii_read;
smi->mii_bus->write = rtl8366_smi_mii_write;
snprintf(smi->mii_bus->id, MII_BUS_ID_SIZE, "%s",
dev_name(&smi->pdev->dev));
smi->mii_bus->parent = &smi->pdev->dev;
smi->mii_bus->phy_mask = ~(0x1f);
smi->mii_bus->irq = smi->mii_irq;
for (i = 0; i < PHY_MAX_ADDR; i++)
smi->mii_irq[i] = PHY_POLL;
rtl8366_smi_dump_regs(smi);
ret = mdiobus_register(smi->mii_bus);
if (ret)
goto err_free;
rtl8366_smi_dump_regs(smi);
return 0;
err_free:
mdiobus_free(smi->mii_bus);
err:
return ret;
}
static void rtl8366_smi_mii_cleanup(struct rtl8366_smi *smi)
{
mdiobus_unregister(smi->mii_bus);
mdiobus_free(smi->mii_bus);
}
static int rtl8366_smi_setup(struct rtl8366_smi *smi)
{
u32 chip_id = 0;
u32 chip_ver = 0;
int ret;
ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_ID_REG, &chip_id);
if (ret) {
dev_err(&smi->pdev->dev, "unable to read chip id\n");
return ret;
}
switch (chip_id) {
case RTL8366S_CHIP_ID_8366:
break;
default:
dev_err(&smi->pdev->dev, "unknown chip id (%04x)\n", chip_id);
return -ENODEV;
}
ret = rtl8366_smi_read_reg(smi, RTL8366S_CHIP_VERSION_CTRL_REG,
&chip_ver);
if (ret) {
dev_err(&smi->pdev->dev, "unable to read chip version\n");
return ret;
}
dev_info(&smi->pdev->dev, "RTL%04x ver. %u chip found\n",
chip_id, chip_ver & RTL8366S_CHIP_VERSION_MASK);
return 0;
}
static int __init rtl8366_smi_probe(struct platform_device *pdev)
{
static int rtl8366_smi_version_printed;
struct rtl8366_smi_platform_data *pdata;
struct rtl8366_smi *smi;
int err;
if (!rtl8366_smi_version_printed++)
printk(KERN_NOTICE RTL8366_SMI_DRIVER_DESC
" version " RTL8366_SMI_DRIVER_VER"\n");
pdata = pdev->dev.platform_data;
if (!pdata) {
dev_err(&pdev->dev, "no platform data specified\n");
err = -EINVAL;
goto err_out;
}
smi = kzalloc(sizeof(struct rtl8366_smi), GFP_KERNEL);
if (!smi) {
dev_err(&pdev->dev, "no memory for private data\n");
err = -ENOMEM;
goto err_out;
}
err = gpio_request(pdata->gpio_sda, dev_name(&pdev->dev));
if (err) {
dev_err(&pdev->dev, "gpio_request failed for %u, err=%d\n",
pdata->gpio_sda, err);
goto err_free_smi;
}
err = gpio_request(pdata->gpio_sck, dev_name(&pdev->dev));
if (err) {
dev_err(&pdev->dev, "gpio_request failed for %u, err=%d\n",
pdata->gpio_sck, err);
goto err_free_sda;
}
smi->pdev = pdev;
smi->pdata = pdata;
spin_lock_init(&smi->lock);
platform_set_drvdata(pdev, smi);
dev_info(&pdev->dev, "using GPIO pins %u (SDA) and %u (SCK)\n",
pdata->gpio_sda, pdata->gpio_sck);
err = rtl8366_smi_setup(smi);
if (err)
goto err_clear_drvdata;
err = rtl8366_smi_mii_init(smi);
if (err)
goto err_clear_drvdata;
return 0;
err_clear_drvdata:
platform_set_drvdata(pdev, NULL);
gpio_free(pdata->gpio_sck);
err_free_sda:
gpio_free(pdata->gpio_sda);
err_free_smi:
kfree(smi);
err_out:
return err;
}
static int __devexit rtl8366_smi_remove(struct platform_device *pdev)
{
struct rtl8366_smi *smi = platform_get_drvdata(pdev);
if (smi) {
struct rtl8366_smi_platform_data *pdata;
pdata = pdev->dev.platform_data;
rtl8366_smi_mii_cleanup(smi);
platform_set_drvdata(pdev, NULL);
gpio_free(pdata->gpio_sck);
gpio_free(pdata->gpio_sda);
kfree(smi);
}
return 0;
}
int rtl8366_phy_config_aneg(struct phy_device *phydev)
{
return 0;
}
static struct platform_driver rtl8366_smi_driver = {
.driver = {
.name = RTL8366_SMI_DRIVER_NAME,
.owner = THIS_MODULE,
},
.probe = rtl8366_smi_probe,
.remove = __devexit_p(rtl8366_smi_remove),
};
static struct phy_driver rtl8366_smi_phy_driver = {
.phy_id = 0x001cc960,
.name = "Realtek RTL8366",
.phy_id_mask = 0x1ffffff0,
.features = PHY_GBIT_FEATURES,
.config_aneg = rtl8366_phy_config_aneg,
.read_status = genphy_read_status,
.driver = {
.owner = THIS_MODULE,
},
};
static int __init rtl8366_smi_init(void)
{
int ret;
ret = phy_driver_register(&rtl8366_smi_phy_driver);
if (ret)
return ret;
ret = platform_driver_register(&rtl8366_smi_driver);
if (ret)
goto err_phy_unregister;
return 0;
err_phy_unregister:
phy_driver_unregister(&rtl8366_smi_phy_driver);
return ret;
}
module_init(rtl8366_smi_init);
static void __exit rtl8366_smi_exit(void)
{
platform_driver_unregister(&rtl8366_smi_driver);
phy_driver_unregister(&rtl8366_smi_phy_driver);
}
module_exit(rtl8366_smi_exit);
MODULE_DESCRIPTION(RTL8366_SMI_DRIVER_DESC);
MODULE_VERSION(RTL8366_SMI_DRIVER_VER);
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:" RTL8366_SMI_DRIVER_NAME);

View File

@@ -0,0 +1,24 @@
/*
* NXP 74HC153 - Dual 4-input multiplexer defines
*
* Copyright (C) 2010 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#ifndef _NXP_74HC153_H
#define _NXP_74HC153_H
#define NXP_74HC153_DRIVER_NAME "nxp-74hc153"
struct nxp_74hc153_platform_data {
unsigned gpio_base;
unsigned gpio_pin_s0;
unsigned gpio_pin_s1;
unsigned gpio_pin_1y;
unsigned gpio_pin_2y;
};
#endif /* _NXP_74HC153_H */

View File

@@ -14,8 +14,20 @@ $(IMGNAME)-$(2)-$(patsubst jffs2-%,jffs2,$(patsubst squashfs-%,squashfs,$(1)))
endef
VMLINUX:=$(IMGNAME)-vmlinux
UIMAGE:=$(IMGNAME)-uImage
fs_squash:=squashfs-only
fs_all:=all
fs_4k:=4k
fs_64k:=64k
fs_128k:=128k
ifeq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y)
fs_squash:=initramfs
fs_all:=initramfs
fs_4k:=initramfs
fs_64k:=initramfs
fs_128k:=initramfs
VMLINUX:=$(IMGNAME)-vmlinux-initramfs
UIMAGE:=$(IMGNAME)-uImage-initramfs
endif
define CompressLzma
@@ -53,8 +65,9 @@ define Image/BuildKernel
$(call CompressLzma,$(KDIR)/vmlinux,$(KDIR)/vmlinux.bin.lzma)
dd if=$(KDIR)/vmlinux.bin.lzma of=$(VMLINUX).lzma bs=65536 conv=sync
dd if=$(KDIR)/vmlinux.bin.gz of=$(VMLINUX).gz bs=65536 conv=sync
$(call MkImageGzip,$(KDIR)/vmlinux.bin.gz,$(IMGNAME)-uImage-gzip.bin)
$(call MkImageLzma,$(KDIR)/vmlinux.bin.lzma,$(IMGNAME)-uImage-lzma.bin)
$(call MkImageGzip,$(KDIR)/vmlinux.bin.gz,$(UIMAGE)-gzip.bin)
$(call MkImageLzma,$(KDIR)/vmlinux.bin.lzma,$(UIMAGE)-lzma.bin)
$(call Image/Build/Initramfs)
endef
define Image/Build/WRT400N
@@ -114,6 +127,28 @@ define Image/Build/DIR825B1
fi; fi
endef
define Image/Build/WZRHPG300NH
$(call PatchKernelLzma,$(2),$(3))
if [ `stat -c%s "$(KDIR)/vmlinux-$(2).bin.lzma"` -gt 1048576 ]; then \
echo "Warning: $(KDIR)/vmlinux-$(2).bin.lzma is too big"; \
else if [ `stat -c%s $(KDIR)/root.$(1)` -gt 31850496 ]; then \
echo "Warning: $(KDIR)/root.$(1) is too big"; \
else \
mkimage -A mips -O linux -T kernel -a 0x80060000 -C lzma -e \
0x80060000 \
-n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \
-d $(KDIR)/vmlinux-$(2).bin.lzma $(KDIR)/vmlinux-$(2).uImage; \
( \
dd if=$(KDIR)/vmlinux-$(2).uImage bs=1024k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=128k conv=sync; \
) > $(call imgname,$(1),$(2))-sysupgrade.bin; \
( \
echo -n -e "# Airstation Public Fmt1\x00\x00\x00\x00\x00\x00\x00\x00"; \
dd if=$(call imgname,$(1),$(2))-sysupgrade.bin; \
) > $(call imgname,$(1),$(2))-tftp.bin; \
fi; fi
endef
cameo_mtdlayout=mtdparts=spi0.0:128k(u-boot)ro,64k(config)ro,896k(kernel),2880k(rootfs),64k(art)ro,3776k@0x30000(firmware)
define Image/Build/Cameo
$(call PatchKernelLzma,$(2),$(3) $(cameo_mtdlayout))
@@ -250,6 +285,14 @@ define Image/Build/TPLINK
-o $(call imgname,$(1),$(2))-universal.bin
endef
define Image/Build/TPLINK/initramfs
$(call PatchKernelGzip,$(2),$(3))
-$(STAGING_DIR_HOST)/bin/mktplinkfw -c \
-B $(4) -N OpenWrt -V $(REVISION)\
-k $(KDIR)/vmlinux-$(2).bin.gz \
-o $(call imgname,$(1),$(2))-uImage.bin
endef
define Image/Build/CyberTAN
$(call PatchKernelGzip,$(2),$(3))
$(call MkImageGzip,$(KDIR)/vmlinux-$(2).bin.gz,$(KDIR)/vmlinux-$(2).uImage)
@@ -287,7 +330,7 @@ define Image/Build/WNDR3700
$(KDIR)/vmlinux-$(2).uImage.squashfs
-rm -f $(KDIR)/vmlinux-$(2).uImage.squashfs.tmp*
( \
dd if=$(KDIR)/vmlinux-$(2).uImage.squashfs bs=1M conv=sync; \
dd if=$(KDIR)/vmlinux-$(2).uImage.squashfs bs=1024k conv=sync; \
dd if=$(KDIR)/root.$(1) bs=64k; \
) > $(call imgname,$(1),$(2))-sysupgrade.bin
$(STAGING_DIR_HOST)/bin/mkdniimg \
@@ -296,6 +339,18 @@ define Image/Build/WNDR3700
-o $(call imgname,$(1),$(2))-factory.img
endef
define Image/Build/WNDR3700/initramfs
$(call PatchKernelLzma,$(2),$(3) $(wndr3700_mtdlayout))
$(call MkImageLzma,$(KDIR)/vmlinux-$(2).bin.lzma,$(KDIR)/vmlinux-$(2).uImage)
$(STAGING_DIR_HOST)/bin/wndr3700 \
$(KDIR)/vmlinux-$(2).uImage \
$(call imgname,$(1),$(2))-uImage.bin
endef
define Image/Build/Template/initramfs/initramfs
$(call Image/Build/$(1)/initramfs,initramfs,$(2),$(3),$(4),$(5),$(6),$(7))
endef
define Image/Build/Template/all/squashfs
$(call Image/Build/$(1),squashfs,$(2),$(3),$(4),$(5),$(6),$(7))
endef
@@ -312,6 +367,10 @@ define Image/Build/Template/squashfs-only/squashfs
$(call Image/Build/$(1),squashfs,$(2),$(3),$(4),$(5),$(6),$(7))
endef
define Image/Build/Template/4k/squashfs
$(call Image/Build/$(1),squashfs-4k,$(2),$(3),$(4),$(5),$(6),$(7))
endef
define Image/Build/Template/64k/squashfs
$(call Image/Build/$(1),squashfs,$(2),$(3),$(4),$(5),$(6),$(7))
endef
@@ -329,67 +388,67 @@ define Image/Build/Template/128k/jffs2-128k
endef
define Image/Build/Profile/AP81
$(call Image/Build/Template/64k/$(1),AP83,ap81,board=AP81)
$(call Image/Build/Template/$(fs_64k)/$(1),AP83,ap81,board=AP81)
endef
define Image/Build/Profile/AP83
$(call Image/Build/Template/64k/$(1),AP83,ap83,board=AP83)
$(call Image/Build/Template/$(fs_64k)/$(1),AP83,ap83,board=AP83)
endef
define Image/Build/Profile/PB42
$(call Image/Build/Template/64k/$(1),PB4X,pb42,board=PB42)
$(call Image/Build/Template/$(fs_64k)/$(1),PB4X,pb42,board=PB42)
endef
define Image/Build/Profile/PB44
$(call Image/Build/Template/64k/$(1),PB4X,pb44,board=PB44)
$(call Image/Build/Template/$(fs_64k)/$(1),PB4X,pb44,board=PB44)
endef
define Image/Build/Profile/WP543
$(call Image/Build/Template/64k/$(1),MyLoader,wp543)
$(call Image/Build/Template/$(fs_64k)/$(1),MyLoader,wp543)
endef
define Image/Build/Profile/DIR600A1
$(call Image/Build/Template/64k/$(1),DIR600A1,dir-600-a1,board=DIR-600-A1)
$(call Image/Build/Template/$(fs_64k)/$(1),DIR600A1,dir-600-a1,board=DIR-600-A1)
endef
define Image/Build/Profile/DIR615C1
$(call Image/Build/Template/squashfs-only/$(1),Cameo,dir-615-c1,board=DIR-615-C1,"AP81-AR9130-RT-070614-02")
$(call Image/Build/Template/$(fs_squash)/$(1),Cameo,dir-615-c1,board=DIR-615-C1,"AP81-AR9130-RT-070614-02")
endef
define Image/Build/Profile/TEW632BRP
$(call Image/Build/Template/squashfs-only/$(1),Cameo,tew-632brp,board=TEW-632BRP,"AP81-AR9130-RT-070614-00")
$(call Image/Build/Template/$(fs_squash)/$(1),Cameo,tew-632brp,board=TEW-632BRP,"AP81-AR9130-RT-070614-00")
endef
define Image/Build/Profile/TEW652BRP
$(call Image/Build/Template/squashfs-only/$(1),Cameo,tew-652brp,board=TEW-632BRP,"AP81-AR9130-RT-080609-05")
$(call Image/Build/Template/$(fs_squash)/$(1),Cameo,tew-652brp,board=TEW-632BRP,"AP81-AR9130-RT-080609-05")
endef
define Image/Build/Profile/A02RBW300N
$(call Image/Build/Template/squashfs-only/$(1),Cameo,a02-rb-w300n,board=TEW-632BRP,"AP81-AR9130-RT-070614-03")
$(call Image/Build/Template/$(fs_squash)/$(1),Cameo,a02-rb-w300n,board=TEW-632BRP,"AP81-AR9130-RT-070614-03")
endef
define Image/Build/Profile/UBNTRS
$(call Image/Build/Template/64k/$(1),UBNT,ubnt-rs,board=UBNT-RS,RS,RSx,ar7100)
$(call Image/Build/Template/$(fs_64k)/$(1),UBNT,ubnt-rs,board=UBNT-RS,RS,RSx,ar7100)
endef
define Image/Build/Profile/UBNTRSPRO
$(call Image/Build/Template/64k/$(1),UBNT,ubnt-rspro,board=UBNT-RSPRO,RSPRO,RSPRO,ar7100pro)
$(call Image/Build/Template/$(fs_64k)/$(1),UBNT,ubnt-rspro,board=UBNT-RSPRO,RSPRO,RSPRO,ar7100pro)
endef
define Image/Build/Profile/UBNTLSSR71
$(call Image/Build/Template/64k/$(1),UBNT,ubnt-ls-sr71,board=UBNT-LS-SR71,LS-SR71,LS-SR71,ar7100)
$(call Image/Build/Template/$(fs_64k)/$(1),UBNT,ubnt-ls-sr71,board=UBNT-LS-SR71,LS-SR71,LS-SR71,ar7100)
endef
define Image/Build/Profile/UBNTBULLETM
$(call Image/Build/Template/64k/$(1),UBNTXM,ubnt-bullet-m,board=UBNT-BM,XM,UBNTXM,ar7240)
$(call Image/Build/Template/$(fs_64k)/$(1),UBNTXM,ubnt-bullet-m,board=UBNT-BM,XM,UBNTXM,ar7240)
endef
define Image/Build/Profile/UBNTROCKETM
$(call Image/Build/Template/64k/$(1),UBNTXM,ubnt-rocket-m,board=UBNT-RM,XM,UBNTXM,ar7240)
$(call Image/Build/Template/$(fs_64k)/$(1),UBNTXM,ubnt-rocket-m,board=UBNT-RM,XM,UBNTXM,ar7240)
endef
define Image/Build/Profile/UBNTNANOM
$(call Image/Build/Template/64k/$(1),UBNTXM,ubnt-nano-m,board=UBNT-NM,XM,UBNTXM,ar7240)
$(call Image/Build/Template/$(fs_64k)/$(1),UBNTXM,ubnt-nano-m,board=UBNT-NM,XM,UBNTXM,ar7240)
endef
define Image/Build/Profile/UBNT
@@ -402,51 +461,55 @@ define Image/Build/Profile/UBNT
endef
define Image/Build/Profile/MZKW04NU
$(call Image/Build/Template/64k/$(1),Planex,mzk-w04nu,board=MZK-W04NU)
$(call Image/Build/Template/$(fs_64k)/$(1),Planex,mzk-w04nu,board=MZK-W04NU)
endef
define Image/Build/Profile/MZKW300NH
$(call Image/Build/Template/64k/$(1),Planex,mzk-w300nh,board=MZK-W300NH)
$(call Image/Build/Template/$(fs_64k)/$(1),Planex,mzk-w300nh,board=MZK-W300NH)
endef
define Image/Build/Profile/TLWR741NDV1
$(call Image/Build/Template/squashfs-only/$(1),TPLINK4K,tl-wr741nd-v1,board=TL-WR741ND,TL-WR741NDv1)
$(call Image/Build/Template/$(fs_4k)/$(1),TPLINK,tl-wr741nd-v1,board=TL-WR741ND,TL-WR741NDv1)
endef
define Image/Build/Profile/TLWR841NV15
$(call Image/Build/Template/squashfs-only/$(1),TPLINK,tl-wr841n-v1.5,board=TL-WR841N-v1.5,TL-WR841Nv1.5)
$(call Image/Build/Template/$(fs_squash)/$(1),TPLINK,tl-wr841n-v1.5,board=TL-WR841N-v1.5,TL-WR841Nv1.5)
endef
define Image/Build/Profile/TLWR841NDV3
$(call Image/Build/Template/squashfs-only/$(1),TPLINK,tl-wr841nd-v3,board=TL-WR941ND,TL-WR841NDv3)
$(call Image/Build/Template/$(fs_squash)/$(1),TPLINK,tl-wr841nd-v3,board=TL-WR941ND,TL-WR841NDv3)
endef
define Image/Build/Profile/TLWR841NDV5
$(call Image/Build/Template/squashfs-only/$(1),TPLINK4K,tl-wr841nd-v5,board=TL-WR741ND,TL-WR841NDv5)
$(call Image/Build/Template/$(fs_4k)/$(1),TPLINK,tl-wr841nd-v5,board=TL-WR741ND,TL-WR841NDv5)
endef
define Image/Build/Profile/TLWR941NDV2
$(call Image/Build/Template/squashfs-only/$(1),TPLINK,tl-wr941nd-v2,board=TL-WR941ND,TL-WR941NDv2)
$(call Image/Build/Template/$(fs_squash)/$(1),TPLINK,tl-wr941nd-v2,board=TL-WR941ND,TL-WR941NDv2)
endef
define Image/Build/Profile/TLWR1043NDV1
$(call Image/Build/Template/squashfs-only/$(1),TPLINK,tl-wr1043nd-v1,board=TL-WR1043ND,TL-WR1043NDv1)
$(call Image/Build/Template/$(fs_squash)/$(1),TPLINK,tl-wr1043nd-v1,board=TL-WR1043ND,TL-WR1043NDv1)
endef
define Image/Build/Profile/WNDR3700
$(call Image/Build/Template/64k/$(1),WNDR3700,wndr3700,board=WNDR3700)
$(call Image/Build/Template/$(fs_64k)/$(1),WNDR3700,wndr3700,board=WNDR3700)
endef
define Image/Build/Profile/WRT400N
$(call Image/Build/Template/64k/$(1),WRT400N,wrt400n,board=WRT400N)
$(call Image/Build/Template/$(fs_64k)/$(1),WRT400N,wrt400n,board=WRT400N)
endef
define Image/Build/Profile/DIR825B1
$(call Image/Build/Template/64k/$(1),DIR825B1,dir-825-b1,board=DIR-825-B1)
$(call Image/Build/Template/$(fs_64k)/$(1),DIR825B1,dir-825-b1,board=DIR-825-B1)
endef
define Image/Build/Profile/WRT160NL
$(call Image/Build/Template/64k/$(1),CyberTAN,wrt160nl,board=WRT160NL,1.00.01)
$(call Image/Build/Template/$(fs_64k)/$(1),CyberTAN,wrt160nl,board=WRT160NL,1.00.01)
endef
define Image/Build/Profile/WZRHPG300NH
$(call Image/Build/Template/$(fs_128k)/$(1),WZRHPG300NH,wzr-hp-g300nh,board=WZR-HP-G300NH)
endef
define Image/Build/Profile/Default
@@ -473,6 +536,7 @@ define Image/Build/Profile/Default
$(call Image/Build/Profile/WNDR3700,$(1))
$(call Image/Build/Profile/WRT400N,$(1))
$(call Image/Build/Profile/WRT160NL,$(1))
$(call Image/Build/Profile/WZRHPG300NH,$(1))
endef
define Image/Build/Profile/Madwifi
@@ -491,6 +555,10 @@ define Image/Build/squashfs
rm -f $(KDIR)/root.squashfs-4k.tmp0
endef
define Image/Build/Initramfs
$(call Image/Build/Profile/$(PROFILE),initramfs)
endef
define Image/Build
$(call Image/Build/$(1))
dd if=$(KDIR)/root.$(1) of=$(IMGNAME)-root.$(1) bs=128k conv=sync

View File

@@ -14,9 +14,9 @@
depends on PHYLIB=y
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_REALTEK_PHY) += realtek.o
obj-$(CONFIG_AR8216_PHY) += ar8216.o
obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
@@ -22,6 +22,7 @@ obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o
obj-$(CONFIG_RTL8366S_PHY) += rtl8366s.o
obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
+obj-$(CONFIG_MICREL) += micrel.o
obj-$(CONFIG_FIXED_PHY) += fixed.o

View File

@@ -1,20 +0,0 @@
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -1579,7 +1579,7 @@ static int __xipram do_erase_chip(struct
chip->erase_suspended = 0;
}
- if (chip_ready(map, adr))
+ if (chip_good(map, adr, map_word_ff(map)))
break;
if (time_after(jiffies, timeo)) {
@@ -1667,7 +1667,7 @@ static int __xipram do_erase_oneblock(st
chip->erase_suspended = 0;
}
- if (chip_ready(map, adr)) {
+ if (chip_good(map, adr, map_word_ff(map))) {
xip_enable(map, chip, adr);
break;
}

View File

@@ -0,0 +1,69 @@
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -1152,8 +1152,8 @@ static int __xipram do_write_oneword(str
break;
}
- if (chip_ready(map, adr))
- break;
+ if (chip_good(map, adr, datum))
+ goto enable_xip;
/* Latency issues. Drop the lock, wait a while and retry */
UDELAY(map, chip, adr, 1);
@@ -1169,6 +1169,8 @@ static int __xipram do_write_oneword(str
ret = -EIO;
}
+
+ enable_xip:
xip_enable(map, chip, adr);
op_done:
chip->state = FL_READY;
@@ -1515,7 +1517,6 @@ static int cfi_amdstd_write_buffers(stru
return 0;
}
-
/*
* Handle devices with one erase region, that only implement
* the chip erase command.
@@ -1579,8 +1580,8 @@ static int __xipram do_erase_chip(struct
chip->erase_suspended = 0;
}
- if (chip_ready(map, adr))
- break;
+ if (chip_good(map, adr, map_word_ff(map)))
+ goto op_done;
if (time_after(jiffies, timeo)) {
printk(KERN_WARNING "MTD %s(): software timeout\n",
@@ -1600,6 +1601,7 @@ static int __xipram do_erase_chip(struct
ret = -EIO;
}
+ op_done:
chip->state = FL_READY;
xip_enable(map, chip, adr);
put_chip(map, chip, adr);
@@ -1667,9 +1669,9 @@ static int __xipram do_erase_oneblock(st
chip->erase_suspended = 0;
}
- if (chip_ready(map, adr)) {
+ if (chip_good(map, adr, map_word_ff(map))) {
xip_enable(map, chip, adr);
- break;
+ goto op_done;
}
if (time_after(jiffies, timeo)) {
@@ -1691,6 +1693,7 @@ static int __xipram do_erase_oneblock(st
ret = -EIO;
}
+ op_done:
chip->state = FL_READY;
put_chip(map, chip, adr);
spin_unlock(chip->mutex);

View File

@@ -0,0 +1,61 @@
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -39,7 +39,7 @@
#include <linux/mtd/xip.h>
#define AMD_BOOTLOC_BUG
-#define FORCE_WORD_WRITE 0
+#define FORCE_WORD_WRITE 1
#define MAX_WORD_RETRIES 3
@@ -55,7 +55,9 @@
static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+#if !FORCE_WORD_WRITE
static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+#endif
static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *);
static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *);
static void cfi_amdstd_sync (struct mtd_info *);
@@ -190,6 +192,7 @@ static void fixup_amd_bootblock(struct m
}
#endif
+#if !FORCE_WORD_WRITE
static void fixup_use_write_buffers(struct mtd_info *mtd, void *param)
{
struct map_info *map = mtd->priv;
@@ -199,6 +202,7 @@ static void fixup_use_write_buffers(stru
mtd->write = cfi_amdstd_write_buffers;
}
}
+#endif /* !FORCE_WORD_WRITE */
/* Atmel chips don't use the same PRI format as AMD chips */
static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
@@ -1326,6 +1330,7 @@ static int cfi_amdstd_write_words(struct
/*
* FIXME: interleaved mode not tested, and probably not supported!
*/
+#if !FORCE_WORD_WRITE
static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
unsigned long adr, const u_char *buf,
int len)
@@ -1437,7 +1442,6 @@ static int __xipram do_write_buffer(stru
return ret;
}
-
static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len,
size_t *retlen, const u_char *buf)
{
@@ -1516,6 +1520,7 @@ static int cfi_amdstd_write_buffers(stru
return 0;
}
+#endif /* !FORCE_WORD_WRITE */
/*
* Handle devices with one erase region, that only implement

View File

@@ -1,21 +0,0 @@
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -140,4 +140,8 @@ config MDIO_GPIO
To compile this driver as a module, choose M here: the module
will be called mdio-gpio.
+config RTL8366_SMI
+ tristate "Support for RTL8366 switch via SMI interface"
+ depends on GENERIC_GPIO
+
endif # PHYLIB
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_IP175C_PHY) += ip175c.o
obj-$(CONFIG_REALTEK_PHY) += realtek.o
obj-$(CONFIG_AR8216_PHY) += ar8216.o
obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
+obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o
obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
obj-$(CONFIG_MICREL) += micrel.o
obj-$(CONFIG_FIXED_PHY) += fixed.o

View File

@@ -0,0 +1,25 @@
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -176,4 +176,12 @@ config GPIO_MCP23S08
SPI driver for Microchip MCP23S08 I/O expander. This provides
a GPIO interface supporting inputs and outputs.
+comment "Other GPIO expanders"
+
+config GPIO_NXP_74HC153
+ tristate "NXP 74HC153 Dual 4-input multiplexer"
+ help
+ Platform driver for NXP 74HC153 Dual 4-input Multiplexer. This
+ provides a GPIO interface supporting inputs.
+
endif
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_GPIOLIB) += gpiolib.o
obj-$(CONFIG_GPIO_MAX7301) += max7301.o
obj-$(CONFIG_GPIO_MAX732X) += max732x.o
obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o
+obj-$(CONFIG_GPIO_NXP_74HC153) += nxp_74hc153.o
obj-$(CONFIG_GPIO_PCA953X) += pca953x.o
obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o
obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o

View File

@@ -86,9 +86,9 @@
+}
+
+core_initcall(mips_machtype_init);
--- a/include/asm-mips/mips_machine.h
+++ b/include/asm-mips/mips_machine.h
@@ -13,24 +13,32 @@
--- a/arch/mips/include/asm/mips_machine.h
+++ b/arch/mips/include/asm/mips_machine.h
@@ -13,25 +13,33 @@
#include <linux/init.h>
#include <linux/list.h>
@@ -113,16 +113,22 @@
-#define MIPS_MACHINE(_type, _name, _setup) \
-static char machine_name_##_type[] __initdata = _name; \
-static struct mips_machine machine_##_type __initdata = \
+#define MIPS_MACHINE(_type, _id, _name, _setup) \
+static char machine_name_##_type[] __initconst \
+static const char machine_name_##_type[] __initconst \
+ __aligned(1) = _name; \
+static char machine_id_##_type[] __initconst \
+static const char machine_id_##_type[] __initconst \
+ __aligned(1) = _id; \
+static struct mips_machine machine_##_type __initconst = \
static struct mips_machine machine_##_type __initdata = \
{ \
.mach_type = _type, \
+ .mach_id = machine_id_##_type, \
.mach_name = machine_name_##_type, \
- .mach_name = machine_name_##_type, \
+ .mach_id = (char *) machine_id_##_type, \
+ .mach_name = (char *) machine_name_##_type, \
.mach_setup = _setup, \
}; \
\
@@ -44,4 +52,3 @@ static int __init register_machine_##_ty
pure_initcall(register_machine_##_type)
#endif /* __ASM_MIPS_MACHINE_H */
-

View File

@@ -14,9 +14,9 @@
depends on PHYLIB=y
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_REALTEK_PHY) += realtek.o
obj-$(CONFIG_AR8216_PHY) += ar8216.o
obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
@@ -22,6 +22,7 @@ obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o
obj-$(CONFIG_RTL8366S_PHY) += rtl8366s.o
obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
+obj-$(CONFIG_MICREL) += micrel.o
obj-$(CONFIG_FIXED_PHY) += fixed.o

View File

@@ -0,0 +1,69 @@
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -1141,8 +1141,8 @@ static int __xipram do_write_oneword(str
break;
}
- if (chip_ready(map, adr))
- break;
+ if (chip_good(map, adr, datum))
+ goto enable_xip;
/* Latency issues. Drop the lock, wait a while and retry */
UDELAY(map, chip, adr, 1);
@@ -1158,6 +1158,8 @@ static int __xipram do_write_oneword(str
ret = -EIO;
}
+
+ enable_xip:
xip_enable(map, chip, adr);
op_done:
chip->state = FL_READY;
@@ -1504,7 +1506,6 @@ static int cfi_amdstd_write_buffers(stru
return 0;
}
-
/*
* Handle devices with one erase region, that only implement
* the chip erase command.
@@ -1568,8 +1569,8 @@ static int __xipram do_erase_chip(struct
chip->erase_suspended = 0;
}
- if (chip_ready(map, adr))
- break;
+ if (chip_good(map, adr, map_word_ff(map)))
+ goto op_done;
if (time_after(jiffies, timeo)) {
printk(KERN_WARNING "MTD %s(): software timeout\n",
@@ -1589,6 +1590,7 @@ static int __xipram do_erase_chip(struct
ret = -EIO;
}
+ op_done:
chip->state = FL_READY;
xip_enable(map, chip, adr);
put_chip(map, chip, adr);
@@ -1656,9 +1658,9 @@ static int __xipram do_erase_oneblock(st
chip->erase_suspended = 0;
}
- if (chip_ready(map, adr)) {
+ if (chip_good(map, adr, map_word_ff(map))) {
xip_enable(map, chip, adr);
- break;
+ goto op_done;
}
if (time_after(jiffies, timeo)) {
@@ -1680,6 +1682,7 @@ static int __xipram do_erase_oneblock(st
ret = -EIO;
}
+ op_done:
chip->state = FL_READY;
put_chip(map, chip, adr);
spin_unlock(chip->mutex);

View File

@@ -0,0 +1,61 @@
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -39,7 +39,7 @@
#include <linux/mtd/xip.h>
#define AMD_BOOTLOC_BUG
-#define FORCE_WORD_WRITE 0
+#define FORCE_WORD_WRITE 1
#define MAX_WORD_RETRIES 3
@@ -55,7 +55,9 @@
static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+#if !FORCE_WORD_WRITE
static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+#endif
static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *);
static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *);
static void cfi_amdstd_sync (struct mtd_info *);
@@ -190,6 +192,7 @@ static void fixup_amd_bootblock(struct m
}
#endif
+#if !FORCE_WORD_WRITE
static void fixup_use_write_buffers(struct mtd_info *mtd, void *param)
{
struct map_info *map = mtd->priv;
@@ -199,6 +202,7 @@ static void fixup_use_write_buffers(stru
mtd->write = cfi_amdstd_write_buffers;
}
}
+#endif /* !FORCE_WORD_WRITE */
/* Atmel chips don't use the same PRI format as AMD chips */
static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
@@ -1315,6 +1319,7 @@ static int cfi_amdstd_write_words(struct
/*
* FIXME: interleaved mode not tested, and probably not supported!
*/
+#if !FORCE_WORD_WRITE
static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
unsigned long adr, const u_char *buf,
int len)
@@ -1426,7 +1431,6 @@ static int __xipram do_write_buffer(stru
return ret;
}
-
static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len,
size_t *retlen, const u_char *buf)
{
@@ -1505,6 +1509,7 @@ static int cfi_amdstd_write_buffers(stru
return 0;
}
+#endif /* !FORCE_WORD_WRITE */
/*
* Handle devices with one erase region, that only implement

View File

@@ -1,21 +0,0 @@
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -140,4 +140,8 @@ config MDIO_GPIO
To compile this driver as a module, choose M here: the module
will be called mdio-gpio.
+config RTL8366_SMI
+ tristate "Support for RTL8366 switch via SMI interface"
+ depends on GENERIC_GPIO
+
endif # PHYLIB
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -19,6 +19,7 @@ obj-$(CONFIG_IP175C_PHY) += ip175c.o
obj-$(CONFIG_REALTEK_PHY) += realtek.o
obj-$(CONFIG_AR8216_PHY) += ar8216.o
obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
+obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o
obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
obj-$(CONFIG_MICREL) += micrel.o
obj-$(CONFIG_FIXED_PHY) += fixed.o

View File

@@ -0,0 +1,25 @@
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -188,4 +188,12 @@ config GPIO_MCP23S08
SPI driver for Microchip MCP23S08 I/O expander. This provides
a GPIO interface supporting inputs and outputs.
+comment "Other GPIO expanders"
+
+config GPIO_NXP_74HC153
+ tristate "NXP 74HC153 Dual 4-input multiplexer"
+ help
+ Platform driver for NXP 74HC153 Dual 4-input Multiplexer. This
+ provides a GPIO interface supporting inputs.
+
endif
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -7,6 +7,7 @@ obj-$(CONFIG_GPIOLIB) += gpiolib.o
obj-$(CONFIG_GPIO_MAX7301) += max7301.o
obj-$(CONFIG_GPIO_MAX732X) += max732x.o
obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o
+obj-$(CONFIG_GPIO_NXP_74HC153) += nxp_74hc153.o
obj-$(CONFIG_GPIO_PCA953X) += pca953x.o
obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o
obj-$(CONFIG_GPIO_PL061) += pl061.o

View File

@@ -86,9 +86,9 @@
+}
+
+core_initcall(mips_machtype_init);
--- a/include/asm-mips/mips_machine.h
+++ b/include/asm-mips/mips_machine.h
@@ -13,24 +13,32 @@
--- a/arch/mips/include/asm/mips_machine.h
+++ b/arch/mips/include/asm/mips_machine.h
@@ -13,25 +13,33 @@
#include <linux/init.h>
#include <linux/list.h>
@@ -113,16 +113,22 @@
-#define MIPS_MACHINE(_type, _name, _setup) \
-static char machine_name_##_type[] __initdata = _name; \
-static struct mips_machine machine_##_type __initdata = \
+#define MIPS_MACHINE(_type, _id, _name, _setup) \
+static char machine_name_##_type[] __initconst \
+static const char machine_name_##_type[] __initconst \
+ __aligned(1) = _name; \
+static char machine_id_##_type[] __initconst \
+static const char machine_id_##_type[] __initconst \
+ __aligned(1) = _id; \
+static struct mips_machine machine_##_type __initconst = \
static struct mips_machine machine_##_type __initdata = \
{ \
.mach_type = _type, \
+ .mach_id = machine_id_##_type, \
.mach_name = machine_name_##_type, \
- .mach_name = machine_name_##_type, \
+ .mach_id = (char *) machine_id_##_type, \
+ .mach_name = (char *) machine_name_##_type, \
.mach_setup = _setup, \
}; \
\
@@ -44,4 +52,3 @@ static int __init register_machine_##_ty
pure_initcall(register_machine_##_type)
#endif /* __ASM_MIPS_MACHINE_H */
-

View File

@@ -30,7 +30,7 @@
depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx)
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1140,6 +1140,11 @@ MODULE_LICENSE ("GPL");
@@ -1141,6 +1141,11 @@ MODULE_LICENSE ("GPL");
#define PLATFORM_DRIVER ehci_atmel_driver
#endif

View File

@@ -14,9 +14,9 @@
depends on PHYLIB=y
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -21,6 +21,7 @@ obj-$(CONFIG_REALTEK_PHY) += realtek.o
obj-$(CONFIG_AR8216_PHY) += ar8216.o
obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
@@ -23,6 +23,7 @@ obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o
obj-$(CONFIG_RTL8366S_PHY) += rtl8366s.o
obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
+obj-$(CONFIG_MICREL) += micrel.o
obj-$(CONFIG_FIXED_PHY) += fixed.o

View File

@@ -1,20 +0,0 @@
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -1568,7 +1568,7 @@ static int __xipram do_erase_chip(struct
chip->erase_suspended = 0;
}
- if (chip_ready(map, adr))
+ if (chip_good(map, adr, map_word_ff(map)))
break;
if (time_after(jiffies, timeo)) {
@@ -1656,7 +1656,7 @@ static int __xipram do_erase_oneblock(st
chip->erase_suspended = 0;
}
- if (chip_ready(map, adr)) {
+ if (chip_good(map, adr, map_word_ff(map))) {
xip_enable(map, chip, adr);
break;
}

View File

@@ -0,0 +1,69 @@
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -1141,8 +1141,8 @@ static int __xipram do_write_oneword(str
break;
}
- if (chip_ready(map, adr))
- break;
+ if (chip_good(map, adr, datum))
+ goto enable_xip;
/* Latency issues. Drop the lock, wait a while and retry */
UDELAY(map, chip, adr, 1);
@@ -1158,6 +1158,8 @@ static int __xipram do_write_oneword(str
ret = -EIO;
}
+
+ enable_xip:
xip_enable(map, chip, adr);
op_done:
chip->state = FL_READY;
@@ -1504,7 +1506,6 @@ static int cfi_amdstd_write_buffers(stru
return 0;
}
-
/*
* Handle devices with one erase region, that only implement
* the chip erase command.
@@ -1568,8 +1569,8 @@ static int __xipram do_erase_chip(struct
chip->erase_suspended = 0;
}
- if (chip_ready(map, adr))
- break;
+ if (chip_good(map, adr, map_word_ff(map)))
+ goto op_done;
if (time_after(jiffies, timeo)) {
printk(KERN_WARNING "MTD %s(): software timeout\n",
@@ -1589,6 +1590,7 @@ static int __xipram do_erase_chip(struct
ret = -EIO;
}
+ op_done:
chip->state = FL_READY;
xip_enable(map, chip, adr);
put_chip(map, chip, adr);
@@ -1656,9 +1658,9 @@ static int __xipram do_erase_oneblock(st
chip->erase_suspended = 0;
}
- if (chip_ready(map, adr)) {
+ if (chip_good(map, adr, map_word_ff(map))) {
xip_enable(map, chip, adr);
- break;
+ goto op_done;
}
if (time_after(jiffies, timeo)) {
@@ -1680,6 +1682,7 @@ static int __xipram do_erase_oneblock(st
ret = -EIO;
}
+ op_done:
chip->state = FL_READY;
put_chip(map, chip, adr);
spin_unlock(chip->mutex);

View File

@@ -1,6 +1,6 @@
--- a/drivers/usb/host/ehci-q.c
+++ b/drivers/usb/host/ehci-q.c
@@ -1167,6 +1167,9 @@ static void end_unlink_async (struct ehc
@@ -1172,6 +1172,9 @@ static void end_unlink_async (struct ehc
ehci->reclaim = NULL;
start_unlink_async (ehci, next);
}

View File

@@ -0,0 +1,61 @@
--- a/drivers/mtd/chips/cfi_cmdset_0002.c
+++ b/drivers/mtd/chips/cfi_cmdset_0002.c
@@ -39,7 +39,7 @@
#include <linux/mtd/xip.h>
#define AMD_BOOTLOC_BUG
-#define FORCE_WORD_WRITE 0
+#define FORCE_WORD_WRITE 1
#define MAX_WORD_RETRIES 3
@@ -55,7 +55,9 @@
static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *);
static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+#if !FORCE_WORD_WRITE
static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *);
+#endif
static int cfi_amdstd_erase_chip(struct mtd_info *, struct erase_info *);
static int cfi_amdstd_erase_varsize(struct mtd_info *, struct erase_info *);
static void cfi_amdstd_sync (struct mtd_info *);
@@ -190,6 +192,7 @@ static void fixup_amd_bootblock(struct m
}
#endif
+#if !FORCE_WORD_WRITE
static void fixup_use_write_buffers(struct mtd_info *mtd, void *param)
{
struct map_info *map = mtd->priv;
@@ -199,6 +202,7 @@ static void fixup_use_write_buffers(stru
mtd->write = cfi_amdstd_write_buffers;
}
}
+#endif /* !FORCE_WORD_WRITE */
/* Atmel chips don't use the same PRI format as AMD chips */
static void fixup_convert_atmel_pri(struct mtd_info *mtd, void *param)
@@ -1315,6 +1319,7 @@ static int cfi_amdstd_write_words(struct
/*
* FIXME: interleaved mode not tested, and probably not supported!
*/
+#if !FORCE_WORD_WRITE
static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
unsigned long adr, const u_char *buf,
int len)
@@ -1426,7 +1431,6 @@ static int __xipram do_write_buffer(stru
return ret;
}
-
static int cfi_amdstd_write_buffers(struct mtd_info *mtd, loff_t to, size_t len,
size_t *retlen, const u_char *buf)
{
@@ -1505,6 +1509,7 @@ static int cfi_amdstd_write_buffers(stru
return 0;
}
+#endif /* !FORCE_WORD_WRITE */
/*
* Handle devices with one erase region, that only implement

View File

@@ -1,21 +0,0 @@
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -146,4 +146,8 @@ config MDIO_GPIO
To compile this driver as a module, choose M here: the module
will be called mdio-gpio.
+config RTL8366_SMI
+ tristate "Support for RTL8366 switch via SMI interface"
+ depends on GENERIC_GPIO
+
endif # PHYLIB
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -20,6 +20,7 @@ obj-$(CONFIG_IP175C_PHY) += ip175c.o
obj-$(CONFIG_REALTEK_PHY) += realtek.o
obj-$(CONFIG_AR8216_PHY) += ar8216.o
obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
+obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o
obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
obj-$(CONFIG_MICREL) += micrel.o
obj-$(CONFIG_FIXED_PHY) += fixed.o

View File

@@ -0,0 +1,25 @@
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -230,4 +230,12 @@ config GPIO_UCB1400
To compile this driver as a module, choose M here: the
module will be called ucb1400_gpio.
+comment "Other GPIO expanders"
+
+config GPIO_NXP_74HC153
+ tristate "NXP 74HC153 Dual 4-input multiplexer"
+ help
+ Platform driver for NXP 74HC153 Dual 4-input Multiplexer. This
+ provides a GPIO interface supporting inputs.
+
endif
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -10,6 +10,7 @@ obj-$(CONFIG_GPIO_MAX7301) += max7301.o
obj-$(CONFIG_GPIO_MAX732X) += max732x.o
obj-$(CONFIG_GPIO_MC33880) += mc33880.o
obj-$(CONFIG_GPIO_MCP23S08) += mcp23s08.o
+obj-$(CONFIG_GPIO_NXP_74HC153) += nxp_74hc153.o
obj-$(CONFIG_GPIO_PCA953X) += pca953x.o
obj-$(CONFIG_GPIO_PCF857X) += pcf857x.o
obj-$(CONFIG_GPIO_PL061) += pl061.o

View File

@@ -86,9 +86,9 @@
+}
+
+core_initcall(mips_machtype_init);
--- a/include/asm-mips/mips_machine.h
+++ b/include/asm-mips/mips_machine.h
@@ -13,24 +13,32 @@
--- a/arch/mips/include/asm/mips_machine.h
+++ b/arch/mips/include/asm/mips_machine.h
@@ -13,25 +13,33 @@
#include <linux/init.h>
#include <linux/list.h>
@@ -113,16 +113,22 @@
-#define MIPS_MACHINE(_type, _name, _setup) \
-static char machine_name_##_type[] __initdata = _name; \
-static struct mips_machine machine_##_type __initdata = \
+#define MIPS_MACHINE(_type, _id, _name, _setup) \
+static char machine_name_##_type[] __initconst \
+static const char machine_name_##_type[] __initconst \
+ __aligned(1) = _name; \
+static char machine_id_##_type[] __initconst \
+static const char machine_id_##_type[] __initconst \
+ __aligned(1) = _id; \
+static struct mips_machine machine_##_type __initconst = \
static struct mips_machine machine_##_type __initdata = \
{ \
.mach_type = _type, \
+ .mach_id = machine_id_##_type, \
.mach_name = machine_name_##_type, \
- .mach_name = machine_name_##_type, \
+ .mach_id = (char *) machine_id_##_type, \
+ .mach_name = (char *) machine_name_##_type, \
.mach_setup = _setup, \
}; \
\
@@ -44,4 +52,3 @@ static int __init register_machine_##_ty
pure_initcall(register_machine_##_type)
#endif /* __ASM_MIPS_MACHINE_H */
-

View File

@@ -0,0 +1,17 @@
#
# Copyright (C) 2009 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/WZRHPG300NH
NAME:=Buffalo WZR-HP-G300NH
PACKAGES:=kmod-ath9k hostapd-mini kmod-usb-core kmod-usb2
endef
define Profile/WZRHPG300NH/Description
Package set optimized for the Buffalo WZR-HP-G300NH
endef
$(eval $(call Profile,WZRHPG300NH))

View File

@@ -31,7 +31,7 @@ $(eval $(call Profile,DIR615C1))
define Profile/DIR825B1
NAME:=D-Link DIR-825 rev. B1
PACKAGES:=kmod-ath9k hostapd-mini
PACKAGES:=kmod-ath9k hostapd-mini kmod-usb-core kmod-usb2
endef
define Profile/DIR825B1/Description

View File

@@ -7,7 +7,7 @@
define Profile/WRT160NL
NAME:=Linksys WRT160NL
PACKAGES:=kmod-ath9k hostapd-mini kmod-usb-core kmod-usb-ohci kmod-usb2 swconfig
PACKAGES:=kmod-ath9k hostapd-mini kmod-usb-core kmod-usb2 swconfig
endef
define Profile/WRT160NL/Description

View File

@@ -7,7 +7,7 @@
define Profile/WNDR3700
NAME:=NETGEAR WNDR3700
PACKAGES:=kmod-ath9k hostapd-mini kmod-usb-core kmod-usb-ohci kmod-usb2
PACKAGES:=kmod-ath9k hostapd-mini kmod-usb-core kmod-usb2
endef
define Profile/WNDR3700/Description

View File

@@ -7,7 +7,7 @@
define Profile/MZKW04NU
NAME:=Planex MZK-W04NU
PACKAGES:=kmod-ath9k hostapd-mini kmod-usb-core kmod-usb-ohci kmod-usb2
PACKAGES:=kmod-ath9k hostapd-mini kmod-usb-core kmod-usb2
endef
define Profile/MZKW04NU/Description

View File

@@ -15,7 +15,7 @@ LINUX_VERSION:=2.6.30.10
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += hostapd-mini kmod-madwifi gpioctl swconfig
DEFAULT_PACKAGES += wpad-mini kmod-madwifi gpioctl swconfig
define Target/Description
Build firmware images for Atheros SoC boards

View File

@@ -1,21 +0,0 @@
# reset button only supported on ar5315+ at the moment
grep 'Atheros AR231[567]' /proc/cpuinfo > /dev/null && {
if [ -e "/sys/bus/mdio_bus/drivers/Infineon ADM6996/0:00" -o \
-e "/sys/bus/mdio_bus/drivers/Marvell 88E6060/0:10" ]; then
vconfig set_name_type DEV_PLUS_VID_NO_PAD
ifconfig eth0 up
vconfig add eth0 1
ifname=eth0.1
else
ifname=eth0
fi
failsafe_ip
netmsg 192.168.1.255 "Press reset now, to enter Failsafe!"
sleep 2
if [ -z "$FAILSAFE" -a \
\( -e "/sys/bus/mdio_bus/drivers/Infineon ADM6996/0:00" -o \
-e "/sys/bus/mdio_bus/drivers/Marvell 88E6060/0:10" \) ]; then
vconfig rem eth0.1
ifconfig eth0 down
fi
}

View File

@@ -2,6 +2,7 @@
if [ -e "/sys/bus/mdio_bus/drivers/IC+ IP175C/0:00" -a -x /sbin/swconfig ]; then
uci batch <<EOF
set network.eth0=switch
set network.eth0.name=eth0
set network.eth0.reset=1
set network.eth0.enable_vlan=1
set network.eth0_1=switch_vlan

View File

@@ -0,0 +1,32 @@
#!/bin/sh
# reset button only supported on ar5315+ at the moment
preinit_ip() {
if [ -z "$pi_ifname" ]; then
grep 'Atheros AR231[567]' /proc/cpuinfo > /dev/null && {
if [ -e "/sys/bus/mdio_bus/drivers/Infineon ADM6996/0:00" -o \
-e "/sys/bus/mdio_bus/drivers/Marvell 88E6060/0:10" ]; then
vconfig set_name_type DEV_PLUS_VID_NO_PAD
ifconfig eth0 up
vconfig add eth0 1
ifname=eth0.1
else
ifname=eth0
fi
pi_ifname=$ifname
}
[ -n "$pi_ifname" ] && grep "$pi_ifname" /proc/net/dev >/dev/null && {
ifconfig $pi_ifname $pi_ip netmask $pi_netmask broadcast $pi_broadcast up
}
}
# reset button only supported on ar5315+ at the moment
preinit_ip_deconfig() {
if [ -e "/sys/bus/mdio_bus/drivers/Infineon ADM6996/0:00" -o \
-e "/sys/bus/mdio_bus/drivers/Marvell 88E6060/0:10" ]; then
vconfig rem eth0.1 2>/dev/null
ifconfig $pi_ifname down
fi
}

View File

@@ -15,7 +15,7 @@ SUBTARGETS=au1500 au1550
LINUX_VERSION:=2.6.30.10
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += hostapd-mini yamonenv
DEFAULT_PACKAGES += wpad-mini yamonenv
define Target/Description
Build firmware for RMI/AMD Alchemy 1500,1550 boards

View File

@@ -207,6 +207,12 @@ start() {
c["vlan0ports"] = "0 1 2 3 4 5u"
c["vlan1ports"] = ""
}
if (model == "OvisLink WL-1600GL") {
c["lan_ifname"] = "eth0.0"
c["wan_ifname"] = "eth0.1"
c["vlan0ports"] = "0 1 2 3 5*"
c["vlan1ports"] = "4 5"
}
if (c["vlan0ports"] || c["vlan1ports"]) {
print "#### VLAN configuration "

View File

@@ -1,71 +0,0 @@
. /etc/functions.sh
failsafe() {
lock /tmp/.failsafe
failsafe_ip
echo "0 1 2 3 4 ${cpu_port:-5u*}" > /proc/switch/eth0/vlan/0/ports
set_state failsafe
[ -x "/usr/sbin/nvram" ] && {
[ "$(nvram get boot_wait)" != "on" ] && {
nvram set boot_wait=on
nvram commit
}
}
netmsg 192.168.1.255 "Entering Failsafe!"
telnetd -l /bin/login.sh <> /dev/null 2>&1
ash --login
}
mount none /proc -t proc
insmod diag
set_state preinit
echo '/sbin/hotplug.failsafe' > /proc/sys/kernel/hotplug
ifname=eth0
# hardware specific overrides
case "$(cat /proc/diag/model)" in
"Linksys WAP54G V1") ifname=eth1;;
"ASUS WL-HDD") ifname=eth1;;
"ASUS WL-300g") ifname=eth1;;
"ASUS (unknown, BCM4702)") ifname=eth1;;
"Sitecom WL-105b") ifname=eth1;;
esac
check_module () {
module="$1"; shift; params="$*"
insmod "$module" "$params"
sleep 1
grep "^$module" /proc/modules
return $?
}
check_module tg3
failsafe_ip
insmod switch-core
check_module switch-robo || check_module switch-adm || {
check_module bcm57xx activate_gpio=0x4 && cpu_port="8u*"
} || rmmod switch-core
[ -d /proc/switch/eth0 ] && {
echo 1 > /proc/switch/eth0/reset
# this would be easier if we blasted the message across all ports
# but we don't want packets leaking across interfaces
for port in $(seq 0 4); do {
echo "$port ${cpu_port:-5u*}" > /proc/switch/eth0/vlan/0/ports
netmsg 192.168.1.255 "Press reset now, to enter Failsafe!"
}; done
} || netmsg 192.168.1.255 "Press reset now, to enter Failsafe!"
ifconfig $ifname 0.0.0.0 down
sleep 2

View File

@@ -0,0 +1,9 @@
#!/bin/sh
init_hotplug_failsafe() {
echo '/sbin/hotplug.failsafe' > /proc/sys/kernel/hotplug
}
boot_hook_add preinit_main init_hotplug_failsafe

View File

@@ -0,0 +1,37 @@
#!/bin/sh
set_preinit_iface() {
ifname=eth0
insmod diag
# hardware specific overrides
case "$(cat /proc/diag/model)" in
"Linksys WAP54G V1") ifname=eth1;;
"ASUS WL-HDD") ifname=eth1;;
"ASUS WL-300g") ifname=eth1;;
"ASUS (unknown, BCM4702)") ifname=eth1;;
"Sitecom WL-105b") ifname=eth1;;
esac
ifconfig $ifname 0.0.0.0 up
}
check_module () {
module="$1"; shift; params="$*"
insmod "$module" "$params"
sleep 1
grep "^$module" /proc/modules
return $?
}
init_iface() {
check_module tg3
insmod switch-core
check_module switch-robo || check_module switch-adm || {
check_module bcm57xx activate_gpio=0x4 && cpu_port="8u*"
} || rmmod switch-core
}
boot_hook_add preinit_main set_preinit_iface
boot_hook_add preinit_main init_iface

View File

@@ -0,0 +1,15 @@
#!/bin/sh
failsafe_ip() {
[ -d /proc/switch/eth0 ] && [ "$ifname" = "eth0" ] && {
ifconfig eth0 0.0.0.0 down
echo "0 1 2 3 4 ${cpu_port:-5u*}" > /proc/switch/eth0/vlan/0/ports
}
[ -n "$pi_ifname" ] && grep "$pi_ifname" /proc/net/dev >/dev/null && {
ifconfig $pi_ifname $pi_ip netmask $pi_netmask broadcast $pi_broadcast up
}
}
boot_hook_add failsafe failsafe_ip

View File

@@ -0,0 +1,6 @@
#!/bin/sh
do_mount_procfs() {
mount none /proc -t proc
}

View File

@@ -0,0 +1,38 @@
#!/bin/sh
port_net_echo() {
[ -n "$pi_ifname" ] && grep "$pi_ifname" /proc/net/dev >/dev/null && {
if [ "$pi_preinit_net_messages" = "y" ] || [ "$pi_failsafe_net_message" = "true" ] && [ "$pi_preinit_no_failsafe_netmsg" != "y" ]; then
netmsg $pi_broadcast "$1"
fi
}
}
preinit_ip_deconfig() {
if [ -z "$pi_ifname" ]; then
ifconfig $ifname 0.0.0.0 down
else
grep "$pi_ifname" /proc/net/dev >/dev/null && {
ifconfig $pi_ifname 0.0.0.0 down
}
fi
}
preinit_net_echo() {
preinit_ip
[ -d /proc/switch/eth0 ] && [ "$pi_ifname" = "eth0" ] && {
echo 1 > /proc/switch/eth0/reset
# this would be easier if we blasted the message across all ports
# but we don't want packets leaking across interfaces
for port in $(seq 0 4); do {
echo "$port ${cpu_port:-5u*}" > /proc/switch/eth0/vlan/0/ports
port_net_echo $1
}; done
} || port_net_echo $1
preinit_ip_deconfig
}

View File

@@ -0,0 +1,14 @@
#!/bin/sh
. /etc/functions.sh
set_boot_wait() {
[ -x "/usr/sbin/nvram" ] && {
[ "$(nvram get boot_wait)" != "on" ] && {
nvram set boot_wait=on
nvram commit
}
}
}
boot_hook_add failsafe set_boot_wait

View File

@@ -0,0 +1,589 @@
/*
* Misc useful os-independent macros and functions.
*
* Copyright 2007, Broadcom Corporation
* All Rights Reserved.
*
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
* $Id$
*/
#ifndef _bcmutils_h_
#define _bcmutils_h_
/* ctype replacement */
#define _BCM_U 0x01 /* upper */
#define _BCM_L 0x02 /* lower */
#define _BCM_D 0x04 /* digit */
#define _BCM_C 0x08 /* cntrl */
#define _BCM_P 0x10 /* punct */
#define _BCM_S 0x20 /* white space (space/lf/tab) */
#define _BCM_X 0x40 /* hex digit */
#define _BCM_SP 0x80 /* hard space (0x20) */
extern const unsigned char bcm_ctype[];
#define bcm_ismask(x) (bcm_ctype[(int)(unsigned char)(x)])
#define bcm_isalnum(c) ((bcm_ismask(c)&(_BCM_U|_BCM_L|_BCM_D)) != 0)
#define bcm_isalpha(c) ((bcm_ismask(c)&(_BCM_U|_BCM_L)) != 0)
#define bcm_iscntrl(c) ((bcm_ismask(c)&(_BCM_C)) != 0)
#define bcm_isdigit(c) ((bcm_ismask(c)&(_BCM_D)) != 0)
#define bcm_isgraph(c) ((bcm_ismask(c)&(_BCM_P|_BCM_U|_BCM_L|_BCM_D)) != 0)
#define bcm_islower(c) ((bcm_ismask(c)&(_BCM_L)) != 0)
#define bcm_isprint(c) ((bcm_ismask(c)&(_BCM_P|_BCM_U|_BCM_L|_BCM_D|_BCM_SP)) != 0)
#define bcm_ispunct(c) ((bcm_ismask(c)&(_BCM_P)) != 0)
#define bcm_isspace(c) ((bcm_ismask(c)&(_BCM_S)) != 0)
#define bcm_isupper(c) ((bcm_ismask(c)&(_BCM_U)) != 0)
#define bcm_isxdigit(c) ((bcm_ismask(c)&(_BCM_D|_BCM_X)) != 0)
#define bcm_tolower(c) (bcm_isupper((c)) ? ((c) + 'a' - 'A') : (c))
#define bcm_toupper(c) (bcm_islower((c)) ? ((c) + 'A' - 'a') : (c))
/* Buffer structure for collecting string-formatted data
* using bcm_bprintf() API.
* Use bcm_binit() to initialize before use
*/
struct bcmstrbuf {
char *buf; /* pointer to current position in origbuf */
unsigned int size; /* current (residual) size in bytes */
char *origbuf; /* unmodified pointer to orignal buffer */
unsigned int origsize; /* unmodified orignal buffer size in bytes */
};
/* ** driver-only section ** */
#ifdef BCMDRIVER
#include <osl.h>
#define GPIO_PIN_NOTDEFINED 0x20 /* Pin not defined */
/*
* Spin at most 'us' microseconds while 'exp' is true.
* Caller should explicitly test 'exp' when this completes
* and take appropriate error action if 'exp' is still true.
*/
#define SPINWAIT(exp, us) { \
uint countdown = (us) + 9; \
while ((exp) && (countdown >= 10)) {\
OSL_DELAY(10); \
countdown -= 10; \
} \
}
/* osl multi-precedence packet queue */
#ifndef PKTQ_LEN_DEFAULT
#define PKTQ_LEN_DEFAULT 128 /* Max 128 packets */
#endif
#ifndef PKTQ_MAX_PREC
#define PKTQ_MAX_PREC 16 /* Maximum precedence levels */
#endif
typedef struct pktq_prec {
void *head; /* first packet to dequeue */
void *tail; /* last packet to dequeue */
uint16 len; /* number of queued packets */
uint16 max; /* maximum number of queued packets */
} pktq_prec_t;
/* multi-priority pkt queue */
struct pktq {
uint16 num_prec; /* number of precedences in use */
uint16 hi_prec; /* rapid dequeue hint (>= highest non-empty prec) */
uint16 max; /* total max packets */
uint16 len; /* total number of packets */
/* q array must be last since # of elements can be either PKTQ_MAX_PREC or 1 */
struct pktq_prec q[PKTQ_MAX_PREC];
};
/* simple, non-priority pkt queue */
struct spktq {
uint16 num_prec; /* number of precedences in use (always 1) */
uint16 hi_prec; /* rapid dequeue hint (>= highest non-empty prec) */
uint16 max; /* total max packets */
uint16 len; /* total number of packets */
/* q array must be last since # of elements can be either PKTQ_MAX_PREC or 1 */
struct pktq_prec q[1];
};
#define PKTQ_PREC_ITER(pq, prec) for (prec = (pq)->num_prec - 1; prec >= 0; prec--)
/* forward definition of ether_addr structure used by some function prototypes */
struct ether_addr;
/* operations on a specific precedence in packet queue */
#define pktq_psetmax(pq, prec, _max) ((pq)->q[prec].max = (_max))
#define pktq_plen(pq, prec) ((pq)->q[prec].len)
#define pktq_pavail(pq, prec) ((pq)->q[prec].max - (pq)->q[prec].len)
#define pktq_pfull(pq, prec) ((pq)->q[prec].len >= (pq)->q[prec].max)
#define pktq_pempty(pq, prec) ((pq)->q[prec].len == 0)
#define pktq_ppeek(pq, prec) ((pq)->q[prec].head)
#define pktq_ppeek_tail(pq, prec) ((pq)->q[prec].tail)
extern void *pktq_penq(struct pktq *pq, int prec, void *p);
extern void *pktq_penq_head(struct pktq *pq, int prec, void *p);
extern void *pktq_pdeq(struct pktq *pq, int prec);
extern void *pktq_pdeq_tail(struct pktq *pq, int prec);
/* Empty the queue at particular precedence level */
extern void pktq_pflush(osl_t *osh, struct pktq *pq, int prec, bool dir);
/* Remove a specified packet from its queue */
extern bool pktq_pdel(struct pktq *pq, void *p, int prec);
/* operations on a set of precedences in packet queue */
extern int pktq_mlen(struct pktq *pq, uint prec_bmp);
extern void *pktq_mdeq(struct pktq *pq, uint prec_bmp, int *prec_out);
/* operations on packet queue as a whole */
#define pktq_len(pq) ((int)(pq)->len)
#define pktq_max(pq) ((int)(pq)->max)
#define pktq_avail(pq) ((int)((pq)->max - (pq)->len))
#define pktq_full(pq) ((pq)->len >= (pq)->max)
#define pktq_empty(pq) ((pq)->len == 0)
/* operations for single precedence queues */
#define pktenq(pq, p) pktq_penq(((struct pktq *)pq), 0, (p))
#define pktenq_head(pq, p) pktq_penq_head(((struct pktq *)pq), 0, (p))
#define pktdeq(pq) pktq_pdeq(((struct pktq *)pq), 0)
#define pktdeq_tail(pq) pktq_pdeq_tail(((struct pktq *)pq), 0)
#define pktqinit(pq, len) pktq_init(((struct pktq *)pq), 1, len)
extern void pktq_init(struct pktq *pq, int num_prec, int max_len);
/* prec_out may be NULL if caller is not interested in return value */
extern void *pktq_deq(struct pktq *pq, int *prec_out);
extern void *pktq_deq_tail(struct pktq *pq, int *prec_out);
extern void *pktq_peek(struct pktq *pq, int *prec_out);
extern void *pktq_peek_tail(struct pktq *pq, int *prec_out);
extern void pktq_flush(osl_t *osh, struct pktq *pq, bool dir); /* Empty the entire queue */
extern int pktq_setmax(struct pktq *pq, int max_len);
/* externs */
/* packet */
extern uint pktcopy(osl_t *osh, void *p, uint offset, int len, uchar *buf);
extern uint pkttotlen(osl_t *osh, void *p);
extern void *pktlast(osl_t *osh, void *p);
/* Get priority from a packet and pass it back in scb (or equiv) */
extern uint pktsetprio(void *pkt, bool update_vtag);
#define PKTPRIO_VDSCP 0x100 /* DSCP prio found after VLAN tag */
#define PKTPRIO_VLAN 0x200 /* VLAN prio found */
#define PKTPRIO_UPD 0x400 /* DSCP used to update VLAN prio */
#define PKTPRIO_DSCP 0x800 /* DSCP prio found */
/* string */
extern int BCMROMFN(bcm_atoi)(char *s);
extern ulong BCMROMFN(bcm_strtoul)(char *cp, char **endp, uint base);
extern char *BCMROMFN(bcmstrstr)(char *haystack, char *needle);
extern char *BCMROMFN(bcmstrcat)(char *dest, const char *src);
extern char *BCMROMFN(bcmstrncat)(char *dest, const char *src, uint size);
extern ulong wchar2ascii(char *abuf, ushort *wbuf, ushort wbuflen, ulong abuflen);
/* ethernet address */
extern char *bcm_ether_ntoa(struct ether_addr *ea, char *buf);
extern int BCMROMFN(bcm_ether_atoe)(char *p, struct ether_addr *ea);
/* ip address */
struct ipv4_addr;
extern char *bcm_ip_ntoa(struct ipv4_addr *ia, char *buf);
/* delay */
extern void bcm_mdelay(uint ms);
/* variable access */
extern char *getvar(char *vars, const char *name);
extern int getintvar(char *vars, const char *name);
extern uint getgpiopin(char *vars, char *pin_name, uint def_pin);
#ifdef BCMPERFSTATS
extern void bcm_perf_enable(void);
extern void bcmstats(char *fmt);
extern void bcmlog(char *fmt, uint a1, uint a2);
extern void bcmdumplog(char *buf, int size);
extern int bcmdumplogent(char *buf, uint idx);
#else
#define bcm_perf_enable()
#define bcmstats(fmt)
#define bcmlog(fmt, a1, a2)
#define bcmdumplog(buf, size) *buf = '\0'
#define bcmdumplogent(buf, idx) -1
#endif /* BCMPERFSTATS */
extern char *bcm_nvram_vars(uint *length);
extern int bcm_nvram_cache(void *sbh);
/* Support for sharing code across in-driver iovar implementations.
* The intent is that a driver use this structure to map iovar names
* to its (private) iovar identifiers, and the lookup function to
* find the entry. Macros are provided to map ids and get/set actions
* into a single number space for a switch statement.
*/
/* iovar structure */
typedef struct bcm_iovar {
const char *name; /* name for lookup and display */
uint16 varid; /* id for switch */
uint16 flags; /* driver-specific flag bits */
uint16 type; /* base type of argument */
uint16 minlen; /* min length for buffer vars */
} bcm_iovar_t;
/* varid definitions are per-driver, may use these get/set bits */
/* IOVar action bits for id mapping */
#define IOV_GET 0 /* Get an iovar */
#define IOV_SET 1 /* Set an iovar */
/* Varid to actionid mapping */
#define IOV_GVAL(id) ((id)*2)
#define IOV_SVAL(id) (((id)*2)+IOV_SET)
#define IOV_ISSET(actionid) ((actionid & IOV_SET) == IOV_SET)
/* flags are per-driver based on driver attributes */
extern const bcm_iovar_t *bcm_iovar_lookup(const bcm_iovar_t *table, const char *name);
extern int bcm_iovar_lencheck(const bcm_iovar_t *table, void *arg, int len, bool set);
#endif /* BCMDRIVER */
/* Base type definitions */
#define IOVT_VOID 0 /* no value (implictly set only) */
#define IOVT_BOOL 1 /* any value ok (zero/nonzero) */
#define IOVT_INT8 2 /* integer values are range-checked */
#define IOVT_UINT8 3 /* unsigned int 8 bits */
#define IOVT_INT16 4 /* int 16 bits */
#define IOVT_UINT16 5 /* unsigned int 16 bits */
#define IOVT_INT32 6 /* int 32 bits */
#define IOVT_UINT32 7 /* unsigned int 32 bits */
#define IOVT_BUFFER 8 /* buffer is size-checked as per minlen */
#define BCM_IOVT_VALID(type) (((unsigned int)(type)) <= IOVT_BUFFER)
/* Initializer for IOV type strings */
#define BCM_IOV_TYPE_INIT { \
"void", \
"bool", \
"int8", \
"uint8", \
"int16", \
"uint16", \
"int32", \
"uint32", \
"buffer", \
"" }
#define BCM_IOVT_IS_INT(type) (\
(type == IOVT_BOOL) || \
(type == IOVT_INT8) || \
(type == IOVT_UINT8) || \
(type == IOVT_INT16) || \
(type == IOVT_UINT16) || \
(type == IOVT_INT32) || \
(type == IOVT_UINT32))
/* ** driver/apps-shared section ** */
#define BCME_STRLEN 64 /* Max string length for BCM errors */
#define VALID_BCMERROR(e) ((e <= 0) && (e >= BCME_LAST))
/*
* error codes could be added but the defined ones shouldn't be changed/deleted
* these error codes are exposed to the user code
* when ever a new error code is added to this list
* please update errorstring table with the related error string and
* update osl files with os specific errorcode map
*/
#define BCME_OK 0 /* Success */
#define BCME_ERROR -1 /* Error generic */
#define BCME_BADARG -2 /* Bad Argument */
#define BCME_BADOPTION -3 /* Bad option */
#define BCME_NOTUP -4 /* Not up */
#define BCME_NOTDOWN -5 /* Not down */
#define BCME_NOTAP -6 /* Not AP */
#define BCME_NOTSTA -7 /* Not STA */
#define BCME_BADKEYIDX -8 /* BAD Key Index */
#define BCME_RADIOOFF -9 /* Radio Off */
#define BCME_NOTBANDLOCKED -10 /* Not band locked */
#define BCME_NOCLK -11 /* No Clock */
#define BCME_BADRATESET -12 /* BAD Rate valueset */
#define BCME_BADBAND -13 /* BAD Band */
#define BCME_BUFTOOSHORT -14 /* Buffer too short */
#define BCME_BUFTOOLONG -15 /* Buffer too long */
#define BCME_BUSY -16 /* Busy */
#define BCME_NOTASSOCIATED -17 /* Not Associated */
#define BCME_BADSSIDLEN -18 /* Bad SSID len */
#define BCME_OUTOFRANGECHAN -19 /* Out of Range Channel */
#define BCME_BADCHAN -20 /* Bad Channel */
#define BCME_BADADDR -21 /* Bad Address */
#define BCME_NORESOURCE -22 /* Not Enough Resources */
#define BCME_UNSUPPORTED -23 /* Unsupported */
#define BCME_BADLEN -24 /* Bad length */
#define BCME_NOTREADY -25 /* Not Ready */
#define BCME_EPERM -26 /* Not Permitted */
#define BCME_NOMEM -27 /* No Memory */
#define BCME_ASSOCIATED -28 /* Associated */
#define BCME_RANGE -29 /* Not In Range */
#define BCME_NOTFOUND -30 /* Not Found */
#define BCME_WME_NOT_ENABLED -31 /* WME Not Enabled */
#define BCME_TSPEC_NOTFOUND -32 /* TSPEC Not Found */
#define BCME_ACM_NOTSUPPORTED -33 /* ACM Not Supported */
#define BCME_NOT_WME_ASSOCIATION -34 /* Not WME Association */
#define BCME_SDIO_ERROR -35 /* SDIO Bus Error */
#define BCME_DONGLE_DOWN -36 /* Dongle Not Accessible */
#define BCME_VERSION -37 /* Incorrect version */
#define BCME_LAST BCME_VERSION
/* These are collection of BCME Error strings */
#define BCMERRSTRINGTABLE { \
"OK", \
"Undefined error", \
"Bad Argument", \
"Bad Option", \
"Not up", \
"Not down", \
"Not AP", \
"Not STA", \
"Bad Key Index", \
"Radio Off", \
"Not band locked", \
"No clock", \
"Bad Rate valueset", \
"Bad Band", \
"Buffer too short", \
"Buffer too long", \
"Busy", \
"Not Associated", \
"Bad SSID len", \
"Out of Range Channel", \
"Bad Channel", \
"Bad Address", \
"Not Enough Resources", \
"Unsupported", \
"Bad length", \
"Not Ready", \
"Not Permitted", \
"No Memory", \
"Associated", \
"Not In Range", \
"Not Found", \
"WME Not Enabled", \
"TSPEC Not Found", \
"ACM Not Supported", \
"Not WME Association", \
"SDIO Bus Error", \
"Dongle Not Accessible", \
"Incorrect version" \
}
#ifndef ABS
#define ABS(a) (((a) < 0)?-(a):(a))
#endif /* ABS */
#ifndef MIN
#define MIN(a, b) (((a) < (b))?(a):(b))
#endif /* MIN */
#ifndef MAX
#define MAX(a, b) (((a) > (b))?(a):(b))
#endif /* MAX */
#define CEIL(x, y) (((x) + ((y)-1)) / (y))
#define ROUNDUP(x, y) ((((x)+((y)-1))/(y))*(y))
#define ISALIGNED(a, x) (((a) & ((x)-1)) == 0)
#define ISPOWEROF2(x) ((((x)-1)&(x)) == 0)
#define VALID_MASK(mask) !((mask) & ((mask) + 1))
#ifndef OFFSETOF
#define OFFSETOF(type, member) ((uint)(uintptr)&((type *)0)->member)
#endif /* OFFSETOF */
#ifndef ARRAYSIZE
#define ARRAYSIZE(a) (sizeof(a)/sizeof(a[0]))
#endif
/* bit map related macros */
#ifndef setbit
#ifndef NBBY /* the BSD family defines NBBY */
#define NBBY 8 /* 8 bits per byte */
#endif /* #ifndef NBBY */
#define setbit(a, i) (((uint8 *)a)[(i)/NBBY] |= 1<<((i)%NBBY))
#define clrbit(a, i) (((uint8 *)a)[(i)/NBBY] &= ~(1<<((i)%NBBY)))
#define isset(a, i) (((const uint8 *)a)[(i)/NBBY] & (1<<((i)%NBBY)))
#define isclr(a, i) ((((const uint8 *)a)[(i)/NBBY] & (1<<((i)%NBBY))) == 0)
#endif /* setbit */
#define NBITS(type) (sizeof(type) * 8)
#define NBITVAL(nbits) (1 << (nbits))
#define MAXBITVAL(nbits) ((1 << (nbits)) - 1)
#define NBITMASK(nbits) MAXBITVAL(nbits)
#define MAXNBVAL(nbyte) MAXBITVAL((nbyte) * 8)
/* basic mux operation - can be optimized on several architectures */
#define MUX(pred, true, false) ((pred) ? (true) : (false))
/* modulo inc/dec - assumes x E [0, bound - 1] */
#define MODDEC(x, bound) MUX((x) == 0, (bound) - 1, (x) - 1)
#define MODINC(x, bound) MUX((x) == (bound) - 1, 0, (x) + 1)
/* modulo inc/dec, bound = 2^k */
#define MODDEC_POW2(x, bound) (((x) - 1) & ((bound) - 1))
#define MODINC_POW2(x, bound) (((x) + 1) & ((bound) - 1))
/* modulo add/sub - assumes x, y E [0, bound - 1] */
#define MODADD(x, y, bound) \
MUX((x) + (y) >= (bound), (x) + (y) - (bound), (x) + (y))
#define MODSUB(x, y, bound) \
MUX(((int)(x)) - ((int)(y)) < 0, (x) - (y) + (bound), (x) - (y))
/* module add/sub, bound = 2^k */
#define MODADD_POW2(x, y, bound) (((x) + (y)) & ((bound) - 1))
#define MODSUB_POW2(x, y, bound) (((x) - (y)) & ((bound) - 1))
/* crc defines */
#define CRC8_INIT_VALUE 0xff /* Initial CRC8 checksum value */
#define CRC8_GOOD_VALUE 0x9f /* Good final CRC8 checksum value */
#define CRC16_INIT_VALUE 0xffff /* Initial CRC16 checksum value */
#define CRC16_GOOD_VALUE 0xf0b8 /* Good final CRC16 checksum value */
#define CRC32_INIT_VALUE 0xffffffff /* Initial CRC32 checksum value */
#define CRC32_GOOD_VALUE 0xdebb20e3 /* Good final CRC32 checksum value */
/* bcm_format_flags() bit description structure */
typedef struct bcm_bit_desc {
uint32 bit;
const char* name;
} bcm_bit_desc_t;
/* tag_ID/length/value_buffer tuple */
typedef struct bcm_tlv {
uint8 id;
uint8 len;
uint8 data[1];
} bcm_tlv_t;
/* Check that bcm_tlv_t fits into the given buflen */
#define bcm_valid_tlv(elt, buflen) ((buflen) >= 2 && (int)(buflen) >= (int)(2 + (elt)->len))
/* buffer length for ethernet address from bcm_ether_ntoa() */
#define ETHER_ADDR_STR_LEN 18 /* 18-bytes of Ethernet address buffer length */
/* unaligned load and store macros */
#ifdef IL_BIGENDIAN
static INLINE uint32
load32_ua(uint8 *a)
{
return ((a[0] << 24) | (a[1] << 16) | (a[2] << 8) | a[3]);
}
static INLINE void
store32_ua(uint8 *a, uint32 v)
{
a[0] = (v >> 24) & 0xff;
a[1] = (v >> 16) & 0xff;
a[2] = (v >> 8) & 0xff;
a[3] = v & 0xff;
}
static INLINE uint16
load16_ua(uint8 *a)
{
return ((a[0] << 8) | a[1]);
}
static INLINE void
store16_ua(uint8 *a, uint16 v)
{
a[0] = (v >> 8) & 0xff;
a[1] = v & 0xff;
}
#else /* IL_BIGENDIAN */
static INLINE uint32
load32_ua(uint8 *a)
{
return ((a[3] << 24) | (a[2] << 16) | (a[1] << 8) | a[0]);
}
static INLINE void
store32_ua(uint8 *a, uint32 v)
{
a[3] = (v >> 24) & 0xff;
a[2] = (v >> 16) & 0xff;
a[1] = (v >> 8) & 0xff;
a[0] = v & 0xff;
}
static INLINE uint16
load16_ua(uint8 *a)
{
return ((a[1] << 8) | a[0]);
}
static INLINE void
store16_ua(uint8 *a, uint16 v)
{
a[1] = (v >> 8) & 0xff;
a[0] = v & 0xff;
}
#endif /* IL_BIGENDIAN */
/* externs */
/* crc */
extern uint8 BCMROMFN(hndcrc8)(uint8 *p, uint nbytes, uint8 crc);
extern uint16 BCMROMFN(hndcrc16)(uint8 *p, uint nbytes, uint16 crc);
extern uint32 BCMROMFN(hndcrc32)(uint8 *p, uint nbytes, uint32 crc);
/* format/print */
extern char *bcm_brev_str(uint16 brev, char *buf);
extern void printfbig(char *buf);
/* IE parsing */
extern bcm_tlv_t *BCMROMFN(bcm_next_tlv)(bcm_tlv_t *elt, int *buflen);
extern bcm_tlv_t *BCMROMFN(bcm_parse_tlvs)(void *buf, int buflen, uint key);
extern bcm_tlv_t *BCMROMFN(bcm_parse_ordered_tlvs)(void *buf, int buflen, uint key);
/* bcmerror */
extern const char *bcmerrorstr(int bcmerror);
/* multi-bool data type: set of bools, mbool is true if any is set */
typedef uint32 mbool;
#define mboolset(mb, bit) ((mb) |= (bit)) /* set one bool */
#define mboolclr(mb, bit) ((mb) &= ~(bit)) /* clear one bool */
#define mboolisset(mb, bit) (((mb) & (bit)) != 0) /* TRUE if one bool is set */
#define mboolmaskset(mb, mask, val) ((mb) = (((mb) & ~(mask)) | (val)))
/* power conversion */
extern uint16 BCMROMFN(bcm_qdbm_to_mw)(uint8 qdbm);
extern uint8 BCMROMFN(bcm_mw_to_qdbm)(uint16 mw);
/* generic datastruct to help dump routines */
struct fielddesc {
const char *nameandfmt;
uint32 offset;
uint32 len;
};
extern void bcm_binit(struct bcmstrbuf *b, char *buf, uint size);
extern int bcm_bprintf(struct bcmstrbuf *b, const char *fmt, ...);
typedef uint32 (*readreg_rtn)(void *arg0, void *arg1, uint32 offset);
extern uint bcmdumpfields(readreg_rtn func_ptr, void *arg0, void *arg1, struct fielddesc *str,
char *buf, uint32 bufsize);
extern uint bcm_mkiovar(char *name, char *data, uint datalen, char *buf, uint len);
extern uint BCMROMFN(bcm_bitcount)(uint8 *bitmap, uint bytelength);
#ifdef BCMDBG_PKT /* pkt logging for debugging */
#define PKTLIST_SIZE 1000
typedef struct {
void *list[PKTLIST_SIZE]; /* List of pointers to packets */
uint count; /* Total count of the packets */
} pktlist_info_t;
extern void pktlist_add(pktlist_info_t *pktlist, void *p);
extern void pktlist_remove(pktlist_info_t *pktlist, void *p);
extern char* pktlist_dump(pktlist_info_t *pktlist, char *buf);
#endif /* BCMDBG_PKT */
#endif /* _bcmutils_h_ */

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@@ -0,0 +1,508 @@
/*
* Broadcom SiliconBackplane chipcommon serial flash interface
*
* Copyright 2007, Broadcom Corporation
* All Rights Reserved.
*
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
*
* $Id$
*/
#include <typedefs.h>
#include <osl.h>
#include "include/bcmutils.h"
#include <sbutils.h>
#include <sbconfig.h>
#include <sbchipc.h>
#include <bcmdevs.h>
#include <sflash.h>
/* Private global state */
static struct sflash sflash;
/* Issue a serial flash command */
static INLINE void
sflash_cmd(osl_t *osh, chipcregs_t *cc, uint opcode)
{
W_REG(osh, &cc->flashcontrol, SFLASH_START | opcode);
while (R_REG(osh, &cc->flashcontrol) & SFLASH_BUSY);
}
/* Initialize serial flash access */
struct sflash *
sflash_init(sb_t *sbh, chipcregs_t *cc)
{
uint32 id, id2;
osl_t *osh;
ASSERT(sbh);
osh = sb_osh(sbh);
bzero(&sflash, sizeof(sflash));
sflash.type = sbh->cccaps & CC_CAP_FLASH_MASK;
switch (sflash.type) {
case SFLASH_ST:
/* Probe for ST chips */
sflash_cmd(osh, cc, SFLASH_ST_DP);
sflash_cmd(osh, cc, SFLASH_ST_RES);
id = R_REG(osh, &cc->flashdata);
switch (id) {
case 0x11:
/* ST M25P20 2 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 4;
break;
case 0x12:
/* ST M25P40 4 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 8;
break;
case 0x13:
/* ST M25P80 8 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 16;
break;
case 0x14:
/* ST M25P16 16 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 32;
break;
case 0x15:
/* ST M25P32 32 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 64;
break;
case 0x16:
/* ST M25P64 64 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 128;
break;
case 0xbf:
W_REG(osh, &cc->flashaddress, 1);
sflash_cmd(osh, cc, SFLASH_ST_RES);
id2 = R_REG(osh, &cc->flashdata);
if (id2 == 0x44) {
/* SST M25VF80 4 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 8;
}
break;
}
break;
case SFLASH_AT:
/* Probe for Atmel chips */
sflash_cmd(osh, cc, SFLASH_AT_STATUS);
id = R_REG(osh, &cc->flashdata) & 0x3c;
switch (id) {
case 0xc:
/* Atmel AT45DB011 1Mbit Serial Flash */
sflash.blocksize = 256;
sflash.numblocks = 512;
break;
case 0x14:
/* Atmel AT45DB021 2Mbit Serial Flash */
sflash.blocksize = 256;
sflash.numblocks = 1024;
break;
case 0x1c:
/* Atmel AT45DB041 4Mbit Serial Flash */
sflash.blocksize = 256;
sflash.numblocks = 2048;
break;
case 0x24:
/* Atmel AT45DB081 8Mbit Serial Flash */
sflash.blocksize = 256;
sflash.numblocks = 4096;
break;
case 0x2c:
/* Atmel AT45DB161 16Mbit Serial Flash */
sflash.blocksize = 512;
sflash.numblocks = 4096;
break;
case 0x34:
/* Atmel AT45DB321 32Mbit Serial Flash */
sflash.blocksize = 512;
sflash.numblocks = 8192;
break;
case 0x3c:
/* Atmel AT45DB642 64Mbit Serial Flash */
sflash.blocksize = 1024;
sflash.numblocks = 8192;
break;
}
break;
}
sflash.size = sflash.blocksize * sflash.numblocks;
return sflash.size ? &sflash : NULL;
}
/* Read len bytes starting at offset into buf. Returns number of bytes read. */
int
sflash_read(sb_t *sbh, chipcregs_t *cc, uint offset, uint len, uchar *buf)
{
uint8 *from, *to;
int cnt, i;
osl_t *osh;
ASSERT(sbh);
if (!len)
return 0;
if ((offset + len) > sflash.size)
return -22;
if ((len >= 4) && (offset & 3))
cnt = 4 - (offset & 3);
else if ((len >= 4) && ((uintptr)buf & 3))
cnt = 4 - ((uintptr)buf & 3);
else
cnt = len;
osh = sb_osh(sbh);
from = (uint8 *)(uintptr)OSL_UNCACHED(SB_FLASH2 + offset);
to = (uint8 *)buf;
if (cnt < 4) {
for (i = 0; i < cnt; i ++) {
*to = R_REG(osh, from);
from ++;
to ++;
}
return cnt;
}
while (cnt >= 4) {
*(uint32 *)to = R_REG(osh, (uint32 *)from);
from += 4;
to += 4;
cnt -= 4;
}
return (len - cnt);
}
/* Poll for command completion. Returns zero when complete. */
int
sflash_poll(sb_t *sbh, chipcregs_t *cc, uint offset)
{
osl_t *osh;
ASSERT(sbh);
osh = sb_osh(sbh);
if (offset >= sflash.size)
return -22;
switch (sflash.type) {
case SFLASH_ST:
/* Check for ST Write In Progress bit */
sflash_cmd(osh, cc, SFLASH_ST_RDSR);
return R_REG(osh, &cc->flashdata) & SFLASH_ST_WIP;
case SFLASH_AT:
/* Check for Atmel Ready bit */
sflash_cmd(osh, cc, SFLASH_AT_STATUS);
return !(R_REG(osh, &cc->flashdata) & SFLASH_AT_READY);
}
return 0;
}
/* Write len bytes starting at offset into buf. Returns number of bytes
* written. Caller should poll for completion.
*/
int
sflash_write(sb_t *sbh, chipcregs_t *cc, uint offset, uint len, const uchar *buf)
{
struct sflash *sfl;
int ret = 0;
bool is4712b0;
uint32 page, byte, mask;
osl_t *osh;
ASSERT(sbh);
osh = sb_osh(sbh);
if (!len)
return 0;
if ((offset + len) > sflash.size)
return -22;
sfl = &sflash;
switch (sfl->type) {
case SFLASH_ST:
is4712b0 = (sbh->chip == BCM4712_CHIP_ID) && (sbh->chiprev == 3);
/* Enable writes */
sflash_cmd(osh, cc, SFLASH_ST_WREN);
if (is4712b0) {
mask = 1 << 14;
W_REG(osh, &cc->flashaddress, offset);
W_REG(osh, &cc->flashdata, *buf++);
/* Set chip select */
OR_REG(osh, &cc->gpioout, mask);
/* Issue a page program with the first byte */
sflash_cmd(osh, cc, SFLASH_ST_PP);
ret = 1;
offset++;
len--;
while (len > 0) {
if ((offset & 255) == 0) {
/* Page boundary, drop cs and return */
AND_REG(osh, &cc->gpioout, ~mask);
if (!sflash_poll(sbh, cc, offset)) {
/* Flash rejected command */
return -11;
}
return ret;
} else {
/* Write single byte */
sflash_cmd(osh, cc, *buf++);
}
ret++;
offset++;
len--;
}
/* All done, drop cs if needed */
if ((offset & 255) != 1) {
/* Drop cs */
AND_REG(osh, &cc->gpioout, ~mask);
if (!sflash_poll(sbh, cc, offset)) {
/* Flash rejected command */
return -12;
}
}
} else if ( (sbh->ccrev >= 20) && (len != 1) ) {
//} else if ( sbh->ccrev >= 20 ) { /* foxconn modified by EricHuang, 05/24/2007 */
W_REG(NULL, &cc->flashaddress, offset);
W_REG(NULL, &cc->flashdata, *buf++);
/* Issue a page program with CSA bit set */
sflash_cmd(osh, cc, SFLASH_ST_CSA | SFLASH_ST_PP);
ret = 1;
offset++;
len--;
while (len > 0) {
if ((offset & 255) == 0) {
/* Page boundary, poll droping cs and return */
W_REG(NULL, &cc->flashcontrol, 0);
/* wklin added start, 06/08/2007 */
W_REG(NULL, &cc->flashcontrol, 0);
OSL_DELAY(1);
/* wklin added end, 06/08/2007 */
/* wklin rmeoved start, 06/08/2007 */
#if 0
if (!sflash_poll(sbh, cc, offset)) {
/* Flash rejected command */
return -11;
}
#endif
/* wklin removed end, 06/08/2007 */
return ret;
} else {
/* Write single byte */
sflash_cmd(osh, cc, SFLASH_ST_CSA | *buf++);
}
ret++;
offset++;
len--;
}
/* All done, drop cs if needed */
if ((offset & 255) != 1) {
/* Drop cs, poll */
W_REG(NULL, &cc->flashcontrol, 0);
/* wklin added start, 06/08/2007 */
W_REG(NULL, &cc->flashcontrol, 0);
OSL_DELAY(1);
/* wklin added end, 06/08/2007 */
/* wklin removed start, 06/08/2007 */
#if 0
if (!sflash_poll(sbh, cc, offset)) {
/* Flash rejected command */
return -12;
}
#endif
/* wklin removed end, 06/08/2007 */
}
} else {
ret = 1;
W_REG(osh, &cc->flashaddress, offset);
W_REG(osh, &cc->flashdata, *buf);
/* Page program */
sflash_cmd(osh, cc, SFLASH_ST_PP);
}
break;
case SFLASH_AT:
mask = sfl->blocksize - 1;
page = (offset & ~mask) << 1;
byte = offset & mask;
/* Read main memory page into buffer 1 */
if (byte || (len < sfl->blocksize)) {
W_REG(osh, &cc->flashaddress, page);
sflash_cmd(osh, cc, SFLASH_AT_BUF1_LOAD);
/* 250 us for AT45DB321B */
SPINWAIT(sflash_poll(sbh, cc, offset), 1000);
ASSERT(!sflash_poll(sbh, cc, offset));
}
/* Write into buffer 1 */
for (ret = 0; (ret < (int)len) && (byte < sfl->blocksize); ret++) {
W_REG(osh, &cc->flashaddress, byte++);
W_REG(osh, &cc->flashdata, *buf++);
sflash_cmd(osh, cc, SFLASH_AT_BUF1_WRITE);
}
/* Write buffer 1 into main memory page */
W_REG(osh, &cc->flashaddress, page);
sflash_cmd(osh, cc, SFLASH_AT_BUF1_PROGRAM);
break;
}
return ret;
}
/* Erase a region. Returns number of bytes scheduled for erasure.
* Caller should poll for completion.
*/
int
sflash_erase(sb_t *sbh, chipcregs_t *cc, uint offset)
{
struct sflash *sfl;
osl_t *osh;
ASSERT(sbh);
osh = sb_osh(sbh);
if (offset >= sflash.size)
return -22;
sfl = &sflash;
switch (sfl->type) {
case SFLASH_ST:
sflash_cmd(osh, cc, SFLASH_ST_WREN);
W_REG(osh, &cc->flashaddress, offset);
sflash_cmd(osh, cc, SFLASH_ST_SE);
return sfl->blocksize;
case SFLASH_AT:
W_REG(osh, &cc->flashaddress, offset << 1);
sflash_cmd(osh, cc, SFLASH_AT_PAGE_ERASE);
return sfl->blocksize;
}
return 0;
}
/*
* writes the appropriate range of flash, a NULL buf simply erases
* the region of flash
*/
int
sflash_commit(sb_t *sbh, chipcregs_t *cc, uint offset, uint len, const uchar *buf)
{
struct sflash *sfl;
uchar *block = NULL, *cur_ptr, *blk_ptr;
uint blocksize = 0, mask, cur_offset, cur_length, cur_retlen, remainder;
uint blk_offset, blk_len, copied;
int bytes, ret = 0;
osl_t *osh;
ASSERT(sbh);
osh = sb_osh(sbh);
/* Check address range */
if (len <= 0)
return 0;
sfl = &sflash;
if ((offset + len) > sfl->size)
return -1;
blocksize = sfl->blocksize;
mask = blocksize - 1;
/* Allocate a block of mem */
if (!(block = MALLOC(osh, blocksize)))
return -1;
while (len) {
/* Align offset */
cur_offset = offset & ~mask;
cur_length = blocksize;
cur_ptr = block;
remainder = blocksize - (offset & mask);
if (len < remainder)
cur_retlen = len;
else
cur_retlen = remainder;
/* buf == NULL means erase only */
if (buf) {
/* Copy existing data into holding block if necessary */
if ((offset & mask) || (len < blocksize)) {
blk_offset = cur_offset;
blk_len = cur_length;
blk_ptr = cur_ptr;
/* Copy entire block */
while (blk_len) {
copied = sflash_read(sbh, cc, blk_offset, blk_len, blk_ptr);
blk_offset += copied;
blk_len -= copied;
blk_ptr += copied;
}
}
/* Copy input data into holding block */
memcpy(cur_ptr + (offset & mask), buf, cur_retlen);
}
/* Erase block */
if ((ret = sflash_erase(sbh, cc, (uint) cur_offset)) < 0)
goto done;
while (sflash_poll(sbh, cc, (uint) cur_offset));
/* buf == NULL means erase only */
if (!buf) {
offset += cur_retlen;
len -= cur_retlen;
continue;
}
/* Write holding block */
while (cur_length > 0) {
if ((bytes = sflash_write(sbh, cc,
(uint) cur_offset,
(uint) cur_length,
(uchar *) cur_ptr)) < 0) {
ret = bytes;
goto done;
}
while (sflash_poll(sbh, cc, (uint) cur_offset));
cur_offset += bytes;
cur_length -= bytes;
cur_ptr += bytes;
}
offset += cur_retlen;
len -= cur_retlen;
buf += cur_retlen;
}
ret = len;
done:
if (block)
MFREE(osh, block, blocksize);
return ret;
}

View File

@@ -1,530 +1,303 @@
/*
* Broadcom SiliconBackplane chipcommon serial flash interface
*
* Copyright 2007, Broadcom Corporation
* All Rights Reserved.
*
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
* Copyright 2006, Broadcom Corporation
* All Rights Reserved.
*
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
*
* $Id$
*/
#include <linux/config.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/ioport.h>
#include <linux/mtd/compatmac.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/errno.h>
#include <linux/pci.h>
#include <linux/delay.h>
#include <asm/io.h>
#include <typedefs.h>
#include <osl.h>
// #include <bcmutils.h>
#include <bcmdevs.h>
#include <bcmnvram.h>
#include <sbutils.h>
#include <sbconfig.h>
#include <sbchipc.h>
#include <bcmdevs.h>
#include <sflash.h>
#ifdef CONFIG_MTD_PARTITIONS
extern struct mtd_partition * init_mtd_partitions(struct mtd_info *mtd, size_t size);
#endif
struct sflash_mtd {
sb_t *sbh;
chipcregs_t *cc;
struct semaphore lock;
struct mtd_info mtd;
struct mtd_erase_region_info region;
};
/* Private global state */
static struct sflash sflash;
static struct sflash_mtd sflash;
/* Issue a serial flash command */
static INLINE void
sflash_cmd (osl_t * osh, chipcregs_t * cc, uint opcode)
static int
sflash_mtd_poll(struct sflash_mtd *sflash, unsigned int offset, int timeout)
{
W_REG (osh, &cc->flashcontrol, SFLASH_START | opcode);
while (R_REG (osh, &cc->flashcontrol) & SFLASH_BUSY);
int now = jiffies;
int ret = 0;
for (;;) {
if (!sflash_poll(sflash->sbh, sflash->cc, offset)) {
ret = 0;
break;
}
if (time_after(jiffies, now + timeout)) {
printk(KERN_ERR "sflash: timeout\n");
ret = -ETIMEDOUT;
break;
}
if (current->need_resched) {
set_current_state(TASK_UNINTERRUPTIBLE);
schedule_timeout(timeout / 10);
} else
udelay(1);
}
return ret;
}
/* Initialize serial flash access */
struct sflash *
sflash_init (sb_t * sbh, chipcregs_t * cc)
static int
sflash_mtd_read(struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf)
{
uint32 id, id2;
osl_t *osh;
struct sflash_mtd *sflash = (struct sflash_mtd *) mtd->priv;
int bytes, ret = 0;
ASSERT (sbh);
/* Check address range */
if (len == 0){
*retlen = 0;
return 0;
}
if (!len)
return 0;
if ((from + len) > mtd->size)
return -EINVAL;
down(&sflash->lock);
osh = sb_osh (sbh);
bzero (&sflash, sizeof (sflash));
sflash.type = sbh->cccaps & CC_CAP_FLASH_MASK;
switch (sflash.type)
{
case SFLASH_ST:
/* Probe for ST chips */
sflash_cmd (osh, cc, SFLASH_ST_DP);
sflash_cmd (osh, cc, SFLASH_ST_RES);
id = R_REG (osh, &cc->flashdata);
switch (id)
{
case 0x11:
/* ST M25P20 2 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 4;
break;
case 0x12:
/* ST M25P40 4 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 8;
break;
case 0x13:
/* ST M25P80 8 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 16;
break;
case 0x14:
/* ST M25P16 16 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 32;
break;
case 0x15:
/* ST M25P32 32 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 64;
break;
case 0x16:
/* ST M25P64 64 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 128;
break;
case 0xbf:
W_REG (osh, &cc->flashaddress, 1);
sflash_cmd (osh, cc, SFLASH_ST_RES);
id2 = R_REG (osh, &cc->flashdata);
if (id2 == 0x44)
{
/* SST M25VF80 4 Mbit Serial Flash */
sflash.blocksize = 64 * 1024;
sflash.numblocks = 8;
}
break;
*retlen = 0;
while (len) {
if ((bytes = sflash_read(sflash->sbh, sflash->cc, (uint) from, len, buf)) < 0) {
ret = bytes;
break;
}
from += (loff_t) bytes;
len -= bytes;
buf += bytes;
*retlen += bytes;
}
break;
case SFLASH_AT:
/* Probe for Atmel chips */
sflash_cmd (osh, cc, SFLASH_AT_STATUS);
id = R_REG (osh, &cc->flashdata) & 0x3c;
switch (id)
{
case 0xc:
/* Atmel AT45DB011 1Mbit Serial Flash */
sflash.blocksize = 256;
sflash.numblocks = 512;
break;
case 0x14:
/* Atmel AT45DB021 2Mbit Serial Flash */
sflash.blocksize = 256;
sflash.numblocks = 1024;
break;
case 0x1c:
/* Atmel AT45DB041 4Mbit Serial Flash */
sflash.blocksize = 256;
sflash.numblocks = 2048;
break;
case 0x24:
/* Atmel AT45DB081 8Mbit Serial Flash */
sflash.blocksize = 256;
sflash.numblocks = 4096;
break;
case 0x2c:
/* Atmel AT45DB161 16Mbit Serial Flash */
sflash.blocksize = 512;
sflash.numblocks = 4096;
break;
case 0x34:
/* Atmel AT45DB321 32Mbit Serial Flash */
sflash.blocksize = 512;
sflash.numblocks = 8192;
break;
case 0x3c:
/* Atmel AT45DB642 64Mbit Serial Flash */
sflash.blocksize = 1024;
sflash.numblocks = 8192;
break;
}
break;
}
up(&sflash->lock);
sflash.size = sflash.blocksize * sflash.numblocks;
return sflash.size ? &sflash : NULL;
return ret;
}
/* Read len bytes starting at offset into buf. Returns number of bytes read. */
int
sflash_read (sb_t * sbh, chipcregs_t * cc, uint offset, uint len, uchar * buf)
static int
sflash_mtd_write(struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u_char *buf)
{
uint8 *from, *to;
int cnt, i;
osl_t *osh;
struct sflash_mtd *sflash = (struct sflash_mtd *) mtd->priv;
int bytes, ret = 0;
ASSERT (sbh);
/* Check address range */
if (len == 0){
*retlen = 0;
return 0;
}
if (!len)
return 0;
if ((to + len) > mtd->size)
return -EINVAL;
if (!len)
return 0;
down(&sflash->lock);
if ((offset + len) > sflash.size)
return -22;
if ((len >= 4) && (offset & 3))
cnt = 4 - (offset & 3);
else if ((len >= 4) && ((uintptr) buf & 3))
cnt = 4 - ((uintptr) buf & 3);
else
cnt = len;
osh = sb_osh (sbh);
from = (uint8 *) (uintptr) OSL_UNCACHED (SB_FLASH2 + offset);
to = (uint8 *) buf;
if (cnt < 4)
{
for (i = 0; i < cnt; i++)
{
*to = R_REG (osh, from);
from++;
to++;
*retlen = 0;
while (len) {
if ((bytes = sflash_write(sflash->sbh, sflash->cc, (uint)to, (uint)len, buf)) < 0) {
ret = bytes;
break;
}
if ((ret = sflash_mtd_poll(sflash, (unsigned int) to, HZ / 10)))
break;
to += (loff_t) bytes;
len -= bytes;
buf += bytes;
*retlen += bytes;
}
return cnt;
}
while (cnt >= 4)
{
*(uint32 *) to = R_REG (osh, (uint32 *) from);
from += 4;
to += 4;
cnt -= 4;
}
up(&sflash->lock);
return (len - cnt);
return ret;
}
/* Poll for command completion. Returns zero when complete. */
int
sflash_poll (sb_t * sbh, chipcregs_t * cc, uint offset)
static int
sflash_mtd_erase(struct mtd_info *mtd, struct erase_info *erase)
{
osl_t *osh;
struct sflash_mtd *sflash = (struct sflash_mtd *) mtd->priv;
int i, j, ret = 0;
unsigned int addr, len;
ASSERT (sbh);
/* Check address range */
if (!erase->len)
return 0;
if ((erase->addr + erase->len) > mtd->size)
return -EINVAL;
osh = sb_osh (sbh);
addr = erase->addr;
len = erase->len;
if (offset >= sflash.size)
return -22;
down(&sflash->lock);
switch (sflash.type)
{
case SFLASH_ST:
/* Check for ST Write In Progress bit */
sflash_cmd (osh, cc, SFLASH_ST_RDSR);
return R_REG (osh, &cc->flashdata) & SFLASH_ST_WIP;
case SFLASH_AT:
/* Check for Atmel Ready bit */
sflash_cmd (osh, cc, SFLASH_AT_STATUS);
return !(R_REG (osh, &cc->flashdata) & SFLASH_AT_READY);
}
/* Ensure that requested region is aligned */
for (i = 0; i < mtd->numeraseregions; i++) {
for (j = 0; j < mtd->eraseregions[i].numblocks; j++) {
if (addr == mtd->eraseregions[i].offset + mtd->eraseregions[i].erasesize * j &&
len >= mtd->eraseregions[i].erasesize) {
if ((ret = sflash_erase(sflash->sbh, sflash->cc, addr)) < 0)
break;
if ((ret = sflash_mtd_poll(sflash, addr, 10 * HZ)))
break;
addr += mtd->eraseregions[i].erasesize;
len -= mtd->eraseregions[i].erasesize;
}
}
if (ret)
break;
}
return 0;
up(&sflash->lock);
/* Set erase status */
if (ret)
erase->state = MTD_ERASE_FAILED;
else
erase->state = MTD_ERASE_DONE;
/* Call erase callback */
if (erase->callback)
erase->callback(erase);
return ret;
}
/* Write len bytes starting at offset into buf. Returns number of bytes
* written. Caller should poll for completion.
*/
int
sflash_write (sb_t * sbh, chipcregs_t * cc, uint offset, uint len,
const uchar * buf)
#if LINUX_VERSION_CODE < 0x20212 && defined(MODULE)
#define sflash_mtd_init init_module
#define sflash_mtd_exit cleanup_module
#endif
mod_init_t
sflash_mtd_init(void)
{
struct sflash *sfl;
int ret = 0;
bool is4712b0;
uint32 page, byte, mask;
osl_t *osh;
struct pci_dev *pdev;
int ret = 0;
struct sflash *info;
uint i;
#ifdef CONFIG_MTD_PARTITIONS
struct mtd_partition *parts;
#endif
ASSERT (sbh);
osh = sb_osh (sbh);
if (!len)
return 0;
if ((offset + len) > sflash.size)
return -22;
sfl = &sflash;
switch (sfl->type)
{
case SFLASH_ST:
is4712b0 = (sbh->chip == BCM4712_CHIP_ID) && (sbh->chiprev == 3);
/* Enable writes */
sflash_cmd (osh, cc, SFLASH_ST_WREN);
if (is4712b0)
{
mask = 1 << 14;
W_REG (osh, &cc->flashaddress, offset);
W_REG (osh, &cc->flashdata, *buf++);
/* Set chip select */
OR_REG (osh, &cc->gpioout, mask);
/* Issue a page program with the first byte */
sflash_cmd (osh, cc, SFLASH_ST_PP);
ret = 1;
offset++;
len--;
while (len > 0)
{
if ((offset & 255) == 0)
{
/* Page boundary, drop cs and return */
AND_REG (osh, &cc->gpioout, ~mask);
if (!sflash_poll (sbh, cc, offset))
{
/* Flash rejected command */
return -11;
}
return ret;
}
else
{
/* Write single byte */
sflash_cmd (osh, cc, *buf++);
}
ret++;
offset++;
len--;
}
/* All done, drop cs if needed */
if ((offset & 255) != 1)
{
/* Drop cs */
AND_REG (osh, &cc->gpioout, ~mask);
if (!sflash_poll (sbh, cc, offset))
{
/* Flash rejected command */
return -12;
}
}
if (!(pdev = pci_find_device(VENDOR_BROADCOM, SB_CC, NULL))) {
printk(KERN_ERR "sflash: chipcommon not found\n");
return -ENODEV;
}
else if (sbh->ccrev >= 20)
{
W_REG (NULL, &cc->flashaddress, offset);
W_REG (NULL, &cc->flashdata, *buf++);
/* Issue a page program with CSA bit set */
sflash_cmd (osh, cc, SFLASH_ST_CSA | SFLASH_ST_PP);
ret = 1;
offset++;
len--;
while (len > 0)
{
if ((offset & 255) == 0)
{
/* Page boundary, poll droping cs and return */
W_REG (NULL, &cc->flashcontrol, 0);
if (!sflash_poll (sbh, cc, offset))
{
/* Flash rejected command */
return -11;
}
return ret;
}
else
{
/* Write single byte */
sflash_cmd (osh, cc, SFLASH_ST_CSA | *buf++);
}
ret++;
offset++;
len--;
}
/* All done, drop cs if needed */
if ((offset & 255) != 1)
{
/* Drop cs, poll */
W_REG (NULL, &cc->flashcontrol, 0);
if (!sflash_poll (sbh, cc, offset))
{
/* Flash rejected command */
return -12;
}
}
}
else
{
ret = 1;
W_REG (osh, &cc->flashaddress, offset);
W_REG (osh, &cc->flashdata, *buf);
/* Page program */
sflash_cmd (osh, cc, SFLASH_ST_PP);
}
break;
case SFLASH_AT:
mask = sfl->blocksize - 1;
page = (offset & ~mask) << 1;
byte = offset & mask;
/* Read main memory page into buffer 1 */
if (byte || (len < sfl->blocksize))
{
W_REG (osh, &cc->flashaddress, page);
sflash_cmd (osh, cc, SFLASH_AT_BUF1_LOAD);
/* 250 us for AT45DB321B */
SPINWAIT (sflash_poll (sbh, cc, offset), 1000);
ASSERT (!sflash_poll (sbh, cc, offset));
}
/* Write into buffer 1 */
for (ret = 0; (ret < (int) len) && (byte < sfl->blocksize); ret++)
{
W_REG (osh, &cc->flashaddress, byte++);
W_REG (osh, &cc->flashdata, *buf++);
sflash_cmd (osh, cc, SFLASH_AT_BUF1_WRITE);
}
/* Write buffer 1 into main memory page */
W_REG (osh, &cc->flashaddress, page);
sflash_cmd (osh, cc, SFLASH_AT_BUF1_PROGRAM);
break;
}
return ret;
memset(&sflash, 0, sizeof(struct sflash_mtd));
init_MUTEX(&sflash.lock);
/* attach to the backplane */
if (!(sflash.sbh = sb_kattach(SB_OSH))) {
printk(KERN_ERR "sflash: error attaching to backplane\n");
ret = -EIO;
goto fail;
}
/* Map registers and flash base */
if (!(sflash.cc = ioremap_nocache(pci_resource_start(pdev, 0),
pci_resource_len(pdev, 0)))) {
printk(KERN_ERR "sflash: error mapping registers\n");
ret = -EIO;
goto fail;
}
/* Initialize serial flash access */
if (!(info = sflash_init(sflash.sbh, sflash.cc))) {
printk(KERN_ERR "sflash: found no supported devices\n");
ret = -ENODEV;
goto fail;
}
printk(KERN_INFO "sflash: found serial flash; blocksize=%dKB, numblocks=%d, size=%dKB\n",info->blocksize/1024,info->numblocks,info->size/1024);
/* Setup region info */
sflash.region.offset = 0;
sflash.region.erasesize = info->blocksize;
sflash.region.numblocks = info->numblocks;
if (sflash.region.erasesize > sflash.mtd.erasesize)
sflash.mtd.erasesize = sflash.region.erasesize;
sflash.mtd.size = info->size;
sflash.mtd.numeraseregions = 1;
/* Register with MTD */
sflash.mtd.name = "sflash";
sflash.mtd.type = MTD_NORFLASH;
sflash.mtd.flags = MTD_CAP_NORFLASH;
sflash.mtd.eraseregions = &sflash.region;
sflash.mtd.module = THIS_MODULE;
sflash.mtd.erase = sflash_mtd_erase;
sflash.mtd.read = sflash_mtd_read;
sflash.mtd.write = sflash_mtd_write;
sflash.mtd.priv = &sflash;
#ifdef CONFIG_MTD_PARTITIONS
parts = init_mtd_partitions(&sflash.mtd, sflash.mtd.size);
for (i = 0; parts[i].name; i++);
ret = add_mtd_partitions(&sflash.mtd, parts, i);
#else
ret = add_mtd_device(&sflash.mtd);
#endif
if (ret) {
printk(KERN_ERR "sflash: add_mtd failed\n");
goto fail;
}
return 0;
fail:
if (sflash.cc)
iounmap((void *) sflash.cc);
if (sflash.sbh)
sb_detach(sflash.sbh);
return ret;
}
/* Erase a region. Returns number of bytes scheduled for erasure.
* Caller should poll for completion.
*/
int
sflash_erase (sb_t * sbh, chipcregs_t * cc, uint offset)
mod_exit_t
sflash_mtd_exit(void)
{
struct sflash *sfl;
osl_t *osh;
ASSERT (sbh);
osh = sb_osh (sbh);
if (offset >= sflash.size)
return -22;
sfl = &sflash;
switch (sfl->type)
{
case SFLASH_ST:
sflash_cmd (osh, cc, SFLASH_ST_WREN);
W_REG (osh, &cc->flashaddress, offset);
sflash_cmd (osh, cc, SFLASH_ST_SE);
return sfl->blocksize;
case SFLASH_AT:
W_REG (osh, &cc->flashaddress, offset << 1);
sflash_cmd (osh, cc, SFLASH_AT_PAGE_ERASE);
return sfl->blocksize;
}
return 0;
#ifdef CONFIG_MTD_PARTITIONS
del_mtd_partitions(&sflash.mtd);
#else
del_mtd_device(&sflash.mtd);
#endif
iounmap((void *) sflash.cc);
sb_detach(sflash.sbh);
}
/*
* writes the appropriate range of flash, a NULL buf simply erases
* the region of flash
*/
int
sflash_commit (sb_t * sbh, chipcregs_t * cc, uint offset, uint len,
const uchar * buf)
{
struct sflash *sfl;
uchar *block = NULL, *cur_ptr, *blk_ptr;
uint blocksize = 0, mask, cur_offset, cur_length, cur_retlen, remainder;
uint blk_offset, blk_len, copied;
int bytes, ret = 0;
osl_t *osh;
ASSERT (sbh);
osh = sb_osh (sbh);
/* Check address range */
if (len <= 0)
return 0;
sfl = &sflash;
if ((offset + len) > sfl->size)
return -1;
blocksize = sfl->blocksize;
mask = blocksize - 1;
/* Allocate a block of mem */
if (!(block = MALLOC (osh, blocksize)))
return -1;
while (len)
{
/* Align offset */
cur_offset = offset & ~mask;
cur_length = blocksize;
cur_ptr = block;
remainder = blocksize - (offset & mask);
if (len < remainder)
cur_retlen = len;
else
cur_retlen = remainder;
/* buf == NULL means erase only */
if (buf)
{
/* Copy existing data into holding block if necessary */
if ((offset & mask) || (len < blocksize))
{
blk_offset = cur_offset;
blk_len = cur_length;
blk_ptr = cur_ptr;
/* Copy entire block */
while (blk_len)
{
copied =
sflash_read (sbh, cc, blk_offset, blk_len, blk_ptr);
blk_offset += copied;
blk_len -= copied;
blk_ptr += copied;
}
}
/* Copy input data into holding block */
memcpy (cur_ptr + (offset & mask), buf, cur_retlen);
}
/* Erase block */
if ((ret = sflash_erase (sbh, cc, (uint) cur_offset)) < 0)
goto done;
while (sflash_poll (sbh, cc, (uint) cur_offset));
/* buf == NULL means erase only */
if (!buf)
{
offset += cur_retlen;
len -= cur_retlen;
continue;
}
/* Write holding block */
while (cur_length > 0)
{
if ((bytes = sflash_write (sbh, cc,
(uint) cur_offset,
(uint) cur_length,
(uchar *) cur_ptr)) < 0)
{
ret = bytes;
goto done;
}
while (sflash_poll (sbh, cc, (uint) cur_offset));
cur_offset += bytes;
cur_length -= bytes;
cur_ptr += bytes;
}
offset += cur_retlen;
len -= cur_retlen;
buf += cur_retlen;
}
ret = len;
done:
if (block)
MFREE (osh, block, blocksize);
return ret;
}
module_init(sflash_mtd_init);
module_exit(sflash_mtd_exit);

View File

@@ -1,3 +1,13 @@
--- a/arch/mips/bcm947xx/Makefile
+++ b/arch/mips/bcm947xx/Makefile
@@ -11,6 +11,7 @@
obj-y := prom.o setup.o time.o sbmips.o gpio.o
obj-y += nvram.o nvram_linux.o cfe_env.o hndpmu.o
obj-y += sbutils.o utils.o bcmsrom.o hndchipc.o
+obj-y += sflash.o
obj-$(CONFIG_PCI) += sbpci.o pcibios.o
obj-y += export.o
--- a/drivers/mtd/devices/Config.in
+++ b/drivers/mtd/devices/Config.in
@@ -5,6 +5,7 @@

View File

@@ -14,7 +14,7 @@ FEATURES:=squashfs usb
LINUX_VERSION:=2.6.30.10
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += hostapd-mini kmod-switch kmod-diag nvram
DEFAULT_PACKAGES += wpad-mini kmod-switch kmod-diag nvram
define Target/Description
Build firmware images for Broadcom based routers

View File

@@ -14,7 +14,7 @@ LINUX_VERSION:=2.6.30.10
include $(INCLUDE_DIR)/target.mk
DEFAULT_PACKAGES += hostapd-mini kmod-switch gpioctl
DEFAULT_PACKAGES += wpad-mini kmod-switch gpioctl
define Target/Description
Build firmware images for Broadcom based xDSL/routers

View File

@@ -33,6 +33,7 @@
#include <bcm63xx_dev_usb_udc.h>
#include <bcm63xx_dev_spi.h>
#include <board_bcm963xx.h>
#include <linux/input.h>
#define PFX "board_bcm963xx: "
@@ -295,6 +296,16 @@ static struct board_info __initdata board_96348gw_11 = {
.active_low = 1,
},
},
.reset_buttons = {
{
.desc = "reset",
.gpio = 32,
.active_low = 1,
.type = EV_KEY,
.code = BTN_0,
.threshold = 3,
},
},
};
static struct board_info __initdata board_96348gw = {
@@ -330,16 +341,6 @@ static struct board_info __initdata board_96348gw = {
.gpio = 2,
.active_low = 1,
},
{
.name = "ppp",
.gpio = 3,
.active_low = 1,
},
{
.name = "ppp-fail",
.gpio = 4,
.active_low = 1,
},
{
.name = "power",
.gpio = 0,
@@ -351,7 +352,41 @@ static struct board_info __initdata board_96348gw = {
.gpio = 1,
.active_low = 1,
},
{
.name = "line1",
.gpio = 4,
.active_low = 1,
},
{
.name = "line2",
.gpio = 5,
.active_low = 1,
},
{ .name = "line3",
.gpio = 6,
.active_low = 1,
},
{
.name = "tel",
.gpio = 7,
.active_low = 1,
},
{
.name = "eth",
.gpio = 35,
.active_low = 1,
},
},
.reset_buttons = {
{
.desc = "reset",
.gpio = 36,
.active_low = 1,
.type = EV_KEY,
.code = BTN_0,
.threshold = 3,
},
},
};
static struct board_info __initdata board_FAST2404 = {
@@ -559,6 +594,64 @@ static struct board_info __initdata board_AGPFS0 = {
.has_ohci0 = 1,
.has_ehci0 = 1,
.leds = {
/*Each led on alice gate is bi-color so final char */
/* is r for red and g for green leds */
{
.name = "pwrr",
.gpio = 5,
.active_low = 1,
},
{
.name = "pwrg",
.gpio = 4,
.active_low = 1,
.default_trigger = "default-on",
},
{
.name = "wifir",
.gpio = 23,
.active_low = 1,
},
{
.name = "wifig",
.gpio = 22,
.active_low = 1,
},
{
.name = "usr1r",
.gpio = 27,
.active_low = 1,
},
{
.name = "usr1g",
.gpio = 26,
.active_low = 1,
},
{
.name = "usr2r",
.gpio = 30,
.active_low = 1,
},
{
.name = "usr2g",
.gpio = 29,
.active_low = 1,
},
},
.reset_buttons = {
{
.desc = "sw2",
.gpio = 37,
.active_low = 1,
.type = EV_KEY,
.code = BTN_0,
.threshold = 3,
},
},
/* sw1 is connected to gpio34*/
};
static struct board_info __initdata board_DWVS0 = {
@@ -820,11 +913,11 @@ static struct platform_device bcm63xx_gpio_leds = {
.dev.platform_data = &bcm63xx_led_data,
};
struct gpio_buttons_platform_data bcm63xx_gpio_buttons_data = {
static struct gpio_buttons_platform_data bcm63xx_gpio_buttons_data = {
.poll_interval = 20,
};
struct platform_device bcm63xx_gpio_buttons_device = {
static struct platform_device bcm63xx_gpio_buttons_device = {
.name = "gpio-buttons",
.id = 0,
.dev.platform_data = &bcm63xx_gpio_buttons_data,
@@ -898,9 +991,9 @@ int __init board_register_devices(void)
platform_device_register(&bcm63xx_gpio_leds);
if (board.reset_btn) {
bcm63xx_gpio_buttons_data.nbuttons = 1,
bcm63xx_gpio_buttons_data.buttons = board.reset_btn;
if (board.reset_buttons) {
bcm63xx_gpio_buttons_data.nbuttons = ARRAY_SIZE(board.reset_buttons);
bcm63xx_gpio_buttons_data.buttons = board.reset_buttons;
platform_device_register(&bcm63xx_gpio_buttons_device);
}

View File

@@ -55,10 +55,10 @@ struct board_info {
struct bcm63xx_dsp_platform_data dsp;
/* GPIO LEDs */
struct gpio_led leds[5];
struct gpio_led leds[8];
/* Reset button */
unsigned int reset_btn;
struct gpio_button reset_buttons[1];
};
#endif /* ! BOARD_BCM963XX_H_ */

View File

@@ -1,6 +1,7 @@
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -83,7 +83,7 @@ all-$(CONFIG_BOOT_ELF64) := $(vmlinux-64
diff -urN linux-2.6.30.10/arch/mips/Makefile linux-2.6.30.10.new//arch/mips/Makefile
--- linux-2.6.30.10/arch/mips/Makefile 2010-01-29 16:12:01.000000000 +0100
+++ linux-2.6.30.10.new//arch/mips/Makefile 2009-12-04 07:00:07.000000000 +0100
@@ -83,7 +83,7 @@
cflags-y += -G 0 -mno-abicalls -fno-pic -pipe
cflags-y += -msoft-float
LDFLAGS_vmlinux += -G 0 -static -n -nostdlib
@@ -9,23 +10,25 @@
cflags-y += -ffreestanding
--- a/arch/mips/include/asm/module.h
+++ b/arch/mips/include/asm/module.h
@@ -9,11 +9,6 @@ struct mod_arch_specific {
diff -urN linux-2.6.30.10/arch/mips/include/asm/module.h linux-2.6.30.10.new//arch/mips/include/asm/module.h
--- linux-2.6.30.10/arch/mips/include/asm/module.h 2010-01-29 16:12:01.000000000 +0100
+++ linux-2.6.30.10.new//arch/mips/include/asm/module.h 2009-12-04 07:00:07.000000000 +0100
@@ -9,11 +9,6 @@
struct list_head dbe_list;
const struct exception_table_entry *dbe_start;
const struct exception_table_entry *dbe_end;
-
- void *plt_tbl;
- unsigned int core_plt_offset;
- unsigned int core_plt_size;
- unsigned int init_plt_offset;
- void *phys_plt_tbl;
- void *virt_plt_tbl;
- unsigned int phys_plt_offset;
- unsigned int virt_plt_offset;
};
typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */
--- a/arch/mips/kernel/module.c
+++ b/arch/mips/kernel/module.c
@@ -43,116 +43,6 @@ static struct mips_hi16 *mips_hi16_list;
diff -urN linux-2.6.30.10/arch/mips/kernel/module.c linux-2.6.30.10.new//arch/mips/kernel/module.c
--- linux-2.6.30.10/arch/mips/kernel/module.c 2010-01-29 16:12:01.000000000 +0100
+++ linux-2.6.30.10.new//arch/mips/kernel/module.c 2009-12-04 07:00:07.000000000 +0100
@@ -43,116 +43,6 @@
static LIST_HEAD(dbe_list);
static DEFINE_SPINLOCK(dbe_lock);
@@ -142,7 +145,7 @@
void *module_alloc(unsigned long size)
{
#ifdef MODULE_START
@@ -168,45 +58,16 @@ void *module_alloc(unsigned long size)
@@ -168,101 +58,23 @@
return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL);
#else
@@ -190,7 +193,26 @@
/* FIXME: If module_region == mod->init_region, trim exception
table entries. */
}
@@ -214,24 +75,6 @@ void module_free(struct module *mod, voi
-static void *__module_alloc(int size, bool phys)
-{
- void *ptr;
-
- if (phys)
- ptr = kmalloc(size, GFP_KERNEL);
- else
- ptr = vmalloc(size);
- return ptr;
-}
-
-static void __module_free(void *ptr)
-{
- if (is_phys_addr(ptr))
- kfree(ptr);
- else
- vfree(ptr);
-}
-
int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs,
char *secstrings, struct module *mod)
{
@@ -205,17 +227,29 @@
- core_size = get_plt_size(hdr, sechdrs, secstrings, symindex, false);
- init_size = get_plt_size(hdr, sechdrs, secstrings, symindex, true);
-
- mod->arch.core_plt_offset = 0;
- mod->arch.core_plt_size = core_size;
- mod->arch.init_plt_offset = core_size;
- mod->arch.plt_tbl = kmalloc(core_size + init_size, GFP_KERNEL);
- if (!mod->arch.plt_tbl)
- mod->arch.phys_plt_offset = 0;
- mod->arch.virt_plt_offset = 0;
- mod->arch.phys_plt_tbl = NULL;
- mod->arch.virt_plt_tbl = NULL;
-
- if ((core_size + init_size) == 0)
- return 0;
-
- mod->arch.phys_plt_tbl = __module_alloc(core_size + init_size, 1);
- if (!mod->arch.phys_plt_tbl)
- return -ENOMEM;
-
- mod->arch.virt_plt_tbl = __module_alloc(core_size + init_size, 0);
- if (!mod->arch.virt_plt_tbl) {
- __module_free(mod->arch.phys_plt_tbl);
- mod->arch.phys_plt_tbl = NULL;
- return -ENOMEM;
- }
-
return 0;
}
@@ -254,41 +97,27 @@ static int apply_r_mips_32_rela(struct m
@@ -285,37 +97,27 @@
return 0;
}
@@ -235,20 +269,13 @@
- tramp[1] = 0x27390000 | (v & 0xffff); /* addiu t9, t9, lo16 */
- tramp[2] = 0x03200008; /* jr t9 */
- tramp[3] = 0x00000000; /* nop */
-
- return (Elf_Addr) tramp;
-}
+ if (v % 4) {
+ printk(KERN_ERR "module %s: dangerous relocation\n", me->name);
+ return -ENOEXEC;
+ }
-static Elf_Addr add_plt_entry(struct module *me, void *location, Elf_Addr v)
-{
- if (location >= me->module_core &&
- location < me->module_core + me->core_size)
- return add_plt_entry_to(&me->arch.core_plt_offset,
- me->arch.plt_tbl, v);
- return (Elf_Addr) tramp;
-}
+ if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
+ printk(KERN_ERR
+ "module %s: relocation overflow\n",
@@ -256,14 +283,18 @@
+ return -ENOEXEC;
+ }
- if (location >= me->module_init &&
- location < me->module_init + me->init_size)
- return add_plt_entry_to(&me->arch.init_plt_offset,
- me->arch.plt_tbl, v);
-static Elf_Addr add_plt_entry(struct module *me, void *location, Elf_Addr v)
-{
- if (is_phys_addr(location))
- return add_plt_entry_to(&me->arch.phys_plt_offset,
- me->arch.phys_plt_tbl, v);
- else
- return add_plt_entry_to(&me->arch.virt_plt_offset,
- me->arch.virt_plt_tbl, v);
+ *location = (*location & ~0x03ffffff) |
+ ((*location + (v >> 2)) & 0x03ffffff);
return 0;
+ return 0;
}
-static int set_r_mips_26(struct module *me, u32 *location, u32 ofs, Elf_Addr v)
@@ -271,7 +302,7 @@
{
if (v % 4) {
printk(KERN_ERR "module %s: dangerous relocation\n", me->name);
@@ -296,31 +125,17 @@ static int set_r_mips_26(struct module *
@@ -323,31 +125,17 @@
}
if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) {
@@ -306,18 +337,20 @@
static int apply_r_mips_hi16_rel(struct module *me, u32 *location, Elf_Addr v)
{
struct mips_hi16 *n;
@@ -585,23 +400,11 @@ int module_finalize(const Elf_Ehdr *hdr,
@@ -612,32 +400,11 @@
list_add(&me->arch.dbe_list, &dbe_list);
spin_unlock_irq(&dbe_lock);
}
-
- /* Get rid of the fixup trampoline if we're running the module
- * from physically mapped address space */
- if (me->arch.core_plt_offset == 0 &&
- me->arch.init_plt_offset == me->arch.core_plt_size &&
- is_phys_addr(me->module_core)) {
- kfree(me->arch.plt_tbl);
- me->arch.plt_tbl = NULL;
- if (me->arch.phys_plt_offset == 0) {
- __module_free(me->arch.phys_plt_tbl);
- me->arch.phys_plt_tbl = NULL;
- }
- if (me->arch.virt_plt_offset == 0) {
- __module_free(me->arch.virt_plt_tbl);
- me->arch.virt_plt_tbl = NULL;
- }
-
return 0;
@@ -325,8 +358,15 @@
void module_arch_cleanup(struct module *mod)
{
- if (mod->arch.plt_tbl)
- kfree(mod->arch.plt_tbl);
- if (mod->arch.phys_plt_tbl) {
- __module_free(mod->arch.phys_plt_tbl);
- mod->arch.phys_plt_tbl = NULL;
- }
- if (mod->arch.virt_plt_tbl) {
- __module_free(mod->arch.virt_plt_tbl);
- mod->arch.virt_plt_tbl = NULL;
- }
-
spin_lock_irq(&dbe_lock);
list_del(&mod->arch.dbe_list);
spin_unlock_irq(&dbe_lock);

View File

@@ -5,7 +5,7 @@
cfi_fixup_major_minor(cfi, extp);
- if (extp->MajorVersion != '1' ||
+ if (extp->MajorVersion < '1' || extp->MajorVersion > '3' ||
+ if (extp->MajorVersion < '0' || extp->MajorVersion > '3' ||
(extp->MinorVersion < '0' || extp->MinorVersion > '4')) {
if (cfi->mfr == MANUFACTURER_SAMSUNG &&
(extp->MajorVersion == '3' && extp->MinorVersion == '3')) {

View File

@@ -1,6 +0,0 @@
CONFIG_PARTITION="$(grep "VCTL" /proc/mtd | cut -d: -f1)"
MAC1="$(strings /dev/$CONFIG_PARTITION |grep MAC|cut -d: -f2|cut -c3-14|sed -e 's,\(..\),:\1,g' -e 's,^:,,')"
MAC2="$(strings /dev/$CONFIG_PARTITION |grep MAC|cut -d: -f8|cut -c3-14|sed -e 's,\(..\),:\1,g' -e 's,^:,,')"
ifconfig eth0 hw ether $MAC1 2>/dev/null
ifconfig eth1 hw ether $MAC2 2>/dev/null

View File

@@ -0,0 +1,13 @@
#!/bin/sh
set_ether_mac() {
CONFIG_PARTITION="$(grep "VCTL" /proc/mtd | cut -d: -f1)"
MAC1="$(strings /dev/$CONFIG_PARTITION |grep MAC|cut -d: -f2|cut -c3-14|sed -e 's,\(..\),:\1,g' -e 's,^:,,')"
MAC2="$(strings /dev/$CONFIG_PARTITION |grep MAC|cut -d: -f8|cut -c3-14|sed -e 's,\(..\),:\1,g' -e 's,^:,,')"
ifconfig eth0 hw ether $MAC1 2>/dev/null
ifconfig eth1 hw ether $MAC2 2>/dev/null
}
boot_hook_add preinit_main set_ether_mac

View File

@@ -1707,6 +1707,9 @@ CONFIG_RTC_LIB=y
# CONFIG_RTL8180 is not set
# CONFIG_RTL8187 is not set
# CONFIG_RTL8306_PHY is not set
# CONFIG_RTL8366S_PHY is not set
# CONFIG_RTL8366S_PHY_DEBUG_FS is not set
# CONFIG_RTL8366_SMI is not set
CONFIG_RT_MUTEXES=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_S2IO is not set

View File

@@ -1759,6 +1759,9 @@ CONFIG_RTC_LIB=y
# CONFIG_RTL8187SE is not set
# CONFIG_RTL8192SU is not set
# CONFIG_RTL8306_PHY is not set
# CONFIG_RTL8366S_PHY is not set
# CONFIG_RTL8366S_PHY_DEBUG_FS is not set
# CONFIG_RTL8366_SMI is not set
CONFIG_RT_MUTEXES=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_S2IO is not set

View File

@@ -292,6 +292,7 @@ CONFIG_BT_HCIUSB_SCO=y
# CONFIG_BT_HIDP is not set
# CONFIG_BT is not set
# CONFIG_BT_L2CAP is not set
# CONFIG_BT_MRVL is not set
# CONFIG_BT_RFCOMM is not set
CONFIG_BT_RFCOMM_TTY=y
# CONFIG_BTRFS_FS is not set
@@ -507,6 +508,7 @@ CONFIG_EXPERIMENTAL=y
# CONFIG_EXT3_FS is not set
# CONFIG_EXT3_FS_XATTR is not set
# CONFIG_EXT4DEV_FS is not set
# CONFIG_EXT4_DEBUG is not set
# CONFIG_EXT4_FS is not set
CONFIG_EXTRA_FIRMWARE=""
CONFIG_EXTRA_TARGETS=""
@@ -614,6 +616,7 @@ CONFIG_GENERIC_TIME=y
# CONFIG_GPIOLIB is not set
# CONFIG_GPIO_MAX7301 is not set
# CONFIG_GPIO_MAX732X is not set
# CONFIG_GPIO_MC33880 is not set
# CONFIG_GPIO_MCP23S08 is not set
# CONFIG_GPIO_PCA953X is not set
# CONFIG_GPIO_PCF857X is not set
@@ -1138,6 +1141,7 @@ CONFIG_MAC80211_DEFAULT_PS=y
# CONFIG_MEMSTICK is not set
# CONFIG_MFD_ASIC3 is not set
# CONFIG_MFD_CORE is not set
# CONFIG_MFD_MC13783 is not set
# CONFIG_MFD_PCF50633 is not set
# CONFIG_MFD_SM501 is not set
# CONFIG_MFD_TC6387XB is not set
@@ -1260,6 +1264,7 @@ CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
CONFIG_MTD_ROOTFS_ROOT_DEV=y
CONFIG_MTD_ROOTFS_SPLIT=y
# CONFIG_MTD_SLRAM is not set
# CONFIG_MTD_SST25L is not set
# CONFIG_MTD_TESTS is not set
# CONFIG_MTD_UBI is not set
CONFIG_MTD=y
@@ -1760,6 +1765,7 @@ CONFIG_RTC_DRV_CMOS=y
# CONFIG_RTC_DRV_M48T86 is not set
# CONFIG_RTC_DRV_MAX6900 is not set
# CONFIG_RTC_DRV_MAX6902 is not set
# CONFIG_RTC_DRV_PCF2123 is not set
# CONFIG_RTC_DRV_PCF50606 is not set
# CONFIG_RTC_DRV_PCF8563 is not set
# CONFIG_RTC_DRV_PCF8583 is not set
@@ -1787,6 +1793,9 @@ CONFIG_RTC_LIB=y
# CONFIG_RTL8192E is not set
# CONFIG_RTL8192SU is not set
# CONFIG_RTL8306_PHY is not set
# CONFIG_RTL8366S_PHY is not set
# CONFIG_RTL8366S_PHY_DEBUG_FS is not set
# CONFIG_RTL8366_SMI is not set
CONFIG_RT_MUTEXES=y
CONFIG_RWSEM_GENERIC_SPINLOCK=y
# CONFIG_S2IO is not set
@@ -2008,6 +2017,7 @@ CONFIG_SLAB=y
# CONFIG_SLIP is not set
# CONFIG_SLOB is not set
# CONFIG_SLOW_WORK is not set
# CONFIG_SLOW_WORK_DEBUG is not set
# CONFIG_SLUB_DEBUG is not set
# CONFIG_SLUB is not set
# CONFIG_SMARTJOYPLUS_FF is not set
@@ -2177,6 +2187,7 @@ CONFIG_SQUASHFS=y
# CONFIG_SSB_PCMCIAHOST is not set
CONFIG_SSB_POSSIBLE=y
# CONFIG_SSB_SILENT is not set
# CONFIG_SSB_SDIOHOST is not set
# CONFIG_SSFDC is not set
# CONFIG_STACK_TRACER is not set
CONFIG_STACKTRACE_SUPPORT=y
@@ -2336,11 +2347,13 @@ CONFIG_USB_EHCI_ROOT_HUB_TT=y
CONFIG_USB_EZUSB=y
# CONFIG_USB_FTDI_ELAN is not set
# CONFIG_USB_GADGET is not set
# CONFIG_USB_GL860 is not set
# CONFIG_USB_GPIO_VBUS is not set
# CONFIG_USB_GSPCA_CONEX is not set
# CONFIG_USB_GSPCA_ETOMS is not set
# CONFIG_USB_GSPCA_FINEPIX is not set
# CONFIG_USB_GSPCA is not set
# CONFIG_USB_GSPCA_JEILINJ is not set
# CONFIG_USB_GSPCA_MARS is not set
# CONFIG_USB_GSPCA_MR97310A is not set
# CONFIG_USB_GSPCA_OV519 is not set
@@ -2487,6 +2500,7 @@ CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
# CONFIG_USB_SERIAL_PL2303 is not set
# CONFIG_USB_SERIAL_QUALCOMM is not set
# CONFIG_USB_SERIAL_QUATECH2 is not set
# CONFIG_USB_SERIAL_QUATECH_USB2 is not set
# CONFIG_USB_SERIAL_SAFE is not set
CONFIG_USB_SERIAL_SAFE_PADDED=y
# CONFIG_USB_SERIAL_SIEMENS_MPI is not set
@@ -2557,6 +2571,8 @@ CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
# CONFIG_VIA_VELOCITY is not set
# CONFIG_VIDEO_ADV7170 is not set
# CONFIG_VIDEO_ADV7175 is not set
# CONFIG_VIDEO_ADV7180 is not set
# CONFIG_VIDEO_ADV7343 is not set
# CONFIG_VIDEO_ADV_DEBUG is not set
# CONFIG_VIDEO_ALLOW_V4L1 is not set
# CONFIG_VIDEO_BT819 is not set
@@ -2586,6 +2602,7 @@ CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
# CONFIG_VIDEO_M52790 is not set
# CONFIG_VIDEO_MEDIA is not set
# CONFIG_VIDEO_MSP3400 is not set
# CONFIG_VIDEO_MT9V011 is not set
# CONFIG_VIDEO_MXB is not set
# CONFIG_VIDEO_OUTPUT_CONTROL is not set
# CONFIG_VIDEO_OV7670 is not set
@@ -2612,6 +2629,7 @@ CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y
# CONFIG_VIDEO_TDA9875 is not set
# CONFIG_VIDEO_TEA6415C is not set
# CONFIG_VIDEO_TEA6420 is not set
# CONFIG_VIDEO_THS7303 is not set
# CONFIG_VIDEO_TLV320AIC23B is not set
# CONFIG_VIDEO_TVAUDIO is not set
# CONFIG_VIDEO_TVP514X is not set

View File

@@ -0,0 +1,315 @@
/*
* Realtek RTL8366 SMI interface driver
*
* Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/delay.h>
#include <linux/gpio.h>
#include <linux/spinlock.h>
#include "rtl8366_smi.h"
#define RTL8366_SMI_ACK_RETRY_COUNT 5
#define RTL8366_SMI_CLK_DELAY 10 /* nsec */
static inline void rtl8366_smi_clk_delay(struct rtl8366_smi *smi)
{
ndelay(RTL8366_SMI_CLK_DELAY);
}
static void rtl8366_smi_start(struct rtl8366_smi *smi)
{
unsigned int sda = smi->gpio_sda;
unsigned int sck = smi->gpio_sck;
/*
* Set GPIO pins to output mode, with initial state:
* SCK = 0, SDA = 1
*/
gpio_direction_output(sck, 0);
gpio_direction_output(sda, 1);
rtl8366_smi_clk_delay(smi);
/* CLK 1: 0 -> 1, 1 -> 0 */
gpio_set_value(sck, 1);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 0);
rtl8366_smi_clk_delay(smi);
/* CLK 2: */
gpio_set_value(sck, 1);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sda, 0);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 0);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sda, 1);
}
static void rtl8366_smi_stop(struct rtl8366_smi *smi)
{
unsigned int sda = smi->gpio_sda;
unsigned int sck = smi->gpio_sck;
rtl8366_smi_clk_delay(smi);
gpio_set_value(sda, 0);
gpio_set_value(sck, 1);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sda, 1);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 1);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 0);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 1);
/* add a click */
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 0);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 1);
/* set GPIO pins to input mode */
gpio_direction_input(sda);
gpio_direction_input(sck);
}
static void rtl8366_smi_write_bits(struct rtl8366_smi *smi, u32 data, u32 len)
{
unsigned int sda = smi->gpio_sda;
unsigned int sck = smi->gpio_sck;
for (; len > 0; len--) {
rtl8366_smi_clk_delay(smi);
/* prepare data */
if ( data & ( 1 << (len - 1)) )
gpio_set_value(sda, 1);
else
gpio_set_value(sda, 0);
rtl8366_smi_clk_delay(smi);
/* clocking */
gpio_set_value(sck, 1);
rtl8366_smi_clk_delay(smi);
gpio_set_value(sck, 0);
}
}
static void rtl8366_smi_read_bits(struct rtl8366_smi *smi, u32 len, u32 *data)
{
unsigned int sda = smi->gpio_sda;
unsigned int sck = smi->gpio_sck;
gpio_direction_input(sda);
for (*data = 0; len > 0; len--) {
u32 u;
rtl8366_smi_clk_delay(smi);
/* clocking */
gpio_set_value(sck, 1);
rtl8366_smi_clk_delay(smi);
u = gpio_get_value(sda);
gpio_set_value(sck, 0);
*data |= (u << (len - 1));
}
gpio_direction_output(sda, 0);
}
static int rtl8366_smi_wait_for_ack(struct rtl8366_smi *smi)
{
int retry_cnt;
retry_cnt = 0;
do {
u32 ack;
rtl8366_smi_read_bits(smi, 1, &ack);
if (ack == 0)
break;
if (++retry_cnt > RTL8366_SMI_ACK_RETRY_COUNT)
return -EIO;
} while (1);
return 0;
}
static int rtl8366_smi_write_byte(struct rtl8366_smi *smi, u8 data)
{
rtl8366_smi_write_bits(smi, data, 8);
return rtl8366_smi_wait_for_ack(smi);
}
static int rtl8366_smi_read_byte0(struct rtl8366_smi *smi, u8 *data)
{
u32 t;
/* read data */
rtl8366_smi_read_bits(smi, 8, &t);
*data = (t & 0xff);
/* send an ACK */
rtl8366_smi_write_bits(smi, 0x00, 1);
return 0;
}
static int rtl8366_smi_read_byte1(struct rtl8366_smi *smi, u8 *data)
{
u32 t;
/* read data */
rtl8366_smi_read_bits(smi, 8, &t);
*data = (t & 0xff);
/* send an ACK */
rtl8366_smi_write_bits(smi, 0x01, 1);
return 0;
}
int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data)
{
unsigned long flags;
u8 lo = 0;
u8 hi = 0;
int ret;
spin_lock_irqsave(&smi->lock, flags);
rtl8366_smi_start(smi);
/* send READ command */
ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x01);
if (ret)
goto out;
/* set ADDR[7:0] */
ret = rtl8366_smi_write_byte(smi, addr & 0xff);
if (ret)
goto out;
/* set ADDR[15:8] */
ret = rtl8366_smi_write_byte(smi, addr >> 8);
if (ret)
goto out;
/* read DATA[7:0] */
rtl8366_smi_read_byte0(smi, &lo);
/* read DATA[15:8] */
rtl8366_smi_read_byte1(smi, &hi);
*data = ((u32) lo) | (((u32) hi) << 8);
ret = 0;
out:
rtl8366_smi_stop(smi);
spin_unlock_irqrestore(&smi->lock, flags);
return ret;
}
EXPORT_SYMBOL_GPL(rtl8366_smi_read_reg);
int rtl8366_smi_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data)
{
unsigned long flags;
int ret;
spin_lock_irqsave(&smi->lock, flags);
rtl8366_smi_start(smi);
/* send WRITE command */
ret = rtl8366_smi_write_byte(smi, 0x0a << 4 | 0x04 << 1 | 0x00);
if (ret)
goto out;
/* set ADDR[7:0] */
ret = rtl8366_smi_write_byte(smi, addr & 0xff);
if (ret)
goto out;
/* set ADDR[15:8] */
ret = rtl8366_smi_write_byte(smi, addr >> 8);
if (ret)
goto out;
/* write DATA[7:0] */
ret = rtl8366_smi_write_byte(smi, data & 0xff);
if (ret)
goto out;
/* write DATA[15:8] */
ret = rtl8366_smi_write_byte(smi, data >> 8);
if (ret)
goto out;
ret = 0;
out:
rtl8366_smi_stop(smi);
spin_unlock_irqrestore(&smi->lock, flags);
return ret;
}
EXPORT_SYMBOL_GPL(rtl8366_smi_write_reg);
int rtl8366_smi_init(struct rtl8366_smi *smi)
{
int err;
if (!smi->parent)
return -EINVAL;
err = gpio_request(smi->gpio_sda, dev_name(smi->parent));
if (err) {
dev_err(smi->parent, "gpio_request failed for %u, err=%d\n",
smi->gpio_sda, err);
goto err_out;
}
err = gpio_request(smi->gpio_sck, dev_name(smi->parent));
if (err) {
dev_err(smi->parent, "gpio_request failed for %u, err=%d\n",
smi->gpio_sck, err);
goto err_free_sda;
}
spin_lock_init(&smi->lock);
dev_info(smi->parent, "using GPIO pins %u (SDA) and %u (SCK)\n",
smi->gpio_sda, smi->gpio_sck);
return 0;
err_free_sda:
gpio_free(smi->gpio_sda);
err_out:
return err;
}
EXPORT_SYMBOL_GPL(rtl8366_smi_init);
void rtl8366_smi_cleanup(struct rtl8366_smi *smi)
{
gpio_free(smi->gpio_sck);
gpio_free(smi->gpio_sda);
}
EXPORT_SYMBOL_GPL(rtl8366_smi_cleanup);
MODULE_DESCRIPTION("Realtek RTL8366 SMI interface driver");
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
MODULE_LICENSE("GPL v2");

View File

@@ -0,0 +1,26 @@
/*
* Realtek RTL8366 SMI interface driver defines
*
* Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _RTL8366_SMI_H
#define _RTL8366_SMI_H
struct rtl8366_smi {
struct device *parent;
unsigned int gpio_sda;
unsigned int gpio_sck;
spinlock_t lock;
};
int rtl8366_smi_init(struct rtl8366_smi *smi);
void rtl8366_smi_cleanup(struct rtl8366_smi *smi);
int rtl8366_smi_write_reg(struct rtl8366_smi *smi, u32 addr, u32 data);
int rtl8366_smi_read_reg(struct rtl8366_smi *smi, u32 addr, u32 *data);
#endif /* _RTL8366_SMI_H */

File diff suppressed because it is too large Load Diff

View File

@@ -1,17 +1,19 @@
/*
* Platform data definition for the Realtek RTL8366 ethernet switch driver
* Platform data definition for the Realtek RTL8366S ethernet switch driver
*
* Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _RTL8366_SMI_H
#define _RTL8366_SMI_H
#ifndef _RTL8366S_H
#define _RTL8366S_H
struct rtl8366_smi_platform_data {
#define RTL8366S_DRIVER_NAME "rtl8366s"
struct rtl8366s_platform_data {
unsigned gpio_sda;
unsigned gpio_sck;
};

View File

@@ -1,5 +1,5 @@
--- /dev/null
+++ b/include/asm-mips/mips_machine.h
+++ b/arch/mips/include/asm/mips_machine.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>

View File

@@ -0,0 +1,25 @@
--- a/fs/mini_fo/state.c
+++ b/fs/mini_fo/state.c
@@ -537,17 +537,17 @@ int nondir_mod_to_del(dentry_t *dentry)
dtohd(dentry) = NULL;
dtost(dentry) = DELETED;
- /* add deleted file to META-file */
- meta_add_d_entry(dentry->d_parent,
- dentry->d_name.name,
- dentry->d_name.len);
-
/* was: unlock_dir(hidden_sto_dir_dentry); */
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
#else
up(&hidden_sto_dir_dentry->d_inode->i_sem);
#endif
+ /* add deleted file to META-file */
+ meta_add_d_entry(dentry->d_parent,
+ dentry->d_name.name,
+ dentry->d_name.len);
+
dput(hidden_sto_dir_dentry);
out:

View File

@@ -0,0 +1,39 @@
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -135,4 +135,25 @@ config MDIO_GPIO
To compile this driver as a module, choose M here: the module
will be called mdio-gpio.
+config RTL8366_SMI
+ tristate "Driver for the RTL8366 SMI interface"
+ depends on GENERIC_GPIO
+ ---help---
+ This module implements the SMI interface protocol which is used
+ by some RTL8366 ethernet switch devices via the generic GPIO API.
+
+if RTL8366_SMI
+
+config RTL8366S_PHY
+ tristate "Driver for the Realtek RTL8366S switch"
+ select SWCONFIG
+
+config RTL8366S_PHY_DEBUG_FS
+ bool "RTL8366S switch driver DEBUG_FS support"
+ depends on RTL8366S_PHY
+ depends on DEBUG_FS
+ default n
+
+endif # RTL8366_SMI
+
endif # PHYLIB
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -19,6 +19,8 @@ obj-$(CONFIG_IP175C_PHY) += ip175c.o
obj-$(CONFIG_REALTEK_PHY) += realtek.o
obj-$(CONFIG_AR8216_PHY) += ar8216.o
obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
+obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o
+obj-$(CONFIG_RTL8366S_PHY) += rtl8366s.o
obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
obj-$(CONFIG_FIXED_PHY) += fixed.o
obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o

View File

@@ -618,7 +618,7 @@
+
+config GPIOMMC
+ tristate "MMC/SD over GPIO-based SPI"
+ depends on MMC && MMC_SPI && SPI_GPIO
+ depends on MMC && MMC_SPI && SPI_GPIO_OLD
+ help
+ This driver hooks up the mmc_spi and spi_gpio modules so that
+ MMC/SD cards can be used on a GPIO based bus by bitbanging

View File

@@ -1,5 +1,5 @@
--- /dev/null
+++ b/include/asm-mips/mips_machine.h
+++ b/arch/mips/include/asm/mips_machine.h
@@ -0,0 +1,47 @@
+/*
+ * Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>

View File

@@ -0,0 +1,25 @@
--- a/fs/mini_fo/state.c
+++ b/fs/mini_fo/state.c
@@ -537,17 +537,17 @@ int nondir_mod_to_del(dentry_t *dentry)
dtohd(dentry) = NULL;
dtost(dentry) = DELETED;
- /* add deleted file to META-file */
- meta_add_d_entry(dentry->d_parent,
- dentry->d_name.name,
- dentry->d_name.len);
-
/* was: unlock_dir(hidden_sto_dir_dentry); */
#if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,16)
mutex_unlock(&hidden_sto_dir_dentry->d_inode->i_mutex);
#else
up(&hidden_sto_dir_dentry->d_inode->i_sem);
#endif
+ /* add deleted file to META-file */
+ meta_add_d_entry(dentry->d_parent,
+ dentry->d_name.name,
+ dentry->d_name.len);
+
dput(hidden_sto_dir_dentry);
out:

View File

@@ -0,0 +1,39 @@
--- a/drivers/net/phy/Kconfig
+++ b/drivers/net/phy/Kconfig
@@ -135,4 +135,25 @@ config MDIO_GPIO
To compile this driver as a module, choose M here: the module
will be called mdio-gpio.
+config RTL8366_SMI
+ tristate "Driver for the RTL8366 SMI interface"
+ depends on GENERIC_GPIO
+ ---help---
+ This module implements the SMI interface protocol which is used
+ by some RTL8366 ethernet switch devices via the generic GPIO API.
+
+if RTL8366_SMI
+
+config RTL8366S_PHY
+ tristate "Driver for the Realtek RTL8366S switch"
+ select SWCONFIG
+
+config RTL8366S_PHY_DEBUG_FS
+ bool "RTL8366S switch driver DEBUG_FS support"
+ depends on RTL8366S_PHY
+ depends on DEBUG_FS
+ default n
+
+endif # RTL8366_SMI
+
endif # PHYLIB
--- a/drivers/net/phy/Makefile
+++ b/drivers/net/phy/Makefile
@@ -19,6 +19,8 @@ obj-$(CONFIG_IP175C_PHY) += ip175c.o
obj-$(CONFIG_REALTEK_PHY) += realtek.o
obj-$(CONFIG_AR8216_PHY) += ar8216.o
obj-$(CONFIG_RTL8306_PHY) += rtl8306.o
+obj-$(CONFIG_RTL8366_SMI) += rtl8366_smi.o
+obj-$(CONFIG_RTL8366S_PHY) += rtl8366s.o
obj-$(CONFIG_LSI_ET1011C_PHY) += et1011c.o
obj-$(CONFIG_FIXED_PHY) += fixed.o
obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o

View File

@@ -617,7 +617,7 @@
+config GPIOMMC
+ tristate "MMC/SD over GPIO-based SPI"
+ depends on MMC && MMC_SPI && SPI_GPIO
+ depends on MMC && MMC_SPI && SPI_GPIO_OLD
+ help
+ This driver hooks up the mmc_spi and spi_gpio modules so that
+ MMC/SD cards can be used on a GPIO based bus by bitbanging

View File

@@ -125,7 +125,7 @@
#ifndef CONFIG_MMU
--- a/kernel/signal.c
+++ b/kernel/signal.c
@@ -1061,6 +1061,7 @@ struct sighand_struct *lock_task_sighand
@@ -1062,6 +1062,7 @@ struct sighand_struct *lock_task_sighand
return sighand;
}

Some files were not shown because too many files have changed in this diff Show More