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Code

ar71xx: add AR933x specific glue code for IRQ initialization

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@27059 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2011-05-31 22:53:32 +00:00
parent 771bbc30cf
commit 0570263dcb
2 changed files with 21 additions and 2 deletions
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18
target/linux/ar71xx/files/arch/mips/ar71xx/irq.c
View File

@ -232,6 +232,8 @@ static void __init ar71xx_misc_irq_init(void)
case AR71XX_SOC_AR7240: case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241: case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242: case AR71XX_SOC_AR7242:
case AR71XX_SOC_AR9330:
case AR71XX_SOC_AR9331:
case AR71XX_SOC_AR9341: case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342: case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344: case AR71XX_SOC_AR9344:
@ -292,15 +294,28 @@ asmlinkage void plat_irq_dispatch(void)
void __init arch_init_irq(void) void __init arch_init_irq(void)
{ {
switch (ar71xx_soc) { switch (ar71xx_soc) {
case AR71XX_SOC_AR7130:
case AR71XX_SOC_AR7141:
case AR71XX_SOC_AR7161:
ip2_flush_reg = AR71XX_DDR_REG_FLUSH_PCI;
break;
case AR71XX_SOC_AR7240: case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241: case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242: case AR71XX_SOC_AR7242:
ip2_flush_reg = AR724X_DDR_REG_FLUSH_PCIE; ip2_flush_reg = AR724X_DDR_REG_FLUSH_PCIE;
break; break;
case AR71XX_SOC_AR9130: case AR71XX_SOC_AR9130:
case AR71XX_SOC_AR9132: case AR71XX_SOC_AR9132:
ip2_flush_reg = AR91XX_DDR_REG_FLUSH_WMAC; ip2_flush_reg = AR91XX_DDR_REG_FLUSH_WMAC;
break; break;
case AR71XX_SOC_AR9330:
case AR71XX_SOC_AR9331:
ip2_flush_reg = AR933X_DDR_REG_FLUSH_WMAC;
break;
case AR71XX_SOC_AR9341: case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342: case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344: case AR71XX_SOC_AR9344:
@ -308,8 +323,7 @@ void __init arch_init_irq(void)
break; break;
default: default:
ip2_flush_reg = AR71XX_DDR_REG_FLUSH_PCI; BUG();
break;
} }
mips_cpu_irq_init(); mips_cpu_irq_init();

5
target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h
View File

@ -506,6 +506,11 @@ void ar71xx_gpio_function_setup(u32 set, u32 clear);
#define AR91XX_DDR_REG_FLUSH_USB 0x84 #define AR91XX_DDR_REG_FLUSH_USB 0x84
#define AR91XX_DDR_REG_FLUSH_WMAC 0x88 #define AR91XX_DDR_REG_FLUSH_WMAC 0x88
#define AR933X_DDR_REG_FLUSH_GE0 0x7c
#define AR933X_DDR_REG_FLUSH_GE1 0x80
#define AR933X_DDR_REG_FLUSH_USB 0x84
#define AR933X_DDR_REG_FLUSH_WMAC 0x88
#define AR934X_DDR_REG_FLUSH_GE0 0x9c #define AR934X_DDR_REG_FLUSH_GE0 0x9c
#define AR934X_DDR_REG_FLUSH_GE1 0xa0 #define AR934X_DDR_REG_FLUSH_GE1 0xa0
#define AR934X_DDR_REG_FLUSH_USB 0xa4 #define AR934X_DDR_REG_FLUSH_USB 0xa4