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ramips: add preliminary support for the RT3662/RT3883 SoCs

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30495 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
2012-02-13 15:17:59 +00:00
parent 9aa91c2c63
commit 07c8d27309
40 changed files with 2286 additions and 9 deletions
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104
target/linux/ramips/patches-2.6.39/002-fix-occassional-kernel-hangs.patch Normal file
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@@ -0,0 +1,104 @@
From patchwork Tue Nov 8 14:59:01 2011
Content-Type: text/plain; charset="utf-8"
MIME-Version: 1.0
Content-Transfer-Encoding: 7bit
Subject: MIPS: Kernel hangs occasionally during boot.
Date: Tue, 08 Nov 2011 13:59:01 -0000
From: Al Cooper <alcooperx@gmail.com>
X-Patchwork-Id: 2911
Message-Id: <1320764341-4275-1-git-send-email-alcooperx@gmail.com>
To: ralf@linux-mips.org, linux-mips@linux-mips.org,
linux-kernel@vger.kernel.org
Cc: "Al Cooper" <alcooperx@gmail.com>
The Kernel hangs occasionally during boot after
"Calibrating delay loop..". This is caused by the
c0_compare_int_usable() routine in cevt-r4k.c returning false which
causes the system to disable the timer and hang later. The false
return happens because the routine is using a series of four calls to
irq_disable_hazard() as a delay while it waits for the timer changes
to propagate to the cp0 cause register. On newer MIPS cores, like the 74K,
the series of irq_disable_hazard() calls turn into ehb instructions and
can take as little as a few clock ticks for all 4 instructions. This
is not enough of a delay, so the routine thinks the timer is not working.
This fix uses up to a max number of cycle counter ticks for the delay
and uses back_to_back_c0_hazard() instead of irq_disable_hazard() to
handle the hazard condition between cp0 writes and cp0 reads.
Signed-off-by: Al Cooper <alcooperx@gmail.com>
---
arch/mips/kernel/cevt-r4k.c | 38 +++++++++++++++++++-------------------
1 files changed, 19 insertions(+), 19 deletions(-)
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -103,19 +103,10 @@ static int c0_compare_int_pending(void)
/*
* Compare interrupt can be routed and latched outside the core,
- * so a single execution hazard barrier may not be enough to give
- * it time to clear as seen in the Cause register. 4 time the
- * pipeline depth seems reasonably conservative, and empirically
- * works better in configurations with high CPU/bus clock ratios.
+ * so wait up to worst case number of cycle counter ticks for timer interrupt
+ * changes to propagate to the cause register.
*/
-
-#define compare_change_hazard() \
- do { \
- irq_disable_hazard(); \
- irq_disable_hazard(); \
- irq_disable_hazard(); \
- irq_disable_hazard(); \
- } while (0)
+#define COMPARE_INT_SEEN_TICKS 50
int c0_compare_int_usable(void)
{
@@ -126,8 +117,12 @@ int c0_compare_int_usable(void)
* IP7 already pending? Try to clear it by acking the timer.
*/
if (c0_compare_int_pending()) {
- write_c0_compare(read_c0_count());
- compare_change_hazard();
+ cnt = read_c0_count();
+ write_c0_compare(cnt);
+ back_to_back_c0_hazard();
+ while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
+ if (!c0_compare_int_pending())
+ break;
if (c0_compare_int_pending())
return 0;
}
@@ -136,7 +131,7 @@ int c0_compare_int_usable(void)
cnt = read_c0_count();
cnt += delta;
write_c0_compare(cnt);
- compare_change_hazard();
+ back_to_back_c0_hazard();
if ((int)(read_c0_count() - cnt) < 0)
break;
/* increase delta if the timer was already expired */
@@ -145,12 +140,17 @@ int c0_compare_int_usable(void)
while ((int)(read_c0_count() - cnt) <= 0)
; /* Wait for expiry */
- compare_change_hazard();
+ while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
+ if (c0_compare_int_pending())
+ break;
if (!c0_compare_int_pending())
return 0;
-
- write_c0_compare(read_c0_count());
- compare_change_hazard();
+ cnt = read_c0_count();
+ write_c0_compare(cnt);
+ back_to_back_c0_hazard();
+ while (read_c0_count() < (cnt + COMPARE_INT_SEEN_TICKS))
+ if (!c0_compare_int_pending())
+ break;
if (c0_compare_int_pending())
return 0;

4
target/linux/ramips/patches-2.6.39/101-rt288x_serial_driver_hack.patch
View File

@@ -68,8 +68,8 @@
cards. If unsure, say N.
+config SERIAL_8250_RT288X
+ bool "Ralink RT288x/RT305x serial port support"
+ depends on SERIAL_8250 != n && (SOC_RT288X || SOC_RT305X)
+ bool "Ralink RT288x/RT305x/RT3883 serial port support"
+ depends on SERIAL_8250 != n && (SOC_RT288X || SOC_RT305X || SOC_RT3883)
+ help
+ If you have a Ralink RT288x/RT305x SoC based board and want to use the
+ serial port, say Y to this option. The driver can handle up to 2 serial

2
target/linux/ramips/patches-2.6.39/104-ramips-watchdog-driver.patch
View File

@@ -6,7 +6,7 @@
+config RAMIPS_WDT
+ tristate "Ralink RT288X/RT305X Watchdog Timer"
+ depends on SOC_RT288X || SOC_RT305X
+ depends on SOC_RT288X || SOC_RT305X || SOC_RT3883
+ help
+ Hardware driver for the built-in watchdog timer on the
+ Ralink RT288X/RT305X SoCs.

32
target/linux/ramips/patches-2.6.39/200-rt3883-ehci-glue.patch Normal file
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@@ -0,0 +1,32 @@
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -202,6 +202,15 @@ config USB_CNS3XXX_EHCI
It is needed for high-speed (480Mbit/sec) USB 2.0 device
support.
+config USB_EHCI_RT3883
+ bool "EHCI support for Ralink RT3662/RT3883 SoCs"
+ depends on USB_EHCI_HCD && SOC_RT3883
+ select USB_EHCI_ROOT_HUB_TT
+ default y
+ ---help---
+ Enables support for the built-in EHCI controller present
+ on the Ralink RT3883 SoC.
+
config USB_OXU210HP_HCD
tristate "OXU210HP HCD support"
depends on USB
--- a/drivers/usb/host/ehci-hcd.c
+++ b/drivers/usb/host/ehci-hcd.c
@@ -1267,6 +1267,11 @@ MODULE_LICENSE ("GPL");
#define PLATFORM_DRIVER tegra_ehci_driver
#endif
+#ifdef CONFIG_USB_EHCI_RT3883
+#include "ehci-rt3883.c"
+#define PLATFORM_DRIVER ehci_rt3883_driver
+#endif
+
#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
!defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
!defined(XILINX_OF_PLATFORM_DRIVER)

31
target/linux/ramips/patches-2.6.39/201-rt3883-ohci-glue.patch Normal file
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@@ -0,0 +1,31 @@
--- a/drivers/usb/host/Kconfig
+++ b/drivers/usb/host/Kconfig
@@ -296,6 +296,14 @@ config USB_OHCI_HCD_OMAP3
Enables support for the on-chip OHCI controller on
OMAP3 and later chips.
+config USB_OHCI_RT3883
+ bool "USB OHCI support for the Ralink RT3883 SoCs"
+ depends on USB_OHCI_HCD && SOC_RT3883
+ default y
+ help
+ Enables support for the built-in OHCI controller present on the
+ Ralink RT3883 SoC.
+
config USB_OHCI_HCD_PPC_SOC
bool "OHCI support for on-chip PPC USB controller"
depends on USB_OHCI_HCD && (STB03xxx || PPC_MPC52xx)
--- a/drivers/usb/host/ohci-hcd.c
+++ b/drivers/usb/host/ohci-hcd.c
@@ -1107,6 +1107,11 @@ MODULE_LICENSE ("GPL");
#define PLATFORM_DRIVER ohci_hcd_cns3xxx_driver
#endif
+#ifdef CONFIG_USB_OHCI_RT3883
+#include "ohci-rt3883.c"
+#define PLATFORM_DRIVER ohci_rt3883_driver
+#endif
+
#if !defined(PCI_DRIVER) && \
!defined(PLATFORM_DRIVER) && \
!defined(OMAP1_PLATFORM_DRIVER) && \