From 07d1bcb9235c5ffd2ba619f9c2264a9417cca6fd Mon Sep 17 00:00:00 2001 From: juhosg Date: Thu, 15 Dec 2011 22:25:30 +0000 Subject: [PATCH] ar71xx: ag71xx: allow to connect PHY4 to the CPU on AR934X git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29553 3c298f89-4303-0410-b956-a3cf2f4a3e73 --- .../files/arch/mips/include/asm/mach-ar71xx/platform.h | 2 +- .../ar71xx/files/drivers/net/ag71xx/ag71xx_ar7240.c | 10 +++++++--- 2 files changed, 8 insertions(+), 4 deletions(-) diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/platform.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/platform.h index 88dd05182..206c4d750 100644 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/platform.h +++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/platform.h @@ -18,7 +18,7 @@ #include struct ag71xx_switch_platform_data { - int dummy; + u8 phy4_mii_en:1; }; struct ag71xx_platform_data { diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar7240.c b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar7240.c index ae211be04..722363f2e 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar7240.c +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar7240.c @@ -203,6 +203,9 @@ #define AR934X_OPER_MODE0_MAC_GMII_EN BIT(6) #define AR934X_OPER_MODE0_PHY_MII_EN BIT(10) +#define AR934X_REG_OPER_MODE1 0x08 +#define AR934X_REG_OPER_MODE1_PHY4_MII_EN BIT(28) + #define sw_to_ar7240(_dev) container_of(_dev, struct ar7240sw, swdev) struct ar7240sw { @@ -898,11 +901,8 @@ static struct ar7240sw *ar7240_probe(struct ag71xx *ag) if (sw_is_ar7240(as)) { swdev->name = "AR7240/AR9330 built-in switch"; } else if (sw_is_ar934x(as)) { - struct ag71xx_platform_data *pdata; - swdev->name = "AR934X built-in switch"; - pdata = ag71xx_get_pdata(ag); if (pdata->phy_if_mode == PHY_INTERFACE_MODE_GMII) { ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE0, AR934X_OPER_MODE0_MAC_GMII_EN); @@ -914,6 +914,10 @@ static struct ar7240sw *ar7240_probe(struct ag71xx *ag) ag->dev->name); goto err_free; } + + if (as->swdata->phy4_mii_en) + ar7240sw_reg_set(mii, AR934X_REG_OPER_MODE1, + AR934X_REG_OPER_MODE1_PHY4_MII_EN); } else { pr_err("%s: unsupported chip, ctrl=%08x\n", ag->dev->name, ctrl);