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git://projects.qi-hardware.com/openwrt-xburst.git
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mac80211: add support for AR9550
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@32588 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
parent
0a5e278435
commit
08ec8f0d80
@ -11,7 +11,7 @@ include $(INCLUDE_DIR)/kernel.mk
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PKG_NAME:=mac80211
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PKG_VERSION:=2012-06-14
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PKG_RELEASE:=1
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PKG_RELEASE:=2
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PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources
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PKG_MD5SUM:=009fd7aa420693e30df9090cee9ea189
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@ -0,0 +1,21 @@
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From ba1e32844fcd396d90b357d3a620ffc1abcde614 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 2 Jul 2012 17:10:13 +0200
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Subject: [PATCH 01/20] ath9k: define DEVID for QCA955x
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
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---
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drivers/net/wireless/ath/ath9k/hw.h | 1 +
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1 files changed, 1 insertions(+), 0 deletions(-)
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--- a/drivers/net/wireless/ath/ath9k/hw.h
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+++ b/drivers/net/wireless/ath/ath9k/hw.h
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@@ -48,6 +48,7 @@
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#define AR9300_DEVID_AR9580 0x0033
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#define AR9300_DEVID_AR9462 0x0034
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#define AR9300_DEVID_AR9330 0x0035
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+#define AR9300_DEVID_QCA955X 0x0038
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#define AR5416_AR9100_DEVID 0x000b
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@ -0,0 +1,31 @@
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From b8122a3554e574b154cdf09ae843e6464d8ad1cc Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 2 Jul 2012 17:10:13 +0200
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Subject: [PATCH 02/20] ath9k: define MAC version for AR9550
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
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---
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drivers/net/wireless/ath/ath9k/reg.h | 4 ++++
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1 files changed, 4 insertions(+), 0 deletions(-)
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--- a/drivers/net/wireless/ath/ath9k/reg.h
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+++ b/drivers/net/wireless/ath/ath9k/reg.h
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@@ -798,6 +798,7 @@
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#define AR_SREV_REVISION_9580_10 4 /* AR9580 1.0 */
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#define AR_SREV_VERSION_9462 0x280
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#define AR_SREV_REVISION_9462_20 2
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+#define AR_SREV_VERSION_9550 0x400
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#define AR_SREV_5416(_ah) \
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(((_ah)->hw_version.macVersion == AR_SREV_VERSION_5416_PCI) || \
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@@ -905,6 +906,9 @@
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(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9462) && \
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((_ah)->hw_version.macRev >= AR_SREV_REVISION_9462_20))
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+#define AR_SREV_9550(_ah) \
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+ (((_ah)->hw_version.macVersion == AR_SREV_VERSION_9550))
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+
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#define AR_SREV_9580(_ah) \
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(((_ah)->hw_version.macVersion == AR_SREV_VERSION_9580) && \
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((_ah)->hw_version.macRev >= AR_SREV_REVISION_9580_10))
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@ -0,0 +1,23 @@
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From 9bd8677ad5f1814e0f784f92d07ba8bd38c6bc13 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 2 Jul 2012 17:10:14 +0200
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Subject: [PATCH 03/20] ath9k: set MAC version for AR9550
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
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---
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drivers/net/wireless/ath/ath9k/hw.c | 3 +++
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1 files changed, 3 insertions(+), 0 deletions(-)
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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@@ -343,6 +343,9 @@ static void ath9k_hw_read_revisions(stru
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val = REG_READ(ah, AR_SREV);
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ah->hw_version.macRev = MS(val, AR_SREV_REVISION2);
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return;
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+ case AR9300_DEVID_QCA955X:
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+ ah->hw_version.macVersion = AR_SREV_VERSION_9550;
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+ return;
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}
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val = REG_READ(ah, AR_SREV) & AR_SREV_ID;
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@ -0,0 +1,24 @@
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From 6583f34718e322373130daaca42660c669079384 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 2 Jul 2012 17:15:59 +0200
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Subject: [PATCH 04/20] ath9k: add platform_device_id for AR9550
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
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---
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drivers/net/wireless/ath/ath9k/ahb.c | 4 ++++
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1 files changed, 4 insertions(+), 0 deletions(-)
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--- a/drivers/net/wireless/ath/ath9k/ahb.c
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+++ b/drivers/net/wireless/ath/ath9k/ahb.c
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@@ -35,6 +35,10 @@ static const struct platform_device_id a
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.name = "ar934x_wmac",
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.driver_data = AR9300_DEVID_AR9340,
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},
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+ {
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+ .name = "qca955x_wmac",
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+ .driver_data = AR9300_DEVID_QCA955X,
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+ },
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{},
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};
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@ -0,0 +1,21 @@
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From 7ea9d187a4334e35d9ed1a3cbeb85d0b1275b24c Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 2 Jul 2012 17:10:14 +0200
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Subject: [PATCH 05/20] ath9k: add BB name string for AR9550
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
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---
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drivers/net/wireless/ath/ath9k/hw.c | 1 +
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1 files changed, 1 insertions(+), 0 deletions(-)
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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@@ -3135,6 +3135,7 @@ static struct {
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{ AR_SREV_VERSION_9340, "9340" },
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{ AR_SREV_VERSION_9485, "9485" },
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{ AR_SREV_VERSION_9462, "9462" },
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+ { AR_SREV_VERSION_9550, "9550" },
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};
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/* For devices with external radios */
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@ -0,0 +1,22 @@
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From 68e9cddb98d5a7de130b064ec301e2370679160a Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 2 Jul 2012 17:10:15 +0200
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Subject: [PATCH 06/20] ath9k: clear pciexpress flag for AR9550
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
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---
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drivers/net/wireless/ath/ath9k/hw.c | 2 +-
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1 files changed, 1 insertions(+), 1 deletions(-)
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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@@ -667,7 +667,7 @@ static int __ath9k_hw_init(struct ath_hw
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}
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if (AR_SREV_9271(ah) || AR_SREV_9100(ah) || AR_SREV_9340(ah) ||
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- AR_SREV_9330(ah))
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+ AR_SREV_9330(ah) || AR_SREV_9550(ah))
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ah->is_pciexpress = false;
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ah->hw_version.phyRev = REG_READ(ah, AR_PHY_CHIP_ID);
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@ -0,0 +1,23 @@
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From 3fa372b3d51c310023a20432ebc8f718c31feff0 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 2 Jul 2012 17:10:15 +0200
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Subject: [PATCH 07/20] ath9k: enable TX/RX data byte swap for AR9550
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
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---
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drivers/net/wireless/ath/ath9k/hw.c | 3 ++-
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1 files changed, 2 insertions(+), 1 deletions(-)
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--- a/drivers/net/wireless/ath/ath9k/hw.c
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+++ b/drivers/net/wireless/ath/ath9k/hw.c
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@@ -1985,7 +1985,8 @@ int ath9k_hw_reset(struct ath_hw *ah, st
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REG_WRITE(ah, AR_CFG, AR_CFG_SWTD | AR_CFG_SWRD);
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}
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#ifdef __BIG_ENDIAN
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- else if (AR_SREV_9330(ah) || AR_SREV_9340(ah))
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+ else if (AR_SREV_9330(ah) || AR_SREV_9340(ah) ||
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+ AR_SREV_9550(ah))
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REG_RMW(ah, AR_CFG, AR_CFG_SWRB | AR_CFG_SWTB, 0);
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else
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REG_WRITE(ah, AR_CFG, AR_CFG_SWTD | AR_CFG_SWRD);
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1317
package/mac80211/patches/577-ath9k-add-initvals-for-AR9550.patch
Normal file
1317
package/mac80211/patches/577-ath9k-add-initvals-for-AR9550.patch
Normal file
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,224 @@
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From 2b4e3da2e595e1c76f65f7da752ec1f037446bd2 Mon Sep 17 00:00:00 2001
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From: Gabor Juhos <juhosg@openwrt.org>
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Date: Mon, 2 Jul 2012 17:10:16 +0200
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Subject: [PATCH 09/20] ath9k: add mode register initialization code for AR9550
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Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
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Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
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---
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drivers/net/wireless/ath/ath9k/ar9003_hw.c | 86 ++++++++++++++++++++++++++-
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drivers/net/wireless/ath/ath9k/ar9003_phy.c | 61 +++++++++++++++++++-
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drivers/net/wireless/ath/ath9k/hw.h | 1 +
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3 files changed, 145 insertions(+), 3 deletions(-)
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--- a/drivers/net/wireless/ath/ath9k/ar9003_hw.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_hw.c
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@@ -328,7 +328,61 @@ static void ar9003_hw_init_mode_regs(str
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INIT_INI_ARRAY(&ah->ini_japan2484, AR9462_BBC_TXIFR_COEFFJ,
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ARRAY_SIZE(AR9462_BBC_TXIFR_COEFFJ), 2);
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+ } else if (AR_SREV_9550(ah)) {
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+ /* mac */
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+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
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+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_CORE],
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+ ar955x_1p0_mac_core,
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+ ARRAY_SIZE(ar955x_1p0_mac_core), 2);
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+ INIT_INI_ARRAY(&ah->iniMac[ATH_INI_POST],
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+ ar955x_1p0_mac_postamble,
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+ ARRAY_SIZE(ar955x_1p0_mac_postamble), 5);
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+
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+ /* bb */
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+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_PRE], NULL, 0, 0);
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+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_CORE],
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+ ar955x_1p0_baseband_core,
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+ ARRAY_SIZE(ar955x_1p0_baseband_core), 2);
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+ INIT_INI_ARRAY(&ah->iniBB[ATH_INI_POST],
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+ ar955x_1p0_baseband_postamble,
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+ ARRAY_SIZE(ar955x_1p0_baseband_postamble), 5);
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+
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+ /* radio */
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+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_PRE], NULL, 0, 0);
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+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_CORE],
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+ ar955x_1p0_radio_core,
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+ ARRAY_SIZE(ar955x_1p0_radio_core), 2);
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+ INIT_INI_ARRAY(&ah->iniRadio[ATH_INI_POST],
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+ ar955x_1p0_radio_postamble,
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+ ARRAY_SIZE(ar955x_1p0_radio_postamble), 5);
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+
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+ /* soc */
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+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_PRE],
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+ ar955x_1p0_soc_preamble,
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+ ARRAY_SIZE(ar955x_1p0_soc_preamble), 2);
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+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_CORE], NULL, 0, 0);
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+ INIT_INI_ARRAY(&ah->iniSOC[ATH_INI_POST],
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+ ar955x_1p0_soc_postamble,
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+ ARRAY_SIZE(ar955x_1p0_soc_postamble), 5);
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+ /* rx/tx gain */
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+ INIT_INI_ARRAY(&ah->iniModesRxGain,
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+ ar955x_1p0_common_wo_xlna_rx_gain_table,
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+ ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_table),
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+ 2);
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+ INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
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+ ar955x_1p0_common_wo_xlna_rx_gain_bounds,
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+ ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_bounds),
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+ 5);
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+ INIT_INI_ARRAY(&ah->iniModesTxGain,
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+ ar955x_1p0_modes_xpa_tx_gain_table,
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+ ARRAY_SIZE(ar955x_1p0_modes_xpa_tx_gain_table),
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+ 9);
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+
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+ /* Fast clock modal settings */
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+ INIT_INI_ARRAY(&ah->iniModesFastClock,
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+ ar955x_1p0_modes_fast_clock,
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+ ARRAY_SIZE(ar955x_1p0_modes_fast_clock), 3);
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} else if (AR_SREV_9580(ah)) {
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/* mac */
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INIT_INI_ARRAY(&ah->iniMac[ATH_INI_PRE], NULL, 0, 0);
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@@ -471,6 +525,11 @@ static void ar9003_tx_gain_table_mode0(s
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ar9485_modes_lowest_ob_db_tx_gain_1_1,
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ARRAY_SIZE(ar9485_modes_lowest_ob_db_tx_gain_1_1),
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5);
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+ else if (AR_SREV_9550(ah))
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+ INIT_INI_ARRAY(&ah->iniModesTxGain,
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+ ar955x_1p0_modes_xpa_tx_gain_table,
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+ ARRAY_SIZE(ar955x_1p0_modes_xpa_tx_gain_table),
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+ 9);
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else if (AR_SREV_9580(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9580_1p0_lowest_ob_db_tx_gain_table,
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@@ -515,6 +574,11 @@ static void ar9003_tx_gain_table_mode1(s
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ar9580_1p0_high_ob_db_tx_gain_table,
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ARRAY_SIZE(ar9580_1p0_high_ob_db_tx_gain_table),
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5);
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+ else if (AR_SREV_9550(ah))
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+ INIT_INI_ARRAY(&ah->iniModesTxGain,
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+ ar955x_1p0_modes_no_xpa_tx_gain_table,
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+ ARRAY_SIZE(ar955x_1p0_modes_no_xpa_tx_gain_table),
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+ 9);
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else if (AR_SREV_9462_20(ah))
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INIT_INI_ARRAY(&ah->iniModesTxGain,
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ar9462_modes_high_ob_db_tx_gain_table_2p0,
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@@ -636,7 +700,16 @@ static void ar9003_rx_gain_table_mode0(s
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ar9485Common_wo_xlna_rx_gain_1_1,
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ARRAY_SIZE(ar9485Common_wo_xlna_rx_gain_1_1),
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2);
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- else if (AR_SREV_9580(ah))
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+ else if (AR_SREV_9550(ah)) {
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+ INIT_INI_ARRAY(&ah->iniModesRxGain,
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+ ar955x_1p0_common_rx_gain_table,
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+ ARRAY_SIZE(ar955x_1p0_common_rx_gain_table),
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+ 2);
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+ INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
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+ ar955x_1p0_common_rx_gain_bounds,
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+ ARRAY_SIZE(ar955x_1p0_common_rx_gain_bounds),
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+ 5);
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+ } else if (AR_SREV_9580(ah))
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9580_1p0_rx_gain_table,
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ARRAY_SIZE(ar9580_1p0_rx_gain_table),
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@@ -680,7 +753,16 @@ static void ar9003_rx_gain_table_mode1(s
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ar9462_common_wo_xlna_rx_gain_table_2p0,
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ARRAY_SIZE(ar9462_common_wo_xlna_rx_gain_table_2p0),
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2);
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- else if (AR_SREV_9580(ah))
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+ else if (AR_SREV_9550(ah)) {
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+ INIT_INI_ARRAY(&ah->iniModesRxGain,
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+ ar955x_1p0_common_wo_xlna_rx_gain_table,
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+ ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_table),
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+ 2);
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+ INIT_INI_ARRAY(&ah->ini_modes_rx_gain_bounds,
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+ ar955x_1p0_common_wo_xlna_rx_gain_bounds,
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+ ARRAY_SIZE(ar955x_1p0_common_wo_xlna_rx_gain_bounds),
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+ 5);
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+ } else if (AR_SREV_9580(ah))
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INIT_INI_ARRAY(&ah->iniModesRxGain,
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ar9580_1p0_wo_xlna_rx_gain_table,
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ARRAY_SIZE(ar9580_1p0_wo_xlna_rx_gain_table),
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--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
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+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
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@@ -620,6 +620,50 @@ static void ar9003_hw_prog_ini(struct at
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}
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}
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+static int ar9550_hw_get_modes_txgain_index(struct ath_hw *ah,
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+ struct ath9k_channel *chan)
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+{
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+ int ret;
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+
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+ switch (chan->chanmode) {
|
||||
+ case CHANNEL_A:
|
||||
+ case CHANNEL_A_HT20:
|
||||
+ if (chan->channel <= 5350)
|
||||
+ ret = 1;
|
||||
+ else if ((chan->channel > 5350) && (chan->channel <= 5600))
|
||||
+ ret = 3;
|
||||
+ else
|
||||
+ ret = 5;
|
||||
+ break;
|
||||
+
|
||||
+ case CHANNEL_A_HT40PLUS:
|
||||
+ case CHANNEL_A_HT40MINUS:
|
||||
+ if (chan->channel <= 5350)
|
||||
+ ret = 2;
|
||||
+ else if ((chan->channel > 5350) && (chan->channel <= 5600))
|
||||
+ ret = 4;
|
||||
+ else
|
||||
+ ret = 6;
|
||||
+ break;
|
||||
+
|
||||
+ case CHANNEL_G:
|
||||
+ case CHANNEL_G_HT20:
|
||||
+ case CHANNEL_B:
|
||||
+ ret = 8;
|
||||
+ break;
|
||||
+
|
||||
+ case CHANNEL_G_HT40PLUS:
|
||||
+ case CHANNEL_G_HT40MINUS:
|
||||
+ ret = 7;
|
||||
+ break;
|
||||
+
|
||||
+ default:
|
||||
+ ret = -EINVAL;
|
||||
+ }
|
||||
+
|
||||
+ return ret;
|
||||
+}
|
||||
+
|
||||
static int ar9003_hw_process_ini(struct ath_hw *ah,
|
||||
struct ath9k_channel *chan)
|
||||
{
|
||||
@@ -661,7 +705,22 @@ static int ar9003_hw_process_ini(struct
|
||||
}
|
||||
|
||||
REG_WRITE_ARRAY(&ah->iniModesRxGain, 1, regWrites);
|
||||
- REG_WRITE_ARRAY(&ah->iniModesTxGain, modesIndex, regWrites);
|
||||
+ if (AR_SREV_9550(ah))
|
||||
+ REG_WRITE_ARRAY(&ah->ini_modes_rx_gain_bounds, modesIndex,
|
||||
+ regWrites);
|
||||
+
|
||||
+ if (AR_SREV_9550(ah)) {
|
||||
+ int modes_txgain_index;
|
||||
+
|
||||
+ modes_txgain_index = ar9550_hw_get_modes_txgain_index(ah, chan);
|
||||
+ if (modes_txgain_index < 0)
|
||||
+ return -EINVAL;
|
||||
+
|
||||
+ REG_WRITE_ARRAY(&ah->iniModesTxGain, modes_txgain_index,
|
||||
+ regWrites);
|
||||
+ } else {
|
||||
+ REG_WRITE_ARRAY(&ah->iniModesTxGain, modesIndex, regWrites);
|
||||
+ }
|
||||
|
||||
/*
|
||||
* For 5GHz channels requiring Fast Clock, apply
|
||||
--- a/drivers/net/wireless/ath/ath9k/hw.h
|
||||
+++ b/drivers/net/wireless/ath/ath9k/hw.h
|
||||
@@ -820,6 +820,7 @@ struct ath_hw {
|
||||
struct ar5416IniArray iniModesFastClock;
|
||||
struct ar5416IniArray iniAdditional;
|
||||
struct ar5416IniArray iniModesRxGain;
|
||||
+ struct ar5416IniArray ini_modes_rx_gain_bounds;
|
||||
struct ar5416IniArray iniModesTxGain;
|
||||
struct ar5416IniArray iniCckfirNormal;
|
||||
struct ar5416IniArray iniCckfirJapan2484;
|
@ -0,0 +1,33 @@
|
||||
From 987807e9e1a0ec0767635d0bd63003766fb527ad Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Mon, 2 Jul 2012 17:16:06 +0200
|
||||
Subject: [PATCH 10/20] ath9k: read spur frequency information from eeprom for AR9550
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||
---
|
||||
drivers/net/wireless/ath/ath9k/ar9003_phy.c | 6 ++++--
|
||||
1 files changed, 4 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
|
||||
@@ -180,7 +180,8 @@ static void ar9003_hw_spur_mitigate_mrc_
|
||||
* is out-of-band and can be ignored.
|
||||
*/
|
||||
|
||||
- if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah)) {
|
||||
+ if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah) ||
|
||||
+ AR_SREV_9550(ah)) {
|
||||
spur_fbin_ptr = ar9003_get_spur_chan_ptr(ah,
|
||||
IS_CHAN_2GHZ(chan));
|
||||
if (spur_fbin_ptr[0] == 0) /* No spur */
|
||||
@@ -207,7 +208,8 @@ static void ar9003_hw_spur_mitigate_mrc_
|
||||
if (AR_SREV_9462(ah) && (i == 0 || i == 3))
|
||||
continue;
|
||||
negative = 0;
|
||||
- if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah))
|
||||
+ if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah) ||
|
||||
+ AR_SREV_9550(ah))
|
||||
cur_bb_spur = ath9k_hw_fbin2freq(spur_fbin_ptr[i],
|
||||
IS_CHAN_2GHZ(chan));
|
||||
else
|
@ -0,0 +1,36 @@
|
||||
From a317eaa189d885e53400dc86c131390be17fd760 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Mon, 2 Jul 2012 17:15:58 +0200
|
||||
Subject: [PATCH 11/20] ath9k: fix XPABIASLEVEL settings for AR9550
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||
---
|
||||
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 2 +-
|
||||
drivers/net/wireless/ath/ath9k/ar9003_phy.h | 4 ++--
|
||||
2 files changed, 3 insertions(+), 3 deletions(-)
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
@@ -3519,7 +3519,7 @@ static void ar9003_hw_xpa_bias_level_app
|
||||
|
||||
if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
|
||||
REG_RMW_FIELD(ah, AR_CH0_TOP2, AR_CH0_TOP2_XPABIASLVL, bias);
|
||||
- else if (AR_SREV_9462(ah))
|
||||
+ else if (AR_SREV_9462(ah) || AR_SREV_9550(ah))
|
||||
REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
|
||||
else {
|
||||
REG_RMW_FIELD(ah, AR_CH0_TOP, AR_CH0_TOP_XPABIASLVL, bias);
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
|
||||
@@ -636,8 +636,8 @@
|
||||
|
||||
#define AR_CH0_TOP (AR_SREV_9300(ah) ? 0x16288 : \
|
||||
((AR_SREV_9462(ah) ? 0x1628c : 0x16280)))
|
||||
-#define AR_CH0_TOP_XPABIASLVL (0x300)
|
||||
-#define AR_CH0_TOP_XPABIASLVL_S (8)
|
||||
+#define AR_CH0_TOP_XPABIASLVL (AR_SREV_9550(ah) ? 0x3c0 : 0x300)
|
||||
+#define AR_CH0_TOP_XPABIASLVL_S (AR_SREV_9550(ah) ? 6 : 8)
|
||||
|
||||
#define AR_CH0_THERM (AR_SREV_9300(ah) ? 0x16290 : \
|
||||
((AR_SREV_9485(ah) ? 0x1628c : 0x16294)))
|
@ -0,0 +1,35 @@
|
||||
From 48032d5c88c936fc84a2d676474c5fe714d8ef94 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Mon, 2 Jul 2012 17:15:58 +0200
|
||||
Subject: [PATCH 12/20] ath9k: fix antenna control configuration for AR9550
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||
---
|
||||
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 3 +++
|
||||
drivers/net/wireless/ath/ath9k/ar9003_phy.h | 2 ++
|
||||
2 files changed, 5 insertions(+), 0 deletions(-)
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
@@ -3601,6 +3601,9 @@ static void ar9003_hw_ant_ctrl_apply(str
|
||||
if (AR_SREV_9462(ah)) {
|
||||
REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
|
||||
AR_SWITCH_TABLE_COM_AR9462_ALL, value);
|
||||
+ } else if (AR_SREV_9550(ah)) {
|
||||
+ REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
|
||||
+ AR_SWITCH_TABLE_COM_AR9550_ALL, value);
|
||||
} else
|
||||
REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM,
|
||||
AR_SWITCH_TABLE_COM_ALL, value);
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.h
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.h
|
||||
@@ -650,6 +650,8 @@
|
||||
#define AR_SWITCH_TABLE_COM_ALL_S (0)
|
||||
#define AR_SWITCH_TABLE_COM_AR9462_ALL (0xffffff)
|
||||
#define AR_SWITCH_TABLE_COM_AR9462_ALL_S (0)
|
||||
+#define AR_SWITCH_TABLE_COM_AR9550_ALL (0xffffff)
|
||||
+#define AR_SWITCH_TABLE_COM_AR9550_ALL_S (0)
|
||||
#define AR_SWITCH_TABLE_COM_SPDT (0x00f00000)
|
||||
#define AR_SWITCH_TABLE_COM_SPDT_ALL (0x0000fff0)
|
||||
#define AR_SWITCH_TABLE_COM_SPDT_ALL_S (4)
|
@ -0,0 +1,22 @@
|
||||
From 76ea066dcf42308aec8d20ef75170c1ecae82e60 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Mon, 2 Jul 2012 17:15:58 +0200
|
||||
Subject: [PATCH 13/20] ath9k: fix PAPRD settings for AR9550
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||
---
|
||||
drivers/net/wireless/ath/ath9k/ar9003_paprd.c | 2 +-
|
||||
1 files changed, 1 insertions(+), 1 deletions(-)
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_paprd.c
|
||||
@@ -211,7 +211,7 @@ static int ar9003_paprd_setup_single_tab
|
||||
AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_NUM_CORR_STAGES, 7);
|
||||
REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
|
||||
AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_MIN_LOOPBACK_DEL, 1);
|
||||
- if (AR_SREV_9485(ah) || AR_SREV_9462(ah))
|
||||
+ if (AR_SREV_9485(ah) || AR_SREV_9462(ah) || AR_SREV_9550(ah))
|
||||
REG_RMW_FIELD(ah, AR_PHY_PAPRD_TRAINER_CNTL3,
|
||||
AR_PHY_PAPRD_TRAINER_CNTL3_CF_PAPRD_QUICK_DROP,
|
||||
-3);
|
@ -0,0 +1,32 @@
|
||||
From 5e08c36e3ef57712fee83248d0db3d2837e13f5f Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Mon, 2 Jul 2012 17:15:58 +0200
|
||||
Subject: [PATCH 14/20] ath9k: fix RF channel frequency configuration for AR9550
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||
---
|
||||
drivers/net/wireless/ath/ath9k/ar9003_phy.c | 5 +++--
|
||||
1 files changed, 3 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c
|
||||
@@ -99,7 +99,7 @@ static int ar9003_hw_set_channel(struct
|
||||
channelSel = (freq * 4) / 120;
|
||||
chan_frac = (((freq * 4) % 120) * 0x20000) / 120;
|
||||
channelSel = (channelSel << 17) | chan_frac;
|
||||
- } else if (AR_SREV_9340(ah)) {
|
||||
+ } else if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) {
|
||||
if (ah->is_clk_25mhz) {
|
||||
u32 chan_frac;
|
||||
|
||||
@@ -113,7 +113,8 @@ static int ar9003_hw_set_channel(struct
|
||||
/* Set to 2G mode */
|
||||
bMode = 1;
|
||||
} else {
|
||||
- if (AR_SREV_9340(ah) && ah->is_clk_25mhz) {
|
||||
+ if ((AR_SREV_9340(ah) || AR_SREV_9550(ah)) &&
|
||||
+ ah->is_clk_25mhz) {
|
||||
u32 chan_frac;
|
||||
|
||||
channelSel = (freq * 2) / 75;
|
@ -0,0 +1,34 @@
|
||||
From 70a436c98a8479f15fe6ba7f894f88eede238dfa Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Mon, 2 Jul 2012 17:15:58 +0200
|
||||
Subject: [PATCH 15/20] ath9k: disable SYNC_HOST1_FATAL interrupts for AR9550
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||
---
|
||||
drivers/net/wireless/ath/ath9k/hw.c | 2 +-
|
||||
drivers/net/wireless/ath/ath9k/mac.c | 2 +-
|
||||
2 files changed, 2 insertions(+), 2 deletions(-)
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath9k/hw.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/hw.c
|
||||
@@ -939,7 +939,7 @@ static void ath9k_hw_init_interrupt_mask
|
||||
AR_IMR_RXORN |
|
||||
AR_IMR_BCNMISC;
|
||||
|
||||
- if (AR_SREV_9340(ah))
|
||||
+ if (AR_SREV_9340(ah) || AR_SREV_9550(ah))
|
||||
sync_default &= ~AR_INTR_SYNC_HOST1_FATAL;
|
||||
|
||||
if (AR_SREV_9300_20_OR_LATER(ah)) {
|
||||
--- a/drivers/net/wireless/ath/ath9k/mac.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/mac.c
|
||||
@@ -810,7 +810,7 @@ void ath9k_hw_enable_interrupts(struct a
|
||||
return;
|
||||
}
|
||||
|
||||
- if (AR_SREV_9340(ah))
|
||||
+ if (AR_SREV_9340(ah) || AR_SREV_9550(ah))
|
||||
sync_default &= ~AR_INTR_SYNC_HOST1_FATAL;
|
||||
|
||||
async_mask = AR_INTR_MAC_IRQ;
|
@ -0,0 +1,22 @@
|
||||
From 9c598271929ea9a54f57e82af15260dc4afea590 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Mon, 2 Jul 2012 17:15:58 +0200
|
||||
Subject: [PATCH 16/20] ath9k: skip internal regulator configuration for AR9550
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||
---
|
||||
drivers/net/wireless/ath/ath9k/ar9003_eeprom.c | 2 +-
|
||||
1 files changed, 1 insertions(+), 1 deletions(-)
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c
|
||||
@@ -3970,7 +3970,7 @@ static void ath9k_hw_ar9300_set_board_va
|
||||
ar9003_hw_drive_strength_apply(ah);
|
||||
ar9003_hw_atten_apply(ah, chan);
|
||||
ar9003_hw_quick_drop_apply(ah, chan->channel);
|
||||
- if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah))
|
||||
+ if (!AR_SREV_9330(ah) && !AR_SREV_9340(ah) && !AR_SREV_9550(ah))
|
||||
ar9003_hw_internal_regulator_apply(ah);
|
||||
if (AR_SREV_9485(ah) || AR_SREV_9330(ah) || AR_SREV_9340(ah))
|
||||
ar9003_hw_apply_tuning_caps(ah);
|
@ -0,0 +1,75 @@
|
||||
From d211df2956ae9d696bb0cab985426e0d236544b8 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Mon, 2 Jul 2012 17:16:00 +0200
|
||||
Subject: [PATCH 17/20] ath9k: fix PLL initialization for AR9550
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||
---
|
||||
drivers/net/wireless/ath/ath9k/hw.c | 27 +++++++++++++++++++--------
|
||||
1 files changed, 19 insertions(+), 8 deletions(-)
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath9k/hw.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/hw.c
|
||||
@@ -861,7 +861,7 @@ static void ath9k_hw_init_pll(struct ath
|
||||
/* program BB PLL phase_shift */
|
||||
REG_RMW_FIELD(ah, AR_CH0_BB_DPLL3,
|
||||
AR_CH0_BB_DPLL3_PHASE_SHIFT, 0x1);
|
||||
- } else if (AR_SREV_9340(ah)) {
|
||||
+ } else if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) {
|
||||
u32 regval, pll2_divint, pll2_divfrac, refdiv;
|
||||
|
||||
REG_WRITE(ah, AR_RTC_PLL_CONTROL, 0x1142c);
|
||||
@@ -875,9 +875,15 @@ static void ath9k_hw_init_pll(struct ath
|
||||
pll2_divfrac = 0x1eb85;
|
||||
refdiv = 3;
|
||||
} else {
|
||||
- pll2_divint = 88;
|
||||
- pll2_divfrac = 0;
|
||||
- refdiv = 5;
|
||||
+ if (AR_SREV_9340(ah)) {
|
||||
+ pll2_divint = 88;
|
||||
+ pll2_divfrac = 0;
|
||||
+ refdiv = 5;
|
||||
+ } else {
|
||||
+ pll2_divint = 0x11;
|
||||
+ pll2_divfrac = 0x26666;
|
||||
+ refdiv = 1;
|
||||
+ }
|
||||
}
|
||||
|
||||
regval = REG_READ(ah, AR_PHY_PLL_MODE);
|
||||
@@ -890,8 +896,12 @@ static void ath9k_hw_init_pll(struct ath
|
||||
udelay(100);
|
||||
|
||||
regval = REG_READ(ah, AR_PHY_PLL_MODE);
|
||||
- regval = (regval & 0x80071fff) | (0x1 << 30) | (0x1 << 13) |
|
||||
- (0x4 << 26) | (0x18 << 19);
|
||||
+ if (AR_SREV_9340(ah))
|
||||
+ regval = (regval & 0x80071fff) | (0x1 << 30) |
|
||||
+ (0x1 << 13) | (0x4 << 26) | (0x18 << 19);
|
||||
+ else
|
||||
+ regval = (regval & 0x80071fff) | (0x3 << 30) |
|
||||
+ (0x1 << 13) | (0x4 << 26) | (0x60 << 19);
|
||||
REG_WRITE(ah, AR_PHY_PLL_MODE, regval);
|
||||
REG_WRITE(ah, AR_PHY_PLL_MODE,
|
||||
REG_READ(ah, AR_PHY_PLL_MODE) & 0xfffeffff);
|
||||
@@ -902,7 +912,8 @@ static void ath9k_hw_init_pll(struct ath
|
||||
|
||||
REG_WRITE(ah, AR_RTC_PLL_CONTROL, pll);
|
||||
|
||||
- if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah))
|
||||
+ if (AR_SREV_9485(ah) || AR_SREV_9340(ah) || AR_SREV_9330(ah) ||
|
||||
+ AR_SREV_9550(ah))
|
||||
udelay(1000);
|
||||
|
||||
/* Switch the core clock for ar9271 to 117Mhz */
|
||||
@@ -915,7 +926,7 @@ static void ath9k_hw_init_pll(struct ath
|
||||
|
||||
REG_WRITE(ah, AR_RTC_SLEEP_CLK, AR_RTC_FORCE_DERIVED_CLK);
|
||||
|
||||
- if (AR_SREV_9340(ah)) {
|
||||
+ if (AR_SREV_9340(ah) || AR_SREV_9550(ah)) {
|
||||
if (ah->is_clk_25mhz) {
|
||||
REG_WRITE(ah, AR_RTC_DERIVED_CLK, 0x17c << 1);
|
||||
REG_WRITE(ah, AR_SLP32_MODE, 0x0010f3d7);
|
@ -0,0 +1,23 @@
|
||||
From 29fe3ae617d86bf1b39d15e43cee29b723118648 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Mon, 2 Jul 2012 17:15:59 +0200
|
||||
Subject: [PATCH 18/20] ath9k: enable PLL workaround for AR9550
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||
---
|
||||
drivers/net/wireless/ath/ath9k/main.c | 3 ++-
|
||||
1 files changed, 2 insertions(+), 1 deletions(-)
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath9k/main.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/main.c
|
||||
@@ -167,7 +167,8 @@ static void ath_restart_work(struct ath_
|
||||
|
||||
ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
|
||||
|
||||
- if (AR_SREV_9485(sc->sc_ah) || AR_SREV_9340(sc->sc_ah))
|
||||
+ if (AR_SREV_9340(sc->sc_ah) || AR_SREV_9485(sc->sc_ah) ||
|
||||
+ AR_SREV_9550(sc->sc_ah))
|
||||
ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work,
|
||||
msecs_to_jiffies(ATH_PLL_WORK_INTERVAL));
|
||||
|
@ -0,0 +1,34 @@
|
||||
From f8e7d8fcb297db362c9288ef5f1cd778e7ddd1a9 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Mon, 2 Jul 2012 17:15:59 +0200
|
||||
Subject: [PATCH 19/20] ath9k: set 4ADDRESS bit in RX filter for AR9550
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||
---
|
||||
drivers/net/wireless/ath/ath9k/mac.h | 1 +
|
||||
drivers/net/wireless/ath/ath9k/recv.c | 3 +++
|
||||
2 files changed, 4 insertions(+), 0 deletions(-)
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath9k/mac.h
|
||||
+++ b/drivers/net/wireless/ath/ath9k/mac.h
|
||||
@@ -642,6 +642,7 @@ enum ath9k_rx_filter {
|
||||
ATH9K_RX_FILTER_PHYRADAR = 0x00002000,
|
||||
ATH9K_RX_FILTER_MCAST_BCAST_ALL = 0x00008000,
|
||||
ATH9K_RX_FILTER_CONTROL_WRAPPER = 0x00080000,
|
||||
+ ATH9K_RX_FILTER_4ADDRESS = 0x00100000,
|
||||
};
|
||||
|
||||
#define ATH9K_RATESERIES_RTS_CTS 0x0001
|
||||
--- a/drivers/net/wireless/ath/ath9k/recv.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/recv.c
|
||||
@@ -430,6 +430,9 @@ u32 ath_calcrxfilter(struct ath_softc *s
|
||||
rfilt |= ATH9K_RX_FILTER_MCAST_BCAST_ALL;
|
||||
}
|
||||
|
||||
+ if (AR_SREV_9550(sc->sc_ah))
|
||||
+ rfilt |= ATH9K_RX_FILTER_4ADDRESS;
|
||||
+
|
||||
return rfilt;
|
||||
|
||||
}
|
@ -0,0 +1,29 @@
|
||||
From 23693513280521914ceb6d92c1bd7613e7b19c58 Mon Sep 17 00:00:00 2001
|
||||
From: Gabor Juhos <juhosg@openwrt.org>
|
||||
Date: Mon, 2 Jul 2012 17:16:00 +0200
|
||||
Subject: [PATCH 20/20] ath9k: enable support for AR9550
|
||||
|
||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||
---
|
||||
drivers/net/wireless/ath/ath9k/hw.c | 2 ++
|
||||
1 files changed, 2 insertions(+), 0 deletions(-)
|
||||
|
||||
--- a/drivers/net/wireless/ath/ath9k/hw.c
|
||||
+++ b/drivers/net/wireless/ath/ath9k/hw.c
|
||||
@@ -658,6 +658,7 @@ static int __ath9k_hw_init(struct ath_hw
|
||||
case AR_SREV_VERSION_9485:
|
||||
case AR_SREV_VERSION_9340:
|
||||
case AR_SREV_VERSION_9462:
|
||||
+ case AR_SREV_VERSION_9550:
|
||||
break;
|
||||
default:
|
||||
ath_err(common,
|
||||
@@ -735,6 +736,7 @@ int ath9k_hw_init(struct ath_hw *ah)
|
||||
case AR9300_DEVID_AR9485_PCIE:
|
||||
case AR9300_DEVID_AR9330:
|
||||
case AR9300_DEVID_AR9340:
|
||||
+ case AR9300_DEVID_QCA955X:
|
||||
case AR9300_DEVID_AR9580:
|
||||
case AR9300_DEVID_AR9462:
|
||||
break;
|
Loading…
Reference in New Issue
Block a user