mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
[ifxmips] cleanup uboot package
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@13291 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
thl
113
package/uboot-ifxmips/files/include/LzmaDecode.h
Normal file
113
package/uboot-ifxmips/files/include/LzmaDecode.h
Normal file
@@ -0,0 +1,113 @@
|
||||
/*
|
||||
LzmaDecode.h
|
||||
LZMA Decoder interface
|
||||
|
||||
LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
|
||||
http://www.7-zip.org/
|
||||
|
||||
LZMA SDK is licensed under two licenses:
|
||||
1) GNU Lesser General Public License (GNU LGPL)
|
||||
2) Common Public License (CPL)
|
||||
It means that you can select one of these two licenses and
|
||||
follow rules of that license.
|
||||
|
||||
SPECIAL EXCEPTION:
|
||||
Igor Pavlov, as the author of this code, expressly permits you to
|
||||
statically or dynamically link your code (or bind by name) to the
|
||||
interfaces of this file without subjecting your linked code to the
|
||||
terms of the CPL or GNU LGPL. Any modifications or additions
|
||||
to this file, however, are subject to the LGPL or CPL terms.
|
||||
*/
|
||||
|
||||
#ifndef __LZMADECODE_H
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#define __LZMADECODE_H
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|
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#include "LzmaTypes.h"
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|
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/* #define _LZMA_IN_CB */
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/* Use callback for input data */
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|
||||
/* #define _LZMA_OUT_READ */
|
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/* Use read function for output data */
|
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|
||||
/* #define _LZMA_PROB32 */
|
||||
/* It can increase speed on some 32-bit CPUs,
|
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but memory usage will be doubled in that case */
|
||||
|
||||
/* #define _LZMA_LOC_OPT */
|
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/* Enable local speed optimizations inside code */
|
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|
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#ifdef _LZMA_PROB32
|
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#define CProb UInt32
|
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#else
|
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#define CProb UInt16
|
||||
#endif
|
||||
|
||||
#define LZMA_RESULT_OK 0
|
||||
#define LZMA_RESULT_DATA_ERROR 1
|
||||
|
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#ifdef _LZMA_IN_CB
|
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typedef struct _ILzmaInCallback
|
||||
{
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int (*Read)(void *object, const unsigned char **buffer, SizeT *bufferSize);
|
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} ILzmaInCallback;
|
||||
#endif
|
||||
|
||||
#define LZMA_BASE_SIZE 1846
|
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#define LZMA_LIT_SIZE 768
|
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|
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#define LZMA_PROPERTIES_SIZE 5
|
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|
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typedef struct _CLzmaProperties
|
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{
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int lc;
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int lp;
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int pb;
|
||||
#ifdef _LZMA_OUT_READ
|
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UInt32 DictionarySize;
|
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#endif
|
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}CLzmaProperties;
|
||||
|
||||
int LzmaDecodeProperties(CLzmaProperties *propsRes, const unsigned char *propsData, int size);
|
||||
|
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#define LzmaGetNumProbs(Properties) (LZMA_BASE_SIZE + (LZMA_LIT_SIZE << ((Properties)->lc + (Properties)->lp)))
|
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|
||||
#define kLzmaNeedInitId (-2)
|
||||
|
||||
typedef struct _CLzmaDecoderState
|
||||
{
|
||||
CLzmaProperties Properties;
|
||||
CProb *Probs;
|
||||
|
||||
#ifdef _LZMA_IN_CB
|
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const unsigned char *Buffer;
|
||||
const unsigned char *BufferLim;
|
||||
#endif
|
||||
|
||||
#ifdef _LZMA_OUT_READ
|
||||
unsigned char *Dictionary;
|
||||
UInt32 Range;
|
||||
UInt32 Code;
|
||||
UInt32 DictionaryPos;
|
||||
UInt32 GlobalPos;
|
||||
UInt32 DistanceLimit;
|
||||
UInt32 Reps[4];
|
||||
int State;
|
||||
int RemainLen;
|
||||
unsigned char TempDictionary[4];
|
||||
#endif
|
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} CLzmaDecoderState;
|
||||
|
||||
#ifdef _LZMA_OUT_READ
|
||||
#define LzmaDecoderInit(vs) { (vs)->RemainLen = kLzmaNeedInitId; }
|
||||
#endif
|
||||
|
||||
int LzmaDecode(CLzmaDecoderState *vs,
|
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#ifdef _LZMA_IN_CB
|
||||
ILzmaInCallback *inCallback,
|
||||
#else
|
||||
const unsigned char *inStream, SizeT inSize, SizeT *inSizeProcessed,
|
||||
#endif
|
||||
unsigned char *outStream, SizeT outSize, SizeT *outSizeProcessed);
|
||||
|
||||
#endif
|
||||
45
package/uboot-ifxmips/files/include/LzmaTypes.h
Normal file
45
package/uboot-ifxmips/files/include/LzmaTypes.h
Normal file
@@ -0,0 +1,45 @@
|
||||
/*
|
||||
LzmaTypes.h
|
||||
|
||||
Types for LZMA Decoder
|
||||
|
||||
This file written and distributed to public domain by Igor Pavlov.
|
||||
This file is part of LZMA SDK 4.40 (2006-05-01)
|
||||
*/
|
||||
|
||||
#ifndef __LZMATYPES_H
|
||||
#define __LZMATYPES_H
|
||||
|
||||
#ifndef _7ZIP_BYTE_DEFINED
|
||||
#define _7ZIP_BYTE_DEFINED
|
||||
typedef unsigned char Byte;
|
||||
#endif
|
||||
|
||||
#ifndef _7ZIP_UINT16_DEFINED
|
||||
#define _7ZIP_UINT16_DEFINED
|
||||
typedef unsigned short UInt16;
|
||||
#endif
|
||||
|
||||
#ifndef _7ZIP_UINT32_DEFINED
|
||||
#define _7ZIP_UINT32_DEFINED
|
||||
#ifdef _LZMA_UINT32_IS_ULONG
|
||||
typedef unsigned long UInt32;
|
||||
#else
|
||||
typedef unsigned int UInt32;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
/* #define _LZMA_SYSTEM_SIZE_T */
|
||||
/* Use system's size_t. You can use it to enable 64-bit sizes supporting */
|
||||
|
||||
#ifndef _7ZIP_SIZET_DEFINED
|
||||
#define _7ZIP_SIZET_DEFINED
|
||||
#ifdef _LZMA_SYSTEM_SIZE_T
|
||||
#include <stddef.h>
|
||||
typedef size_t SizeT;
|
||||
#else
|
||||
typedef UInt32 SizeT;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
#endif
|
||||
@@ -1,138 +0,0 @@
|
||||
#ifndef _ARM_ERRNO_H
|
||||
#define _ARM_ERRNO_H
|
||||
|
||||
#define EPERM 1 /* Operation not permitted */
|
||||
#define ENOENT 2 /* No such file or directory */
|
||||
#define ESRCH 3 /* No such process */
|
||||
#define EINTR 4 /* Interrupted system call */
|
||||
#define EIO 5 /* I/O error */
|
||||
#define ENXIO 6 /* No such device or address */
|
||||
#define E2BIG 7 /* Arg list too long */
|
||||
#define ENOEXEC 8 /* Exec format error */
|
||||
#define EBADF 9 /* Bad file number */
|
||||
#define ECHILD 10 /* No child processes */
|
||||
#define EAGAIN 11 /* Try again */
|
||||
#define ENOMEM 12 /* Out of memory */
|
||||
#define EACCES 13 /* Permission denied */
|
||||
#define EFAULT 14 /* Bad address */
|
||||
#define ENOTBLK 15 /* Block device required */
|
||||
#define EBUSY 16 /* Device or resource busy */
|
||||
#define EEXIST 17 /* File exists */
|
||||
#define EXDEV 18 /* Cross-device link */
|
||||
#define ENODEV 19 /* No such device */
|
||||
#define ENOTDIR 20 /* Not a directory */
|
||||
#define EISDIR 21 /* Is a directory */
|
||||
#define EINVAL 22 /* Invalid argument */
|
||||
#define ENFILE 23 /* File table overflow */
|
||||
#define EMFILE 24 /* Too many open files */
|
||||
#define ENOTTY 25 /* Not a typewriter */
|
||||
#define ETXTBSY 26 /* Text file busy */
|
||||
#define EFBIG 27 /* File too large */
|
||||
#define ENOSPC 28 /* No space left on device */
|
||||
#define ESPIPE 29 /* Illegal seek */
|
||||
#define EROFS 30 /* Read-only file system */
|
||||
#define EMLINK 31 /* Too many links */
|
||||
#define EPIPE 32 /* Broken pipe */
|
||||
#define EDOM 33 /* Math argument out of domain of func */
|
||||
#define ERANGE 34 /* Math result not representable */
|
||||
#define EDEADLK 35 /* Resource deadlock would occur */
|
||||
#define ENAMETOOLONG 36 /* File name too long */
|
||||
#define ENOLCK 37 /* No record locks available */
|
||||
#define ENOSYS 38 /* Function not implemented */
|
||||
#define ENOTEMPTY 39 /* Directory not empty */
|
||||
#define ELOOP 40 /* Too many symbolic links encountered */
|
||||
#define EWOULDBLOCK EAGAIN /* Operation would block */
|
||||
#define ENOMSG 42 /* No message of desired type */
|
||||
#define EIDRM 43 /* Identifier removed */
|
||||
#define ECHRNG 44 /* Channel number out of range */
|
||||
#define EL2NSYNC 45 /* Level 2 not synchronized */
|
||||
#define EL3HLT 46 /* Level 3 halted */
|
||||
#define EL3RST 47 /* Level 3 reset */
|
||||
#define ELNRNG 48 /* Link number out of range */
|
||||
#define EUNATCH 49 /* Protocol driver not attached */
|
||||
#define ENOCSI 50 /* No CSI structure available */
|
||||
#define EL2HLT 51 /* Level 2 halted */
|
||||
#define EBADE 52 /* Invalid exchange */
|
||||
#define EBADR 53 /* Invalid request descriptor */
|
||||
#define EXFULL 54 /* Exchange full */
|
||||
#define ENOANO 55 /* No anode */
|
||||
#define EBADRQC 56 /* Invalid request code */
|
||||
#define EBADSLT 57 /* Invalid slot */
|
||||
#define EDEADLOCK 58 /* File locking deadlock error */
|
||||
#define EBFONT 59 /* Bad font file format */
|
||||
#define ENOSTR 60 /* Device not a stream */
|
||||
#define ENODATA 61 /* No data available */
|
||||
#define ETIME 62 /* Timer expired */
|
||||
#define ENOSR 63 /* Out of streams resources */
|
||||
#define ENONET 64 /* Machine is not on the network */
|
||||
#define ENOPKG 65 /* Package not installed */
|
||||
#define EREMOTE 66 /* Object is remote */
|
||||
#define ENOLINK 67 /* Link has been severed */
|
||||
#define EADV 68 /* Advertise error */
|
||||
#define ESRMNT 69 /* Srmount error */
|
||||
#define ECOMM 70 /* Communication error on send */
|
||||
#define EPROTO 71 /* Protocol error */
|
||||
#define EMULTIHOP 72 /* Multihop attempted */
|
||||
#define EDOTDOT 73 /* RFS specific error */
|
||||
#define EBADMSG 74 /* Not a data message */
|
||||
#define EOVERFLOW 75 /* Value too large for defined data type */
|
||||
#define ENOTUNIQ 76 /* Name not unique on network */
|
||||
#define EBADFD 77 /* File descriptor in bad state */
|
||||
#define EREMCHG 78 /* Remote address changed */
|
||||
#define ELIBACC 79 /* Can not access a needed shared library */
|
||||
#define ELIBBAD 80 /* Accessing a corrupted shared library */
|
||||
#define ELIBSCN 81 /* .lib section in a.out corrupted */
|
||||
#define ELIBMAX 82 /* Attempting to link in too many shared libraries */
|
||||
#define ELIBEXEC 83 /* Cannot exec a shared library directly */
|
||||
#define EILSEQ 84 /* Illegal byte sequence */
|
||||
#define ERESTART 85 /* Interrupted system call should be restarted */
|
||||
#define ESTRPIPE 86 /* Streams pipe error */
|
||||
#define EUSERS 87 /* Too many users */
|
||||
#define ENOTSOCK 88 /* Socket operation on non-socket */
|
||||
#define EDESTADDRREQ 89 /* Destination address required */
|
||||
#define EMSGSIZE 90 /* Message too long */
|
||||
#define EPROTOTYPE 91 /* Protocol wrong type for socket */
|
||||
#define ENOPROTOOPT 92 /* Protocol not available */
|
||||
#define EPROTONOSUPPORT 93 /* Protocol not supported */
|
||||
#define ESOCKTNOSUPPORT 94 /* Socket type not supported */
|
||||
#define EOPNOTSUPP 95 /* Operation not supported on transport endpoint */
|
||||
#define EPFNOSUPPORT 96 /* Protocol family not supported */
|
||||
#define EAFNOSUPPORT 97 /* Address family not supported by protocol */
|
||||
#define EADDRINUSE 98 /* Address already in use */
|
||||
#define EADDRNOTAVAIL 99 /* Cannot assign requested address */
|
||||
#define ENETDOWN 100 /* Network is down */
|
||||
#define ENETUNREACH 101 /* Network is unreachable */
|
||||
#define ENETRESET 102 /* Network dropped connection because of reset */
|
||||
#define ECONNABORTED 103 /* Software caused connection abort */
|
||||
#define ECONNRESET 104 /* Connection reset by peer */
|
||||
#define ENOBUFS 105 /* No buffer space available */
|
||||
#define EISCONN 106 /* Transport endpoint is already connected */
|
||||
#define ENOTCONN 107 /* Transport endpoint is not connected */
|
||||
#define ESHUTDOWN 108 /* Cannot send after transport endpoint shutdown */
|
||||
#define ETOOMANYREFS 109 /* Too many references: cannot splice */
|
||||
#define ETIMEDOUT 110 /* Connection timed out */
|
||||
#define ECONNREFUSED 111 /* Connection refused */
|
||||
#define EHOSTDOWN 112 /* Host is down */
|
||||
#define EHOSTUNREACH 113 /* No route to host */
|
||||
#define EALREADY 114 /* Operation already in progress */
|
||||
#define EINPROGRESS 115 /* Operation now in progress */
|
||||
#define ESTALE 116 /* Stale NFS file handle */
|
||||
#define EUCLEAN 117 /* Structure needs cleaning */
|
||||
#define ENOTNAM 118 /* Not a XENIX named type file */
|
||||
#define ENAVAIL 119 /* No XENIX semaphores available */
|
||||
#define EISNAM 120 /* Is a named type file */
|
||||
#define EREMOTEIO 121 /* Remote I/O error */
|
||||
#define EDQUOT 122 /* Quota exceeded */
|
||||
|
||||
#define ENOMEDIUM 123 /* No medium found */
|
||||
#define EMEDIUMTYPE 124 /* Wrong medium type */
|
||||
|
||||
/* Should never be seen by user programs */
|
||||
#define ERESTARTSYS 512
|
||||
#define ERESTARTNOINTR 513
|
||||
#define ERESTARTNOHAND 514 /* restart if no handler.. */
|
||||
#define ENOIOCTLCMD 515 /* No ioctl command */
|
||||
|
||||
#define _LAST_ERRNO 515
|
||||
|
||||
#endif
|
||||
@@ -1,66 +0,0 @@
|
||||
/*
|
||||
* (C) Copyright 2003
|
||||
* Wolfgang Denk, DENX Software Engineering, wd@denx.de.
|
||||
*
|
||||
* See file CREDITS for list of people who contributed to this
|
||||
* project.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or
|
||||
* modify it under the terms of the GNU General Public License as
|
||||
* published by the Free Software Foundation; either version 2 of
|
||||
* the License, or (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
|
||||
* MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file contains the configuration parameters for the DANUBE board.
|
||||
*/
|
||||
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
|
||||
#define EXCEPTION_BASE 0x200
|
||||
|
||||
/*****************************************************************************
|
||||
* DANUBE
|
||||
*****************************************************************************/
|
||||
/* lock cache for C program stack */
|
||||
/* points to ROM */
|
||||
/* stack size is 16K */
|
||||
#define LOCK_DCACHE_ADDR 0x9FC00000
|
||||
#define LOCK_DCACHE_SIZE 0x1000
|
||||
#define CFG_EBU_BOOTWORD 0x688c688c
|
||||
|
||||
#define CFG_HZ (danube_get_cpuclk() / 2)
|
||||
|
||||
|
||||
/*
|
||||
* Memory layout
|
||||
*/
|
||||
//#define CFG_SDRAM_BASE 0x80080000
|
||||
#define CFG_CACHE_LOCK_SIZE LOCK_DCACHE_SIZE
|
||||
#define CFG_INIT_SP_OFFSET CFG_CACHE_LOCK_SIZE
|
||||
|
||||
/*
|
||||
* Cache settings
|
||||
*/
|
||||
#define CFG_CACHE_SIZE 16384
|
||||
#define CFG_CACHE_LINES 32
|
||||
#define CFG_CACHE_WAYS 4
|
||||
#define CFG_CACHE_SETS 128
|
||||
|
||||
#define CFG_ICACHE_SIZE CFG_CACHE_SIZE
|
||||
#define CFG_DCACHE_SIZE CFG_CACHE_SIZE
|
||||
#define CFG_CACHELINE_SIZE CFG_CACHE_LINES
|
||||
|
||||
#endif /* __CONFIG_H */
|
||||
@@ -28,8 +28,6 @@
|
||||
#ifndef __CONFIG_H
|
||||
#define __CONFIG_H
|
||||
|
||||
#include <configs/ifx_cfg.h>
|
||||
|
||||
#define USE_REFERENCE_BOARD
|
||||
//#define USE_EVALUATION_BOARD
|
||||
|
||||
@@ -45,8 +43,12 @@
|
||||
//#define DANUBE_DDR_RAM_133M
|
||||
#define DANUBE_DDR_RAM_SIZE 32 /* 32M DDR-DRAM for reference board */
|
||||
#endif
|
||||
|
||||
#define CONFIG_LZMA 1 /* use LZMA for compression */
|
||||
|
||||
#define CLK_OUT2_25MHZ
|
||||
#define CONFIG_MIPS32 1 /* MIPS 4Kc CPU core */
|
||||
#define CONFIG_IFX_MIPS 1 /* in an Infineon chip */
|
||||
#define CONFIG_DANUBE 1 /* on a danube Board */
|
||||
#define RAM_SIZE 0x2000000 /*32M ram*/
|
||||
|
||||
@@ -63,7 +65,7 @@
|
||||
/* valid baudrates */
|
||||
#define CFG_BAUDRATE_TABLE { 300, 9600, 19200, 38400, 57600, 115200 }
|
||||
|
||||
#ifndef CFG_HEAD_CODE
|
||||
#ifndef CFG_BOOTSTRAP_CODE
|
||||
#define CONFIG_TIMESTAMP /* Print image info with timestamp */
|
||||
#endif
|
||||
|
||||
@@ -78,15 +80,24 @@
|
||||
"ethaddr=11:22:33:44:55:66\0" \
|
||||
"serverip=192.168.45.100\0" \
|
||||
"ipaddr=192.168.45.108\0" \
|
||||
"ram_addr=0x80500000\0" \
|
||||
"kernel_addr=0xb0030000\0" \
|
||||
"flashargs=setenv bootargs rootfstype=squashfs,jffs2 init=/etc/preinit\0" \
|
||||
"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=${serverip}:${rootpath} init=/etc/preinit\0" \
|
||||
"addip=setenv bootargs ${bootargs} ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}:${netdev}:off\0" \
|
||||
"addmisc=setenv bootargs ${bootargs} console=ttyS1,115200 ethaddr=${ethaddr} ${mtdparts}\0" \
|
||||
"flash_flash=run flashargs addip addmisc;bootm ${kernel_addr}\0" \
|
||||
"flash_nfs=run nfsargs addip addmisc;bootm ${kernel_addr}\0" \
|
||||
"net_flash=run load_kernel flashargs addip addmisc;bootm ${ram_addr}\0" \
|
||||
"net_nfs=run load_kernel nfsargs addip addmisc;bootm ${ram_addr}\0" \
|
||||
"load_kernel=tftp ${ram_addr} ${tftppath}openwrt-ifxmips-uImage\0" \
|
||||
"update_uboot=tftp 0x80500000 u-boot.ifx;era 1:0-10; cp.b 0x80500000 0xb0000000 0x10000\0" \
|
||||
"update_openwrt=tftp 0x80500000 openwrt-ifxmips-squashfs.image; era 1:10-120; cp.b 0x80500000 0xb0030000 0x300000\0" \
|
||||
"bootargs=console=ttyS1,115200 rootfstype=squashfs,jffs2 init=/etc/preinit\0"
|
||||
"update_openwrt=tftp ${ram_addr} ${tftppath}openwrt-ifxmips-squashfs.image; era ${kernel_addr} +${filesize} 0; cp.b ${ram_addr} ${kernel_addr} ${filesize}\0"
|
||||
|
||||
#define CONFIG_BOOTCOMMAND "bootm 0xb0030000"
|
||||
#define CONFIG_BOOTCOMMAND "run flash_flash"
|
||||
|
||||
#define CONFIG_COMMANDS_YES (CONFIG_CMD_DFL | \
|
||||
CFG_CMD_ASKENV | \
|
||||
CFG_CMD_DHRYSTONE | \
|
||||
CFG_CMD_NET )
|
||||
|
||||
#define CONFIG_COMMANDS_NO (CFG_CMD_NFS | \
|
||||
@@ -159,8 +170,8 @@
|
||||
//#define CFG_ENV_IS_NOWHERE 1
|
||||
//#define CFG_ENV_IS_IN_NVRAM 1
|
||||
/* Address and size of Primary Environment Sector */
|
||||
#define CFG_ENV_ADDR IFX_CFG_FLASH_UBOOT_CFG_START_ADDR
|
||||
#define CFG_ENV_SIZE IFX_CFG_FLASH_UBOOT_CFG_SIZE
|
||||
#define CFG_ENV_ADDR 0xB0020000
|
||||
#define CFG_ENV_SIZE 0x10000
|
||||
|
||||
#define CONFIG_FLASH_16BIT
|
||||
|
||||
|
||||
@@ -1,249 +0,0 @@
|
||||
/* ============================================================================
|
||||
* Copyright (C) 2003[- 2004] ? Infineon Technologies AG.
|
||||
*
|
||||
* All rights reserved.
|
||||
* ============================================================================
|
||||
*
|
||||
* ============================================================================
|
||||
*
|
||||
* This document contains proprietary information belonging to Infineon
|
||||
* Technologies AG. Passing on and copying of this document, and communication
|
||||
* of its contents is not permitted without prior written authorisation.
|
||||
*
|
||||
* ============================================================================
|
||||
*
|
||||
* File Name: ifx_cfg.h
|
||||
* Author : Mars Lin (mars.lin@infineon.com)
|
||||
* Date:
|
||||
*
|
||||
* ===========================================================================
|
||||
*
|
||||
* Project:
|
||||
* Block:
|
||||
*
|
||||
* ===========================================================================
|
||||
* Contents: This file contains the data structures and definitions used
|
||||
* by the core iptables and the sip alg modules.
|
||||
* ===========================================================================
|
||||
* References:
|
||||
*/
|
||||
|
||||
/*
|
||||
* This file contains the configuration parameters for the IFX board.
|
||||
*/
|
||||
#ifndef _DANUBE_CFG_H_
|
||||
#define _DANUBE_CFG_H_
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* U-Boot/Kernel configurations
|
||||
*/
|
||||
#define IFX_CFG_UBOOT_DEFAULT_CFG_IPADDR "172.20.80.100"
|
||||
#define IFX_CFG_UBOOT_DEFAULT_CFG_SERVERIP "172.20.80.2"
|
||||
#define IFX_CFG_UBOOT_DEFAULT_CFG_ETHADDR "00:E0:92:00:01:40"
|
||||
#define IFX_CFG_UBOOT_DEFAULT_CFG_NETDEV "eth1"
|
||||
#define IFX_CFG_UBOOT_DEFAULT_CFG_BAUDRATE "115200"
|
||||
#define IFX_CFG_UBOOT_LOAD_ADDRESS "0x80800000"
|
||||
|
||||
/* End of U-Boot/Kernel configurations
|
||||
*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
/*-----------------------------------------------------------------------
|
||||
* Board specific configurations
|
||||
*/
|
||||
#ifdef IFX_CONFIG_MEMORY_SIZE
|
||||
#define IFX_CFG_MEM_SIZE 31
|
||||
#else
|
||||
#error "ERROR!! Define memory size first!"
|
||||
#endif
|
||||
|
||||
//2MB flash partition
|
||||
#if (IFX_CONFIG_FLASH_SIZE == 2)
|
||||
#define IFX_CFG_FLASH_PARTITIONS_INFO \
|
||||
"part0_begin=0xB0000000\0" \
|
||||
"part1_begin=0xB0010000\0" \
|
||||
"part2_begin=0xB0050000\0" \
|
||||
"total_part=3\0"
|
||||
|
||||
#define IFX_CFG_FLASH_DATA_BLOCKS_INFO \
|
||||
"data_block0=" IFX_CFG_FLASH_UBOOT_IMAGE_BLOCK_NAME "\0" \
|
||||
"data_block1=" IFX_CFG_FLASH_FIRMWARE_IMAGE_BLOCK_NAME "\0" \
|
||||
"data_block2=" IFX_CFG_FLASH_ROOTFS_IMAGE_BLOCK_NAME "\0" \
|
||||
"data_block3=" IFX_CFG_FLASH_KERNEL_IMAGE_BLOCK_NAME "\0" \
|
||||
"data_block4=" IFX_CFG_FLASH_SYSTEM_CFG_BLOCK_NAME "\0" \
|
||||
"data_block5=" IFX_CFG_FLASH_UBOOT_CFG_BLOCK_NAME "\0" \
|
||||
"data_block6=" IFX_CFG_FLASH_FIRMWARE_DIAG_BLOCK_NAME "\0" \
|
||||
"data_block7=" IFX_CFG_FLASH_CALIBRATION_CFG_BLOCK_NAME "\0" \
|
||||
"total_db=8\0"
|
||||
|
||||
#define IFX_CFG_FLASH_UBOOT_IMAGE_BLOCK_NAME "uboot"
|
||||
#define IFX_CFG_FLASH_UBOOT_IMAGE_START_ADDR 0xB0000000
|
||||
#define IFX_CFG_FLASH_UBOOT_IMAGE_SIZE 0
|
||||
#define IFX_CFG_FLASH_UBOOT_IMAGE_MTDBLOCK_NAME "/dev/mtdblock0"
|
||||
|
||||
#define IFX_CFG_FLASH_FIRMWARE_IMAGE_BLOCK_NAME "firmware"
|
||||
#define IFX_CFG_FLASH_FIRMWARE_IMAGE_START_ADDR 0xB0010000
|
||||
#define IFX_CFG_FLASH_FIRMWARE_IMAGE_SIZE 0
|
||||
#define IFX_CFG_FLASH_FIRMWARE_IMAGE_MTDBLOCK_NAME "/dev/mtdblock1"
|
||||
|
||||
#define IFX_CFG_FLASH_ROOTFS_IMAGE_BLOCK_NAME "rootfs"
|
||||
#define IFX_CFG_FLASH_ROOTFS_IMAGE_START_ADDR 0xB0050000
|
||||
#define IFX_CFG_FLASH_ROOTFS_IMAGE_SIZE 0
|
||||
#define IFX_CFG_FLASH_ROOTFS_IMAGE_MTDBLOCK_NAME "/dev/mtdblock2"
|
||||
|
||||
#define IFX_CFG_FLASH_KERNEL_IMAGE_BLOCK_NAME "kernel"
|
||||
#define IFX_CFG_FLASH_KERNEL_IMAGE_START_ADDR 0xB01FCFFF
|
||||
#define IFX_CFG_FLASH_KERNEL_IMAGE_SIZE 0
|
||||
|
||||
#define IFX_CFG_FLASH_SYSTEM_CFG_BLOCK_NAME "sysconfig"
|
||||
#define IFX_CFG_FLASH_SYSTEM_CFG_START_ADDR 0xB01FD000
|
||||
#define IFX_CFG_FLASH_SYSTEM_CFG_SIZE 0
|
||||
#define IFX_CFG_FLASH_SYSTEM_CFG_END_ADDR 0xB01FEFFF
|
||||
|
||||
#define IFX_CFG_FLASH_UBOOT_CFG_BLOCK_NAME "ubootconfig"
|
||||
#define IFX_CFG_FLASH_UBOOT_CFG_START_ADDR 0xB01FF000
|
||||
#define IFX_CFG_FLASH_UBOOT_CFG_SIZE 0x0C00
|
||||
#define IFX_CFG_FLASH_UBOOT_CFG_END_ADDR 0xB01FFBFF
|
||||
|
||||
#define IFX_CFG_FLASH_FIRMWARE_DIAG_BLOCK_NAME "fwdiag"
|
||||
#define IFX_CFG_FLASH_FIRMWARE_DIAG_START_ADDR 0xB31FFC00
|
||||
#define IFX_CFG_FLASH_FIRMWARE_DIAG_SIZE 0x0200
|
||||
#define IFX_CFG_FLASH_FIRMWARE_DIAG_END_ADDR 0xB01FFDFF
|
||||
|
||||
#define IFX_CFG_FLASH_CALIBRATION_CFG_BLOCK_NAME "calibration"
|
||||
#define IFX_CFG_FLASH_CALIBRATION_CFG_START_ADDR 0xB01FFE00
|
||||
#define IFX_CFG_FLASH_CALIBRATION_CFG_SIZE 0x0200
|
||||
#define IFX_CFG_FLASH_CALIBRATION_CFG_END_ADDR 0xB01FFFFF
|
||||
|
||||
#define IFX_CFG_FLASH_END_ADDR 0xB01FFFFF
|
||||
|
||||
//4MB flash partition
|
||||
#elif (IFX_CONFIG_FLASH_SIZE == 4)
|
||||
#define IFX_CFG_FLASH_PARTITIONS_INFO \
|
||||
"part0_begin=0xB0000000\0" \
|
||||
"part1_begin=0xB0020000\0" \
|
||||
"part2_begin=0xB0060000\0" \
|
||||
"total_part=3\0"
|
||||
|
||||
#define IFX_CFG_FLASH_DATA_BLOCKS_INFO \
|
||||
"data_block0=" IFX_CFG_FLASH_UBOOT_IMAGE_BLOCK_NAME "\0" \
|
||||
"data_block1=" IFX_CFG_FLASH_FIRMWARE_IMAGE_BLOCK_NAME "\0" \
|
||||
"data_block2=" IFX_CFG_FLASH_ROOTFS_IMAGE_BLOCK_NAME "\0" \
|
||||
"data_block3=" IFX_CFG_FLASH_KERNEL_IMAGE_BLOCK_NAME "\0" \
|
||||
"data_block4=" IFX_CFG_FLASH_SYSTEM_CFG_BLOCK_NAME "\0" \
|
||||
"data_block5=" IFX_CFG_FLASH_UBOOT_CFG_BLOCK_NAME "\0" \
|
||||
"data_block6=" IFX_CFG_FLASH_VOIP_CFG_BLOCK_NAME "\0" \
|
||||
"data_block7=" IFX_CFG_FLASH_FIRMWARE_DIAG_BLOCK_NAME "\0" \
|
||||
"data_block8=" IFX_CFG_FLASH_CALIBRATION_CFG_BLOCK_NAME "\0" \
|
||||
"total_db=9\0"
|
||||
|
||||
#define IFX_CFG_FLASH_UBOOT_IMAGE_BLOCK_NAME "uboot"
|
||||
#define IFX_CFG_FLASH_UBOOT_IMAGE_START_ADDR 0xB0000000
|
||||
#define IFX_CFG_FLASH_UBOOT_IMAGE_SIZE 0
|
||||
#define IFX_CFG_FLASH_UBOOT_IMAGE_MTDBLOCK_NAME "/dev/mtdblock0"
|
||||
|
||||
#define IFX_CFG_FLASH_FIRMWARE_IMAGE_BLOCK_NAME "firmware"
|
||||
#define IFX_CFG_FLASH_FIRMWARE_IMAGE_START_ADDR 0xB0020000
|
||||
#define IFX_CFG_FLASH_FIRMWARE_IMAGE_SIZE 0
|
||||
#define IFX_CFG_FLASH_FIRMWARE_IMAGE_MTDBLOCK_NAME "/dev/mtdblock1"
|
||||
|
||||
#define IFX_CFG_FLASH_ROOTFS_IMAGE_BLOCK_NAME "rootfs"
|
||||
#define IFX_CFG_FLASH_ROOTFS_IMAGE_START_ADDR 0xB0060000
|
||||
#define IFX_CFG_FLASH_ROOTFS_IMAGE_SIZE 0
|
||||
#define IFX_CFG_FLASH_ROOTFS_IMAGE_MTDBLOCK_NAME "/dev/mtdblock2"
|
||||
|
||||
#define IFX_CFG_FLASH_KERNEL_IMAGE_BLOCK_NAME "kernel"
|
||||
#define IFX_CFG_FLASH_KERNEL_IMAGE_START_ADDR 0xB03F4FFF
|
||||
#define IFX_CFG_FLASH_KERNEL_IMAGE_SIZE 0
|
||||
|
||||
#define IFX_CFG_FLASH_SYSTEM_CFG_BLOCK_NAME "sysconfig"
|
||||
#define IFX_CFG_FLASH_SYSTEM_CFG_START_ADDR 0xB03F5000
|
||||
#define IFX_CFG_FLASH_SYSTEM_CFG_SIZE 0x2000
|
||||
#define IFX_CFG_FLASH_SYSTEM_CFG_END_ADDR 0xB03F6FFF
|
||||
|
||||
#define IFX_CFG_FLASH_UBOOT_CFG_BLOCK_NAME "ubootconfig"
|
||||
#define IFX_CFG_FLASH_UBOOT_CFG_START_ADDR 0xB03F7000
|
||||
#define IFX_CFG_FLASH_UBOOT_CFG_SIZE 0x0C00
|
||||
#define IFX_CFG_FLASH_UBOOT_CFG_END_ADDR 0xB03F7BFF
|
||||
|
||||
#define IFX_CFG_FLASH_VOIP_CFG_BLOCK_NAME "voip"
|
||||
#define IFX_CFG_FLASH_VOIP_CFG_START_ADDR 0xB03F7C00
|
||||
#define IFX_CFG_FLASH_VOIP_CFG_SIZE 0x8000
|
||||
#define IFX_CFG_FLASH_VOIP_CFG_END_ADDR 0xB03FFBFF
|
||||
|
||||
#define IFX_CFG_FLASH_FIRMWARE_DIAG_BLOCK_NAME "fwdiag"
|
||||
#define IFX_CFG_FLASH_FIRMWARE_DIAG_START_ADDR 0xB03FFC00
|
||||
#define IFX_CFG_FLASH_FIRMWARE_DIAG_SIZE 0x0200
|
||||
#define IFX_CFG_FLASH_FIRMWARE_DIAG_END_ADDR 0xB03FFDFF
|
||||
|
||||
#define IFX_CFG_FLASH_CALIBRATION_CFG_BLOCK_NAME "calibration"
|
||||
#define IFX_CFG_FLASH_CALIBRATION_CFG_START_ADDR 0xB03FFE00
|
||||
#define IFX_CFG_FLASH_CALIBRATION_CFG_SIZE 0x0200
|
||||
#define IFX_CFG_FLASH_CALIBRATION_CFG_END_ADDR 0xB03FFFFF
|
||||
|
||||
#define IFX_CFG_FLASH_END_ADDR 0xB03FFFFF
|
||||
//8MB flash definition
|
||||
#elif (IFX_CONFIG_FLASH_SIZE == 8)
|
||||
#define IFX_CFG_FLASH_PARTITIONS_INFO \
|
||||
"part0_begin=0xB0000000\0" \
|
||||
"part1_begin=0xB0080000\0" \
|
||||
"part2_begin=0xB0280000\0" \
|
||||
"part3_begin=0xB0790000\0" \
|
||||
"part4_begin=0xB07A0000\0" \
|
||||
"part5_begin=0xB07E0000\0" \
|
||||
"total_part=6\0"
|
||||
|
||||
#define IFX_CFG_FLASH_DATA_BLOCKS_INFO \
|
||||
"data_block0=" IFX_CFG_FLASH_UBOOT_IMAGE_BLOCK_NAME "\0" \
|
||||
"data_block1=" IFX_CFG_FLASH_KERNEL_IMAGE_BLOCK_NAME "\0" \
|
||||
"data_block2=" IFX_CFG_FLASH_ROOTFS_IMAGE_BLOCK_NAME "\0" \
|
||||
"data_block3=" IFX_CFG_FLASH_SYSTEM_CFG_BLOCK_NAME "\0" \
|
||||
"data_block4=" IFX_CFG_FLASH_FIRMWARE_IMAGE_BLOCK_NAME "\0" \
|
||||
"data_block5=" IFX_CFG_FLASH_UBOOT_CFG_BLOCK_NAME "\0" \
|
||||
"total_db=6\0"
|
||||
|
||||
#define IFX_CFG_FLASH_UBOOT_IMAGE_BLOCK_NAME "uboot"
|
||||
#define IFX_CFG_FLASH_UBOOT_IMAGE_START_ADDR 0xB0000000
|
||||
#define IFX_CFG_FLASH_UBOOT_IMAGE_END_ADDR 0xB007FFFF
|
||||
#define IFX_CFG_FLASH_UBOOT_IMAGE_SIZE 0x00080000
|
||||
#define IFX_CFG_FLASH_UBOOT_IMAGE_MTDBLOCK_NAME "/dev/mtdblock0"
|
||||
|
||||
#define IFX_CFG_FLASH_KERNEL_IMAGE_BLOCK_NAME "kernel"
|
||||
#define IFX_CFG_FLASH_KERNEL_IMAGE_START_ADDR 0xB0080000
|
||||
#define IFX_CFG_FLASH_KERNEL_IMAGE_SIZE 0x200000
|
||||
#define IFX_CFG_FLASH_KERNEL_IMAGE_END_ADDR 0xB017FFFF
|
||||
#define IFX_CFG_FLASH_KERNEL_IMAGE_MTDBLOCK_NAME "/dev/mtdblock1"
|
||||
|
||||
#define IFX_CFG_FLASH_ROOTFS_IMAGE_BLOCK_NAME "rootfs"
|
||||
#define IFX_CFG_FLASH_ROOTFS_IMAGE_START_ADDR 0xB0280000
|
||||
#define IFX_CFG_FLASH_ROOTFS_IMAGE_SIZE 0x00510000
|
||||
#define IFX_CFG_FLASH_ROOTFS_IMAGE_END_ADDR 0xB078FFFF
|
||||
#define IFX_CFG_FLASH_ROOTFS_IMAGE_MTDBLOCK_NAME "/dev/mtdblock2"
|
||||
|
||||
#define IFX_CFG_FLASH_SYSTEM_CFG_BLOCK_NAME "sysconfig"
|
||||
#define IFX_CFG_FLASH_SYSTEM_CFG_START_ADDR 0xB0790000
|
||||
#define IFX_CFG_FLASH_SYSTEM_CFG_SIZE 0x10000
|
||||
#define IFX_CFG_FLASH_SYSTEM_CFG_END_ADDR 0xB079FFFF
|
||||
#define IFX_CFG_FLASH_SYSTEM_CFG_MTDBLOCK_NAME "/dev/mtdblock3"
|
||||
|
||||
#define IFX_CFG_FLASH_FIRMWARE_IMAGE_BLOCK_NAME "firmware"
|
||||
#define IFX_CFG_FLASH_FIRMWARE_IMAGE_START_ADDR 0xB07A0000
|
||||
#define IFX_CFG_FLASH_FIRMWARE_IMAGE_SIZE 0x40000
|
||||
#define IFX_CFG_FLASH_FIRMWARE_IMAGE_END_ADDR 0xB07DFFFF
|
||||
#define IFX_CFG_FLASH_FIRMWARE_IMAGE_MTDBLOCK_NAME "/dev/mtdblock4"
|
||||
|
||||
#define IFX_CFG_FLASH_UBOOT_CFG_BLOCK_NAME "ubootconfig"
|
||||
#define IFX_CFG_FLASH_UBOOT_CFG_START_ADDR 0xB0020000
|
||||
#define IFX_CFG_FLASH_UBOOT_CFG_END_ADDR 0xB002FFFF
|
||||
#define IFX_CFG_FLASH_UBOOT_CFG_SIZE 0x10000
|
||||
#define IFX_CFG_FLASH_UBOOT_CFG_MTDBLOCK_NAME "/dev/mtdblock5"
|
||||
|
||||
#define IFX_CFG_FLASH_END_ADDR 0xB07FFFFF
|
||||
#else
|
||||
#error "ERROR!! Define flash size first!"
|
||||
#endif
|
||||
/* End of Board specific configurations
|
||||
*-----------------------------------------------------------------------
|
||||
*/
|
||||
|
||||
#endif
|
||||
@@ -1,94 +0,0 @@
|
||||
/* ============================================================================
|
||||
* Copyright (C) 2003[- 2004] ? Infineon Technologies AG.
|
||||
*
|
||||
* All rights reserved.
|
||||
* ============================================================================
|
||||
*
|
||||
* ============================================================================
|
||||
*
|
||||
* This document contains proprietary information belonging to Infineon
|
||||
* Technologies AG. Passing on and copying of this document, and communication
|
||||
* of its contents is not permitted without prior written authorisation.
|
||||
*
|
||||
* ============================================================================
|
||||
*
|
||||
* File Name: ifx_extra_env.h
|
||||
* Author : Mars Lin (mars.lin@infineon.com)
|
||||
* Date:
|
||||
*
|
||||
* ===========================================================================
|
||||
*
|
||||
* Project:
|
||||
* Block:
|
||||
*
|
||||
* ===========================================================================
|
||||
* Contents: This file contains the data structures and definitions used
|
||||
* by the core iptables and the sip alg modules.
|
||||
* ===========================================================================
|
||||
* References:
|
||||
*/
|
||||
"mem=" MK_STR(IFX_CONFIG_MEMORY_SIZE) "M\0"
|
||||
"ipaddr=" IFX_CFG_UBOOT_DEFAULT_CFG_IPADDR "\0"
|
||||
"serverip=" IFX_CFG_UBOOT_DEFAULT_CFG_SERVERIP "\0"
|
||||
"ethaddr=" IFX_CFG_UBOOT_DEFAULT_CFG_ETHADDR "\0"
|
||||
"netdev=eth0\0"
|
||||
"baudrate=" IFX_CFG_UBOOT_DEFAULT_CFG_BAUDRATE "\0"
|
||||
"loadaddr=" IFX_CFG_UBOOT_LOAD_ADDRESS "\0"
|
||||
"rootpath=/tftpboot/nfsrootfs\0"
|
||||
"nfsargs=setenv bootargs root=/dev/nfs rw nfsroot=$(serverip):$(rootpath)\0"
|
||||
"ramargs=setenv bootargs root=/dev/ram rw\0"
|
||||
"addip=setenv bootargs $(bootargs) ip=$(ipaddr):$(serverip):$(gatewayip):$(netmask):$(hostname):$(netdev):on\0"
|
||||
"addmisc=setenv bootargs $(bootargs) console=ttyS1,$(baudrate) ethaddr=$(ethaddr) mem=$(mem) panic=1\0"
|
||||
"flash_nfs=run nfsargs addip addmisc;bootm $(kernel_addr)\0"
|
||||
"ramdisk_addr=B0100000\0"
|
||||
"flash_self=run ramargs addip addmisc;bootm $(kernel_addr) $(ramdisk_addr)\0"
|
||||
"bootfile=uImage\0"
|
||||
"net_nfs=tftp $(loadaddr) $(bootfile);run nfsargs addip addmisc;bootm\0"
|
||||
"net_flash=tftp $(loadaddr) $(bootfile); run flashargs addip addmisc; bootm\0"
|
||||
"u-boot=u-boot.ifx\0"
|
||||
"jffs2fs=jffs2.img\0"
|
||||
"rootfs=rootfs.img\0"
|
||||
"firmware=firmware.img\0"
|
||||
"load=tftp $(loadaddr) $(u-boot)\0"
|
||||
"update=protect off 1:0-2;era 1:0-2;cp.b $(loadaddr) B0000000 $(filesize)\0"
|
||||
"flashargs=setenv bootargs root=/dev/mtdblock2 ro rootfstype=squashfs\0"
|
||||
"mtdargs=setenv bootargs root=/dev/mtdblock2 rw rootfstype=jffs2\0"
|
||||
"flash_flash=run flashargs addip addmisc; bootm $(f_kernel_addr)\0"
|
||||
"net_mtd=tftp $(loadaddr) $(bootfile); run mtdargs addip addmisc; bootm\0"
|
||||
"flash_mtd=run mtdargs addip addmisc; bootm $(f_kernel_addr)\0"
|
||||
"update_uboot=tftpboot $(loadaddr) $(u-boot);upgrade uboot $(loadaddr) $(filesize) 0\0"
|
||||
"update_kernel=tftpboot $(loadaddr) $(bootfile);upgrade kernel $(loadaddr) $(filesize) 0\0"
|
||||
"update_rootfs=tftpboot $(loadaddr) $(rootfs); upgrade rootfs $(loadaddr) $(filesize) 0\0"
|
||||
"update_rootfs_1=tftpboot $(loadaddr) $(rootfs); erase 1:47-132; cp.b $(loadaddr) $(f_rootfs_addr) $(filesize)\0"
|
||||
"update_jffs2=tftpboot $(loadaddr) $(rootfs); upgrade rootfs $(loadaddr) $(filesize) 0\0"
|
||||
"update_jffs2_1=tftpboot $(loadaddr) $(jffs2fs); erase 1:47-132; cp.b $(loadaddr) $(f_rootfs_addr) $(filesize)\0"
|
||||
"update_firmware=tftpboot $(loadaddr) $(firmware);upgrade firmware $(loadaddr) $(filesize) 0\0"
|
||||
"reset_uboot_config=erase " MK_STR(IFX_CFG_FLASH_UBOOT_CFG_START_ADDR) " " MK_STR(IFX_CFG_FLASH_UBOOT_CFG_END_ADDR) "\0"
|
||||
IFX_CFG_FLASH_PARTITIONS_INFO
|
||||
"flash_end=" MK_STR(IFX_CFG_FLASH_END_ADDR) "\0"
|
||||
IFX_CFG_FLASH_DATA_BLOCKS_INFO
|
||||
"f_uboot_addr=" MK_STR(IFX_CFG_FLASH_UBOOT_IMAGE_START_ADDR) "\0"
|
||||
"f_uboot_size=" MK_STR(IFX_CFG_FLASH_UBOOT_IMAGE_SIZE) "\0"
|
||||
"f_ubootconfig_addr=" MK_STR(IFX_CFG_FLASH_UBOOT_CFG_START_ADDR) "\0"
|
||||
"f_ubootconfig_size=" MK_STR(IFX_CFG_FLASH_UBOOT_CFG_SIZE) "\0"
|
||||
"f_ubootconfig_end=" MK_STR(IFX_CFG_FLASH_UBOOT_CFG_END_ADDR) "\0"
|
||||
"f_kernel_addr=" MK_STR(IFX_CFG_FLASH_KERNEL_IMAGE_START_ADDR) "\0"
|
||||
"f_kernel_size=" MK_STR(IFX_CFG_FLASH_KERNEL_IMAGE_SIZE) "\0"
|
||||
"f_kernel_end=" MK_STR(IFX_CFG_FLASH_KERNEL_IMAGE_END_ADDR) "\0"
|
||||
"f_rootfs_addr=" MK_STR(IFX_CFG_FLASH_ROOTFS_IMAGE_START_ADDR) "\0"
|
||||
"f_rootfs_size=" MK_STR(IFX_CFG_FLASH_ROOTFS_IMAGE_SIZE) "\0"
|
||||
"f_rootfs_end=" MK_STR(IFX_CFG_FLASH_ROOTFS_IMAGE_END_ADDR) "\0"
|
||||
"f_firmware_addr=" MK_STR(IFX_CFG_FLASH_FIRMWARE_IMAGE_START_ADDR) "\0"
|
||||
"f_firmware_size=" MK_STR(IFX_CFG_FLASH_FIRMWARE_IMAGE_SIZE) "\0"
|
||||
"f_sysconfig_addr=" MK_STR(IFX_CFG_FLASH_SYSTEM_CFG_START_ADDR) "\0"
|
||||
"f_sysconfig_size=" MK_STR(IFX_CFG_FLASH_SYSTEM_CFG_SIZE) "\0"
|
||||
/*
|
||||
"f_fwdiag_addr=" MK_STR(IFX_CFG_FLASH_FIRMWARE_DIAG_START_ADDR) "\0"
|
||||
"f_fwdiag_size=" MK_STR(IFX_CFG_FLASH_FIRMWARE_DIAG_SIZE) "\0"
|
||||
"f_calibration_addr=" MK_STR(IFX_CFG_FLASH_CALIBRATION_CFG_START_ADDR) "\0"
|
||||
"f_calibration_size=" MK_STR(IFX_CFG_FLASH_CALIBRATION_CFG_SIZE) "\0"
|
||||
#if (IFX_CONFIG_FLASH_SIZE == 4) || (IFX_CONFIG_FLASH_SIZE == 8)
|
||||
"f_voip_addr=" MK_STR(IFX_CFG_FLASH_VOIP_CFG_START_ADDR) "\0"
|
||||
"f_voip_size=" MK_STR(IFX_CFG_FLASH_VOIP_CFG_SIZE) "\0"
|
||||
#endif
|
||||
*/
|
||||
Reference in New Issue
Block a user