qi-hardware/openwrt-xburst
1
0
Fork 0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-11-24 16:13:10 +02:00
Code

add jz_lcd jz_mmc support.

Browse Source 
now the kernel compile.
This commit is contained in:
Xiangfu Liu 2009-07-17 13:37:11 +08:00 committed by Xiangfu Liu
parent c46aa046c3
commit 0b6d49071a
4 changed files with 953 additions and 17 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

51
target/linux/xburst/config-2.6.28
View File

@ -21,6 +21,7 @@ CONFIG_BLK_DEV_SD=y
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_BSD_PROCESS_ACCT is not set
CONFIG_CLASSIC_RCU=y
CONFIG_CMDLINE="mem=32M console=ttyS0,57600n8 ip=off rootfstype=ext2 root=/dev/mmcblk0p2 rw rootdelay=1 nohz=off"
CONFIG_CONSOLE_TRANSLATIONS=y
# CONFIG_CPU_BIG_ENDIAN is not set
# CONFIG_CPU_FREQ_JZ is not set
@ -85,13 +86,15 @@ CONFIG_FAT_FS=y
CONFIG_FB=y
# CONFIG_FB_BACKLIGHT is not set
# CONFIG_FB_BOOT_VESA_SUPPORT is not set
# CONFIG_FB_CFB_COPYAREA is not set
# CONFIG_FB_CFB_FILLRECT is not set
# CONFIG_FB_CFB_IMAGEBLIT is not set
CONFIG_FB_CFB_COPYAREA=y
CONFIG_FB_CFB_FILLRECT=y
CONFIG_FB_CFB_IMAGEBLIT=y
# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
# CONFIG_FB_DDC is not set
# CONFIG_FB_FOREIGN_ENDIAN is not set
# CONFIG_FB_JZSOC is not set
# CONFIG_FB_JZ4740_SLCD is not set
CONFIG_FB_JZLCD_4730_4740=y
CONFIG_FB_JZSOC=y
# CONFIG_FB_MACMODES is not set
# CONFIG_FB_MB862XX is not set
# CONFIG_FB_METRONOME is not set
@ -163,20 +166,43 @@ CONFIG_IP_PNP=y
CONFIG_IP_PNP_BOOTP=y
CONFIG_IP_PNP_DHCP=y
# CONFIG_IP_PNP_RARP is not set
# CONFIG_JFFS2_FS is not set
# CONFIG_JZ4720_VIRGO is not set
# CONFIG_JZ4725_DIPPER is not set
# CONFIG_JZ4730_PMP is not set
CONFIG_JZ4740_LEO=y
# CONFIG_JZ4740_LEO is not set
# CONFIG_JZ4740_LYRA is not set
# CONFIG_JZ4740_PAVO is not set
CONFIG_JZ4740_QI_LB60=y
# CONFIG_JZ4750D_FUWA1 is not set
# CONFIG_JZ4750_APUS is not set
# CONFIG_JZ4750_FUWA is not set
# CONFIG_JZCHAR is not set
# CONFIG_JZCS8900 is not set
# CONFIG_JZLCD_AUO_A030FL01_V1 is not set
# CONFIG_JZLCD_CSTN_320x240 is not set
# CONFIG_JZLCD_CSTN_800x600 is not set
CONFIG_JZLCD_FOXCONN_PT035TN01=y
CONFIG_JZLCD_FRAMEBUFFER_MAX=1
# CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT is not set
# CONFIG_JZLCD_HYNIX_HT10X21 is not set
# CONFIG_JZLCD_INNOLUX_AT080TN42 is not set
# CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL is not set
# CONFIG_JZLCD_MSTN_240x128 is not set
# CONFIG_JZLCD_MSTN_320x240 is not set
# CONFIG_JZLCD_MSTN_480x320 is not set
# CONFIG_JZLCD_SAMSUNG_LTP400WQF01 is not set
# CONFIG_JZLCD_SAMSUNG_LTP400WQF02 is not set
# CONFIG_JZLCD_SAMSUNG_LTS350Q1 is not set
# CONFIG_JZLCD_SAMSUNG_LTV350QVF04 is not set
# CONFIG_JZLCD_SHARP_LQ035Q7 is not set
# CONFIG_JZLCD_TOSHIBA_LTM084P363 is not set
# CONFIG_JZLCD_TRULY_TFTG240320UTSW_63W_E is not set
# CONFIG_JZLCD_TRULY_TFTG320240DTSW is not set
# CONFIG_JZLCD_TRULY_TFTG320240DTSW_SERIAL is not set
CONFIG_JZRISC=y
CONFIG_JZSOC=y
# CONFIG_JZ_MMC_BUS_1 is not set
CONFIG_JZ_MMC_BUS_4=y
CONFIG_KALLSYMS=y
CONFIG_KEYBOARD_ATKBD=y
# CONFIG_KEYBOARD_GPIO is not set
@ -219,19 +245,13 @@ CONFIG_MMC=y
CONFIG_MMC_BLOCK=y
CONFIG_MMC_BLOCK_BOUNCE=y
# CONFIG_MMC_DEBUG is not set
# CONFIG_MMC_JZ is not set
CONFIG_MMC_JZ=y
# CONFIG_MMC_SDHCI is not set
# CONFIG_MMC_UNSAFE_RESUME is not set
CONFIG_MODULE_SRCVERSION_ALL=y
CONFIG_MODVERSIONS=y
CONFIG_MSDOS_FS=y
CONFIG_MTD_BADBLOCK_FLAG_PAGE=0
# CONFIG_MTD_CFI is not set
# CONFIG_MTD_COMPLEX_MAPPINGS is not set
# CONFIG_MTD_MTDBLOCK_WRITE_VERIFY_ENABLE is not set
CONFIG_MTD_NAND=y
# CONFIG_MTD_NAND_JZ4740 is not set
CONFIG_MTD_OOB_COPIES=3
# CONFIG_MTD is not set
# CONFIG_NETFILTER is not set
# CONFIG_NET_SCHED is not set
# CONFIG_NEW_LEDS is not set
@ -251,10 +271,8 @@ CONFIG_NLS_ISO8859_1=y
CONFIG_PAGEFLAGS_EXTENDED=y
CONFIG_PCSPKR_PLATFORM=y
CONFIG_PHYLIB=y
CONFIG_PM=y
# CONFIG_PMC_MSP is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PM_DEBUG is not set
# CONFIG_PNP is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
@ -296,7 +314,6 @@ CONFIG_SOUND_OSS_CORE=y
CONFIG_SOUND_PRIME=y
CONFIG_SUNRPC=y
CONFIG_SUNRPC_GSS=y
# CONFIG_SUSPEND is not set
# CONFIG_SYN_COOKIES is not set
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y

474
target/linux/xburst/patches-2.6.28/600-add-qi_lb60-support.patch.patch Normal file
View File

@ -0,0 +1,474 @@
From d4dde6f9c5fafdc61fb4254143f8d21b53b5722d Mon Sep 17 00:00:00 2001
From: Xiangfu Liu <xiangfu.z@gmail.com>
Date: Fri, 17 Jul 2009 01:10:39 +0800
Subject: [PATCH] add-qi_lb60-support.patch
---
arch/mips/Kconfig | 8 ++
arch/mips/include/asm/mach-jz4740/board-qi_lb60.h | 66 ++++++++++++
arch/mips/include/asm/mach-jz4740/jz4740.h | 18 ++--
arch/mips/jz4740/Makefile | 1 +
arch/mips/jz4740/board-qi_lb60.c | 114 +++++++++++++++++++++
drivers/mtd/nand/jz4740_nand.c | 46 ++++++++
drivers/video/jzlcd.c | 21 ++--
drivers/video/jzlcd.h | 40 +++++++-
8 files changed, 293 insertions(+), 21 deletions(-)
create mode 100644 arch/mips/include/asm/mach-jz4740/board-qi_lb60.h
create mode 100644 arch/mips/jz4740/board-qi_lb60.c
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 52cbee5..aa65611 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -35,6 +35,14 @@ config JZ4740_PAVO
select SYS_SUPPORTS_LITTLE_ENDIAN
select SOC_JZ4740
+config JZ4740_QI_LB60
+ bool "Ingenic JZ4740 QI_LB60 board"
+ select DMA_NONCOHERENT
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SOC_JZ4740
+
config JZ4740_LEO
bool "Ingenic JZ4740 LEO board"
select DMA_NONCOHERENT
diff --git a/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h b/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h
new file mode 100644
index 0000000..3c63a4e
--- /dev/null
+++ b/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h
@@ -0,0 +1,66 @@
+/*
+ * linux/include/asm-mips/mach-jz4740/board-qi_lb60.h
+ *
+ * Copyright (c) 2009 Qi Hardware inc.,
+ * Author: Xiangfu Liu <xiangfu@qi-hardware.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 3 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_JZ4740_QI_LB60_H__
+#define __ASM_JZ4740_QI_LB60_H__
+
+/*
+ * Frequencies of on-board oscillators
+ */
+#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */
+#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */
+
+/*
+ * GPIO
+ */
+#define GPIO_SD_VCC_EN_N 98 /* GPD2 */
+#define GPIO_SD_CD_N 96 /* GPD0 */
+#define GPIO_SD_WP 112 /* GPD16 */
+#define GPIO_USB_DETE 124 /* GPD28 */
+#define GPIO_DISP_OFF_N 117 /* GPD21 */
+#define GPIO_LED_EN 124
+#define GPIO_DC_DETE_N 100
+#define GPIO_CHARG_STAT_N 91 /* GPC27 */
+
+#define GPIO_UDC_HOTPLUG GPIO_USB_DETE
+
+/*
+ * MMC/SD
+ */
+#define MSC_WP_PIN GPIO_SD_WP
+#define MSC_HOTPLUG_PIN GPIO_SD_CD_N
+#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N)
+
+#define __msc_init_io() \
+do { \
+ __gpio_as_output(GPIO_SD_VCC_EN_N); \
+ __gpio_as_input(GPIO_SD_CD_N); \
+} while (0)
+
+#define __msc_enable_power() \
+do { \
+ __gpio_clear_pin(GPIO_SD_VCC_EN_N); \
+} while (0)
+
+#define __msc_disable_power() \
+do { \
+ __gpio_set_pin(GPIO_SD_VCC_EN_N); \
+} while (0)
+
+#define __msc_card_detected(s) \
+({ \
+ int detected = 1; \
+ if (!__gpio_get_pin(GPIO_SD_CD_N)) \
+ detected = 0; \
+ detected; \
+})
+
+#endif /* __ASM_JZ4740_QI_LB60_H__ */
diff --git a/arch/mips/include/asm/mach-jz4740/jz4740.h b/arch/mips/include/asm/mach-jz4740/jz4740.h
index 37a02dc..91e98d1 100644
--- a/arch/mips/include/asm/mach-jz4740/jz4740.h
+++ b/arch/mips/include/asm/mach-jz4740/jz4740.h
@@ -23,8 +23,13 @@
/*------------------------------------------------------------------
* Platform definitions
*/
-#ifdef CONFIG_JZ4740_PAVO
-#include <asm/mach-jz4740/board-pavo.h>
+
+#ifdef CONFIG_JZ4720_VIRGO
+#include <asm/mach-jz4740/board-virgo.h>
+#endif
+
+#ifdef CONFIG_JZ4725_DIPPER
+#include <asm/mach-jz4740/board-dipper.h>
#endif
#ifdef CONFIG_JZ4740_LEO
@@ -35,17 +40,16 @@
#include <asm/mach-jz4740/board-lyra.h>
#endif
-#ifdef CONFIG_JZ4725_DIPPER
-#include <asm/mach-jz4740/board-dipper.h>
+#ifdef CONFIG_JZ4740_PAVO
+#include <asm/mach-jz4740/board-pavo.h>
#endif
-#ifdef CONFIG_JZ4720_VIRGO
-#include <asm/mach-jz4740/board-virgo.h>
+#ifdef CONFIG_JZ4740_QI_LB60
+#include <asm/mach-jz4740/board-qi_lb60.h>
#endif
/* Add other platform definition here ... */
-
/*------------------------------------------------------------------
* Follows are related to platform definitions
*/
diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile
index 7592f4e..37aaedc 100644
--- a/arch/mips/jz4740/Makefile
+++ b/arch/mips/jz4740/Makefile
@@ -12,6 +12,7 @@ obj-$(CONFIG_PROC_FS) += proc.o
# board specific support
obj-$(CONFIG_JZ4740_PAVO) += board-pavo.o
+obj-$(CONFIG_JZ4740_QI_LB60) += board-qi_lb60.o
obj-$(CONFIG_JZ4740_LEO) += board-leo.o
obj-$(CONFIG_JZ4740_LYRA) += board-lyra.o
obj-$(CONFIG_JZ4725_DIPPER) += board-dipper.o
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
new file mode 100644
index 0000000..ddabb67
--- /dev/null
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -0,0 +1,114 @@
+/*
+ * linux/arch/mips/jz4740/board-qi_lb60.c
+ *
+ * QI_LB60 setup routines.
+ *
+ * Copyright (c) 2009 Qi Hardware inc.,
+ * Author: Xiangfu Liu <xiangfu@qi-hardware.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 3 as
+ * published by the Free Software Foundation.
+ */
+
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/ioport.h>
+#include <linux/mm.h>
+#include <linux/console.h>
+#include <linux/delay.h>
+
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/mipsregs.h>
+#include <asm/reboot.h>
+
+#include <asm/jzsoc.h>
+
+extern void (*jz_timer_callback)(void);
+
+static void dancing(void)
+{
+ static unsigned int count = 0;
+
+ count ++;
+ count &= 1;
+ /* if (count)
+ __gpio_set_pin(GPIO_LED_EN);
+ else
+ __gpio_clear_pin(GPIO_LED_EN); */
+}
+
+static void pi_timer_callback(void)
+{
+ static unsigned long count = 0;
+
+ if ((++count) % 50 == 0) {
+ dancing();
+ count = 0;
+ }
+}
+
+static void __init board_cpm_setup(void)
+{
+ /* Stop unused module clocks here.
+ * We have started all module clocks at arch/mips/jz4740/setup.c.
+ */
+}
+
+static void __init board_gpio_setup(void)
+{
+ /*
+ * Most of the GPIO pins should have been initialized by the boot-loader
+ */
+
+ /*
+ * Initialize MSC pins
+ */
+ /* __gpio_as_msc(); */
+
+ /*
+ * Initialize LCD pins
+ */
+ __gpio_as_lcd_18bit();
+
+ /*
+ * Initialize SSI pins
+ */
+ __gpio_as_ssi();
+
+ /*
+ * Initialize I2C pins
+ */
+ __gpio_as_i2c();
+
+ /*
+ * Initialize Other pins
+ */
+ __gpio_as_output(GPIO_SD_VCC_EN_N);
+ __gpio_clear_pin(GPIO_SD_VCC_EN_N);
+
+ __gpio_as_input(GPIO_SD_CD_N);
+ __gpio_disable_pull(GPIO_SD_CD_N);
+
+ __gpio_as_input(GPIO_SD_WP);
+ __gpio_disable_pull(GPIO_SD_WP);
+
+ __gpio_as_input(GPIO_DC_DETE_N);
+ __gpio_as_input(GPIO_CHARG_STAT_N);
+ __gpio_as_input(GPIO_USB_DETE);
+
+ __gpio_as_output(GPIO_DISP_OFF_N);
+
+ __gpio_as_output(GPIO_LED_EN);
+}
+
+void __init jz_board_setup(void)
+{
+ printk("Qi Hardware JZ4740 QI_LB60 setup\n");
+
+ board_cpm_setup();
+ board_gpio_setup();
+
+ jz_timer_callback = pavo_timer_callback;
+}
diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
index b5d4949..0f012f0 100644
--- a/drivers/mtd/nand/jz4740_nand.c
+++ b/drivers/mtd/nand/jz4740_nand.c
@@ -106,6 +106,52 @@ static int partition_reserved_badblocks[] = {
20}; /* reserved blocks of mtd5 */
#endif /* CONFIG_JZ4740_PAVO */
+#ifdef CONFIG_JZ4740_QI_LB60
+static struct mtd_partition partition_info[] = {
+ { name: "NAND BOOT partition",
+ offset: 0 * 0x100000,
+ size: 4 * 0x100000,
+ use_planes: 0 },
+ { name: "NAND KERNEL partition",
+ offset: 4 * 0x100000,
+ size: 4 * 0x100000,
+ use_planes: 0 },
+ { name: "NAND ROOTFS partition",
+ offset: 8 * 0x100000,
+ size: 504 * 0x100000,
+ use_planes: 0 },
+ { name: "NAND DATA1 partition",
+ offset: 512 * 0x100000,
+ size: 512 * 0x100000,
+ use_planes: 1 },
+ { name: "NAND DATA2 partition",
+ offset: 1024 * 0x100000,
+ size: 512 * 0x100000,
+ use_planes: 1 },
+ { name: "NAND VFAT partition",
+ offset: (1024 + 512) * 0x100000,
+ size: 512 * 0x100000,
+ use_planes: 1 },
+};
+
+/* Define max reserved bad blocks for each partition.
+ * This is used by the mtdblock-jz.c NAND FTL driver only.
+ *
+ * The NAND FTL driver reserves some good blocks which can't be
+ * seen by the upper layer. When the bad block number of a partition
+ * exceeds the max reserved blocks, then there is no more reserved
+ * good blocks to be used by the NAND FTL driver when another bad
+ * block generated.
+ */
+static int partition_reserved_badblocks[] = {
+ 2, /* reserved blocks of mtd0 */
+ 2, /* reserved blocks of mtd1 */
+ 10, /* reserved blocks of mtd2 */
+ 10, /* reserved blocks of mtd3 */
+ 10, /* reserved blocks of mtd4 */
+ 20}; /* reserved blocks of mtd5 */
+#endif /* CONFIG_JZ4740_QI_LB60 */
+
#ifdef CONFIG_JZ4740_LEO
static struct mtd_partition partition_info[] = {
{ name: "NAND BOOT partition",
diff --git a/drivers/video/jzlcd.c b/drivers/video/jzlcd.c
index 7297661..beb61c7 100644
--- a/drivers/video/jzlcd.c
+++ b/drivers/video/jzlcd.c
@@ -126,15 +126,18 @@ static struct jzfb_info jzfb = {
MODE_TFT_GEN | HSYNC_N | VSYNC_N | PCLK_N | DE_N,
320, 240, 16, 60, 3, 3, 3, 3, 3, 85 /* 320x240 */
#endif
-#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) && defined(CONFIG_JZ4740_PAVO)
- MODE_TFT_GEN | HSYNC_N | VSYNC_N | MODE_TFT_18BIT | PCLK_N,
-// 320, 240, 18, 110, 1, 1, 10, 50, 10, 13
- 320, 240, 18, 80, 1, 1, 10, 50, 10, 13
-#endif
-#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) && !(defined(CONFIG_JZ4740_PAVO))
- MODE_TFT_GEN | HSYNC_N | VSYNC_N | PCLK_N,
- 320, 240, 16, 110, 1, 1, 10, 50, 10, 13
-#endif
+#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01)
+ #if defined(CONFIG_JZ4740_PAVO)
+ MODE_TFT_GEN | HSYNC_N | VSYNC_N | MODE_TFT_18BIT | PCLK_N,
+ 320, 240, 18, 80, 1, 1, 10, 50, 10, 13
+ #elif defined(CONFIG_JZ4740_QI_LB60)
+ MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N,
+ 320, 240, 32, 70, 1, 1, 273, 140, 1, 20
+ #else
+ MODE_TFT_GEN | HSYNC_N | VSYNC_N | PCLK_N,
+ 320, 240, 16, 110, 1, 1, 10, 50, 10, 13
+ #endif
+#endif /* CONFIG_JZLCD_FOXCONN_PT035TN01 */
#if defined(CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL)
MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N,
320, 240, 32, 60, 1, 1, 10, 50, 10, 13
diff --git a/drivers/video/jzlcd.h b/drivers/video/jzlcd.h
index c53a339..0ba57b9 100644
--- a/drivers/video/jzlcd.h
+++ b/drivers/video/jzlcd.h
@@ -1,4 +1,4 @@
-/*
+#/*
* linux/drivers/video/jzlcd.h -- Ingenic On-Chip LCD frame buffer device
*
* Copyright (C) 2005-2007, Ingenic Semiconductor Inc.
@@ -359,12 +359,16 @@ do { \
#endif /* CONFIG_JZLCD_AUO_A030FL01_V1 */
-//#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01)
#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) || defined(CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL)
#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) /* board pmp */
+#if defined(CONFIG_JZ4740_QI_LB60)
+#define MODE 0xc9
+#else
#define MODE 0xcd /* 24bit parellel RGB */
#endif
+#endif
+
#if defined(CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL)
#define MODE 0xc9 /* 8bit serial RGB */
#endif
@@ -384,6 +388,11 @@ do { \
#define SPCK (32*1+17) //LCD_CLS
#define SPDA (32*2+12) //LCD_D12
#define LCD_RET (32*2+23) //LCD_REV, GPC23
+#elif defined(CONFIG_JZ4740_QI_LB60)
+ #define SPEN (32*2+21) //LCD_SPL
+ #define SPCK (32*2+23) //LCD_CLS
+ #define SPDA (32*2+22) //LCD_D12
+ #define LCD_RET (32*3+27)
#if 0 /*old driver*/
#define SPEN (32*1+18) //LCD_SPL
#define SPCK (32*1+17) //LCD_CLS
@@ -653,7 +662,6 @@ do { \
#endif /* CONFIG_JZ4730_PMP */
-/*#if defined(CONFIG_JZ4740_LEO) || defined(CONFIG_JZ4740_PAVO)*/
#if defined(CONFIG_SOC_JZ4740)
#if defined(CONFIG_JZ4740_PAVO) || defined(CONFIG_JZ4740_LYRA)
#define GPIO_PWM 123 /* GP_D27 */
@@ -708,11 +716,32 @@ __gpio_as_output(GPIO_PWM); \
__gpio_clear_pin(GPIO_PWM); \
} while (0)
+#elif defined(CONFIG_JZ4740_QI_LB60)
+#define GPIO_PWM 123 /* GP_D27 */
+#define PWM_CHN 4 /* pwm channel */
+#define PWM_FULL 101
+#define __lcd_set_backlight_level(n)\
+do { \
+__gpio_as_output(32*3+27); \
+__gpio_set_pin(32*3+27); \
+} while (0)
+
+#define __lcd_close_backlight() \
+do { \
+__gpio_as_output(GPIO_PWM); \
+__gpio_clear_pin(GPIO_PWM); \
+} while (0)
+#define __lcd_display_pin_init() \
+do { \
+ __gpio_as_output(GPIO_DISP_OFF_N); \
+ __cpm_start_tcu(); \
+ __lcd_special_pin_init(); \
+} while (0) /* CONFIG_MIPS_JZ4740_QI_LB60) */
#else
#define __lcd_set_backlight_level(n)
#define __lcd_close_backlight()
-#endif /* #if defined(CONFIG_MIPS_JZ4740_PAVO) */
+#endif
#define __lcd_display_pin_init() \
do { \
@@ -735,7 +764,7 @@ do { \
__gpio_clear_pin(GPIO_DISP_OFF_N); \
} while (0)
-#endif /* CONFIG_MIPS_JZ4740_LEO */
+#endif /* (CONFIG_SOC_JZ4740) */
#if defined(CONFIG_JZLCD_MSTN_240x128)
@@ -772,6 +801,7 @@ static void vsync_irq(int irq, void *dev_id, struct pt_regs *reg)
/* We uses AC BIAs pin to generate VCOM signal, so above code should be removed.
*/
#endif
+
/*****************************************************************************
* LCD display pin dummy macros
*****************************************************************************/
--
1.6.0.4

317
target/linux/xburst/patches-2.6.28/650-qi_lb60-lcd-mmc.patch.patch Normal file
View File

@ -0,0 +1,317 @@
From 8d4c06f1ab21f5a20b5968704a06b9fb2d690a8f Mon Sep 17 00:00:00 2001
From: Xiangfu Liu <xiangfu.z@gmail.com>
Date: Fri, 17 Jul 2009 01:54:58 +0800
Subject: [PATCH] qi_lb60-lcd-mmc.patch
---
arch/mips/include/asm/mach-jz4740/board-qi_lb60.h | 32 +++++++++----
arch/mips/include/asm/mach-jz4740/serial.h | 9 +++-
arch/mips/jz4740/board-qi_lb60.c | 50 ++++++++++++++------
drivers/char/jzchar/poweroff.c | 2 -
drivers/video/jzlcd.c | 9 ++--
drivers/video/jzlcd.h | 46 +++++--------------
6 files changed, 81 insertions(+), 67 deletions(-)
diff --git a/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h b/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h
index 3c63a4e..0027fa3 100644
--- a/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h
+++ b/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h
@@ -21,16 +21,30 @@
/*
* GPIO
*/
-#define GPIO_SD_VCC_EN_N 98 /* GPD2 */
-#define GPIO_SD_CD_N 96 /* GPD0 */
-#define GPIO_SD_WP 112 /* GPD16 */
-#define GPIO_USB_DETE 124 /* GPD28 */
-#define GPIO_DISP_OFF_N 117 /* GPD21 */
-#define GPIO_LED_EN 124
-#define GPIO_DC_DETE_N 100
-#define GPIO_CHARG_STAT_N 91 /* GPC27 */
+#define GPIO_DC_DETE_N (2 * 32 + 26)
+#define GPIO_CHARG_STAT_N (2 * 32 + 27)
+#define GPIO_LED_EN (2 * 32 + 28)
-#define GPIO_UDC_HOTPLUG GPIO_USB_DETE
+#define GPIO_LCD_CS (2 * 32 + 21)
+#define GPIO_DISP_OFF_N (3 * 32 + 21)
+#define GPIO_PWM (3 * 32 + 27)
+
+#define GPIO_AMP_EN (3 * 32 + 4)
+
+#define GPIO_SD_CD_N (3 * 32 + 0)
+#define GPIO_SD_VCC_EN_N (3 * 32 + 2)
+#define GPIO_SD_WP (3 * 32 + 16)
+
+#define GPIO_USB_DETE (3 * 32 + 28)
+#define GPIO_BUZZ_PWM (3 * 32 + 27)
+#define GPIO_UDC_HOTPLUG GPIO_USB_DETE
+
+#define GPIO_AUDIO_POP (1 * 32 + 29)
+#define GPIO_COB_TEST (1 * 32 + 30)
+
+#define GPIO_KEYOUT_BASE (2 * 32 + 10)
+#define GPIO_KEYIN_BASE (3 * 32 + 18)
+#define GPIO_KEYIN_8 (3 * 32 + 26)
/*
* MMC/SD
diff --git a/arch/mips/include/asm/mach-jz4740/serial.h b/arch/mips/include/asm/mach-jz4740/serial.h
index e702f32..8584943 100644
--- a/arch/mips/include/asm/mach-jz4740/serial.h
+++ b/arch/mips/include/asm/mach-jz4740/serial.h
@@ -23,8 +23,11 @@
#define JZ_BASE_BAUD (12000000/16)
#define JZ_SERIAL_PORT_DEFNS \
- { .baud_base = JZ_BASE_BAUD, .irq = IRQ_UART0, \
- .flags = STD_COM_FLAGS, .iomem_base = (u8 *)UART0_BASE, \
- .iomem_reg_shift = 2, .io_type = SERIAL_IO_MEM },
+ { .baud_base = JZ_BASE_BAUD, \
+ .irq = IRQ_UART0, \
+ .flags = STD_COM_FLAGS, \
+ .iomem_base = (u8 *)UART0_BASE, \
+ .iomem_reg_shift = 2, \
+ .io_type = SERIAL_IO_MEM },
#endif /* __ASM_BORAD_SERIAL_H__ */
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
index ddabb67..75ac2c6 100644
--- a/arch/mips/jz4740/board-qi_lb60.c
+++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -33,13 +33,13 @@ static void dancing(void)
count ++;
count &= 1;
- /* if (count)
+ if (count)
__gpio_set_pin(GPIO_LED_EN);
else
- __gpio_clear_pin(GPIO_LED_EN); */
+ __gpio_clear_pin(GPIO_LED_EN);
}
-static void pi_timer_callback(void)
+static void qi_timer_callback(void)
{
static unsigned long count = 0;
@@ -61,31 +61,51 @@ static void __init board_gpio_setup(void)
/*
* Most of the GPIO pins should have been initialized by the boot-loader
*/
-
/*
- * Initialize MSC pins
- */
- /* __gpio_as_msc(); */
+ * Initialize UART0 pins
+ */
+ /* __gpio_as_uart0(); */
/*
* Initialize LCD pins
*/
- __gpio_as_lcd_18bit();
+ /* __gpio_as_lcd_18bit(); */
/*
* Initialize SSI pins
*/
- __gpio_as_ssi();
+ /* __gpio_as_ssi(); */
/*
* Initialize I2C pins
*/
- __gpio_as_i2c();
+ /* __gpio_as_i2c(); */
+
+ /*
+ * Initialize MSC pins
+ */
+ /* __gpio_as_msc(); */
/*
* Initialize Other pins
*/
+
+ /* unsigned int i;
+ for (i = 0; i < 8; i++) {
+ __gpio_as_output(GPIO_KEYOUT_BASE + i);
+ __gpio_set_pin(GPIO_KEYOUT_BASE + i);
+ }
+
+ for (i = 0; i < 7; i++){
+ __gpio_as_input(GPIO_KEYIN_BASE + i);
+ __gpio_enable_pull(GPIO_KEYIN_BASE + i);
+ }
+ __gpio_as_input( GPIO_KEYIN_8 );
+ __gpio_enable_pull( GPIO_KEYIN_8 );
+ */
+
__gpio_as_output(GPIO_SD_VCC_EN_N);
+ __gpio_disable_pull(GPIO_SD_VCC_EN_N);
__gpio_clear_pin(GPIO_SD_VCC_EN_N);
__gpio_as_input(GPIO_SD_CD_N);
@@ -94,13 +114,13 @@ static void __init board_gpio_setup(void)
__gpio_as_input(GPIO_SD_WP);
__gpio_disable_pull(GPIO_SD_WP);
+
__gpio_as_input(GPIO_DC_DETE_N);
__gpio_as_input(GPIO_CHARG_STAT_N);
- __gpio_as_input(GPIO_USB_DETE);
-
- __gpio_as_output(GPIO_DISP_OFF_N);
- __gpio_as_output(GPIO_LED_EN);
+ /* __gpio_as_output(GPIO_DISP_OFF_N); */
+ /* __gpio_as_input(GPIO_USB_DETE); */
+ /* __gpio_as_output(GPIO_LED_EN); */
}
void __init jz_board_setup(void)
@@ -110,5 +130,5 @@ void __init jz_board_setup(void)
board_cpm_setup();
board_gpio_setup();
- jz_timer_callback = pavo_timer_callback;
+ jz_timer_callback = qi_timer_callback;
}
diff --git a/drivers/char/jzchar/poweroff.c b/drivers/char/jzchar/poweroff.c
index dfbd4b0..7127438 100644
--- a/drivers/char/jzchar/poweroff.c
+++ b/drivers/char/jzchar/poweroff.c
@@ -78,8 +78,6 @@ do { \
SET_POWEROFF_PIN_AS_IRQ;\
}
-#define GPIO_DISP_OFF_N 118
-#define GPIO_PWM 123
#define __lcd_close_backlight() \
do { \
__gpio_as_output(GPIO_PWM); \
diff --git a/drivers/video/jzlcd.c b/drivers/video/jzlcd.c
index beb61c7..4f729f9 100644
--- a/drivers/video/jzlcd.c
+++ b/drivers/video/jzlcd.c
@@ -1501,7 +1501,7 @@ static int __init jzfb_init(void)
}
__lcd_enable_ofu_intr(); /* enable OutFifo underrun */
-// __lcd_enable_ifu0_intr(); /* needn't enable InFifo underrun */
+ /* __lcd_enable_ifu0_intr(); */ /* needn't enable InFifo underrun */
#if defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT)
jzfb_rotate_change(rotate_angle);
@@ -1526,8 +1526,7 @@ static int __init jzfb_init(void)
cfb->pm->data = cfb;
#endif
- __lcd_display_on();
-
+ __lcd_display_off();
return 0;
failed:
@@ -1563,8 +1562,8 @@ static void __exit jzfb_cleanup(void)
#if defined(CONFIG_JZLCD_FRAMEBUFFER_ROTATE_SUPPORT)
kthread_stop(jzlcd_info->rotate_daemon_thread);
#endif
-// driver_unregister(&jzfb_driver);
-// jzfb_remove();
+ /* driver_unregister(&jzfb_driver); */
+ /* jzfb_remove(); */
}
module_init(jzfb_init);
diff --git a/drivers/video/jzlcd.h b/drivers/video/jzlcd.h
index 0ba57b9..45def90 100644
--- a/drivers/video/jzlcd.h
+++ b/drivers/video/jzlcd.h
@@ -663,21 +663,21 @@ do { \
#endif /* CONFIG_JZ4730_PMP */
#if defined(CONFIG_SOC_JZ4740)
-#if defined(CONFIG_JZ4740_PAVO) || defined(CONFIG_JZ4740_LYRA)
-#define GPIO_PWM 123 /* GP_D27 */
-#define PWM_CHN 4 /* pwm channel */
-#define PWM_FULL 101
+#if defined(CONFIG_JZ4740_PAVO) || defined(CONFIG_JZ4740_LYRA) || defined(CONFIG_JZ4740_QI_LB60)
+#define GPIO_PWM 123 /* GP_D27 */
+#define PWM_CHN 4 /* pwm channel */
+#define PWM_FULL 101
/* 100 level: 0,1,...,100 */
#define __lcd_set_backlight_level(n)\
do { \
-__gpio_as_output(32*3+27); \
-__gpio_set_pin(32*3+27); \
+ __gpio_as_output(GPIO_PWM); \
+ __gpio_set_pin(GPIO_PWM); \
} while (0)
#define __lcd_close_backlight() \
do { \
-__gpio_as_output(GPIO_PWM); \
-__gpio_clear_pin(GPIO_PWM); \
+ __gpio_as_output(GPIO_PWM); \
+ __gpio_clear_pin(GPIO_PWM); \
} while (0)
#elif defined(CONFIG_JZ4720_VIRGO)
@@ -712,32 +712,12 @@ do { \
#define __lcd_close_backlight() \
do { \
-__gpio_as_output(GPIO_PWM); \
-__gpio_clear_pin(GPIO_PWM); \
-} while (0)
-
-#elif defined(CONFIG_JZ4740_QI_LB60)
-#define GPIO_PWM 123 /* GP_D27 */
-#define PWM_CHN 4 /* pwm channel */
-#define PWM_FULL 101
-#define __lcd_set_backlight_level(n)\
-do { \
-__gpio_as_output(32*3+27); \
-__gpio_set_pin(32*3+27); \
+ __gpio_as_output(GPIO_PWM); \
+ __gpio_clear_pin(GPIO_PWM); \
} while (0)
-#define __lcd_close_backlight() \
-do { \
-__gpio_as_output(GPIO_PWM); \
-__gpio_clear_pin(GPIO_PWM); \
-} while (0)
-#define __lcd_display_pin_init() \
-do { \
- __gpio_as_output(GPIO_DISP_OFF_N); \
- __cpm_start_tcu(); \
- __lcd_special_pin_init(); \
-} while (0) /* CONFIG_MIPS_JZ4740_QI_LB60) */
#else
+
#define __lcd_set_backlight_level(n)
#define __lcd_close_backlight()
@@ -749,12 +729,12 @@ do { \
__cpm_start_tcu(); \
__lcd_special_pin_init(); \
} while (0)
-/* __lcd_set_backlight_level(100); \*/
+
#define __lcd_display_on() \
do { \
__gpio_set_pin(GPIO_DISP_OFF_N); \
__lcd_special_on(); \
- __lcd_set_backlight_level(80); \
+ __lcd_set_backlight_level(20); \
} while (0)
#define __lcd_display_off() \
--
1.6.0.4

128
target/linux/xburst/patches-2.6.28/660-fix-old-define.patch.patch Normal file
View File

@ -0,0 +1,128 @@
From 7ffdc4a4a3640440674ccbee9a670f3b283ca9fc Mon Sep 17 00:00:00 2001
From: Xiangfu Liu <xiangfu.z@gmail.com>
Date: Fri, 17 Jul 2009 13:32:23 +0800
Subject: [PATCH] fix-old-define.patch
---
drivers/mmc/host/jz_mmc.c | 20 +++++++++++++-------
drivers/video/jzlcd.c | 5 ++---
drivers/video/jzlcd.h | 1 -
3 files changed, 15 insertions(+), 11 deletions(-)
diff --git a/drivers/mmc/host/jz_mmc.c b/drivers/mmc/host/jz_mmc.c
index 67781da..971dbe0 100644
--- a/drivers/mmc/host/jz_mmc.c
+++ b/drivers/mmc/host/jz_mmc.c
@@ -23,7 +23,6 @@
#include <linux/mm.h>
#include <linux/signal.h>
#include <linux/pm.h>
-#include <linux/pm_legacy.h>
#include <linux/scatterlist.h>
#include <asm/io.h>
@@ -755,8 +754,11 @@ static const struct mmc_host_ops jz_mmc_ops = {
.get_ro = jz_mmc_get_ro,
.set_ios = jz_mmc_set_ios,
};
+#if 0
+/* will fix this later add by Xiangfu Liu*/
static int jz_mmc_pm_callback(struct pm_dev *pm_dev,
pm_request_t req, void *data);
+#endif
static int jz_mmc_probe(struct platform_device *pdev)
{
@@ -817,7 +819,7 @@ static int jz_mmc_probe(struct platform_device *pdev)
mmc->ocr_avail = host->pdata ?
host->pdata->ocr_mask : MMC_VDD_32_33 | MMC_VDD_33_34;
host->mmc->caps =
- MMC_CAP_4_BIT_DATA | MMC_CAP_MULTIWRITE | MMC_CAP_SD_HIGHSPEED
+ MMC_CAP_4_BIT_DATA | MMC_CAP_SD_HIGHSPEED
| MMC_CAP_MMC_HIGHSPEED;
/*
*MMC_CAP_4_BIT_DATA (1 << 0) The host can do 4 bit transfers
@@ -874,9 +876,9 @@ static int jz_mmc_probe(struct platform_device *pdev)
mmc_add_host(mmc);
#ifdef CONFIG_PM
/* Register MMC slot as as power-managed device */
- host->pmdev = pm_register(PM_UNKNOWN_DEV, PM_SYS_UNKNOWN, jz_mmc_pm_callback);
- if (host->pmdev)
- host->pmdev->data = pdev;
+ /* host->pmdev = pm_register(PM_UNKNOWN_DEV, PM_SYS_UNKNOWN, jz_mmc_pm_callback); */
+ /* if (host->pmdev) */
+ /* host->pmdev->data = pdev; */
#endif
printk("JZ SD/MMC card driver registered\n");
@@ -975,16 +977,18 @@ static int jz_mmc_resume(struct platform_device *dev)
return ret;
}
+#if 0
+/* will fix this later add by Xiangfu Liu*/
static int jz_mmc_pm_callback(struct pm_dev *pm_dev,
pm_request_t req, void *data)
{
struct platform_device *pdev = (struct platform_device *)pm_dev->data;
switch(req) {
- case PM_RESUME:
+ case PM_EVENT_RESUME:
jz_mmc_resume(pdev);
break;
- case PM_SUSPEND:
+ case PM_EVENT_SUSPEND:
/* state has no use */
jz_mmc_suspend(pdev, state);
break;
@@ -994,6 +998,8 @@ static int jz_mmc_pm_callback(struct pm_dev *pm_dev,
}
return 0;
}
+#endif
+
#else
#define jz_mmc_suspend NULL
#define jz_mmc_resume NULL
diff --git a/drivers/video/jzlcd.c b/drivers/video/jzlcd.c
index 4f729f9..172d5b2 100644
--- a/drivers/video/jzlcd.c
+++ b/drivers/video/jzlcd.c
@@ -22,7 +22,6 @@
#include <linux/dma-mapping.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
-#include <linux/pm_legacy.h>
#include <linux/kthread.h>
#include <asm/irq.h>
@@ -1428,11 +1427,11 @@ static int jzlcd_pm_callback(struct pm_dev *pm_dev, pm_request_t req, void *data
if (!cfb) return -EINVAL;
switch (req) {
- case PM_SUSPEND:
+ case PM_EVENT_SUSPEND:
ret = jzfb_suspend();
break;
- case PM_RESUME:
+ case PM_EVENT_RESUME:
ret = jzfb_resume();
break;
diff --git a/drivers/video/jzlcd.h b/drivers/video/jzlcd.h
index 45def90..3414c5d 100644
--- a/drivers/video/jzlcd.h
+++ b/drivers/video/jzlcd.h
@@ -664,7 +664,6 @@ do { \
#if defined(CONFIG_SOC_JZ4740)
#if defined(CONFIG_JZ4740_PAVO) || defined(CONFIG_JZ4740_LYRA) || defined(CONFIG_JZ4740_QI_LB60)
-#define GPIO_PWM 123 /* GP_D27 */
#define PWM_CHN 4 /* pwm channel */
#define PWM_FULL 101
/* 100 level: 0,1,...,100 */
--
1.6.0.4