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cleanup the 2.6.31-rc6 050-nand.patch 200-qi_lb60.patch

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there is repeat code in platform.c file and 050-nand.patch
   make 200-qi_lb60.patch no warning.

Signed-off-by: Xiangfu Liu <xiangfu.z@gmail.com>
This commit is contained in:
Xiangfu Liu 2009-08-20 19:04:11 +08:00 committed by Xiangfu Liu
parent 7d446f792e
commit 10b1e8ca0c
2 changed files with 200 additions and 219 deletions
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131
target/linux/xburst/patches-2.6.31/050-nand.patch
View File

@ -1,8 +1,34 @@
From 3558f77fbc178030cf2991dddd678847a35ef98e Mon Sep 17 00:00:00 2001
From: Xiangfu Liu <xiangfu.z@gmail.com>
Date: Thu, 20 Aug 2009 18:35:54 +0800
Subject: [PATCH] nand
---
arch/mips/jz4740/platform.c | 1 +
drivers/mtd/nand/Kconfig | 6 ++++++
drivers/mtd/nand/Makefile | 1 +
drivers/mtd/nand/nand_base.c | 19 +++++++------------
4 files changed, 15 insertions(+), 12 deletions(-)
diff --git a/arch/mips/jz4740/platform.c b/arch/mips/jz4740/platform.c
index a02aec1..bac37ee 100644
--- a/arch/mips/jz4740/platform.c
+++ b/arch/mips/jz4740/platform.c
@@ -15,6 +15,7 @@
#include <linux/resource.h>
#include <linux/mtd/jz4740_nand.h>
#include <linux/input/matrix_keypad.h>
+#include <linux/mtd/jz4740_nand.h>
#include <asm/jzsoc.h>
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index ce96c09..818bce0 100644
--- a/drivers/mtd/nand/Kconfig --- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig
@@ -420,4 +420,10 @@ config MTD_NAND_SH_FLCTL @@ -452,4 +452,10 @@ config MTD_NAND_SOCRATES
Several Renesas SuperH CPU has FLCTL. This option enables support help
for NAND Flash using FLCTL. This driver support SH7723. Enables support for NAND Flash chips wired onto Socrates board.
+config MTD_NAND_JZ4740 +config MTD_NAND_JZ4740
+ tristate "Support NAND Flash device on Jz4740 board" + tristate "Support NAND Flash device on Jz4740 board"
@ -11,106 +37,22 @@
+ Support NAND Flash device on Jz4740 board + Support NAND Flash device on Jz4740 board
+ +
endif # MTD_NAND endif # MTD_NAND
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index f3a786b..ef4590b 100644
--- a/drivers/mtd/nand/Makefile --- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile
@@ -40,5 +40,6 @@ obj-$(CONFIG_MTD_NAND_FSL_ELBC) += fsl_ @@ -40,5 +40,6 @@ obj-$(CONFIG_MTD_NAND_SH_FLCTL) += sh_flctl.o
obj-$(CONFIG_MTD_NAND_MXC) += mxc_nand.o obj-$(CONFIG_MTD_NAND_MXC) += mxc_nand.o
obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o obj-$(CONFIG_MTD_NAND_SOCRATES) += socrates_nand.o
obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o obj-$(CONFIG_MTD_NAND_TXX9NDFMC) += txx9ndfmc.o
+obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o +obj-$(CONFIG_MTD_NAND_JZ4740) += jz4740_nand.o
nand-objs := nand_base.o nand_bbt.o nand-objs := nand_base.o nand_bbt.o
diff --git a/arch/mips/jz4740/platform.c b/arch/mips/jz4740/platform.c
index 4ce8e3a..ee5c90d 100644
--- a/arch/mips/jz4740/platform.c
+++ b/arch/mips/jz4740/platform.c
@@ -13,6 +13,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/resource.h>
+#include <linux/mtd/jz4740_nand.h>
#include <asm/jzsoc.h>
@@ -152,12 +153,70 @@ static struct platform_device jz_i2c_device = {
.resource = jz_i2c_resources,
};
+static struct resource jz_nand_resources[] = {
+ [0] = {
+ .start = CPHYSADDR(EMC_BASE),
+ .end = CPHYSADDR(EMC_BASE) + 0x10000 - 1,
+ .flags = IORESOURCE_MEM,
+ },
+};
+
+static struct nand_ecclayout qi_lb60_ecclayout = {
+ .eccbytes = 36,
+ .eccpos = {
+ 6, 7, 8, 9, 10, 11, 12, 13,
+ 14, 15, 16, 17, 18, 19, 20, 21,
+ 22, 23, 24, 25, 26, 27, 28, 29,
+ 30, 31, 32, 33, 34, 35, 36, 37,
+ 38, 39, 40, 41},
+ .oobfree = {
+ {.offset = 0,
+ .length = 6},
+ {.offset = 42,
+ .length = 22}}
+};
+
+static struct mtd_partition qi_lb60_partitions[] = {
+ { .name = "NAND BOOT partition",
+ .offset = 0 * 0x100000,
+ .size = 4 * 0x100000,
+ },
+ { .name = "NAND KERNEL partition",
+ .offset = 4 * 0x100000,
+ .size = 4 * 0x100000,
+ },
+ { .name = "NAND ROOTFS partition",
+ .offset = 8 * 0x100000,
+ .size = 20 * 0x100000,
+ },
+ { .name = "NAND DATA partition",
+ .offset = 100 * 0x100000,
+ .size = 20 * 0x100000,
+ },
+};
+
+static struct jz_nand_platform_data jz_nand_platform_data = {
+ .num_partitions = ARRAY_SIZE(qi_lb60_partitions),
+ .partitions = qi_lb60_partitions,
+ .ecc_layout = &qi_lb60_ecclayout,
+};
+
+static struct platform_device jz_nand_device = {
+ .name = "jz4740-nand",
+ .num_resources = ARRAY_SIZE(jz_nand_resources),
+ .resource = jz_nand_resources,
+ .dev = {
+ .platform_data = &jz_nand_platform_data,
+ }
+};
+
/* All */
static struct platform_device *jz_platform_devices[] __initdata = {
&jz_usb_ohci_device,
&jz_lcd_device,
&jz_usb_gdt_device,
&jz_mmc_device,
+ &jz_nand_device,
&jz_i2c_device,
};
diff --git a/drivers/mtd/nand/jz4740_nand.c b/drivers/mtd/nand/jz4740_nand.c
index 92f0afe..08a7b37 100644
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 0a9c9cd..3870dcc 100644 index 8c21b89..1749f31 100644
--- a/drivers/mtd/nand/nand_base.c --- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c +++ b/drivers/mtd/nand/nand_base.c
@@ -896,29 +896,22 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip, @@ -953,29 +953,22 @@ static int nand_read_page_hwecc(struct mtd_info *mtd, struct nand_chip *chip,
uint8_t *ecc_calc = chip->buffers->ecccalc; uint8_t *ecc_calc = chip->buffers->ecccalc;
uint8_t *ecc_code = chip->buffers->ecccode; uint8_t *ecc_code = chip->buffers->ecccode;
uint32_t *eccpos = chip->ecc.layout->eccpos; uint32_t *eccpos = chip->ecc.layout->eccpos;
@ -145,7 +87,7 @@ index 0a9c9cd..3870dcc 100644
return 0; return 0;
} }
@@ -1068,6 +1061,8 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from, @@ -1125,6 +1118,8 @@ static int nand_do_read_ops(struct mtd_info *mtd, loff_t from,
bufpoi = aligned ? buf : chip->buffers->databuf; bufpoi = aligned ? buf : chip->buffers->databuf;
if (likely(sndcmd)) { if (likely(sndcmd)) {
@ -154,3 +96,6 @@ index 0a9c9cd..3870dcc 100644
chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page); chip->cmdfunc(mtd, NAND_CMD_READ0, 0x00, page);
sndcmd = 0; sndcmd = 0;
} }
--
1.6.0.4

288
target/linux/xburst/patches-2.6.31/200-qi_lb60.patch
View File

@ -1,3 +1,154 @@
From 5125a5b4a4705f98db4a98d009a8b1c9e449ba51 Mon Sep 17 00:00:00 2001
From: Xiangfu Liu <xiangfu.z@gmail.com>
Date: Thu, 20 Aug 2009 18:38:09 +0800
Subject: [PATCH] qi_lb60
---
arch/mips/Kconfig | 8 ++
arch/mips/include/asm/mach-jz4740/board-qi_lb60.h | 79 +++++++++++++++
arch/mips/include/asm/mach-jz4740/jz4740.h | 4 +
arch/mips/jz4740/Makefile | 1 +
arch/mips/jz4740/board-qi_lb60.c | 110 +++++++++++++++++++++
drivers/video/jzlcd.c | 23 +++--
drivers/video/jzlcd.h | 15 +++-
7 files changed, 227 insertions(+), 13 deletions(-)
create mode 100644 arch/mips/include/asm/mach-jz4740/board-qi_lb60.h
create mode 100644 arch/mips/jz4740/board-qi_lb60.c
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index e8f8027..8b78107 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -656,6 +656,14 @@ config CAVIUM_OCTEON_REFERENCE_BOARD
Hikari
Say Y here for most Octeon reference boards.
+config JZ4740_QI_LB60
+ bool "Ingenic JZ4740 QI_LB60 board"
+ select DMA_NONCOHERENT
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SOC_JZ4740
+
endchoice
source "arch/mips/alchemy/Kconfig"
diff --git a/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h b/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h
new file mode 100644
index 0000000..b2f02f4
--- /dev/null
+++ b/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h
@@ -0,0 +1,79 @@
+/*
+ * linux/include/asm-mips/mach-jz4740/board-qi_lb60.h
+ *
+ * Copyright (c) 2009 Qi Hardware inc.,
+ * Author: Xiangfu Liu <xiangfu@qi-hardware.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 3 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_JZ4740_QI_LB60_H__
+#define __ASM_JZ4740_QI_LB60_H__
+
+/*
+ * Frequencies of on-board oscillators
+ */
+#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */
+#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */
+
+/*
+ * GPIO
+ */
+#define GPIO_DC_DETE_N (2 * 32 + 26)
+#define GPIO_CHARG_STAT_N (2 * 32 + 27)
+#define GPIO_LED_EN (2 * 32 + 28)
+#define GPIO_LCD_CS (2 * 32 + 21)
+#define GPIO_DISP_OFF_N (3 * 32 + 21)
+#define GPIO_PWM (3 * 32 + 27)
+
+#define GPIO_AMP_EN (3 * 32 + 4)
+
+#define GPIO_SD_CD_N (3 * 32 + 0)
+#define GPIO_SD_VCC_EN_N (3 * 32 + 2)
+#define GPIO_SD_WP (3 * 32 + 16)
+
+#define GPIO_USB_DETE (3 * 32 + 28)
+#define GPIO_BUZZ_PWM (3 * 32 + 27)
+#define GPIO_UDC_HOTPLUG GPIO_USB_DETE
+
+#define GPIO_AUDIO_POP (1 * 32 + 29)
+#define GPIO_COB_TEST (1 * 32 + 30)
+
+#define GPIO_KEYOUT_BASE (2 * 32 + 10)
+#define GPIO_KEYIN_BASE (3 * 32 + 18)
+#define GPIO_KEYIN_8 (3 * 32 + 26)
+
+/*
+ * MMC/SD
+ */
+#define MSC_WP_PIN GPIO_SD_WP
+#define MSC_HOTPLUG_PIN GPIO_SD_CD_N
+#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N)
+
+#define __msc_init_io() \
+do { \
+ __gpio_as_output(GPIO_SD_VCC_EN_N); \
+ __gpio_as_input(GPIO_SD_CD_N); \
+} while (0)
+
+#define __msc_enable_power() \
+do { \
+ __gpio_clear_pin(GPIO_SD_VCC_EN_N); \
+} while (0)
+
+#define __msc_disable_power() \
+do { \
+ __gpio_set_pin(GPIO_SD_VCC_EN_N); \
+} while (0)
+
+#define __msc_card_detected(s) \
+({ \
+ int detected = 1; \
+ if (!__gpio_get_pin(GPIO_SD_CD_N)) \
+ detected = 0; \
+ detected; \
+})
+
+#endif /* __ASM_JZ4740_QI_LB60_H__ */
diff --git a/arch/mips/include/asm/mach-jz4740/jz4740.h b/arch/mips/include/asm/mach-jz4740/jz4740.h
index 437caf4..d38d5f1 100644
--- a/arch/mips/include/asm/mach-jz4740/jz4740.h
+++ b/arch/mips/include/asm/mach-jz4740/jz4740.h
@@ -43,6 +43,10 @@
#include <asm/mach-jz4740/board-virgo.h>
#endif
+#ifdef CONFIG_JZ4740_QI_LB60
+#include <asm/mach-jz4740/board-qi_lb60.h>
+#endif
+
/* Add other platform definition here ... */
diff --git a/arch/mips/jz4740/Makefile b/arch/mips/jz4740/Makefile
index ac4d3cd..03ef8fd 100644
--- a/arch/mips/jz4740/Makefile
+++ b/arch/mips/jz4740/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_JZ4740_LEO) += board-leo.o
obj-$(CONFIG_JZ4740_LYRA) += board-lyra.o
obj-$(CONFIG_JZ4725_DIPPER) += board-dipper.o
obj-$(CONFIG_JZ4720_VIRGO) += board-virgo.o
+obj-$(CONFIG_JZ4740_QI_LB60) += board-qi_lb60.o
# PM support
diff --git a/arch/mips/jz4740/board-qi_lb60.c b/arch/mips/jz4740/board-qi_lb60.c
new file mode 100644
index 0000000..127fad8
--- /dev/null --- /dev/null
+++ b/arch/mips/jz4740/board-qi_lb60.c +++ b/arch/mips/jz4740/board-qi_lb60.c
@@ -0,0 +1,110 @@ @@ -0,0 +1,110 @@
@ -111,36 +262,11 @@
+ +
+ jz_timer_callback = pi_timer_callback; + jz_timer_callback = pi_timer_callback;
+} +}
--- a/arch/mips/jz4740/Makefile diff --git a/drivers/video/jzlcd.c b/drivers/video/jzlcd.c
+++ b/arch/mips/jz4740/Makefile index 6df9439..2cb7114 100755
@@ -16,6 +16,7 @@ obj-$(CONFIG_JZ4740_LEO) += board-leo.o
obj-$(CONFIG_JZ4740_LYRA) += board-lyra.o
obj-$(CONFIG_JZ4725_DIPPER) += board-dipper.o
obj-$(CONFIG_JZ4720_VIRGO) += board-virgo.o
+obj-$(CONFIG_JZ4740_QI_LB60) += board-qi_lb60.o
# PM support
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -655,6 +655,14 @@ choice
Kodama
Hikari
Say Y here for most Octeon reference boards.
+
+config JZ4740_QI_LB60
+ bool "Ingenic JZ4740 QI_LB60 board"
+ select DMA_NONCOHERENT
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SOC_JZ4740
endchoice
--- a/drivers/video/jzlcd.c --- a/drivers/video/jzlcd.c
+++ b/drivers/video/jzlcd.c +++ b/drivers/video/jzlcd.c
@@ -126,15 +126,18 @@ static struct jzfb_info jzfb = { @@ -127,15 +127,18 @@ static struct jzfb_info jzfb = {
MODE_TFT_GEN | HSYNC_N | VSYNC_N | PCLK_N | DE_N, MODE_TFT_GEN | HSYNC_N | VSYNC_N | PCLK_N | DE_N,
320, 240, 16, 60, 3, 3, 3, 3, 3, 85 /* 320x240 */ 320, 240, 16, 60, 3, 3, 3, 3, 3, 85 /* 320x240 */
#endif #endif
@ -168,15 +294,17 @@
#if defined(CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL) #if defined(CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL)
MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N, MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N,
320, 240, 32, 60, 1, 1, 10, 50, 10, 13 320, 240, 32, 60, 1, 1, 10, 50, 10, 13
@@ -1523,7 +1526,7 @@ static int __init jzfb_init(void) @@ -1487,7 +1490,7 @@ static int __init jzfb_probe(struct platform_device *pdev)
cfb->pm->data = cfb; printk("fb%d: %s frame buffer device, using %dK of video memory\n",
#endif cfb->fb.node, cfb->fb.fix.id, cfb->fb.fix.smem_len>>10);
- __lcd_display_on(); - __lcd_display_on();
+ __lcd_display_off(); + __lcd_display_off();
return 0; return 0;
diff --git a/drivers/video/jzlcd.h b/drivers/video/jzlcd.h
index 3676b9b..a4ef75f 100755
--- a/drivers/video/jzlcd.h --- a/drivers/video/jzlcd.h
+++ b/drivers/video/jzlcd.h +++ b/drivers/video/jzlcd.h
@@ -363,7 +363,11 @@ do { \ @@ -363,7 +363,11 @@ do { \
@ -222,98 +350,6 @@
} while (0) } while (0)
#define __lcd_display_off() \ #define __lcd_display_off() \
--- /dev/null --
+++ b/arch/mips/include/asm/mach-jz4740/board-qi_lb60.h 1.6.0.4
@@ -0,0 +1,79 @@
+/*
+ * linux/include/asm-mips/mach-jz4740/board-qi_lb60.h
+ *
+ * Copyright (c) 2009 Qi Hardware inc.,
+ * Author: Xiangfu Liu <xiangfu@qi-hardware.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 3 as
+ * published by the Free Software Foundation.
+ */
+
+#ifndef __ASM_JZ4740_QI_LB60_H__
+#define __ASM_JZ4740_QI_LB60_H__
+
+/*
+ * Frequencies of on-board oscillators
+ */
+#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */
+#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */
+
+/*
+ * GPIO
+ */
+#define GPIO_DC_DETE_N (2 * 32 + 26)
+#define GPIO_CHARG_STAT_N (2 * 32 + 27)
+#define GPIO_LED_EN (2 * 32 + 28)
+#define GPIO_LCD_CS (2 * 32 + 21)
+#define GPIO_DISP_OFF_N (3 * 32 + 21)
+#define GPIO_PWM (3 * 32 + 27)
+
+#define GPIO_AMP_EN (3 * 32 + 4)
+
+#define GPIO_SD_CD_N (3 * 32 + 0)
+#define GPIO_SD_VCC_EN_N (3 * 32 + 2)
+#define GPIO_SD_WP (3 * 32 + 16)
+
+#define GPIO_USB_DETE (3 * 32 + 28)
+#define GPIO_BUZZ_PWM (3 * 32 + 27)
+#define GPIO_UDC_HOTPLUG GPIO_USB_DETE
+
+#define GPIO_AUDIO_POP (1 * 32 + 29)
+#define GPIO_COB_TEST (1 * 32 + 30)
+
+#define GPIO_KEYOUT_BASE (2 * 32 + 10)
+#define GPIO_KEYIN_BASE (3 * 32 + 18)
+#define GPIO_KEYIN_8 (3 * 32 + 26)
+
+/*
+ * MMC/SD
+ */
+#define MSC_WP_PIN GPIO_SD_WP
+#define MSC_HOTPLUG_PIN GPIO_SD_CD_N
+#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N)
+
+#define __msc_init_io() \
+do { \
+ __gpio_as_output(GPIO_SD_VCC_EN_N); \
+ __gpio_as_input(GPIO_SD_CD_N); \
+} while (0)
+
+#define __msc_enable_power() \
+do { \
+ __gpio_clear_pin(GPIO_SD_VCC_EN_N); \
+} while (0)
+
+#define __msc_disable_power() \
+do { \
+ __gpio_set_pin(GPIO_SD_VCC_EN_N); \
+} while (0)
+
+#define __msc_card_detected(s) \
+({ \
+ int detected = 1; \
+ if (!__gpio_get_pin(GPIO_SD_CD_N)) \
+ detected = 0; \
+ detected; \
+})
+
+#endif /* __ASM_JZ4740_QI_LB60_H__ */
--- a/arch/mips/include/asm/mach-jz4740/jz4740.h
+++ b/arch/mips/include/asm/mach-jz4740/jz4740.h
@@ -43,6 +43,10 @@
#include <asm/mach-jz4740/board-virgo.h>
#endif
+#ifdef CONFIG_JZ4740_QI_LB60
+#include <asm/mach-jz4740/board-qi_lb60.h>
+#endif
+
/* Add other platform definition here ... */