mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
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[u-boot]remove-debug-option
Signed-off-by: Xiangfu Liu <xiangfu.z@gmail.com>
This commit is contained in:
parent
348808bd12
commit
151864b4ee
@ -30,10 +30,18 @@ index 16e8688..572d22b 100644
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__gpio_set_pin(GPIO_AUDIO_POP);
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__gpio_set_pin(GPIO_AUDIO_POP);
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diff --git a/include/configs/qi_lb60.h b/include/configs/qi_lb60.h
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diff --git a/include/configs/qi_lb60.h b/include/configs/qi_lb60.h
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index edc40bf..1e13653 100644
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index 68a2e87..1e13653 100644
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--- a/include/configs/qi_lb60.h
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--- a/include/configs/qi_lb60.h
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+++ b/include/configs/qi_lb60.h
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+++ b/include/configs/qi_lb60.h
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@@ -22,16 +22,16 @@
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@@ -13,7 +13,6 @@
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#ifndef __CONFIG_H
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#define __CONFIG_H
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-#define DEBUG
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#define CONFIG_MIPS32 1 /* MIPS32 CPU core */
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#define CONFIG_JzRISC 1 /* JzRISC core */
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#define CONFIG_JZSOC 1 /* Jz SoC */
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@@ -23,16 +22,16 @@
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#define CONFIG_DOS_PARTITION 1
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#define CONFIG_DOS_PARTITION 1
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#define CONFIG_PCMCIA_SLOT_A 1
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#define CONFIG_PCMCIA_SLOT_A 1
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@ -53,7 +61,7 @@ index edc40bf..1e13653 100644
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#define CONFIG_SYS_MIPS_TIMER_FREQ CONFIG_CPU_SPEED
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#define CONFIG_SYS_MIPS_TIMER_FREQ CONFIG_CPU_SPEED
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#define CONFIG_SYS_UART_BASE UART0_BASE /* Base of the UART channel */
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#define CONFIG_SYS_UART_BASE UART0_BASE /* Base of the UART channel */
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@@ -45,16 +45,15 @@
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@@ -46,16 +45,15 @@
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#define CONFIG_SYS_NO_FLASH 1
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#define CONFIG_SYS_NO_FLASH 1
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#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAUL)
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#define CONFIG_BOOTP_MASK (CONFIG_BOOTP_DEFAUL)
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@ -78,7 +86,7 @@ index edc40bf..1e13653 100644
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/* allow to overwrite serial and ethaddr */
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/* allow to overwrite serial and ethaddr */
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#define CONFIG_ENV_OVERWRITE
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#define CONFIG_ENV_OVERWRITE
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@@ -91,10 +90,10 @@
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@@ -92,10 +90,10 @@
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#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
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#define CONFIG_SYS_INIT_SP_OFFSET 0x400000
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@ -91,7 +99,7 @@ index edc40bf..1e13653 100644
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#define CONFIG_RX_ETH_BUFFER 16 /* use 16 rx buffers on jz47xx eth */
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#define CONFIG_RX_ETH_BUFFER 16 /* use 16 rx buffers on jz47xx eth */
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@@ -106,17 +105,22 @@
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@@ -107,17 +105,22 @@
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/*
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/*
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* NAND FLASH configuration
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* NAND FLASH configuration
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*/
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*/
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@ -122,7 +130,7 @@ index edc40bf..1e13653 100644
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#define CONFIG_SYS_ONENAND_BASE CONFIG_SYS_NAND_BASE
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#define CONFIG_SYS_ONENAND_BASE CONFIG_SYS_NAND_BASE
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/*
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/*
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@@ -149,25 +153,8 @@
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@@ -150,25 +153,8 @@
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/* environment starts here */
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/* environment starts here */
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
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#define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
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