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[xburst] Cleanup clock module a bit and replace last users of __cpm_*
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@19281 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@@ -18,45 +18,25 @@
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#include <linux/delay.h>
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#include <linux/suspend.h>
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#include <asm/mach-jz4740/regs.h>
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#include <asm/mach-jz4740/clock.h>
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extern void jz4740_intc_suspend(void);
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extern void jz4740_intc_resume(void);
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static int jz_pm_enter(suspend_state_t state)
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{
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unsigned long nfcsr = REG_EMC_NFCSR;
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uint32_t scr = REG_CPM_SCR;
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/* Disable nand flash */
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REG_EMC_NFCSR = ~0xff;
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udelay(100);
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/*stop udc and usb*/
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REG_CPM_SCR &= ~( 1<<6 | 1<<7);
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REG_CPM_SCR |= 0<<6 | 1<<7;
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jz4740_intc_suspend();
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/* Enter SLEEP mode */
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REG_CPM_LCR &= ~CPM_LCR_LPM_MASK;
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REG_CPM_LCR |= CPM_LCR_LPM_SLEEP;
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jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_SLEEP);
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__asm__(".set\tmips3\n\t"
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"wait\n\t"
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".set\tmips0");
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/* Restore to IDLE mode */
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REG_CPM_LCR &= ~CPM_LCR_LPM_MASK;
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REG_CPM_LCR |= CPM_LCR_LPM_IDLE;
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/* Restore nand flash control register */
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REG_EMC_NFCSR = nfcsr;
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jz4740_clock_set_wait_mode(JZ4740_WAIT_MODE_IDLE);
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jz4740_intc_resume();
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/* Restore sleep control register */
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REG_CPM_SCR = scr;
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return 0;
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}
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