strip the kernel version suffix from target directories, except for brcm-2.4 (the -2.4 will be included in the board name here). CONFIG_LINUX_<ver>_<board> becomes CONFIG_TARGET_<board>, same for profiles.

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8653 3c298f89-4303-0410-b956-a3cf2f4a3e73
2025-04-21 12:27:27 +03:00 · 2007-09-06 16:27:37 +00:00
parent 5389989aba
commit 17c7b6c3fd
701 changed files with 48 additions and 105 deletions
--- a/target/linux/adm5120/files/drivers/leds/leds-adm5120.c
+++ b/target/linux/adm5120/files/drivers/leds/leds-adm5120.c
@@ -0,0 +1,361 @@
+/*
+ *  $Id$
+ *
+ *  ADM5120 GPIO LED devices
+ *
+ *  Copyright (C) 2007 OpenWrt.org
+ *  Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version 2
+ *  of the License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the
+ *  Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ *  Boston, MA  02110-1301, USA.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/err.h>
+
+#include <linux/gpio_leds.h>
+
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+#include <asm/mach-adm5120/adm5120_info.h>
+
+#define NUM_LEDS_MAX	23
+
+#define ADM5120_GPIO_xxxx	0x100	/* an unknown pin */
+
+struct mach_data {
+	unsigned long machtype;
+	unsigned count;
+	struct gpio_led_platform_data *data;
+};
+
+struct adm5120_leddev {
+	struct platform_device pdev;
+	struct gpio_led_platform_data pdata;
+};
+
+static int led_count = 0;
+static struct adm5120_leddev *led_devs[NUM_LEDS_MAX];
+
+#define LED_ARRAY(n)				\
+static struct gpio_led_platform_data		\
+n ## _leds [] __initdata =
+
+#define LED_DATA(n,t,g,off,on) {		\
+	.name = (n),				\
+	.trigger = (t),				\
+	.gpio = (g),				\
+	.value_off = (off),			\
+	.value_on = (on)			\
+	}
+
+#define LED_STD(g,n,t)	LED_DATA((n),(t),(g), 0, 1)
+#define LED_INV(g,n,t)	LED_DATA((n),(t),(g), 1, 0)
+
+/*
+ * Compex boards
+ */
+#if defined(CONFIG_LEDS_ADM5120_EXPERIMENTAL)
+LED_ARRAY(np27g) { /* FIXME: untested */
+	LED_STD(ADM5120_GPIO_xxxx, "lan1",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "lan2",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "lan3",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "lan4",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "wan_cond",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "wlan",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "wan_act",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "usb1",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "usb2",	NULL ),
+	LED_INV(ADM5120_GPIO_PIN2, "power",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "diag",	NULL ),
+};
+#endif
+
+#if defined(CONFIG_LEDS_ADM5120_EXPERIMENTAL)
+LED_ARRAY(np28g) { /* FIXME: untested */
+	LED_STD(ADM5120_GPIO_xxxx, "lan1",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "lan2",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "lan3",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "wan",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "wlan",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "usb1",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "usb2",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "usb3",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "usb4",	NULL ),
+	LED_INV(ADM5120_GPIO_PIN2, "power",	NULL ),
+	LED_STD(ADM5120_GPIO_xxxx, "diag",	NULL ),
+};
+#endif
+
+LED_ARRAY(wp54g) {
+	LED_INV(ADM5120_GPIO_PIN2, "diag",	NULL ),
+	LED_INV(ADM5120_GPIO_PIN6, "wlan",	NULL ),
+	LED_INV(ADM5120_GPIO_PIN7, "wan",	NULL ),
+	LED_INV(ADM5120_GPIO_P0L0, "lan1",	NULL ),
+	LED_INV(ADM5120_GPIO_P1L0, "lan2",	NULL ),
+};
+
+/*
+ * Edimax boards
+ */
+LED_ARRAY(br6104k) {
+	LED_STD(ADM5120_GPIO_PIN0, "power",		NULL ),
+	LED_INV(ADM5120_GPIO_P0L1, "wan_speed",		NULL ),
+	LED_INV(ADM5120_GPIO_P0L0, "wan_lnkact",	NULL ),
+	LED_INV(ADM5120_GPIO_P1L1, "lan1_speed",	NULL ),
+	LED_INV(ADM5120_GPIO_P1L0, "lan1_lnkact",	NULL ),
+	LED_INV(ADM5120_GPIO_P2L1, "lan2_speed",	NULL ),
+	LED_INV(ADM5120_GPIO_P2L0, "lan2_lnkact",	NULL ),
+	LED_INV(ADM5120_GPIO_P3L1, "lan3_speed",	NULL ),
+	LED_INV(ADM5120_GPIO_P3L0, "lan3_lnkact",	NULL ),
+	LED_INV(ADM5120_GPIO_P4L1, "lan4_speed",	NULL ),
+	LED_INV(ADM5120_GPIO_P4L0, "lan4_lnkact",	NULL ),
+};
+
+/*
+ * Mikrotik boards
+ */
+#if defined(CONFIG_LEDS_ADM5120_EXPERIMENTAL)
+LED_ARRAY(rb100) { /* FIXME: untested */
+	LED_STD(ADM5120_GPIO_PIN6, "power",	NULL ),
+	LED_STD(ADM5120_GPIO_PIN3, "user",	NULL ),
+};
+#endif
+
+LED_ARRAY(rb133) {
+	LED_STD(ADM5120_GPIO_PIN6, "power",	NULL ),
+	LED_STD(ADM5120_GPIO_PIN5, "user",	NULL ),
+};
+
+/*
+ * ZyXEL boards
+ */
+#if defined(CONFIG_LEDS_ADM5120_EXPERIMENTAL)
+LED_ARRAY(p334) { /* FIXME: untested */
+	LED_INV(ADM5120_GPIO_xxxx, "power",	NULL ),
+	LED_INV(ADM5120_GPIO_xxxx, "lan1",	NULL ),
+	LED_INV(ADM5120_GPIO_xxxx, "lan2",	NULL ),
+	LED_INV(ADM5120_GPIO_xxxx, "lan3",	NULL ),
+	LED_INV(ADM5120_GPIO_xxxx, "lan4",	NULL ),
+	LED_INV(ADM5120_GPIO_xxxx, "wan",	NULL ),
+};
+#endif
+
+LED_ARRAY(p334wt) {
+	LED_INV(ADM5120_GPIO_PIN2, "power",	NULL ),
+	LED_INV(ADM5120_GPIO_P3L0, "lan1",	NULL ),
+	LED_INV(ADM5120_GPIO_P2L0, "lan2",	NULL ),
+	LED_INV(ADM5120_GPIO_P1L0, "lan3",	NULL ),
+	LED_INV(ADM5120_GPIO_P0L0, "lan4",	NULL ),
+	LED_INV(ADM5120_GPIO_P4L0, "wan",	NULL ),
+	LED_INV(ADM5120_GPIO_P4L2, "wlan",	NULL ),
+	LED_INV(ADM5120_GPIO_P2L2, "otist",	NULL ),
+	LED_INV(ADM5120_GPIO_P1L2, "hidden",	NULL ),
+};
+
+#if defined(CONFIG_LEDS_ADM5120_EXPERIMENTAL)
+LED_ARRAY(p335) { /* FIXME: untested */
+	LED_INV(ADM5120_GPIO_PIN2, "power",	NULL ),
+	LED_INV(ADM5120_GPIO_P3L0, "lan1",	NULL ),
+	LED_INV(ADM5120_GPIO_P2L0, "lan2",	NULL ),
+	LED_INV(ADM5120_GPIO_P1L0, "lan3",	NULL ),
+	LED_INV(ADM5120_GPIO_P0L0, "lan4",	NULL ),
+	LED_INV(ADM5120_GPIO_P4L0, "wan",	NULL ),
+	LED_INV(ADM5120_GPIO_P4L2, "wlan",	NULL ),
+	LED_INV(ADM5120_GPIO_P2L2, "otist",	NULL ),
+	LED_INV(ADM5120_GPIO_xxxx, "usb",	NULL ),
+};
+#endif
+
+/*
+ * Generic board
+ */
+LED_ARRAY(generic) {
+#if defined(CONFIG_LEDS_ADM5120_DIAG)
+	LED_STD(ADM5120_GPIO_PIN0, "gpio0",	NULL ),
+	LED_STD(ADM5120_GPIO_PIN1, "gpio1",	NULL ),
+	LED_STD(ADM5120_GPIO_PIN2, "gpio2",	NULL ),
+	LED_STD(ADM5120_GPIO_PIN3, "gpio3",	NULL ),
+	LED_STD(ADM5120_GPIO_PIN4, "gpio4",	NULL ),
+	LED_STD(ADM5120_GPIO_PIN5, "gpio5",	NULL ),
+	LED_STD(ADM5120_GPIO_PIN6, "gpio6",	NULL ),
+	LED_STD(ADM5120_GPIO_PIN7, "gpio7",	NULL ),
+	LED_STD(ADM5120_GPIO_P0L0, "port0led0",	NULL ),
+	LED_STD(ADM5120_GPIO_P0L1, "port0led1",	NULL ),
+	LED_STD(ADM5120_GPIO_P0L2, "port0led2",	NULL ),
+	LED_STD(ADM5120_GPIO_P1L0, "port1led0",	NULL ),
+	LED_STD(ADM5120_GPIO_P1L1, "port1led1",	NULL ),
+	LED_STD(ADM5120_GPIO_P1L2, "port1led2",	NULL ),
+	LED_STD(ADM5120_GPIO_P2L0, "port2led0",	NULL ),
+	LED_STD(ADM5120_GPIO_P2L1, "port2led1",	NULL ),
+	LED_STD(ADM5120_GPIO_P2L2, "port2led2",	NULL ),
+	LED_STD(ADM5120_GPIO_P3L0, "port3led0",	NULL ),
+	LED_STD(ADM5120_GPIO_P3L1, "port3led1",	NULL ),
+	LED_STD(ADM5120_GPIO_P3L2, "port3led2",	NULL ),
+	LED_STD(ADM5120_GPIO_P4L0, "port4led0",	NULL ),
+	LED_STD(ADM5120_GPIO_P4L1, "port4led1",	NULL ),
+	LED_STD(ADM5120_GPIO_P4L2, "port4led2",	NULL ),
+#endif
+};
+
+#define MACH_DATA(m, n) {				\
+	.machtype	= (m),				\
+	.count		= ARRAY_SIZE(n ## _leds),	\
+	.data		= n ## _leds			\
+}
+
+static struct mach_data machines[] __initdata = {
+	MACH_DATA(MACH_ADM5120_GENERIC, generic),
+	/* Compex */
+	MACH_DATA(MACH_ADM5120_WP54AG,	wp54g),
+	MACH_DATA(MACH_ADM5120_WP54G,	wp54g),
+	MACH_DATA(MACH_ADM5120_WP54G_WRT, wp54g),
+	MACH_DATA(MACH_ADM5120_WPP54AG,	wp54g),
+	MACH_DATA(MACH_ADM5120_WPP54G,	wp54g),
+	/* Edimax */
+	MACH_DATA(MACH_ADM5120_BR6104K,	br6104k),
+	/* Mikrotik */
+	MACH_DATA(MACH_ADM5120_RB_133,	rb133),
+	MACH_DATA(MACH_ADM5120_RB_133C,	rb133),
+	/* ZyXEL */
+	MACH_DATA(MACH_ADM5120_P334WT,	p334wt),
+#if defined(CONFIG_LEDS_ADM5120_EXPERIMENTAL)
+	/* untested */
+	MACH_DATA(MACH_ADM5120_P334,	p334),
+	MACH_DATA(MACH_ADM5120_P335,	p335),
+	MACH_DATA(MACH_ADM5120_RB_111,	rb100),
+	MACH_DATA(MACH_ADM5120_RB_112,	rb100),
+	MACH_DATA(MACH_ADM5120_NP27G,	np27g),
+	MACH_DATA(MACH_ADM5120_NP28G,	np28g),
+	MACH_DATA(MACH_ADM5120_NP28GHS,	np28g),
+#endif
+};
+
+static struct adm5120_leddev * __init
+create_leddev(struct gpio_led_platform_data *data)
+{
+	struct adm5120_leddev *p;
+
+	p = kzalloc(sizeof(*p), GFP_KERNEL);
+	if (p == NULL)
+		return NULL;
+
+	memcpy(&p->pdata, data, sizeof(p->pdata));
+	p->pdev.dev.platform_data = &p->pdata;
+
+	return p;
+}
+
+static void
+destroy_leddev(struct adm5120_leddev *led)
+{
+	if (led)
+		kfree(led);
+}
+
+static struct mach_data * __init
+adm5120_leds_findmach(unsigned long machtype)
+{
+	struct mach_data *mach;
+	int i;
+
+	mach = NULL;
+	for (i=0; i<ARRAY_SIZE(machines); i++) {
+		if (machines[i].machtype == machtype) {
+			mach = &machines[i];
+			break;
+		}
+	};
+
+#if defined(CONFIG_LEDS_ADM5120_DIAG)
+	if (mach == NULL)
+		mach = machines;
+#endif
+
+	return mach;
+}
+
+static int __init
+adm5120_leds_init(void)
+{
+	struct mach_data *mach;
+	int i, ret;
+
+	if (mips_machgroup != MACH_GROUP_ADM5120) {
+		ret = -EINVAL;
+		goto err;
+	}
+
+	mach = adm5120_leds_findmach(mips_machtype);
+	if (mach == NULL) {
+		/* the board is not yet supported */
+		ret = -EINVAL;
+		goto err;
+	}
+
+	for (i=0; i < mach->count; i++) {
+		led_devs[i] = create_leddev(&mach->data[i]);
+		if (led_devs[i] == NULL) {
+			ret = -ENOMEM;
+			goto err_destroy;
+		}
+		led_devs[i]->pdev.name = "gpio-led";
+		led_devs[i]->pdev.id = i;
+	}
+
+	for (i=0; i < mach->count; i++) {
+		ret = platform_device_register(&led_devs[i]->pdev);
+		if (ret)
+			goto err_unregister;
+	}
+
+	led_count = mach->count;
+	return 0;
+
+err_unregister:
+	for (i--; i>=0; i--)
+		platform_device_unregister(&led_devs[i]->pdev);
+
+err_destroy:
+	for (i=0; i<led_count; i++)
+		destroy_leddev(led_devs[i]);
+err:
+	return ret;
+}
+
+static void __exit
+adm5120_leds_exit(void)
+{
+	int i;
+
+	for (i=0; i < led_count; i++) {
+		platform_device_unregister(&led_devs[i]->pdev);
+		destroy_leddev(led_devs[i]);
+	}
+}
+
+module_init(adm5120_leds_init);
+module_exit(adm5120_leds_exit);
+
+MODULE_AUTHOR("Gabor Juhos <juhosg at openwrt.org>");
+MODULE_DESCRIPTION(DRV_DESC);
+MODULE_LICENSE("GPL");
+
--- a/target/linux/adm5120/files/drivers/leds/leds-gpio.c
+++ b/target/linux/adm5120/files/drivers/leds/leds-gpio.c
@@ -0,0 +1,212 @@
+/*
+ *  $Id$
+ *
+ *  Driver for LEDs connected to GPIO lines
+ *
+ *  Copyright (C) 2007 OpenWrt.org
+ *  Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
+ *
+ *  This file was derived from:
+ *    /drivers/led/leds-s3c24xx.c
+ *    (c) 2006 Simtec Electronics, Ben Dooks <ben@simtec.co.uk>
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version 2
+ *  of the License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the
+ *  Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ *  Boston, MA  02110-1301, USA.
+ *
+ */
+
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/platform_device.h>
+#include <linux/leds.h>
+#include <linux/err.h>
+
+#include <linux/gpio_leds.h>
+
+#include <asm/io.h>
+#include <asm/gpio.h>
+
+#define DRV_NAME "gpio-led"
+#define DRV_DESC "GPIO LEDs driver"
+
+struct gpio_led_device {
+	struct led_classdev cdev;
+	struct gpio_led_platform_data *pdata;
+};
+
+static inline struct gpio_led_device *pdev_to_led(struct platform_device *dev)
+{
+	return platform_get_drvdata(dev);
+}
+
+static inline struct gpio_led_device *class_to_led(struct led_classdev *led_cdev)
+{
+	return container_of(led_cdev, struct gpio_led_device, cdev);
+}
+
+static void gpio_led_set(struct led_classdev *led_cdev,
+			    enum led_brightness brightness)
+{
+	struct gpio_led_device *led;
+	struct gpio_led_platform_data *pdata;
+
+	led = class_to_led(led_cdev);
+	pdata = led->pdata;
+
+	switch (brightness) {
+	case LED_FULL:
+		gpio_direction_output(pdata->gpio, pdata->value_on);
+		break;
+	case LED_OFF:
+		gpio_direction_output(pdata->gpio, pdata->value_off);
+		break;
+	default:
+		gpio_direction_output(pdata->gpio, brightness);
+		break;
+	}
+}
+
+static int __devinit gpio_led_probe(struct platform_device *dev)
+{
+	struct gpio_led_platform_data *pdata;
+	struct gpio_led_device *led;
+	int ret;
+
+	pdata = dev->dev.platform_data;
+	if (pdata == NULL) {
+		dev_err(&dev->dev, "no platform data, id=%d\n", dev->id);
+		ret = -EINVAL;
+		goto err;
+	}
+
+	if (pdata->name == NULL) {
+		dev_err(&dev->dev, "no led name specified\n");
+		ret = -EINVAL;
+		goto err;
+	}
+
+	ret = gpio_request(pdata->gpio, pdata->name);
+	if (ret) {
+		dev_err(&dev->dev, "gpio_request failed\n");
+		goto err;
+	}
+
+	led = kzalloc(sizeof(*led), GFP_KERNEL);
+	if (led == NULL) {
+		dev_err(&dev->dev, "no memory for device");
+		ret = -ENOMEM;
+		goto err_free_gpio;
+	}
+
+	platform_set_drvdata(dev, led);
+	led->pdata = pdata;
+	led->cdev.name = pdata->name;
+	led->cdev.brightness_set = gpio_led_set;
+#ifdef CONFIG_LEDS_TRIGGERS
+	led->cdev.default_trigger = pdata->trigger;
+#endif
+
+	ret = led_classdev_register(&dev->dev, &led->cdev);
+	if (ret < 0) {
+		dev_err(&dev->dev, "led_classdev_register failed");
+		goto err_free_led;
+	}
+
+	return 0;
+
+err_free_led:
+	kfree(led);
+err_free_gpio:
+	gpio_free(pdata->gpio);
+err:
+	return ret;
+}
+
+static int __devexit gpio_led_remove(struct platform_device *dev)
+{
+	struct gpio_led_device *led;
+	struct gpio_led_platform_data *pdata;
+
+	pdata = dev->dev.platform_data;
+
+	led = pdev_to_led(dev);
+	led_classdev_unregister(&led->cdev);
+	kfree(led);
+
+	gpio_free(pdata->gpio);
+
+	return 0;
+}
+
+#ifdef CONFIG_PM
+static int gpio_led_suspend(struct platform_device *dev,
+		pm_message_t state)
+{
+	struct gpio_led_device *led;
+
+	led = pdev_to_led(dev);
+	led_classdev_suspend(&led->cdev);
+
+	return 0;
+}
+
+static int gpio_led_resume(struct platform_device *dev)
+{
+	struct gpio_led_device *led;
+
+	led = pdev_to_led(dev);
+	led_classdev_resume(&led->cdev);
+
+	return 0;
+}
+#endif /* CONFIG_PM */
+
+static struct platform_driver gpio_led_driver = {
+	.probe		= gpio_led_probe,
+	.remove		= __devexit_p(gpio_led_remove),
+#ifdef CONFIG_PM
+	.suspend	= gpio_led_suspend,
+	.resume		= gpio_led_resume,
+#endif
+	.driver		= {
+		.name		= DRV_NAME,
+		.owner		= THIS_MODULE,
+	},
+};
+
+static int __init gpio_led_init(void)
+{
+	int ret;
+
+	ret = platform_driver_register(&gpio_led_driver);
+	if (ret)
+		printk(KERN_ALERT DRV_DESC " register failed\n");
+	else
+		printk(KERN_INFO DRV_DESC " registered\n");
+
+	return ret;
+}
+
+static void __exit gpio_led_exit(void)
+{
+	platform_driver_unregister(&gpio_led_driver);
+}
+
+module_init(gpio_led_init);
+module_exit(gpio_led_exit);
+
+MODULE_AUTHOR("Gabor Juhos <juhosg at openwrt.org>");
+MODULE_DESCRIPTION(DRV_DESC);
+MODULE_LICENSE("GPL");
--- a/target/linux/adm5120/files/drivers/mtd/maps/adm5120-flash.c
+++ b/target/linux/adm5120/files/drivers/mtd/maps/adm5120-flash.c
@@ -0,0 +1,574 @@
+/*
+ *  $Id$
+ *
+ *  Platform driver for NOR flash devices on ADM5120 based boards
+ *
+ *  Copyright (C) 2007 OpenWrt.org
+ *  Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
+ *
+ *  This file was derived from: drivers/mtd/map/physmap.c
+ *	Copyright (C) 2003 MontaVista Software Inc.
+ *	Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version 2
+ *  of the License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the
+ *  Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ *  Boston, MA  02110-1301, USA.
+ *
+ */
+
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <linux/slab.h>
+#include <linux/device.h>
+
+#include <linux/platform_device.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/map.h>
+#include <linux/mtd/partitions.h>
+
+#include <asm/io.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_switch.h>
+#include <asm/mach-adm5120/adm5120_mpmc.h>
+#include <asm/mach-adm5120/adm5120_platform.h>
+
+#define DRV_NAME	"adm5120-flash"
+#define DRV_DESC	"ADM5120 flash MAP driver"
+#define MAX_PARSED_PARTS 8
+
+#ifdef ADM5120_FLASH_DEBUG
+#define MAP_DBG(m, f, a...)	printk(KERN_INFO "%s: " f, (m->name) , ## a)
+#else
+#define MAP_DBG(m, f, a...)	do {} while (0)
+#endif
+#define MAP_ERR(m, f, a...)	printk(KERN_ERR "%s: " f, (m->name) , ## a)
+#define MAP_INFO(m, f, a...)	printk(KERN_INFO "%s: " f, (m->name) , ## a)
+
+struct adm5120_map_info {
+	struct map_info	map;
+	void 		(*switch_bank)(unsigned);
+	unsigned long	window_size;
+};
+
+struct adm5120_flash_info {
+	struct mtd_info		*mtd;
+	struct resource		*res;
+	struct platform_device	*dev;
+	struct adm5120_map_info	amap;
+#ifdef CONFIG_MTD_PARTITIONS
+	int			nr_parts;
+	struct mtd_partition	*parts[MAX_PARSED_PARTS];
+#endif
+};
+
+struct flash_desc {
+	u32	phys;
+	u32	srs_shift;
+	u32	mpmc_reg;
+};
+
+/*
+ * Globals
+ */
+static DEFINE_SPINLOCK(adm5120_flash_spin);
+#define FLASH_LOCK()	spin_lock(&adm5120_flash_spin)
+#define FLASH_UNLOCK()	spin_unlock(&adm5120_flash_spin)
+
+static u32 flash_bankwidths[4] = { 1, 2, 4, 0 };
+
+static u32 flash_sizes[8] = {
+	0, 512*1024, 1024*1024, 2*1024*1024,
+	4*1024*1024, 0, 0, 0
+};
+
+static struct flash_desc flash_descs[2] = {
+	{
+		.phys		= ADM5120_SRAM0_BASE,
+		.mpmc_reg	= MPMC_REG_SC1,
+		.srs_shift	= MEMCTRL_SRS0_SHIFT,
+	}, {
+		.phys		= ADM5120_SRAM1_BASE,
+		.mpmc_reg	= MPMC_REG_SC0,
+		.srs_shift	= MEMCTRL_SRS1_SHIFT,
+	}
+};
+
+static const char *probe_types[] = {
+	"cfi_probe",
+	"jedec_probe",
+	"map_rom",
+	NULL
+};
+
+#ifdef CONFIG_MTD_PARTITIONS
+static const char *parse_types[] = {
+	"cmdlinepart",
+#ifdef CONFIG_MTD_REDBOOT_PARTS
+	"RedBoot",
+#endif
+#ifdef CONFIG_MTD_MYLOADER_PARTS
+	"MyLoader",
+#endif
+};
+#endif
+
+#define BANK_SIZE	(2<<20)
+#define BANK_SIZE_MAX	(4<<20)
+#define BANK_OFFS_MASK	(BANK_SIZE-1)
+#define BANK_START_MASK	(~BANK_OFFS_MASK)
+
+static inline struct adm5120_map_info *map_to_amap(struct map_info *map)
+{
+	return (struct adm5120_map_info *)map;
+}
+
+static void adm5120_flash_switchbank(struct map_info *map,
+		unsigned long ofs)
+{
+	struct adm5120_map_info *amap = map_to_amap(map);
+	unsigned bank;
+
+	if (amap->switch_bank == NULL)
+		return;
+
+	bank = (ofs & BANK_START_MASK) >> 21;
+	if (bank > 1)
+		BUG();
+
+	MAP_DBG(map, "switching to bank %u, ofs=%lX\n", bank, ofs);
+	amap->switch_bank(bank);
+}
+
+static map_word adm5120_flash_read(struct map_info *map, unsigned long ofs)
+{
+	struct adm5120_map_info *amap = map_to_amap(map);
+	map_word ret;
+
+	MAP_DBG(map, "reading from ofs %lX\n", ofs);
+
+	if (ofs >= amap->window_size)
+		return map_word_ff(map);
+
+	FLASH_LOCK();
+	adm5120_flash_switchbank(map, ofs);
+	ret = inline_map_read(map, (ofs & (amap->window_size-1)));
+	FLASH_UNLOCK();
+
+	return ret;
+}
+
+static void adm5120_flash_write(struct map_info *map, const map_word datum,
+		unsigned long ofs)
+{
+	struct adm5120_map_info *amap = map_to_amap(map);
+
+	MAP_DBG(map,"writing to ofs %lX\n", ofs);
+
+	if (ofs > amap->window_size)
+		return;
+
+	FLASH_LOCK();
+	adm5120_flash_switchbank(map, ofs);
+	inline_map_write(map, datum, (ofs & (amap->window_size-1)));
+	FLASH_UNLOCK();
+}
+
+static void adm5120_flash_copy_from(struct map_info *map, void *to,
+		unsigned long from, ssize_t len)
+{
+	struct adm5120_map_info *amap = map_to_amap(map);
+	char *p;
+	ssize_t t;
+
+	MAP_DBG(map, "copy_from, to=%lX, from=%lX, len=%lX\n",
+		(unsigned long)to, from, (unsigned long)len);
+
+	if (from > amap->window_size)
+		return;
+
+	p = (char *)to;
+	while (len > 0) {
+		t = len;
+		if ((from < BANK_SIZE) && ((from+len) > BANK_SIZE))
+			t = BANK_SIZE-from;
+
+		FLASH_LOCK();
+		MAP_DBG(map, "copying %lu byte(s) from %lX to %lX\n",
+			(unsigned long)t, (from & (amap->window_size-1)),
+			(unsigned long)p);
+		adm5120_flash_switchbank(map, from);
+		inline_map_copy_from(map, p, (from & (amap->window_size-1)), t);
+		FLASH_UNLOCK();
+		p += t;
+		from += t;
+		len -= t;
+	}
+}
+
+static int adm5120_flash_initres(struct adm5120_flash_info *info)
+{
+	struct map_info *map = &info->amap.map;
+	int err = 0;
+
+	info->res = request_mem_region(map->phys, map->size, map->name);
+	if (info->res == NULL) {
+		MAP_ERR(map, "could not reserve memory region\n");
+		err = -ENOMEM;
+		goto out;
+	}
+
+	map->virt = ioremap_nocache(map->phys, map->size);
+	if (map->virt == NULL) {
+		MAP_ERR(map, "failed to ioremap flash region\n");
+		err = -ENOMEM;
+		goto out;
+	}
+
+out:
+	return err;
+}
+
+#define SWITCH_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))
+#define SWITCH_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_SWITCH_BASE)+(r))=(v)
+#define MPMC_READ(r) *(u32 *)(KSEG1ADDR(ADM5120_MPMC_BASE)+(r))
+#define MPMC_WRITE(r,v) *(u32 *)(KSEG1ADDR(ADM5120_MPMC_BASE)+(r))=(v)
+
+static int adm5120_flash_initinfo(struct adm5120_flash_info *info,
+		struct platform_device *dev)
+{
+	struct map_info *map = &info->amap.map;
+	struct adm5120_flash_platform_data *pdata = dev->dev.platform_data;
+	struct flash_desc *fdesc;
+	u32 t;
+
+	map->name = dev->dev.bus_id;
+
+	if (dev->id > 1) {
+		MAP_ERR(map, "invalid flash id\n");
+		goto err_out;
+	}
+
+	fdesc = &flash_descs[dev->id];
+
+	/* get memory window size */
+	t = SWITCH_READ(SWITCH_REG_MEMCTRL) >> fdesc->srs_shift;
+	t &= MEMCTRL_SRS_MASK;
+	info->amap.window_size = flash_sizes[t];
+	if (info->amap.window_size == 0) {
+		MAP_ERR(map, "invalid flash size detected\n");
+		goto err_out;
+	}
+
+	/* get flash bus width */
+	t = MPMC_READ(fdesc->mpmc_reg) & SC_MW_MASK;
+	map->bankwidth = flash_bankwidths[t];
+	if (map->bankwidth == 0) {
+		MAP_ERR(map, "invalid bus width detected\n");
+		goto err_out;
+	}
+
+	map->phys = fdesc->phys;
+	map->size = BANK_SIZE_MAX;
+
+	simple_map_init(map);
+	map->read = adm5120_flash_read;
+	map->write = adm5120_flash_write;
+	map->copy_from = adm5120_flash_copy_from;
+
+	if (pdata) {
+		map->set_vpp = pdata->set_vpp;
+		info->amap.switch_bank = pdata->switch_bank;
+	}
+
+	info->dev = dev;
+
+	MAP_INFO(map, "probing at 0x%lX, size:%ldKiB, width:%d bits\n",
+		(unsigned long)map->phys,
+		(unsigned long)info->amap.window_size >> 10,
+		map->bankwidth*8);
+
+	return 0;
+
+err_out:
+	return -ENODEV;
+}
+
+static void adm5120_flash_initbanks(struct adm5120_flash_info *info)
+{
+	struct map_info *map = &info->amap.map;
+
+	if (info->mtd->size <= BANK_SIZE)
+		/* no bank switching needed */
+		return;
+
+	if (info->amap.switch_bank) {
+		info->amap.window_size = info->mtd->size;
+		return;
+	}
+
+	MAP_ERR(map, "reduce visibility from %ldKiB to %ldKiB\n",
+		(unsigned long)map->size >> 10,
+		(unsigned long)info->mtd->size >> 10);
+
+	info->mtd->size = info->amap.window_size;
+}
+
+#ifdef CONFIG_MTD_PARTITIONS
+static int adm5120_flash_initparts(struct adm5120_flash_info *info)
+{
+	struct adm5120_flash_platform_data *pdata = info->dev->dev.platform_data;
+	struct map_info *map = &info->amap.map;
+	int num_parsers;
+	const char *parser[2];
+	int err = 0;
+	int nr_parts;
+	int i;
+
+	info->nr_parts = 0;
+
+	if (pdata == NULL)
+		goto out;
+
+	if (pdata->nr_parts) {
+		MAP_INFO(map, "adding static partitions\n");
+		err = add_mtd_partitions(info->mtd, pdata->parts,
+			pdata->nr_parts);
+		if (err == 0) {
+			info->nr_parts += pdata->nr_parts;
+			goto out;
+		}
+	}
+
+	num_parsers = ARRAY_SIZE(parse_types);
+	if (num_parsers > MAX_PARSED_PARTS)
+		num_parsers = MAX_PARSED_PARTS;
+
+	parser[1] = NULL;
+	for (i=0; i<num_parsers; i++) {
+		parser[0] = parse_types[i];
+
+		MAP_INFO(map, "parsing \"%s\" partitions\n",
+			parser[0]);
+		nr_parts = parse_mtd_partitions(info->mtd, parser,
+			&info->parts[i], 0);
+
+		if (nr_parts <= 0)
+			continue;
+
+		MAP_INFO(map, "adding \"%s\" partitions\n",
+			parser[0]);
+
+		err = add_mtd_partitions(info->mtd, info->parts[i], nr_parts);
+		if (err)
+			break;
+
+		info->nr_parts += nr_parts;
+	}
+out:
+	return err;
+}
+#else
+static int adm5120_flash_initparts(struct adm5120_flash_info *info)
+{
+	return 0;
+}
+#endif /* CONFIG_MTD_PARTITIONS */
+
+#ifdef CONFIG_MTD_PARTITIONS
+static void adm5120_flash_remove_mtd(struct adm5120_flash_info *info)
+{
+	int i;
+
+	if (info->nr_parts) {
+		del_mtd_partitions(info->mtd);
+		for (i=0; i<MAX_PARSED_PARTS; i++)
+			if (info->parts[i] != NULL)
+				kfree(info->parts[i]);
+	} else {
+		del_mtd_device(info->mtd);
+	}
+}
+#else
+static void adm5120_flash_remove_mtd(struct adm5120_flash_info *info)
+{
+	del_mtd_device(info->mtd);
+}
+#endif
+
+static int adm5120_flash_remove(struct platform_device *dev)
+{
+	struct adm5120_flash_info *info;
+
+	info = platform_get_drvdata(dev);
+	if (info == NULL)
+		return 0;
+
+	platform_set_drvdata(dev, NULL);
+
+	if (info->mtd != NULL) {
+		adm5120_flash_remove_mtd(info);
+		map_destroy(info->mtd);
+	}
+
+	if (info->amap.map.virt != NULL)
+		iounmap(info->amap.map.virt);
+
+	if (info->res != NULL) {
+		release_resource(info->res);
+		kfree(info->res);
+	}
+
+	return 0;
+}
+
+static int adm5120_flash_probe(struct platform_device *dev)
+{
+	struct adm5120_flash_info *info;
+	struct map_info *map;
+	const char **probe_type;
+	int err;
+
+	info = kzalloc(sizeof(*info), GFP_KERNEL);
+	if (info == NULL) {
+		err = -ENOMEM;
+		goto err_out;
+	}
+
+	platform_set_drvdata(dev, info);
+
+	err = adm5120_flash_initinfo(info, dev);
+	if (err)
+		goto err_out;
+
+	err = adm5120_flash_initres(info);
+	if (err)
+		goto err_out;
+
+	map = &info->amap.map;
+	for (probe_type = probe_types; info->mtd == NULL && *probe_type != NULL;
+		probe_type++)
+		info->mtd = do_map_probe(*probe_type, map);
+
+	if (info->mtd == NULL) {
+		MAP_ERR(map, "map_probe failed\n");
+		err = -ENXIO;
+		goto err_out;
+	}
+
+	adm5120_flash_initbanks(info);
+
+	if (info->mtd->size < info->amap.window_size) {
+		/* readjust resources */
+		iounmap(map->virt);
+		release_resource(info->res);
+		kfree(info->res);
+
+		info->amap.window_size = info->mtd->size;
+		map->size = info->mtd->size;
+		MAP_INFO(map, "reducing map size to %ldKiB\n",
+			(unsigned long)map->size >> 10);
+		err = adm5120_flash_initres(info);
+		if (err)
+			goto err_out;
+	}
+
+	MAP_INFO(map, "found at 0x%lX, size:%ldKiB, width:%d bits\n",
+		(unsigned long)map->phys, (unsigned long)info->mtd->size >> 10,
+		map->bankwidth*8);
+
+	info->mtd->owner = THIS_MODULE;
+
+	err = adm5120_flash_initparts(info);
+	if (err)
+		goto err_out;
+
+	if (info->nr_parts == 0) {
+		MAP_INFO(map, "no partitions available, registering whole flash\n");
+		add_mtd_device(info->mtd);
+	}
+
+	return 0;
+
+err_out:
+	adm5120_flash_remove(dev);
+	return err;
+}
+
+#ifdef CONFIG_PM
+static int adm5120_flash_suspend(struct platform_device *dev, pm_message_t state)
+{
+	struct adm5120_flash_info *info = platform_get_drvdata(dev);
+	int ret = 0;
+
+	if (info)
+		ret = info->mtd->suspend(info->mtd);
+
+	return ret;
+}
+
+static int adm5120_flash_resume(struct platform_device *dev)
+{
+	struct adm5120_flash_info *info = platform_get_drvdata(dev);
+
+	if (info)
+		info->mtd->resume(info->mtd);
+
+	return 0;
+}
+
+static void adm5120_flash_shutdown(struct platform_device *dev)
+{
+	struct adm5120_flash_info *info = platform_get_drvdata(dev);
+
+	if (info && info->mtd->suspend(info->mtd) == 0)
+		info->mtd->resume(info->mtd);
+}
+#endif
+
+static struct platform_driver adm5120_flash_driver = {
+	.probe		= adm5120_flash_probe,
+	.remove		= adm5120_flash_remove,
+#ifdef CONFIG_PM
+	.suspend	= adm5120_flash_suspend,
+	.resume		= adm5120_flash_resume,
+	.shutdown	= adm5120_flash_shutdown,
+#endif
+	.driver		= {
+		.name	= DRV_NAME,
+	},
+};
+
+static int __init adm5120_flash_init(void)
+{
+	int err;
+
+	err = platform_driver_register(&adm5120_flash_driver);
+
+	return err;
+}
+
+static void __exit adm5120_flash_exit(void)
+{
+	platform_driver_unregister(&adm5120_flash_driver);
+}
+
+module_init(adm5120_flash_init);
+module_exit(adm5120_flash_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Gabor Juhos <juhosg at openwrt.org>");
+MODULE_DESCRIPTION(DRV_DESC);
--- a/target/linux/adm5120/files/drivers/mtd/myloader.c
+++ b/target/linux/adm5120/files/drivers/mtd/myloader.c
@@ -0,0 +1,178 @@
+/*
+ *  $Id$
+ *
+ *  Parse MyLoader-style flash partition tables and produce a Linux partition
+ *  array to match.
+ *
+ *  Copyright (C) 2007 OpenWrt.org
+ *  Copyright (C) 2007 Gabor Juhos <juhosg at openwrt.org>
+ *
+ *  This file was based on drivers/mtd/redboot.c
+ *  Author: Red Hat, Inc. - David Woodhouse <dwmw2@cambridge.redhat.com>
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version 2
+ *  of the License, or (at your option) any later version.
+ *
+ *  This program is distributed in the hope that it will be useful,
+ *  but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *  GNU General Public License for more details.
+ *
+ *  You should have received a copy of the GNU General Public License
+ *  along with this program; if not, write to the
+ *  Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor,
+ *  Boston, MA  02110-1301, USA.
+ */
+
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/init.h>
+#include <linux/vmalloc.h>
+
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+
+#include <linux/byteorder/generic.h>
+
+#include <prom/myloader.h>
+
+#define NAME_LEN_MAX		20
+#define NAME_MYLOADER		"MyLoader"
+#define NAME_PARTITION_TABLE	"Partition Table"
+#define BLOCK_LEN_MIN		0x10000
+
+int parse_myloader_partitions(struct mtd_info *master,
+			struct mtd_partition **pparts,
+			unsigned long origin)
+{
+	struct mylo_partition_table *tab;
+	struct mylo_partition *part;
+	struct mtd_partition *mtd_parts;
+	struct mtd_partition *mtd_part;
+	int num_parts;
+	int ret, i;
+	size_t retlen;
+	size_t parts_len;
+	char *names;
+	unsigned long offset;
+	unsigned long blocklen;
+
+	tab = vmalloc(sizeof(*tab));
+	if (!tab) {
+		return -ENOMEM;
+		goto out;
+	}
+
+	blocklen = master->erasesize;
+	if (blocklen < BLOCK_LEN_MIN)
+		blocklen = BLOCK_LEN_MIN;
+
+	/* Partition Table is always located on the second erase block */
+	offset = blocklen;
+	printk(KERN_NOTICE "%s: searching for MyLoader partition table at "
+			"offset 0x%lx\n", master->name, offset);
+
+	ret = master->read(master, offset, sizeof(*tab), &retlen, (void *)tab);
+	if (ret)
+		goto out;
+
+	if (retlen != sizeof(*tab)) {
+		ret = -EIO;
+		goto out_free_buf;
+	}
+
+	/* Check for Partition Table magic number */
+	if (tab->magic != le32_to_cpu(MYLO_MAGIC_PARTITIONS)) {
+		printk(KERN_NOTICE "%s: no MyLoader partition table found\n",
+			master->name);
+		ret = 0;
+		goto out_free_buf;
+	}
+
+	/* The MyLoader and the Partition Table is always present */
+	num_parts = 2;
+
+	/* Detect number of used partitions */
+	for (i = 0; i < MYLO_MAX_PARTITIONS; i++) {
+		part = &tab->partitions[i];
+
+		if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE)
+			continue;
+
+		num_parts++;
+	}
+
+	mtd_parts = kzalloc((num_parts*sizeof(*mtd_part) + num_parts*NAME_LEN_MAX),
+			 GFP_KERNEL);
+
+	if (!mtd_parts) {
+		ret = -ENOMEM;
+		goto out_free_buf;
+	}
+
+	mtd_part = mtd_parts;
+	names = (char *)&mtd_parts[num_parts];
+
+	strncpy(names, NAME_MYLOADER, NAME_LEN_MAX-1);
+	mtd_part->name = names;
+	mtd_part->offset = 0;
+	mtd_part->size = blocklen;
+	mtd_part->mask_flags = MTD_WRITEABLE;
+	mtd_part++;
+	names += NAME_LEN_MAX;
+
+	strncpy(names, NAME_PARTITION_TABLE, NAME_LEN_MAX-1);
+	mtd_part->name = names;
+	mtd_part->offset = blocklen;
+	mtd_part->size = blocklen;
+	mtd_part->mask_flags = MTD_WRITEABLE;
+	mtd_part++;
+	names += NAME_LEN_MAX;
+
+	for (i = 0; i < MYLO_MAX_PARTITIONS; i++) {
+		part = &tab->partitions[i];
+
+		if (le16_to_cpu(part->type) == PARTITION_TYPE_FREE)
+			continue;
+
+		sprintf(names, "partition%d", i);
+		mtd_part->offset = le32_to_cpu(part->addr);
+		mtd_part->size = le32_to_cpu(part->size);
+		mtd_part->name = names;
+		mtd_part++;
+		names += NAME_LEN_MAX;
+	}
+
+	*pparts = mtd_parts;
+	ret = num_parts;
+
+out_free_buf:
+	vfree(tab);
+out:
+	return ret;
+}
+
+static struct mtd_part_parser mylo_mtd_parser = {
+	.owner = THIS_MODULE,
+	.parse_fn = parse_myloader_partitions,
+	.name = NAME_MYLOADER,
+};
+
+static int __init mylo_mtd_parser_init(void)
+{
+	return register_mtd_parser(&mylo_mtd_parser);
+}
+
+static void __exit mylo_mtd_parser_exit(void)
+{
+	deregister_mtd_parser(&mylo_mtd_parser);
+}
+
+module_init(mylo_mtd_parser_init);
+module_exit(mylo_mtd_parser_exit);
+
+MODULE_AUTHOR("Gabor Juhos <juhosg at openwrt.org>");
+MODULE_DESCRIPTION("Parsing code for MyLoader partition tables");
+MODULE_LICENSE("GPL");
--- a/target/linux/adm5120/files/drivers/mtd/nand/rbmipsnand.c
+++ b/target/linux/adm5120/files/drivers/mtd/nand/rbmipsnand.c
@@ -0,0 +1,207 @@
+/*==============================================================================*/
+/* rbmipsnand.c                                                                 */
+/* This module is derived from the 2.4 driver shipped by Microtik for their     */
+/* Routerboard 1xx and 5xx series boards.  It provides support for the built in */
+/* NAND flash on the Routerboard 1xx series boards for Linux 2.6.19+.           */
+/* Licence: Original Microtik code seems not to have a licence.                 */
+/*          Rewritten code all GPL V2.                                          */
+/* Copyright(C) 2007 david.goodenough@linkchoose.co.uk (for rewriten code)      */
+/*==============================================================================*/
+
+#include <linux/io.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/mtd/nand.h>
+#include <linux/mtd/mtd.h>
+#include <linux/mtd/partitions.h>
+#include <linux/delay.h>
+
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/bootinfo.h>
+#include <asm/mach-adm5120/adm5120_info.h>
+#include <asm/mach-adm5120/adm5120_defs.h>
+
+#define SMEM1(x) (*((volatile unsigned char *) (KSEG1ADDR(ADM5120_SRAM1_BASE) + x)))
+
+#define NAND_RW_REG	0x0	//data register
+#define NAND_SET_CEn	0x1	//CE# low
+#define NAND_CLR_CEn	0x2	//CE# high
+#define NAND_CLR_CLE	0x3	//CLE low
+#define NAND_SET_CLE	0x4	//CLE high
+#define NAND_CLR_ALE	0x5	//ALE low
+#define NAND_SET_ALE	0x6	//ALE high
+#define NAND_SET_SPn	0x7	//SP# low (use spare area)
+#define NAND_CLR_SPn	0x8	//SP# high (do not use spare area)
+#define NAND_SET_WPn	0x9	//WP# low
+#define NAND_CLR_WPn	0xA	//WP# high
+#define NAND_STS_REG	0xB	//Status register
+
+#define MEM32(x) *((volatile unsigned *) (x))
+
+static struct mtd_partition partition_info[] = {
+    {
+        name: "RouterBoard NAND Boot",
+        offset: 0,
+        size: 4 * 1024 * 1024
+    },
+    {
+        name: "rootfs",
+        offset: MTDPART_OFS_NXTBLK,
+        size: MTDPART_SIZ_FULL
+    }
+};
+
+static struct nand_ecclayout rb_ecclayout = {
+        .eccbytes = 6,
+        .eccpos = { 8, 9, 10, 13, 14, 15 },
+        .oobavail = 9,
+        .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1} }
+};
+
+struct adm5120_nand_info {
+	struct nand_chip chip;
+	struct mtd_info mtd;
+	void __iomem *io_base;
+#ifdef CONFIG_MTD_PARTITIONS
+	int	nr_parts;
+	struct mtd_partition *parts;
+#endif
+	unsigned int	init_ok;
+};
+
+static int rb100_dev_ready(struct mtd_info *mtd)
+{
+	return SMEM1(NAND_STS_REG) & 0x80;
+}
+
+static void rbmips_hwcontrol100(struct mtd_info *mtd, int cmd, unsigned int ctrl)
+{
+    	struct nand_chip *chip = mtd->priv;
+	if (ctrl & NAND_CTRL_CHANGE)
+	{
+        	SMEM1((( ctrl & NAND_CLE) ? NAND_SET_CLE : NAND_CLR_CLE)) = 0x01;
+        	SMEM1((( ctrl & NAND_ALE) ? NAND_SET_ALE : NAND_CLR_ALE)) = 0x01;
+        	SMEM1((( ctrl & NAND_NCE) ? NAND_SET_CEn : NAND_CLR_CEn)) = 0x01;
+        }
+    	if (cmd != NAND_CMD_NONE)
+        	writeb( cmd, chip->IO_ADDR_W);
+}
+
+/*========================================================================*/
+/* We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader */
+/* will not be able to find the kernel that we load.  So set the oobinfo  */
+/* when creating the partitions.                                          */ 
+/*========================================================================*/
+
+
+unsigned get_rbnand_block_size(struct adm5120_nand_info *data)
+{
+	return data->init_ok ? data->mtd.writesize : 0;
+}
+
+EXPORT_SYMBOL(get_rbnand_block_size);
+
+static int rbmips_probe(struct platform_device *pdev)
+{
+	struct adm5120_nand_info *data;
+	int res = 0;
+
+	/* Allocate memory for the nand_chip structure */
+	data = kzalloc(sizeof(*data), GFP_KERNEL);
+	if (!data) {
+		dev_err(&pdev->dev, "Failed to allocate device structure\n");
+		return -ENOMEM;
+
+	}
+	
+	data->io_base = ioremap(pdev->resource[0].start, pdev->resource[0].end - pdev->resource[0].start + 1);
+
+	if (data->io_base == NULL) {
+		dev_err(&pdev->dev, "ioremap failed\n");
+		kfree(data);
+		return -EIO;
+	}
+
+	MEM32(0xB2000064) = 0x100;
+	MEM32(0xB2000008) = 0x1;
+	SMEM1(NAND_SET_SPn) = 0x01;
+	SMEM1(NAND_CLR_WPn) = 0x01;
+
+	data->chip.priv = &data;
+	data->mtd.priv = &data->chip;
+	data->mtd.owner = THIS_MODULE;
+
+	data->init_ok = 0;
+	data->chip.IO_ADDR_R = (unsigned char *)KSEG1ADDR(ADM5120_SRAM1_BASE);
+	data->chip.IO_ADDR_W = data->chip.IO_ADDR_R;
+	data->chip.cmd_ctrl = rbmips_hwcontrol100;
+	data->chip.dev_ready = rb100_dev_ready;
+	data->chip.ecc.mode = NAND_ECC_SOFT;
+	data->chip.ecc.layout = &rb_ecclayout;
+	data->chip.chip_delay = 25;
+	data->chip.options |= NAND_NO_AUTOINCR;
+
+	platform_set_drvdata(pdev, data);
+
+	/* Why do we need to scan 4 times ? */
+	if (nand_scan(&data->mtd, 1) && nand_scan(&data->mtd, 1) && nand_scan(&data->mtd, 1)  && nand_scan(&data->mtd, 1)) {
+		printk(KERN_INFO "RB1xxx nand device not found\n");
+		res = -ENXIO;
+		goto out;
+	}
+
+	add_mtd_partitions(&data->mtd, partition_info, 2);
+	data->init_ok = 1;
+
+	res = add_mtd_device(&data->mtd);
+	if (!res)
+		return res;
+
+	nand_release(&data->mtd);
+out:
+	platform_set_drvdata(pdev, NULL);
+	iounmap(data->io_base);
+	kfree(data);
+	return res;
+}
+
+static int __devexit rbmips_remove(struct platform_device *pdev)
+{
+	struct adm5120_nand_info *data = platform_get_drvdata(pdev);
+	
+	nand_release(&data->mtd);
+	iounmap(data->io_base);
+	kfree(data);
+	
+	return 0;
+}
+
+static struct platform_driver adm5120_nand_driver = {
+	.probe 		= rbmips_probe,
+	.remove 	= rbmips_remove,
+	.driver 	= {
+		.name	= "adm5120-nand",
+		.owner	= THIS_MODULE,
+	},
+};
+
+static int __init adm5120_nand_init(void)
+{
+	int err;
+	err = platform_driver_register(&adm5120_nand_driver);
+	return err;
+}
+
+static void __exit adm5120_nand_exit(void)
+{
+	platform_driver_unregister(&adm5120_nand_driver);
+}
+
+module_init(adm5120_nand_init);
+module_exit(adm5120_nand_exit);
+
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("David Goodenough, Florian Fainelli");
+MODULE_DESCRIPTION("RouterBOARD 100 NAND driver");
+
--- a/target/linux/adm5120/files/drivers/net/adm5120sw.c
+++ b/target/linux/adm5120/files/drivers/net/adm5120sw.c
@@ -0,0 +1,625 @@
+/*
+ *	ADM5120 built in ethernet switch driver
+ *
+ *	Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005
+ *
+ *	Inspiration for this driver came from the original ADMtek 2.4
+ *	driver, Copyright ADMtek Inc.
+ *
+ *	NAPI extensions by Thomas Langer (Thomas.Langer@infineon.com)
+ *	and Friedrich Beckmann (Friedrich.Beckmann@infineon.com), 2007
+ *
+ *	TODO: Add support of high prio queues (currently disabled)
+ *
+ */
+#include <linux/autoconf.h>
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/netdevice.h>
+#include <linux/etherdevice.h>
+#include <linux/skbuff.h>
+#include <linux/errno.h>
+#include <linux/interrupt.h>
+#include <linux/ioport.h>
+#include <asm/mipsregs.h>
+#include <asm/irq.h>
+#include <asm/io.h>
+#include "adm5120sw.h"
+
+#include <asm/mach-adm5120/adm5120_info.h>
+#include <asm/mach-adm5120/adm5120_irq.h>
+
+MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)");
+MODULE_DESCRIPTION("ADM5120 ethernet switch driver");
+MODULE_LICENSE("GPL");
+
+/* default settings - unlimited TX and RX on all ports, default shaper mode */
+static unsigned char bw_matrix[SW_DEVS] = {
+	0, 0, 0, 0, 0, 0
+};
+
+static int adm5120_nrdevs;
+
+static struct net_device *adm5120_devs[SW_DEVS];
+/* Lookup table port -> device */
+static struct net_device *adm5120_port[SW_DEVS];
+
+static struct adm5120_dma
+    adm5120_dma_txh_v[ADM5120_DMA_TXH] __attribute__((aligned(16))),
+    adm5120_dma_txl_v[ADM5120_DMA_TXL] __attribute__((aligned(16))),
+    adm5120_dma_rxh_v[ADM5120_DMA_RXH] __attribute__((aligned(16))),
+    adm5120_dma_rxl_v[ADM5120_DMA_RXL] __attribute__((aligned(16))),
+    *adm5120_dma_txh,
+    *adm5120_dma_txl,
+    *adm5120_dma_rxh,
+    *adm5120_dma_rxl;
+static struct sk_buff
+    *adm5120_skb_rxh[ADM5120_DMA_RXH],
+    *adm5120_skb_rxl[ADM5120_DMA_RXL],
+    *adm5120_skb_txh[ADM5120_DMA_TXH],
+    *adm5120_skb_txl[ADM5120_DMA_TXL];
+static int adm5120_rxli = 0;
+static int adm5120_txli = 0;
+/*static int adm5120_txhi = 0;*/
+static int adm5120_if_open = 0;
+
+static inline void adm5120_set_reg(unsigned int reg, unsigned long val)
+{
+	*(volatile unsigned long*)(SW_BASE+reg) = val;
+}
+
+static inline unsigned long adm5120_get_reg(unsigned int reg)
+{
+	return *(volatile unsigned long*)(SW_BASE+reg);
+}
+
+static inline void adm5120_rx_dma_update(struct adm5120_dma *dma,
+	struct sk_buff *skb, int end)
+{
+	dma->status = 0;
+	dma->cntl = 0;
+	dma->len = ADM5120_DMA_RXSIZE;
+	dma->data = ADM5120_DMA_ADDR(skb->data) |
+		ADM5120_DMA_OWN | (end ? ADM5120_DMA_RINGEND : 0);
+}
+
+static int adm5120_rx(struct net_device *dev,int *budget)
+{
+	struct sk_buff *skb, *skbn;
+	struct adm5120_sw *priv;
+	struct net_device *cdev;
+	struct adm5120_dma *dma;
+	int port, len, quota;
+
+	quota = min(dev->quota, *budget);
+	dma = &adm5120_dma_rxl[adm5120_rxli];
+	while (!(dma->data & ADM5120_DMA_OWN) && quota) {
+		port = (dma->status & ADM5120_DMA_PORTID);
+		port >>= ADM5120_DMA_PORTSHIFT;
+		cdev = adm5120_port[port];
+		if (cdev != dev) {      /* The current packet belongs to a different device */
+			if ((cdev==NULL) || !netif_running(cdev)) {
+				/* discard (update with old skb) */
+				skb = skbn = NULL;
+				goto rx_skip;
+			}
+			else {
+				netif_rx_schedule(cdev);/* Start polling next device */
+				return 1;       /* return 1 -> More packets to process */
+			}
+
+		}
+		skb = adm5120_skb_rxl[adm5120_rxli];
+		len = (dma->status & ADM5120_DMA_LEN);
+		len >>= ADM5120_DMA_LENSHIFT;
+		len -= ETH_FCS;
+
+		priv = netdev_priv(dev);
+		if (len <= 0 || len > ADM5120_DMA_RXSIZE ||
+			dma->status & ADM5120_DMA_FCSERR) {
+			priv->stats.rx_errors++;
+			skbn = NULL;
+		} else {
+			skbn = dev_alloc_skb(ADM5120_DMA_RXSIZE+16);
+			if (skbn) {
+				skb_put(skb, len);
+				skb->dev = dev;
+				skb->protocol = eth_type_trans(skb, dev);
+				skb->ip_summed = CHECKSUM_UNNECESSARY;
+				dev->last_rx = jiffies;
+				priv->stats.rx_packets++;
+				priv->stats.rx_bytes += len;
+				skb_reserve(skbn, NET_IP_ALIGN);
+				adm5120_skb_rxl[adm5120_rxli] = skbn;
+			} else {
+				printk(KERN_INFO "%s recycling!\n", dev->name);
+			}
+		}
+rx_skip:
+		adm5120_rx_dma_update(&adm5120_dma_rxl[adm5120_rxli],
+			adm5120_skb_rxl[adm5120_rxli],
+			(ADM5120_DMA_RXL-1==adm5120_rxli));
+		if (ADM5120_DMA_RXL == ++adm5120_rxli)
+			adm5120_rxli = 0;
+		dma = &adm5120_dma_rxl[adm5120_rxli];
+		if (skbn){
+			netif_receive_skb(skb);
+			dev->quota--;
+			(*budget)--;
+			quota--;
+		}
+	} /* while */
+	/* If there are still packets to process, return 1 */
+	if (quota){
+		/* No more packets to process, so disable the polling and reenable the interrupts */
+		netif_rx_complete(dev);
+		adm5120_set_reg(ADM5120_INT_MASK,
+			adm5120_get_reg(ADM5120_INT_MASK) &
+			~(ADM5120_INT_RXL|ADM5120_INT_LFULL));
+		return 0;
+
+
+	}
+	return 1;
+}
+
+static irqreturn_t adm5120_sw_irq(int irq, void *dev_id)
+{
+	unsigned long intreg, intmask;
+	int port;
+	struct net_device *dev;
+
+	intmask = adm5120_get_reg(ADM5120_INT_MASK);   /* Remember interrupt mask */
+	adm5120_set_reg(ADM5120_INT_MASK, ADM5120_INTMASKALL); /* Disable interrupts */
+
+	intreg = adm5120_get_reg(ADM5120_INT_ST); /* Read interrupt status */
+	adm5120_set_reg(ADM5120_INT_ST, intreg);  /* Clear interrupt status */
+
+	/* In NAPI operation the interrupts are disabled and the polling mechanism
+	 * is activated. The interrupts are finally enabled again in the polling routine.
+	 */
+	if (intreg & (ADM5120_INT_RXL|ADM5120_INT_LFULL)) {
+		/* check rx buffer for port number */
+		port = adm5120_dma_rxl[adm5120_rxli].status & ADM5120_DMA_PORTID;
+		port >>= ADM5120_DMA_PORTSHIFT;
+		dev = adm5120_port[port];
+		if ((dev==NULL) || !netif_running(dev)) {
+		/* discard (update with old skb) */
+			adm5120_rx_dma_update(&adm5120_dma_rxl[adm5120_rxli],
+				adm5120_skb_rxl[adm5120_rxli],
+				(ADM5120_DMA_RXL-1==adm5120_rxli));
+			if (ADM5120_DMA_RXL == ++adm5120_rxli)
+				adm5120_rxli = 0;
+		}
+		else {
+			netif_rx_schedule(dev);
+			intmask |= (ADM5120_INT_RXL|ADM5120_INT_LFULL); /* Disable RX interrupts */
+		}
+	}
+#ifdef CONFIG_DEBUG
+	if (intreg & ~(intmask))
+		printk(KERN_INFO "adm5120sw: IRQ 0x%08X unexpected!\n", (unsigned int)(intreg & ~(intmask)));
+#endif
+
+	adm5120_set_reg(ADM5120_INT_MASK, intmask);
+
+	return IRQ_HANDLED;
+}
+
+static void adm5120_set_vlan(char *matrix)
+{
+	unsigned long val;
+	int vlan_port, port;
+
+	val = matrix[0] + (matrix[1]<<8) + (matrix[2]<<16) + (matrix[3]<<24);
+	adm5120_set_reg(ADM5120_VLAN_GI, val);
+	val = matrix[4] + (matrix[5]<<8);
+	adm5120_set_reg(ADM5120_VLAN_GII, val);
+	/* Now set/update the port vs. device lookup table */
+	for (port=0; port<SW_DEVS; port++) {
+		for (vlan_port=0; vlan_port<SW_DEVS && !(matrix[vlan_port] & (0x00000001 << port)); vlan_port++);
+		if (vlan_port <SW_DEVS)
+			adm5120_port[port] = adm5120_devs[vlan_port];
+		else
+			adm5120_port[port] = NULL;
+	}
+}
+
+static void adm5120_set_bw(char *matrix)
+{
+	unsigned long val;
+
+	/* Port 0 to 3 are set using the bandwidth control 0 register */
+	val = matrix[0] + (matrix[1]<<8) + (matrix[2]<<16) + (matrix[3]<<24);
+	adm5120_set_reg(ADM5120_BW_CTL0, val);
+
+	/* Port 4 and 5 are set using the bandwidth control 1 register */
+	val = matrix[4];
+	if (matrix[5] == 1)
+		adm5120_set_reg(ADM5120_BW_CTL1, val | 0x80000000);
+	else
+		adm5120_set_reg(ADM5120_BW_CTL1, val & ~0x8000000);
+
+	printk(KERN_DEBUG "D: ctl0 0x%lx, ctl1 0x%lx\n",
+		adm5120_get_reg(ADM5120_BW_CTL0),
+		adm5120_get_reg(ADM5120_BW_CTL1));
+}
+
+static int adm5120_sw_open(struct net_device *dev)
+{
+	unsigned long val;
+	int i;
+
+	netif_start_queue(dev);
+	if (!adm5120_if_open++) {
+		/* enable interrupts on first open */
+		adm5120_set_reg(ADM5120_INT_MASK,
+			adm5120_get_reg(ADM5120_INT_MASK) &
+			~(ADM5120_INT_RXL|ADM5120_INT_LFULL));
+	}
+	/* enable (additional) port */
+	val = adm5120_get_reg(ADM5120_PORT_CONF0);
+	for (i=0; i<SW_DEVS; i++) {
+		if (dev == adm5120_devs[i])
+			val &= ~adm5120_eth_vlans[i];
+	}
+	adm5120_set_reg(ADM5120_PORT_CONF0, val);
+	return 0;
+}
+
+static int adm5120_sw_stop(struct net_device *dev)
+{
+	unsigned long val;
+	int i;
+
+	if (!--adm5120_if_open) {
+		adm5120_set_reg(ADM5120_INT_MASK, ADM5120_INTMASKALL);
+	}
+	/* disable port if not assigned to other devices */
+	val = adm5120_get_reg(ADM5120_PORT_CONF0) | ADM5120_PORTDISALL;
+	for (i=0; i<SW_DEVS; i++) {
+		if ((dev != adm5120_devs[i]) && netif_running(adm5120_devs[i]))
+			val &= ~adm5120_eth_vlans[i];
+	}
+	adm5120_set_reg(ADM5120_PORT_CONF0, val);
+	netif_stop_queue(dev);
+	return 0;
+}
+
+static int adm5120_sw_tx(struct sk_buff *skb, struct net_device *dev)
+{
+	struct adm5120_dma *dma;
+	struct sk_buff **skbl = adm5120_skb_txl;
+	struct adm5120_sw *priv = netdev_priv(dev);
+	unsigned long data;
+
+	dev->trans_start = jiffies;
+	dma = &adm5120_dma_txl[adm5120_txli];
+	if (dma->data & ADM5120_DMA_OWN) {
+		/* We want to write a packet but the TX queue is still
+		 * occupied by the DMA. We are faster than the DMA... */
+		dev_kfree_skb(skb);
+		priv->stats.tx_dropped++;
+		return 0;
+	}
+	data = ADM5120_DMA_ADDR(skb->data) | ADM5120_DMA_OWN;
+	if (adm5120_txli == ADM5120_DMA_TXL-1)
+		data |= ADM5120_DMA_RINGEND;
+	dma->status =
+	    ((skb->len<ETH_ZLEN?ETH_ZLEN:skb->len) << ADM5120_DMA_LENSHIFT) |
+	    (0x1 << priv->port);
+
+	dma->len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
+	priv->stats.tx_packets++;
+	priv->stats.tx_bytes += skb->len;
+
+	/* free old skbs here instead of tx completion interrupt:
+	 * will hold some more memory allocated but reduces interrupts */
+	if (skbl[adm5120_txli]){
+		dev_kfree_skb(skbl[adm5120_txli]);
+	}
+	skbl[adm5120_txli] = skb;
+
+	dma->data = data; /* Here we enable the buffer for the TX DMA machine */
+	adm5120_set_reg(ADM5120_SEND_TRIG, ADM5120_SEND_TRIG_L);
+	if (++adm5120_txli == ADM5120_DMA_TXL)
+		adm5120_txli = 0;
+	return 0;
+}
+
+static void adm5120_tx_timeout(struct net_device *dev)
+{
+	printk(KERN_INFO "%s: TX timeout\n",dev->name);
+}
+
+static struct net_device_stats *adm5120_sw_stats(struct net_device *dev)
+{
+	struct adm5120_sw *priv = netdev_priv(dev);
+	int portmask;
+	unsigned long adm5120_cpup_conf_reg;
+
+	portmask = adm5120_eth_vlans[priv->port] & 0x3f;
+
+	adm5120_cpup_conf_reg = adm5120_get_reg(ADM5120_CPUP_CONF);
+
+	if (dev->flags & IFF_PROMISC)
+		adm5120_cpup_conf_reg &= ~((portmask << ADM5120_DISUNSHIFT) & ADM5120_DISUNALL);
+	else
+		adm5120_cpup_conf_reg |= (portmask << ADM5120_DISUNSHIFT);
+
+	if (dev->flags & IFF_PROMISC || dev->flags & IFF_ALLMULTI || dev->mc_count)
+		adm5120_cpup_conf_reg &= ~((portmask << ADM5120_DISMCSHIFT) & ADM5120_DISMCALL);
+	else
+		adm5120_cpup_conf_reg |= (portmask << ADM5120_DISMCSHIFT);
+
+		/* If there is any port configured to be in promiscuous mode, then the */
+		/* Bridge Test Mode has to be activated. This will result in           */
+		/* transporting also packets learned in another VLAN to be forwarded   */
+		/* to the CPU.                                                         */
+		/* The difficult scenario is when we want to build a bridge on the CPU.*/
+		/* Assume we have port0 and the CPU port in VLAN0 and port1 and the    */
+		/* CPU port in VLAN1. Now we build a bridge on the CPU between         */
+		/* VLAN0 and VLAN1. Both ports of the VLANs are set in promisc mode.   */
+		/* Now assume a packet with ethernet source address 99 enters port 0   */
+		/* It will be forwarded to the CPU because it is unknown. Then the     */
+		/* bridge in the CPU will send it to VLAN1 and it goes out at port 1.  */
+		/* When now a packet with ethernet destination address 99 comes in at  */
+		/* port 1 in VLAN1, then the switch has learned that this address is   */
+		/* located at port 0 in VLAN0. Therefore the switch will drop          */
+		/* this packet. In order to avoid this and to send the packet still    */
+		/* to the CPU, the Bridge Test Mode has to be activated.               */
+
+		/* Check if there is any vlan in promisc mode. */
+	if (~adm5120_cpup_conf_reg & ADM5120_DISUNALL)
+		adm5120_cpup_conf_reg |= ADM5120_BTM;  /* Set the BTM     */
+	else
+		adm5120_cpup_conf_reg &= ~ADM5120_BTM; /* Disable the BTM */
+
+	adm5120_set_reg(ADM5120_CPUP_CONF,adm5120_cpup_conf_reg);
+
+	return &((struct adm5120_sw *)netdev_priv(dev))->stats;
+}
+
+static void adm5120_set_multicast_list(struct net_device *dev)
+{
+	struct adm5120_sw *priv = netdev_priv(dev);
+	int portmask;
+
+	portmask = adm5120_eth_vlans[priv->port] & 0x3f;
+
+	if (dev->flags & IFF_PROMISC)
+		adm5120_set_reg(ADM5120_CPUP_CONF,
+		    adm5120_get_reg(ADM5120_CPUP_CONF) &
+		    ~((portmask << ADM5120_DISUNSHIFT) & ADM5120_DISUNALL));
+	else
+		adm5120_set_reg(ADM5120_CPUP_CONF,
+		    adm5120_get_reg(ADM5120_CPUP_CONF) |
+		    (portmask << ADM5120_DISUNSHIFT));
+
+	if (dev->flags & IFF_PROMISC || dev->flags & IFF_ALLMULTI ||
+	    dev->mc_count)
+		adm5120_set_reg(ADM5120_CPUP_CONF,
+		    adm5120_get_reg(ADM5120_CPUP_CONF) &
+		    ~((portmask << ADM5120_DISMCSHIFT) & ADM5120_DISMCALL));
+	else
+		adm5120_set_reg(ADM5120_CPUP_CONF,
+		    adm5120_get_reg(ADM5120_CPUP_CONF) |
+		    (portmask << ADM5120_DISMCSHIFT));
+}
+
+static void adm5120_write_mac(struct net_device *dev)
+{
+	struct adm5120_sw *priv = netdev_priv(dev);
+	unsigned char *mac = dev->dev_addr;
+
+	adm5120_set_reg(ADM5120_MAC_WT1,
+	    mac[2] | (mac[3]<<8) | (mac[4]<<16) | (mac[5]<<24));
+	adm5120_set_reg(ADM5120_MAC_WT0, (priv->port<<3) |
+	    (mac[0]<<16) | (mac[1]<<24) | ADM5120_MAC_WRITE | ADM5120_VLAN_EN);
+
+	while (!(adm5120_get_reg(ADM5120_MAC_WT0) & ADM5120_MAC_WRITE_DONE));
+}
+
+static int adm5120_sw_set_mac_address(struct net_device *dev, void *p)
+{
+	struct sockaddr *addr = p;
+
+	memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
+	adm5120_write_mac(dev);
+	return 0;
+}
+
+static int adm5120_do_ioctl(struct net_device *dev, struct ifreq *rq, int cmd)
+{
+	int err;
+	struct adm5120_sw_info info;
+	struct adm5120_sw *priv = netdev_priv(dev);
+
+	switch(cmd) {
+		case SIOCGADMINFO:
+			info.magic = 0x5120;
+			info.ports = adm5120_nrdevs;
+			info.vlan = priv->port;
+			err = copy_to_user(rq->ifr_data, &info, sizeof(info));
+			if (err)
+				return -EFAULT;
+			break;
+		case SIOCSMATRIX:
+			if (!capable(CAP_NET_ADMIN))
+				return -EPERM;
+			err = copy_from_user(adm5120_eth_vlans, rq->ifr_data,
+			    sizeof(adm5120_eth_vlans));
+			if (err)
+				return -EFAULT;
+			adm5120_set_vlan(adm5120_eth_vlans);
+			break;
+		case SIOCGMATRIX:
+			err = copy_to_user(rq->ifr_data, adm5120_eth_vlans,
+			    sizeof(adm5120_eth_vlans));
+			if (err)
+				return -EFAULT;
+			break;
+		case SIOCGETBW:
+			err = copy_to_user(rq->ifr_data, bw_matrix, sizeof(bw_matrix));
+			if (err)
+				return -EFAULT;
+			break;
+		case SIOCSETBW:
+			if (!capable(CAP_NET_ADMIN))
+				return -EPERM;
+			err = copy_from_user(bw_matrix, rq->ifr_data, sizeof(bw_matrix));
+			if (err)
+				return -EFAULT;
+			adm5120_set_bw(bw_matrix);
+			break;
+		default:
+			return -EOPNOTSUPP;
+	}
+	return 0;
+}
+
+static void adm5120_dma_tx_init(struct adm5120_dma *dma, struct sk_buff **skbl,
+    int num)
+{
+	memset(dma, 0, sizeof(struct adm5120_dma)*num);
+	dma[num-1].data |= ADM5120_DMA_RINGEND;
+	memset(skbl, 0, sizeof(struct skb*)*num);
+}
+
+static void adm5120_dma_rx_init(struct adm5120_dma *dma, struct sk_buff **skbl,
+    int num)
+{
+	int i;
+
+	memset(dma, 0, sizeof(struct adm5120_dma)*num);
+	for (i=0; i<num; i++) {
+		skbl[i] = dev_alloc_skb(ADM5120_DMA_RXSIZE+16);
+		if (!skbl[i]) {
+			i=num;
+			break;
+		}
+		skb_reserve(skbl[i], NET_IP_ALIGN);
+		adm5120_rx_dma_update(&dma[i], skbl[i], (num-1==i));
+	}
+}
+
+static int __init adm5120_sw_init(void)
+{
+	int i, err;
+	struct net_device *dev;
+
+	err = request_irq(ADM5120_IRQ_SWITCH, adm5120_sw_irq, 0, "ethernet switch", NULL);
+	if (err)
+		goto out;
+
+	adm5120_nrdevs = adm5120_eth_num_ports;
+
+	adm5120_set_reg(ADM5120_CPUP_CONF,
+	    ADM5120_DISCCPUPORT | ADM5120_CRC_PADDING |
+	    ADM5120_DISUNALL | ADM5120_DISMCALL);
+	adm5120_set_reg(ADM5120_PORT_CONF0, ADM5120_ENMC | ADM5120_ENBP | ADM5120_PORTDISALL);
+
+	adm5120_set_reg(ADM5120_PHY_CNTL2, adm5120_get_reg(ADM5120_PHY_CNTL2) |
+	    ADM5120_AUTONEG | ADM5120_NORMAL | ADM5120_AUTOMDIX);
+	adm5120_set_reg(ADM5120_PHY_CNTL3, adm5120_get_reg(ADM5120_PHY_CNTL3) |
+	    ADM5120_PHY_NTH);
+
+	/* Force all the packets from all ports are low priority */
+	adm5120_set_reg(ADM5120_PRI_CNTL, 0);
+
+	adm5120_set_reg(ADM5120_INT_MASK, ADM5120_INTMASKALL);
+	adm5120_set_reg(ADM5120_INT_ST, ADM5120_INTMASKALL);
+
+	adm5120_dma_txh = (void *)KSEG1ADDR((u32)adm5120_dma_txh_v);
+	adm5120_dma_txl = (void *)KSEG1ADDR((u32)adm5120_dma_txl_v);
+	adm5120_dma_rxh = (void *)KSEG1ADDR((u32)adm5120_dma_rxh_v);
+	adm5120_dma_rxl = (void *)KSEG1ADDR((u32)adm5120_dma_rxl_v);
+
+	adm5120_dma_tx_init(adm5120_dma_txh, adm5120_skb_txh, ADM5120_DMA_TXH);
+	adm5120_dma_tx_init(adm5120_dma_txl, adm5120_skb_txl, ADM5120_DMA_TXL);
+	adm5120_dma_rx_init(adm5120_dma_rxh, adm5120_skb_rxh, ADM5120_DMA_RXH);
+	adm5120_dma_rx_init(adm5120_dma_rxl, adm5120_skb_rxl, ADM5120_DMA_RXL);
+	adm5120_set_reg(ADM5120_SEND_HBADDR, KSEG1ADDR(adm5120_dma_txh));
+	adm5120_set_reg(ADM5120_SEND_LBADDR, KSEG1ADDR(adm5120_dma_txl));
+	adm5120_set_reg(ADM5120_RECEIVE_HBADDR, KSEG1ADDR(adm5120_dma_rxh));
+	adm5120_set_reg(ADM5120_RECEIVE_LBADDR, KSEG1ADDR(adm5120_dma_rxl));
+
+	for (i = 0; i < SW_DEVS; i++) {
+		adm5120_devs[i] = alloc_etherdev(sizeof(struct adm5120_sw));
+		if (!adm5120_devs[i]) {
+			err = -ENOMEM;
+			goto out_int;
+		}
+
+		dev = adm5120_devs[i];
+		SET_MODULE_OWNER(dev);
+		memset(netdev_priv(dev), 0, sizeof(struct adm5120_sw));
+		((struct adm5120_sw*)netdev_priv(dev))->port = i;
+		dev->base_addr = SW_BASE;
+		dev->irq = ADM5120_IRQ_SWITCH;
+		dev->open = adm5120_sw_open;
+		dev->hard_start_xmit = adm5120_sw_tx;
+		dev->stop = adm5120_sw_stop;
+		dev->get_stats = adm5120_sw_stats;
+		dev->set_multicast_list = adm5120_set_multicast_list;
+		dev->do_ioctl = adm5120_do_ioctl;
+		dev->tx_timeout = adm5120_tx_timeout;
+		dev->watchdog_timeo = ETH_TX_TIMEOUT;
+		dev->set_mac_address = adm5120_sw_set_mac_address;
+		dev->poll = adm5120_rx;
+		dev->weight = 64;
+
+		memcpy(dev->dev_addr, adm5120_eth_macs[i], 6);
+		adm5120_write_mac(dev);
+
+		if ((err = register_netdev(dev))) {
+			free_netdev(dev);
+			goto out_int;
+		}
+		printk(KERN_INFO "%s: ADM5120 switch port%d\n", dev->name, i);
+	}
+	/* setup vlan/port mapping after devs are filled up */
+	adm5120_set_vlan(adm5120_eth_vlans);
+
+	adm5120_set_reg(ADM5120_CPUP_CONF,
+	    ADM5120_CRC_PADDING | ADM5120_DISUNALL | ADM5120_DISMCALL);
+
+	return 0;
+
+out_int:
+	/* Undo everything that did succeed */
+	for (; i; i--) {
+		unregister_netdev(adm5120_devs[i-1]);
+		free_netdev(adm5120_devs[i-1]);
+	}
+	free_irq(ADM5120_IRQ_SWITCH, NULL);
+out:
+	printk(KERN_ERR "ADM5120 Ethernet switch init failed\n");
+	return err;
+}
+
+static void __exit adm5120_sw_exit(void)
+{
+	int i;
+
+	for (i = 0; i < SW_DEVS; i++) {
+		unregister_netdev(adm5120_devs[i]);
+		free_netdev(adm5120_devs[i]);
+	}
+
+	free_irq(ADM5120_IRQ_SWITCH, NULL);
+
+	for (i = 0; i < ADM5120_DMA_RXH; i++) {
+		if (!adm5120_skb_rxh[i])
+			break;
+		kfree_skb(adm5120_skb_rxh[i]);
+	}
+	for (i = 0; i < ADM5120_DMA_RXL; i++) {
+		if (!adm5120_skb_rxl[i])
+			break;
+		kfree_skb(adm5120_skb_rxl[i]);
+	}
+}
+
+module_init(adm5120_sw_init);
+module_exit(adm5120_sw_exit);
--- a/target/linux/adm5120/files/drivers/net/adm5120sw.h
+++ b/target/linux/adm5120/files/drivers/net/adm5120sw.h
@@ -0,0 +1,114 @@
+/*
+ *	Defines for ADM5120 built in ethernet switch driver
+ *
+ *	Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005
+ *
+ *	Values come from ADM5120 datasheet and original ADMtek 2.4 driver,
+ *	Copyright ADMtek Inc.
+ */
+
+#ifndef _INCLUDE_ADM5120SW_H_
+#define _INCLUDE_ADM5120SW_H_
+
+#define SW_BASE	KSEG1ADDR(0x12000000)
+#define SW_DEVS	6
+
+#define ETH_TX_TIMEOUT		HZ*400
+#define ETH_FCS 4;
+
+#define ADM5120_CODE		0x00		/* CPU description */
+#define ADM5120_CODE_PQFP	0x20000000	/* package type */
+#define ADM5120_SW_CONF		0x20            /* Switch configuration register */
+#define ADM5120_SW_CONF_BPM	0x00300000      /* Mask for backpressure mode */
+#define ADM5120_CPUP_CONF	0x24		/* CPU port config */
+#define ADM5120_DISCCPUPORT	0x00000001	/* disable cpu port */
+#define ADM5120_CRC_PADDING	0x00000002	/* software crc */
+#define ADM5120_BTM		0x00000004      /* bridge test mode */
+#define ADM5120_DISUNSHIFT	9
+#define ADM5120_DISUNALL	0x00007e00	/* disable unknown from all */
+#define ADM5120_DISMCSHIFT	16
+#define ADM5120_DISMCALL	0x003f0000	/* disable multicast from all */
+#define ADM5120_PORT_CONF0	0x28
+#define ADM5120_ENMC		0x00003f00	/* Enable MC routing (ex cpu) */
+#define ADM5120_ENBP		0x003f0000	/* Enable Back Pressure */
+#define ADM5120_PORTDISALL     	0x0000003F
+#define ADM5120_VLAN_GI		0x40		/* VLAN settings */
+#define ADM5120_VLAN_GII	0x44
+#define ADM5120_SEND_TRIG	0x48
+#define ADM5120_SEND_TRIG_L	0x00000001
+#define ADM5120_SEND_TRIG_H	0x00000002
+#define ADM5120_MAC_WT0		0x58
+#define ADM5120_MAC_WRITE	0x00000001
+#define ADM5120_MAC_WRITE_DONE	0x00000002
+#define ADM5120_VLAN_EN		0x00000040
+#define ADM5120_MAC_WT1		0x5c
+#define ADM5120_BW_CTL0		0x60		/* Bandwidth control 0 */
+#define ADM5120_BW_CTL1		0x64		/* Bandwidth control 1 */
+#define ADM5120_PHY_CNTL2	0x7c
+#define ADM5120_AUTONEG		0x0000001f	/* Auto negotiate */
+#define ADM5120_NORMAL		0x01f00000	/* PHY normal mode */
+#define ADM5120_AUTOMDIX	0x3e000000	/* Auto MDIX */
+#define ADM5120_PHY_CNTL3	0x80
+#define ADM5120_PHY_NTH		0x00000400
+#define ADM5120_PRI_CNTL	0x84
+#define ADM5120_INT_ST		0xb0
+#define ADM5120_INT_RXH		0x0000004
+#define ADM5120_INT_RXL		0x0000008
+#define ADM5120_INT_HFULL	0x0000010
+#define ADM5120_INT_LFULL	0x0000020
+#define ADM5120_INT_TXH		0x0000001
+#define ADM5120_INT_TXL		0x0000002
+#define ADM5120_INT_MASK	0xb4
+#define ADM5120_INTMASKALL	0x1FDEFFF	/* All interrupts */
+#define ADM5120_INTHANDLE	(ADM5120_INT_RXH | ADM5120_INT_RXL | \
+				 ADM5120_INT_HFULL | ADM5120_INT_LFULL | \
+				 ADM5120_INT_TXH | ADM5120_INT_TXL)
+#define ADM5120_SEND_HBADDR	0xd0
+#define ADM5120_SEND_LBADDR	0xd4
+#define ADM5120_RECEIVE_HBADDR	0xd8
+#define ADM5120_RECEIVE_LBADDR	0xdc
+
+struct adm5120_dma {
+	u32 data;
+	u32 cntl;
+	u32 len;
+	u32 status;
+} __attribute__ ((packed));
+
+#define	ADM5120_DMA_MASK	0x01ffffff
+#define ADM5120_DMA_OWN		0x80000000	/* buffer owner */
+#define ADM5120_DMA_RINGEND	0x10000000	/* Last in DMA ring */
+
+#define ADM5120_DMA_ADDR(ptr)	((u32)(ptr) & ADM5120_DMA_MASK)
+#define ADM5120_DMA_PORTID	0x00007000
+#define ADM5120_DMA_PORTSHIFT	12
+#define ADM5120_DMA_LEN		0x07ff0000
+#define ADM5120_DMA_LENSHIFT	16
+#define ADM5120_DMA_FCSERR	0x00000008
+
+#define ADM5120_DMA_TXH		2
+#define ADM5120_DMA_TXL		64
+#define ADM5120_DMA_RXH		2
+#define ADM5120_DMA_RXL		64
+
+#define ADM5120_DMA_RXSIZE	1550
+#define ADM5120_DMA_EXTRA	20
+
+struct adm5120_sw {
+	int			port;
+	struct net_device_stats	stats;
+};
+
+#define SIOCSMATRIX	SIOCDEVPRIVATE
+#define SIOCGMATRIX	SIOCDEVPRIVATE+1
+#define SIOCGADMINFO	SIOCDEVPRIVATE+2
+#define SIOCGETBW	SIOCDEVPRIVATE+3
+#define SIOCSETBW	SIOCDEVPRIVATE+4
+
+struct adm5120_sw_info {
+	u16	magic;
+	u16	ports;
+	u16	vlan;
+};
+
+#endif /* _INCLUDE_ADM5120SW_H_ */
--- a/target/linux/adm5120/files/drivers/serial/adm5120_uart.c
+++ b/target/linux/adm5120/files/drivers/serial/adm5120_uart.c
@@ -0,0 +1,520 @@
+/*
+ *	Serial driver for ADM5120 SoC
+ *
+ *	Derived from drivers/serial/uart00.c
+ *	Copyright 2001 Altera Corporation
+ *
+ *	Some pieces are derived from the ADMtek 2.4 serial driver.
+ *	Copyright (C) ADMtek Incorporated, 2003
+ *		daniell@admtek.com.tw
+ *	Which again was derived from drivers/char/serial.c
+ *	Copyright (C) Linus Torvalds et al.
+ *
+ *	Copyright Jeroen Vreeken (pe1rxq@amsat.org), 2005
+ */
+
+#include <linux/autoconf.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/ioport.h>
+#include <linux/serial.h>
+#include <linux/serial_core.h>
+#include <linux/tty.h>
+#include <linux/tty_flip.h>
+#include <linux/console.h>
+
+#include <asm/mach-adm5120/adm5120_defs.h>
+#include <asm/mach-adm5120/adm5120_irq.h>
+
+#define ADM5120_UART_REG(base, reg) \
+	(*(volatile u32 *)KSEG1ADDR((base)+(reg)))
+
+#define ADM5120_UARTCLK_FREQ            62500000
+#define ADM5120_UART_BAUDDIV(rate)	((unsigned long)(ADM5120_UARTCLK_FREQ/(16*(rate)) - 1))
+
+#define ADM5120_UART_BAUD115200		ADM5120_UART_BAUDDIV(115200)
+
+#define ADM5120_UART_DATA		0x00
+#define ADM5120_UART_RS			0x04
+#define ADM5120_UART_LCR_H		0x08
+#define ADM5120_UART_LCR_M		0x0c
+#define ADM5120_UART_LCR_L		0x10
+#define ADM5120_UART_CR			0x14
+#define ADM5120_UART_FR			0x18
+#define ADM5120_UART_IR			0x1c
+
+#define ADM5120_UART_FE			0x01
+#define ADM5120_UART_PE			0x02
+#define ADM5120_UART_BE			0x04
+#define ADM5120_UART_OE			0x08
+#define ADM5120_UART_ERR		0x0f
+#define ADM5120_UART_FIFO_EN		0x10
+#define ADM5120_UART_EN			0x01
+#define ADM5120_UART_TIE		0x20
+#define ADM5120_UART_RIE		0x50
+#define ADM5120_UART_IE			0x78
+#define ADM5120_UART_CTS		0x01
+#define ADM5120_UART_DSR		0x02
+#define ADM5120_UART_DCD		0x04
+#define ADM5120_UART_TXFF		0x20
+#define ADM5120_UART_TXFE		0x80
+#define ADM5120_UART_RXFE		0x10
+#define ADM5120_UART_BRK		0x01
+#define ADM5120_UART_PEN		0x02
+#define ADM5120_UART_EPS		0x04
+#define ADM5120_UART_STP2		0x08
+#define ADM5120_UART_W5			0x00
+#define ADM5120_UART_W6			0x20
+#define ADM5120_UART_W7			0x40
+#define ADM5120_UART_W8			0x60
+#define ADM5120_UART_MIS		0x01
+#define ADM5120_UART_RIS		0x02
+#define ADM5120_UART_TIS		0x04
+#define ADM5120_UART_RTIS		0x08
+
+static void adm5120ser_stop_tx(struct uart_port *port)
+{
+	ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) &= ~ADM5120_UART_TIE;
+}
+
+static void adm5120ser_irq_rx(struct uart_port *port)
+{
+	struct tty_struct *tty = port->info->tty;
+	unsigned int status, ch, rds, flg, ignored = 0;
+
+	status = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
+	while (!(status & ADM5120_UART_RXFE)) {
+		/* 
+		 * We need to read rds before reading the 
+		 * character from the fifo
+		 */
+		rds = ADM5120_UART_REG(port->iobase, ADM5120_UART_RS);
+		ch = ADM5120_UART_REG(port->iobase, ADM5120_UART_DATA);
+		port->icount.rx++;
+
+		if (tty->low_latency)
+			tty_flip_buffer_push(tty);
+
+		flg = TTY_NORMAL;
+
+		/*
+		 * Note that the error handling code is
+		 * out of the main execution path
+		 */
+		if (rds & ADM5120_UART_ERR)
+			goto handle_error;
+		if (uart_handle_sysrq_char(port, ch))
+			goto ignore_char;
+
+	error_return:
+		tty_insert_flip_char(tty, ch, flg);
+
+	ignore_char:
+		status = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
+	}
+ out:
+	tty_flip_buffer_push(tty);
+	return;
+
+ handle_error:
+ 	ADM5120_UART_REG(port->iobase, ADM5120_UART_RS) = 0xff;
+	if (rds & ADM5120_UART_BE) {
+		port->icount.brk++;
+		if (uart_handle_break(port))
+			goto ignore_char;
+	} else if (rds & ADM5120_UART_PE)
+		port->icount.parity++;
+	else if (rds & ADM5120_UART_FE)
+		port->icount.frame++;
+	if (rds & ADM5120_UART_OE)
+		port->icount.overrun++;
+
+	if (rds & port->ignore_status_mask) {
+		if (++ignored > 100)
+			goto out;
+		goto ignore_char;
+	}
+	rds &= port->read_status_mask;
+
+	if (rds & ADM5120_UART_BE)
+		flg = TTY_BREAK;
+	else if (rds & ADM5120_UART_PE)
+		flg = TTY_PARITY;
+	else if (rds & ADM5120_UART_FE)
+		flg = TTY_FRAME;
+
+	if (rds & ADM5120_UART_OE) {
+		/*
+		 * CHECK: does overrun affect the current character?
+		 * ASSUMPTION: it does not.
+		 */
+		tty_insert_flip_char(tty, ch, flg);
+		ch = 0;
+		flg = TTY_OVERRUN;
+	}
+#ifdef CONFIG_MAGIC_SYSRQ
+	port->sysrq = 0;
+#endif
+	goto error_return;
+}
+
+static void adm5120ser_irq_tx(struct uart_port *port)
+{
+	struct circ_buf *xmit = &port->info->xmit;
+	int count;
+
+	if (port->x_char) {
+		ADM5120_UART_REG(port->iobase, ADM5120_UART_DATA) =
+		    port->x_char;
+		port->icount.tx++;
+		port->x_char = 0;
+		return;
+	}
+	if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
+		adm5120ser_stop_tx(port);
+		return;
+	}
+
+	count = port->fifosize >> 1;
+	do {
+		ADM5120_UART_REG(port->iobase, ADM5120_UART_DATA) =
+		    xmit->buf[xmit->tail];
+		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
+		port->icount.tx++;
+		if (uart_circ_empty(xmit))
+			break;
+	} while (--count > 0);
+
+	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
+		uart_write_wakeup(port);
+
+	if (uart_circ_empty(xmit))
+		adm5120ser_stop_tx(port);
+}
+
+static void adm5120ser_irq_modem(struct uart_port *port)
+{
+	unsigned int status;
+
+	status = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
+
+	if (status & ADM5120_UART_DCD)
+		uart_handle_dcd_change(port, status & ADM5120_UART_DCD);
+
+	if (status & ADM5120_UART_DSR)
+		port->icount.dsr++;
+
+	if (status & ADM5120_UART_CTS)
+		uart_handle_cts_change(port, status & ADM5120_UART_CTS);
+
+	wake_up_interruptible(&port->info->delta_msr_wait);
+}
+
+static irqreturn_t adm5120ser_irq(int irq, void *dev_id)
+{
+	struct uart_port *port = dev_id;
+	unsigned long ir = ADM5120_UART_REG(port->iobase, ADM5120_UART_IR);
+
+	if (ir & (ADM5120_UART_RIS | ADM5120_UART_RTIS))
+		adm5120ser_irq_rx(port);
+	if (ir & ADM5120_UART_TIS)
+		adm5120ser_irq_tx(port);
+	if (ir & ADM5120_UART_MIS) {
+		adm5120ser_irq_modem(port);
+		ADM5120_UART_REG(port->iobase, ADM5120_UART_IR) = 0xff;
+	}
+
+	return IRQ_HANDLED;
+}
+
+static unsigned int adm5120ser_tx_empty(struct uart_port *port)
+{
+	unsigned int fr = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
+	return (fr & ADM5120_UART_TXFE) ? TIOCSER_TEMT : 0;
+}
+
+static void adm5120ser_set_mctrl(struct uart_port *port, unsigned int mctrl)
+{
+}
+
+static unsigned int adm5120ser_get_mctrl(struct uart_port *port)
+{
+	unsigned int result = 0;
+	unsigned int fr = ADM5120_UART_REG(port->iobase, ADM5120_UART_FR);
+
+	if (fr & ADM5120_UART_CTS)
+		result |= TIOCM_CTS;
+	if (fr & ADM5120_UART_DSR)
+		result |= TIOCM_DSR;
+	if (fr & ADM5120_UART_DCD)
+		result |= TIOCM_CAR;
+	return result;
+}
+
+static void adm5120ser_start_tx(struct uart_port *port)
+{
+	ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) |= ADM5120_UART_TIE;
+}
+
+static void adm5120ser_stop_rx(struct uart_port *port)
+{
+	ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) &= ~ADM5120_UART_RIE;
+}
+
+static void adm5120ser_enable_ms(struct uart_port *port)
+{
+}
+
+static void adm5120ser_break_ctl(struct uart_port *port, int break_state)
+{
+	unsigned long flags;
+	unsigned long lcrh;
+
+	spin_lock_irqsave(&port->lock, flags);
+	lcrh = ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H);
+	if (break_state == -1)
+		lcrh |= ADM5120_UART_BRK;
+	else
+		lcrh &= ~ADM5120_UART_BRK;
+	ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H) = lcrh;
+	spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static int adm5120ser_startup(struct uart_port *port)
+{
+	int ret;
+
+	ret = request_irq(port->irq, adm5120ser_irq, 0, "ADM5120 UART", port);
+	if (ret) {
+		printk(KERN_ERR "Couldn't get irq %d\n", port->irq);
+		return ret;
+	}
+	ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H) |=
+	    ADM5120_UART_FIFO_EN;
+	ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) |=
+	    ADM5120_UART_EN | ADM5120_UART_IE;
+	return 0;
+}
+
+static void adm5120ser_shutdown(struct uart_port *port)
+{
+	ADM5120_UART_REG(port->iobase, ADM5120_UART_CR) &= ~ADM5120_UART_IE;
+	free_irq(port->irq, port);
+}
+
+static void adm5120ser_set_termios(struct uart_port *port,
+    struct ktermios *termios, struct ktermios *old)
+{
+	unsigned int baud, quot, lcrh;
+	unsigned long flags;
+
+	termios->c_cflag |= CREAD;
+
+	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
+	quot = uart_get_divisor(port, baud);
+
+	lcrh = ADM5120_UART_FIFO_EN;
+	switch (termios->c_cflag & CSIZE) {
+		case CS5:
+			lcrh |= ADM5120_UART_W5;
+			break;
+		case CS6:
+			lcrh |= ADM5120_UART_W6;
+			break;
+		case CS7:
+			lcrh |= ADM5120_UART_W7;
+			break;
+		default:
+			lcrh |= ADM5120_UART_W8;
+			break;
+	}
+	if (termios->c_cflag & CSTOPB)
+		lcrh |= ADM5120_UART_STP2;
+	if (termios->c_cflag & PARENB) {
+		lcrh |= ADM5120_UART_PEN;
+		if (!(termios->c_cflag & PARODD))
+			lcrh |= ADM5120_UART_EPS;
+	}
+
+	spin_lock_irqsave(port->lock, flags);
+
+	ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_H) = lcrh;
+
+	/*
+	 * Update the per-port timeout.
+	 */
+	uart_update_timeout(port, termios->c_cflag, baud);
+
+	port->read_status_mask = ADM5120_UART_OE;
+	if (termios->c_iflag & INPCK)
+		port->read_status_mask |= ADM5120_UART_FE | ADM5120_UART_PE;
+	if (termios->c_iflag & (BRKINT | PARMRK))
+		port->read_status_mask |= ADM5120_UART_BE;
+
+	/*
+	 * Characters to ignore
+	 */
+	port->ignore_status_mask = 0;
+	if (termios->c_iflag & IGNPAR)
+		port->ignore_status_mask |= ADM5120_UART_FE | ADM5120_UART_PE;
+	if (termios->c_iflag & IGNBRK) {
+		port->ignore_status_mask |= ADM5120_UART_BE;
+		/*
+		 * If we're ignoring parity and break indicators,
+		 * ignore overruns to (for real raw support).
+		 */
+		if (termios->c_iflag & IGNPAR)
+			port->ignore_status_mask |= ADM5120_UART_OE;
+	}
+
+	quot = ADM5120_UART_BAUD115200;
+	ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_L) = quot & 0xff;
+	ADM5120_UART_REG(port->iobase, ADM5120_UART_LCR_M) = quot >> 8;
+
+	spin_unlock_irqrestore(&port->lock, flags);
+}
+
+static const char *adm5120ser_type(struct uart_port *port)
+{
+	return port->type == PORT_ADM5120 ? "ADM5120" : NULL;
+}
+
+static void adm5120ser_config_port(struct uart_port *port, int flags)
+{
+	if (flags & UART_CONFIG_TYPE)
+		port->type = PORT_ADM5120;
+}
+
+static void adm5120ser_release_port(struct uart_port *port)
+{
+	release_mem_region(port->iobase, ADM5120_UART_SIZE);
+}
+
+static int adm5120ser_request_port(struct uart_port *port)
+{
+	return request_mem_region(port->iobase, ADM5120_UART_SIZE,
+	    "adm5120-uart") != NULL ? 0 : -EBUSY; 
+}
+
+static struct uart_ops adm5120ser_ops = {
+	.tx_empty =	adm5120ser_tx_empty,
+	.set_mctrl =	adm5120ser_set_mctrl,
+	.get_mctrl =	adm5120ser_get_mctrl,
+	.stop_tx =	adm5120ser_stop_tx,
+	.start_tx =	adm5120ser_start_tx,
+	.stop_rx =	adm5120ser_stop_rx,
+	.enable_ms =	adm5120ser_enable_ms,
+	.break_ctl =	adm5120ser_break_ctl,
+	.startup =	adm5120ser_startup,
+	.shutdown =	adm5120ser_shutdown,
+	.set_termios =	adm5120ser_set_termios,
+	.type =		adm5120ser_type,
+	.config_port =	adm5120ser_config_port,
+	.release_port =	adm5120ser_release_port,
+	.request_port =	adm5120ser_request_port,
+};
+
+static void adm5120console_put(const char c)
+{
+	while ((ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_FR) &
+	     ADM5120_UART_TXFF) != 0);
+	ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_DATA) = c;
+}
+
+static void adm5120console_write(struct console *con, const char *s,
+    unsigned int count)
+{
+	while (count--) {
+		if (*s == '\n')
+			adm5120console_put('\r');
+		adm5120console_put(*s);
+		s++;
+	}
+}
+
+static int adm5120console_setup(struct console *con, char *options)
+{
+	/* Set to 115200 baud, 8N1 and enable FIFO */
+	ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_LCR_L) =
+	    ADM5120_UART_BAUD115200 & 0xff;
+	ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_LCR_M) =
+	    ADM5120_UART_BAUD115200 >> 8;
+	ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_LCR_H) =
+	    ADM5120_UART_W8 | ADM5120_UART_FIFO_EN;
+	/* Enable port */
+	ADM5120_UART_REG(ADM5120_UART0_BASE, ADM5120_UART_CR) =
+	    ADM5120_UART_EN;
+
+	return 0;
+}
+
+static struct uart_driver adm5120ser_reg;
+
+static struct console adm5120_serconsole = {
+	.name =		"ttyS",
+	.write =	adm5120console_write,
+	.device =	uart_console_device,
+	.setup =	adm5120console_setup,
+	.flags =	CON_PRINTBUFFER,
+	.cflag =	B115200 | CS8 | CREAD,
+	.index =	0,
+	.data =		&adm5120ser_reg,
+};
+
+static int __init adm5120console_init(void)
+{
+	register_console(&adm5120_serconsole);
+	return 0;
+}
+
+console_initcall(adm5120console_init);
+
+
+static struct uart_port adm5120ser_ports[] = {
+	{
+		.iobase =	ADM5120_UART0_BASE,
+		.irq =		ADM5120_IRQ_UART0,
+		.uartclk =	ADM5120_UARTCLK_FREQ,
+		.fifosize =	16,
+		.ops =		&adm5120ser_ops,
+		.line =		0,
+		.flags =	ASYNC_BOOT_AUTOCONF,
+	},
+#if (CONFIG_ADM5120_NR_UARTS > 1)
+	{
+		.iobase =	ADM5120_UART1_BASE,
+		.irq =		ADM5120_IRQ_UART1,
+		.uartclk =	ADM5120_UARTCLK_FREQ,
+		.fifosize =	16,
+		.ops =		&adm5120ser_ops,
+		.line =		1,
+		.flags =	ASYNC_BOOT_AUTOCONF,
+	},
+#endif
+};
+
+static struct uart_driver adm5120ser_reg = {
+	.owner	=	THIS_MODULE,
+	.driver_name =	"ttyS",
+	.dev_name =	"ttyS",
+	.major =	TTY_MAJOR,
+	.minor =	64,
+	.nr =		CONFIG_ADM5120_NR_UARTS,
+	.cons =		&adm5120_serconsole,
+};
+
+static int __init adm5120ser_init(void)
+{
+	int ret, i;
+
+	ret = uart_register_driver(&adm5120ser_reg);
+	if (!ret) {
+		for (i = 0; i < CONFIG_ADM5120_NR_UARTS; i++)
+			uart_add_one_port(&adm5120ser_reg, &adm5120ser_ports[i]);
+	}
+
+	return ret;
+}
+
+__initcall(adm5120ser_init);
--- a/target/linux/adm5120/files/drivers/usb/host/adm5120-hcd.c
+++ b/target/linux/adm5120/files/drivers/usb/host/adm5120-hcd.c
@@ -0,0 +1,996 @@
+/*
+ *	HCD driver for ADM5120 SoC
+ *
+ *	Copyright (C) 2005 Jeroen Vreeken (pe1rxq@amsat.org)
+ *
+ *	Based on the ADMtek 2.4 driver
+ *	(C) Copyright 2003 Junius Chen <juniusc@admtek.com.tw>
+ *	Which again was based on the ohci and uhci drivers.
+ */
+
+#include <linux/module.h>
+#include <linux/delay.h>
+#include <linux/debugfs.h>
+#include <linux/seq_file.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/list.h>
+#include <linux/usb.h>
+#include <linux/platform_device.h>
+
+#include <asm/bootinfo.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/system.h>
+#include <asm/byteorder.h>
+#include <asm/mach-adm5120/adm5120_info.h>
+
+#include "../core/hcd.h"
+
+MODULE_DESCRIPTION("ADM5120 USB Host Controller Driver");
+MODULE_LICENSE("GPL");
+MODULE_AUTHOR("Jeroen Vreeken (pe1rxq@amsat.org)");
+
+#define PFX	"adm5120-hcd: "
+
+#define ADMHCD_REG_CONTROL		0x00
+#define  ADMHCD_SW_RESET		0x00000008	/* Reset */
+#define  ADMHCD_DMAA			0x00000004	/* DMA arbitration control */
+#define  ADMHCD_SW_INTREQ		0x00000002	/* request software int */
+#define  ADMHCD_HOST_EN			0x00000001	/* Host enable */
+#define ADMHCD_REG_INTSTATUS		0x04
+#define  ADMHCD_INT_ACT			0x80000000	/* Interrupt active */
+#define  ADMHCD_INT_FATAL		0x40000000	/* Fatal interrupt */
+#define  ADMHCD_INT_SW			0x20000000	/* software interrupt */
+#define  ADMHCD_INT_TD			0x00100000	/* TD completed */
+#define  ADMHCD_FNO			0x00000800	/* Frame number overaflow */
+#define  ADMHCD_SO			0x00000400	/* Scheduling overrun */
+#define  ADMHCD_INSMI			0x00000200	/* Root hub status change */
+#define  ADMHCD_BABI			0x00000100	/* Babble detected, host mode */
+#define  ADMHCD_RESI			0x00000020	/* Resume detected */
+#define  ADMHCD_SOFI			0x00000010	/* SOF transmitted/received, host mode */
+#define ADMHCD_REG_INTENABLE		0x08
+#define  ADMHCD_INT_EN			0x80000000	/* Interrupt enable */
+#define  ADMHCD_INTMASK			0x00000001	/* Interrupt mask */
+#define ADMHCD_REG_HOSTCONTROL		0x10
+#define  ADMHCD_DMA_EN			0x00000004	/* USB host DMA enable */
+#define  ADMHCD_STATE_MASK		0x00000003
+#define  ADMHCD_STATE_RST		0x00000000	/* bus state reset */
+#define  ADMHCD_STATE_RES		0x00000001	/* bus state resume */
+#define  ADMHCD_STATE_OP		0x00000002	/* bus state operational */
+#define  ADMHCD_STATE_SUS		0x00000003	/* bus state suspended */
+#define ADMHCD_REG_FMINTERVAL		0x18
+#define ADMHCD_REG_FMNUMBER		0x1c
+#define ADMHCD_REG_LSTHRESH		0x70
+#define ADMHCD_REG_RHDESCR		0x74
+#define  ADMHCD_CRWE			0x20000000	/* Clear wakeup enable */
+#define  ADMHCD_DRWE			0x10000000	/* Device remote wakeup enable */
+#define  ADMHCD_HW_OCIC			0x08000000	/* Over current indication change */
+#define  ADMHCD_LPSC			0x04000000	/* Local power switch change */
+#define  ADMHCD_OCI			0x02000000	/* Over current indication */
+#define  ADMHCD_LPS			0x01000000	/* Local power switch/global power switch */
+#define  ADMHCD_NOCP			0x00000800	/* No over current protect mode */
+#define  ADMHCD_OPCM			0x00000400	/* Over current protect mode */
+#define  ADMHCD_NPS			0x00000200	/* No Power Switch */
+#define  ADMHCD_PSM			0x00000100	/* Power switch mode */
+#define ADMHCD_REG_PORTSTATUS0		0x78
+#define  ADMHCD_CCS			0x00000001	/* current connect status */
+#define  ADMHCD_PES			0x00000002	/* port enable status */
+#define  ADMHCD_PSS			0x00000004	/* port suspend status */
+#define  ADMHCD_POCI			0x00000008	/* port overcurrent indicator */
+#define  ADMHCD_PRS			0x00000010	/* port reset status */
+#define  ADMHCD_PPS			0x00000100	/* port power status */
+#define  ADMHCD_LSDA			0x00000200	/* low speed device attached */
+#define  ADMHCD_CSC			0x00010000	/* connect status change */
+#define  ADMHCD_PESC			0x00020000	/* enable status change */
+#define  ADMHCD_PSSC			0x00040000	/* suspend status change */
+#define  ADMHCD_OCIC			0x00080000	/* overcurrent change*/
+#define  ADMHCD_PRSC			0x00100000	/* reset status change */
+#define ADMHCD_REG_PORTSTATUS1		0x7c
+#define ADMHCD_REG_HOSTHEAD		0x80
+
+#define ADMHCD_NUMPORTS			1
+#define ADMHCD_DESC_ALIGN	16
+
+struct admhcd_ed {
+	/* Don't change first four, they used for DMA */
+	u32				control;
+	struct admhcd_td		*tail;
+	struct admhcd_td		*head;
+	struct admhcd_ed		*next;
+	/* the rest is for the driver only: */
+	struct admhcd_td		*cur;
+	struct usb_host_endpoint 	*ep;
+	struct urb			*urb;
+	struct admhcd_ed		*real;
+} __attribute__ ((packed));
+
+#define ADMHCD_ED_EPSHIFT	7		/* Shift for endpoint number */
+#define ADMHCD_ED_INT		0x00000800	/* Is this an int endpoint */
+#define ADMHCD_ED_SPEED		0x00002000	/* Is it a high speed dev? */
+#define ADMHCD_ED_SKIP		0x00004000	/* Skip this ED */
+#define ADMHCD_ED_FORMAT	0x00008000	/* Is this an isoc endpoint */
+#define ADMHCD_ED_MAXSHIFT	16		/* Shift for max packet size */
+
+struct admhcd_td {
+	/* Don't change first four, they are used for DMA */
+	u32			control;
+	u32			buffer;
+	u32			buflen;
+	struct admhcd_td	*next;
+	/* the rest is for the driver only: */
+	struct urb		*urb;
+	struct admhcd_td	*real;
+} __attribute__ ((packed));
+
+#define ADMHCD_TD_OWN		0x80000000
+#define ADMHCD_TD_TOGGLE	0x00000000
+#define ADMHCD_TD_DATA0		0x01000000
+#define ADMHCD_TD_DATA1		0x01800000
+#define ADMHCD_TD_OUT		0x00200000
+#define ADMHCD_TD_IN		0x00400000
+#define ADMHCD_TD_SETUP		0x00000000
+#define ADMHCD_TD_ISO		0x00010000
+#define ADMHCD_TD_R		0x00040000
+#define ADMHCD_TD_INTEN		0x00010000
+
+static int admhcd_td_err[16] = {
+	0,		/* No */
+	-EREMOTEIO,	/* CRC */
+	-EREMOTEIO,	/* bit stuff */
+	-EREMOTEIO,	/* data toggle */
+	-EPIPE,		/* stall */
+	-ETIMEDOUT,	/* timeout */
+	-EPROTO,	/* pid err */
+	-EPROTO,	/* unexpected pid */
+	-EREMOTEIO,	/* data overrun */
+	-EREMOTEIO,	/* data underrun */
+	-ETIMEDOUT,	/* 1010 */
+	-ETIMEDOUT,	/* 1011 */
+	-EREMOTEIO,	/* buffer overrun */
+	-EREMOTEIO,	/* buffer underrun */
+	-ETIMEDOUT,	/* 1110 */
+	-ETIMEDOUT,	/* 1111 */
+};
+
+#define ADMHCD_TD_ERRMASK	0x38000000
+#define ADMHCD_TD_ERRSHIFT	27
+
+#define TD(td)	((struct admhcd_td *)(((u32)(td)) & ~(ADMHCD_DESC_ALIGN-1)))
+#define ED(ed)	((struct admhcd_ed *)(((u32)(ed)) & ~(ADMHCD_DESC_ALIGN-1)))
+
+struct admhcd {
+	spinlock_t	lock;
+
+	/* Root hub registers */
+	u32 rhdesca;
+	u32 rhdescb;
+	u32 rhstatus;
+	u32 rhport[2];
+
+	/* async schedule: control, bulk */
+	struct list_head async;
+	u32		base;
+	u32		dma_en;
+	unsigned long	flags;
+};
+
+static inline struct admhcd *hcd_to_admhcd(struct usb_hcd *hcd)
+{
+	return (struct admhcd *)(hcd->hcd_priv);
+}
+
+static inline struct usb_hcd *admhcd_to_hcd(struct admhcd *admhcd)
+{
+	return container_of((void *)admhcd, struct usb_hcd, hcd_priv);
+}
+
+static char hcd_name[] = "adm5120-hcd";
+
+static u32 admhcd_reg_get(struct admhcd *ahcd, int reg)
+{
+	return *(volatile u32 *)KSEG1ADDR(ahcd->base+reg);
+}
+
+static void admhcd_reg_set(struct admhcd *ahcd, int reg, u32 val)
+{
+	*(volatile u32 *)KSEG1ADDR(ahcd->base+reg) = val;
+}
+
+static void admhcd_lock(struct admhcd *ahcd)
+{
+	spin_lock_irqsave(&ahcd->lock, ahcd->flags);
+	ahcd->dma_en = admhcd_reg_get(ahcd, ADMHCD_REG_HOSTCONTROL) &
+		ADMHCD_DMA_EN;
+	admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
+}
+
+static void admhcd_unlock(struct admhcd *ahcd)
+{
+	admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL,
+		ADMHCD_STATE_OP | ahcd->dma_en);
+	spin_unlock_irqrestore(&ahcd->lock, ahcd->flags);
+}
+
+static struct admhcd_td *admhcd_td_alloc(struct admhcd_ed *ed, struct urb *urb)
+{
+	struct admhcd_td *tdn, *td;
+
+	tdn = kzalloc(sizeof(*tdn)+ADMHCD_DESC_ALIGN, GFP_ATOMIC);
+	if (!tdn)
+		return NULL;
+
+	tdn->real = tdn;
+	tdn = TD(KSEG1ADDR(tdn));
+	if (ed->cur == NULL) {
+		ed->cur = tdn;
+		ed->head = tdn;
+		ed->tail = tdn;
+		td = tdn;
+	} else {
+		/* Supply back the old tail and link in new td as tail */
+		td = TD(ed->tail);
+		TD(ed->tail)->next = tdn;
+		ed->tail = tdn;
+	}
+	td->urb = urb;
+
+	return td;
+}
+
+static void admhcd_td_free(struct admhcd_ed *ed, struct urb *urb)
+{
+	struct admhcd_td *td, **tdp;
+
+	if (urb == NULL)
+		ed->control |= ADMHCD_ED_SKIP;
+	tdp = &ed->cur;
+	td = ed->cur;
+	do {
+		if (td->urb == urb)
+			break;
+		tdp = &td->next;
+		td = TD(td->next);
+	} while (td);
+	while (td && td->urb == urb) {
+		*tdp = TD(td->next);
+		kfree(td->real);
+		td = *tdp;
+	}
+}
+
+/* Find an endpoint's descriptor, if needed allocate a new one and link it
+   in the DMA chain
+ */
+static struct admhcd_ed *admhcd_get_ed(struct admhcd *ahcd,
+		struct usb_host_endpoint *ep, struct urb *urb)
+{
+	struct admhcd_ed *hosthead;
+	struct admhcd_ed *found = NULL, *ed = NULL;
+	unsigned int pipe = urb->pipe;
+
+	admhcd_lock(ahcd);
+	hosthead = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
+	if (hosthead) {
+		for (ed = hosthead;; ed = ED(ed->next)) {
+			if (ed->ep == ep) {
+				found = ed;
+				break;
+			}
+			if (ED(ed->next) == hosthead)
+				break;
+		}
+	}
+	if (!found) {
+		found = kzalloc(sizeof(*found)+ADMHCD_DESC_ALIGN, GFP_ATOMIC);
+		if (!found)
+			goto out;
+		found->real = found;
+		found->ep = ep;
+		found = ED(KSEG1ADDR(found));
+		found->control = usb_pipedevice(pipe) |
+		    (usb_pipeendpoint(pipe) << ADMHCD_ED_EPSHIFT) |
+		    (usb_pipeint(pipe) ? ADMHCD_ED_INT : 0) |
+		    (urb->dev->speed == USB_SPEED_FULL ? ADMHCD_ED_SPEED : 0) |
+		    (usb_pipeisoc(pipe) ? ADMHCD_ED_FORMAT : 0) |
+		    (usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)) << ADMHCD_ED_MAXSHIFT);
+		/* Alloc first dummy td */
+		admhcd_td_alloc(found, NULL);
+		if (hosthead) {
+			found->next = hosthead;
+			ed->next = found;
+		} else {
+			found->next = found;
+			admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)found);
+		}
+	}
+out:
+	admhcd_unlock(ahcd);
+	return found;
+}
+
+static struct admhcd_td *admhcd_td_fill(u32 control, struct admhcd_td *td,
+		dma_addr_t data, int len)
+{
+	td->buffer = data;
+	td->buflen = len;
+	td->control = control;
+	return TD(td->next);
+}
+
+static void admhcd_ed_start(struct admhcd *ahcd, struct admhcd_ed *ed)
+{
+	struct admhcd_td *td = ed->cur;
+
+	if (ed->urb)
+		return;
+	if (td->urb) {
+		ed->urb = td->urb;
+		while (1) {
+			td->control |= ADMHCD_TD_OWN;
+			if (TD(td->next)->urb != td->urb) {
+				td->buflen |= ADMHCD_TD_INTEN;
+				break;
+			}
+			td = TD(td->next);
+		}
+	}
+	ed->head = TD(ed->head);
+	ahcd->dma_en |= ADMHCD_DMA_EN;
+}
+
+static irqreturn_t admhcd_irq(struct usb_hcd *hcd)
+{
+	struct admhcd *ahcd = hcd_to_admhcd(hcd);
+	u32 intstatus;
+
+	intstatus = admhcd_reg_get(ahcd, ADMHCD_REG_INTSTATUS);
+	if (intstatus & ADMHCD_INT_FATAL) {
+		admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_FATAL);
+		/* FIXME: handle fatal interrupts */
+	}
+
+	if (intstatus & ADMHCD_INT_SW) {
+		admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_SW);
+		/* FIXME: handle software interrupts */
+	}
+
+	if (intstatus & ADMHCD_INT_TD) {
+		struct admhcd_ed *ed, *head;
+
+		admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_TD);
+
+		head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
+		ed = head;
+		if (ed) do {
+			/* Is it a finished TD? */
+			if (ed->urb && !(ed->cur->control & ADMHCD_TD_OWN)) {
+				struct admhcd_td *td;
+				int error;
+
+				td = ed->cur;
+				error = (td->control & ADMHCD_TD_ERRMASK) >>
+				    ADMHCD_TD_ERRSHIFT;
+				ed->urb->status = admhcd_td_err[error];
+				admhcd_td_free(ed, ed->urb);
+				// Calculate real length!!!
+				ed->urb->actual_length = ed->urb->transfer_buffer_length;
+				ed->urb->hcpriv = NULL;
+				usb_hcd_giveback_urb(hcd, ed->urb);
+				ed->urb = NULL;
+			}
+			admhcd_ed_start(ahcd, ed);
+			ed = ED(ed->next);
+		} while (ed != head);
+	}
+
+	return IRQ_HANDLED;
+}
+
+static int admhcd_urb_enqueue(struct usb_hcd *hcd, struct usb_host_endpoint *ep,
+		struct urb *urb, gfp_t mem_flags)
+{
+	struct admhcd *ahcd = hcd_to_admhcd(hcd);
+	struct admhcd_ed *ed;
+	struct admhcd_td *td;
+	int size = 0, i, zero = 0, ret = 0;
+	unsigned int pipe = urb->pipe, toggle = 0;
+	dma_addr_t data = (dma_addr_t)urb->transfer_buffer;
+	int data_len = urb->transfer_buffer_length;
+
+	ed = admhcd_get_ed(ahcd, ep, urb);
+	if (!ed)
+		return -ENOMEM;
+
+	switch(usb_pipetype(pipe)) {
+	case PIPE_CONTROL:
+		size = 2;
+	case PIPE_INTERRUPT:
+	case PIPE_BULK:
+	default:
+		size += urb->transfer_buffer_length / 4096;
+		if (urb->transfer_buffer_length % 4096)
+			size++;
+		if (size == 0)
+			size++;
+		else if (urb->transfer_flags & URB_ZERO_PACKET &&
+		    !(urb->transfer_buffer_length %
+		      usb_maxpacket(urb->dev, pipe, usb_pipeout(pipe)))) {
+			size++;
+			zero = 1;
+		}
+		break;
+	case PIPE_ISOCHRONOUS:
+		size = urb->number_of_packets;
+		break;
+	}
+
+	admhcd_lock(ahcd);
+	/* Remember the first td */
+	td = admhcd_td_alloc(ed, urb);
+	if (!td) {
+		ret = -ENOMEM;
+		goto out;
+	}
+	/* Allocate additionall tds first */
+	for (i = 1; i < size; i++) {
+		if (admhcd_td_alloc(ed, urb) == NULL) {
+			admhcd_td_free(ed, urb);
+			ret = -ENOMEM;
+			goto out;
+		}
+	}
+
+	if (usb_gettoggle(urb->dev, usb_pipeendpoint(pipe), usb_pipeout(pipe)))
+		toggle = ADMHCD_TD_TOGGLE;
+	else {
+		toggle = ADMHCD_TD_DATA0;
+		usb_settoggle(urb->dev, usb_pipeendpoint(pipe),
+		    usb_pipeout(pipe), 1);
+	}
+
+	switch(usb_pipetype(pipe)) {
+	case PIPE_CONTROL:
+		td = admhcd_td_fill(ADMHCD_TD_SETUP | ADMHCD_TD_DATA0,
+		    td, (dma_addr_t)urb->setup_packet, 8);
+		while (data_len > 0) {
+			td = admhcd_td_fill(ADMHCD_TD_DATA1
+			    | ADMHCD_TD_R |
+			    (usb_pipeout(pipe) ?
+			    ADMHCD_TD_OUT : ADMHCD_TD_IN), td,
+			    data, data_len % 4097);
+			data_len -= 4096;
+		}
+		admhcd_td_fill(ADMHCD_TD_DATA1 | (usb_pipeout(pipe) ?
+		    ADMHCD_TD_IN : ADMHCD_TD_OUT), td,
+		    data, 0);
+		break;
+	case PIPE_INTERRUPT:
+	case PIPE_BULK:
+		//info ok for interrupt?
+		i = 0;
+		while(data_len > 4096) {
+			td = admhcd_td_fill((usb_pipeout(pipe) ?
+			    ADMHCD_TD_OUT :
+			    ADMHCD_TD_IN | ADMHCD_TD_R) |
+			    (i ? ADMHCD_TD_TOGGLE : toggle), td,
+			    data, 4096);
+			data += 4096;
+			data_len -= 4096;
+			i++;
+		}
+		td = admhcd_td_fill((usb_pipeout(pipe) ?
+		    ADMHCD_TD_OUT : ADMHCD_TD_IN) |
+		    (i ? ADMHCD_TD_TOGGLE : toggle), td, data, data_len);
+		i++;
+		if (zero)
+			admhcd_td_fill((usb_pipeout(pipe) ?
+			    ADMHCD_TD_OUT : ADMHCD_TD_IN) |
+			    (i ? ADMHCD_TD_TOGGLE : toggle), td, 0, 0);
+		break;
+	case PIPE_ISOCHRONOUS:
+		for (i = 0; i < urb->number_of_packets; i++) {
+			td = admhcd_td_fill(ADMHCD_TD_ISO |
+			    ((urb->start_frame + i) & 0xffff), td,
+			    data + urb->iso_frame_desc[i].offset,
+			    urb->iso_frame_desc[i].length);
+		}
+		break;
+	}
+	urb->hcpriv = ed;
+	admhcd_ed_start(ahcd, ed);
+out:
+	admhcd_unlock(ahcd);
+	return ret;
+}
+
+static int admhcd_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
+{
+	struct admhcd *ahcd = hcd_to_admhcd(hcd);
+	struct admhcd_ed *ed;
+
+	admhcd_lock(ahcd);
+
+	ed = urb->hcpriv;
+	if (ed && ed->urb != urb)
+		admhcd_td_free(ed, urb);
+
+	admhcd_unlock(ahcd);
+	return 0;
+}
+
+static void admhcd_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep)
+{
+	struct admhcd *ahcd = hcd_to_admhcd(hcd);
+	struct admhcd_ed *ed, *edt, *head;
+
+	admhcd_lock(ahcd);
+
+	head = (struct admhcd_ed *)admhcd_reg_get(ahcd, ADMHCD_REG_HOSTHEAD);
+	if (!head)
+		goto out;
+	for (ed = head; ED(ed->next) != head; ed = ED(ed->next))
+		if (ed->ep == ep)
+			break;
+	if (ed->ep != ep)
+		goto out;
+	while (ed->cur)
+		admhcd_td_free(ed, ed->cur->urb);
+	if (head == ed) {
+		if (ED(ed->next) == ed) {
+			admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0);
+			ahcd->dma_en = 0;
+			goto out_free;
+		}
+		head = ED(ed->next);
+		for (edt = head; ED(edt->next) != head; edt = ED(edt->next));
+		edt->next = ED(ed->next);
+		admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, (u32)ed->next);
+		goto out_free;
+	}
+	for (edt = head; edt->next != ed; edt = edt->next);
+	edt->next = ed->next;
+
+out_free:
+	kfree(ed->real);
+out:
+	admhcd_unlock(ahcd);
+}
+
+static int admhcd_get_frame_number(struct usb_hcd *hcd)
+{
+	struct admhcd *ahcd = hcd_to_admhcd(hcd);
+
+	return admhcd_reg_get(ahcd, ADMHCD_REG_FMNUMBER) & 0x0000ffff;
+}
+
+static int admhcd_hub_status_data(struct usb_hcd *hcd, char *buf)
+{
+	struct admhcd *ahcd = hcd_to_admhcd(hcd);
+	int port;
+
+	*buf = 0;
+	for (port = 0; port < ADMHCD_NUMPORTS; port++) {
+		if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4) &
+		    (ADMHCD_CSC | ADMHCD_PESC | ADMHCD_PSSC | ADMHCD_OCIC |
+		     ADMHCD_PRSC))
+			*buf |= (1 << (port + 1));
+	}
+	return !!*buf;
+}
+
+static __u8 root_hub_hub_des[] = {
+	0x09,		/* __u8  bLength; */
+	0x29,		/* __u8  bDescriptorType; Hub-descriptor */
+	0x02,		/* __u8  bNbrPorts; */
+	0x0a, 0x00,	/* __u16 wHubCharacteristics; */
+	0x01,		/* __u8  bPwrOn2pwrGood; 2ms */
+	0x00,		/* __u8  bHubContrCurrent; 0mA */
+	0x00,		/* __u8  DeviceRemovable; */
+	0xff,		/* __u8  PortPwrCtrlMask; */
+};
+
+static int admhcd_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue,
+		u16 wIndex, char *buf, u16 wLength)
+{
+	struct admhcd *ahcd = hcd_to_admhcd(hcd);
+	int retval = 0, len;
+	unsigned int port = wIndex -1;
+
+	switch (typeReq) {
+
+	case GetHubStatus:
+		*(__le32 *)buf = cpu_to_le32(0);
+		break;
+	case GetPortStatus:
+		if (port >= ADMHCD_NUMPORTS)
+			goto err;
+		*(__le32 *)buf = cpu_to_le32(
+		    admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4));
+		break;
+	case SetHubFeature:		/* We don't implement these */
+	case ClearHubFeature:
+		switch (wValue) {
+		case C_HUB_OVER_CURRENT:
+		case C_HUB_LOCAL_POWER:
+			break;
+		default:
+			goto err;
+		}
+	case SetPortFeature:
+		if (port >= ADMHCD_NUMPORTS)
+			goto err;
+
+		switch (wValue) {
+		case USB_PORT_FEAT_SUSPEND:
+			admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
+			    ADMHCD_PSS);
+			break;
+		case USB_PORT_FEAT_RESET:
+			if (admhcd_reg_get(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4)
+			    & ADMHCD_CCS) {
+				admhcd_reg_set(ahcd,
+				    ADMHCD_REG_PORTSTATUS0 + port*4,
+				    ADMHCD_PRS | ADMHCD_CSC);
+				mdelay(50);
+				admhcd_reg_set(ahcd,
+				    ADMHCD_REG_PORTSTATUS0 + port*4,
+				    ADMHCD_PES | ADMHCD_CSC);
+			}
+			break;
+		case USB_PORT_FEAT_POWER:
+			admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
+			    ADMHCD_PPS);
+			break;
+		default:
+			goto err;
+		}
+		break;
+	case ClearPortFeature:
+		if (port >= ADMHCD_NUMPORTS)
+			goto err;
+
+		switch (wValue) {
+		case USB_PORT_FEAT_ENABLE:
+			admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
+			    ADMHCD_CCS);
+			break;
+		case USB_PORT_FEAT_C_ENABLE:
+			admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
+			    ADMHCD_PESC);
+			break;
+		case USB_PORT_FEAT_SUSPEND:
+			admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
+			    ADMHCD_POCI);
+			break;
+		case USB_PORT_FEAT_C_SUSPEND:
+			admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
+			    ADMHCD_PSSC);
+		case USB_PORT_FEAT_POWER:
+			admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
+			    ADMHCD_LSDA);
+			break;
+		case USB_PORT_FEAT_C_CONNECTION:
+			admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
+			    ADMHCD_CSC);
+			break;
+		case USB_PORT_FEAT_C_OVER_CURRENT:
+			admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
+			    ADMHCD_OCIC);
+			break;
+		case USB_PORT_FEAT_C_RESET:
+			admhcd_reg_set(ahcd, ADMHCD_REG_PORTSTATUS0 + port*4,
+			    ADMHCD_PRSC);
+			break;
+		default:
+			goto err;
+		}
+		break;
+	case GetHubDescriptor:
+		len = min_t(unsigned int, sizeof(root_hub_hub_des), wLength);
+		memcpy(buf, root_hub_hub_des, len);
+		break;
+	default:
+err:
+		retval = -EPIPE;
+	}
+
+	return retval;
+}
+
+static int admhcd_start(struct usb_hcd *hcd)
+{
+	struct admhcd *ahcd = hcd_to_admhcd(hcd);
+	unsigned long flags;
+
+	spin_lock_irqsave(&ahcd->lock, flags);
+
+	/* Initialise the HCD registers */
+	admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
+	mdelay(10);
+
+	admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_SW_RESET);
+
+	while (admhcd_reg_get(ahcd, ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET) {
+		printk(KERN_WARNING PFX "waiting for reset to complete\n");
+		mdelay(1);
+	}
+
+	//hcd->uses_new_polling = 1;
+
+	/* Enable USB host mode */
+	admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_HOST_EN);
+
+	/* Set host specific settings */
+	admhcd_reg_set(ahcd, ADMHCD_REG_HOSTHEAD, 0x00000000);
+	admhcd_reg_set(ahcd, ADMHCD_REG_FMINTERVAL, 0x20002edf);
+	admhcd_reg_set(ahcd, ADMHCD_REG_LSTHRESH, 0x628);
+
+	/* Set interrupts */
+	admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, ADMHCD_INT_ACT |
+		ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
+	admhcd_reg_set(ahcd, ADMHCD_REG_INTSTATUS, ADMHCD_INT_ACT |
+		ADMHCD_INT_FATAL | ADMHCD_INT_SW | ADMHCD_INT_TD);
+
+	/* Power on all ports */
+	admhcd_reg_set(ahcd, ADMHCD_REG_RHDESCR, ADMHCD_NPS | ADMHCD_LPSC);
+
+	/* HCD is now operationnal */
+	admhcd_reg_set(ahcd, ADMHCD_REG_HOSTCONTROL, ADMHCD_STATE_OP);
+
+	hcd->state = HC_STATE_RUNNING;
+
+	spin_unlock_irqrestore(&ahcd->lock, flags);
+
+	return 0;
+}
+
+static int admhcd_sw_reset(struct admhcd *ahcd)
+{
+	int retries = 15;
+	unsigned long flags;
+	int ret = 0;
+
+	spin_lock_irqsave(&ahcd->lock, flags);
+
+	admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
+	mdelay(10);
+
+	admhcd_reg_set(ahcd, ADMHCD_REG_CONTROL, ADMHCD_SW_RESET);
+
+	while (--retries) {
+		mdelay(1);
+		if (!(admhcd_reg_get(ahcd, ADMHCD_REG_CONTROL) & ADMHCD_SW_RESET))
+			break;
+	}
+	if (!retries) {
+		printk(KERN_WARNING "%s: software reset timeout\n", hcd_name);
+		ret = -ETIME;
+	}
+	spin_unlock_irqrestore(&ahcd->lock, flags);
+	return ret;
+}
+
+static int admhcd_reset(struct usb_hcd *hcd)
+{
+	struct admhcd *ahcd = hcd_to_admhcd(hcd);
+	u32 state = 0;
+	int ret, timeout = 15; /* ms */
+	unsigned long t;
+
+	ret = admhcd_sw_reset(ahcd);
+	if (ret)
+		return ret;
+
+	t = jiffies + msecs_to_jiffies(timeout);
+	do {
+		spin_lock_irq(&ahcd->lock);
+		state = admhcd_reg_get(ahcd, ADMHCD_REG_HOSTCONTROL);
+		spin_unlock_irq(&ahcd->lock);
+		state &= ADMHCD_STATE_MASK;
+		if (state == ADMHCD_STATE_RST)
+			break;
+		msleep(4);
+	} while (time_before_eq(jiffies, t));
+
+	if (state != ADMHCD_STATE_RST) {
+		printk(KERN_WARNING "%s: device not ready after %dms\n",
+			hcd_name, timeout);
+		ret = -ENODEV;
+	}
+
+	return ret;
+}
+
+static void admhcd_stop(struct usb_hcd *hcd)
+{
+	struct admhcd *ahcd = hcd_to_admhcd(hcd);
+	unsigned long flags;
+	u32 val;
+
+	spin_lock_irqsave(&ahcd->lock, flags);
+	admhcd_reg_set(ahcd, ADMHCD_REG_INTENABLE, 0);
+
+	/* Set global control of power for ports */
+	val = admhcd_reg_get(ahcd, ADMHCD_REG_RHDESCR);
+	val &= (~ADMHCD_PSM | ADMHCD_LPS);
+	admhcd_reg_set(ahcd, ADMHCD_REG_RHDESCR, val);
+
+	spin_unlock_irqrestore(&ahcd->lock, flags);
+
+	/* Ask for software reset */
+	admhcd_sw_reset(ahcd);
+}
+
+
+static struct hc_driver adm5120_hc_driver = {
+	.description =		hcd_name,
+	.product_desc =		"ADM5120 HCD",
+	.hcd_priv_size =	sizeof(struct admhcd),
+	.irq =			admhcd_irq,
+	.flags =		HCD_USB11,
+	.urb_enqueue =		admhcd_urb_enqueue,
+	.urb_dequeue =		admhcd_urb_dequeue,
+	.endpoint_disable =	admhcd_endpoint_disable,
+	.get_frame_number =	admhcd_get_frame_number,
+	.hub_status_data =	admhcd_hub_status_data,
+	.hub_control =		admhcd_hub_control,
+	.start	=		admhcd_start,
+	.stop	=		admhcd_stop,
+	.reset =		admhcd_reset,
+};
+
+#define resource_len(r) (((r)->end - (r)->start) + 1)
+
+static int __init adm5120hcd_probe(struct platform_device *pdev)
+{
+	struct usb_hcd *hcd;
+	struct admhcd *ahcd;
+	struct resource *data;
+	void __iomem *data_reg;
+
+	int err = 0, irq;
+
+	if (pdev->num_resources < 2) {
+		printk(KERN_WARNING PFX "not enough resources\n");
+		err = -ENODEV;
+		goto out;
+	}
+
+	irq = platform_get_irq(pdev, 0);
+	data = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+
+	if (pdev->dev.dma_mask) {
+		printk(KERN_DEBUG PFX "no we won't dma\n");
+		return -EINVAL;
+	}
+
+	if (!data || irq < 0) {
+		printk(KERN_DEBUG PFX "either IRQ or data resource is invalid\n");
+		err = -ENODEV;
+		goto out;
+	}
+
+	if (!request_mem_region(data->start, resource_len(data), hcd_name)) {
+		printk(KERN_DEBUG PFX "cannot request memory regions for the data resource\n");
+		err = -EBUSY;
+		goto out;
+	}
+
+	data_reg = ioremap(data->start, resource_len(data));
+	if (data_reg == NULL) {
+		printk(KERN_DEBUG PFX "unable to ioremap\n");
+		err = -ENOMEM;
+		goto out_mem;
+        }
+
+	hcd = usb_create_hcd(&adm5120_hc_driver, &pdev->dev, pdev->dev.bus_id);
+	if (!hcd) {
+		printk(KERN_DEBUG PFX "unable to create the hcd\n");
+		err = -ENOMEM;
+		goto out_unmap;
+	}
+
+	hcd->rsrc_start = data->start;
+	hcd->rsrc_len = resource_len(data);
+	hcd->regs = data_reg;
+
+	ahcd = hcd_to_admhcd(hcd);
+	ahcd->base = (u32)data_reg;
+
+	spin_lock_init(&ahcd->lock);
+	INIT_LIST_HEAD(&ahcd->async);
+
+	hcd->product_desc = "ADM5120 HCD";
+
+	err = usb_add_hcd(hcd, irq, IRQF_DISABLED);
+	if (err) {
+		printk(KERN_DEBUG PFX "unable to add hcd\n");
+		goto out_dev;
+	}
+
+	return 0;
+
+out_dev:
+	usb_put_hcd(hcd);
+out_unmap:
+	iounmap(data_reg);
+out_mem:
+	release_mem_region(data->start, resource_len(data));
+out:
+	return err;
+}
+
+#ifdef CONFIG_PM
+static int adm5120hcd_suspend(struct platform_device *pdev,  pm_message_t state)
+{
+	pdev->dev.power.power_state = state;
+	mdelay(1);
+	return 0;
+}
+
+static int adm5120hcd_resume(struct platform_device *pdev, pm_message_t state)
+{
+	pdev->dev.power.power_state = PMSG_ON;
+	mdelay(1);
+	return 0;
+}
+#else
+#define adm5120hcd_suspend 	NULL
+#define adm5120hcd_resume 	NULL
+#endif
+
+static int __init_or_module adm5120hcd_remove(struct platform_device *pdev)
+{
+	struct usb_hcd *hcd = platform_get_drvdata(pdev);
+	struct admhcd *ahcd;
+
+	if (!hcd)
+		return 0;
+	ahcd = hcd_to_admhcd(hcd);
+	usb_remove_hcd(hcd);
+
+	usb_put_hcd(hcd);
+	return 0;
+}
+
+static struct platform_driver adm5120hcd_driver = {
+	.probe =	adm5120hcd_probe,
+	.remove =	adm5120hcd_remove,
+	.suspend = 	adm5120hcd_suspend,
+	.remove = 	adm5120hcd_resume,
+	.driver	=	{
+		.name 	= (char *)hcd_name,
+		.owner 	= THIS_MODULE,
+	},
+};
+
+static int __init adm5120hcd_init(void)
+{
+	int ret;
+
+	if (usb_disabled()) {
+		printk(KERN_DEBUG PFX "USB support is disabled\n");
+		return -ENODEV;
+	}
+
+	if (mips_machgroup != MACH_GROUP_ADM5120) {
+		printk(KERN_DEBUG PFX "unsupported machine group\n");
+		return -ENODEV;
+	}
+
+	ret = platform_driver_register(&adm5120hcd_driver);
+	if (ret == 0)
+		printk(KERN_INFO PFX "registered\n");
+
+	return ret;
+}
+
+static void __exit adm5120hcd_exit(void)
+{
+	platform_driver_unregister(&adm5120hcd_driver);
+	printk(KERN_INFO PFX "driver unregistered\n");
+}
+
+module_init(adm5120hcd_init);
+module_exit(adm5120hcd_exit);