strip the kernel version suffix from target directories, except for brcm-2.4 (the -2.4 will be included in the board name here). CONFIG_LINUX_<ver>_<board> becomes CONFIG_TARGET_<board>, same for profiles.

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8653 3c298f89-4303-0410-b956-a3cf2f4a3e73
2025-04-21 12:27:27 +03:00 · 2007-09-06 16:27:37 +00:00
parent 5389989aba
commit 17c7b6c3fd
701 changed files with 48 additions and 105 deletions
--- a/target/linux/amazon/files/arch/mips/amazon/Kconfig
+++ b/target/linux/amazon/files/arch/mips/amazon/Kconfig
@@ -0,0 +1,63 @@
+# copyright 2007 john crispin <blogic@openwrt.org>
+
+menu "Amazon built-in"
+
+config AMAZON_ASC_UART
+	bool "Amazon asc uart"
+	select SERIAL_CORE
+	select SERIAL_CORE_CONSOLE
+	default y
+
+config AMAZON_PCI
+	bool "Amazon PCI support"
+	default y
+	select HW_HAS_PCI
+	select PCI
+
+config AMAZON_NET_SW
+	bool "Amazon network"
+	default y
+
+config AMAZON_WDT
+	bool "Amazon watchdog timer"
+	default y
+
+config AMAZON_MTD
+	bool "Amazon MTD map"
+	default y
+
+choice 
+	prompt "Flash Size"
+	depends on AMAZON_MTD
+
+config MTD_AMAZON_FLASH_SIZE_2
+	bool "2MB"
+
+config MTD_AMAZON_FLASH_SIZE_4
+	bool "4MB"
+
+config MTD_AMAZON_FLASH_SIZE_8
+	bool "8MB"
+
+config MTD_AMAZON_FLASH_SIZE_16
+	bool "16MB"
+
+endchoice
+
+choice 
+	prompt "Bus Width"
+	depends on AMAZON_MTD
+
+config MTD_AMAZON_BUS_WIDTH_8
+	bool "8-bit"
+
+config MTD_AMAZON_BUS_WIDTH_16
+	bool "16-bit"
+
+config MTD_AMAZON_BUS_WIDTH_32
+	bool "32-bit"
+
+endchoice
+
+
+endmenu
--- a/target/linux/amazon/files/arch/mips/amazon/Makefile
+++ b/target/linux/amazon/files/arch/mips/amazon/Makefile
@@ -0,0 +1,9 @@
+#
+#  Copyright 2007 openwrt.org
+#       John Crispin <blogic@openwrt.org>
+#
+# Makefile for Infineon Amazon
+#
+obj-y := dma-core.o interrupt.o prom.o setup.o
+obj-$(CONFIG_PCI) += pci.o
+
--- a/target/linux/amazon/files/arch/mips/amazon/dma-core.c
+++ b/target/linux/amazon/files/arch/mips/amazon/dma-core.c
--- a/target/linux/amazon/files/arch/mips/amazon/dma-core.h
+++ b/target/linux/amazon/files/arch/mips/amazon/dma-core.h
@@ -0,0 +1,69 @@
+#ifndef DMA_CORE_H 
+#define DMA_CORE_H 
+
+#define AMAZON_DMA_REG32(reg_num)  *((volatile u32*)(reg_num))
+#define AMAZON_DMA_CH_STEP            4
+
+#define COMB_ISR_RX_MASK 0xfe000000
+#define COMB_ISR_TX_MASK 0x01f00000
+
+
+#define DMA_OWN   1
+#define CPU_OWN   0   
+#define DMA_MAJOR 250
+
+//Descriptors
+#define DMA_DESC_OWN_CPU		0x0
+#define DMA_DESC_OWN_DMA		0x80000000
+#define DMA_DESC_CPT_SET		0x40000000
+#define DMA_DESC_SOP_SET		0x20000000
+#define DMA_DESC_EOP_SET		0x10000000
+
+#define switch_rx_chan_base 0
+#define switch_tx_chan_base 7
+#define switch2_rx_chan_base 2
+#define switch2_tx_chan_base 8
+#define TPE_rx_chan_base    4
+#define TPE_tx_chan_base    9
+#define DPLus2FPI_rx_chan_base  6
+#define DPLus2FPI_tx_chan_base  11 
+
+#define RX_CHAN_NUM 7
+#define TX_CHAN_NUM 5
+#define CHAN_TOTAL_NUM       (RX_CHAN_NUM+TX_CHAN_NUM)
+#define DEFAULT_OFFSET 20
+#define DESCRIPTOR_SIZE 8
+
+typedef struct dev_list{
+   struct dma_device_info* dev;
+   int weight;
+   struct dev_list* prev;
+   struct dev_list* next;
+}dev_list; 
+
+typedef struct channel_info{
+   char device_name[16];
+   int occupied;
+   enum attr_t attr;  
+   int current_desc;
+   int weight;
+   int default_weight;
+   int desc_num;
+   int burst_len;
+   int desc_len;
+   int desc_ofst;
+   int packet_size;
+   int offset_from_base;
+   int control;
+   void* opt[DEFAULT_OFFSET];
+   u8* (*buffer_alloc)(int len,int* offset, void** opt);
+   int (*buffer_free)(u8* dataptr,void* opt);
+   int (*intr_handler)(struct dma_device_info* info,int status);
+
+   struct dma_device_info* dma_dev;
+}channel_info;
+
+
+
+#endif
+
--- a/target/linux/amazon/files/arch/mips/amazon/interrupt.c
+++ b/target/linux/amazon/files/arch/mips/amazon/interrupt.c
@@ -0,0 +1,186 @@
+/*
+ *  Gary Jennejohn (C) 2003 <gj@denx.de>
+ *  Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
+ *  Copyright (C) 2007 John Crispin <blogic@openwrt.org>
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ *
+ * Routines for generic manipulation of the interrupts found on the 
+ * AMAZON boards.
+ */
+
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/kernel_stat.h>
+#include <linux/module.h>
+
+#include <asm/amazon/amazon.h>
+#include <asm/amazon/irq.h>
+#include <asm/bootinfo.h>
+#include <asm/irq_cpu.h>
+#include <asm/irq.h>
+#include <asm/time.h>
+
+static void amazon_disable_irq(unsigned int irq_nr)
+{
+	int i;
+	u32 amazon_ier = AMAZON_ICU_IM0_IER;
+
+	if (irq_nr <= INT_NUM_IM0_IRL11 && irq_nr >= INT_NUM_IM0_IRL0)
+		amazon_writel(amazon_readl(amazon_ier) & (~(AMAZON_DMA_H_MASK)), amazon_ier);
+	else {
+		irq_nr -= INT_NUM_IRQ0;
+		for (i = 0; i <= 4; i++)
+		{
+			if (irq_nr <= 31) 
+	        	amazon_writel(amazon_readl(amazon_ier) & ~(1 << irq_nr ), amazon_ier);
+			amazon_ier += 0x10;
+			irq_nr -= 32;
+		}
+	}	
+}
+
+static void amazon_mask_and_ack_irq(unsigned int irq_nr)
+{
+	int i;
+	u32 amazon_ier = AMAZON_ICU_IM0_IER;
+	u32 amazon_isr = AMAZON_ICU_IM0_ISR;
+
+	if (irq_nr <= INT_NUM_IM0_IRL11 && irq_nr >= INT_NUM_IM0_IRL0){
+		amazon_writel(amazon_readl(amazon_ier) & (~(AMAZON_DMA_H_MASK)), amazon_ier);
+		amazon_writel(AMAZON_DMA_H_MASK, amazon_isr); 
+	} else {
+		irq_nr -= INT_NUM_IRQ0;
+		for (i = 0; i <= 4; i++)
+		{
+			if (irq_nr <= 31){ 
+	        	amazon_writel(amazon_readl(amazon_ier) & ~(1 << irq_nr ), amazon_ier);
+				amazon_writel((1 << irq_nr ), amazon_isr);
+			}
+			amazon_ier += 0x10;
+			amazon_isr += 0x10;
+			irq_nr -= 32;
+		}
+	}
+}
+
+static void amazon_enable_irq(unsigned int irq_nr)
+{
+	int i;
+	u32 amazon_ier = AMAZON_ICU_IM0_IER;
+
+	if (irq_nr <= INT_NUM_IM0_IRL11 && irq_nr >= INT_NUM_IM0_IRL0)
+		amazon_writel(amazon_readl(amazon_ier) | AMAZON_DMA_H_MASK, amazon_ier);
+	else {
+		irq_nr -= INT_NUM_IRQ0;
+		for (i = 0; i <= 4; i++)
+		{
+			if (irq_nr <= 31)
+				amazon_writel(amazon_readl(amazon_ier) | (1 << irq_nr ), amazon_ier);
+			amazon_ier += 0x10;
+			irq_nr -= 32;
+		}
+	}
+}
+
+static unsigned int amazon_startup_irq(unsigned int irq)
+{
+	amazon_enable_irq(irq);
+	return 0;
+}
+
+static void amazon_end_irq(unsigned int irq)
+{
+	if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
+		amazon_enable_irq(irq);
+	}
+}
+
+static struct hw_interrupt_type amazon_irq_type = {
+	"AMAZON",
+	.startup = amazon_startup_irq,
+	.enable = amazon_enable_irq,
+	.disable = amazon_disable_irq,
+	.unmask = amazon_enable_irq,
+	.ack = amazon_mask_and_ack_irq,
+	.mask = amazon_disable_irq,
+	.mask_ack = amazon_mask_and_ack_irq,
+	.end = amazon_end_irq
+};
+
+/* Cascaded interrupts from IM0-4 */
+static inline void amazon_hw_irqdispatch(u8 line)
+{
+	u32 irq;
+
+	irq = (amazon_readl(AMAZON_ICU_IM_VEC) >> (line * 5)) & AMAZON_ICU_IM0_VEC_MASK;
+	if (line == 0 && irq <= 11 && irq >= 0) {
+		//DMA fixed to IM0_IRL0
+		irq = 0;
+	}
+	do_IRQ(irq + INT_NUM_IRQ0 + (line * 32));
+}
+
+asmlinkage void plat_irq_dispatch(void)
+{
+	unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM;
+	if (pending & CAUSEF_IP7){
+		do_IRQ(MIPS_CPU_TIMER_IRQ);
+		goto out;
+	} else {
+		unsigned int i;
+		for (i = 0; i <= 4; i++)
+		{
+			if(pending & (CAUSEF_IP2 << i)){
+				amazon_hw_irqdispatch(i);
+				goto out;
+			}
+		}
+	}
+	printk("Spurious IRQ: CAUSE=0x%08x\n", read_c0_status());
+out:
+	return;
+}
+
+static struct irqaction cascade = {
+	.handler	= no_action,
+	.flags  	= SA_INTERRUPT,
+	.name   	= "cascade",
+};
+
+void __init arch_init_irq(void)
+{
+	int i;
+
+	/* mask all interrupt sources */
+	for(i = 0; i <= 4; i++){
+		amazon_writel(0, AMAZON_ICU_IM0_IER + (i * 0x10));
+	}
+
+	mips_cpu_irq_init();
+
+	/* set up irq cascade */
+	for (i = 2; i <= 6; i++) {
+		setup_irq(i, &cascade);
+	}
+
+	for (i = INT_NUM_IRQ0; i <= INT_NUM_IM4_IRL31; i++) {
+		irq_desc[i].status	= IRQ_DISABLED;
+		irq_desc[i].action	= 0;
+		irq_desc[i].depth	= 1;
+		set_irq_chip(i, &amazon_irq_type);
+	}
+}
--- a/target/linux/amazon/files/arch/mips/amazon/pci.c
+++ b/target/linux/amazon/files/arch/mips/amazon/pci.c
@@ -0,0 +1,293 @@
+/*
+ *  Carsten Langgaard, carstenl@mips.com
+ *  Copyright (C) 1999, 2000 MIPS Technologies, Inc.  All rights reserved.
+ *  Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
+ *
+ *  This program is free software; you can distribute it and/or modify it
+ *  under the terms of the GNU General Public License (Version 2) as
+ *  published by the Free Software Foundation.
+ *
+ *  This program is distributed in the hope it will be useful, but WITHOUT
+ *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
+ *  for more details.
+ *
+ *  You should have received a copy of the GNU General Public License along
+ *  with this program; if not, write to the Free Software Foundation, Inc.,
+ *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
+ */
+
+/* FIXME: convert nasty volatile register derefs to readl/writel calls */
+
+#include <linux/types.h>
+#include <linux/pci.h>
+#include <linux/kernel.h>
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/delay.h>
+#include <asm/io.h>
+#include <asm/paccess.h>
+#include <asm/amazon/irq.h>
+#include <asm/amazon/amazon.h>
+
+#define AMAZON_PCI_REG32( addr )		  (*(volatile u32 *)(addr))
+#ifndef AMAZON_PCI_MEM_BASE
+#define AMAZON_PCI_MEM_BASE    0xb2000000
+#endif
+#define AMAZON_PCI_MEM_SIZE    0x00400000
+#define AMAZON_PCI_IO_BASE     0xb2400000
+#define AMAZON_PCI_IO_SIZE     0x00002000
+
+#define AMAZON_PCI_CFG_BUSNUM_SHF 16
+#define AMAZON_PCI_CFG_DEVNUM_SHF 11
+#define AMAZON_PCI_CFG_FUNNUM_SHF 8
+
+#define PCI_ACCESS_READ  0
+#define PCI_ACCESS_WRITE 1
+
+static inline u32 amazon_r32(u32 addr)
+{
+	u32 *ptr = (u32 *) addr;
+	return __raw_readl(ptr);
+}
+
+static inline void amazon_w32(u32 addr, u32 val)
+{
+	u32 *ptr = (u32 *) addr;
+	__raw_writel(val, ptr);
+}
+
+
+static struct resource pci_io_resource = {
+	.name = "io pci IO space",
+#if 0
+	.start = AMAZON_PCI_IO_BASE,
+	.end = AMAZON_PCI_IO_BASE + AMAZON_PCI_IO_SIZE - 1,
+#endif
+	.start = 0,
+	.end = AMAZON_PCI_IO_SIZE - 1,
+	.flags = IORESOURCE_IO
+};
+
+static struct resource pci_mem_resource = {
+	.name = "ext pci memory space",
+	.start = AMAZON_PCI_MEM_BASE,
+	.end = AMAZON_PCI_MEM_BASE + AMAZON_PCI_MEM_SIZE - 1,
+	.flags = IORESOURCE_MEM
+};
+
+static inline u32 amazon_pci_swap(u32 val)
+{
+#ifdef CONFIG_AMAZON_PCI_HW_SWAP
+	return swab32(val);
+#else
+	return val;
+#endif
+}
+
+static int amazon_pci_config_access(unsigned char access_type,
+	struct pci_bus *bus, unsigned int devfn, unsigned int where, u32 *data)
+{
+	unsigned long flags;
+	u32 pci_addr;
+	u32 val;
+	int ret;
+   
+	/* Amazon support slot from 0 to 15 */
+	/* devfn 0 & 0x20 is itself */
+	if ((bus != 0) || (devfn == 0) || (devfn == 0x20))
+		return 1;
+
+	pci_addr=AMAZON_PCI_CFG_BASE |
+		bus->number << AMAZON_PCI_CFG_BUSNUM_SHF |
+		devfn << AMAZON_PCI_CFG_FUNNUM_SHF |
+		(where & ~0x3);
+    
+	local_irq_save(flags);
+	if (access_type == PCI_ACCESS_WRITE) {
+		val = amazon_pci_swap(*data);
+		ret = put_dbe(val, (u32 *)pci_addr);
+	} else {
+		ret = get_dbe(val, (u32 *)pci_addr);
+		*data = amazon_pci_swap(val);
+	}
+
+	amazon_w32(PCI_MODE, amazon_r32(PCI_MODE) & (~(1<<PCI_MODE_cfgok_bit)));
+	amazon_w32(STATUS_COMMAND_ADDR, amazon_r32(STATUS_COMMAND_ADDR));
+	amazon_w32(PCI_MODE, amazon_r32(PCI_MODE) | (~(1<<PCI_MODE_cfgok_bit)));
+	local_irq_restore(flags);
+
+	return ret; 
+}
+
+
+static int amazon_pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 *val)
+{
+	u32 data = 0;
+	int ret = PCIBIOS_SUCCESSFUL;
+
+	if (amazon_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data)) {
+		data = ~0;
+		ret = -1;
+	}
+
+	switch (size) {
+		case 1:
+			*((u8 *) val) = (data >> ((where & 3) << 3)) & 0xff;
+			break;
+		case 2:
+			*((u16 *) val) = (data >> ((where & 3) << 3)) & 0xffff;
+			break;
+		case 4:
+			*val = data;
+			break;
+		default:
+			return -1;
+	}
+
+	return ret;
+}
+
+
+static int amazon_pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 val)
+{
+	if (size != 4) {
+		u32 data;
+
+		if (amazon_pci_config_access(PCI_ACCESS_READ, bus, devfn, where, &data))
+			return -1;
+
+		if (size == 1)
+			val = (data & ~(0xff << ((where & 3) << 3))) | (val << ((where & 3) << 3));
+		else if (size == 2)
+			val = (data & ~(0xffff << ((where & 3) << 3))) | (val << ((where & 3) << 3));
+		else
+			return -1;
+	}
+
+	if (amazon_pci_config_access(PCI_ACCESS_WRITE, bus, devfn, where, &val))
+	       return -1;
+
+	return PCIBIOS_SUCCESSFUL;
+}
+
+static struct pci_ops amazon_pci_ops = {
+	amazon_pci_read,
+	amazon_pci_write
+};
+
+static struct pci_controller amazon_pci_controller = {
+	.pci_ops = &amazon_pci_ops,
+	.mem_resource = &pci_mem_resource,
+	.io_resource = &pci_io_resource
+};
+
+int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
+{
+	switch (slot) {
+		case 13:
+			/* IDSEL = AD29 --> USB Host Controller */
+			return INT_NUM_IM2_IRL15;
+		case 14:
+			/* IDSEL = AD30 --> mini PCI connector */
+			return INT_NUM_IM2_IRL14;
+		default:
+			printk("Warning: no IRQ found for PCI device in slot %d, pin %d\n", slot, pin);
+			return 0;
+	}
+}
+
+int pcibios_plat_dev_init(struct pci_dev *dev)
+{
+	switch(dev->irq) {
+		case INT_NUM_IM2_IRL15:
+			/* 
+			 * IDSEL = AD29 --> USB Host Controller
+			 * PCI_INTA/B/C--GPIO Port0.2--EXIN3
+			 * IN/ALT0:1 ALT1:0
+			 * PULL UP
+			 */
+			(*AMAZON_GPIO_P0_DIR) = (*AMAZON_GPIO_P0_DIR) & 0xfffffffb;
+			(*AMAZON_GPIO_P0_ALTSEL0) = (*AMAZON_GPIO_P0_ALTSEL0)| 4;
+			(*AMAZON_GPIO_P0_ALTSEL1) = (*AMAZON_GPIO_P0_ALTSEL1)& 0xfffffffb;
+			(*AMAZON_GPIO_P0_PUDSEL) =  (*AMAZON_GPIO_P0_PUDSEL) | 4;
+			(*AMAZON_GPIO_P0_PUDEN) = (*AMAZON_GPIO_P0_PUDEN) | 4;
+			//External Interrupt Node
+			(*AMAZON_ICU_EXTINTCR) = (*AMAZON_ICU_EXTINTCR)|0x6000; /* Low Level triggered */
+			(*AMAZON_ICU_IRNEN) = (*AMAZON_ICU_IRNEN)|0x8;
+			pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+			break;
+		case INT_NUM_IM2_IRL14:
+			/* 
+			 * IDSEL = AD30 --> mini PCI connector 
+			 * PCI_INTA--GPIO Port0.1--EXIN2
+			 * IN/ALT0:1 ALT1:0
+			 * PULL UP
+			 */
+			(*AMAZON_GPIO_P0_DIR) = (*AMAZON_GPIO_P0_DIR) & 0xfffffffd;
+			(*AMAZON_GPIO_P0_ALTSEL0) = (*AMAZON_GPIO_P0_ALTSEL0)| 2;
+			(*AMAZON_GPIO_P0_ALTSEL1) = (*AMAZON_GPIO_P0_ALTSEL1)& 0xfffffffd;
+			(*AMAZON_GPIO_P0_PUDSEL) =  (*AMAZON_GPIO_P0_PUDSEL) | 2;
+			(*AMAZON_GPIO_P0_PUDEN) = (*AMAZON_GPIO_P0_PUDEN) | 2;
+			//External Interrupt Node
+			(*AMAZON_ICU_EXTINTCR) = (*AMAZON_ICU_EXTINTCR)|0x600;
+			(*AMAZON_ICU_IRNEN) = (*AMAZON_ICU_IRNEN)|0x4;
+			pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
+			break;
+		default:
+			return 1;
+	}
+	return 0;
+}
+
+int amazon_pci_init(void)
+{
+	u32 temp_buffer;
+
+#ifdef CONFIG_AMAZON_PCI_HW_SWAP
+	AMAZON_PCI_REG32(IRM) = AMAZON_PCI_REG32(IRM) | (1<<27) | (1<<28);
+	wmb();
+#endif
+
+	AMAZON_PCI_REG32(CLOCK_CONTROL) = AMAZON_PCI_REG32(CLOCK_CONTROL) | (1<<ARB_CTRL_bit);
+	amazon_w32(PCI_MODE, amazon_r32(PCI_MODE) & (~(1<<PCI_MODE_cfgok_bit)));
+
+	AMAZON_PCI_REG32(STATUS_COMMAND_ADDR) = AMAZON_PCI_REG32(STATUS_COMMAND_ADDR) | (1<<BUS_MASTER_ENABLE_BIT) |(1<<MEM_SPACE_ENABLE_BIT);
+
+	temp_buffer = AMAZON_PCI_REG32(PCI_ARB_CTRL_STATUS_ADDR);
+	temp_buffer = temp_buffer | (1<< INTERNAL_ARB_ENABLE_BIT);
+	temp_buffer = temp_buffer & ~(3<< PCI_MASTER0_REQ_MASK_2BITS);
+	temp_buffer = temp_buffer & ~(3<< PCI_MASTER0_GNT_MASK_2BITS);
+
+	/* flash */
+	temp_buffer = temp_buffer & ~(3<< PCI_MASTER1_REQ_MASK_2BITS);
+	temp_buffer = temp_buffer & ~(3<< PCI_MASTER1_GNT_MASK_2BITS);
+
+	/* external master */
+	temp_buffer = temp_buffer & ~(3<< PCI_MASTER2_REQ_MASK_2BITS);
+	temp_buffer = temp_buffer & ~(3<< PCI_MASTER2_GNT_MASK_2BITS);
+
+	AMAZON_PCI_REG32(PCI_ARB_CTRL_STATUS_ADDR) = temp_buffer;
+	wmb();
+
+	AMAZON_PCI_REG32(FPI_ADDRESS_MAP_0) = 0xb2000000;
+	AMAZON_PCI_REG32(FPI_ADDRESS_MAP_1) = 0xb2100000;
+	AMAZON_PCI_REG32(FPI_ADDRESS_MAP_2) = 0xb2200000;
+	AMAZON_PCI_REG32(FPI_ADDRESS_MAP_3) = 0xb2300000;
+	AMAZON_PCI_REG32(FPI_ADDRESS_MAP_4) = 0xb2400000;
+	AMAZON_PCI_REG32(FPI_ADDRESS_MAP_5) = 0xb2500000;
+	AMAZON_PCI_REG32(FPI_ADDRESS_MAP_6) = 0xb2600000;
+	AMAZON_PCI_REG32(FPI_ADDRESS_MAP_7) = 0xb2700000;
+	   
+	AMAZON_PCI_REG32(BAR11_MASK) = 0x0f000008;
+	AMAZON_PCI_REG32(PCI_ADDRESS_MAP_11) = 0x0;
+	AMAZON_PCI_REG32(BAR1_ADDR) = 0x0;
+	amazon_w32(PCI_MODE, amazon_r32(PCI_MODE) | (~(1<<PCI_MODE_cfgok_bit)));
+	//use 8 dw burse length
+	AMAZON_PCI_REG32(FPI_BURST_LENGTH) = 0x303;
+
+	set_io_port_base(ioremap(AMAZON_PCI_IO_BASE, AMAZON_PCI_IO_SIZE));
+	register_pci_controller(&amazon_pci_controller);
+	return 0;
+}
+arch_initcall(amazon_pci_init);
--- a/target/linux/amazon/files/arch/mips/amazon/prom.c
+++ b/target/linux/amazon/files/arch/mips/amazon/prom.c
@@ -0,0 +1,77 @@
+/*
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
+ *
+ *   Copyright 2007 John Crispin <blogic@openwrt.org> 
+ */
+
+#include <linux/init.h>
+#include <linux/string.h>
+#include <linux/ctype.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/bootmem.h>
+#include <linux/ioport.h>
+#include <asm/bootinfo.h>
+#include <asm/amazon/amazon.h>
+#include <asm/amazon/irq.h>
+#include <asm/amazon/model.h>
+#include <asm/cpu.h>
+
+void prom_putchar(char c)
+{
+	/* Wait for FIFO to empty */
+	while ((amazon_readl(AMAZON_ASC_FSTAT) >> 8) != 0x00) ;
+	/* Crude cr/nl handling is better than none */
+	if(c == '\n')
+		amazon_writel('\r', AMAZON_ASC_TBUF);
+	amazon_writel(c, AMAZON_ASC_TBUF);
+}
+
+void prom_printf(const char * fmt, ...)
+{
+	va_list args;
+	int l;
+	char *p, *buf_end;
+	char buf[1024];	
+
+	va_start(args, fmt);
+	/* FIXME - hopefully i < sizeof(buf) */
+	l = vsprintf(buf, fmt, args); 
+	va_end(args);
+	buf_end = buf + l;
+	
+	for (p = buf; p < buf_end; p++)
+		prom_putchar(*p);
+}
+
+
+void __init prom_init(void)
+{
+	mips_machgroup = MACH_GROUP_INFINEON;
+	mips_machtype = MACH_INFINEON_AMAZON;
+
+	strcpy(&(arcs_cmdline[0]), "console=ttyS0,115200 rootfstype=squashfs,jffs2 init=/etc/preinit");
+	
+	add_memory_region(0x00000000, 0x1000000, BOOT_MEM_RAM);
+}
+
+void prom_free_prom_memory(void)
+{
+}
+
+const char *get_system_type(void)
+{
+	return BOARD_SYSTEM_TYPE;
+}
--- a/target/linux/amazon/files/arch/mips/amazon/setup.c
+++ b/target/linux/amazon/files/arch/mips/amazon/setup.c
@@ -0,0 +1,186 @@
+/*
+ *	 Copyright (C) 2004 Peng Liu <peng.liu@infineon.com>
+ *	 Copyright (C) 2007 John Crispin <blogic@openwrt.org>
+ *	 Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org>
+ *	 
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
+ *
+ */
+
+#include <linux/init.h>
+#include <linux/sched.h>
+#include <linux/module.h>
+#include <linux/interrupt.h>
+#include <linux/delay.h>
+
+#include <asm/reboot.h>
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/cpu.h>
+#include <asm/bootinfo.h>
+#include <asm/irq.h>
+#include <asm/mipsregs.h>
+#include <asm/amazon/amazon.h>
+#include <asm/amazon/irq.h>
+#include <asm/amazon/model.h>
+
+extern void prom_printf(const char * fmt, ...);
+static void amazon_reboot_setup(void);
+
+/* the CPU clock rate - lifted from u-boot */
+unsigned int amazon_get_cpu_hz(void)
+{
+	/*-----------------------------------*/
+	/**CGU CPU Clock Reduction Register***/ 
+	/*-----------------------------------*/
+	switch(amazon_readl(AMAZON_CGU_CPUCRD) & 0x3){
+		case 0:
+			/*divider ration 1/1, 235 MHz clock */
+			return 235000000;
+		case 1:
+			/*divider ration 2/3, 235 MHz clock, clock not accurate, here */
+			return 150000000;
+		case 2:
+			/*divider ration 1/2, 235 MHz clock */
+			return 117500000;
+		default:
+			/*divider ration 1/4, 235 MHz clock */
+			return 58750000;
+	}
+}
+
+/* the FPI clock rate - lifted from u-boot */
+unsigned int amazon_get_fpi_hz(void)
+{
+	unsigned int  clkCPU;
+	clkCPU = amazon_get_cpu_hz();
+
+	/*-------------------------------------*/
+	/***CGU Clock Divider Select Register***/
+	/*-------------------------------------*/
+	switch (amazon_readl(AMAZON_CGU_DIV) & 0x3)
+	{
+		case 1:
+			return clkCPU >> 1;
+		case 2:
+			return clkCPU >> 2;
+		default:
+			return clkCPU;
+		/* '11' is reserved */
+	}
+}
+
+/* this doesn't really belong here, but it's a convenient location */
+unsigned int amazon_get_cpu_ver(void)
+{
+	static unsigned int cpu_ver = 0;
+	if (cpu_ver == 0)
+		cpu_ver = amazon_readl(AMAZON_MCD_CHIPID) & 0xFFFFF000;
+	return cpu_ver;
+}
+
+void amazon_time_init(void)
+{
+	mips_hpt_frequency = amazon_get_cpu_hz()/2;
+	printk("mips_hpt_frequency:%d\n", mips_hpt_frequency);
+}
+
+extern int hr_time_resolution;
+
+/* ISR GPTU Timer 6 for high resolution timer */
+static void amazon_timer6_interrupt(int irq, void *dev_id)
+{
+	timer_interrupt(AMAZON_TIMER6_INT, NULL);
+}
+
+static struct irqaction hrt_irqaction = {
+	.handler = amazon_timer6_interrupt,
+	.flags = SA_INTERRUPT,
+	.name = "hrt",
+};
+
+/*
+ * THe CPU counter for System timer, set to HZ
+ * GPTU Timer 6 for high resolution timer, set to hr_time_resolution
+ * Also misuse this routine to print out the CPU type and clock.
+ */
+void __init plat_timer_setup(struct irqaction *irq)
+{
+	/* cpu counter for timer interrupts */
+	setup_irq(MIPS_CPU_TIMER_IRQ, irq);
+
+	/* enable the timer in the PMU */
+	amazon_writel(amazon_readl(AMAZON_PMU_PWDCR)| AMAZON_PMU_PWDCR_GPT|AMAZON_PMU_PWDCR_FPI, AMAZON_PMU_PWDCR);
+	
+	/* setup the GPTU for timer tick  f_fpi == f_gptu*/
+	amazon_writel(0x0100, AMAZON_GPTU_CLC);
+	amazon_writel(0xffff, AMAZON_GPTU_CAPREL);
+	amazon_writel(0x80C0, AMAZON_GPTU_T6CON);
+}
+
+void __init plat_mem_setup(void)
+{	
+	u32 chipid = 0;
+	u32 part_no = 0;
+	
+	chipid = amazon_readl(AMAZON_MCD_CHIPID);
+	part_no = AMAZON_MCD_CHIPID_PART_NUMBER_GET(chipid);
+	
+	if(part_no == AMAZON_CHIPID_YANGTSE){
+		prom_printf("Yangtse Version\n");	
+	} else if (part_no == AMAZON_CHIPID_STANDARD) {
+		prom_printf(SYSTEM_MODEL_NAME "\n");
+	} else {
+		prom_printf("unknown version %8x\n",part_no);
+	}
+	
+	amazon_reboot_setup();
+	board_time_init = amazon_time_init;
+
+	//stop reset TPE and DFE
+	amazon_writel(0, AMAZON_RST_REQ);
+	//clock
+	amazon_writel(0x3fff, AMAZON_PMU_PWDCR);
+	//reenable trace capability
+	part_no = readl(AMAZON_BCU_ECON);
+}
+
+static void amazon_machine_restart(char *command)
+{
+    local_irq_disable();
+    amazon_writel(AMAZON_RST_ALL, AMAZON_RST_REQ);
+    for (;;) ;
+}
+
+static void amazon_machine_halt(void)
+{
+    printk(KERN_NOTICE "System halted.\n");
+    local_irq_disable();
+    for (;;) ;
+}
+
+static void amazon_machine_power_off(void)
+{
+	printk(KERN_NOTICE "Please turn off the power now.\n");
+    local_irq_disable();
+    for (;;) ;
+}
+
+static void amazon_reboot_setup(void)
+{
+	_machine_restart = amazon_machine_restart;
+	_machine_halt = amazon_machine_halt;
+	pm_power_off = amazon_machine_power_off;
+}