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strip the kernel version suffix from target directories, except for brcm-2.4 (the -2.4 will be included in the board name here). CONFIG_LINUX_<ver>_<board> becomes CONFIG_TARGET_<board>, same for profiles.

Browse Source 
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8653 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
nbd
2007-09-06 16:27:37 +00:00
parent 5389989aba
commit 17c7b6c3fd
701 changed files with 48 additions and 105 deletions
Download Patch File Download Diff File Expand all files Collapse all files

27
target/linux/brcm47xx/Makefile Normal file
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#
# Copyright (C) 2006 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
ARCH:=mipsel
BOARD:=brcm47xx
BOARDNAME:=Broadcom BCM947xx/953xx
FEATURES:=squashfs usb
LINUX_VERSION:=2.6.22.4
define Target/Description
Build firmware images for Broadcom based routers
(e.g. Netgear WGT634U)
endef
include $(INCLUDE_DIR)/kernel-build.mk
DEFAULT_PACKAGES += kmod-switch kmod-diag
# include the profiles
-include profiles/*.mk
$(eval $(call BuildKernel))

1
target/linux/brcm47xx/base-files Symbolic link
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@@ -0,0 +1 @@
../brcm-2.4/base-files

1
target/linux/brcm47xx/base-files.mk Symbolic link
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@@ -0,0 +1 @@
../brcm-2.4/base-files.mk

277
target/linux/brcm47xx/config/default Normal file
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CONFIG_32BIT=y
# CONFIG_64BIT is not set
# CONFIG_64BIT_PHYS_ADDR is not set
# CONFIG_8139TOO is not set
# CONFIG_ARCH_HAS_ILOG2_U32 is not set
# CONFIG_ARCH_HAS_ILOG2_U64 is not set
# CONFIG_ARCH_SUPPORTS_MSI is not set
# CONFIG_ARPD is not set
# CONFIG_ATMEL is not set
# CONFIG_ATM_DRIVERS is not set
CONFIG_B44=y
CONFIG_BASE_SMALL=0
# CONFIG_BCM43XX is not set
CONFIG_BCM947XX=y
CONFIG_BITREVERSE=y
# CONFIG_BONDING is not set
# CONFIG_BSD_DISKLABEL is not set
# CONFIG_BSD_PROCESS_ACCT is not set
# CONFIG_BT_HCIBCM203X is not set
# CONFIG_BT_HCIBFUSB is not set
# CONFIG_BT_HCIBPA10X is not set
# CONFIG_BT_HCIVHCI is not set
CONFIG_CFE=y
# CONFIG_CIFS_STATS is not set
# CONFIG_CLS_U32_MARK is not set
# CONFIG_CLS_U32_PERF is not set
CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 init=/etc/preinit noinitrd console=ttyS0,115200"
# CONFIG_CONFIGFS_FS is not set
CONFIG_CONNECTOR=m
# CONFIG_CPU_BIG_ENDIAN is not set
CONFIG_CPU_HAS_LLSC=y
CONFIG_CPU_HAS_PREFETCH=y
CONFIG_CPU_HAS_SYNC=y
CONFIG_CPU_LITTLE_ENDIAN=y
CONFIG_CPU_MIPS32=y
CONFIG_CPU_MIPS32_R1=y
# CONFIG_CPU_MIPS32_R2 is not set
# CONFIG_CPU_MIPS64_R1 is not set
# CONFIG_CPU_MIPS64_R2 is not set
CONFIG_CPU_MIPSR1=y
# CONFIG_CPU_NEVADA is not set
# CONFIG_CPU_R10000 is not set
# CONFIG_CPU_R3000 is not set
# CONFIG_CPU_R4300 is not set
# CONFIG_CPU_R4X00 is not set
# CONFIG_CPU_R5000 is not set
# CONFIG_CPU_R5432 is not set
# CONFIG_CPU_R6000 is not set
# CONFIG_CPU_R8000 is not set
# CONFIG_CPU_RM7000 is not set
# CONFIG_CPU_RM9000 is not set
# CONFIG_CPU_SB1 is not set
CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
CONFIG_CPU_SUPPORTS_HIGHMEM=y
# CONFIG_CPU_TX39XX is not set
# CONFIG_CPU_TX49XX is not set
# CONFIG_CPU_VR41XX is not set
# CONFIG_CRYPTO_ANUBIS is not set
CONFIG_CRYPTO_BLKCIPHER=m
# CONFIG_CRYPTO_BLOWFISH is not set
# CONFIG_CRYPTO_CAST5 is not set
# CONFIG_CRYPTO_CAST6 is not set
CONFIG_CRYPTO_CBC=m
# CONFIG_CRYPTO_CRC32C is not set
CONFIG_CRYPTO_DES=m
CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HMAC=y
# CONFIG_CRYPTO_KHAZAD is not set
# CONFIG_CRYPTO_MD4 is not set
CONFIG_CRYPTO_MD5=m
# CONFIG_CRYPTO_NULL is not set
# CONFIG_CRYPTO_SERPENT is not set
# CONFIG_CRYPTO_SHA256 is not set
# CONFIG_CRYPTO_SHA512 is not set
# CONFIG_CRYPTO_TEA is not set
# CONFIG_CRYPTO_TEST is not set
# CONFIG_CRYPTO_TGR192 is not set
# CONFIG_CRYPTO_TWOFISH is not set
# CONFIG_CRYPTO_WP512 is not set
# CONFIG_DDB5477 is not set
CONFIG_DEVPORT=y
# CONFIG_DM9000 is not set
CONFIG_DMA_NEED_PCI_MAP_STATE=y
CONFIG_DMA_NONCOHERENT=y
# CONFIG_E100 is not set
CONFIG_FS_POSIX_ACL=y
CONFIG_GENERIC_FIND_NEXT_BIT=y
CONFIG_GENERIC_GPIO=y
# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set
# CONFIG_GEN_RTC is not set
CONFIG_HAS_DMA=y
CONFIG_HAS_IOMEM=y
CONFIG_HAS_IOPORT=y
CONFIG_HID=m
CONFIG_HW_HAS_PCI=y
CONFIG_HW_RANDOM=y
CONFIG_HZ=250
# CONFIG_HZ_100 is not set
CONFIG_HZ_250=y
# CONFIG_I2C is not set
# CONFIG_IDE is not set
# CONFIG_IKCONFIG is not set
CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION=m
CONFIG_INITRAMFS_SOURCE=""
CONFIG_INPUT=m
# CONFIG_IP6_NF_MATCH_FRAG is not set
# CONFIG_IP6_NF_MATCH_HL is not set
# CONFIG_IP6_NF_MATCH_IPV6HEADER is not set
# CONFIG_IP6_NF_MATCH_OPTS is not set
# CONFIG_IP6_NF_MATCH_RT is not set
# CONFIG_IP6_NF_TARGET_HL is not set
CONFIG_IPW2200_QOS=y
# CONFIG_IP_DCCP is not set
# CONFIG_IP_NF_ARPTABLES is not set
# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
# CONFIG_IP_NF_TARGET_NETMAP is not set
# CONFIG_IP_NF_TARGET_SAME is not set
# CONFIG_IP_ROUTE_VERBOSE is not set
CONFIG_IRQ_CPU=y
CONFIG_JFFS2_FS_DEBUG=0
# CONFIG_LIBCRC32C is not set
# CONFIG_LLC2 is not set
# CONFIG_MACH_ALCHEMY is not set
# CONFIG_MACH_DECSTATION is not set
# CONFIG_MACH_JAZZ is not set
# CONFIG_MACH_VR41XX is not set
CONFIG_MIPS=y
# CONFIG_MIPS_ATLAS is not set
# CONFIG_MIPS_COBALT is not set
# CONFIG_MIPS_EV64120 is not set
CONFIG_MIPS_L1_CACHE_SHIFT=5
# CONFIG_MIPS_MALTA is not set
CONFIG_MIPS_MT_DISABLED=y
# CONFIG_MIPS_MT_SMP is not set
# CONFIG_MIPS_MT_SMTC is not set
# CONFIG_MIPS_SEAD is not set
# CONFIG_MIPS_SIM is not set
# CONFIG_MIPS_VPE_LOADER is not set
# CONFIG_MOMENCO_OCELOT is not set
# CONFIG_MOMENCO_OCELOT_3 is not set
# CONFIG_MOMENCO_OCELOT_C is not set
CONFIG_MTD=y
# CONFIG_MTD_ABSENT is not set
CONFIG_MTD_BCM47XX=y
CONFIG_MTD_BLKDEVS=y
CONFIG_MTD_BLOCK=y
# CONFIG_MTD_BLOCK2MTD is not set
CONFIG_MTD_CFI=y
# CONFIG_MTD_CFI_ADV_OPTIONS is not set
CONFIG_MTD_CFI_AMDSTD=y
CONFIG_MTD_CFI_I1=y
CONFIG_MTD_CFI_I2=y
# CONFIG_MTD_CFI_I4 is not set
# CONFIG_MTD_CFI_I8 is not set
CONFIG_MTD_CFI_INTELEXT=y
# CONFIG_MTD_CFI_STAA is not set
CONFIG_MTD_CFI_UTIL=y
CONFIG_MTD_CHAR=y
# CONFIG_MTD_CMDLINE_PARTS is not set
CONFIG_MTD_COMPLEX_MAPPINGS=y
# CONFIG_MTD_CONCAT is not set
# CONFIG_MTD_DEBUG is not set
# CONFIG_MTD_DOC2000 is not set
# CONFIG_MTD_DOC2001 is not set
# CONFIG_MTD_DOC2001PLUS is not set
CONFIG_MTD_GEN_PROBE=y
# CONFIG_MTD_JEDECPROBE is not set
CONFIG_MTD_MAP_BANK_WIDTH_1=y
# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
CONFIG_MTD_MAP_BANK_WIDTH_2=y
# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
CONFIG_MTD_MAP_BANK_WIDTH_4=y
# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
# CONFIG_MTD_MTDRAM is not set
# CONFIG_MTD_ONENAND is not set
CONFIG_MTD_PARTITIONS=y
# CONFIG_MTD_PCI is not set
# CONFIG_MTD_PHRAM is not set
# CONFIG_MTD_PHYSMAP is not set
# CONFIG_MTD_PLATRAM is not set
# CONFIG_MTD_PMC551 is not set
# CONFIG_MTD_RAM is not set
# CONFIG_MTD_REDBOOT_PARTS is not set
# CONFIG_MTD_ROM is not set
# CONFIG_MTD_SLRAM is not set
# CONFIG_NATSEMI is not set
# CONFIG_NE2K_PCI is not set
CONFIG_NETDEV_1000=y
# CONFIG_NET_EMATCH is not set
# CONFIG_NET_IPGRE_BROADCAST is not set
# CONFIG_NET_PKTGEN is not set
CONFIG_NET_SCH_FIFO=y
# CONFIG_NET_SCH_NETEM is not set
# CONFIG_NET_VENDOR_3COM is not set
# CONFIG_NTFS_FS is not set
# CONFIG_PAGE_SIZE_16KB is not set
CONFIG_PAGE_SIZE_4KB=y
# CONFIG_PAGE_SIZE_64KB is not set
# CONFIG_PAGE_SIZE_8KB is not set
# CONFIG_PMC_YOSEMITE is not set
# CONFIG_PNPACPI is not set
# CONFIG_PNX8550_JBS is not set
# CONFIG_PNX8550_STB810 is not set
# CONFIG_PPP_MULTILINK is not set
# CONFIG_PPP_SYNC_TTY is not set
# CONFIG_PROC_KCORE is not set
# CONFIG_ROMFS_FS is not set
# CONFIG_RTC is not set
CONFIG_RWSEM_GENERIC_SPINLOCK=y
CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
# CONFIG_SCSI_MULTI_LUN is not set
CONFIG_SCSI_WAIT_SCAN=m
# CONFIG_SERIAL_8250_DETECT_IRQ is not set
CONFIG_SERIAL_8250_EXTENDED=y
# CONFIG_SERIAL_8250_MANY_PORTS is not set
# CONFIG_SERIAL_8250_RSA is not set
CONFIG_SERIAL_8250_SHARE_IRQ=y
# CONFIG_SGI_IP22 is not set
# CONFIG_SGI_IP27 is not set
# CONFIG_SGI_IP32 is not set
# CONFIG_SIBYTE_BIGSUR is not set
# CONFIG_SIBYTE_CARMEL is not set
# CONFIG_SIBYTE_CRHINE is not set
# CONFIG_SIBYTE_CRHONE is not set
# CONFIG_SIBYTE_LITTLESUR is not set
# CONFIG_SIBYTE_PTSWARM is not set
# CONFIG_SIBYTE_RHONE is not set
# CONFIG_SIBYTE_SENTOSA is not set
# CONFIG_SIBYTE_SWARM is not set
# CONFIG_SPARSEMEM_STATIC is not set
CONFIG_SSB=y
CONFIG_SSB_DEBUG=y
CONFIG_SSB_DRIVER_EXTIF=y
CONFIG_SSB_DRIVER_MIPS=y
CONFIG_SSB_DRIVER_PCICORE=y
CONFIG_SSB_PCICORE_HOSTMODE=y
CONFIG_SSB_PCIHOST=y
CONFIG_SSB_SERIAL=y
# CONFIG_SSB_SILENT is not set
CONFIG_SYSVIPC_SYSCTL=y
CONFIG_SYS_HAS_CPU_MIPS32_R1=y
CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y
# CONFIG_TC35815 is not set
# CONFIG_TOSHIBA_JMR3927 is not set
# CONFIG_TOSHIBA_RBTX4927 is not set
# CONFIG_TOSHIBA_RBTX4938 is not set
CONFIG_TRAD_SIGNALS=y
# CONFIG_UNUSED_SYMBOLS is not set
# CONFIG_USB_CATC is not set
# CONFIG_USB_EHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_EHCI_HCD=m
# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
CONFIG_USB_EHCI_SPLIT_ISO=y
# CONFIG_USB_EHCI_TT_NEWSCHED is not set
# CONFIG_USB_KAWETH is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set
# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set
CONFIG_USB_OHCI_HCD=m
# CONFIG_USB_OHCI_HCD_SSB is not set
# CONFIG_USB_PEGASUS is not set
# CONFIG_USB_RTL8150 is not set
# CONFIG_USB_STORAGE_ALAUDA is not set
# CONFIG_USB_STORAGE_DATAFAB is not set
# CONFIG_USB_STORAGE_DPCM is not set
# CONFIG_USB_STORAGE_FREECOM is not set
# CONFIG_USB_STORAGE_JUMPSHOT is not set
# CONFIG_USB_STORAGE_KARMA is not set
# CONFIG_USB_STORAGE_SDDR09 is not set
# CONFIG_USB_STORAGE_SDDR55 is not set
# CONFIG_USB_STORAGE_USBAT is not set
CONFIG_USB_UHCI_HCD=m
# CONFIG_VGASTATE is not set
# CONFIG_VIA_RHINE is not set
# CONFIG_WATCHDOG is not set
CONFIG_ZONE_DMA_FLAG=0

7
target/linux/brcm47xx/files/arch/mips/bcm947xx/Makefile Normal file
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@@ -0,0 +1,7 @@
#
# Makefile for the BCM47xx specific kernel interface routines
# under Linux.
#
obj-y := irq.o prom.o setup.o time.o
obj-y += nvram.o cfe_env.o

229
target/linux/brcm47xx/files/arch/mips/bcm947xx/cfe_env.c Normal file
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@@ -0,0 +1,229 @@
/*
* CFE environment variable access
*
* Copyright 2001-2003, Broadcom Corporation
* Copyright 2006, Felix Fietkau <nbd@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#define NVRAM_SIZE (0x1ff0)
static char _nvdata[NVRAM_SIZE];
static char _valuestr[256];
/*
* TLV types. These codes are used in the "type-length-value"
* encoding of the items stored in the NVRAM device (flash or EEPROM)
*
* The layout of the flash/nvram is as follows:
*
* <type> <length> <data ...> <type> <length> <data ...> <type_end>
*
* The type code of "ENV_TLV_TYPE_END" marks the end of the list.
* The "length" field marks the length of the data section, not
* including the type and length fields.
*
* Environment variables are stored as follows:
*
* <type_env> <length> <flags> <name> = <value>
*
* If bit 0 (low bit) is set, the length is an 8-bit value.
* If bit 0 (low bit) is clear, the length is a 16-bit value
*
* Bit 7 set indicates "user" TLVs. In this case, bit 0 still
* indicates the size of the length field.
*
* Flags are from the constants below:
*
*/
#define ENV_LENGTH_16BITS 0x00 /* for low bit */
#define ENV_LENGTH_8BITS 0x01
#define ENV_TYPE_USER 0x80
#define ENV_CODE_SYS(n,l) (((n)<<1)|(l))
#define ENV_CODE_USER(n,l) ((((n)<<1)|(l)) | ENV_TYPE_USER)
/*
* The actual TLV types we support
*/
#define ENV_TLV_TYPE_END 0x00
#define ENV_TLV_TYPE_ENV ENV_CODE_SYS(0,ENV_LENGTH_8BITS)
/*
* Environment variable flags
*/
#define ENV_FLG_NORMAL 0x00 /* normal read/write */
#define ENV_FLG_BUILTIN 0x01 /* builtin - not stored in flash */
#define ENV_FLG_READONLY 0x02 /* read-only - cannot be changed */
#define ENV_FLG_MASK 0xFF /* mask of attributes we keep */
#define ENV_FLG_ADMIN 0x100 /* lets us internally override permissions */
/* *********************************************************************
* _nvram_read(buffer,offset,length)
*
* Read data from the NVRAM device
*
* Input parameters:
* buffer - destination buffer
* offset - offset of data to read
* length - number of bytes to read
*
* Return value:
* number of bytes read, or <0 if error occured
********************************************************************* */
static int
_nvram_read(unsigned char *nv_buf, unsigned char *buffer, int offset, int length)
{
int i;
if (offset > NVRAM_SIZE)
return -1;
for ( i = 0; i < length; i++) {
buffer[i] = ((volatile unsigned char*)nv_buf)[offset + i];
}
return length;
}
static char*
_strnchr(const char *dest,int c,size_t cnt)
{
while (*dest && (cnt > 0)) {
if (*dest == c) return (char *) dest;
dest++;
cnt--;
}
return NULL;
}
/*
* Core support API: Externally visible.
*/
/*
* Get the value of an NVRAM variable
* @param name name of variable to get
* @return value of variable or NULL if undefined
*/
char*
cfe_env_get(unsigned char *nv_buf, char* name)
{
int size;
unsigned char *buffer;
unsigned char *ptr;
unsigned char *envval;
unsigned int reclen;
unsigned int rectype;
int offset;
int flg;
if (!strcmp(name, "nvram_type"))
return "cfe";
size = NVRAM_SIZE;
buffer = &_nvdata[0];
ptr = buffer;
offset = 0;
/* Read the record type and length */
if (_nvram_read(nv_buf, ptr,offset,1) != 1) {
goto error;
}
while ((*ptr != ENV_TLV_TYPE_END) && (size > 1)) {
/* Adjust pointer for TLV type */
rectype = *(ptr);
offset++;
size--;
/*
* Read the length. It can be either 1 or 2 bytes
* depending on the code
*/
if (rectype & ENV_LENGTH_8BITS) {
/* Read the record type and length - 8 bits */
if (_nvram_read(nv_buf, ptr,offset,1) != 1) {
goto error;
}
reclen = *(ptr);
size--;
offset++;
}
else {
/* Read the record type and length - 16 bits, MSB first */
if (_nvram_read(nv_buf, ptr,offset,2) != 2) {
goto error;
}
reclen = (((unsigned int) *(ptr)) << 8) + (unsigned int) *(ptr+1);
size -= 2;
offset += 2;
}
if (reclen > size)
break; /* should not happen, bad NVRAM */
switch (rectype) {
case ENV_TLV_TYPE_ENV:
/* Read the TLV data */
if (_nvram_read(nv_buf, ptr,offset,reclen) != reclen)
goto error;
flg = *ptr++;
envval = (unsigned char *) _strnchr(ptr,'=',(reclen-1));
if (envval) {
*envval++ = '\0';
memcpy(_valuestr,envval,(reclen-1)-(envval-ptr));
_valuestr[(reclen-1)-(envval-ptr)] = '\0';
#if 0
printk(KERN_INFO "NVRAM:%s=%s\n", ptr, _valuestr);
#endif
if(!strcmp(ptr, name)){
return _valuestr;
}
if((strlen(ptr) > 1) && !strcmp(&ptr[1], name))
return _valuestr;
}
break;
default:
/* Unknown TLV type, skip it. */
break;
}
/*
* Advance to next TLV
*/
size -= (int)reclen;
offset += reclen;
/* Read the next record type */
ptr = buffer;
if (_nvram_read(nv_buf, ptr,offset,1) != 1)
goto error;
}
error:
return NULL;
}

37
target/linux/brcm47xx/files/arch/mips/bcm947xx/include/nvram.h Normal file
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@@ -0,0 +1,37 @@
/*
* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#ifndef __NVRAM_H
#define __NVRAM_H
struct nvram_header {
u32 magic;
u32 len;
u32 crc_ver_init; /* 0:7 crc, 8:15 ver, 16:31 sdram_init */
u32 config_refresh; /* 0:15 sdram_config, 16:31 sdram_refresh */
u32 config_ncdl; /* ncdl values for memc */
};
struct nvram_tuple {
char *name;
char *value;
struct nvram_tuple *next;
};
#define NVRAM_HEADER 0x48534C46 /* 'FLSH' */
#define NVRAM_VERSION 1
#define NVRAM_HEADER_SIZE 20
#define NVRAM_SPACE 0x8000
#define NVRAM_MAX_VALUE_LEN 255
#define NVRAM_MAX_PARAM_LEN 64
char *nvram_get(const char *name);
#endif

63
target/linux/brcm47xx/files/arch/mips/bcm947xx/irq.c Normal file
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@@ -0,0 +1,63 @@
/*
* Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/errno.h>
#include <linux/init.h>
#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/module.h>
#include <linux/smp.h>
#include <linux/types.h>
#include <asm/cpu.h>
#include <asm/io.h>
#include <asm/irq.h>
#include <asm/irq_cpu.h>
void plat_irq_dispatch(void)
{
u32 cause;
cause = read_c0_cause() & read_c0_status() & CAUSEF_IP;
clear_c0_status(cause);
if (cause & CAUSEF_IP7)
do_IRQ(7);
if (cause & CAUSEF_IP2)
do_IRQ(2);
if (cause & CAUSEF_IP3)
do_IRQ(3);
if (cause & CAUSEF_IP4)
do_IRQ(4);
if (cause & CAUSEF_IP5)
do_IRQ(5);
if (cause & CAUSEF_IP6)
do_IRQ(6);
}
void __init arch_init_irq(void)
{
mips_cpu_irq_init();
}

125
target/linux/brcm47xx/files/arch/mips/bcm947xx/nvram.c Normal file
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@@ -0,0 +1,125 @@
/*
* BCM947xx nvram variable access
*
* Copyright 2005, Broadcom Corporation
* Copyright 2006, Felix Fietkau <nbd@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/ssb/ssb.h>
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/interrupt.h>
#include <linux/spinlock.h>
#include <linux/slab.h>
#include <asm/byteorder.h>
#include <asm/bootinfo.h>
#include <asm/addrspace.h>
#include <asm/io.h>
#include <asm/uaccess.h>
#include <nvram.h>
#define MB * 1048576
extern struct ssb_bus ssb;
static char nvram_buf[NVRAM_SPACE];
static int cfe_env;
extern char *cfe_env_get(char *nv_buf, const char *name);
/* Probe for NVRAM header */
static void __init early_nvram_init(void)
{
struct ssb_mipscore *mcore = &ssb.mipscore;
struct nvram_header *header;
int i;
u32 base, lim, off;
u32 *src, *dst;
base = mcore->flash_window;
lim = mcore->flash_window_size;
cfe_env = 0;
/* XXX: hack for supporting the CFE environment stuff on WGT634U */
if (lim >= 8 MB) {
src = (u32 *) KSEG1ADDR(base + 8 MB - 0x2000);
dst = (u32 *) nvram_buf;
if ((*src & 0xff00ff) == 0x000001) {
printk("early_nvram_init: WGT634U NVRAM found.\n");
for (i = 0; i < 0x1ff0; i++) {
if (*src == 0xFFFFFFFF)
break;
*dst++ = *src++;
}
cfe_env = 1;
return;
}
}
off = 0x20000;
while (off <= lim) {
/* Windowed flash access */
header = (struct nvram_header *) KSEG1ADDR(base + off - NVRAM_SPACE);
if (header->magic == NVRAM_HEADER)
goto found;
off <<= 1;
}
/* Try embedded NVRAM at 4 KB and 1 KB as last resorts */
header = (struct nvram_header *) KSEG1ADDR(base + 4096);
if (header->magic == NVRAM_HEADER)
goto found;
header = (struct nvram_header *) KSEG1ADDR(base + 1024);
if (header->magic == NVRAM_HEADER)
goto found;
return;
found:
src = (u32 *) header;
dst = (u32 *) nvram_buf;
for (i = 0; i < sizeof(struct nvram_header); i += 4)
*dst++ = *src++;
for (; i < header->len && i < NVRAM_SPACE; i += 4)
*dst++ = le32_to_cpu(*src++);
}
char *nvram_get(const char *name)
{
char *var, *value, *end, *eq;
if (!name)
return NULL;
if (!nvram_buf[0])
early_nvram_init();
if (cfe_env)
return cfe_env_get(nvram_buf, name);
/* Look for name=value and return value */
var = &nvram_buf[sizeof(struct nvram_header)];
end = nvram_buf + sizeof(nvram_buf) - 2;
end[0] = end[1] = '\0';
for (; *var; var = value + strlen(value) + 1) {
if (!(eq = strchr(var, '=')))
break;
value = eq + 1;
if ((eq - var) == strlen(name) && strncmp(var, name, (eq - var)) == 0)
return value;
}
return NULL;
}
EXPORT_SYMBOL(nvram_get);

61
target/linux/brcm47xx/files/arch/mips/bcm947xx/prom.c Normal file
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@@ -0,0 +1,61 @@
/*
* Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/mm.h>
#include <linux/sched.h>
#include <linux/bootmem.h>
#include <asm/addrspace.h>
#include <asm/bootinfo.h>
#include <asm/pmon.h>
#include "../cfe/cfe_private.h"
const char *get_system_type(void)
{
return "Broadcom BCM47xx";
}
void __init prom_init(void)
{
unsigned long mem;
mips_machgroup = MACH_GROUP_BRCM;
mips_machtype = MACH_BCM47XX;
cfe_setup(fw_arg0, fw_arg1, fw_arg2, fw_arg3);
/* Figure out memory size by finding aliases */
for (mem = (1 << 20); mem < (128 << 20); mem += (1 << 20)) {
if (*(unsigned long *)((unsigned long)(prom_init) + mem) ==
*(unsigned long *)(prom_init))
break;
}
add_memory_region(0, mem, BOOT_MEM_RAM);
}
void __init prom_free_prom_memory(void)
{
}

163
target/linux/brcm47xx/files/arch/mips/bcm947xx/setup.c Normal file
View File

@@ -0,0 +1,163 @@
/*
* Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
* Copyright (C) 2005 Waldemar Brodkorb <wbx@openwrt.org>
* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
* Copyright (C) 2006 Michael Buesch
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/types.h>
#include <linux/tty.h>
#include <linux/serial.h>
#include <linux/serial_core.h>
#include <linux/serial_reg.h>
#include <asm/bootinfo.h>
#include <asm/time.h>
#include <asm/reboot.h>
#include <asm/cfe.h>
#include <linux/pm.h>
#include <linux/ssb/ssb.h>
#include <nvram.h>
extern void bcm47xx_pci_init(void);
extern void bcm47xx_time_init(void);
struct ssb_bus ssb;
static void bcm47xx_machine_restart(char *command)
{
printk(KERN_ALERT "Please stand by while rebooting the system...\n");
local_irq_disable();
/* CFE has a reboot callback, but that does not work.
* Oopses with: Reserved instruction in kernel code.
*/
/* Set the watchdog timer to reset immediately */
ssb_chipco_watchdog(&ssb.chipco, 1);
while (1)
cpu_relax();
}
static void bcm47xx_machine_halt(void)
{
/* Disable interrupts and watchdog and spin forever */
local_irq_disable();
ssb_chipco_watchdog(&ssb.chipco, 0);
while (1)
cpu_relax();
}
static void e_aton(char *str, char *dest)
{
int i = 0;
if (str == NULL) {
memset(dest, 0, 6);
return;
}
for (;;) {
dest[i++] = (char) simple_strtoul(str, NULL, 16);
str += 2;
if (!*str++ || i == 6)
break;
}
}
static void bcm47xx_fill_sprom(struct ssb_sprom *sprom)
{
// TODO
}
static void bcm47xx_fill_sprom_nvram(struct ssb_sprom *sprom)
{
char *s;
memset(sprom, 0, sizeof(struct ssb_sprom));
sprom->revision = 3;
if ((s = nvram_get("et0macaddr")))
e_aton(s, sprom->r1.et0mac);
if ((s = nvram_get("et1macaddr")))
e_aton(s, sprom->r1.et1mac);
if ((s = nvram_get("et0phyaddr")))
sprom->r1.et0phyaddr = simple_strtoul(s, NULL, 10);
if ((s = nvram_get("et1phyaddr")))
sprom->r1.et1phyaddr = simple_strtoul(s, NULL, 10);
}
void __init plat_mem_setup(void)
{
int i, err;
char *s;
struct ssb_mipscore *mcore;
err = ssb_bus_ssbbus_register(&ssb, SSB_ENUM_BASE, bcm47xx_fill_sprom);
if (err) {
const char *msg = "Failed to initialize SSB bus (err %d)\n";
cfe_printk(msg, err); /* Make sure the message gets out of the box. */
panic(msg, err);
}
mcore = &ssb.mipscore;
/* FIXME: the nvram init depends on the ssb being fully initializes,
* can't use the fill_sprom callback yet! */
bcm47xx_fill_sprom_nvram(&ssb.sprom);
s = nvram_get("kernel_args");
if (s && !strncmp(s, "console=ttyS1", 13)) {
struct ssb_serial_port port;
cfe_printk("Swapping serial ports!\n");
/* swap serial ports */
memcpy(&port, &mcore->serial_ports[0], sizeof(port));
memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1], sizeof(port));
memcpy(&mcore->serial_ports[1], &port, sizeof(port));
}
for (i = 0; i < mcore->nr_serial_ports; i++) {
struct ssb_serial_port *port = &(mcore->serial_ports[i]);
struct uart_port s;
memset(&s, 0, sizeof(s));
s.line = i;
s.membase = port->regs;
s.irq = port->irq + 2;//FIXME?
s.uartclk = port->baud_base;
s.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
s.iotype = SERIAL_IO_MEM;
s.regshift = port->reg_shift;
early_serial_setup(&s);
}
cfe_printk("Serial init done.\n");
_machine_restart = bcm47xx_machine_restart;
_machine_halt = bcm47xx_machine_halt;
pm_power_off = bcm47xx_machine_halt;
board_time_init = bcm47xx_time_init;//FIXME move into ssb
}
EXPORT_SYMBOL(ssb);

62
target/linux/brcm47xx/files/arch/mips/bcm947xx/time.c Normal file
View File

@@ -0,0 +1,62 @@
/*
* Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/serial_reg.h>
#include <linux/interrupt.h>
#include <linux/ssb/ssb.h>
#include <asm/addrspace.h>
#include <asm/io.h>
#include <asm/time.h>
extern struct ssb_bus ssb;
void __init
bcm47xx_time_init(void)
{
unsigned long hz;
/*
* Use deterministic values for initial counter interrupt
* so that calibrate delay avoids encountering a counter wrap.
*/
write_c0_count(0);
write_c0_compare(0xffff);
hz = ssb_cpu_clock(&ssb.mipscore) / 2;
if (!hz)
hz = 100000000;
/* Set MIPS counter frequency for fixed_rate_gettimeoffset() */
mips_hpt_frequency = hz;
}
void __init
plat_timer_setup(struct irqaction *irq)
{
/* Enable the timer interrupt */
setup_irq(7, irq);
}

5
target/linux/brcm47xx/files/arch/mips/cfe/Makefile Normal file
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@@ -0,0 +1,5 @@
#
# Makefile for the Broadcom Common Firmware Environment support
#
obj-y += cfe.o

533
target/linux/brcm47xx/files/arch/mips/cfe/cfe.c Normal file
View File

@@ -0,0 +1,533 @@
/*
* Broadcom Common Firmware Environment (CFE) support
*
* Copyright 2000, 2001, 2002
* Broadcom Corporation. All rights reserved.
*
* Copyright (C) 2006 Michael Buesch
*
* Original Authors: Mitch Lichtenberg, Chris Demetriou
*
* This software is furnished under license and may be used and copied only
* in accordance with the following terms and conditions. Subject to these
* conditions, you may download, copy, install, use, modify and distribute
* modified or unmodified copies of this software in source and/or binary
* form. No title or ownership is transferred hereby.
*
* 1) Any source code used, modified or distributed must reproduce and
* retain this copyright notice and list of conditions as they appear in
* the source file.
*
* 2) No right is granted to use any trade name, trademark, or logo of
* Broadcom Corporation. The "Broadcom Corporation" name may not be
* used to endorse or promote products derived from this software
* without the prior written permission of Broadcom Corporation.
*
* 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
* NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
* FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
* LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include <linux/init.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/spinlock.h>
#include <asm/cfe.h>
#include "cfe_private.h"
static cfe_uint_t cfe_handle;
static int (*cfe_trampoline)(long handle, long iocb);
#include <linux/kernel.h>
void __init cfe_setup(unsigned long fwarg0, unsigned long fwarg1,
unsigned long fwarg2, unsigned long fwarg3)
{
if (fwarg3 == 0x80300000) {
/* WRT54G workaround */
fwarg3 = CFE_EPTSEAL;
fwarg2 = 0xBFC00500;
}
if (fwarg3 != CFE_EPTSEAL) {
/* We are not booted from CFE */
return;
}
if (fwarg1 == 0) {
/* We are on the boot CPU */
cfe_handle = (cfe_uint_t)fwarg0;
cfe_trampoline = CFE_TO_PTR(fwarg2);
}
}
int cfe_vprintk(const char *fmt, va_list args)
{
static char buffer[1024];
static DEFINE_SPINLOCK(lock);
static const char pfx[] = "CFE-console: ";
static const size_t pfx_len = sizeof(pfx) - 1;
unsigned long flags;
int len, cnt, pos;
int handle;
int res;
if (!cfe_present())
return -ENODEV;
spin_lock_irqsave(&lock, flags);
handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE);
if (CFE_ISERR(handle)) {
len = -EIO;
goto out;
}
strcpy(buffer, pfx);
len = vscnprintf(buffer + pfx_len,
sizeof(buffer) - pfx_len - 2,
fmt, args);
len += pfx_len;
/* The CFE console requires CR-LF line-ends.
* Add a CR, if we only terminate lines with a LF.
* This does only fix CR-LF at the end of the string.
* So for multiple lines, use multiple cfe_vprintk calls.
*/
if (len > 1 &&
buffer[len - 1] == '\n' && buffer[len - 2] != '\r') {
buffer[len - 1] = '\r';
buffer[len] = '\n';
len += 1;
}
cnt = len;
pos = 0;
while (cnt > 0) {
res = cfe_write(handle, buffer + pos, len - pos);
if (CFE_ISERR(res)) {
len = -EIO;
goto out;
}
cnt -= res;
pos += res;
}
out:
spin_unlock_irqrestore(&lock, flags);
return len;
}
int cfe_printk(const char *fmt, ...)
{
va_list args;
int res;
va_start(args, fmt);
res = cfe_vprintk(fmt, args);
va_end(args);
return res;
}
static int cfe_iocb_dispatch(struct cfe_iocb *iocb)
{
if (!cfe_present())
return CFE_ERR_UNSUPPORTED;
return cfe_trampoline((long)cfe_handle, (long)iocb);
}
int cfe_present(void)
{
return (cfe_trampoline != NULL);
}
int cfe_close(int handle)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_DEV_CLOSE;
iocb.handle = handle;
err = cfe_iocb_dispatch(&iocb);
return (CFE_ISERR(err)) ? err : iocb.status;
}
int cfe_cpu_start(int cpu, void (*fn)(void), long sp, long gp, long a1)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_FW_CPUCTL;
iocb.psize = sizeof(struct cfe_iocb_cpuctl);
iocb.cpuctl.number = cpu;
iocb.cpuctl.command = CFE_CPU_CMD_START;
iocb.cpuctl.gp = gp;
iocb.cpuctl.sp = sp;
iocb.cpuctl.a1 = a1;
iocb.cpuctl.start_addr = (long)fn;
err = cfe_iocb_dispatch(&iocb);
return (CFE_ISERR(err)) ? err : iocb.status;
}
int cfe_cpu_stop(int cpu)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_FW_CPUCTL;
iocb.psize = sizeof(struct cfe_iocb_cpuctl);
iocb.cpuctl.number = cpu;
iocb.cpuctl.command = CFE_CPU_CMD_STOP;
err = cfe_iocb_dispatch(&iocb);
return (CFE_ISERR(err)) ? err : iocb.status;
}
int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_ENV_ENUM;
iocb.psize = sizeof(struct cfe_iocb_envbuf);
iocb.envbuf.index = idx;
iocb.envbuf.name = PTR_TO_CFE(name);
iocb.envbuf.name_len = namelen;
iocb.envbuf.val = PTR_TO_CFE(val);
iocb.envbuf.val_len = vallen;
err = cfe_iocb_dispatch(&iocb);
return (CFE_ISERR(err)) ? err : iocb.status;
}
int cfe_enumdev(int idx, char *name, int namelen)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_DEV_ENUM;
iocb.psize = sizeof(struct cfe_iocb_envbuf);
iocb.envbuf.index = idx;
iocb.envbuf.name = PTR_TO_CFE(name);
iocb.envbuf.name_len = namelen;
err = cfe_iocb_dispatch(&iocb);
return (CFE_ISERR(err)) ? err : iocb.status;
}
int cfe_enummem(int idx, int flags, u64 *start, u64 *length,
u64 *type)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_FW_MEMENUM;
iocb.flags = flags;
iocb.psize = sizeof(struct cfe_iocb_meminfo);
iocb.meminfo.index = idx;
err = cfe_iocb_dispatch(&iocb);
if (CFE_ISERR(err))
return err;
if (!CFE_ISERR(iocb.status)) {
*start = iocb.meminfo.addr;
*length = iocb.meminfo.size;
*type = iocb.meminfo.type;
}
return iocb.status;
}
int cfe_exit(int warm, int status)
{
struct cfe_iocb iocb;
int err;
printk("CFE REBOOT\n");
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_FW_RESTART;
if (warm)
iocb.flags = CFE_FLG_WARMSTART;
iocb.psize = sizeof(struct cfe_iocb_exitstat);
iocb.exitstat.status = status;
printk("CALL\n");
err = cfe_iocb_dispatch(&iocb);
printk("DONE\n");
return (CFE_ISERR(err)) ? err : iocb.status;
}
int cfe_flushcache(int flags)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_FW_FLUSHCACHE;
iocb.flags = flags;
err = cfe_iocb_dispatch(&iocb);
return (CFE_ISERR(err)) ? err : iocb.status;
}
int cfe_getdevinfo(char *name)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_DEV_GETINFO;
iocb.psize = sizeof(struct cfe_iocb_buf);
iocb.buffer.ptr = PTR_TO_CFE(name);
iocb.buffer.length = strlen(name);
err = cfe_iocb_dispatch(&iocb);
if (CFE_ISERR(err))
return err;
if (CFE_ISERR(iocb.status))
return iocb.status;
return iocb.buffer.devflags;
}
int cfe_getenv(char *name, char *dest, int destlen)
{
struct cfe_iocb iocb;
int err;
dest[0] = '\0';
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_ENV_GET;
iocb.psize = sizeof(struct cfe_iocb_envbuf);
iocb.envbuf.name = PTR_TO_CFE(name);
iocb.envbuf.name_len = strlen(name);
iocb.envbuf.val = PTR_TO_CFE(dest);
iocb.envbuf.val_len = destlen;
err = cfe_iocb_dispatch(&iocb);
return (CFE_ISERR(err)) ? err : iocb.status;
}
int cfe_getfwinfo(struct cfe_fwinfo *info)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_FW_GETINFO;
iocb.psize = sizeof(struct cfe_iocb_fwinfo);
err = cfe_iocb_dispatch(&iocb);
if (CFE_ISERR(err))
return err;
if (CFE_ISERR(iocb.status))
return err;
info->version = iocb.fwinfo.version;
info->totalmem = iocb.fwinfo.totalmem;
info->flags = iocb.fwinfo.flags;
info->boardid = iocb.fwinfo.boardid;
info->bootarea_va = iocb.fwinfo.bootarea_va;
info->bootarea_pa = iocb.fwinfo.bootarea_pa;
info->bootarea_size = iocb.fwinfo.bootarea_size;
return iocb.status;
}
int cfe_getstdhandle(int handletype)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_DEV_GETHANDLE;
iocb.flags = handletype;
err = cfe_iocb_dispatch(&iocb);
if (CFE_ISERR(err))
return err;
if (CFE_ISERR(iocb.status))
return iocb.status;
return iocb.handle;
}
int cfe_getticks(s64 *ticks)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_FW_GETTIME;
iocb.psize = sizeof(struct cfe_iocb_time);
err = cfe_iocb_dispatch(&iocb);
if (CFE_ISERR(err))
return err;
if (!CFE_ISERR(iocb.status))
*ticks = iocb.time.ticks;
return iocb.status;
}
int cfe_inpstat(int handle)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_DEV_INPSTAT;
iocb.handle = handle;
iocb.psize = sizeof(struct cfe_iocb_inpstat);
err = cfe_iocb_dispatch(&iocb);
if (CFE_ISERR(err))
return err;
if (CFE_ISERR(iocb.status))
return iocb.status;
return iocb.inpstat.status;
}
int cfe_ioctl(int handle, unsigned int ioctlnum,
unsigned char *buffer, int length,
int *retlen, u64 offset)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_DEV_IOCTL;
iocb.handle = handle;
iocb.psize = sizeof(struct cfe_iocb_buf);
iocb.buffer.offset = offset;
iocb.buffer.ioctlcmd = ioctlnum;
iocb.buffer.ptr = PTR_TO_CFE(buffer);
iocb.buffer.length = length;
err = cfe_iocb_dispatch(&iocb);
if (CFE_ISERR(err))
return err;
if (CFE_ISERR(iocb.status))
return iocb.status;
if (retlen)
*retlen = iocb.buffer.retlen;
return iocb.status;
}
int cfe_open(char *name)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_DEV_OPEN;
iocb.psize = sizeof(struct cfe_iocb_buf);
iocb.buffer.ptr = PTR_TO_CFE(name);
iocb.buffer.length = strlen(name);
err = cfe_iocb_dispatch(&iocb);
if (CFE_ISERR(err))
return err;
if (CFE_ISERR(iocb.status))
return iocb.status;
return iocb.handle;
}
int cfe_read(int handle, unsigned char *buffer, int length)
{
return cfe_readblk(handle, 0, buffer, length);
}
int cfe_readblk(int handle, s64 offset, unsigned char *buffer, int length)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_DEV_READ;
iocb.handle = handle;
iocb.psize = sizeof(struct cfe_iocb_buf);
iocb.buffer.offset = offset;
iocb.buffer.ptr = PTR_TO_CFE(buffer);
iocb.buffer.length = length;
err = cfe_iocb_dispatch(&iocb);
if (CFE_ISERR(err))
return err;
if (CFE_ISERR(iocb.status))
return iocb.status;
return iocb.buffer.retlen;
}
int cfe_setenv(char *name, char *val)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_ENV_SET;
iocb.psize = sizeof(struct cfe_iocb_envbuf);
iocb.envbuf.name = PTR_TO_CFE(name);
iocb.envbuf.name_len = strlen(name);
iocb.envbuf.val = PTR_TO_CFE(val);
iocb.envbuf.val_len = strlen(val);
err = cfe_iocb_dispatch(&iocb);
return (CFE_ISERR(err)) ? err : iocb.status;
}
int cfe_write(int handle, unsigned char *buffer, int length)
{
return cfe_writeblk(handle, 0, buffer, length);
}
int cfe_writeblk(int handle, s64 offset, unsigned char *buffer, int length)
{
struct cfe_iocb iocb;
int err;
memset(&iocb, 0, sizeof(iocb));
iocb.fcode = CFE_CMD_DEV_WRITE;
iocb.handle = handle;
iocb.psize = sizeof(struct cfe_iocb_buf);
iocb.buffer.offset = offset;
iocb.buffer.ptr = PTR_TO_CFE(buffer);
iocb.buffer.length = length;
err = cfe_iocb_dispatch(&iocb);
if (CFE_ISERR(err))
return err;
if (CFE_ISERR(iocb.status))
return iocb.status;
return iocb.buffer.retlen;
}

176
target/linux/brcm47xx/files/arch/mips/cfe/cfe_private.h Normal file
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@@ -0,0 +1,176 @@
/*
* Broadcom Common Firmware Environment (CFE) support
*
* Copyright 2000, 2001, 2002
* Broadcom Corporation. All rights reserved.
*
* Copyright (C) 2006 Michael Buesch
*
* Original Authors: Mitch Lichtenberg, Chris Demetriou
*
* This software is furnished under license and may be used and copied only
* in accordance with the following terms and conditions. Subject to these
* conditions, you may download, copy, install, use, modify and distribute
* modified or unmodified copies of this software in source and/or binary
* form. No title or ownership is transferred hereby.
*
* 1) Any source code used, modified or distributed must reproduce and
* retain this copyright notice and list of conditions as they appear in
* the source file.
*
* 2) No right is granted to use any trade name, trademark, or logo of
* Broadcom Corporation. The "Broadcom Corporation" name may not be
* used to endorse or promote products derived from this software
* without the prior written permission of Broadcom Corporation.
*
* 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
* NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
* FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
* LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LINUX_CFE_PRIVATE_H_
#define LINUX_CFE_PRIVATE_H_
#ifndef __ASSEMBLY__
/* Seal indicating CFE's presence, passed to the kernel. */
#define CFE_EPTSEAL 0x43464531
#define CFE_CMD_FW_GETINFO 0
#define CFE_CMD_FW_RESTART 1
#define CFE_CMD_FW_BOOT 2
#define CFE_CMD_FW_CPUCTL 3
#define CFE_CMD_FW_GETTIME 4
#define CFE_CMD_FW_MEMENUM 5
#define CFE_CMD_FW_FLUSHCACHE 6
#define CFE_CMD_DEV_GETHANDLE 9
#define CFE_CMD_DEV_ENUM 10
#define CFE_CMD_DEV_OPEN 11
#define CFE_CMD_DEV_INPSTAT 12
#define CFE_CMD_DEV_READ 13
#define CFE_CMD_DEV_WRITE 14
#define CFE_CMD_DEV_IOCTL 15
#define CFE_CMD_DEV_CLOSE 16
#define CFE_CMD_DEV_GETINFO 17
#define CFE_CMD_ENV_ENUM 20
#define CFE_CMD_ENV_GET 22
#define CFE_CMD_ENV_SET 23
#define CFE_CMD_ENV_DEL 24
#define CFE_CMD_MAX 32
#define CFE_CMD_VENDOR_USE 0x8000 /* codes above this are for customer use */
typedef u64 cfe_uint_t;
typedef s64 cfe_int_t;
typedef s64 cfe_ptr_t;
/* Cast a pointer from native to CFE-API pointer and back */
#define CFE_TO_PTR(p) ((void *)(unsigned long)(p))
#define PTR_TO_CFE(p) ((cfe_ptr_t)(unsigned long)(p))
struct cfe_iocb_buf {
cfe_uint_t offset; /* offset on device (bytes) */
cfe_ptr_t ptr; /* pointer to a buffer */
cfe_uint_t length; /* length of this buffer */
cfe_uint_t retlen; /* returned length (for read ops) */
union {
cfe_uint_t ioctlcmd; /* IOCTL command (used only for IOCTLs) */
cfe_uint_t devflags; /* Returned device info flags */
};
};
struct cfe_iocb_inpstat {
cfe_uint_t status; /* 1 means input available */
};
struct cfe_iocb_envbuf {
cfe_int_t index; /* 0-based enumeration index */
cfe_ptr_t name; /* name string buffer */
cfe_int_t name_len; /* size of name buffer */
cfe_ptr_t val; /* value string buffer */
cfe_int_t val_len; /* size of value string buffer */
};
struct cfe_iocb_cpuctl {
cfe_uint_t number; /* cpu number to control */
cfe_uint_t command; /* command to issue to CPU */
cfe_uint_t start_addr; /* CPU start address */
cfe_uint_t gp; /* starting GP value */
cfe_uint_t sp; /* starting SP value */
cfe_uint_t a1; /* starting A1 value */
};
struct cfe_iocb_time {
cfe_int_t ticks; /* current time in ticks */
};
struct cfe_iocb_exitstat {
cfe_int_t status;
};
struct cfe_iocb_meminfo {
cfe_int_t index; /* 0-based enumeration index */
cfe_int_t type; /* type of memory block */
cfe_uint_t addr; /* physical start address */
cfe_uint_t size; /* block size */
};
struct cfe_iocb_fwinfo {
cfe_int_t version; /* major, minor, eco version */
cfe_int_t totalmem; /* total installed mem */
cfe_int_t flags; /* various flags */
cfe_int_t boardid; /* board ID */
cfe_int_t bootarea_va; /* VA of boot area */
cfe_int_t bootarea_pa; /* PA of boot area */
cfe_int_t bootarea_size; /* size of boot area */
cfe_int_t reserved1;
cfe_int_t reserved2;
cfe_int_t reserved3;
};
/* CFE I/O Control Block */
struct cfe_iocb {
cfe_uint_t fcode; /* IOCB function code */
cfe_int_t status; /* return status */
cfe_int_t handle; /* file/device handle */
cfe_uint_t flags; /* flags for this IOCB */
cfe_uint_t psize; /* size of parameter list */
union {
struct cfe_iocb_buf buffer; /* buffer parameters */
struct cfe_iocb_inpstat inpstat; /* input status parameters */
struct cfe_iocb_envbuf envbuf; /* environment function parameters */
struct cfe_iocb_cpuctl cpuctl; /* CPU control parameters */
struct cfe_iocb_time time; /* timer parameters */
struct cfe_iocb_meminfo meminfo; /* memory arena info parameters */
struct cfe_iocb_fwinfo fwinfo; /* firmware information */
struct cfe_iocb_exitstat exitstat; /* Exit Status */
};
};
#include <linux/init.h>
void __init cfe_setup(unsigned long fwarg0, unsigned long fwarg1,
unsigned long fwarg2, unsigned long fwarg3);
#else /* __ASSEMBLY__ */
.macro cfe_early_init
#ifdef CONFIG_CFE
jal cfe_setup
#endif
.endm
#endif /* __ASSEMBLY__ */
#endif /* LINUX_CFE_PRIVATE_H_ */

439
target/linux/brcm47xx/files/drivers/mtd/maps/bcm47xx-flash.c Normal file
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@@ -0,0 +1,439 @@
/*
* Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
* Copyright (C) 2005 Waldemar Brodkorb <wbx@openwrt.org>
* Copyright (C) 2004 Florian Schirmer (jolt@tuxbox.org)
*
* original functions for finding root filesystem from Mike Baker
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
* You should have received a copy of the GNU General Public License along
* with this program; if not, write to the Free Software Foundation, Inc.,
* 675 Mass Ave, Cambridge, MA 02139, USA.
*
* Copyright 2001-2003, Broadcom Corporation
* All Rights Reserved.
*
* THIS SOFTWARE IS OFFERED "AS IS", AND BROADCOM GRANTS NO WARRANTIES OF ANY
* KIND, EXPRESS OR IMPLIED, BY STATUTE, COMMUNICATION OR OTHERWISE. BROADCOM
* SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS
* FOR A SPECIFIC PURPOSE OR NONINFRINGEMENT CONCERNING THIS SOFTWARE.
*
* Flash mapping for BCM947XX boards
*/
#include <linux/init.h>
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/sched.h>
#include <linux/wait.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#ifdef CONFIG_MTD_PARTITIONS
#include <linux/mtd/partitions.h>
#endif
#include <linux/crc32.h>
#ifdef CONFIG_SSB
#include <linux/ssb/ssb.h>
#endif
#include <asm/io.h>
#define TRX_MAGIC 0x30524448 /* "HDR0" */
#define TRX_VERSION 1
#define TRX_MAX_LEN 0x3A0000
#define TRX_NO_HEADER 1 /* Do not write TRX header */
#define TRX_GZ_FILES 0x2 /* Contains up to TRX_MAX_OFFSET individual gzip files */
#define TRX_MAX_OFFSET 3
struct trx_header {
u32 magic; /* "HDR0" */
u32 len; /* Length of file including header */
u32 crc32; /* 32-bit CRC from flag_version to end of file */
u32 flag_version; /* 0:15 flags, 16:31 version */
u32 offsets[TRX_MAX_OFFSET]; /* Offsets of partitions from start of header */
};
#define ROUNDUP(x, y) ((((x)+((y)-1))/(y))*(y))
#define NVRAM_SPACE 0x8000
#define WINDOW_ADDR 0x1fc00000
#define WINDOW_SIZE 0x400000
#define BUSWIDTH 2
#ifdef CONFIG_SSB
extern struct ssb_bus ssb;
#endif
static struct mtd_info *bcm947xx_mtd;
static void bcm947xx_map_copy_from(struct map_info *map, void *to, unsigned long from, ssize_t len)
{
if (len==1) {
memcpy_fromio(to, map->virt + from, len);
} else {
int i;
u16 *dest = (u16 *) to;
u16 *src = (u16 *) (map->virt + from);
for (i = 0; i < (len / 2); i++) {
dest[i] = src[i];
}
if (len & 1)
*((u8 *)dest+len-1) = src[i] & 0xff;
}
}
static struct map_info bcm947xx_map = {
name: "Physically mapped flash",
size: WINDOW_SIZE,
bankwidth: BUSWIDTH,
phys: WINDOW_ADDR,
};
#ifdef CONFIG_MTD_PARTITIONS
static struct mtd_partition bcm947xx_parts[] = {
{ name: "cfe", offset: 0, size: 0, mask_flags: MTD_WRITEABLE, },
{ name: "linux", offset: 0, size: 0, },
{ name: "rootfs", offset: 0, size: 0, },
{ name: "nvram", offset: 0, size: 0, },
{ name: NULL, },
};
static int __init
find_cfe_size(struct mtd_info *mtd, size_t size)
{
struct trx_header *trx;
unsigned char buf[512];
int off;
size_t len;
int blocksize;
trx = (struct trx_header *) buf;
blocksize = mtd->erasesize;
if (blocksize < 0x10000)
blocksize = 0x10000;
for (off = (128*1024); off < size; off += blocksize) {
memset(buf, 0xe5, sizeof(buf));
/*
* Read into buffer
*/
if (mtd->read(mtd, off, sizeof(buf), &len, buf) ||
len != sizeof(buf))
continue;
/* found a TRX header */
if (le32_to_cpu(trx->magic) == TRX_MAGIC) {
goto found;
}
}
printk(KERN_NOTICE
"%s: Couldn't find bootloader size\n",
mtd->name);
return -1;
found:
printk(KERN_NOTICE "bootloader size: %d\n", off);
return off;
}
/*
* Copied from mtdblock.c
*
* Cache stuff...
*
* Since typical flash erasable sectors are much larger than what Linux's
* buffer cache can handle, we must implement read-modify-write on flash
* sectors for each block write requests. To avoid over-erasing flash sectors
* and to speed things up, we locally cache a whole flash sector while it is
* being written to until a different sector is required.
*/
static void erase_callback(struct erase_info *done)
{
wait_queue_head_t *wait_q = (wait_queue_head_t *)done->priv;
wake_up(wait_q);
}
static int erase_write (struct mtd_info *mtd, unsigned long pos,
int len, const char *buf)
{
struct erase_info erase;
DECLARE_WAITQUEUE(wait, current);
wait_queue_head_t wait_q;
size_t retlen;
int ret;
/*
* First, let's erase the flash block.
*/
init_waitqueue_head(&wait_q);
erase.mtd = mtd;
erase.callback = erase_callback;
erase.addr = pos;
erase.len = len;
erase.priv = (u_long)&wait_q;
set_current_state(TASK_INTERRUPTIBLE);
add_wait_queue(&wait_q, &wait);
ret = mtd->erase(mtd, &erase);
if (ret) {
set_current_state(TASK_RUNNING);
remove_wait_queue(&wait_q, &wait);
printk (KERN_WARNING "erase of region [0x%lx, 0x%x] "
"on \"%s\" failed\n",
pos, len, mtd->name);
return ret;
}
schedule(); /* Wait for erase to finish. */
remove_wait_queue(&wait_q, &wait);
/*
* Next, writhe data to flash.
*/
ret = mtd->write (mtd, pos, len, &retlen, buf);
if (ret)
return ret;
if (retlen != len)
return -EIO;
return 0;
}
static int __init
find_root(struct mtd_info *mtd, size_t size, struct mtd_partition *part)
{
struct trx_header trx, *trx2;
unsigned char buf[512], *block;
int off, blocksize;
u32 i, crc = ~0;
size_t len;
struct squashfs_super_block *sb = (struct squashfs_super_block *) buf;
blocksize = mtd->erasesize;
if (blocksize < 0x10000)
blocksize = 0x10000;
for (off = (128*1024); off < size; off += blocksize) {
memset(&trx, 0xe5, sizeof(trx));
/*
* Read into buffer
*/
if (mtd->read(mtd, off, sizeof(trx), &len, (char *) &trx) ||
len != sizeof(trx))
continue;
/* found a TRX header */
if (le32_to_cpu(trx.magic) == TRX_MAGIC) {
part->offset = le32_to_cpu(trx.offsets[2]) ? :
le32_to_cpu(trx.offsets[1]);
part->size = le32_to_cpu(trx.len);
part->size -= part->offset;
part->offset += off;
goto found;
}
}
printk(KERN_NOTICE
"%s: Couldn't find root filesystem\n",
mtd->name);
return -1;
found:
if (part->size == 0)
return 0;
if (mtd->read(mtd, part->offset, sizeof(buf), &len, buf) || len != sizeof(buf))
return 0;
/* Move the fs outside of the trx */
part->size = 0;
if (trx.len != part->offset + part->size - off) {
/* Update the trx offsets and length */
trx.len = part->offset + part->size - off;
/* Update the trx crc32 */
for (i = (u32) &(((struct trx_header *)NULL)->flag_version); i <= trx.len; i += sizeof(buf)) {
if (mtd->read(mtd, off + i, sizeof(buf), &len, buf) || len != sizeof(buf))
return 0;
crc = crc32_le(crc, buf, min(sizeof(buf), trx.len - i));
}
trx.crc32 = crc;
/* read first eraseblock from the trx */
block = kmalloc(mtd->erasesize, GFP_KERNEL);
trx2 = (struct trx_header *) block;
if (mtd->read(mtd, off, mtd->erasesize, &len, block) || len != mtd->erasesize) {
printk("Error accessing the first trx eraseblock\n");
return 0;
}
printk("Updating TRX offsets and length:\n");
printk("old trx = [0x%08x, 0x%08x, 0x%08x], len=0x%08x crc32=0x%08x\n", trx2->offsets[0], trx2->offsets[1], trx2->offsets[2], trx2->len, trx2->crc32);
printk("new trx = [0x%08x, 0x%08x, 0x%08x], len=0x%08x crc32=0x%08x\n", trx.offsets[0], trx.offsets[1], trx.offsets[2], trx.len, trx.crc32);
/* Write updated trx header to the flash */
memcpy(block, &trx, sizeof(trx));
if (mtd->unlock)
mtd->unlock(mtd, off, mtd->erasesize);
erase_write(mtd, off, mtd->erasesize, block);
if (mtd->sync)
mtd->sync(mtd);
kfree(block);
printk("Done\n");
}
return part->size;
}
struct mtd_partition * __init
init_mtd_partitions(struct mtd_info *mtd, size_t size)
{
int cfe_size;
if ((cfe_size = find_cfe_size(mtd,size)) < 0)
return NULL;
/* boot loader */
bcm947xx_parts[0].offset = 0;
bcm947xx_parts[0].size = cfe_size;
/* nvram */
if (cfe_size != 384 * 1024) {
bcm947xx_parts[3].offset = size - ROUNDUP(NVRAM_SPACE, mtd->erasesize);
bcm947xx_parts[3].size = ROUNDUP(NVRAM_SPACE, mtd->erasesize);
} else {
/* nvram (old 128kb config partition on netgear wgt634u) */
bcm947xx_parts[3].offset = bcm947xx_parts[0].size;
bcm947xx_parts[3].size = ROUNDUP(NVRAM_SPACE, mtd->erasesize);
}
/* linux (kernel and rootfs) */
if (cfe_size != 384 * 1024) {
bcm947xx_parts[1].offset = bcm947xx_parts[0].size;
bcm947xx_parts[1].size = bcm947xx_parts[3].offset -
bcm947xx_parts[1].offset;
} else {
/* do not count the elf loader, which is on one block */
bcm947xx_parts[1].offset = bcm947xx_parts[0].size +
bcm947xx_parts[3].size + mtd->erasesize;
bcm947xx_parts[1].size = size -
bcm947xx_parts[0].size -
(2*bcm947xx_parts[3].size) -
mtd->erasesize;
}
/* find and size rootfs */
find_root(mtd,size,&bcm947xx_parts[2]);
bcm947xx_parts[2].size = size - bcm947xx_parts[2].offset - bcm947xx_parts[3].size;
return bcm947xx_parts;
}
#endif
int __init init_bcm947xx_map(void)
{
#ifdef CONFIG_SSB
struct ssb_mipscore *mcore = &ssb.mipscore;
#endif
size_t size;
int ret = 0;
#ifdef CONFIG_MTD_PARTITIONS
struct mtd_partition *parts;
int i;
#endif
#ifdef CONFIG_SSB
u32 window = mcore->flash_window;
u32 window_size = mcore->flash_window_size;
printk("flash init: 0x%08x 0x%08x\n", window, window_size);
bcm947xx_map.phys = window;
bcm947xx_map.size = window_size;
bcm947xx_map.virt = ioremap_nocache(window, window_size);
#else
printk("flash init: 0x%08x 0x%08x\n", WINDOW_ADDR, WINDOW_SIZE);
bcm947xx_map.virt = ioremap_nocache(WINDOW_ADDR, WINDOW_SIZE);
#endif
if (!bcm947xx_map.virt) {
printk("Failed to ioremap\n");
return -EIO;
}
simple_map_init(&bcm947xx_map);
if (!(bcm947xx_mtd = do_map_probe("cfi_probe", &bcm947xx_map))) {
printk("Failed to do_map_probe\n");
iounmap((void *)bcm947xx_map.virt);
return -ENXIO;
}
/* override copy_from routine */
bcm947xx_map.copy_from = bcm947xx_map_copy_from;
bcm947xx_mtd->owner = THIS_MODULE;
size = bcm947xx_mtd->size;
printk(KERN_NOTICE "Flash device: 0x%x at 0x%x\n", size, WINDOW_ADDR);
#ifdef CONFIG_MTD_PARTITIONS
parts = init_mtd_partitions(bcm947xx_mtd, size);
for (i = 0; parts[i].name; i++);
ret = add_mtd_partitions(bcm947xx_mtd, parts, i);
if (ret) {
printk(KERN_ERR "Flash: add_mtd_partitions failed\n");
goto fail;
}
#endif
return 0;
fail:
if (bcm947xx_mtd)
map_destroy(bcm947xx_mtd);
if (bcm947xx_map.virt)
iounmap((void *)bcm947xx_map.virt);
bcm947xx_map.virt = 0;
return ret;
}
void __exit cleanup_bcm947xx_map(void)
{
#ifdef CONFIG_MTD_PARTITIONS
del_mtd_partitions(bcm947xx_mtd);
#endif
map_destroy(bcm947xx_mtd);
iounmap((void *)bcm947xx_map.virt);
}
module_init(init_bcm947xx_map);
module_exit(cleanup_bcm947xx_map);

0
target/linux/brcm47xx/files/include/asm-generic/gpio.h Normal file
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189
target/linux/brcm47xx/files/include/asm-mips/cfe.h Normal file
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@@ -0,0 +1,189 @@
/*
* Broadcom Common Firmware Environment (CFE) support
*
* Copyright 2000, 2001, 2002
* Broadcom Corporation. All rights reserved.
*
* Copyright (C) 2006 Michael Buesch
*
* Original Authors: Mitch Lichtenberg, Chris Demetriou
*
* This software is furnished under license and may be used and copied only
* in accordance with the following terms and conditions. Subject to these
* conditions, you may download, copy, install, use, modify and distribute
* modified or unmodified copies of this software in source and/or binary
* form. No title or ownership is transferred hereby.
*
* 1) Any source code used, modified or distributed must reproduce and
* retain this copyright notice and list of conditions as they appear in
* the source file.
*
* 2) No right is granted to use any trade name, trademark, or logo of
* Broadcom Corporation. The "Broadcom Corporation" name may not be
* used to endorse or promote products derived from this software
* without the prior written permission of Broadcom Corporation.
*
* 3) THIS SOFTWARE IS PROVIDED "AS-IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR
* NON-INFRINGEMENT ARE DISCLAIMED. IN NO EVENT SHALL BROADCOM BE LIABLE
* FOR ANY DAMAGES WHATSOEVER, AND IN PARTICULAR, BROADCOM SHALL NOT BE
* LIABLE FOR DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
* BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
* OR OTHERWISE), EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#ifndef LINUX_CFE_API_H_
#define LINUX_CFE_API_H_
#include <linux/types.h>
#define CFE_MI_RESERVED 0 /* memory is reserved, do not use */
#define CFE_MI_AVAILABLE 1 /* memory is available */
#define CFE_FLG_WARMSTART 0x00000001
#define CFE_FLG_FULL_ARENA 0x00000001
#define CFE_FLG_ENV_PERMANENT 0x00000001
#define CFE_CPU_CMD_START 1
#define CFE_CPU_CMD_STOP 0
#define CFE_STDHANDLE_CONSOLE 0
#define CFE_DEV_NETWORK 1
#define CFE_DEV_DISK 2
#define CFE_DEV_FLASH 3
#define CFE_DEV_SERIAL 4
#define CFE_DEV_CPU 5
#define CFE_DEV_NVRAM 6
#define CFE_DEV_CLOCK 7
#define CFE_DEV_OTHER 8
#define CFE_DEV_MASK 0x0F
#define CFE_CACHE_FLUSH_D 1
#define CFE_CACHE_INVAL_I 2
#define CFE_CACHE_INVAL_D 4
#define CFE_CACHE_INVAL_L2 8
#define CFE_FWI_64BIT 0x00000001
#define CFE_FWI_32BIT 0x00000002
#define CFE_FWI_RELOC 0x00000004
#define CFE_FWI_UNCACHED 0x00000008
#define CFE_FWI_MULTICPU 0x00000010
#define CFE_FWI_FUNCSIM 0x00000020
#define CFE_FWI_RTLSIM 0x00000040
struct cfe_fwinfo {
s64 version; /* major, minor, eco version */
s64 totalmem; /* total installed mem */
s64 flags; /* various flags */
s64 boardid; /* board ID */
s64 bootarea_va; /* VA of boot area */
s64 bootarea_pa; /* PA of boot area */
s64 bootarea_size; /* size of boot area */
};
/* The public CFE API */
int cfe_present(void); /* Check if we booted from CFE. Returns bool */
int cfe_getticks(s64 *ticks);
int cfe_close(int handle);
int cfe_cpu_start(int cpu, void (*fn)(void), long sp, long gp, long a1);
int cfe_cpu_stop(int cpu);
int cfe_enumenv(int idx, char *name, int namelen, char *val, int vallen);
int cfe_enumdev(int idx, char *name, int namelen);
int cfe_enummem(int idx, int flags, u64 *start, u64 *length,
u64 *type);
int cfe_exit(int warm, int status);
int cfe_flushcache(int flags);
int cfe_getdevinfo(char *name);
int cfe_getenv(char *name, char *dest, int destlen);
int cfe_getfwinfo(struct cfe_fwinfo *info);
int cfe_getstdhandle(int handletype);
int cfe_inpstat(int handle);
int cfe_ioctl(int handle, unsigned int ioctlnum, unsigned char *buffer,
int length, int *retlen, u64 offset);
int cfe_open(char *name);
int cfe_read(int handle, unsigned char *buffer, int length);
int cfe_readblk(int handle, s64 offset, unsigned char *buffer, int length);
int cfe_setenv(char *name, char *val);
int cfe_write(int handle, unsigned char *buffer, int length);
int cfe_writeblk(int handle, s64 offset, unsigned char *buffer,
int length);
/* High level API */
/* Print some information to CFE's console (most likely serial line) */
int cfe_printk(const char *fmt, ...) __attribute__((format(printf, 1, 2)));
int cfe_vprintk(const char *fmt, va_list args);
/* Error codes returned by the low API functions */
#define CFE_ISERR(errcode) (errcode < 0)
#define CFE_OK 0
#define CFE_ERR -1 /* generic error */
#define CFE_ERR_INV_COMMAND -2
#define CFE_ERR_EOF -3
#define CFE_ERR_IOERR -4
#define CFE_ERR_NOMEM -5
#define CFE_ERR_DEVNOTFOUND -6
#define CFE_ERR_DEVOPEN -7
#define CFE_ERR_INV_PARAM -8
#define CFE_ERR_ENVNOTFOUND -9
#define CFE_ERR_ENVREADONLY -10
#define CFE_ERR_NOTELF -11
#define CFE_ERR_NOT32BIT -12
#define CFE_ERR_WRONGENDIAN -13
#define CFE_ERR_BADELFVERS -14
#define CFE_ERR_NOTMIPS -15
#define CFE_ERR_BADELFFMT -16
#define CFE_ERR_BADADDR -17
#define CFE_ERR_FILENOTFOUND -18
#define CFE_ERR_UNSUPPORTED -19
#define CFE_ERR_HOSTUNKNOWN -20
#define CFE_ERR_TIMEOUT -21
#define CFE_ERR_PROTOCOLERR -22
#define CFE_ERR_NETDOWN -23
#define CFE_ERR_NONAMESERVER -24
#define CFE_ERR_NOHANDLES -25
#define CFE_ERR_ALREADYBOUND -26
#define CFE_ERR_CANNOTSET -27
#define CFE_ERR_NOMORE -28
#define CFE_ERR_BADFILESYS -29
#define CFE_ERR_FSNOTAVAIL -30
#define CFE_ERR_INVBOOTBLOCK -31
#define CFE_ERR_WRONGDEVTYPE -32
#define CFE_ERR_BBCHECKSUM -33
#define CFE_ERR_BOOTPROGCHKSUM -34
#define CFE_ERR_LDRNOTAVAIL -35
#define CFE_ERR_NOTREADY -36
#define CFE_ERR_GETMEM -37
#define CFE_ERR_SETMEM -38
#define CFE_ERR_NOTCONN -39
#define CFE_ERR_ADDRINUSE -40
#endif /* LINUX_CFE_API_H_ */

88
target/linux/brcm47xx/files/include/asm-mips/mach-bcm947xx/gpio.h Normal file
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@@ -0,0 +1,88 @@
#ifndef __BCM947XX_GPIO_H
#define __BCM947XX_GPIO_H
#include <linux/ssb/ssb.h>
#include <linux/ssb/ssb_driver_chipcommon.h>
#include <linux/ssb/ssb_driver_extif.h>
extern struct ssb_bus ssb;
static inline int gpio_request(unsigned gpio, const char *label)
{
return 0;
}
static inline void gpio_free(unsigned gpio)
{
}
static inline int gpio_direction_input(unsigned gpio)
{
if (ssb.chipco.dev)
ssb_chipco_gpio_outen(&ssb.chipco, 1 << gpio, 0);
else if (ssb.extif.dev)
ssb_extif_gpio_outen(&ssb.extif, 1 << gpio, 0);
else
return -EINVAL;
return 0;
}
static inline int gpio_direction_output(unsigned gpio)
{
if (ssb.chipco.dev)
ssb_chipco_gpio_outen(&ssb.chipco, 1 << gpio, 1 << gpio);
else if (ssb.extif.dev)
ssb_extif_gpio_outen(&ssb.extif, 1 << gpio, 1 << gpio);
else
return -EINVAL;
return 0;
}
static inline int gpio_to_irq(unsigned gpio)
{
struct ssb_device *dev;
dev = ssb.chipco.dev;
if (!dev)
dev = ssb.extif.dev;
if (!dev)
return -EINVAL;
return ssb_mips_irq(dev) + 2;
}
static inline int irq_to_gpio(unsigned gpio)
{
return -EINVAL;
}
static inline int gpio_get_value(unsigned gpio)
{
if (ssb.chipco.dev)
return ssb_chipco_gpio_in(&ssb.chipco, 1 << gpio) ? 1 : 0;
else if (ssb.extif.dev)
return ssb_extif_gpio_in(&ssb.extif, 1 << gpio) ? 1 : 0;
else
return 0;
}
static inline int gpio_set_value(unsigned gpio, int value)
{
if (ssb.chipco.dev)
ssb_chipco_gpio_out(&ssb.chipco, 1 << gpio, (value ? 1 << gpio : 0));
else if (ssb.extif.dev)
ssb_extif_gpio_out(&ssb.extif, 1 << gpio, (value ? 1 << gpio : 0));
return 0;
}
/* cansleep wrappers */
#include <asm-generic/gpio.h>
#endif /* __BCM947XX_GPIO_H */

26
target/linux/brcm47xx/files/include/asm-mips/mach-bcm947xx/kernel-entry-init.h Normal file
View File

@@ -0,0 +1,26 @@
/*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2005 Embedded Alley Solutions, Inc
* Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
* Copyright (C) 2006 Michael Buesch
*/
#ifndef __ASM_MACH_GENERIC_KERNEL_ENTRY_H
#define __ASM_MACH_GENERIC_KERNEL_ENTRY_H
/* Intentionally empty macro, used in head.S. Override in
* arch/mips/mach-xxx/kernel-entry-init.h when necessary.
*/
.macro kernel_entry_setup
.endm
/*
* Do SMP slave processor setup necessary before we can savely execute C code.
*/
.macro smp_slave_setup
.endm
#endif /* __ASM_MACH_GENERIC_KERNEL_ENTRY_H */

1
target/linux/brcm47xx/image Symbolic link
View File

@@ -0,0 +1 @@
../brcm-2.4/image

211
target/linux/brcm47xx/patches-2.6.22/100-board_support.patch Normal file
View File

@@ -0,0 +1,211 @@
Index: linux-2.6.22-rc4/arch/mips/Kconfig
===================================================================
--- linux-2.6.22-rc4.orig/arch/mips/Kconfig 2007-06-10 21:32:36.000000000 +0100
+++ linux-2.6.22-rc4/arch/mips/Kconfig 2007-06-10 21:33:12.000000000 +0100
@@ -4,6 +4,10 @@
# Horrible source of confusion. Die, die, die ...
select EMBEDDED
+config CFE
+ bool
+ # Common Firmware Environment
+
mainmenu "Linux/MIPS Kernel Configuration"
menu "Machine selection"
@@ -126,6 +130,23 @@
Members include the Acer PICA, MIPS Magnum 4000, MIPS Millenium and
Olivetti M700-10 workstations.
+config BCM947XX
+ bool "Support for BCM947xx based boards"
+ select DMA_NONCOHERENT
+ select HW_HAS_PCI
+ select IRQ_CPU
+ select SYS_HAS_CPU_MIPS32_R1
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_LITTLE_ENDIAN
+ select SSB
+ select SSB_SERIAL
+ select SSB_DRIVER_PCICORE
+ select SSB_PCICORE_HOSTMODE
+ select CFE
+ select GENERIC_GPIO
+ help
+ Support for BCM947xx based boards
+
config LASAT
bool "LASAT Networks platforms"
select DMA_NONCOHERENT
Index: linux-2.6.22-rc4/arch/mips/kernel/cpu-probe.c
===================================================================
--- linux-2.6.22-rc4.orig/arch/mips/kernel/cpu-probe.c 2007-06-10 21:32:13.000000000 +0100
+++ linux-2.6.22-rc4/arch/mips/kernel/cpu-probe.c 2007-06-10 21:33:12.000000000 +0100
@@ -711,6 +711,28 @@
}
+static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
+{
+ decode_config1(c);
+ switch (c->processor_id & 0xff00) {
+ case PRID_IMP_BCM3302:
+ c->cputype = CPU_BCM3302;
+ c->isa_level = MIPS_CPU_ISA_M32R1;
+ c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+ MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER;
+ break;
+ case PRID_IMP_BCM4710:
+ c->cputype = CPU_BCM4710;
+ c->isa_level = MIPS_CPU_ISA_M32R1;
+ c->options = MIPS_CPU_TLB | MIPS_CPU_4KEX |
+ MIPS_CPU_4K_CACHE | MIPS_CPU_COUNTER;
+ break;
+ default:
+ c->cputype = CPU_UNKNOWN;
+ break;
+ }
+}
+
__init void cpu_probe(void)
{
struct cpuinfo_mips *c = &current_cpu_data;
@@ -733,6 +755,9 @@
case PRID_COMP_SIBYTE:
cpu_probe_sibyte(c);
break;
+ case PRID_COMP_BROADCOM:
+ cpu_probe_broadcom(c);
+ break;
case PRID_COMP_SANDCRAFT:
cpu_probe_sandcraft(c);
break;
Index: linux-2.6.22-rc4/arch/mips/kernel/proc.c
===================================================================
--- linux-2.6.22-rc4.orig/arch/mips/kernel/proc.c 2007-06-10 21:32:13.000000000 +0100
+++ linux-2.6.22-rc4/arch/mips/kernel/proc.c 2007-06-10 21:33:12.000000000 +0100
@@ -83,6 +83,8 @@
[CPU_VR4181] = "NEC VR4181",
[CPU_VR4181A] = "NEC VR4181A",
[CPU_SR71000] = "Sandcraft SR71000",
+ [CPU_BCM3302] = "Broadcom BCM3302",
+ [CPU_BCM4710] = "Broadcom BCM4710",
[CPU_PR4450] = "Philips PR4450",
};
Index: linux-2.6.22-rc4/arch/mips/Makefile
===================================================================
--- linux-2.6.22-rc4.orig/arch/mips/Makefile 2007-06-10 21:32:56.000000000 +0100
+++ linux-2.6.22-rc4/arch/mips/Makefile 2007-06-10 21:33:12.000000000 +0100
@@ -560,6 +560,18 @@
load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
#
+# Broadcom BCM47XX boards
+#
+core-$(CONFIG_BCM947XX) += arch/mips/bcm947xx/
+cflags-$(CONFIG_BCM947XX) += -Iarch/mips/bcm947xx/include -Iinclude/asm-mips/mach-bcm947xx
+load-$(CONFIG_BCM947XX) := 0xffffffff80001000
+
+#
+# Common Firmware Environment
+#
+core-$(CONFIG_CFE) += arch/mips/cfe/
+
+#
# SNI RM
#
core-$(CONFIG_SNI_RM) += arch/mips/sni/
Index: linux-2.6.22-rc4/arch/mips/mm/tlbex.c
===================================================================
--- linux-2.6.22-rc4.orig/arch/mips/mm/tlbex.c 2007-06-10 21:32:35.000000000 +0100
+++ linux-2.6.22-rc4/arch/mips/mm/tlbex.c 2007-06-10 21:33:12.000000000 +0100
@@ -892,6 +892,8 @@
case CPU_4KSC:
case CPU_20KC:
case CPU_25KF:
+ case CPU_BCM3302:
+ case CPU_BCM4710:
tlbw(p);
break;
Index: linux-2.6.22-rc4/drivers/Kconfig
===================================================================
--- linux-2.6.22-rc4.orig/drivers/Kconfig 2007-06-10 21:32:13.000000000 +0100
+++ linux-2.6.22-rc4/drivers/Kconfig 2007-06-10 21:33:12.000000000 +0100
@@ -56,6 +56,8 @@
source "drivers/hwmon/Kconfig"
+source "drivers/ssb/Kconfig"
+
source "drivers/mfd/Kconfig"
source "drivers/media/Kconfig"
Index: linux-2.6.22-rc4/drivers/Makefile
===================================================================
--- linux-2.6.22-rc4.orig/drivers/Makefile 2007-06-10 21:32:14.000000000 +0100
+++ linux-2.6.22-rc4/drivers/Makefile 2007-06-10 21:33:12.000000000 +0100
@@ -81,3 +81,4 @@
obj-$(CONFIG_DMA_ENGINE) += dma/
obj-$(CONFIG_HID) += hid/
obj-$(CONFIG_PPC_PS3) += ps3/
+obj-$(CONFIG_SSB) += ssb/
Index: linux-2.6.22-rc4/include/asm-mips/bootinfo.h
===================================================================
--- linux-2.6.22-rc4.orig/include/asm-mips/bootinfo.h 2007-06-10 21:32:14.000000000 +0100
+++ linux-2.6.22-rc4/include/asm-mips/bootinfo.h 2007-06-10 21:33:12.000000000 +0100
@@ -213,6 +213,12 @@
#define MACH_GROUP_NEC_EMMA2RH 25 /* NEC EMMA2RH (was 23) */
#define MACH_NEC_MARKEINS 0 /* NEC EMMA2RH Mark-eins */
+/*
+ * Valid machtype for group Broadcom
+ */
+#define MACH_GROUP_BRCM 23 /* Broadcom */
+#define MACH_BCM47XX 1 /* Broadcom BCM47xx */
+
#define CL_SIZE COMMAND_LINE_SIZE
const char *get_system_type(void);
Index: linux-2.6.22-rc4/include/asm-mips/cpu.h
===================================================================
--- linux-2.6.22-rc4.orig/include/asm-mips/cpu.h 2007-06-10 21:32:14.000000000 +0100
+++ linux-2.6.22-rc4/include/asm-mips/cpu.h 2007-06-10 21:33:12.000000000 +0100
@@ -104,6 +104,13 @@
#define PRID_IMP_SR71000 0x0400
/*
+ * These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
+ */
+
+#define PRID_IMP_BCM4710 0x4000
+#define PRID_IMP_BCM3302 0x9000
+
+/*
* Definitions for 7:0 on legacy processors
*/
@@ -200,7 +207,9 @@
#define CPU_SB1A 62
#define CPU_74K 63
#define CPU_R14000 64
-#define CPU_LAST 64
+#define CPU_BCM3302 65
+#define CPU_BCM4710 66
+#define CPU_LAST 66
/*
* ISA Level encodings
Index: linux-2.6.22-rc4/include/linux/pci_ids.h
===================================================================
--- linux-2.6.22-rc4.orig/include/linux/pci_ids.h 2007-06-10 21:32:14.000000000 +0100
+++ linux-2.6.22-rc4/include/linux/pci_ids.h 2007-06-10 21:33:12.000000000 +0100
@@ -1991,6 +1991,7 @@
#define PCI_DEVICE_ID_TIGON3_5906M 0x1713
#define PCI_DEVICE_ID_BCM4401 0x4401
#define PCI_DEVICE_ID_BCM4401B0 0x4402
+#define PCI_DEVICE_ID_BCM4713 0x4713
#define PCI_VENDOR_ID_TOPIC 0x151f
#define PCI_DEVICE_ID_TOPIC_TP560 0x0000

29
target/linux/brcm47xx/patches-2.6.22/110-flash_map.patch Normal file
View File

@@ -0,0 +1,29 @@
Index: linux-2.6.22-rc4/drivers/mtd/maps/Kconfig
===================================================================
--- linux-2.6.22-rc4.orig/drivers/mtd/maps/Kconfig 2007-06-10 21:32:13.000000000 +0100
+++ linux-2.6.22-rc4/drivers/mtd/maps/Kconfig 2007-06-10 21:33:14.000000000 +0100
@@ -358,6 +358,12 @@
Mapping for the Flaga digital module. If you don't have one, ignore
this setting.
+config MTD_BCM47XX
+ tristate "BCM47xx flash device"
+ depends on MIPS && MTD_CFI && BCM947XX
+ help
+ Support for the flash chips on the BCM947xx board.
+
config MTD_WALNUT
tristate "Flash device mapped on IBM 405GP Walnut"
depends on MTD_JEDECPROBE && WALNUT
Index: linux-2.6.22-rc4/drivers/mtd/maps/Makefile
===================================================================
--- linux-2.6.22-rc4.orig/drivers/mtd/maps/Makefile 2007-06-10 21:32:13.000000000 +0100
+++ linux-2.6.22-rc4/drivers/mtd/maps/Makefile 2007-06-10 21:33:14.000000000 +0100
@@ -33,6 +33,7 @@
obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o
obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o
obj-$(CONFIG_MTD_TQM8XXL) += tqm8xxl.o
+obj-$(CONFIG_MTD_BCM47XX) += bcm47xx-flash.o
obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o
obj-$(CONFIG_MTD_IPAQ) += ipaq-flash.o
obj-$(CONFIG_MTD_SBC_GXX) += sbc_gxx.o

1547
target/linux/brcm47xx/patches-2.6.22/120-b44_ssb_support.patch Normal file
View File

File diff suppressed because it is too large Load Diff

95
target/linux/brcm47xx/patches-2.6.22/130-remove_scache.patch Normal file
View File

@@ -0,0 +1,95 @@
Index: linux-2.6.22-rc4/arch/mips/Kconfig
===================================================================
--- linux-2.6.22-rc4.orig/arch/mips/Kconfig 2007-06-10 21:33:12.000000000 +0100
+++ linux-2.6.22-rc4/arch/mips/Kconfig 2007-06-10 21:33:17.000000000 +0100
@@ -202,7 +202,6 @@
select I8259
select MIPS_BOARDS_GEN
select MIPS_BONITO64
- select MIPS_CPU_SCACHE
select PCI_GT64XXX_PCI0
select MIPS_MSC
select SWAP_IO_SPACE
@@ -1345,13 +1344,6 @@
bool
select BOARD_SCACHE
-#
-# Support for a MIPS32 / MIPS64 style S-caches
-#
-config MIPS_CPU_SCACHE
- bool
- select BOARD_SCACHE
-
config R5000_CPU_SCACHE
bool
select BOARD_SCACHE
Index: linux-2.6.22-rc4/arch/mips/kernel/cpu-probe.c
===================================================================
--- linux-2.6.22-rc4.orig/arch/mips/kernel/cpu-probe.c 2007-06-10 21:33:12.000000000 +0100
+++ linux-2.6.22-rc4/arch/mips/kernel/cpu-probe.c 2007-06-10 21:33:17.000000000 +0100
@@ -619,6 +619,8 @@
break;
case PRID_IMP_25KF:
c->cputype = CPU_25KF;
+ /* Probe for L2 cache */
+ c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;
break;
case PRID_IMP_34K:
c->cputype = CPU_34K;
Index: linux-2.6.22-rc4/arch/mips/mm/c-r4k.c
===================================================================
--- linux-2.6.22-rc4.orig/arch/mips/mm/c-r4k.c 2007-06-10 21:32:13.000000000 +0100
+++ linux-2.6.22-rc4/arch/mips/mm/c-r4k.c 2007-06-10 21:33:17.000000000 +0100
@@ -1038,7 +1038,6 @@
extern int r5k_sc_init(void);
extern int rm7k_sc_init(void);
-extern int mips_sc_init(void);
static void __init setup_scache(void)
{
@@ -1086,29 +1085,17 @@
return;
default:
- if (c->isa_level == MIPS_CPU_ISA_M32R1 ||
- c->isa_level == MIPS_CPU_ISA_M32R2 ||
- c->isa_level == MIPS_CPU_ISA_M64R1 ||
- c->isa_level == MIPS_CPU_ISA_M64R2) {
-#ifdef CONFIG_MIPS_CPU_SCACHE
- if (mips_sc_init ()) {
- scache_size = c->scache.ways * c->scache.sets * c->scache.linesz;
- printk("MIPS secondary cache %ldkB, %s, linesize %d bytes.\n",
- scache_size >> 10,
- way_string[c->scache.ways], c->scache.linesz);
- }
-#else
- if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
- panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
-#endif
- return;
- }
sc_present = 0;
}
if (!sc_present)
return;
+ if ((c->isa_level == MIPS_CPU_ISA_M32R1 ||
+ c->isa_level == MIPS_CPU_ISA_M64R1) &&
+ !(c->scache.flags & MIPS_CACHE_NOT_PRESENT))
+ panic("Dunno how to handle MIPS32 / MIPS64 second level cache");
+
/* compute a couple of other cache variables */
c->scache.waysize = scache_size / c->scache.ways;
Index: linux-2.6.22-rc4/arch/mips/mm/Makefile
===================================================================
--- linux-2.6.22-rc4.orig/arch/mips/mm/Makefile 2007-06-10 21:32:13.000000000 +0100
+++ linux-2.6.22-rc4/arch/mips/mm/Makefile 2007-06-10 21:33:17.000000000 +0100
@@ -30,4 +30,3 @@
obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o
obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o
obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o
-obj-$(CONFIG_MIPS_CPU_SCACHE) += sc-mips.o

643
target/linux/brcm47xx/patches-2.6.22/150-cpu_fixes.patch Normal file
View File

@@ -0,0 +1,643 @@
Index: linux-2.6.22/arch/mips/kernel/genex.S
===================================================================
--- linux-2.6.22.orig/arch/mips/kernel/genex.S 2007-07-26 06:29:25.057170943 +0200
+++ linux-2.6.22/arch/mips/kernel/genex.S 2007-07-26 06:29:40.890073208 +0200
@@ -51,6 +51,10 @@
NESTED(except_vec3_generic, 0, sp)
.set push
.set noat
+#ifdef CONFIG_BCM947XX
+ nop
+ nop
+#endif
#if R5432_CP0_INTERRUPT_WAR
mfc0 k0, CP0_INDEX
#endif
Index: linux-2.6.22/arch/mips/mm/c-r4k.c
===================================================================
--- linux-2.6.22.orig/arch/mips/mm/c-r4k.c 2007-07-26 06:29:40.826069560 +0200
+++ linux-2.6.22/arch/mips/mm/c-r4k.c 2007-07-26 06:32:45.956619550 +0200
@@ -29,6 +29,9 @@
#include <asm/cacheflush.h> /* for run_uncached() */
+/* For enabling BCM4710 cache workarounds */
+int bcm4710 = 0;
+
/*
* Special Variant of smp_call_function for use by cache functions:
*
@@ -85,14 +88,21 @@
static inline void r4k_blast_dcache_page_dc32(unsigned long addr)
{
+ unsigned long flags;
+
+ local_irq_save(flags);
R4600_HIT_CACHEOP_WAR_IMPL;
blast_dcache32_page(addr);
+ local_irq_restore(flags);
}
static void __init r4k_blast_dcache_page_setup(void)
{
unsigned long dc_lsize = cpu_dcache_line_size();
+ if (bcm4710)
+ r4k_blast_dcache_page = blast_dcache_page;
+ else
if (dc_lsize == 0)
r4k_blast_dcache_page = (void *)cache_noop;
else if (dc_lsize == 16)
@@ -107,6 +117,9 @@
{
unsigned long dc_lsize = cpu_dcache_line_size();
+ if (bcm4710)
+ r4k_blast_dcache_page_indexed = blast_dcache_page_indexed;
+ else
if (dc_lsize == 0)
r4k_blast_dcache_page_indexed = (void *)cache_noop;
else if (dc_lsize == 16)
@@ -121,6 +134,9 @@
{
unsigned long dc_lsize = cpu_dcache_line_size();
+ if (bcm4710)
+ r4k_blast_dcache = blast_dcache;
+ else
if (dc_lsize == 0)
r4k_blast_dcache = (void *)cache_noop;
else if (dc_lsize == 16)
@@ -202,8 +218,12 @@
static void (* r4k_blast_icache_page)(unsigned long addr);
+static void r4k_flush_cache_all(void);
static void __init r4k_blast_icache_page_setup(void)
{
+#ifdef CONFIG_BCM947XX
+ r4k_blast_icache_page = (void *)r4k_flush_cache_all;
+#else
unsigned long ic_lsize = cpu_icache_line_size();
if (ic_lsize == 0)
@@ -214,6 +234,7 @@
r4k_blast_icache_page = blast_icache32_page;
else if (ic_lsize == 64)
r4k_blast_icache_page = blast_icache64_page;
+#endif
}
@@ -221,6 +242,9 @@
static void __init r4k_blast_icache_page_indexed_setup(void)
{
+#ifdef CONFIG_BCM947XX
+ r4k_blast_icache_page_indexed = (void *)r4k_flush_cache_all;
+#else
unsigned long ic_lsize = cpu_icache_line_size();
if (ic_lsize == 0)
@@ -239,6 +263,7 @@
blast_icache32_page_indexed;
} else if (ic_lsize == 64)
r4k_blast_icache_page_indexed = blast_icache64_page_indexed;
+#endif
}
static void (* r4k_blast_icache)(void);
@@ -322,12 +347,17 @@
*/
static inline void local_r4k_flush_cache_all(void * args)
{
+ unsigned long flags;
+
+ local_irq_save(flags);
r4k_blast_dcache();
+ r4k_blast_icache();
+ local_irq_restore(flags);
}
static void r4k_flush_cache_all(void)
{
- if (!cpu_has_dc_aliases)
+ if (!cpu_has_dc_aliases && cpu_use_kmap_coherent)
return;
r4k_on_each_cpu(local_r4k_flush_cache_all, NULL, 1, 1);
@@ -335,6 +365,9 @@
static inline void local_r4k___flush_cache_all(void * args)
{
+ unsigned long flags;
+
+ local_irq_save(flags);
r4k_blast_dcache();
r4k_blast_icache();
@@ -348,6 +381,7 @@
case CPU_R14000:
r4k_blast_scache();
}
+ local_irq_restore(flags);
}
static void r4k___flush_cache_all(void)
@@ -358,17 +392,21 @@
static inline void local_r4k_flush_cache_range(void * args)
{
struct vm_area_struct *vma = args;
+ unsigned long flags;
if (!(cpu_context(smp_processor_id(), vma->vm_mm)))
return;
+ local_irq_save(flags);
r4k_blast_dcache();
+ r4k_blast_icache();
+ local_irq_restore(flags);
}
static void r4k_flush_cache_range(struct vm_area_struct *vma,
unsigned long start, unsigned long end)
{
- if (!cpu_has_dc_aliases)
+ if (!cpu_has_dc_aliases && cpu_use_kmap_coherent)
return;
r4k_on_each_cpu(local_r4k_flush_cache_range, vma, 1, 1);
@@ -377,6 +415,7 @@
static inline void local_r4k_flush_cache_mm(void * args)
{
struct mm_struct *mm = args;
+ unsigned long flags;
if (!cpu_context(smp_processor_id(), mm))
return;
@@ -395,12 +434,15 @@
return;
}
+ local_irq_save(flags);
r4k_blast_dcache();
+ r4k_blast_icache();
+ local_irq_restore(flags);
}
static void r4k_flush_cache_mm(struct mm_struct *mm)
{
- if (!cpu_has_dc_aliases)
+ if (!cpu_has_dc_aliases && cpu_use_kmap_coherent)
return;
r4k_on_each_cpu(local_r4k_flush_cache_mm, mm, 1, 1);
@@ -420,6 +462,7 @@
unsigned long paddr = fcp_args->pfn << PAGE_SHIFT;
int exec = vma->vm_flags & VM_EXEC;
struct mm_struct *mm = vma->vm_mm;
+ unsigned long flags;
pgd_t *pgdp;
pud_t *pudp;
pmd_t *pmdp;
@@ -451,8 +494,9 @@
* for every cache flush operation. So we do indexed flushes
* in that case, which doesn't overly flush the cache too much.
*/
+ local_irq_save(flags);
if ((mm == current->active_mm) && (pte_val(*ptep) & _PAGE_VALID)) {
- if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) {
+ if (!cpu_use_kmap_coherent || cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) {
r4k_blast_dcache_page(addr);
if (exec && !cpu_icache_snoops_remote_store)
r4k_blast_scache_page(addr);
@@ -460,14 +504,14 @@
if (exec)
r4k_blast_icache_page(addr);
- return;
+ goto done;
}
/*
* Do indexed flush, too much work to get the (possible) TLB refills
* to work correctly.
*/
- if (cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) {
+ if (!cpu_use_kmap_coherent || cpu_has_dc_aliases || (exec && !cpu_has_ic_fills_f_dc)) {
r4k_blast_dcache_page_indexed(cpu_has_pindexed_dcache ?
paddr : addr);
if (exec && !cpu_icache_snoops_remote_store) {
@@ -483,6 +527,8 @@
} else
r4k_blast_icache_page_indexed(addr);
}
+done:
+ local_irq_restore(flags);
}
static void r4k_flush_cache_page(struct vm_area_struct *vma,
@@ -499,7 +545,11 @@
static inline void local_r4k_flush_data_cache_page(void * addr)
{
+ unsigned long flags;
+
+ local_irq_save(flags);
r4k_blast_dcache_page((unsigned long) addr);
+ local_irq_restore(flags);
}
static void r4k_flush_data_cache_page(unsigned long addr)
@@ -542,6 +592,9 @@
static void r4k_flush_icache_range(unsigned long start, unsigned long end)
{
+#ifdef CONFIG_BCM947XX
+ r4k_flush_cache_all();
+#else
struct flush_icache_range_args args;
args.start = start;
@@ -549,12 +602,15 @@
r4k_on_each_cpu(local_r4k_flush_icache_range, &args, 1, 1);
instruction_hazard();
+#endif
}
#ifdef CONFIG_DMA_NONCOHERENT
static void r4k_dma_cache_wback_inv(unsigned long addr, unsigned long size)
{
+ unsigned long flags;
+
/* Catch bad driver code */
BUG_ON(size == 0);
@@ -571,18 +627,21 @@
* subset property so we have to flush the primary caches
* explicitly
*/
+ local_irq_save(flags);
if (size >= dcache_size) {
r4k_blast_dcache();
} else {
R4600_HIT_CACHEOP_WAR_IMPL;
blast_dcache_range(addr, addr + size);
}
-
bc_wback_inv(addr, size);
+ local_irq_restore(flags);
}
static void r4k_dma_cache_inv(unsigned long addr, unsigned long size)
{
+ unsigned long flags;
+
/* Catch bad driver code */
BUG_ON(size == 0);
@@ -594,6 +653,7 @@
return;
}
+ local_irq_save(flags);
if (size >= dcache_size) {
r4k_blast_dcache();
} else {
@@ -602,6 +662,7 @@
}
bc_inv(addr, size);
+ local_irq_restore(flags);
}
#endif /* CONFIG_DMA_NONCOHERENT */
@@ -616,8 +677,12 @@
unsigned long dc_lsize = cpu_dcache_line_size();
unsigned long sc_lsize = cpu_scache_line_size();
unsigned long addr = (unsigned long) arg;
+ unsigned long flags;
+ local_irq_save(flags);
R4600_HIT_CACHEOP_WAR_IMPL;
+ BCM4710_PROTECTED_FILL_TLB(addr);
+ BCM4710_PROTECTED_FILL_TLB(addr + 4);
if (dc_lsize)
protected_writeback_dcache_line(addr & ~(dc_lsize - 1));
if (!cpu_icache_snoops_remote_store && scache_size)
@@ -644,6 +709,7 @@
}
if (MIPS_CACHE_SYNC_WAR)
__asm__ __volatile__ ("sync");
+ local_irq_restore(flags);
}
static void r4k_flush_cache_sigtramp(unsigned long addr)
@@ -1144,6 +1210,17 @@
* silly idea of putting something else there ...
*/
switch (current_cpu_data.cputype) {
+ case CPU_BCM3302:
+ {
+ u32 cm;
+ cm = read_c0_diag();
+ /* Enable icache */
+ cm |= (1 << 31);
+ /* Enable dcache */
+ cm |= (1 << 30);
+ write_c0_diag(cm);
+ }
+ break;
case CPU_R4000PC:
case CPU_R4000SC:
case CPU_R4000MC:
@@ -1174,6 +1251,15 @@
/* Default cache error handler for R4000 and R5000 family */
set_uncached_handler (0x100, &except_vec2_generic, 0x80);
+ /* Check if special workarounds are required */
+#ifdef CONFIG_BCM947XX
+ if (current_cpu_data.cputype == CPU_BCM4710 && (current_cpu_data.processor_id & 0xff) == 0) {
+ printk("Enabling BCM4710A0 cache workarounds.\n");
+ bcm4710 = 1;
+ } else
+#endif
+ bcm4710 = 0;
+
probe_pcache();
setup_scache();
@@ -1219,5 +1305,13 @@
build_clear_page();
build_copy_page();
local_r4k___flush_cache_all(NULL);
+#ifdef CONFIG_BCM947XX
+ {
+ static void (*_coherency_setup)(void);
+ _coherency_setup = (void (*)(void)) KSEG1ADDR(coherency_setup);
+ _coherency_setup();
+ }
+#else
coherency_setup();
+#endif
}
Index: linux-2.6.22/arch/mips/mm/tlbex.c
===================================================================
--- linux-2.6.22.orig/arch/mips/mm/tlbex.c 2007-07-26 06:29:40.582055658 +0200
+++ linux-2.6.22/arch/mips/mm/tlbex.c 2007-07-26 06:32:45.964620005 +0200
@@ -1229,6 +1229,10 @@
#endif
}
+#ifdef CONFIG_BCM947XX
+extern int bcm4710;
+#endif
+
static void __init build_r4000_tlb_refill_handler(void)
{
u32 *p = tlb_handler;
@@ -1243,6 +1247,10 @@
memset(relocs, 0, sizeof(relocs));
memset(final_handler, 0, sizeof(final_handler));
+#ifdef CONFIG_BCM947XX
+ i_nop(&p);
+#endif
+
/*
* create the plain linear handler
*/
@@ -1736,6 +1744,9 @@
memset(labels, 0, sizeof(labels));
memset(relocs, 0, sizeof(relocs));
+#ifdef CONFIG_BCM947XX
+ i_nop(&p);
+#endif
if (bcm1250_m3_war()) {
i_MFC0(&p, K0, C0_BADVADDR);
i_MFC0(&p, K1, C0_ENTRYHI);
Index: linux-2.6.22/include/asm-mips/r4kcache.h
===================================================================
--- linux-2.6.22.orig/include/asm-mips/r4kcache.h 2007-07-26 06:29:25.085172538 +0200
+++ linux-2.6.22/include/asm-mips/r4kcache.h 2007-07-26 06:29:40.938075943 +0200
@@ -17,6 +17,20 @@
#include <asm/cpu-features.h>
#include <asm/mipsmtregs.h>
+#ifdef CONFIG_BCM947XX
+#include <asm/paccess.h>
+#include <linux/ssb/ssb.h>
+#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE + SSB_IMSTATE)))
+
+#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr))
+#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); })
+#else
+#define BCM4710_DUMMY_RREG()
+
+#define BCM4710_FILL_TLB(addr)
+#define BCM4710_PROTECTED_FILL_TLB(addr)
+#endif
+
/*
* This macro return a properly sign-extended address suitable as base address
* for indexed cache operations. Two issues here:
@@ -150,6 +164,7 @@
static inline void flush_dcache_line_indexed(unsigned long addr)
{
__dflush_prologue
+ BCM4710_DUMMY_RREG();
cache_op(Index_Writeback_Inv_D, addr);
__dflush_epilogue
}
@@ -169,6 +184,7 @@
static inline void flush_dcache_line(unsigned long addr)
{
__dflush_prologue
+ BCM4710_DUMMY_RREG();
cache_op(Hit_Writeback_Inv_D, addr);
__dflush_epilogue
}
@@ -176,6 +192,7 @@
static inline void invalidate_dcache_line(unsigned long addr)
{
__dflush_prologue
+ BCM4710_DUMMY_RREG();
cache_op(Hit_Invalidate_D, addr);
__dflush_epilogue
}
@@ -208,6 +225,7 @@
*/
static inline void protected_flush_icache_line(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
protected_cache_op(Hit_Invalidate_I, addr);
}
@@ -219,6 +237,7 @@
*/
static inline void protected_writeback_dcache_line(unsigned long addr)
{
+ BCM4710_DUMMY_RREG();
protected_cache_op(Hit_Writeback_Inv_D, addr);
}
@@ -339,8 +358,52 @@
: "r" (base), \
"i" (op));
+static inline void blast_dcache(void)
+{
+ unsigned long start = KSEG0;
+ unsigned long dcache_size = current_cpu_data.dcache.waysize * current_cpu_data.dcache.ways;
+ unsigned long end = (start + dcache_size);
+
+ do {
+ BCM4710_DUMMY_RREG();
+ cache_op(Index_Writeback_Inv_D, start);
+ start += current_cpu_data.dcache.linesz;
+ } while(start < end);
+}
+
+static inline void blast_dcache_page(unsigned long page)
+{
+ unsigned long start = page;
+ unsigned long end = start + PAGE_SIZE;
+
+ BCM4710_FILL_TLB(start);
+ do {
+ BCM4710_DUMMY_RREG();
+ cache_op(Hit_Writeback_Inv_D, start);
+ start += current_cpu_data.dcache.linesz;
+ } while(start < end);
+}
+
+static inline void blast_dcache_page_indexed(unsigned long page)
+{
+ unsigned long start = page;
+ unsigned long end = start + PAGE_SIZE;
+ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit;
+ unsigned long ws_end = current_cpu_data.dcache.ways <<
+ current_cpu_data.dcache.waybit;
+ unsigned long ws, addr;
+ for (ws = 0; ws < ws_end; ws += ws_inc) {
+ start = page + ws;
+ for (addr = start; addr < end; addr += current_cpu_data.dcache.linesz) {
+ BCM4710_DUMMY_RREG();
+ cache_op(Index_Writeback_Inv_D, addr);
+ }
+ }
+}
+
+
/* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */
-#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize) \
+#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, war) \
static inline void blast_##pfx##cache##lsize(void) \
{ \
unsigned long start = INDEX_BASE; \
@@ -352,6 +415,7 @@
\
__##pfx##flush_prologue \
\
+ war \
for (ws = 0; ws < ws_end; ws += ws_inc) \
for (addr = start; addr < end; addr += lsize * 32) \
cache##lsize##_unroll32(addr|ws,indexop); \
@@ -366,6 +430,7 @@
\
__##pfx##flush_prologue \
\
+ war \
do { \
cache##lsize##_unroll32(start,hitop); \
start += lsize * 32; \
@@ -384,6 +449,8 @@
current_cpu_data.desc.waybit; \
unsigned long ws, addr; \
\
+ war \
+ \
__##pfx##flush_prologue \
\
for (ws = 0; ws < ws_end; ws += ws_inc) \
@@ -393,28 +460,30 @@
__##pfx##flush_epilogue \
}
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16)
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16)
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16)
-__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32)
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32)
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32)
-__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64)
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64)
-__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128)
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, )
+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, )
+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, BCM4710_FILL_TLB(start);)
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, )
+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, )
/* build blast_xxx_range, protected_blast_xxx_range */
-#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot) \
+#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, war, war2) \
static inline void prot##blast_##pfx##cache##_range(unsigned long start, \
unsigned long end) \
{ \
unsigned long lsize = cpu_##desc##_line_size(); \
unsigned long addr = start & ~(lsize - 1); \
unsigned long aend = (end - 1) & ~(lsize - 1); \
+ war \
\
__##pfx##flush_prologue \
\
while (1) { \
+ war2 \
prot##cache_op(hitop, addr); \
if (addr == aend) \
break; \
@@ -424,13 +493,13 @@
__##pfx##flush_epilogue \
}
-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_)
-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_)
-__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_)
-__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, )
-__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, )
+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, BCM4710_PROTECTED_FILL_TLB(addr); BCM4710_PROTECTED_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_,, )
+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_,, )
+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D,, BCM4710_FILL_TLB(addr); BCM4710_FILL_TLB(aend);, BCM4710_DUMMY_RREG();)
+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD,,, )
/* blast_inv_dcache_range */
-__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, )
-__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, )
+__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D,,,BCM4710_DUMMY_RREG();)
+__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD,,, )
#endif /* _ASM_R4KCACHE_H */
Index: linux-2.6.22/include/asm-mips/stackframe.h
===================================================================
--- linux-2.6.22.orig/include/asm-mips/stackframe.h 2007-07-26 06:29:25.093172994 +0200
+++ linux-2.6.22/include/asm-mips/stackframe.h 2007-07-26 06:29:40.962077312 +0200
@@ -350,6 +350,10 @@
.macro RESTORE_SP_AND_RET
LONG_L sp, PT_R29(sp)
.set mips3
+#ifdef CONFIG_BCM947XX
+ nop
+ nop
+#endif
eret
.set mips0
.endm

63
target/linux/brcm47xx/patches-2.6.22/160-kmap_coherent.patch Normal file
View File

@@ -0,0 +1,63 @@
Index: linux-2.6.22-rc6/arch/mips/mm/init.c
===================================================================
--- linux-2.6.22-rc6.orig/arch/mips/mm/init.c 2007-07-04 02:17:11.423962000 +0200
+++ linux-2.6.22-rc6/arch/mips/mm/init.c 2007-07-04 02:17:31.269202250 +0200
@@ -207,7 +207,7 @@
void *vfrom, *vto;
vto = kmap_atomic(to, KM_USER1);
- if (cpu_has_dc_aliases) {
+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent) {
vfrom = kmap_coherent(from, vaddr);
copy_page(vto, vfrom);
kunmap_coherent();
@@ -230,7 +230,7 @@
struct page *page, unsigned long vaddr, void *dst, const void *src,
unsigned long len)
{
- if (cpu_has_dc_aliases) {
+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent) {
void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
memcpy(vto, src, len);
kunmap_coherent();
@@ -246,7 +246,7 @@
struct page *page, unsigned long vaddr, void *dst, const void *src,
unsigned long len)
{
- if (cpu_has_dc_aliases) {
+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent) {
void *vfrom =
kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK);
memcpy(dst, vfrom, len);
Index: linux-2.6.22-rc6/include/asm-mips/mach-bcm947xx/cpu-feature-overrides.h
===================================================================
--- /dev/null 1970-01-01 00:00:00.000000000 +0000
+++ linux-2.6.22-rc6/include/asm-mips/mach-bcm947xx/cpu-feature-overrides.h 2007-07-04 02:17:31.273202500 +0200
@@ -0,0 +1,13 @@
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org)
+ */
+#ifndef __ASM_MACH_BCM947XX_CPU_FEATURE_OVERRIDES_H
+#define __ASM_MACH_BCM947XX_CPU_FEATURE_OVERRIDES_H
+
+#define cpu_use_kmap_coherent 0
+
+#endif /* __ASM_MACH_BCM947XX_CPU_FEATURE_OVERRIDES_H */
Index: linux-2.6.22-rc6/include/asm-mips/cpu-features.h
===================================================================
--- linux-2.6.22-rc6.orig/include/asm-mips/cpu-features.h 2007-07-04 02:17:11.455964000 +0200
+++ linux-2.6.22-rc6/include/asm-mips/cpu-features.h 2007-07-04 02:17:31.305204500 +0200
@@ -101,6 +101,9 @@
#ifndef cpu_has_pindexed_dcache
#define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX)
#endif
+#ifndef cpu_use_kmap_coherent
+#define cpu_use_kmap_coherent 1
+#endif
/*
* I-Cache snoops remote store. This only matters on SMP. Some multiprocessors

12
target/linux/brcm47xx/patches-2.6.22/170-cpu_wait.patch Normal file
View File

@@ -0,0 +1,12 @@
Index: linux-2.6.22-rc4/arch/mips/kernel/cpu-probe.c
===================================================================
--- linux-2.6.22-rc4.orig/arch/mips/kernel/cpu-probe.c 2007-06-10 21:33:17.000000000 +0100
+++ linux-2.6.22-rc4/arch/mips/kernel/cpu-probe.c 2007-06-10 21:33:22.000000000 +0100
@@ -139,6 +139,7 @@
case CPU_5KC:
case CPU_25KF:
case CPU_PR4450:
+ case CPU_BCM3302:
cpu_wait = r4k_wait;
break;

256
target/linux/brcm47xx/patches-2.6.22/200-b44_ssb_fixup.patch Normal file
View File

@@ -0,0 +1,256 @@
Index: linux-2.6.22-rc4/drivers/net/b44.c
===================================================================
--- linux-2.6.22-rc4.orig/drivers/net/b44.c 2007-06-10 21:33:15.000000000 +0100
+++ linux-2.6.22-rc4/drivers/net/b44.c 2007-06-10 21:33:23.000000000 +0100
@@ -128,7 +128,7 @@
unsigned long offset,
enum dma_data_direction dir)
{
- dma_sync_single_range_for_device(&sdev->dev, dma_base,
+ dma_sync_single_range_for_device(sdev->dev, dma_base,
offset & dma_desc_align_mask,
dma_desc_sync_size, dir);
}
@@ -138,7 +138,7 @@
unsigned long offset,
enum dma_data_direction dir)
{
- dma_sync_single_range_for_cpu(&sdev->dev, dma_base,
+ dma_sync_single_range_for_cpu(sdev->dev, dma_base,
offset & dma_desc_align_mask,
dma_desc_sync_size, dir);
}
@@ -563,7 +563,7 @@
BUG_ON(skb == NULL);
- dma_unmap_single(&bp->sdev->dev,
+ dma_unmap_single(bp->sdev->dev,
pci_unmap_addr(rp, mapping),
skb->len,
DMA_TO_DEVICE);
@@ -603,7 +603,7 @@
if (skb == NULL)
return -ENOMEM;
- mapping = dma_map_single(&bp->sdev->dev, skb->data,
+ mapping = dma_map_single(bp->sdev->dev, skb->data,
RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
@@ -613,18 +613,18 @@
mapping + RX_PKT_BUF_SZ > DMA_30BIT_MASK) {
/* Sigh... */
if (!dma_mapping_error(mapping))
- dma_unmap_single(&bp->sdev->dev, mapping, RX_PKT_BUF_SZ,DMA_FROM_DEVICE);
+ dma_unmap_single(bp->sdev->dev, mapping, RX_PKT_BUF_SZ,DMA_FROM_DEVICE);
dev_kfree_skb_any(skb);
skb = __dev_alloc_skb(RX_PKT_BUF_SZ,GFP_DMA);
if (skb == NULL)
return -ENOMEM;
- mapping = dma_map_single(&bp->sdev->dev, skb->data,
+ mapping = dma_map_single(bp->sdev->dev, skb->data,
RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
if (dma_mapping_error(mapping) ||
mapping + RX_PKT_BUF_SZ > DMA_30BIT_MASK) {
if (!dma_mapping_error(mapping))
- dma_unmap_single(&bp->sdev->dev, mapping, RX_PKT_BUF_SZ,DMA_FROM_DEVICE);
+ dma_unmap_single(bp->sdev->dev, mapping, RX_PKT_BUF_SZ,DMA_FROM_DEVICE);
dev_kfree_skb_any(skb);
return -ENOMEM;
}
@@ -702,7 +702,7 @@
dest_idx * sizeof(dest_desc),
DMA_BIDIRECTIONAL);
- dma_sync_single_for_device(&bp->sdev->dev, le32_to_cpu(src_desc->addr),
+ dma_sync_single_for_device(bp->sdev->dev, le32_to_cpu(src_desc->addr),
RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
}
@@ -724,7 +724,7 @@
struct rx_header *rh;
u16 len;
- dma_sync_single_for_cpu(&bp->sdev->dev, map,
+ dma_sync_single_for_cpu(bp->sdev->dev, map,
RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
rh = (struct rx_header *) skb->data;
@@ -758,7 +758,7 @@
skb_size = b44_alloc_rx_skb(bp, cons, bp->rx_prod);
if (skb_size < 0)
goto drop_it;
- dma_unmap_single(&bp->sdev->dev, map,
+ dma_unmap_single(bp->sdev->dev, map,
skb_size, DMA_FROM_DEVICE);
/* Leave out rx_header */
skb_put(skb, len+bp->rx_offset);
@@ -931,22 +931,22 @@
goto err_out;
}
- mapping = dma_map_single(&bp->sdev->dev, skb->data, len, DMA_TO_DEVICE);
+ mapping = dma_map_single(bp->sdev->dev, skb->data, len, DMA_TO_DEVICE);
if (dma_mapping_error(mapping) || mapping + len > DMA_30BIT_MASK) {
/* Chip can't handle DMA to/from >1GB, use bounce buffer */
if (!dma_mapping_error(mapping))
- dma_unmap_single(&bp->sdev->dev, mapping, len, DMA_TO_DEVICE);
+ dma_unmap_single(bp->sdev->dev, mapping, len, DMA_TO_DEVICE);
bounce_skb = __dev_alloc_skb(TX_PKT_BUF_SZ,
GFP_ATOMIC|GFP_DMA);
if (!bounce_skb)
goto err_out;
- mapping = dma_map_single(&bp->sdev->dev, bounce_skb->data,
+ mapping = dma_map_single(bp->sdev->dev, bounce_skb->data,
len, DMA_TO_DEVICE);
if (dma_mapping_error(mapping) || mapping + len > DMA_30BIT_MASK) {
if (!dma_mapping_error(mapping))
- dma_unmap_single(&bp->sdev->dev, mapping,
+ dma_unmap_single(bp->sdev->dev, mapping,
len, DMA_TO_DEVICE);
dev_kfree_skb_any(bounce_skb);
goto err_out;
@@ -1046,7 +1046,7 @@
if (rp->skb == NULL)
continue;
- dma_unmap_single(&bp->sdev->dev,
+ dma_unmap_single(bp->sdev->dev,
pci_unmap_addr(rp, mapping),
RX_PKT_BUF_SZ,
DMA_FROM_DEVICE);
@@ -1060,7 +1060,7 @@
if (rp->skb == NULL)
continue;
- dma_unmap_single(&bp->sdev->dev,
+ dma_unmap_single(bp->sdev->dev,
pci_unmap_addr(rp, mapping),
rp->skb->len,
DMA_TO_DEVICE);
@@ -1085,12 +1085,12 @@
memset(bp->tx_ring, 0, B44_TX_RING_BYTES);
if (bp->flags & B44_FLAG_RX_RING_HACK)
- dma_sync_single_for_device(&bp->sdev->dev, bp->rx_ring_dma,
+ dma_sync_single_for_device(bp->sdev->dev, bp->rx_ring_dma,
DMA_TABLE_BYTES,
DMA_BIDIRECTIONAL);
if (bp->flags & B44_FLAG_TX_RING_HACK)
- dma_sync_single_for_device(&bp->sdev->dev, bp->tx_ring_dma,
+ dma_sync_single_for_device(bp->sdev->dev, bp->tx_ring_dma,
DMA_TABLE_BYTES,
DMA_TO_DEVICE);
@@ -1112,24 +1112,24 @@
bp->tx_buffers = NULL;
if (bp->rx_ring) {
if (bp->flags & B44_FLAG_RX_RING_HACK) {
- dma_unmap_single(&bp->sdev->dev, bp->rx_ring_dma,
+ dma_unmap_single(bp->sdev->dev, bp->rx_ring_dma,
DMA_TABLE_BYTES,
DMA_BIDIRECTIONAL);
kfree(bp->rx_ring);
} else
- dma_free_coherent(&bp->sdev->dev, DMA_TABLE_BYTES,
+ dma_free_coherent(bp->sdev->dev, DMA_TABLE_BYTES,
bp->rx_ring, bp->rx_ring_dma);
bp->rx_ring = NULL;
bp->flags &= ~B44_FLAG_RX_RING_HACK;
}
if (bp->tx_ring) {
if (bp->flags & B44_FLAG_TX_RING_HACK) {
- dma_unmap_single(&bp->sdev->dev, bp->tx_ring_dma,
+ dma_unmap_single(bp->sdev->dev, bp->tx_ring_dma,
DMA_TABLE_BYTES,
DMA_TO_DEVICE);
kfree(bp->tx_ring);
} else
- dma_free_coherent(&bp->sdev->dev, DMA_TABLE_BYTES,
+ dma_free_coherent(bp->sdev->dev, DMA_TABLE_BYTES,
bp->tx_ring, bp->tx_ring_dma);
bp->tx_ring = NULL;
bp->flags &= ~B44_FLAG_TX_RING_HACK;
@@ -1155,7 +1155,7 @@
goto out_err;
size = DMA_TABLE_BYTES;
- bp->rx_ring = dma_alloc_coherent(&bp->sdev->dev, size, &bp->rx_ring_dma, GFP_ATOMIC);
+ bp->rx_ring = dma_alloc_coherent(bp->sdev->dev, size, &bp->rx_ring_dma, GFP_ATOMIC);
if (!bp->rx_ring) {
/* Allocation may have failed due to pci_alloc_consistent
insisting on use of GFP_DMA, which is more restrictive
@@ -1167,7 +1167,7 @@
if (!rx_ring)
goto out_err;
- rx_ring_dma = dma_map_single(&bp->sdev->dev, rx_ring,
+ rx_ring_dma = dma_map_single(bp->sdev->dev, rx_ring,
DMA_TABLE_BYTES,
DMA_BIDIRECTIONAL);
@@ -1182,7 +1182,7 @@
bp->flags |= B44_FLAG_RX_RING_HACK;
}
- bp->tx_ring = dma_alloc_coherent(&bp->sdev->dev, size, &bp->tx_ring_dma, GFP_ATOMIC);
+ bp->tx_ring = dma_alloc_coherent(bp->sdev->dev, size, &bp->tx_ring_dma, GFP_ATOMIC);
if (!bp->tx_ring) {
/* Allocation may have failed due to dma_alloc_coherent
insisting on use of GFP_DMA, which is more restrictive
@@ -1194,7 +1194,7 @@
if (!tx_ring)
goto out_err;
- tx_ring_dma = dma_map_single(&bp->sdev->dev, tx_ring,
+ tx_ring_dma = dma_map_single(bp->sdev->dev, tx_ring,
DMA_TABLE_BYTES,
DMA_TO_DEVICE);
@@ -2314,13 +2314,13 @@
dev = alloc_etherdev(sizeof(*bp));
if (!dev) {
- dev_err(&sdev->dev, "Etherdev alloc failed, aborting.\n");
+ dev_err(sdev->dev, "Etherdev alloc failed, aborting.\n");
err = -ENOMEM;
goto out;
}
SET_MODULE_OWNER(dev);
- SET_NETDEV_DEV(dev,&sdev->dev);
+ SET_NETDEV_DEV(dev,sdev->dev);
/* No interesting netdevice features in this card... */
dev->features |= 0;
@@ -2358,7 +2358,7 @@
err = b44_get_invariants(bp);
if (err) {
- dev_err(&sdev->dev,
+ dev_err(sdev->dev,
"Problem fetching invariants of chip, aborting.\n");
goto err_out_free_dev;
}
@@ -2379,7 +2379,7 @@
err = register_netdev(dev);
if (err) {
- dev_err(&sdev->dev, "Cannot register net device, aborting.\n");
+ dev_err(sdev->dev, "Cannot register net device, aborting.\n");
goto out;
}
@@ -2458,7 +2458,6 @@
rc = request_irq(dev->irq, b44_interrupt, IRQF_SHARED, dev->name, dev);
if (rc) {
printk(KERN_ERR PFX "%s: request_irq failed\n", dev->name);
- pci_disable_device(pdev);
return rc;
}

372
target/linux/brcm47xx/patches-2.6.22/210-ssb_fixes.patch Normal file
View File

@@ -0,0 +1,372 @@
Index: linux-2.6.22-rc5/drivers/ssb/driver_chipcommon.c
===================================================================
--- linux-2.6.22-rc5.orig/drivers/ssb/driver_chipcommon.c 2007-06-21 23:04:38.000000000 +0100
+++ linux-2.6.22-rc5/drivers/ssb/driver_chipcommon.c 2007-06-24 20:07:15.000000000 +0100
@@ -264,6 +264,31 @@
ssb_chipco_set_clockmode(cc, SSB_CLKMODE_FAST);
}
+/* TODO: These two functions are a clear candidate for merging, but one gets
+ * the processor clock, and the other gets the bus clock.
+ */
+void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
+ u32 *plltype, u32 *n, u32 *m)
+{
+ *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N);
+ *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT);
+ switch (*plltype) {
+ case SSB_PLLTYPE_2:
+ case SSB_PLLTYPE_4:
+ case SSB_PLLTYPE_6:
+ case SSB_PLLTYPE_7:
+ *m = chipco_read32(cc, SSB_CHIPCO_CLOCK_MIPS);
+ break;
+ case SSB_PLLTYPE_3:
+ /* 5350 uses m2 to control mips */
+ *m = chipco_read32(cc, SSB_CHIPCO_CLOCK_M2);
+ break;
+ default:
+ *m = chipco_read32(cc, SSB_CHIPCO_CLOCK_SB);
+ break;
+ }
+}
+
void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m)
{
@@ -400,3 +425,13 @@
return nr_ports;
}
#endif /* CONFIG_SSB_SERIAL */
+
+/* Set chip watchdog reset timer to fire in 'ticks' backplane cycles */
+int
+ssb_chipco_watchdog(struct ssb_chipcommon *cc, uint ticks)
+{
+ /* instant NMI */
+ chipco_write32(cc, SSB_CHIPCO_WATCHDOG, ticks);
+ return 0;
+}
+EXPORT_SYMBOL(ssb_chipco_watchdog);
Index: linux-2.6.22-rc5/drivers/ssb/driver_mipscore.c
===================================================================
--- linux-2.6.22-rc5.orig/drivers/ssb/driver_mipscore.c 2007-06-10 16:44:31.000000000 +0100
+++ linux-2.6.22-rc5/drivers/ssb/driver_mipscore.c 2007-06-24 20:48:52.000000000 +0100
@@ -4,6 +4,7 @@
*
* Copyright 2005, Broadcom Corporation
* Copyright 2006, 2007, Michael Buesch <mb@bu3sch.de>
+ * Copyright 2006, 2007, Felix Fietkau <nbd@openwrt.org>
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
@@ -31,6 +32,16 @@
ssb_write32(mcore->dev, offset, value);
}
+static inline u32 extif_read32(struct ssb_extif *extif, u16 offset)
+{
+ return ssb_read32(extif->dev, offset);
+}
+
+static inline void extif_write32(struct ssb_extif *extif, u16 offset, u32 value)
+{
+ ssb_write32(extif->dev, offset, value);
+}
+
static const u32 ipsflag_irq_mask[] = {
0,
SSB_IPSFLAG_IRQ1,
@@ -118,9 +129,9 @@
}
/* XXX: leave here or move into separate extif driver? */
-static int ssb_extif_serial_init(struct ssb_device *dev, struct ssb_serial_ports *ports)
+static int ssb_extif_serial_init(struct ssb_extif *dev, struct ssb_serial_port *ports)
{
-
+ return 0;
}
@@ -174,23 +185,76 @@
{
struct ssb_bus *bus = mcore->dev->bus;
+ mcore->flash_buswidth = 2;
if (bus->chipco.dev) {
mcore->flash_window = 0x1c000000;
- mcore->flash_window_size = 0x800000;
+ mcore->flash_window_size = 0x02000000;
+ if ((ssb_read32(bus->chipco.dev, SSB_CHIPCO_FLASH_CFG)
+ & SSB_CHIPCO_CFG_DS16) == 0)
+ mcore->flash_buswidth = 1;
} else {
mcore->flash_window = 0x1fc00000;
- mcore->flash_window_size = 0x400000;
+ mcore->flash_window_size = 0x00400000;
}
}
+static void ssb_extif_timing_init(struct ssb_extif *extif, u32 ns)
+{
+ u32 tmp;
+
+ /* Initialize extif so we can get to the LEDs and external UART */
+ extif_write32(extif, SSB_EXTIF_PROG_CFG, SSB_EXTCFG_EN);
+
+ /* Set timing for the flash */
+ tmp = DIV_ROUND_UP(10, ns) << SSB_PROG_WCNT_3_SHIFT;
+ tmp |= DIV_ROUND_UP(40, ns) << SSB_PROG_WCNT_1_SHIFT;
+ tmp |= DIV_ROUND_UP(120, ns);
+ extif_write32(extif, SSB_EXTIF_PROG_WAITCNT, tmp);
+
+ /* Set programmable interface timing for external uart */
+ tmp = DIV_ROUND_UP(10, ns) << SSB_PROG_WCNT_3_SHIFT;
+ tmp |= DIV_ROUND_UP(20, ns) << SSB_PROG_WCNT_2_SHIFT;
+ tmp |= DIV_ROUND_UP(100, ns) << SSB_PROG_WCNT_1_SHIFT;
+ tmp |= DIV_ROUND_UP(120, ns);
+ extif_write32(extif, SSB_EXTIF_PROG_WAITCNT, tmp);
+}
-static void ssb_cpu_clock(struct ssb_mipscore *mcore)
+static inline void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
+ u32 *pll_type, u32 *n, u32 *m)
{
+ *pll_type = SSB_PLLTYPE_1;
+ *n = extif_read32(extif, SSB_EXTIF_CLOCK_N);
+ *m = extif_read32(extif, SSB_EXTIF_CLOCK_SB);
}
-void ssb_mipscore_init(struct ssb_mipscore *mcore)
+u32 ssb_cpu_clock(struct ssb_mipscore *mcore)
{
struct ssb_bus *bus = mcore->dev->bus;
+ u32 pll_type, n, m, rate = 0;
+
+ if (bus->extif.dev) {
+ ssb_extif_get_clockcontrol(&bus->extif, &pll_type, &n, &m);
+ } else if (bus->chipco.dev) {
+ ssb_chipco_get_clockcpu(&bus->chipco, &pll_type, &n, &m);
+ } else
+ return 0;
+
+ if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) {
+ rate = 200000000;
+ } else {
+ rate = ssb_calc_clock_rate(pll_type, n, m);
+ }
+
+ if (pll_type == SSB_PLLTYPE_6) {
+ rate *= 2;
+ }
+
+ return rate;
+}
+
+void ssb_mipscore_init(struct ssb_mipscore *mcore)
+{
+ struct ssb_bus *bus;
struct ssb_device *dev;
unsigned long hz, ns;
unsigned int irq, i;
@@ -198,6 +262,8 @@
if (!mcore->dev)
return; /* We don't have a MIPS core */
+ bus = mcore->dev->bus;
+
ssb_dprintk(KERN_INFO PFX "Initializing MIPS core...\n");
hz = ssb_clockspeed(bus);
@@ -205,28 +271,9 @@
hz = 100000000;
ns = 1000000000 / hz;
-//TODO
-#if 0
- if (have EXTIF) {
- /* Initialize extif so we can get to the LEDs and external UART */
- W_REG(&eir->prog_config, CF_EN);
-
- /* Set timing for the flash */
- tmp = CEIL(10, ns) << FW_W3_SHIFT; /* W3 = 10nS */
- tmp = tmp | (CEIL(40, ns) << FW_W1_SHIFT); /* W1 = 40nS */
- tmp = tmp | CEIL(120, ns); /* W0 = 120nS */
- W_REG(&eir->prog_waitcount, tmp); /* 0x01020a0c for a 100Mhz clock */
-
- /* Set programmable interface timing for external uart */
- tmp = CEIL(10, ns) << FW_W3_SHIFT; /* W3 = 10nS */
- tmp = tmp | (CEIL(20, ns) << FW_W2_SHIFT); /* W2 = 20nS */
- tmp = tmp | (CEIL(100, ns) << FW_W1_SHIFT); /* W1 = 100nS */
- tmp = tmp | CEIL(120, ns); /* W0 = 120nS */
- W_REG(&eir->prog_waitcount, tmp);
- }
- else... chipcommon
-#endif
- if (bus->chipco.dev)
+ if (bus->extif.dev)
+ ssb_extif_timing_init(&bus->extif, ns);
+ else if (bus->chipco.dev)
ssb_chipco_timing_init(&bus->chipco, ns);
/* Assign IRQs to all cores on the bus, start with irq line 2, because serial usually takes 1 */
@@ -256,3 +303,5 @@
ssb_mips_serial_init(mcore);
ssb_mips_flash_detect(mcore);
}
+
+EXPORT_SYMBOL(ssb_mips_irq);
Index: linux-2.6.22-rc5/include/linux/ssb/ssb_driver_chipcommon.h
===================================================================
--- linux-2.6.22-rc5.orig/include/linux/ssb/ssb_driver_chipcommon.h 2007-06-10 16:44:47.000000000 +0100
+++ linux-2.6.22-rc5/include/linux/ssb/ssb_driver_chipcommon.h 2007-06-24 20:07:15.000000000 +0100
@@ -364,6 +364,8 @@
extern void ssb_chipco_suspend(struct ssb_chipcommon *cc, pm_message_t state);
extern void ssb_chipco_resume(struct ssb_chipcommon *cc);
+extern void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc,
+ u32 *plltype, u32 *n, u32 *m);
extern void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc,
u32 *plltype, u32 *n, u32 *m);
extern void ssb_chipco_timing_init(struct ssb_chipcommon *cc,
@@ -378,6 +380,46 @@
extern void ssb_chipco_set_clockmode(struct ssb_chipcommon *cc,
enum ssb_clkmode mode);
+/* GPIO functions */
+static inline u32 ssb_chipco_gpio_in(struct ssb_chipcommon *cc,
+ u32 mask)
+{
+ return ssb_read32(cc->dev, SSB_CHIPCO_GPIOIN) & mask;
+}
+
+static inline u32 ssb_chipco_gpio_out(struct ssb_chipcommon *cc,
+ u32 mask, u32 value)
+{
+ return ssb_write32_masked(cc->dev, SSB_CHIPCO_GPIOOUT, mask, value);
+}
+
+static inline u32 ssb_chipco_gpio_outen(struct ssb_chipcommon *cc,
+ u32 mask, u32 value)
+{
+ return ssb_write32_masked(cc->dev, SSB_CHIPCO_GPIOOUTEN, mask, value);
+}
+
+static inline u32 ssb_chipco_gpio_control(struct ssb_chipcommon *cc,
+ u32 mask, u32 value)
+{
+ return ssb_write32_masked(cc->dev, SSB_CHIPCO_GPIOCTL, mask, value);
+}
+
+static inline u32 ssb_chipco_gpio_intmask(struct ssb_chipcommon *cc,
+ u32 mask, u32 value)
+{
+ return ssb_write32_masked(cc->dev, SSB_CHIPCO_GPIOIRQ, mask, value);
+}
+
+static inline u32 ssb_chipco_gpio_polarity(struct ssb_chipcommon *cc,
+ u32 mask, u32 value)
+{
+ return ssb_write32_masked(cc->dev, SSB_CHIPCO_GPIOPOL, mask, value);
+}
+/* TODO: GPIO reservation */
+
+extern int ssb_chipco_watchdog(struct ssb_chipcommon *cc, uint ticks);
+
#ifdef CONFIG_SSB_SERIAL
extern int ssb_chipco_serial_init(struct ssb_chipcommon *cc,
struct ssb_serial_port *ports);
Index: linux-2.6.22-rc5/include/linux/ssb/ssb_driver_extif.h
===================================================================
--- linux-2.6.22-rc5.orig/include/linux/ssb/ssb_driver_extif.h 2007-06-10 16:44:47.000000000 +0100
+++ linux-2.6.22-rc5/include/linux/ssb/ssb_driver_extif.h 2007-06-24 20:07:15.000000000 +0100
@@ -158,6 +158,36 @@
/* watchdog */
#define SSB_EXTIF_WATCHDOG_CLK 48000000 /* Hz */
+/* GPIO functions */
+static inline u32 ssb_extif_gpio_in(struct ssb_extif *extif,
+ u32 mask)
+{
+ return ssb_read32(extif->dev, SSB_EXTIF_GPIO_IN) & mask;
+}
+
+static inline u32 ssb_extif_gpio_out(struct ssb_extif *extif,
+ u32 mask, u32 value)
+{
+ return ssb_write32_masked(extif->dev, SSB_EXTIF_GPIO_OUT(0), mask, value);
+}
+
+static inline u32 ssb_extif_gpio_outen(struct ssb_extif *extif,
+ u32 mask, u32 value)
+{
+ return ssb_write32_masked(extif->dev, SSB_EXTIF_GPIO_OUTEN(0), mask, value);
+}
+
+static inline u32 ssb_extif_gpio_polarity(struct ssb_extif *extif,
+ u32 mask, u32 value)
+{
+ return ssb_write32_masked(extif->dev, SSB_EXTIF_GPIO_INTPOL, mask, value);
+}
+
+static inline u32 ssb_extif_gpio_intmask(struct ssb_extif *extif,
+ u32 mask, u32 value)
+{
+ return ssb_write32_masked(extif->dev, SSB_EXTIF_GPIO_INTMASK, mask, value);
+}
#endif /* __KERNEL__ */
#endif /* LINUX_SSB_EXTIFCORE_H_ */
Index: linux-2.6.22-rc5/include/linux/ssb/ssb_driver_mips.h
===================================================================
--- linux-2.6.22-rc5.orig/include/linux/ssb/ssb_driver_mips.h 2007-06-10 16:44:47.000000000 +0100
+++ linux-2.6.22-rc5/include/linux/ssb/ssb_driver_mips.h 2007-06-24 20:07:15.000000000 +0100
@@ -22,11 +22,13 @@
int nr_serial_ports;
struct ssb_serial_port serial_ports[4];
+ int flash_buswidth;
u32 flash_window;
u32 flash_window_size;
};
extern void ssb_mipscore_init(struct ssb_mipscore *mcore);
+extern u32 ssb_cpu_clock(struct ssb_mipscore *mcore);
extern unsigned int ssb_mips_irq(struct ssb_device *dev);
Index: linux-2.6.22-rc5/include/linux/ssb/ssb.h
===================================================================
--- linux-2.6.22-rc5.orig/include/linux/ssb/ssb.h 2007-06-24 19:49:56.000000000 +0100
+++ linux-2.6.22-rc5/include/linux/ssb/ssb.h 2007-06-24 20:07:15.000000000 +0100
@@ -270,6 +270,12 @@
#define SSB_CHIPPACK_BCM4712M 2 /* Medium 225pin 4712 */
#define SSB_CHIPPACK_BCM4712L 0 /* Large 340pin 4712 */
+static inline u16 ssb_read16(struct ssb_device *dev, u16 offset);
+static inline u32 ssb_read32(struct ssb_device *dev, u16 offset);
+static inline void ssb_write16(struct ssb_device *dev, u16 offset, u16 value);
+static inline void ssb_write32(struct ssb_device *dev, u16 offset, u32 value);
+static inline u32 ssb_write32_masked(struct ssb_device *dev, u16 offset, u32 mask, u32 value);
+
#include <linux/ssb/ssb_driver_chipcommon.h>
#include <linux/ssb/ssb_driver_mips.h>
#include <linux/ssb/ssb_driver_extif.h>
@@ -388,6 +394,16 @@
dev->ops->write32(dev, offset, value);
}
+static inline u32 ssb_write32_masked(struct ssb_device *dev,
+ u16 offset,
+ u32 mask,
+ u32 value)
+{
+ value &= mask;
+ value |= ssb_read32(dev, offset) & ~mask;
+ ssb_write32(dev, offset, value);
+ return value;
+}
/* Translation (routing) bits that need to be ORed to DMA
* addresses before they are given to a device. */

33
target/linux/brcm47xx/patches-2.6.22/230-ssb_arch_setup.patch Normal file
View File

@@ -0,0 +1,33 @@
Index: linux-2.6.22-rc5/arch/mips/bcm947xx/setup.c
===================================================================
--- linux-2.6.22-rc5.orig/arch/mips/bcm947xx/setup.c 2007-06-24 19:51:21.000000000 +0100
+++ linux-2.6.22-rc5/arch/mips/bcm947xx/setup.c 2007-06-24 20:26:12.000000000 +0100
@@ -107,13 +107,27 @@
sprom->r1.et1phyaddr = simple_strtoul(s, NULL, 10);
}
+static int bcm47xx_get_invariants(struct ssb_bus *bus, struct ssb_init_invariants *iv)
+{
+ char *s;
+
+ // TODO
+ //iv->boardinfo.vendor =
+ if ((s = nvram_get("boardtype")))
+ iv->boardinfo.type = (u16)simple_strtoul(s, NULL, 0);
+ if ((s = nvram_get("boardrev")))
+ iv->boardinfo.rev = (u16)simple_strtoul(s, NULL, 0);
+ bcm47xx_fill_sprom(&iv->sprom);
+ return 0;
+}
+
void __init plat_mem_setup(void)
{
int i, err;
char *s;
struct ssb_mipscore *mcore;
- err = ssb_bus_ssbbus_register(&ssb, SSB_ENUM_BASE, bcm47xx_fill_sprom);
+ err = ssb_bus_ssbbus_register(&ssb, SSB_ENUM_BASE, bcm47xx_get_invariants);
if (err) {
const char *msg = "Failed to initialize SSB bus (err %d)\n";
cfe_printk(msg, err); /* Make sure the message gets out of the box. */

152
target/linux/brcm47xx/patches-2.6.22/240-extif_fixes.patch Normal file
View File

@@ -0,0 +1,152 @@
Index: linux-2.6.22-rc6/drivers/ssb/driver_mipscore.c
===================================================================
--- linux-2.6.22-rc6.orig/drivers/ssb/driver_mipscore.c 2007-06-28 11:35:29.077307472 +0200
+++ linux-2.6.22-rc6/drivers/ssb/driver_mipscore.c 2007-06-28 12:11:01.433140112 +0200
@@ -128,10 +128,46 @@
ssb_write32(mdev, SSB_IPSFLAG, irqflag);
}
-/* XXX: leave here or move into separate extif driver? */
+static inline bool serial_exists(u8 *regs)
+{
+ u8 save_mcr, status1 = 0;
+
+ if (regs) {
+ save_mcr = regs[UART_MCR];
+ regs[UART_MCR] = (UART_MCR_LOOP | 0x0a);
+ // Fixme UART_MSR_DSR appears in status1
+ status1 = regs[UART_MSR] & 0xd0;
+ regs[UART_MCR] = save_mcr;
+ }
+ return (status1 == (UART_MSR_DCD | UART_MSR_CTS));
+}
+
static int ssb_extif_serial_init(struct ssb_extif *dev, struct ssb_serial_port *ports)
{
- return 0;
+ u32 i, nr_ports = 0;
+
+ /* Disable GPIO interrupt initially */
+ extif_write32(dev, SSB_EXTIF_GPIO_INTPOL, 0);
+ extif_write32(dev, SSB_EXTIF_GPIO_INTMASK, 0);
+
+ for (i = 0; i < 2; i++) {
+ void __iomem *uart_regs;
+
+ uart_regs = ioremap_nocache(SSB_EUART, 16);
+ uart_regs += (i * 8);
+
+ if (serial_exists(uart_regs) && ports) {
+ extif_write32(dev, SSB_EXTIF_GPIO_INTMASK, 2);
+
+ nr_ports++;
+ ports[i].regs = uart_regs;
+ ports[i].irq = 2;
+ ports[i].baud_base = 13500000;
+ ports[i].reg_shift = 0;
+ }
+ iounmap(uart_regs);
+ }
+ return nr_ports;
}
@@ -139,40 +175,6 @@
{
struct ssb_bus *bus = mcore->dev->bus;
- //TODO if (EXTIF available
-#if 0
- extifregs_t *eir = (extifregs_t *) regs;
- sbconfig_t *sb;
-
- /* Determine external UART register base */
- sb = (sbconfig_t *)((ulong) eir + SBCONFIGOFF);
- base = EXTIF_CFGIF_BASE(sb_base(R_REG(&sb->sbadmatch1)));
-
- /* Determine IRQ */
- irq = sb_irq(sbh);
-
- /* Disable GPIO interrupt initially */
- W_REG(&eir->gpiointpolarity, 0);
- W_REG(&eir->gpiointmask, 0);
-
- /* Search for external UARTs */
- n = 2;
- for (i = 0; i < 2; i++) {
- regs = (void *) REG_MAP(base + (i * 8), 8);
- if (BCMINIT(serial_exists)(regs)) {
- /* Set GPIO 1 to be the external UART IRQ */
- W_REG(&eir->gpiointmask, 2);
- if (add)
- add(regs, irq, 13500000, 0);
- }
- }
-
- /* Add internal UART if enabled */
- if (R_REG(&eir->corecontrol) & CC_UE)
- if (add)
- add((void *) &eir->uartdata, irq, sb_clock(sbh), 2);
-
-#endif
if (bus->extif.dev)
mcore->nr_serial_ports = ssb_extif_serial_init(&bus->extif, mcore->serial_ports);
else if (bus->chipco.dev)
@@ -219,7 +221,7 @@
extif_write32(extif, SSB_EXTIF_PROG_WAITCNT, tmp);
}
-static inline void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
+void ssb_extif_get_clockcontrol(struct ssb_extif *extif,
u32 *pll_type, u32 *n, u32 *m)
{
*pll_type = SSB_PLLTYPE_1;
Index: linux-2.6.22-rc6/drivers/ssb/main.c
===================================================================
--- linux-2.6.22-rc6.orig/drivers/ssb/main.c 2007-06-28 11:23:38.418344056 +0200
+++ linux-2.6.22-rc6/drivers/ssb/main.c 2007-06-28 12:07:50.346189744 +0200
@@ -774,12 +774,12 @@
u32 plltype;
u32 clkctl_n, clkctl_m;
- //TODO if EXTIF: PLLTYPE == 1, read n from clockcontrol_n, m from clockcontrol_sb
-
- if (bus->chipco.dev) {
+ if (bus->extif.dev)
+ ssb_extif_get_clockcontrol(&bus->extif, &plltype, &clkctl_n, &clkctl_m);
+ else if (bus->chipco.dev)
ssb_chipco_get_clockcontrol(&bus->chipco, &plltype,
&clkctl_n, &clkctl_m);
- } else
+ else
return 0;
if (bus->chip_id == 0x5365) {
Index: linux-2.6.22-rc6/include/linux/ssb/ssb_driver_extif.h
===================================================================
--- linux-2.6.22-rc6.orig/include/linux/ssb/ssb_driver_extif.h 2007-06-28 11:27:47.099538768 +0200
+++ linux-2.6.22-rc6/include/linux/ssb/ssb_driver_extif.h 2007-06-28 11:28:03.482048248 +0200
@@ -158,6 +158,8 @@
/* watchdog */
#define SSB_EXTIF_WATCHDOG_CLK 48000000 /* Hz */
+extern void ssb_extif_get_clockcontrol(struct ssb_extif *, u32 *, u32 *, u32 *);
+
/* GPIO functions */
static inline u32 ssb_extif_gpio_in(struct ssb_extif *extif,
u32 mask)
Index: linux-2.6.22-rc6/include/linux/ssb/ssb_regs.h
===================================================================
--- linux-2.6.22-rc6.orig/include/linux/ssb/ssb_regs.h 2007-06-28 12:09:24.943808720 +0200
+++ linux-2.6.22-rc6/include/linux/ssb/ssb_regs.h 2007-06-28 12:09:34.606339792 +0200
@@ -24,8 +24,8 @@
#define SSB_PCI_DMA_SZ 0x40000000 /* Client Mode sb2pcitranslation2 size in bytes */
#define SSB_PCIE_DMA_L32 0x00000000 /* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), low 32 bits */
#define SSB_PCIE_DMA_H32 0x80000000 /* PCIE Client Mode sb2pcitranslation2 (2 ZettaBytes), high 32 bits */
-#define SSB_EUART (SB_EXTIF_BASE + 0x00800000)
-#define SSB_LED (SB_EXTIF_BASE + 0x00900000)
+#define SSB_EUART (SSB_EXTIF_BASE + 0x00800000)
+#define SSB_LED (SSB_EXTIF_BASE + 0x00900000)
/* Enumeration space constants */

17
target/linux/brcm47xx/profiles/100-Atheros.mk Normal file
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@@ -0,0 +1,17 @@
#
# Copyright (C) 2006 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/Atheros
NAME:=Atheros WiFi (default)
PACKAGES:=kmod-madwifi
endef
define Profile/Atheros/Description
Package set compatible with hardware using Atheros WiFi cards
endef
$(eval $(call Profile,Atheros))

17
target/linux/brcm47xx/profiles/110-None.mk Normal file
View File

@@ -0,0 +1,17 @@
#
# Copyright (C) 2006 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/None
NAME:=No WiFi
PACKAGES:=
endef
define Profile/None/Description
Package set without WiFi support
endef
$(eval $(call Profile,None))

17
target/linux/brcm47xx/profiles/WGT634U.mk Normal file
View File

@@ -0,0 +1,17 @@
#
# Copyright (C) 2006 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/WGT634U
NAME:=Netgear WGT634U
PACKAGES:=kmod-madwifi kmod-usb-core kmod-usb-ohci kmod-usb2
endef
define Profile/WGT634U/Description
Package set compatible with the Netgear WGT634U. Contains USB support
endef
$(eval $(call Profile,WGT634U))

17
target/linux/brcm47xx/profiles/WRTSL54GS.mk Normal file
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@@ -0,0 +1,17 @@
#
# Copyright (C) 2006 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
define Profile/WRTSL54GS
NAME:=Linksys WRTSL54GS
PACKAGES:=kmod-usb-core kmod-usb-ohci kmod-usb2 kmod-usb-storage kmod-scsi-core kmod-fs-ext3 e2fsprogs
endef
define Profile/WRTSL54GS/Description
Package set compatible with the Linksys WRTSL54GS. Contains USB support
endef
$(eval $(call Profile,WRTSL54GS))

1
target/linux/brcm47xx/src Symbolic link
View File

@@ -0,0 +1 @@
../brcm-2.4/src/