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git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-04-21 12:27:27 +03:00
strip the kernel version suffix from target directories, except for brcm-2.4 (the -2.4 will be included in the board name here). CONFIG_LINUX_<ver>_<board> becomes CONFIG_TARGET_<board>, same for profiles.
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8653 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
116
target/linux/brcm63xx/files/arch/mips/bcm963xx/time.c
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116
target/linux/brcm63xx/files/arch/mips/bcm963xx/time.c
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/*
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<:copyright-gpl
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Copyright 2004 Broadcom Corp. All Rights Reserved.
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This program is free software; you can distribute it and/or modify it
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under the terms of the GNU General Public License (Version 2) as
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published by the Free Software Foundation.
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This program is distributed in the hope it will be useful, but WITHOUT
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ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
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:>
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*/
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/*
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* Setup time for Broadcom 963xx MIPS boards
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*/
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#include <linux/autoconf.h>
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#include <linux/init.h>
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#include <linux/kernel_stat.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/time.h>
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#include <linux/timex.h>
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#include <asm/mipsregs.h>
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#include <asm/ptrace.h>
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#include <asm/div64.h>
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#include <asm/time.h>
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#include <6348_map_part.h>
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#include <6348_intr.h>
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#include <bcm_map_part.h>
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#include <bcm_intr.h>
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static unsigned long r4k_offset; /* Amount to increment compare reg each time */
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static unsigned long r4k_cur; /* What counter should be at next timer irq */
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/* *********************************************************************
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* calculateCpuSpeed()
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* Calculate the BCM6348 CPU speed by reading the PLL strap register
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* and applying the following formula:
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* cpu_clk = (.25 * 64MHz freq) * (N1 + 1) * (N2 + 2) / (M1_CPU + 1)
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* Input parameters:
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* none
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* Return value:
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* none
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********************************************************************* */
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static inline unsigned long __init calculateCpuSpeed(void)
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{
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u32 pllStrap = PERF->PllStrap;
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int n1 = (pllStrap & PLL_N1_MASK) >> PLL_N1_SHFT;
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int n2 = (pllStrap & PLL_N2_MASK) >> PLL_N2_SHFT;
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int m1cpu = (pllStrap & PLL_M1_CPU_MASK) >> PLL_M1_CPU_SHFT;
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return (16 * (n1 + 1) * (n2 + 2) / (m1cpu + 1)) * 1000000;
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}
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static inline unsigned long __init cal_r4koff(void)
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{
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mips_hpt_frequency = calculateCpuSpeed() / 2;
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return (mips_hpt_frequency / HZ);
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}
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/*
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* There are a lot of conceptually broken versions of the MIPS timer interrupt
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* handler floating around. This one is rather different, but the algorithm
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* is provably more robust.
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*/
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irqreturn_t brcm_timer_interrupt(struct pt_regs *regs)
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{
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int irq = MIPS_TIMER_INT;
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irq_enter();
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kstat_this_cpu.irqs[irq]++;
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timer_interrupt(irq, regs);
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irq_exit();
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return IRQ_HANDLED;
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}
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void __init brcm_time_init(void)
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{
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unsigned int est_freq, flags;
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local_irq_save(flags);
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printk("calculating r4koff... ");
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r4k_offset = cal_r4koff();
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printk("%08lx(%d)\n", r4k_offset, (int)r4k_offset);
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est_freq = 2 * r4k_offset * HZ;
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est_freq += 5000; /* round */
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est_freq -= est_freq % 10000;
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printk("CPU frequency %d.%02d MHz\n", est_freq / 1000000,
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(est_freq % 1000000) * 100 / 1000000);
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local_irq_restore(flags);
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}
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void __init plat_timer_setup(struct irqaction *irq)
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{
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r4k_cur = (read_c0_count() + r4k_offset);
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write_c0_compare(r4k_cur);
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set_c0_status(IE_IRQ5);
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}
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