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Code

ramips: protect rt288x pci config accesses with a spinlock

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17971 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2009-10-07 11:37:00 +00:00
parent 446ad267cb
commit 184510d772
1 changed files with 15 additions and 0 deletions
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15
target/linux/ramips/files/arch/mips/pci/pci-rt288x.c
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@ -41,6 +41,7 @@
#define PCI_ACCESS_WRITE 1 #define PCI_ACCESS_WRITE 1
static void __iomem *rt2880_pci_base; static void __iomem *rt2880_pci_base;
static DEFINE_SPINLOCK(rt2880_pci_lock);
static u32 rt2880_pci_reg_read(u32 reg) static u32 rt2880_pci_reg_read(u32 reg)
{ {
@ -72,9 +73,12 @@ static void config_access(unsigned char access_type, struct pci_bus *bus,
static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn, static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 *val) int where, int size, u32 *val)
{ {
unsigned long flags;
u32 data = 0; u32 data = 0;
spin_lock_irqsave(&rt2880_pci_lock, flags);
config_access(PCI_ACCESS_READ, bus, devfn, where, &data); config_access(PCI_ACCESS_READ, bus, devfn, where, &data);
spin_unlock_irqrestore(&rt2880_pci_lock, flags);
if (size == 1) if (size == 1)
*val = (data >> ((where & 3) << 3)) & 0xff; *val = (data >> ((where & 3) << 3)) & 0xff;
@ -89,8 +93,10 @@ static int rt2880_pci_config_read(struct pci_bus *bus, unsigned int devfn,
static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn, static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
int where, int size, u32 val) int where, int size, u32 val)
{ {
unsigned long flags;
u32 data = 0; u32 data = 0;
spin_lock_irqsave(&rt2880_pci_lock, flags);
if (size == 4) { if (size == 4) {
data = val; data = val;
} else { } else {
@ -104,6 +110,7 @@ static int rt2880_pci_config_write(struct pci_bus *bus, unsigned int devfn,
} }
config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data); config_access(PCI_ACCESS_WRITE, bus, devfn, where, &data);
spin_unlock_irqrestore(&rt2880_pci_lock, flags);
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
} }
@ -138,11 +145,15 @@ static inline void read_config(unsigned long bus, unsigned long dev,
unsigned long *val) unsigned long *val)
{ {
unsigned long address; unsigned long address;
unsigned long flags;
address = (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) | address = (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) |
0x80000000; 0x80000000;
spin_lock_irqsave(&rt2880_pci_lock, flags);
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR); rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
*val = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA); *val = rt2880_pci_reg_read(RT2880_PCI_REG_CONFIG_DATA);
spin_unlock_irqrestore(&rt2880_pci_lock, flags);
} }
static inline void write_config(unsigned long bus, unsigned long dev, static inline void write_config(unsigned long bus, unsigned long dev,
@ -150,11 +161,15 @@ static inline void write_config(unsigned long bus, unsigned long dev,
unsigned long val) unsigned long val)
{ {
unsigned long address; unsigned long address;
unsigned long flags;
address = (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) | address = (bus << 16) | (dev << 11) | (func << 8) | (reg & 0xfc) |
0x80000000; 0x80000000;
spin_lock_irqsave(&rt2880_pci_lock, flags);
rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR); rt2880_pci_reg_write(address, RT2880_PCI_REG_CONFIG_ADDR);
rt2880_pci_reg_write(val, RT2880_PCI_REG_CONFIG_DATA); rt2880_pci_reg_write(val, RT2880_PCI_REG_CONFIG_DATA);
spin_unlock_irqrestore(&rt2880_pci_lock, flags);
} }
int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)