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[rdc] fix wrong logic in MDIO code and second PHY address

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@15034 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
florian 2009-03-25 09:15:30 +00:00
parent 34138263a9
commit 1a1d7c04d5
1 changed files with 3 additions and 3 deletions
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6
target/linux/rdc/files/drivers/net/r6040.c
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@ -91,7 +91,7 @@ MODULE_PARM_DESC(debug, "debug mask (-1 for all)");
/* PHY CHIP Address */ /* PHY CHIP Address */
#define PHY1_ADDR 1 /* For MAC1 */ #define PHY1_ADDR 1 /* For MAC1 */
#define PHY2_ADDR 2 /* For MAC2 */ #define PHY2_ADDR 3 /* For MAC2 */
#define PHY_MODE 0x3100 /* PHY CHIP Register 0 */ #define PHY_MODE 0x3100 /* PHY CHIP Register 0 */
#define PHY_CAP 0x01E1 /* PHY CHIP Register 4 */ #define PHY_CAP 0x01E1 /* PHY CHIP Register 4 */
@ -305,7 +305,7 @@ STATIC int phy_read(void __iomem *ioaddr, int phy_addr, int reg)
/* Wait for the read bit to be cleared */ /* Wait for the read bit to be cleared */
while (limit--) { while (limit--) {
cmd = ioread16(ioaddr + MMDIO); cmd = ioread16(ioaddr + MMDIO);
if (cmd & MDIO_READ) if (!(cmd & MDIO_READ))
break; break;
} }
@ -333,7 +333,7 @@ STATIC void phy_write(void __iomem *ioaddr, int phy_addr, int reg, u16 val)
/* Wait for the write bit to be cleared */ /* Wait for the write bit to be cleared */
while (limit--) { while (limit--) {
cmd = ioread16(ioaddr + MMDIO); cmd = ioread16(ioaddr + MMDIO);
if (cmd & MDIO_WRITE) if (!(cmd & MDIO_WRITE))
break; break;
} }
if (limit <= 0) if (limit <= 0)