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git://projects.qi-hardware.com/openwrt-xburst.git
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ar71xx: update 3.3 patches
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31602 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
parent
c39d550e2f
commit
1c9cad5dce
@ -0,0 +1,293 @@
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From be77ba57151bd35ce63ccf52d74b6c626fa73817 Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Tue, 13 Mar 2012 01:04:47 +0100
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Subject: [PATCH 01/47] USB: OHCI: Add a generic platform device driver
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This adds a generic driver for platform devices. It works like the PCI
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driver and is based on it. This is for devices which do not have an own
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bus but their OHCI controller works like a PCI controller. It will be
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used for the Broadcom bcma and ssb USB OHCI controller.
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Acked-by: Alan Stern <stern@rowland.harvard.edu>
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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---
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drivers/usb/host/Kconfig | 10 ++
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drivers/usb/host/ohci-hcd.c | 5 +
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drivers/usb/host/ohci-platform.c | 194 ++++++++++++++++++++++++++++++++++++++
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include/linux/usb/ohci_pdriver.h | 38 ++++++++
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4 files changed, 247 insertions(+), 0 deletions(-)
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create mode 100644 drivers/usb/host/ohci-platform.c
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create mode 100644 include/linux/usb/ohci_pdriver.h
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--- a/drivers/usb/host/Kconfig
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+++ b/drivers/usb/host/Kconfig
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@@ -393,6 +393,16 @@ config USB_CNS3XXX_OHCI
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Enable support for the CNS3XXX SOC's on-chip OHCI controller.
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It is needed for low-speed USB 1.0 device support.
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+config USB_OHCI_HCD_PLATFORM
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+ bool "Generic OHCI driver for a platform device"
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+ depends on USB_OHCI_HCD && EXPERIMENTAL
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+ default n
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+ ---help---
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+ Adds an OHCI host driver for a generic platform device, which
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+ provieds a memory space and an irq.
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+
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+ If unsure, say N.
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+
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config USB_OHCI_BIG_ENDIAN_DESC
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bool
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depends on USB_OHCI_HCD
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--- a/drivers/usb/host/ohci-hcd.c
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+++ b/drivers/usb/host/ohci-hcd.c
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@@ -1121,6 +1121,11 @@ MODULE_LICENSE ("GPL");
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#define PLATFORM_DRIVER ohci_xls_driver
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#endif
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+#ifdef CONFIG_USB_OHCI_HCD_PLATFORM
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+#include "ohci-platform.c"
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+#define PLATFORM_DRIVER ohci_platform_driver
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+#endif
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+
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#if !defined(PCI_DRIVER) && \
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!defined(PLATFORM_DRIVER) && \
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!defined(OMAP1_PLATFORM_DRIVER) && \
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--- /dev/null
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+++ b/drivers/usb/host/ohci-platform.c
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@@ -0,0 +1,194 @@
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+/*
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+ * Generic platform ohci driver
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+ *
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+ * Copyright 2007 Michael Buesch <m@bues.ch>
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+ * Copyright 2011-2012 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * Derived from the OCHI-SSB driver
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+ * Derived from the OHCI-PCI driver
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+ * Copyright 1999 Roman Weissgaerber
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+ * Copyright 2000-2002 David Brownell
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+ * Copyright 1999 Linus Torvalds
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+ * Copyright 1999 Gregory P. Smith
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+ *
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+ * Licensed under the GNU/GPL. See COPYING for details.
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+ */
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+#include <linux/platform_device.h>
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+#include <linux/usb/ohci_pdriver.h>
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+
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+static int ohci_platform_reset(struct usb_hcd *hcd)
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+{
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+ struct platform_device *pdev = to_platform_device(hcd->self.controller);
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+ struct usb_ohci_pdata *pdata = pdev->dev.platform_data;
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+ struct ohci_hcd *ohci = hcd_to_ohci(hcd);
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+ int err;
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+
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+ if (pdata->big_endian_desc)
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+ ohci->flags |= OHCI_QUIRK_BE_DESC;
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+ if (pdata->big_endian_mmio)
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+ ohci->flags |= OHCI_QUIRK_BE_MMIO;
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+ if (pdata->no_big_frame_no)
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+ ohci->flags |= OHCI_QUIRK_FRAME_NO;
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+
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+ ohci_hcd_init(ohci);
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+ err = ohci_init(ohci);
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+
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+ return err;
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+}
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+
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+static int ohci_platform_start(struct usb_hcd *hcd)
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+{
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+ struct ohci_hcd *ohci = hcd_to_ohci(hcd);
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+ int err;
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+
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+ err = ohci_run(ohci);
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+ if (err < 0) {
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+ ohci_err(ohci, "can't start\n");
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+ ohci_stop(hcd);
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+ }
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+
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+ return err;
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+}
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+
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+static const struct hc_driver ohci_platform_hc_driver = {
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+ .description = hcd_name,
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+ .product_desc = "Generic Platform OHCI Controller",
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+ .hcd_priv_size = sizeof(struct ohci_hcd),
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+
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+ .irq = ohci_irq,
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+ .flags = HCD_MEMORY | HCD_USB11,
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+
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+ .reset = ohci_platform_reset,
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+ .start = ohci_platform_start,
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+ .stop = ohci_stop,
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+ .shutdown = ohci_shutdown,
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+
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+ .urb_enqueue = ohci_urb_enqueue,
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+ .urb_dequeue = ohci_urb_dequeue,
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+ .endpoint_disable = ohci_endpoint_disable,
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+
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+ .get_frame_number = ohci_get_frame,
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+
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+ .hub_status_data = ohci_hub_status_data,
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+ .hub_control = ohci_hub_control,
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+#ifdef CONFIG_PM
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+ .bus_suspend = ohci_bus_suspend,
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+ .bus_resume = ohci_bus_resume,
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+#endif
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+
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+ .start_port_reset = ohci_start_port_reset,
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+};
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+
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+static int __devinit ohci_platform_probe(struct platform_device *dev)
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+{
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+ struct usb_hcd *hcd;
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+ struct resource *res_mem;
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+ int irq;
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+ int err = -ENOMEM;
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+
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+ BUG_ON(!dev->dev.platform_data);
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+
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+ if (usb_disabled())
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+ return -ENODEV;
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+
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+ irq = platform_get_irq(dev, 0);
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+ if (irq < 0) {
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+ pr_err("no irq provieded");
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+ return irq;
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+ }
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+
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+ res_mem = platform_get_resource(dev, IORESOURCE_MEM, 0);
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+ if (!res_mem) {
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+ pr_err("no memory recourse provieded");
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+ return -ENXIO;
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+ }
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+
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+ hcd = usb_create_hcd(&ohci_platform_hc_driver, &dev->dev,
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+ dev_name(&dev->dev));
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+ if (!hcd)
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+ return -ENOMEM;
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+
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+ hcd->rsrc_start = res_mem->start;
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+ hcd->rsrc_len = resource_size(res_mem);
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+
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+ if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
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+ pr_err("controller already in use");
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+ err = -EBUSY;
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+ goto err_put_hcd;
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+ }
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+
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+ hcd->regs = ioremap_nocache(hcd->rsrc_start, hcd->rsrc_len);
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+ if (!hcd->regs)
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+ goto err_release_region;
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+ err = usb_add_hcd(hcd, irq, IRQF_SHARED);
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+ if (err)
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+ goto err_iounmap;
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+
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+ platform_set_drvdata(dev, hcd);
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+
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+ return err;
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+
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+err_iounmap:
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+ iounmap(hcd->regs);
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+err_release_region:
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+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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+err_put_hcd:
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+ usb_put_hcd(hcd);
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+ return err;
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+}
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+
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+static int __devexit ohci_platform_remove(struct platform_device *dev)
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+{
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+ struct usb_hcd *hcd = platform_get_drvdata(dev);
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+
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+ usb_remove_hcd(hcd);
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+ iounmap(hcd->regs);
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+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
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+ usb_put_hcd(hcd);
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+ platform_set_drvdata(dev, NULL);
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+
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+ return 0;
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+}
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+
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+#ifdef CONFIG_PM
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+
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+static int ohci_platform_suspend(struct device *dev)
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+{
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+ return 0;
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+}
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+
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+static int ohci_platform_resume(struct device *dev)
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+{
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+ struct usb_hcd *hcd = dev_get_drvdata(dev);
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+
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+ ohci_finish_controller_resume(hcd);
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+ return 0;
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+}
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+
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+#else /* !CONFIG_PM */
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+#define ohci_platform_suspend NULL
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+#define ohci_platform_resume NULL
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+#endif /* CONFIG_PM */
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+
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+static const struct platform_device_id ohci_platform_table[] = {
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+ { "ohci-platform", 0 },
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+ { }
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+};
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+MODULE_DEVICE_TABLE(platform, ohci_platform_table);
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+
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+static const struct dev_pm_ops ohci_platform_pm_ops = {
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+ .suspend = ohci_platform_suspend,
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+ .resume = ohci_platform_resume,
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+};
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+
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+static struct platform_driver ohci_platform_driver = {
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+ .id_table = ohci_platform_table,
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+ .probe = ohci_platform_probe,
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+ .remove = __devexit_p(ohci_platform_remove),
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+ .shutdown = usb_hcd_platform_shutdown,
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+ .driver = {
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+ .owner = THIS_MODULE,
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+ .name = "ohci-platform",
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+ .pm = &ohci_platform_pm_ops,
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+ }
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+};
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--- /dev/null
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+++ b/include/linux/usb/ohci_pdriver.h
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@@ -0,0 +1,38 @@
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+/*
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+ * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de>
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+ *
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+ * This program is free software; you can redistribute it and/or modify it
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+ * under the terms of the GNU General Public License as published by the
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+ * Free Software Foundation; either version 2 of the License, or (at your
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+ * option) any later version.
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+ *
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+ * This program is distributed in the hope that it will be useful, but
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+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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+ * for more details.
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+ *
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+ * You should have received a copy of the GNU General Public License
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+ * along with this program; if not, write to the Free Software Foundation,
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+ * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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+ */
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+
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+#ifndef __USB_CORE_OHCI_PDRIVER_H
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+#define __USB_CORE_OHCI_PDRIVER_H
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+
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+/**
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+ * struct usb_ohci_pdata - platform_data for generic ohci driver
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+ *
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+ * @big_endian_desc: BE descriptors
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+ * @big_endian_mmio: BE registers
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+ * @no_big_frame_no: no big endian frame_no shift
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+ *
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+ * These are general configuration options for the OHCI controller. All of
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+ * these options are activating more or less workarounds for some hardware.
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+ */
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+struct usb_ohci_pdata {
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+ unsigned big_endian_desc:1;
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+ unsigned big_endian_mmio:1;
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+ unsigned no_big_frame_no:1;
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+};
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+
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+#endif /* __USB_CORE_OHCI_PDRIVER_H */
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@ -0,0 +1,305 @@
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From 4fa3face95f1ca2e396dd59324a6c6ef01df24cc Mon Sep 17 00:00:00 2001
|
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|
From: Hauke Mehrtens <hauke@hauke-m.de>
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|
Date: Tue, 13 Mar 2012 01:04:48 +0100
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|
Subject: [PATCH 02/47] USB: EHCI: Add a generic platform device driver
|
||||||
|
|
||||||
|
This adds a generic driver for platform devices. It works like the PCI
|
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|
driver and is based on it. This is for devices which do not have an own
|
||||||
|
bus but their EHCI controller works like a PCI controller. It will be
|
||||||
|
used for the Broadcom bcma and ssb USB EHCI controller.
|
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|
|
||||||
|
Acked-by: Alan Stern <stern@rowland.harvard.edu>
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||||||
|
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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|
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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|
---
|
||||||
|
drivers/usb/host/Kconfig | 10 ++
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drivers/usb/host/ehci-hcd.c | 5 +
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|
drivers/usb/host/ehci-platform.c | 198 ++++++++++++++++++++++++++++++++++++++
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|
include/linux/usb/ehci_pdriver.h | 46 +++++++++
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4 files changed, 259 insertions(+), 0 deletions(-)
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create mode 100644 drivers/usb/host/ehci-platform.c
|
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create mode 100644 include/linux/usb/ehci_pdriver.h
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|
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--- a/drivers/usb/host/Kconfig
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+++ b/drivers/usb/host/Kconfig
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@@ -403,6 +403,16 @@ config USB_OHCI_HCD_PLATFORM
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|
|
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If unsure, say N.
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|
|
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+config USB_EHCI_HCD_PLATFORM
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+ bool "Generic EHCI driver for a platform device"
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+ depends on USB_EHCI_HCD && EXPERIMENTAL
|
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|
+ default n
|
||||||
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+ ---help---
|
||||||
|
+ Adds an EHCI host driver for a generic platform device, which
|
||||||
|
+ provieds a memory space and an irq.
|
||||||
|
+
|
||||||
|
+ If unsure, say N.
|
||||||
|
+
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|
config USB_OHCI_BIG_ENDIAN_DESC
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|
bool
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||||||
|
depends on USB_OHCI_HCD
|
||||||
|
--- a/drivers/usb/host/ehci-hcd.c
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+++ b/drivers/usb/host/ehci-hcd.c
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@@ -1381,6 +1381,11 @@ MODULE_LICENSE ("GPL");
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#define PLATFORM_DRIVER ehci_mv_driver
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|
#endif
|
||||||
|
|
||||||
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+#ifdef CONFIG_USB_EHCI_HCD_PLATFORM
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+#include "ehci-platform.c"
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+#define PLATFORM_DRIVER ehci_platform_driver
|
||||||
|
+#endif
|
||||||
|
+
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||||||
|
#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \
|
||||||
|
!defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) && \
|
||||||
|
!defined(XILINX_OF_PLATFORM_DRIVER)
|
||||||
|
--- /dev/null
|
||||||
|
+++ b/drivers/usb/host/ehci-platform.c
|
||||||
|
@@ -0,0 +1,198 @@
|
||||||
|
+/*
|
||||||
|
+ * Generic platform ehci driver
|
||||||
|
+ *
|
||||||
|
+ * Copyright 2007 Steven Brown <sbrown@cortland.com>
|
||||||
|
+ * Copyright 2010-2012 Hauke Mehrtens <hauke@hauke-m.de>
|
||||||
|
+ *
|
||||||
|
+ * Derived from the ohci-ssb driver
|
||||||
|
+ * Copyright 2007 Michael Buesch <m@bues.ch>
|
||||||
|
+ *
|
||||||
|
+ * Derived from the EHCI-PCI driver
|
||||||
|
+ * Copyright (c) 2000-2004 by David Brownell
|
||||||
|
+ *
|
||||||
|
+ * Derived from the ohci-pci driver
|
||||||
|
+ * Copyright 1999 Roman Weissgaerber
|
||||||
|
+ * Copyright 2000-2002 David Brownell
|
||||||
|
+ * Copyright 1999 Linus Torvalds
|
||||||
|
+ * Copyright 1999 Gregory P. Smith
|
||||||
|
+ *
|
||||||
|
+ * Licensed under the GNU/GPL. See COPYING for details.
|
||||||
|
+ */
|
||||||
|
+#include <linux/platform_device.h>
|
||||||
|
+#include <linux/usb/ehci_pdriver.h>
|
||||||
|
+
|
||||||
|
+static int ehci_platform_reset(struct usb_hcd *hcd)
|
||||||
|
+{
|
||||||
|
+ struct platform_device *pdev = to_platform_device(hcd->self.controller);
|
||||||
|
+ struct usb_ehci_pdata *pdata = pdev->dev.platform_data;
|
||||||
|
+ struct ehci_hcd *ehci = hcd_to_ehci(hcd);
|
||||||
|
+ int retval;
|
||||||
|
+
|
||||||
|
+ hcd->has_tt = pdata->has_tt;
|
||||||
|
+ ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug;
|
||||||
|
+ ehci->big_endian_desc = pdata->big_endian_desc;
|
||||||
|
+ ehci->big_endian_mmio = pdata->big_endian_mmio;
|
||||||
|
+
|
||||||
|
+ ehci->caps = hcd->regs + pdata->caps_offset;
|
||||||
|
+ retval = ehci_setup(hcd);
|
||||||
|
+ if (retval)
|
||||||
|
+ return retval;
|
||||||
|
+
|
||||||
|
+ if (pdata->port_power_on)
|
||||||
|
+ ehci_port_power(ehci, 1);
|
||||||
|
+ if (pdata->port_power_off)
|
||||||
|
+ ehci_port_power(ehci, 0);
|
||||||
|
+
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static const struct hc_driver ehci_platform_hc_driver = {
|
||||||
|
+ .description = hcd_name,
|
||||||
|
+ .product_desc = "Generic Platform EHCI Controller",
|
||||||
|
+ .hcd_priv_size = sizeof(struct ehci_hcd),
|
||||||
|
+
|
||||||
|
+ .irq = ehci_irq,
|
||||||
|
+ .flags = HCD_MEMORY | HCD_USB2,
|
||||||
|
+
|
||||||
|
+ .reset = ehci_platform_reset,
|
||||||
|
+ .start = ehci_run,
|
||||||
|
+ .stop = ehci_stop,
|
||||||
|
+ .shutdown = ehci_shutdown,
|
||||||
|
+
|
||||||
|
+ .urb_enqueue = ehci_urb_enqueue,
|
||||||
|
+ .urb_dequeue = ehci_urb_dequeue,
|
||||||
|
+ .endpoint_disable = ehci_endpoint_disable,
|
||||||
|
+ .endpoint_reset = ehci_endpoint_reset,
|
||||||
|
+
|
||||||
|
+ .get_frame_number = ehci_get_frame,
|
||||||
|
+
|
||||||
|
+ .hub_status_data = ehci_hub_status_data,
|
||||||
|
+ .hub_control = ehci_hub_control,
|
||||||
|
+#if defined(CONFIG_PM)
|
||||||
|
+ .bus_suspend = ehci_bus_suspend,
|
||||||
|
+ .bus_resume = ehci_bus_resume,
|
||||||
|
+#endif
|
||||||
|
+ .relinquish_port = ehci_relinquish_port,
|
||||||
|
+ .port_handed_over = ehci_port_handed_over,
|
||||||
|
+
|
||||||
|
+ .update_device = ehci_update_device,
|
||||||
|
+
|
||||||
|
+ .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+static int __devinit ehci_platform_probe(struct platform_device *dev)
|
||||||
|
+{
|
||||||
|
+ struct usb_hcd *hcd;
|
||||||
|
+ struct resource *res_mem;
|
||||||
|
+ int irq;
|
||||||
|
+ int err = -ENOMEM;
|
||||||
|
+
|
||||||
|
+ BUG_ON(!dev->dev.platform_data);
|
||||||
|
+
|
||||||
|
+ if (usb_disabled())
|
||||||
|
+ return -ENODEV;
|
||||||
|
+
|
||||||
|
+ irq = platform_get_irq(dev, 0);
|
||||||
|
+ if (irq < 0) {
|
||||||
|
+ pr_err("no irq provieded");
|
||||||
|
+ return irq;
|
||||||
|
+ }
|
||||||
|
+ res_mem = platform_get_resource(dev, IORESOURCE_MEM, 0);
|
||||||
|
+ if (!res_mem) {
|
||||||
|
+ pr_err("no memory recourse provieded");
|
||||||
|
+ return -ENXIO;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ hcd = usb_create_hcd(&ehci_platform_hc_driver, &dev->dev,
|
||||||
|
+ dev_name(&dev->dev));
|
||||||
|
+ if (!hcd)
|
||||||
|
+ return -ENOMEM;
|
||||||
|
+
|
||||||
|
+ hcd->rsrc_start = res_mem->start;
|
||||||
|
+ hcd->rsrc_len = resource_size(res_mem);
|
||||||
|
+
|
||||||
|
+ if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
|
||||||
|
+ pr_err("controller already in use");
|
||||||
|
+ err = -EBUSY;
|
||||||
|
+ goto err_put_hcd;
|
||||||
|
+ }
|
||||||
|
+
|
||||||
|
+ hcd->regs = ioremap_nocache(hcd->rsrc_start, hcd->rsrc_len);
|
||||||
|
+ if (!hcd->regs)
|
||||||
|
+ goto err_release_region;
|
||||||
|
+ err = usb_add_hcd(hcd, irq, IRQF_SHARED);
|
||||||
|
+ if (err)
|
||||||
|
+ goto err_iounmap;
|
||||||
|
+
|
||||||
|
+ platform_set_drvdata(dev, hcd);
|
||||||
|
+
|
||||||
|
+ return err;
|
||||||
|
+
|
||||||
|
+err_iounmap:
|
||||||
|
+ iounmap(hcd->regs);
|
||||||
|
+err_release_region:
|
||||||
|
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
|
||||||
|
+err_put_hcd:
|
||||||
|
+ usb_put_hcd(hcd);
|
||||||
|
+ return err;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int __devexit ehci_platform_remove(struct platform_device *dev)
|
||||||
|
+{
|
||||||
|
+ struct usb_hcd *hcd = platform_get_drvdata(dev);
|
||||||
|
+
|
||||||
|
+ usb_remove_hcd(hcd);
|
||||||
|
+ iounmap(hcd->regs);
|
||||||
|
+ release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
|
||||||
|
+ usb_put_hcd(hcd);
|
||||||
|
+ platform_set_drvdata(dev, NULL);
|
||||||
|
+
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+#ifdef CONFIG_PM
|
||||||
|
+
|
||||||
|
+static int ehci_platform_suspend(struct device *dev)
|
||||||
|
+{
|
||||||
|
+ struct usb_hcd *hcd = dev_get_drvdata(dev);
|
||||||
|
+ bool wakeup = device_may_wakeup(dev);
|
||||||
|
+
|
||||||
|
+ ehci_prepare_ports_for_controller_suspend(hcd_to_ehci(hcd), wakeup);
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+static int ehci_platform_resume(struct device *dev)
|
||||||
|
+{
|
||||||
|
+ struct usb_hcd *hcd = dev_get_drvdata(dev);
|
||||||
|
+
|
||||||
|
+ ehci_prepare_ports_for_controller_resume(hcd_to_ehci(hcd));
|
||||||
|
+ return 0;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
+#else /* !CONFIG_PM */
|
||||||
|
+#define ehci_platform_suspend NULL
|
||||||
|
+#define ehci_platform_resume NULL
|
||||||
|
+#endif /* CONFIG_PM */
|
||||||
|
+
|
||||||
|
+static const struct platform_device_id ehci_platform_table[] = {
|
||||||
|
+ { "ehci-platform", 0 },
|
||||||
|
+ { }
|
||||||
|
+};
|
||||||
|
+MODULE_DEVICE_TABLE(platform, ehci_platform_table);
|
||||||
|
+
|
||||||
|
+static const struct dev_pm_ops ehci_platform_pm_ops = {
|
||||||
|
+ .suspend = ehci_platform_suspend,
|
||||||
|
+ .resume = ehci_platform_resume,
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+static struct platform_driver ehci_platform_driver = {
|
||||||
|
+ .id_table = ehci_platform_table,
|
||||||
|
+ .probe = ehci_platform_probe,
|
||||||
|
+ .remove = __devexit_p(ehci_platform_remove),
|
||||||
|
+ .shutdown = usb_hcd_platform_shutdown,
|
||||||
|
+ .driver = {
|
||||||
|
+ .owner = THIS_MODULE,
|
||||||
|
+ .name = "ehci-platform",
|
||||||
|
+ .pm = &ehci_platform_pm_ops,
|
||||||
|
+ }
|
||||||
|
+};
|
||||||
|
--- /dev/null
|
||||||
|
+++ b/include/linux/usb/ehci_pdriver.h
|
||||||
|
@@ -0,0 +1,46 @@
|
||||||
|
+/*
|
||||||
|
+ * Copyright (C) 2012 Hauke Mehrtens <hauke@hauke-m.de>
|
||||||
|
+ *
|
||||||
|
+ * This program is free software; you can redistribute it and/or modify it
|
||||||
|
+ * under the terms of the GNU General Public License as published by the
|
||||||
|
+ * Free Software Foundation; either version 2 of the License, or (at your
|
||||||
|
+ * option) any later version.
|
||||||
|
+ *
|
||||||
|
+ * This program is distributed in the hope that it will be useful, but
|
||||||
|
+ * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
|
||||||
|
+ * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||||
|
+ * for more details.
|
||||||
|
+ *
|
||||||
|
+ * You should have received a copy of the GNU General Public License
|
||||||
|
+ * along with this program; if not, write to the Free Software Foundation,
|
||||||
|
+ * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||||
|
+ */
|
||||||
|
+
|
||||||
|
+#ifndef __USB_CORE_EHCI_PDRIVER_H
|
||||||
|
+#define __USB_CORE_EHCI_PDRIVER_H
|
||||||
|
+
|
||||||
|
+/**
|
||||||
|
+ * struct usb_ehci_pdata - platform_data for generic ehci driver
|
||||||
|
+ *
|
||||||
|
+ * @caps_offset: offset of the EHCI Capability Registers to the start of
|
||||||
|
+ * the io memory region provided to the driver.
|
||||||
|
+ * @has_tt: set to 1 if TT is integrated in root hub.
|
||||||
|
+ * @port_power_on: set to 1 if the controller needs a power up after
|
||||||
|
+ * initialization.
|
||||||
|
+ * @port_power_off: set to 1 if the controller needs to be powered down
|
||||||
|
+ * after initialization.
|
||||||
|
+ *
|
||||||
|
+ * These are general configuration options for the EHCI controller. All of
|
||||||
|
+ * these options are activating more or less workarounds for some hardware.
|
||||||
|
+ */
|
||||||
|
+struct usb_ehci_pdata {
|
||||||
|
+ int caps_offset;
|
||||||
|
+ unsigned has_tt:1;
|
||||||
|
+ unsigned has_synopsys_hc_bug:1;
|
||||||
|
+ unsigned big_endian_desc:1;
|
||||||
|
+ unsigned big_endian_mmio:1;
|
||||||
|
+ unsigned port_power_on:1;
|
||||||
|
+ unsigned port_power_off:1;
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+#endif /* __USB_CORE_EHCI_PDRIVER_H */
|
||||||
@ -0,0 +1,544 @@
|
|||||||
|
From dbcbcdd001c5943adbb18db3b8f0dafc405559eb Mon Sep 17 00:00:00 2001
|
||||||
|
From: Hauke Mehrtens <hauke@hauke-m.de>
|
||||||
|
Date: Tue, 13 Mar 2012 01:04:53 +0100
|
||||||
|
Subject: [PATCH 03/47] USB: use generic platform driver on ath79
|
||||||
|
|
||||||
|
The ath79 usb driver doesn't do anything special and is now converted
|
||||||
|
to the generic ehci and ohci driver.
|
||||||
|
This was tested on a TP-Link TL-WR1043ND (AR9132)
|
||||||
|
|
||||||
|
Acked-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
CC: Imre Kaloz <kaloz@openwrt.org>
|
||||||
|
CC: linux-mips@linux-mips.org
|
||||||
|
CC: Ralf Baechle <ralf@linux-mips.org>
|
||||||
|
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
|
||||||
|
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
|
||||||
|
---
|
||||||
|
arch/mips/ath79/dev-usb.c | 31 +++++-
|
||||||
|
drivers/usb/host/Kconfig | 12 ++-
|
||||||
|
drivers/usb/host/ehci-ath79.c | 208 -----------------------------------------
|
||||||
|
drivers/usb/host/ehci-hcd.c | 5 -
|
||||||
|
drivers/usb/host/ohci-ath79.c | 151 -----------------------------
|
||||||
|
drivers/usb/host/ohci-hcd.c | 5 -
|
||||||
|
6 files changed, 35 insertions(+), 377 deletions(-)
|
||||||
|
delete mode 100644 drivers/usb/host/ehci-ath79.c
|
||||||
|
delete mode 100644 drivers/usb/host/ohci-ath79.c
|
||||||
|
|
||||||
|
--- a/arch/mips/ath79/dev-usb.c
|
||||||
|
+++ b/arch/mips/ath79/dev-usb.c
|
||||||
|
@@ -17,6 +17,8 @@
|
||||||
|
#include <linux/irq.h>
|
||||||
|
#include <linux/dma-mapping.h>
|
||||||
|
#include <linux/platform_device.h>
|
||||||
|
+#include <linux/usb/ehci_pdriver.h>
|
||||||
|
+#include <linux/usb/ohci_pdriver.h>
|
||||||
|
|
||||||
|
#include <asm/mach-ath79/ath79.h>
|
||||||
|
#include <asm/mach-ath79/ar71xx_regs.h>
|
||||||
|
@@ -36,14 +38,19 @@ static struct resource ath79_ohci_resour
|
||||||
|
};
|
||||||
|
|
||||||
|
static u64 ath79_ohci_dmamask = DMA_BIT_MASK(32);
|
||||||
|
+
|
||||||
|
+static struct usb_ohci_pdata ath79_ohci_pdata = {
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
static struct platform_device ath79_ohci_device = {
|
||||||
|
- .name = "ath79-ohci",
|
||||||
|
+ .name = "ohci-platform",
|
||||||
|
.id = -1,
|
||||||
|
.resource = ath79_ohci_resources,
|
||||||
|
.num_resources = ARRAY_SIZE(ath79_ohci_resources),
|
||||||
|
.dev = {
|
||||||
|
.dma_mask = &ath79_ohci_dmamask,
|
||||||
|
.coherent_dma_mask = DMA_BIT_MASK(32),
|
||||||
|
+ .platform_data = &ath79_ohci_pdata,
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
@@ -60,8 +67,20 @@ static struct resource ath79_ehci_resour
|
||||||
|
};
|
||||||
|
|
||||||
|
static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32);
|
||||||
|
+
|
||||||
|
+static struct usb_ehci_pdata ath79_ehci_pdata_v1 = {
|
||||||
|
+ .has_synopsys_hc_bug = 1,
|
||||||
|
+ .port_power_off = 1,
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
+static struct usb_ehci_pdata ath79_ehci_pdata_v2 = {
|
||||||
|
+ .caps_offset = 0x100,
|
||||||
|
+ .has_tt = 1,
|
||||||
|
+ .port_power_off = 1,
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
static struct platform_device ath79_ehci_device = {
|
||||||
|
- .name = "ath79-ehci",
|
||||||
|
+ .name = "ehci-platform",
|
||||||
|
.id = -1,
|
||||||
|
.resource = ath79_ehci_resources,
|
||||||
|
.num_resources = ARRAY_SIZE(ath79_ehci_resources),
|
||||||
|
@@ -101,7 +120,7 @@ static void __init ath79_usb_setup(void)
|
||||||
|
|
||||||
|
ath79_ehci_resources[0].start = AR71XX_EHCI_BASE;
|
||||||
|
ath79_ehci_resources[0].end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1;
|
||||||
|
- ath79_ehci_device.name = "ar71xx-ehci";
|
||||||
|
+ ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v1;
|
||||||
|
platform_device_register(&ath79_ehci_device);
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -142,7 +161,7 @@ static void __init ar724x_usb_setup(void
|
||||||
|
|
||||||
|
ath79_ehci_resources[0].start = AR724X_EHCI_BASE;
|
||||||
|
ath79_ehci_resources[0].end = AR724X_EHCI_BASE + AR724X_EHCI_SIZE - 1;
|
||||||
|
- ath79_ehci_device.name = "ar724x-ehci";
|
||||||
|
+ ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
|
||||||
|
platform_device_register(&ath79_ehci_device);
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -159,7 +178,7 @@ static void __init ar913x_usb_setup(void
|
||||||
|
|
||||||
|
ath79_ehci_resources[0].start = AR913X_EHCI_BASE;
|
||||||
|
ath79_ehci_resources[0].end = AR913X_EHCI_BASE + AR913X_EHCI_SIZE - 1;
|
||||||
|
- ath79_ehci_device.name = "ar913x-ehci";
|
||||||
|
+ ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
|
||||||
|
platform_device_register(&ath79_ehci_device);
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -176,7 +195,7 @@ static void __init ar933x_usb_setup(void
|
||||||
|
|
||||||
|
ath79_ehci_resources[0].start = AR933X_EHCI_BASE;
|
||||||
|
ath79_ehci_resources[0].end = AR933X_EHCI_BASE + AR933X_EHCI_SIZE - 1;
|
||||||
|
- ath79_ehci_device.name = "ar933x-ehci";
|
||||||
|
+ ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
|
||||||
|
platform_device_register(&ath79_ehci_device);
|
||||||
|
}
|
||||||
|
|
||||||
|
--- a/drivers/usb/host/Kconfig
|
||||||
|
+++ b/drivers/usb/host/Kconfig
|
||||||
|
@@ -218,11 +218,15 @@ config USB_CNS3XXX_EHCI
|
||||||
|
support.
|
||||||
|
|
||||||
|
config USB_EHCI_ATH79
|
||||||
|
- bool "EHCI support for AR7XXX/AR9XXX SoCs"
|
||||||
|
+ bool "EHCI support for AR7XXX/AR9XXX SoCs (DEPRECATED)"
|
||||||
|
depends on USB_EHCI_HCD && (SOC_AR71XX || SOC_AR724X || SOC_AR913X || SOC_AR933X)
|
||||||
|
select USB_EHCI_ROOT_HUB_TT
|
||||||
|
+ select USB_EHCI_HCD_PLATFORM
|
||||||
|
default y
|
||||||
|
---help---
|
||||||
|
+ This option is deprecated now and the driver was removed, use
|
||||||
|
+ USB_EHCI_HCD_PLATFORM instead.
|
||||||
|
+
|
||||||
|
Enables support for the built-in EHCI controller present
|
||||||
|
on the Atheros AR7XXX/AR9XXX SoCs.
|
||||||
|
|
||||||
|
@@ -312,10 +316,14 @@ config USB_OHCI_HCD_OMAP3
|
||||||
|
OMAP3 and later chips.
|
||||||
|
|
||||||
|
config USB_OHCI_ATH79
|
||||||
|
- bool "USB OHCI support for the Atheros AR71XX/AR7240 SoCs"
|
||||||
|
+ bool "USB OHCI support for the Atheros AR71XX/AR7240 SoCs (DEPRECATED)"
|
||||||
|
depends on USB_OHCI_HCD && (SOC_AR71XX || SOC_AR724X)
|
||||||
|
+ select USB_OHCI_HCD_PLATFORM
|
||||||
|
default y
|
||||||
|
help
|
||||||
|
+ This option is deprecated now and the driver was removed, use
|
||||||
|
+ USB_OHCI_HCD_PLATFORM instead.
|
||||||
|
+
|
||||||
|
Enables support for the built-in OHCI controller present on the
|
||||||
|
Atheros AR71XX/AR7240 SoCs.
|
||||||
|
|
||||||
|
--- a/drivers/usb/host/ehci-ath79.c
|
||||||
|
+++ /dev/null
|
||||||
|
@@ -1,208 +0,0 @@
|
||||||
|
-/*
|
||||||
|
- * Bus Glue for Atheros AR7XXX/AR9XXX built-in EHCI controller.
|
||||||
|
- *
|
||||||
|
- * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
- * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
|
||||||
|
- *
|
||||||
|
- * Parts of this file are based on Atheros' 2.6.15 BSP
|
||||||
|
- * Copyright (C) 2007 Atheros Communications, Inc.
|
||||||
|
- *
|
||||||
|
- * This program is free software; you can redistribute it and/or modify it
|
||||||
|
- * under the terms of the GNU General Public License version 2 as published
|
||||||
|
- * by the Free Software Foundation.
|
||||||
|
- */
|
||||||
|
-
|
||||||
|
-#include <linux/platform_device.h>
|
||||||
|
-
|
||||||
|
-enum {
|
||||||
|
- EHCI_ATH79_IP_V1 = 0,
|
||||||
|
- EHCI_ATH79_IP_V2,
|
||||||
|
-};
|
||||||
|
-
|
||||||
|
-static const struct platform_device_id ehci_ath79_id_table[] = {
|
||||||
|
- {
|
||||||
|
- .name = "ar71xx-ehci",
|
||||||
|
- .driver_data = EHCI_ATH79_IP_V1,
|
||||||
|
- },
|
||||||
|
- {
|
||||||
|
- .name = "ar724x-ehci",
|
||||||
|
- .driver_data = EHCI_ATH79_IP_V2,
|
||||||
|
- },
|
||||||
|
- {
|
||||||
|
- .name = "ar913x-ehci",
|
||||||
|
- .driver_data = EHCI_ATH79_IP_V2,
|
||||||
|
- },
|
||||||
|
- {
|
||||||
|
- .name = "ar933x-ehci",
|
||||||
|
- .driver_data = EHCI_ATH79_IP_V2,
|
||||||
|
- },
|
||||||
|
- {
|
||||||
|
- /* terminating entry */
|
||||||
|
- },
|
||||||
|
-};
|
||||||
|
-
|
||||||
|
-MODULE_DEVICE_TABLE(platform, ehci_ath79_id_table);
|
||||||
|
-
|
||||||
|
-static int ehci_ath79_init(struct usb_hcd *hcd)
|
||||||
|
-{
|
||||||
|
- struct ehci_hcd *ehci = hcd_to_ehci(hcd);
|
||||||
|
- struct platform_device *pdev = to_platform_device(hcd->self.controller);
|
||||||
|
- const struct platform_device_id *id;
|
||||||
|
- int ret;
|
||||||
|
-
|
||||||
|
- id = platform_get_device_id(pdev);
|
||||||
|
- if (!id) {
|
||||||
|
- dev_err(hcd->self.controller, "missing device id\n");
|
||||||
|
- return -EINVAL;
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- switch (id->driver_data) {
|
||||||
|
- case EHCI_ATH79_IP_V1:
|
||||||
|
- ehci->has_synopsys_hc_bug = 1;
|
||||||
|
-
|
||||||
|
- ehci->caps = hcd->regs;
|
||||||
|
- ehci->regs = hcd->regs +
|
||||||
|
- HC_LENGTH(ehci,
|
||||||
|
- ehci_readl(ehci, &ehci->caps->hc_capbase));
|
||||||
|
- break;
|
||||||
|
-
|
||||||
|
- case EHCI_ATH79_IP_V2:
|
||||||
|
- hcd->has_tt = 1;
|
||||||
|
-
|
||||||
|
- ehci->caps = hcd->regs + 0x100;
|
||||||
|
- ehci->regs = hcd->regs + 0x100 +
|
||||||
|
- HC_LENGTH(ehci,
|
||||||
|
- ehci_readl(ehci, &ehci->caps->hc_capbase));
|
||||||
|
- break;
|
||||||
|
-
|
||||||
|
- default:
|
||||||
|
- BUG();
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- dbg_hcs_params(ehci, "reset");
|
||||||
|
- dbg_hcc_params(ehci, "reset");
|
||||||
|
- ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
|
||||||
|
- ehci->sbrn = 0x20;
|
||||||
|
-
|
||||||
|
- ehci_reset(ehci);
|
||||||
|
-
|
||||||
|
- ret = ehci_init(hcd);
|
||||||
|
- if (ret)
|
||||||
|
- return ret;
|
||||||
|
-
|
||||||
|
- ehci_port_power(ehci, 0);
|
||||||
|
-
|
||||||
|
- return 0;
|
||||||
|
-}
|
||||||
|
-
|
||||||
|
-static const struct hc_driver ehci_ath79_hc_driver = {
|
||||||
|
- .description = hcd_name,
|
||||||
|
- .product_desc = "Atheros built-in EHCI controller",
|
||||||
|
- .hcd_priv_size = sizeof(struct ehci_hcd),
|
||||||
|
- .irq = ehci_irq,
|
||||||
|
- .flags = HCD_MEMORY | HCD_USB2,
|
||||||
|
-
|
||||||
|
- .reset = ehci_ath79_init,
|
||||||
|
- .start = ehci_run,
|
||||||
|
- .stop = ehci_stop,
|
||||||
|
- .shutdown = ehci_shutdown,
|
||||||
|
-
|
||||||
|
- .urb_enqueue = ehci_urb_enqueue,
|
||||||
|
- .urb_dequeue = ehci_urb_dequeue,
|
||||||
|
- .endpoint_disable = ehci_endpoint_disable,
|
||||||
|
- .endpoint_reset = ehci_endpoint_reset,
|
||||||
|
-
|
||||||
|
- .get_frame_number = ehci_get_frame,
|
||||||
|
-
|
||||||
|
- .hub_status_data = ehci_hub_status_data,
|
||||||
|
- .hub_control = ehci_hub_control,
|
||||||
|
-
|
||||||
|
- .relinquish_port = ehci_relinquish_port,
|
||||||
|
- .port_handed_over = ehci_port_handed_over,
|
||||||
|
-
|
||||||
|
- .clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
|
||||||
|
-};
|
||||||
|
-
|
||||||
|
-static int ehci_ath79_probe(struct platform_device *pdev)
|
||||||
|
-{
|
||||||
|
- struct usb_hcd *hcd;
|
||||||
|
- struct resource *res;
|
||||||
|
- int irq;
|
||||||
|
- int ret;
|
||||||
|
-
|
||||||
|
- if (usb_disabled())
|
||||||
|
- return -ENODEV;
|
||||||
|
-
|
||||||
|
- res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
||||||
|
- if (!res) {
|
||||||
|
- dev_dbg(&pdev->dev, "no IRQ specified\n");
|
||||||
|
- return -ENODEV;
|
||||||
|
- }
|
||||||
|
- irq = res->start;
|
||||||
|
-
|
||||||
|
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
- if (!res) {
|
||||||
|
- dev_dbg(&pdev->dev, "no base address specified\n");
|
||||||
|
- return -ENODEV;
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- hcd = usb_create_hcd(&ehci_ath79_hc_driver, &pdev->dev,
|
||||||
|
- dev_name(&pdev->dev));
|
||||||
|
- if (!hcd)
|
||||||
|
- return -ENOMEM;
|
||||||
|
-
|
||||||
|
- hcd->rsrc_start = res->start;
|
||||||
|
- hcd->rsrc_len = resource_size(res);
|
||||||
|
-
|
||||||
|
- if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
|
||||||
|
- dev_dbg(&pdev->dev, "controller already in use\n");
|
||||||
|
- ret = -EBUSY;
|
||||||
|
- goto err_put_hcd;
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
|
||||||
|
- if (!hcd->regs) {
|
||||||
|
- dev_dbg(&pdev->dev, "error mapping memory\n");
|
||||||
|
- ret = -EFAULT;
|
||||||
|
- goto err_release_region;
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
|
||||||
|
- if (ret)
|
||||||
|
- goto err_iounmap;
|
||||||
|
-
|
||||||
|
- return 0;
|
||||||
|
-
|
||||||
|
-err_iounmap:
|
||||||
|
- iounmap(hcd->regs);
|
||||||
|
-
|
||||||
|
-err_release_region:
|
||||||
|
- release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
|
||||||
|
-err_put_hcd:
|
||||||
|
- usb_put_hcd(hcd);
|
||||||
|
- return ret;
|
||||||
|
-}
|
||||||
|
-
|
||||||
|
-static int ehci_ath79_remove(struct platform_device *pdev)
|
||||||
|
-{
|
||||||
|
- struct usb_hcd *hcd = platform_get_drvdata(pdev);
|
||||||
|
-
|
||||||
|
- usb_remove_hcd(hcd);
|
||||||
|
- iounmap(hcd->regs);
|
||||||
|
- release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
|
||||||
|
- usb_put_hcd(hcd);
|
||||||
|
-
|
||||||
|
- return 0;
|
||||||
|
-}
|
||||||
|
-
|
||||||
|
-static struct platform_driver ehci_ath79_driver = {
|
||||||
|
- .probe = ehci_ath79_probe,
|
||||||
|
- .remove = ehci_ath79_remove,
|
||||||
|
- .id_table = ehci_ath79_id_table,
|
||||||
|
- .driver = {
|
||||||
|
- .owner = THIS_MODULE,
|
||||||
|
- .name = "ath79-ehci",
|
||||||
|
- }
|
||||||
|
-};
|
||||||
|
-
|
||||||
|
-MODULE_ALIAS(PLATFORM_MODULE_PREFIX "ath79-ehci");
|
||||||
|
--- a/drivers/usb/host/ehci-hcd.c
|
||||||
|
+++ b/drivers/usb/host/ehci-hcd.c
|
||||||
|
@@ -1356,11 +1356,6 @@ MODULE_LICENSE ("GPL");
|
||||||
|
#define PLATFORM_DRIVER s5p_ehci_driver
|
||||||
|
#endif
|
||||||
|
|
||||||
|
-#ifdef CONFIG_USB_EHCI_ATH79
|
||||||
|
-#include "ehci-ath79.c"
|
||||||
|
-#define PLATFORM_DRIVER ehci_ath79_driver
|
||||||
|
-#endif
|
||||||
|
-
|
||||||
|
#ifdef CONFIG_SPARC_LEON
|
||||||
|
#include "ehci-grlib.c"
|
||||||
|
#define PLATFORM_DRIVER ehci_grlib_driver
|
||||||
|
--- a/drivers/usb/host/ohci-ath79.c
|
||||||
|
+++ /dev/null
|
||||||
|
@@ -1,151 +0,0 @@
|
||||||
|
-/*
|
||||||
|
- * OHCI HCD (Host Controller Driver) for USB.
|
||||||
|
- *
|
||||||
|
- * Bus Glue for Atheros AR71XX/AR724X built-in OHCI controller.
|
||||||
|
- *
|
||||||
|
- * Copyright (C) 2008-2011 Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
- * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
|
||||||
|
- *
|
||||||
|
- * Parts of this file are based on Atheros' 2.6.15 BSP
|
||||||
|
- * Copyright (C) 2007 Atheros Communications, Inc.
|
||||||
|
- *
|
||||||
|
- * This program is free software; you can redistribute it and/or modify it
|
||||||
|
- * under the terms of the GNU General Public License version 2 as published
|
||||||
|
- * by the Free Software Foundation.
|
||||||
|
- */
|
||||||
|
-
|
||||||
|
-#include <linux/platform_device.h>
|
||||||
|
-
|
||||||
|
-static int __devinit ohci_ath79_start(struct usb_hcd *hcd)
|
||||||
|
-{
|
||||||
|
- struct ohci_hcd *ohci = hcd_to_ohci(hcd);
|
||||||
|
- int ret;
|
||||||
|
-
|
||||||
|
- ret = ohci_init(ohci);
|
||||||
|
- if (ret < 0)
|
||||||
|
- return ret;
|
||||||
|
-
|
||||||
|
- ret = ohci_run(ohci);
|
||||||
|
- if (ret < 0)
|
||||||
|
- goto err;
|
||||||
|
-
|
||||||
|
- return 0;
|
||||||
|
-
|
||||||
|
-err:
|
||||||
|
- ohci_stop(hcd);
|
||||||
|
- return ret;
|
||||||
|
-}
|
||||||
|
-
|
||||||
|
-static const struct hc_driver ohci_ath79_hc_driver = {
|
||||||
|
- .description = hcd_name,
|
||||||
|
- .product_desc = "Atheros built-in OHCI controller",
|
||||||
|
- .hcd_priv_size = sizeof(struct ohci_hcd),
|
||||||
|
-
|
||||||
|
- .irq = ohci_irq,
|
||||||
|
- .flags = HCD_USB11 | HCD_MEMORY,
|
||||||
|
-
|
||||||
|
- .start = ohci_ath79_start,
|
||||||
|
- .stop = ohci_stop,
|
||||||
|
- .shutdown = ohci_shutdown,
|
||||||
|
-
|
||||||
|
- .urb_enqueue = ohci_urb_enqueue,
|
||||||
|
- .urb_dequeue = ohci_urb_dequeue,
|
||||||
|
- .endpoint_disable = ohci_endpoint_disable,
|
||||||
|
-
|
||||||
|
- /*
|
||||||
|
- * scheduling support
|
||||||
|
- */
|
||||||
|
- .get_frame_number = ohci_get_frame,
|
||||||
|
-
|
||||||
|
- /*
|
||||||
|
- * root hub support
|
||||||
|
- */
|
||||||
|
- .hub_status_data = ohci_hub_status_data,
|
||||||
|
- .hub_control = ohci_hub_control,
|
||||||
|
- .start_port_reset = ohci_start_port_reset,
|
||||||
|
-};
|
||||||
|
-
|
||||||
|
-static int ohci_ath79_probe(struct platform_device *pdev)
|
||||||
|
-{
|
||||||
|
- struct usb_hcd *hcd;
|
||||||
|
- struct resource *res;
|
||||||
|
- int irq;
|
||||||
|
- int ret;
|
||||||
|
-
|
||||||
|
- if (usb_disabled())
|
||||||
|
- return -ENODEV;
|
||||||
|
-
|
||||||
|
- res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
|
||||||
|
- if (!res) {
|
||||||
|
- dev_dbg(&pdev->dev, "no IRQ specified\n");
|
||||||
|
- return -ENODEV;
|
||||||
|
- }
|
||||||
|
- irq = res->start;
|
||||||
|
-
|
||||||
|
- hcd = usb_create_hcd(&ohci_ath79_hc_driver, &pdev->dev,
|
||||||
|
- dev_name(&pdev->dev));
|
||||||
|
- if (!hcd)
|
||||||
|
- return -ENOMEM;
|
||||||
|
-
|
||||||
|
- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
|
- if (!res) {
|
||||||
|
- dev_dbg(&pdev->dev, "no base address specified\n");
|
||||||
|
- ret = -ENODEV;
|
||||||
|
- goto err_put_hcd;
|
||||||
|
- }
|
||||||
|
- hcd->rsrc_start = res->start;
|
||||||
|
- hcd->rsrc_len = resource_size(res);
|
||||||
|
-
|
||||||
|
- if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
|
||||||
|
- dev_dbg(&pdev->dev, "controller already in use\n");
|
||||||
|
- ret = -EBUSY;
|
||||||
|
- goto err_put_hcd;
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
|
||||||
|
- if (!hcd->regs) {
|
||||||
|
- dev_dbg(&pdev->dev, "error mapping memory\n");
|
||||||
|
- ret = -EFAULT;
|
||||||
|
- goto err_release_region;
|
||||||
|
- }
|
||||||
|
-
|
||||||
|
- ohci_hcd_init(hcd_to_ohci(hcd));
|
||||||
|
-
|
||||||
|
- ret = usb_add_hcd(hcd, irq, 0);
|
||||||
|
- if (ret)
|
||||||
|
- goto err_stop_hcd;
|
||||||
|
-
|
||||||
|
- return 0;
|
||||||
|
-
|
||||||
|
-err_stop_hcd:
|
||||||
|
- iounmap(hcd->regs);
|
||||||
|
-err_release_region:
|
||||||
|
- release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
|
||||||
|
-err_put_hcd:
|
||||||
|
- usb_put_hcd(hcd);
|
||||||
|
- return ret;
|
||||||
|
-}
|
||||||
|
-
|
||||||
|
-static int ohci_ath79_remove(struct platform_device *pdev)
|
||||||
|
-{
|
||||||
|
- struct usb_hcd *hcd = platform_get_drvdata(pdev);
|
||||||
|
-
|
||||||
|
- usb_remove_hcd(hcd);
|
||||||
|
- iounmap(hcd->regs);
|
||||||
|
- release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
|
||||||
|
- usb_put_hcd(hcd);
|
||||||
|
-
|
||||||
|
- return 0;
|
||||||
|
-}
|
||||||
|
-
|
||||||
|
-static struct platform_driver ohci_hcd_ath79_driver = {
|
||||||
|
- .probe = ohci_ath79_probe,
|
||||||
|
- .remove = ohci_ath79_remove,
|
||||||
|
- .shutdown = usb_hcd_platform_shutdown,
|
||||||
|
- .driver = {
|
||||||
|
- .name = "ath79-ohci",
|
||||||
|
- .owner = THIS_MODULE,
|
||||||
|
- },
|
||||||
|
-};
|
||||||
|
-
|
||||||
|
-MODULE_ALIAS(PLATFORM_MODULE_PREFIX "ath79-ohci");
|
||||||
|
--- a/drivers/usb/host/ohci-hcd.c
|
||||||
|
+++ b/drivers/usb/host/ohci-hcd.c
|
||||||
|
@@ -1111,11 +1111,6 @@ MODULE_LICENSE ("GPL");
|
||||||
|
#define PLATFORM_DRIVER ohci_hcd_cns3xxx_driver
|
||||||
|
#endif
|
||||||
|
|
||||||
|
-#ifdef CONFIG_USB_OHCI_ATH79
|
||||||
|
-#include "ohci-ath79.c"
|
||||||
|
-#define PLATFORM_DRIVER ohci_hcd_ath79_driver
|
||||||
|
-#endif
|
||||||
|
-
|
||||||
|
#ifdef CONFIG_CPU_XLR
|
||||||
|
#include "ohci-xls.c"
|
||||||
|
#define PLATFORM_DRIVER ohci_xls_driver
|
||||||
@ -0,0 +1,31 @@
|
|||||||
|
From 51233d66e030239f99755b2983753eff9b748365 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Date: Wed, 14 Mar 2012 10:28:35 +0100
|
||||||
|
Subject: [PATCH 04/47] MIPS: ath79: fix AR933X WMAC reset code
|
||||||
|
|
||||||
|
The current code puts the built-in WMAC device of the
|
||||||
|
AR933X SoCs into reset instead of starting it. This
|
||||||
|
causes a hard lock on AR933X based boards when the
|
||||||
|
wireless driver tries to access the device.
|
||||||
|
|
||||||
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Cc: stable@vger.kernel.org
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3484/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
|
---
|
||||||
|
arch/mips/ath79/dev-wmac.c | 2 +-
|
||||||
|
1 files changed, 1 insertions(+), 1 deletions(-)
|
||||||
|
|
||||||
|
--- a/arch/mips/ath79/dev-wmac.c
|
||||||
|
+++ b/arch/mips/ath79/dev-wmac.c
|
||||||
|
@@ -58,8 +58,8 @@ static void __init ar913x_wmac_setup(voi
|
||||||
|
|
||||||
|
static int ar933x_wmac_reset(void)
|
||||||
|
{
|
||||||
|
- ath79_device_reset_clear(AR933X_RESET_WMAC);
|
||||||
|
ath79_device_reset_set(AR933X_RESET_WMAC);
|
||||||
|
+ ath79_device_reset_clear(AR933X_RESET_WMAC);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From c98b48027516a2e71688a5957e4e0120f4aa8c61 Mon Sep 17 00:00:00 2001
|
From 9d9c0d49315520754660c8df3f42d93ecf7dba7a Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 18 Nov 2011 09:47:44 +0100
|
Date: Wed, 14 Mar 2012 10:29:21 +0100
|
||||||
Subject: [PATCH 02/35] MIPS: ath79: separate common PCI code
|
Subject: [PATCH 05/47] MIPS: ath79: separate common PCI code
|
||||||
MIME-Version: 1.0
|
MIME-Version: 1.0
|
||||||
Content-Type: text/plain; charset=UTF-8
|
Content-Type: text/plain; charset=UTF-8
|
||||||
Content-Transfer-Encoding: 8bit
|
Content-Transfer-Encoding: 8bit
|
||||||
@ -22,10 +22,9 @@ well.
|
|||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: René Bolldorf <xsecute@googlemail.com>
|
Acked-by: René Bolldorf <xsecute@googlemail.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v4: - add an Acked-by tag from René
|
Patchwork: https://patchwork.linux-mips.org/patch/3485/
|
||||||
v3: - no changes
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
v2: - no changes
|
|
||||||
---
|
---
|
||||||
arch/mips/ath79/Makefile | 1 +
|
arch/mips/ath79/Makefile | 1 +
|
||||||
arch/mips/ath79/pci.c | 46 +++++++++++++++++++++++++++++++++++++++++++
|
arch/mips/ath79/pci.c | 46 +++++++++++++++++++++++++++++++++++++++++++
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From 204fd70abd99099f6c2e2213a2baa1d51c03a039 Mon Sep 17 00:00:00 2001
|
From 293dcf4142717d8059540bd69d1517c442617569 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 18 Nov 2011 09:50:50 +0100
|
Date: Wed, 14 Mar 2012 10:29:22 +0100
|
||||||
Subject: [PATCH 03/35] MIPS: ath79: rename pci-ath724x.h
|
Subject: [PATCH 06/47] MIPS: ath79: rename pci-ath724x.h
|
||||||
MIME-Version: 1.0
|
MIME-Version: 1.0
|
||||||
Content-Type: text/plain; charset=UTF-8
|
Content-Type: text/plain; charset=UTF-8
|
||||||
Content-Transfer-Encoding: 8bit
|
Content-Transfer-Encoding: 8bit
|
||||||
@ -12,10 +12,9 @@ directory.
|
|||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: René Bolldorf <xsecute@googlemail.com>
|
Acked-by: René Bolldorf <xsecute@googlemail.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v4: - add an Acked-by tag from René
|
Patchwork: https://patchwork.linux-mips.org/patch/3486/
|
||||||
v3: - move include "pci.h" out of the #ifdef CONFIG_PCI section
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
v2: - no changes
|
|
||||||
---
|
---
|
||||||
arch/mips/ath79/mach-ubnt-xm.c | 2 +-
|
arch/mips/ath79/mach-ubnt-xm.c | 2 +-
|
||||||
arch/mips/ath79/pci.c | 2 +-
|
arch/mips/ath79/pci.c | 2 +-
|
||||||
@ -1,17 +1,16 @@
|
|||||||
From 7e59b95e3424c078de0d75d699433da0dd289fc1 Mon Sep 17 00:00:00 2001
|
From a9e38566ebe755219db10fa155fa8f0f4efc20d9 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 18 Nov 2011 10:13:37 +0100
|
Date: Wed, 14 Mar 2012 10:29:23 +0100
|
||||||
Subject: [PATCH 04/35] MIPS: ath79: make ath724x_pcibios_init visible for external code
|
Subject: [PATCH 07/47] MIPS: ath79: make ath724x_pcibios_init visible for external code
|
||||||
MIME-Version: 1.0
|
MIME-Version: 1.0
|
||||||
Content-Type: text/plain; charset=UTF-8
|
Content-Type: text/plain; charset=UTF-8
|
||||||
Content-Transfer-Encoding: 8bit
|
Content-Transfer-Encoding: 8bit
|
||||||
|
|
||||||
Signed-off-by: René Bolldorf <xsecute@googlemail.com>
|
Signed-off-by: René Bolldorf <xsecute@googlemail.com>
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v4: - add a sob tag
|
Patchwork: https://patchwork.linux-mips.org/patch/3487/
|
||||||
v3: - no changes
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
v2: - fix a typo in my e-mail address
|
|
||||||
---
|
---
|
||||||
arch/mips/include/asm/mach-ath79/pci.h | 20 ++++++++++++++++++++
|
arch/mips/include/asm/mach-ath79/pci.h | 20 ++++++++++++++++++++
|
||||||
arch/mips/pci/pci-ath724x.c | 3 ++-
|
arch/mips/pci/pci-ath724x.c | 3 ++-
|
||||||
@ -37,7 +36,7 @@ v2: - fix a typo in my e-mail address
|
|||||||
+#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
|
+#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
|
||||||
+int ath724x_pcibios_init(void);
|
+int ath724x_pcibios_init(void);
|
||||||
+#else
|
+#else
|
||||||
+static inline int ath724x_pcibios_init(void) { return 0 };
|
+static inline int ath724x_pcibios_init(void) { return 0; }
|
||||||
+#endif
|
+#endif
|
||||||
+
|
+
|
||||||
+#endif /* __ASM_MACH_ATH79_PCI_H */
|
+#endif /* __ASM_MACH_ATH79_PCI_H */
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From fbf38a9b03d0c47ed602f090ebb2d8ecc0d51d04 Mon Sep 17 00:00:00 2001
|
From e3edaac2e967f07ae3b726e64e1c290233361bc7 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 18 Nov 2011 10:25:26 +0100
|
Date: Wed, 14 Mar 2012 10:29:24 +0100
|
||||||
Subject: [PATCH 05/35] MIPS: ath79: add a common PCI registration function
|
Subject: [PATCH 08/47] MIPS: ath79: add a common PCI registration function
|
||||||
|
|
||||||
The current code unconditionally registers the AR724X
|
The current code unconditionally registers the AR724X
|
||||||
specific PCI controller, even if the kernel is running
|
specific PCI controller, even if the kernel is running
|
||||||
@ -12,11 +12,9 @@ and only register the AR724X PCI controller if the kernel
|
|||||||
is running on an AR724X SoC.
|
is running on an AR724X SoC.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v4: - simplify ath79_register_pci function
|
Patchwork: https://patchwork.linux-mips.org/patch/3488/
|
||||||
v3: - fix compile error if CONFIG_PCI is not defined
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
- add __init annotation to ath79_register_pci
|
|
||||||
v2: - no changes
|
|
||||||
---
|
---
|
||||||
arch/mips/ath79/mach-ubnt-xm.c | 1 +
|
arch/mips/ath79/mach-ubnt-xm.c | 1 +
|
||||||
arch/mips/ath79/pci.c | 10 ++++++++++
|
arch/mips/ath79/pci.c | 10 ++++++++++
|
||||||
@ -1,18 +1,16 @@
|
|||||||
From 9510a9988638ae2386277a832fab2df8ca37d75a Mon Sep 17 00:00:00 2001
|
From 36dfdaa097ee1b12139187dc89cfa23fbb92b53b Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 18 Nov 2011 11:07:26 +0100
|
Date: Wed, 14 Mar 2012 10:29:25 +0100
|
||||||
Subject: [PATCH 06/35] MIPS: ath79: rename pci-ath724x.c to make it reflect the real SoC name
|
Subject: [PATCH 09/47] MIPS: ath79: rename pci-ath724x.c to make it reflect the real SoC name
|
||||||
MIME-Version: 1.0
|
MIME-Version: 1.0
|
||||||
Content-Type: text/plain; charset=UTF-8
|
Content-Type: text/plain; charset=UTF-8
|
||||||
Content-Transfer-Encoding: 8bit
|
Content-Transfer-Encoding: 8bit
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: René Bolldorf <xsecute@googlemail.com>
|
Acked-by: René Bolldorf <xsecute@googlemail.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v4: - add an Acked-by tag from René
|
Patchwork: https://patchwork.linux-mips.org/patch/3489/
|
||||||
v4: - no changes
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
v3: - no changes
|
|
||||||
v2: - no changes
|
|
||||||
---
|
---
|
||||||
arch/mips/pci/Makefile | 2 +-
|
arch/mips/pci/Makefile | 2 +-
|
||||||
arch/mips/pci/pci-ar724x.c | 139 +++++++++++++++++++++++++++++++++++++++++++
|
arch/mips/pci/pci-ar724x.c | 139 +++++++++++++++++++++++++++++++++++++++++++
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From 0cbee5634678ffbd10bee9e302d013392dd8289e Mon Sep 17 00:00:00 2001
|
From 9f0c37b1d071355d4c027958f370823c8f891480 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 18 Nov 2011 11:16:33 +0100
|
Date: Wed, 14 Mar 2012 10:29:26 +0100
|
||||||
Subject: [PATCH 07/35] MIPS: ath79: replace ath724x to ar724x
|
Subject: [PATCH 10/47] MIPS: ath79: replace ath724x to ar724x
|
||||||
MIME-Version: 1.0
|
MIME-Version: 1.0
|
||||||
Content-Type: text/plain; charset=UTF-8
|
Content-Type: text/plain; charset=UTF-8
|
||||||
Content-Transfer-Encoding: 8bit
|
Content-Transfer-Encoding: 8bit
|
||||||
@ -11,11 +11,9 @@ structure names to reflect the name of the real SoC.
|
|||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: René Bolldorf <xsecute@googlemail.com>
|
Acked-by: René Bolldorf <xsecute@googlemail.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v4: - add an Acked-by tag from René
|
Patchwork: https://patchwork.linux-mips.org/patch/3490/
|
||||||
- refreshed due to the changes in a previous patch
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
v3: - no changes
|
|
||||||
v2: - no changes
|
|
||||||
---
|
---
|
||||||
arch/mips/ath79/mach-ubnt-xm.c | 4 +-
|
arch/mips/ath79/mach-ubnt-xm.c | 4 +-
|
||||||
arch/mips/ath79/pci.c | 6 ++--
|
arch/mips/ath79/pci.c | 6 ++--
|
||||||
@ -105,8 +103,8 @@ v2: - no changes
|
|||||||
-int ath724x_pcibios_init(void);
|
-int ath724x_pcibios_init(void);
|
||||||
+int ar724x_pcibios_init(void);
|
+int ar724x_pcibios_init(void);
|
||||||
#else
|
#else
|
||||||
-static inline int ath724x_pcibios_init(void) { return 0 };
|
-static inline int ath724x_pcibios_init(void) { return 0; }
|
||||||
+static inline int ar724x_pcibios_init(void) { return 0 };
|
+static inline int ar724x_pcibios_init(void) { return 0; }
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif /* __ASM_MACH_ATH79_PCI_H */
|
#endif /* __ASM_MACH_ATH79_PCI_H */
|
||||||
@ -1,17 +1,16 @@
|
|||||||
From db464f2ad82c03f847d8eabbb8251b5c567e6720 Mon Sep 17 00:00:00 2001
|
From 0f5728e7e6fa7f0969ec79bd623261d3d830e5e7 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 18 Nov 2011 11:52:41 +0100
|
Date: Wed, 14 Mar 2012 10:29:27 +0100
|
||||||
Subject: [PATCH 08/35] MIPS: ath79: use io-accessor macros in pci-ar724x.c
|
Subject: [PATCH 11/47] MIPS: ath79: use io-accessor macros in pci-ar724x.c
|
||||||
MIME-Version: 1.0
|
MIME-Version: 1.0
|
||||||
Content-Type: text/plain; charset=UTF-8
|
Content-Type: text/plain; charset=UTF-8
|
||||||
Content-Transfer-Encoding: 8bit
|
Content-Transfer-Encoding: 8bit
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: René Bolldorf <xsecute@googlemail.com>
|
Acked-by: René Bolldorf <xsecute@googlemail.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v4: - add an Acked-by tag from René
|
Patchwork: https://patchwork.linux-mips.org/patch/3491/
|
||||||
v3: - no changes
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
v2: - no changes
|
|
||||||
---
|
---
|
||||||
arch/mips/pci/pci-ar724x.c | 38 ++++++++++++++++++++++++--------------
|
arch/mips/pci/pci-ar724x.c | 38 ++++++++++++++++++++++++--------------
|
||||||
1 files changed, 24 insertions(+), 14 deletions(-)
|
1 files changed, 24 insertions(+), 14 deletions(-)
|
||||||
@ -1,14 +1,15 @@
|
|||||||
From 744ffdd4e90cd6671f46eadf9d7cf55b07618d73 Mon Sep 17 00:00:00 2001
|
From e9889bee75d03338daf7ed422661ae28f3aa7063 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 18 Nov 2011 21:37:17 +0100
|
Date: Wed, 14 Mar 2012 10:36:03 +0100
|
||||||
Subject: [PATCH 09/35] MIPS: ath79: remove superfluous alignment checks from pci-ar724x.c
|
Subject: [PATCH 12/47] MIPS: ath79: remove superfluous alignment checks from pci-ar724x.c
|
||||||
|
|
||||||
The alignment of the 'where' parameters are checked
|
The alignment of the 'where' parameters are checked
|
||||||
in the core PCI code already.
|
in the core PCI code already.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v2: - no changes
|
Patchwork: https://patchwork.linux-mips.org/patch/3492/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/pci/pci-ar724x.c | 6 ------
|
arch/mips/pci/pci-ar724x.c | 6 ------
|
||||||
1 files changed, 0 insertions(+), 6 deletions(-)
|
1 files changed, 0 insertions(+), 6 deletions(-)
|
||||||
@ -0,0 +1,134 @@
|
|||||||
|
From 39f3275077a5b143616fcb3e7a6457a5c42739ee Mon Sep 17 00:00:00 2001
|
||||||
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Date: Wed, 14 Mar 2012 10:36:04 +0100
|
||||||
|
Subject: [PATCH 13/47] MIPS: ath79: fix broken ar724x_pci_{read,write} functions
|
||||||
|
|
||||||
|
The current ar724x_pci_{read,write} functions are
|
||||||
|
broken. Due to that, pci_read_config_byte returns
|
||||||
|
with bogus values, and pci_write_config_{byte,word}
|
||||||
|
unconditionally clears the accessed PCI configuration
|
||||||
|
registers instead of changing the value of them.
|
||||||
|
|
||||||
|
The patch fixes the broken functions, thus the PCI
|
||||||
|
configuration space can be accessed correctly.
|
||||||
|
|
||||||
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3493/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
|
---
|
||||||
|
arch/mips/pci/pci-ar724x.c | 52 ++++++++++++++++++++++----------------------
|
||||||
|
1 files changed, 26 insertions(+), 26 deletions(-)
|
||||||
|
|
||||||
|
--- a/arch/mips/pci/pci-ar724x.c
|
||||||
|
+++ b/arch/mips/pci/pci-ar724x.c
|
||||||
|
@@ -22,8 +22,9 @@ static void __iomem *ar724x_pci_devcfg_b
|
||||||
|
static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
|
||||||
|
int size, uint32_t *value)
|
||||||
|
{
|
||||||
|
- unsigned long flags, addr, tval, mask;
|
||||||
|
+ unsigned long flags;
|
||||||
|
void __iomem *base;
|
||||||
|
+ u32 data;
|
||||||
|
|
||||||
|
if (devfn)
|
||||||
|
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||||
|
@@ -31,24 +32,22 @@ static int ar724x_pci_read(struct pci_bu
|
||||||
|
base = ar724x_pci_devcfg_base;
|
||||||
|
|
||||||
|
spin_lock_irqsave(&ar724x_pci_lock, flags);
|
||||||
|
+ data = __raw_readl(base + (where & ~3));
|
||||||
|
|
||||||
|
switch (size) {
|
||||||
|
case 1:
|
||||||
|
- addr = where & ~3;
|
||||||
|
- mask = 0xff000000 >> ((where % 4) * 8);
|
||||||
|
- tval = __raw_readl(base + addr);
|
||||||
|
- tval = tval & ~mask;
|
||||||
|
- *value = (tval >> ((4 - (where % 4))*8));
|
||||||
|
+ if (where & 1)
|
||||||
|
+ data >>= 8;
|
||||||
|
+ if (where & 2)
|
||||||
|
+ data >>= 16;
|
||||||
|
+ data &= 0xff;
|
||||||
|
break;
|
||||||
|
case 2:
|
||||||
|
- addr = where & ~3;
|
||||||
|
- mask = 0xffff0000 >> ((where % 4)*8);
|
||||||
|
- tval = __raw_readl(base + addr);
|
||||||
|
- tval = tval & ~mask;
|
||||||
|
- *value = (tval >> ((4 - (where % 4))*8));
|
||||||
|
+ if (where & 2)
|
||||||
|
+ data >>= 16;
|
||||||
|
+ data &= 0xffff;
|
||||||
|
break;
|
||||||
|
case 4:
|
||||||
|
- *value = __raw_readl(base + where);
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
spin_unlock_irqrestore(&ar724x_pci_lock, flags);
|
||||||
|
@@ -57,6 +56,7 @@ static int ar724x_pci_read(struct pci_bu
|
||||||
|
}
|
||||||
|
|
||||||
|
spin_unlock_irqrestore(&ar724x_pci_lock, flags);
|
||||||
|
+ *value = data;
|
||||||
|
|
||||||
|
return PCIBIOS_SUCCESSFUL;
|
||||||
|
}
|
||||||
|
@@ -64,8 +64,10 @@ static int ar724x_pci_read(struct pci_bu
|
||||||
|
static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
|
||||||
|
int size, uint32_t value)
|
||||||
|
{
|
||||||
|
- unsigned long flags, tval, addr, mask;
|
||||||
|
+ unsigned long flags;
|
||||||
|
void __iomem *base;
|
||||||
|
+ u32 data;
|
||||||
|
+ int s;
|
||||||
|
|
||||||
|
if (devfn)
|
||||||
|
return PCIBIOS_DEVICE_NOT_FOUND;
|
||||||
|
@@ -73,26 +75,21 @@ static int ar724x_pci_write(struct pci_b
|
||||||
|
base = ar724x_pci_devcfg_base;
|
||||||
|
|
||||||
|
spin_lock_irqsave(&ar724x_pci_lock, flags);
|
||||||
|
+ data = __raw_readl(base + (where & ~3));
|
||||||
|
|
||||||
|
switch (size) {
|
||||||
|
case 1:
|
||||||
|
- addr = where & ~3;
|
||||||
|
- mask = 0xff000000 >> ((where % 4)*8);
|
||||||
|
- tval = __raw_readl(base + addr);
|
||||||
|
- tval = tval & ~mask;
|
||||||
|
- tval |= (value << ((4 - (where % 4))*8)) & mask;
|
||||||
|
- __raw_writel(tval, base + addr);
|
||||||
|
+ s = ((where & 3) * 8);
|
||||||
|
+ data &= ~(0xff << s);
|
||||||
|
+ data |= ((value & 0xff) << s);
|
||||||
|
break;
|
||||||
|
case 2:
|
||||||
|
- addr = where & ~3;
|
||||||
|
- mask = 0xffff0000 >> ((where % 4)*8);
|
||||||
|
- tval = __raw_readl(base + addr);
|
||||||
|
- tval = tval & ~mask;
|
||||||
|
- tval |= (value << ((4 - (where % 4))*8)) & mask;
|
||||||
|
- __raw_writel(tval, base + addr);
|
||||||
|
+ s = ((where & 2) * 8);
|
||||||
|
+ data &= ~(0xffff << s);
|
||||||
|
+ data |= ((value & 0xffff) << s);
|
||||||
|
break;
|
||||||
|
case 4:
|
||||||
|
- __raw_writel(value, (base + where));
|
||||||
|
+ data = value;
|
||||||
|
break;
|
||||||
|
default:
|
||||||
|
spin_unlock_irqrestore(&ar724x_pci_lock, flags);
|
||||||
|
@@ -100,6 +97,9 @@ static int ar724x_pci_write(struct pci_b
|
||||||
|
return PCIBIOS_BAD_REGISTER_NUMBER;
|
||||||
|
}
|
||||||
|
|
||||||
|
+ __raw_writel(data, base + (where & ~3));
|
||||||
|
+ /* flush write */
|
||||||
|
+ __raw_readl(base + (where & ~3));
|
||||||
|
spin_unlock_irqrestore(&ar724x_pci_lock, flags);
|
||||||
|
|
||||||
|
return PCIBIOS_SUCCESSFUL;
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From b2ee3bd8706521c9bbf43405c767010927c101e5 Mon Sep 17 00:00:00 2001
|
From 14eaf9b1cda516b4182e56f61c21fa2eaa9ade6b Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Mon, 21 Nov 2011 17:57:51 +0100
|
Date: Wed, 14 Mar 2012 10:36:05 +0100
|
||||||
Subject: [PATCH 11/35] MIPS: ath79: add a workaround for a PCI controller bug in AR7240 SoCs
|
Subject: [PATCH 14/47] MIPS: ath79: add a workaround for a PCI controller bug in AR7240 SoCs
|
||||||
|
|
||||||
The PCI controller of the AR724X SoCs has a hardware
|
The PCI controller of the AR724X SoCs has a hardware
|
||||||
bag. If the BAR0 register of the PCI device is set to
|
bag. If the BAR0 register of the PCI device is set to
|
||||||
@ -56,9 +56,9 @@ Call Trace:
|
|||||||
[<80063c04>] kernel_thread_helper+0x10/0x18
|
[<80063c04>] kernel_thread_helper+0x10/0x18
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v2: - apply the workaround on AR7240 only
|
Patchwork: https://patchwork.linux-mips.org/patch/3494/
|
||||||
- remove unrelated defines
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/pci/pci-ar724x.c | 36 +++++++++++++++++++++++++++++++++++-
|
arch/mips/pci/pci-ar724x.c | 36 +++++++++++++++++++++++++++++++++++-
|
||||||
1 files changed, 35 insertions(+), 1 deletions(-)
|
1 files changed, 35 insertions(+), 1 deletions(-)
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From cfb725275ea25857e8f0e3bf358fff7c84cc787c Mon Sep 17 00:00:00 2001
|
From d710990df726cceffb62488e597ecfc4a9e13aa5 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Tue, 22 Nov 2011 13:59:39 +0100
|
Date: Wed, 14 Mar 2012 10:36:06 +0100
|
||||||
Subject: [PATCH 12/35] MIPS: ath79: fix a wrong IRQ number
|
Subject: [PATCH 15/47] MIPS: ath79: fix a wrong IRQ number
|
||||||
|
|
||||||
The Ubiquiti XM board setup code uses an invalid
|
The Ubiquiti XM board setup code uses an invalid
|
||||||
IRQ number, because it if above of NR_IRQS. This
|
IRQ number, because it if above of NR_IRQS. This
|
||||||
@ -16,11 +16,9 @@ AR71XX/AR724X SoCs, and use the correct IRQ
|
|||||||
number in the board setup code.
|
number in the board setup code.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v2: - no changes
|
Patchwork: https://patchwork.linux-mips.org/patch/3495/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
The IRQ controller code is also missing, that will be
|
|
||||||
added in a separate patch.
|
|
||||||
---
|
---
|
||||||
arch/mips/ath79/mach-ubnt-xm.c | 5 +++--
|
arch/mips/ath79/mach-ubnt-xm.c | 5 +++--
|
||||||
arch/mips/include/asm/mach-ath79/irq.h | 6 +++++-
|
arch/mips/include/asm/mach-ath79/irq.h | 6 +++++-
|
||||||
@ -1,219 +0,0 @@
|
|||||||
From 2e535c334018d58b0bf6df583486abda5bfb2003 Mon Sep 17 00:00:00 2001
|
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
|
||||||
Date: Fri, 18 Nov 2011 22:25:30 +0100
|
|
||||||
Subject: [PATCH 10/35] MIPS: ath79: fix broken ar724x_pci_{read,write} functions
|
|
||||||
|
|
||||||
The current ar724x_pci_{read,write} functions are
|
|
||||||
broken. Due to that, pci_read_config_byte returns
|
|
||||||
with bogus values, and pci_write_config_{byte,word}
|
|
||||||
unconditionally clears the accessed PCI configuration
|
|
||||||
registers instead of changing the value of them.
|
|
||||||
|
|
||||||
The patch fixes the broken functions, thus the PCI
|
|
||||||
configuration space can be accessed correctly.
|
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|
||||||
|
|
||||||
v2: - no changes
|
|
||||||
|
|
||||||
Output of 'lspci -vv' without the patch:
|
|
||||||
|
|
||||||
00:00.0 Network controller: Atheros Communications Inc. AR9285 Wireless
|
|
||||||
Network Adapter (PCI-Express) (rev 01)
|
|
||||||
Subsystem: Atheros Communications Inc. Device a091
|
|
||||||
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
|
|
||||||
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
|
|
||||||
Latency: 0
|
|
||||||
Interrupt: pin A routed to IRQ 0
|
|
||||||
Region 0: Memory at 10000000 (64-bit, non-prefetchable) [size=64K]
|
|
||||||
Capabilities: [40] Power Management version 3
|
|
||||||
Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA PME(D0+,D1+,D2-,D3hot+,D3cold-)
|
|
||||||
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
|
|
||||||
Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit-
|
|
||||||
Address: 00000000 Data: 0000
|
|
||||||
Capabilities: [60] Express (v2) Legacy Endpoint, MSI 00
|
|
||||||
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us
|
|
||||||
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
|
|
||||||
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
|
|
||||||
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
|
|
||||||
MaxPayload 128 bytes, MaxReadReq 512 bytes
|
|
||||||
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
|
|
||||||
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM unknown, Latency L0 <512ns, L1 <64us
|
|
||||||
ClockPM- Surprise- LLActRep- BwNot-
|
|
||||||
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
|
|
||||||
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
|
|
||||||
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
|
|
||||||
DevCap2: Completion Timeout: Not Supported, TimeoutDis+
|
|
||||||
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
|
|
||||||
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
|
|
||||||
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
|
|
||||||
Compliance De-emphasis: -6dB
|
|
||||||
LnkSta2: Current De-emphasis Level: -6dB
|
|
||||||
|
|
||||||
Output of 'lspci -vv' with the patch:
|
|
||||||
|
|
||||||
00:00.0 Network controller: Atheros Communications Inc. AR9285 Wireless
|
|
||||||
Network Adapter (PCI-Express) (rev 01)
|
|
||||||
Subsystem: Atheros Communications Inc. Device a091
|
|
||||||
Control: I/O- Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- ParErr- Stepping- SERR- FastB2B- DisINTx-
|
|
||||||
Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- <TAbort- <MAbort- >SERR- <PERR- INTx-
|
|
||||||
Latency: 0
|
|
||||||
Interrupt: pin A routed to IRQ 48
|
|
||||||
Region 0: Memory at 10000000 (64-bit, non-prefetchable) [size=64K]
|
|
||||||
Capabilities: [40] Power Management version 3
|
|
||||||
Flags: PMEClk- DSI- D1+ D2- AuxCurrent=375mA PME(D0+,D1+,D2-,D3hot+,D3cold-)
|
|
||||||
Status: D0 NoSoftRst- PME-Enable- DSel=0 DScale=0 PME-
|
|
||||||
Capabilities: [50] MSI: Enable- Count=1/1 Maskable- 64bit-
|
|
||||||
Address: 00000000 Data: 0000
|
|
||||||
Capabilities: [60] Express (v2) Legacy Endpoint, MSI 00
|
|
||||||
DevCap: MaxPayload 128 bytes, PhantFunc 0, Latency L0s <512ns, L1 <64us
|
|
||||||
ExtTag- AttnBtn- AttnInd- PwrInd- RBE+ FLReset-
|
|
||||||
DevCtl: Report errors: Correctable- Non-Fatal- Fatal- Unsupported-
|
|
||||||
RlxdOrd+ ExtTag- PhantFunc- AuxPwr- NoSnoop-
|
|
||||||
MaxPayload 128 bytes, MaxReadReq 512 bytes
|
|
||||||
DevSta: CorrErr- UncorrErr- FatalErr- UnsuppReq- AuxPwr- TransPend-
|
|
||||||
LnkCap: Port #0, Speed 2.5GT/s, Width x1, ASPM unknown, Latency L0 <512ns, L1 <64us
|
|
||||||
ClockPM- Surprise- LLActRep- BwNot-
|
|
||||||
LnkCtl: ASPM Disabled; RCB 64 bytes Disabled- Retrain- CommClk-
|
|
||||||
ExtSynch- ClockPM- AutWidDis- BWInt- AutBWInt-
|
|
||||||
LnkSta: Speed 2.5GT/s, Width x1, TrErr- Train- SlotClk+ DLActive- BWMgmt- ABWMgmt-
|
|
||||||
DevCap2: Completion Timeout: Not Supported, TimeoutDis+
|
|
||||||
DevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-
|
|
||||||
LnkCtl2: Target Link Speed: 2.5GT/s, EnterCompliance- SpeedDis-, Selectable De-emphasis: -6dB
|
|
||||||
Transmit Margin: Normal Operating Range, EnterModifiedCompliance- ComplianceSOS-
|
|
||||||
Compliance De-emphasis: -6dB
|
|
||||||
LnkSta2: Current De-emphasis Level: -6dB
|
|
||||||
Capabilities: [100 v1] Advanced Error Reporting
|
|
||||||
UESta: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
|
|
||||||
UEMsk: DLP- SDES- TLP- FCP- CmpltTO- CmpltAbrt- UnxCmplt- RxOF- MalfTLP- ECRC- UnsupReq- ACSViol-
|
|
||||||
UESvrt: DLP+ SDES+ TLP- FCP+ CmpltTO- CmpltAbrt- UnxCmplt- RxOF+ MalfTLP+ ECRC- UnsupReq- ACSViol-
|
|
||||||
CESta: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr-
|
|
||||||
CEMsk: RxErr- BadTLP- BadDLLP- Rollover- Timeout- NonFatalErr+
|
|
||||||
AERCap: First Error Pointer: 00, GenCap+ CGenEn- ChkCap+ ChkEn-
|
|
||||||
Capabilities: [140 v1] Virtual Channel
|
|
||||||
Caps: LPEVC=0 RefClk=100ns PATEntryBits=1
|
|
||||||
Arb: Fixed- WRR32- WRR64- WRR128-
|
|
||||||
Ctrl: ArbSelect=Fixed
|
|
||||||
Status: InProgress-
|
|
||||||
VC0: Caps: PATOffset=00 MaxTimeSlots=1 RejSnoopTrans-
|
|
||||||
Arb: Fixed- WRR32- WRR64- WRR128- TWRR128- WRR256-
|
|
||||||
Ctrl: Enable+ ID=0 ArbSelect=Fixed TC/VC=ff
|
|
||||||
Status: NegoPending- InProgress-
|
|
||||||
Capabilities: [160 v1] Device Serial Number 00-15-17-ff-ff-24-14-12
|
|
||||||
Capabilities: [170 v1] Power Budgeting <?>
|
|
||||||
---
|
|
||||||
arch/mips/pci/pci-ar724x.c | 52 ++++++++++++++++++++++----------------------
|
|
||||||
1 files changed, 26 insertions(+), 26 deletions(-)
|
|
||||||
|
|
||||||
--- a/arch/mips/pci/pci-ar724x.c
|
|
||||||
+++ b/arch/mips/pci/pci-ar724x.c
|
|
||||||
@@ -22,8 +22,9 @@ static void __iomem *ar724x_pci_devcfg_b
|
|
||||||
static int ar724x_pci_read(struct pci_bus *bus, unsigned int devfn, int where,
|
|
||||||
int size, uint32_t *value)
|
|
||||||
{
|
|
||||||
- unsigned long flags, addr, tval, mask;
|
|
||||||
+ unsigned long flags;
|
|
||||||
void __iomem *base;
|
|
||||||
+ u32 data;
|
|
||||||
|
|
||||||
if (devfn)
|
|
||||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
|
||||||
@@ -31,24 +32,22 @@ static int ar724x_pci_read(struct pci_bu
|
|
||||||
base = ar724x_pci_devcfg_base;
|
|
||||||
|
|
||||||
spin_lock_irqsave(&ar724x_pci_lock, flags);
|
|
||||||
+ data = __raw_readl(base + (where & ~3));
|
|
||||||
|
|
||||||
switch (size) {
|
|
||||||
case 1:
|
|
||||||
- addr = where & ~3;
|
|
||||||
- mask = 0xff000000 >> ((where % 4) * 8);
|
|
||||||
- tval = __raw_readl(base + addr);
|
|
||||||
- tval = tval & ~mask;
|
|
||||||
- *value = (tval >> ((4 - (where % 4))*8));
|
|
||||||
+ if (where & 1)
|
|
||||||
+ data >>= 8;
|
|
||||||
+ if (where & 2)
|
|
||||||
+ data >>= 16;
|
|
||||||
+ data &= 0xff;
|
|
||||||
break;
|
|
||||||
case 2:
|
|
||||||
- addr = where & ~3;
|
|
||||||
- mask = 0xffff0000 >> ((where % 4)*8);
|
|
||||||
- tval = __raw_readl(base + addr);
|
|
||||||
- tval = tval & ~mask;
|
|
||||||
- *value = (tval >> ((4 - (where % 4))*8));
|
|
||||||
+ if (where & 2)
|
|
||||||
+ data >>= 16;
|
|
||||||
+ data &= 0xffff;
|
|
||||||
break;
|
|
||||||
case 4:
|
|
||||||
- *value = __raw_readl(base + where);
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
spin_unlock_irqrestore(&ar724x_pci_lock, flags);
|
|
||||||
@@ -57,6 +56,7 @@ static int ar724x_pci_read(struct pci_bu
|
|
||||||
}
|
|
||||||
|
|
||||||
spin_unlock_irqrestore(&ar724x_pci_lock, flags);
|
|
||||||
+ *value = data;
|
|
||||||
|
|
||||||
return PCIBIOS_SUCCESSFUL;
|
|
||||||
}
|
|
||||||
@@ -64,8 +64,10 @@ static int ar724x_pci_read(struct pci_bu
|
|
||||||
static int ar724x_pci_write(struct pci_bus *bus, unsigned int devfn, int where,
|
|
||||||
int size, uint32_t value)
|
|
||||||
{
|
|
||||||
- unsigned long flags, tval, addr, mask;
|
|
||||||
+ unsigned long flags;
|
|
||||||
void __iomem *base;
|
|
||||||
+ u32 data;
|
|
||||||
+ int s;
|
|
||||||
|
|
||||||
if (devfn)
|
|
||||||
return PCIBIOS_DEVICE_NOT_FOUND;
|
|
||||||
@@ -73,26 +75,21 @@ static int ar724x_pci_write(struct pci_b
|
|
||||||
base = ar724x_pci_devcfg_base;
|
|
||||||
|
|
||||||
spin_lock_irqsave(&ar724x_pci_lock, flags);
|
|
||||||
+ data = __raw_readl(base + (where & ~3));
|
|
||||||
|
|
||||||
switch (size) {
|
|
||||||
case 1:
|
|
||||||
- addr = where & ~3;
|
|
||||||
- mask = 0xff000000 >> ((where % 4)*8);
|
|
||||||
- tval = __raw_readl(base + addr);
|
|
||||||
- tval = tval & ~mask;
|
|
||||||
- tval |= (value << ((4 - (where % 4))*8)) & mask;
|
|
||||||
- __raw_writel(tval, base + addr);
|
|
||||||
+ s = ((where & 3) * 8);
|
|
||||||
+ data &= ~(0xff << s);
|
|
||||||
+ data |= ((value & 0xff) << s);
|
|
||||||
break;
|
|
||||||
case 2:
|
|
||||||
- addr = where & ~3;
|
|
||||||
- mask = 0xffff0000 >> ((where % 4)*8);
|
|
||||||
- tval = __raw_readl(base + addr);
|
|
||||||
- tval = tval & ~mask;
|
|
||||||
- tval |= (value << ((4 - (where % 4))*8)) & mask;
|
|
||||||
- __raw_writel(tval, base + addr);
|
|
||||||
+ s = ((where & 2) * 8);
|
|
||||||
+ data &= ~(0xffff << s);
|
|
||||||
+ data |= ((value & 0xffff) << s);
|
|
||||||
break;
|
|
||||||
case 4:
|
|
||||||
- __raw_writel(value, (base + where));
|
|
||||||
+ data = value;
|
|
||||||
break;
|
|
||||||
default:
|
|
||||||
spin_unlock_irqrestore(&ar724x_pci_lock, flags);
|
|
||||||
@@ -100,6 +97,9 @@ static int ar724x_pci_write(struct pci_b
|
|
||||||
return PCIBIOS_BAD_REGISTER_NUMBER;
|
|
||||||
}
|
|
||||||
|
|
||||||
+ __raw_writel(data, base + (where & ~3));
|
|
||||||
+ /* flush write */
|
|
||||||
+ __raw_readl(base + (where & ~3));
|
|
||||||
spin_unlock_irqrestore(&ar724x_pci_lock, flags);
|
|
||||||
|
|
||||||
return PCIBIOS_SUCCESSFUL;
|
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From a4fbc2dec67a5d760e25e3c3a6c392191a5405c6 Mon Sep 17 00:00:00 2001
|
From 1fd24b552708544ca6233ff7ba60342e9f7e5582 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Tue, 22 Nov 2011 14:11:19 +0100
|
Date: Wed, 14 Mar 2012 10:36:07 +0100
|
||||||
Subject: [PATCH 13/35] MIPS: ath79: add PCI IRQ handling code for AR724X SoCs
|
Subject: [PATCH 16/47] MIPS: ath79: add PCI IRQ handling code for AR724X SoCs
|
||||||
|
|
||||||
The PCI Host Controller of the AR724x SoC has a
|
The PCI Host Controller of the AR724x SoC has a
|
||||||
built-in IRQ controller. The current code does
|
built-in IRQ controller. The current code does
|
||||||
@ -16,9 +16,9 @@ This patch adds support for the IRQ controller
|
|||||||
in order to make PCI IRQs work.
|
in order to make PCI IRQs work.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v2: - move the interrupt controller related defines from
|
Patchwork: https://patchwork.linux-mips.org/patch/3496/
|
||||||
the workaround patch
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/pci.c | 3 +-
|
arch/mips/ath79/pci.c | 3 +-
|
||||||
arch/mips/include/asm/mach-ath79/pci.h | 4 +-
|
arch/mips/include/asm/mach-ath79/pci.h | 4 +-
|
||||||
@ -53,8 +53,8 @@ v2: - move the interrupt controller related defines from
|
|||||||
-int ar724x_pcibios_init(void);
|
-int ar724x_pcibios_init(void);
|
||||||
+int ar724x_pcibios_init(int irq);
|
+int ar724x_pcibios_init(int irq);
|
||||||
#else
|
#else
|
||||||
-static inline int ar724x_pcibios_init(void) { return 0 };
|
-static inline int ar724x_pcibios_init(void) { return 0; }
|
||||||
+static inline int ar724x_pcibios_init(int irq) { return 0 };
|
+static inline int ar724x_pcibios_init(int irq) { return 0; }
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
#endif /* __ASM_MACH_ATH79_PCI_H */
|
#endif /* __ASM_MACH_ATH79_PCI_H */
|
||||||
@ -1,15 +1,16 @@
|
|||||||
From adeefb0860e92f44c7d66d5fccdb217fccfb8a81 Mon Sep 17 00:00:00 2001
|
From b2ab491ed634a4c0b7af5f11940e0ca42b1a87c8 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Sun, 20 Nov 2011 10:19:08 +0100
|
Date: Wed, 14 Mar 2012 10:36:08 +0100
|
||||||
Subject: [PATCH 14/35] MIPS: ath79: get rid of some ifdefs in mach-ubnt-xm.c
|
Subject: [PATCH 17/47] MIPS: ath79: get rid of some ifdefs in mach-ubnt-xm.c
|
||||||
|
|
||||||
Remove a superfluous ifdef around an include. Also
|
Remove a superfluous ifdef around an include. Also
|
||||||
reorganize the board setup code a bit, so another
|
reorganize the board setup code a bit, so another
|
||||||
ifdef can be removed.
|
ifdef can be removed.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v2: - no changes
|
Patchwork: https://patchwork.linux-mips.org/patch/3497/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/mach-ubnt-xm.c | 23 ++++++++++++-----------
|
arch/mips/ath79/mach-ubnt-xm.c | 23 ++++++++++++-----------
|
||||||
1 files changed, 12 insertions(+), 11 deletions(-)
|
1 files changed, 12 insertions(+), 11 deletions(-)
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From 83d74abc7d549f5d6292b0474be080983239c0bd Mon Sep 17 00:00:00 2001
|
From 2b62c9d685d9bb048a006b695683b2a812c0a847 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Sun, 20 Nov 2011 10:29:36 +0100
|
Date: Wed, 14 Mar 2012 10:36:09 +0100
|
||||||
Subject: [PATCH 15/35] MIPS: ath79: allow to use board specific pci_plat_dev_init functions
|
Subject: [PATCH 18/47] MIPS: ath79: allow to use board specific pci_plat_dev_init functions
|
||||||
|
|
||||||
Th current implementation causes NULL pointer dereference
|
Th current implementation causes NULL pointer dereference
|
||||||
if 'pci_data' is not set:
|
if 'pci_data' is not set:
|
||||||
@ -47,11 +47,9 @@ The patch allows the board setup code to specify a board
|
|||||||
specific function if that is required.
|
specific function if that is required.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v2: - no changes
|
Patchwork: https://patchwork.linux-mips.org/patch/3499/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
The pci_irq_map function can throw another NULL pointer
|
|
||||||
dereference, that will be fixed in a subsequent patch.
|
|
||||||
---
|
---
|
||||||
arch/mips/ath79/mach-ubnt-xm.c | 13 ++++++++++++-
|
arch/mips/ath79/mach-ubnt-xm.c | 13 ++++++++++++-
|
||||||
arch/mips/ath79/pci.c | 14 ++++++++------
|
arch/mips/ath79/pci.c | 14 ++++++++------
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From 9f6d46372cf2a493eaeeffbefe0a796379f838fa Mon Sep 17 00:00:00 2001
|
From 4201b6aeb059b481571c241a2fc96fd3f41032e9 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Tue, 22 Nov 2011 22:54:32 +0100
|
Date: Wed, 14 Mar 2012 10:36:10 +0100
|
||||||
Subject: [PATCH 16/35] MIPS: ath79: add support for the PCI host controller of the AR71XX SoCs
|
Subject: [PATCH 19/47] MIPS: ath79: add support for the PCI host controller of the AR71XX SoCs
|
||||||
|
|
||||||
The Atheros AR71XX SoCs have a built-in PCI Host Controller.
|
The Atheros AR71XX SoCs have a built-in PCI Host Controller.
|
||||||
This patch adds a driver for that, and modifies the relevant
|
This patch adds a driver for that, and modifies the relevant
|
||||||
@ -10,8 +10,9 @@ board specific setup.
|
|||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
|
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v2: - add missing pci-ar71xx.c
|
Patchwork: https://patchwork.linux-mips.org/patch/3498/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/Kconfig | 1 +
|
arch/mips/ath79/Kconfig | 1 +
|
||||||
arch/mips/include/asm/mach-ath79/pci.h | 6 +
|
arch/mips/include/asm/mach-ath79/pci.h | 6 +
|
||||||
@ -39,7 +40,7 @@ v2: - add missing pci-ar71xx.c
|
|||||||
+#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR71XX)
|
+#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR71XX)
|
||||||
+int ar71xx_pcibios_init(void);
|
+int ar71xx_pcibios_init(void);
|
||||||
+#else
|
+#else
|
||||||
+static inline int ar71xx_pcibios_init(void) { return 0 };
|
+static inline int ar71xx_pcibios_init(void) { return 0; }
|
||||||
+#endif
|
+#endif
|
||||||
+
|
+
|
||||||
#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
|
#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From 8a1a5852aa7f8cfc027b2b0bb51cbbac4309e144 Mon Sep 17 00:00:00 2001
|
From fd1dd2f2c317bc0fc2c30fba440d911654bf592e Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Sun, 20 Nov 2011 14:32:09 +0100
|
Date: Wed, 14 Mar 2012 10:36:11 +0100
|
||||||
Subject: [PATCH 17/35] MIPS: ath79: allow to use SoC specific PCI IRQ maps
|
Subject: [PATCH 20/47] MIPS: ath79: allow to use SoC specific PCI IRQ maps
|
||||||
|
|
||||||
The PCI controllers in the AR71XX and in the
|
The PCI controllers in the AR71XX and in the
|
||||||
AR724X SoCs are different, and both of them
|
AR724X SoCs are different, and both of them
|
||||||
@ -14,8 +14,9 @@ which lets the board setup code to override the
|
|||||||
default IRQ map.
|
default IRQ map.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v2: - no changes
|
Patchwork: https://patchwork.linux-mips.org/patch/3500/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/pci.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++---
|
arch/mips/ath79/pci.c | 72 ++++++++++++++++++++++++++++++++++++++++++++++---
|
||||||
arch/mips/ath79/pci.h | 9 ++++++
|
arch/mips/ath79/pci.h | 9 ++++++
|
||||||
@ -1,14 +1,15 @@
|
|||||||
From 0b026adc7a471edd018a060427e62d06e54be2bc Mon Sep 17 00:00:00 2001
|
From 29398cf1212afc9a6474127259cbb3a48d0751e5 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Sun, 20 Nov 2011 15:50:32 +0100
|
Date: Wed, 14 Mar 2012 10:36:12 +0100
|
||||||
Subject: [PATCH 18/35] MIPS: ath79: remove ar724x_pci_add_data function
|
Subject: [PATCH 21/47] MIPS: ath79: remove ar724x_pci_add_data function
|
||||||
|
|
||||||
The variables set by this function are not used anymore.
|
The variables set by this function are not used anymore.
|
||||||
Remove the function and the relevant variables as well.
|
Remove the function and the relevant variables as well.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v2: - no changes
|
Patchwork: https://patchwork.linux-mips.org/patch/3501/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/mach-ubnt-xm.c | 7 -------
|
arch/mips/ath79/mach-ubnt-xm.c | 7 -------
|
||||||
arch/mips/ath79/pci.c | 8 --------
|
arch/mips/ath79/pci.c | 8 --------
|
||||||
@ -1,14 +1,15 @@
|
|||||||
From 1759a5bc87d0eb8dbb0d8a9794b336813057eb88 Mon Sep 17 00:00:00 2001
|
From 12db6a98b438a50799873bfd2b736a3b02a4bd57 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Thu, 25 Nov 2010 17:59:28 +0100
|
Date: Wed, 14 Mar 2012 10:36:13 +0100
|
||||||
Subject: [PATCH 19/35] MIPS: ath79: register PCI controller on the PB44 board
|
Subject: [PATCH 22/47] MIPS: ath79: register PCI controller on the PB44 board
|
||||||
|
|
||||||
The PB44 reference board has two miniPCI slots. Register
|
The PB44 reference board has two miniPCI slots. Register
|
||||||
the PCI controller to make those usable.
|
the PCI controller to make those usable.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
v2: - no changes
|
Patchwork: https://patchwork.linux-mips.org/patch/3502/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/mach-pb44.c | 2 ++
|
arch/mips/ath79/mach-pb44.c | 2 ++
|
||||||
1 files changed, 2 insertions(+), 0 deletions(-)
|
1 files changed, 2 insertions(+), 0 deletions(-)
|
||||||
@ -1,22 +1,16 @@
|
|||||||
From e83c294ff219ff709b8179cbff64f293199a6dad Mon Sep 17 00:00:00 2001
|
From d3b5329b89d1bc733c56e4d609a89b429bf6cd4e Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Tue, 22 Nov 2011 21:13:58 +0100
|
Date: Wed, 14 Mar 2012 10:36:14 +0100
|
||||||
Subject: [PATCH 20/35] MIPS: ath79: update copyright headers of PCI related files
|
Subject: [PATCH 23/47] MIPS: ath79: update copyright headers of PCI related files
|
||||||
|
|
||||||
Add copyright records according to the recent changes in
|
Add copyright records according to the recent changes in
|
||||||
the PCI code. Also fix up the descriptions.
|
the PCI code. Also fix up the descriptions.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
|
Signed-off-by: Imre Kaloz <kaloz@openwrt.org>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
Just in case if someone is curious about why 2008 and 2009 years are
|
Patchwork: https://patchwork.linux-mips.org/patch/3503/
|
||||||
present in this change:
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
|
|
||||||
The recent PCI specific changes were based on an existing
|
|
||||||
code which can be found in the OpenWrt repository, and we
|
|
||||||
are working on that since 2008.
|
|
||||||
|
|
||||||
v2: - no changes
|
|
||||||
---
|
---
|
||||||
arch/mips/ath79/pci.c | 4 ++++
|
arch/mips/ath79/pci.c | 4 ++++
|
||||||
arch/mips/ath79/pci.h | 4 +++-
|
arch/mips/ath79/pci.h | 4 +++-
|
||||||
@ -1,13 +1,17 @@
|
|||||||
From f60aed87f838ecfa4033ff1f63f97d05359b3b51 Mon Sep 17 00:00:00 2001
|
From 5c1f1041309ede56d48eb3c665025e87c9824a64 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Sun, 11 Dec 2011 17:36:08 +0100
|
Date: Wed, 14 Mar 2012 10:45:19 +0100
|
||||||
Subject: [PATCH 21/35] MIPS: ath79: add early_printk support for AR934X
|
Subject: [PATCH 24/47] MIPS: ath79: add early_printk support for AR934X
|
||||||
|
|
||||||
The patch allows to see kernel messages on AR934X SoCs in
|
The patch allows to see kernel messages on AR934X SoCs in
|
||||||
early boot stage.
|
early boot stage.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Cc: mcgrof@infradead.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3504/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/early_printk.c | 3 +++
|
arch/mips/ath79/early_printk.c | 3 +++
|
||||||
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 6 +++++-
|
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 6 +++++-
|
||||||
@ -1,13 +1,17 @@
|
|||||||
From 655a57ed2df5e34c32645e08c3244facba70ae5f Mon Sep 17 00:00:00 2001
|
From ccb089bbbe49949063cc348743605b3d813ca1c0 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 9 Dec 2011 14:39:04 +0100
|
Date: Wed, 14 Mar 2012 10:45:20 +0100
|
||||||
Subject: [PATCH 22/35] MIPS: ath79: sort case statements in ath79_detect_sys_type
|
Subject: [PATCH 25/47] MIPS: ath79: sort case statements in ath79_detect_sys_type
|
||||||
|
|
||||||
Sort the case statements alphabetically in order to improve
|
Sort the case statements alphabetically in order to improve
|
||||||
readability.
|
readability.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Cc: mcgrof@infradead.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3505/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/setup.c | 24 ++++++++++++------------
|
arch/mips/ath79/setup.c | 24 ++++++++++++------------
|
||||||
1 files changed, 12 insertions(+), 12 deletions(-)
|
1 files changed, 12 insertions(+), 12 deletions(-)
|
||||||
@ -1,13 +1,17 @@
|
|||||||
From 9c19e86a7eccf8efd159ba213290830164f33a71 Mon Sep 17 00:00:00 2001
|
From bf5cb424312f28e51803286a53cb8613bedc5bc8 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Sun, 11 Dec 2011 17:36:42 +0100
|
Date: Wed, 14 Mar 2012 10:45:21 +0100
|
||||||
Subject: [PATCH 23/35] MIPS: ath79: add SoC detection code for AR934X
|
Subject: [PATCH 26/47] MIPS: ath79: add SoC detection code for AR934X
|
||||||
|
|
||||||
Also add 'soc_is_ar934[124x]' helper functions and a Kconfig
|
Also add 'soc_is_ar934[124x]' helper functions and a Kconfig
|
||||||
symbol for the AR934X SoCs.
|
symbol for the AR934X SoCs.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Cc: mcgrof@infradead.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3506/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/Kconfig | 4 ++++
|
arch/mips/ath79/Kconfig | 4 ++++
|
||||||
arch/mips/ath79/setup.c | 21 ++++++++++++++++++++-
|
arch/mips/ath79/setup.c | 21 ++++++++++++++++++++-
|
||||||
@ -1,10 +1,14 @@
|
|||||||
From 783addfa256e79892f889e95ec5cda34f4e91eb7 Mon Sep 17 00:00:00 2001
|
From e9706fc0a97feb7992a98806b69a1fc1fcb910c7 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 9 Dec 2011 20:36:32 +0100
|
Date: Wed, 14 Mar 2012 10:45:22 +0100
|
||||||
Subject: [PATCH 24/35] MIPS: ath79: add clock initialization code for AR934X
|
Subject: [PATCH 27/47] MIPS: ath79: add clock initialization code for AR934X
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Cc: mcgrof@infradead.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3507/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/clock.c | 81 ++++++++++++++++++++++++
|
arch/mips/ath79/clock.c | 81 ++++++++++++++++++++++++
|
||||||
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 53 +++++++++++++++
|
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 53 +++++++++++++++
|
||||||
@ -1,10 +1,14 @@
|
|||||||
From c01b6005cfa2d762c2de33d5be2e82f91afaa66f Mon Sep 17 00:00:00 2001
|
From 77bb01d1919bcb6787d5cde9056936420288ab34 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 9 Dec 2011 20:53:47 +0100
|
Date: Wed, 14 Mar 2012 10:45:23 +0100
|
||||||
Subject: [PATCH 25/35] MIPS: ath79: add GPIO support code for AR934X
|
Subject: [PATCH 28/47] MIPS: ath79: add GPIO support code for AR934X
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Cc: mcgrof@infradead.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3508/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/gpio.c | 47 +++++++++++++++++++++++-
|
arch/mips/ath79/gpio.c | 47 +++++++++++++++++++++++-
|
||||||
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
|
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From e69d89040d4884ea4069352338f555694e65fe70 Mon Sep 17 00:00:00 2001
|
From f44c70eb5368c0742a8f401ccf39f2ba7252f5a7 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 9 Dec 2011 21:30:03 +0100
|
Date: Wed, 14 Mar 2012 10:45:24 +0100
|
||||||
Subject: [PATCH 26/35] MIPS: ath79: rework IP2/IP3 interrupt handling
|
Subject: [PATCH 29/47] MIPS: ath79: rework IP2/IP3 interrupt handling
|
||||||
|
|
||||||
The current implementation assumes that flushing the
|
The current implementation assumes that flushing the
|
||||||
DDR writeback buffer is required for IP2/IP3 interrupts,
|
DDR writeback buffer is required for IP2/IP3 interrupts,
|
||||||
@ -12,6 +12,10 @@ the buffers in the dispatcher code.
|
|||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Cc: mcgrof@infradead.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3509/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/irq.c | 92 ++++++++++++++++++++++++++++++++++++++-----------
|
arch/mips/ath79/irq.c | 92 ++++++++++++++++++++++++++++++++++++++-----------
|
||||||
1 files changed, 72 insertions(+), 20 deletions(-)
|
1 files changed, 72 insertions(+), 20 deletions(-)
|
||||||
@ -1,10 +1,14 @@
|
|||||||
From 9db6021011556948d2d28d6957cee451bc2985aa Mon Sep 17 00:00:00 2001
|
From b16fdecf14d24fe213c81409c0c2dca66d5b7bc9 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 9 Dec 2011 21:59:50 +0100
|
Date: Wed, 14 Mar 2012 10:45:25 +0100
|
||||||
Subject: [PATCH 27/35] MIPS: ath79: add IRQ handling code for AR934X
|
Subject: [PATCH 30/47] MIPS: ath79: add IRQ handling code for AR934X
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Cc: mcgrof@infradead.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3510/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/irq.c | 55 +++++++++++++++++++++++-
|
arch/mips/ath79/irq.c | 55 +++++++++++++++++++++++-
|
||||||
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 25 +++++++++++
|
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 25 +++++++++++
|
||||||
@ -1,10 +1,14 @@
|
|||||||
From da0f20f8a99de9193fc484a25d1f9edc913c98fd Mon Sep 17 00:00:00 2001
|
From 98bfbb0b3f126d93076377fcd9553a493e45e304 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Sat, 10 Dec 2011 20:09:39 +0100
|
Date: Wed, 14 Mar 2012 10:45:26 +0100
|
||||||
Subject: [PATCH 28/35] MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set}
|
Subject: [PATCH 31/47] MIPS: ath79: add AR934X specific glue to ath79_device_reset_{clear,set}
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Cc: mcgrof@infradead.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3511/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/common.c | 9 ++++++++-
|
arch/mips/ath79/common.c | 9 ++++++++-
|
||||||
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
|
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 1 +
|
||||||
@ -1,10 +1,14 @@
|
|||||||
From 6b6803a249a27aa708bc5f24aa15270e30f3de61 Mon Sep 17 00:00:00 2001
|
From 2d4ed1c7405d05da812b67830eaac15f43b862b7 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Sat, 10 Dec 2011 19:55:05 +0100
|
Date: Wed, 14 Mar 2012 10:45:27 +0100
|
||||||
Subject: [PATCH 29/35] MIPS: ath79: register UART device for AR934X SoCs
|
Subject: [PATCH 32/47] MIPS: ath79: register UART device for AR934X SoCs
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Cc: mcgrof@infradead.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3512/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/dev-common.c | 3 ++-
|
arch/mips/ath79/dev-common.c | 3 ++-
|
||||||
1 files changed, 2 insertions(+), 1 deletions(-)
|
1 files changed, 2 insertions(+), 1 deletions(-)
|
||||||
@ -1,10 +1,14 @@
|
|||||||
From 58b69cf52387a7351ec13b52d3d6a495fe611c29 Mon Sep 17 00:00:00 2001
|
From d677877e2688813e5e0c12d0228a631021ed70c4 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 9 Dec 2011 22:07:23 +0100
|
Date: Wed, 14 Mar 2012 10:45:28 +0100
|
||||||
Subject: [PATCH 30/35] MIPS: ath79: add WMAC registration code for AR934X
|
Subject: [PATCH 33/47] MIPS: ath79: add WMAC registration code for AR934X
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Cc: mcgrof@infradead.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3513/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/Kconfig | 2 +-
|
arch/mips/ath79/Kconfig | 2 +-
|
||||||
arch/mips/ath79/dev-wmac.c | 30 ++++++++++++++++++++++-
|
arch/mips/ath79/dev-wmac.c | 30 ++++++++++++++++++++++-
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From f299f36542f81f05cff7cdebb50abde202faf6df Mon Sep 17 00:00:00 2001
|
From 27a5b2948831f4fd8e66e2e1a98b4c23902728cc Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Sat, 17 Dec 2011 10:04:18 +0100
|
Date: Wed, 14 Mar 2012 10:45:29 +0100
|
||||||
Subject: [PATCH 32/35] MIPS: ath79: add PCI_AR724X Kconfig symbol
|
Subject: [PATCH 34/47] MIPS: ath79: add PCI_AR724X Kconfig symbol
|
||||||
|
|
||||||
The AR724X specific PCI code can be used for the
|
The AR724X specific PCI code can be used for the
|
||||||
AR934X SoCs, however it can be selected only if
|
AR934X SoCs, however it can be selected only if
|
||||||
@ -12,6 +12,10 @@ to use the code for AR934X as well.
|
|||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Cc: mcgrof@infradead.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3514/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/Kconfig | 4 ++++
|
arch/mips/ath79/Kconfig | 4 ++++
|
||||||
arch/mips/include/asm/mach-ath79/pci.h | 2 +-
|
arch/mips/include/asm/mach-ath79/pci.h | 2 +-
|
||||||
@ -41,14 +45,14 @@ Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
|||||||
--- a/arch/mips/include/asm/mach-ath79/pci.h
|
--- a/arch/mips/include/asm/mach-ath79/pci.h
|
||||||
+++ b/arch/mips/include/asm/mach-ath79/pci.h
|
+++ b/arch/mips/include/asm/mach-ath79/pci.h
|
||||||
@@ -19,7 +19,7 @@ int ar71xx_pcibios_init(void);
|
@@ -19,7 +19,7 @@ int ar71xx_pcibios_init(void);
|
||||||
static inline int ar71xx_pcibios_init(void) { return 0 };
|
static inline int ar71xx_pcibios_init(void) { return 0; }
|
||||||
#endif
|
#endif
|
||||||
|
|
||||||
-#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
|
-#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR724X)
|
||||||
+#if defined(CONFIG_PCI_AR724X)
|
+#if defined(CONFIG_PCI_AR724X)
|
||||||
int ar724x_pcibios_init(int irq);
|
int ar724x_pcibios_init(int irq);
|
||||||
#else
|
#else
|
||||||
static inline int ar724x_pcibios_init(int irq) { return 0 };
|
static inline int ar724x_pcibios_init(int irq) { return 0; }
|
||||||
--- a/arch/mips/pci/Makefile
|
--- a/arch/mips/pci/Makefile
|
||||||
+++ b/arch/mips/pci/Makefile
|
+++ b/arch/mips/pci/Makefile
|
||||||
@@ -20,7 +20,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o
|
@@ -20,7 +20,7 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o
|
||||||
@ -1,10 +1,14 @@
|
|||||||
From e30d942814a606c5258c7adafc6bbb49836573e9 Mon Sep 17 00:00:00 2001
|
From 902b348cdddd4c858993e02aced615aa6caf04d0 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Sat, 17 Dec 2011 10:13:08 +0100
|
Date: Wed, 14 Mar 2012 10:45:30 +0100
|
||||||
Subject: [PATCH 33/35] MIPS: ath79: add PCI registration code for AR934X
|
Subject: [PATCH 35/47] MIPS: ath79: add PCI registration code for AR934X
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Cc: mcgrof@infradead.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3516/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/Kconfig | 2 ++
|
arch/mips/ath79/Kconfig | 2 ++
|
||||||
arch/mips/ath79/pci.c | 13 ++++++++++++-
|
arch/mips/ath79/pci.c | 13 ++++++++++++-
|
||||||
@ -1,107 +0,0 @@
|
|||||||
From 2d832612094b5592641364773c5ab2a3658f7120 Mon Sep 17 00:00:00 2001
|
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
|
||||||
Date: Sun, 11 Dec 2011 18:34:13 +0100
|
|
||||||
Subject: [PATCH 31/35] MIPS: ath79: add USB platform setup code for AR934X
|
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
|
||||||
---
|
|
||||||
arch/mips/ath79/dev-usb.c | 28 +++++++++++++++++++
|
|
||||||
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 35 ++++++++++++++++++++++++
|
|
||||||
2 files changed, 63 insertions(+), 0 deletions(-)
|
|
||||||
|
|
||||||
--- a/arch/mips/ath79/dev-usb.c
|
|
||||||
+++ b/arch/mips/ath79/dev-usb.c
|
|
||||||
@@ -180,6 +180,32 @@ static void __init ar933x_usb_setup(void
|
|
||||||
platform_device_register(&ath79_ehci_device);
|
|
||||||
}
|
|
||||||
|
|
||||||
+static void __init ar934x_usb_setup(void)
|
|
||||||
+{
|
|
||||||
+ u32 bootstrap;
|
|
||||||
+
|
|
||||||
+ bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
|
|
||||||
+ if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE)
|
|
||||||
+ return;
|
|
||||||
+
|
|
||||||
+ ath79_device_reset_clear(AR934X_RESET_USBSUS_OVERRIDE);
|
|
||||||
+ udelay(1000);
|
|
||||||
+
|
|
||||||
+ ath79_device_reset_set(AR934X_RESET_USB_PHY);
|
|
||||||
+ udelay(1000);
|
|
||||||
+
|
|
||||||
+ ath79_device_reset_set(AR934X_RESET_USB_PHY_ANALOG);
|
|
||||||
+ udelay(1000);
|
|
||||||
+
|
|
||||||
+ ath79_device_reset_set(AR934X_RESET_USB_HOST);
|
|
||||||
+ udelay(1000);
|
|
||||||
+
|
|
||||||
+ ath79_ehci_resources[0].start = AR934X_EHCI_BASE;
|
|
||||||
+ ath79_ehci_resources[0].end = AR934X_EHCI_BASE + AR934X_EHCI_SIZE - 1;
|
|
||||||
+ ath79_ehci_device.name = "ar934x-ehci";
|
|
||||||
+ platform_device_register(&ath79_ehci_device);
|
|
||||||
+}
|
|
||||||
+
|
|
||||||
void __init ath79_register_usb(void)
|
|
||||||
{
|
|
||||||
if (soc_is_ar71xx())
|
|
||||||
@@ -192,6 +218,8 @@ void __init ath79_register_usb(void)
|
|
||||||
ar913x_usb_setup();
|
|
||||||
else if (soc_is_ar933x())
|
|
||||||
ar933x_usb_setup();
|
|
||||||
+ else if (soc_is_ar934x())
|
|
||||||
+ ar934x_usb_setup();
|
|
||||||
else
|
|
||||||
BUG();
|
|
||||||
}
|
|
||||||
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
|
||||||
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
|
||||||
@@ -63,6 +63,8 @@
|
|
||||||
|
|
||||||
#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
|
|
||||||
#define AR934X_WMAC_SIZE 0x20000
|
|
||||||
+#define AR934X_EHCI_BASE 0x1b000000
|
|
||||||
+#define AR934X_EHCI_SIZE 0x1000
|
|
||||||
|
|
||||||
/*
|
|
||||||
* DDR_CTRL block
|
|
||||||
@@ -288,6 +290,39 @@
|
|
||||||
#define AR933X_RESET_USB_PHY BIT(4)
|
|
||||||
#define AR933X_RESET_USBSUS_OVERRIDE BIT(3)
|
|
||||||
|
|
||||||
+#define AR934X_RESET_HOST BIT(31)
|
|
||||||
+#define AR934X_RESET_SLIC BIT(30)
|
|
||||||
+#define AR934X_RESET_HDMA BIT(29)
|
|
||||||
+#define AR934X_RESET_EXTERNAL BIT(28)
|
|
||||||
+#define AR934X_RESET_RTC BIT(27)
|
|
||||||
+#define AR934X_RESET_PCIE_EP_INT BIT(26)
|
|
||||||
+#define AR934X_RESET_CHKSUM_ACC BIT(25)
|
|
||||||
+#define AR934X_RESET_FULL_CHIP BIT(24)
|
|
||||||
+#define AR934X_RESET_GE1_MDIO BIT(23)
|
|
||||||
+#define AR934X_RESET_GE0_MDIO BIT(22)
|
|
||||||
+#define AR934X_RESET_CPU_NMI BIT(21)
|
|
||||||
+#define AR934X_RESET_CPU_COLD BIT(20)
|
|
||||||
+#define AR934X_RESET_HOST_RESET_INT BIT(19)
|
|
||||||
+#define AR934X_RESET_PCIE_EP BIT(18)
|
|
||||||
+#define AR934X_RESET_UART1 BIT(17)
|
|
||||||
+#define AR934X_RESET_DDR BIT(16)
|
|
||||||
+#define AR934X_RESET_USB_PHY_PLL_PWD_EXT BIT(15)
|
|
||||||
+#define AR934X_RESET_NANDF BIT(14)
|
|
||||||
+#define AR934X_RESET_GE1_MAC BIT(13)
|
|
||||||
+#define AR934X_RESET_ETH_SWITCH_ANALOG BIT(12)
|
|
||||||
+#define AR934X_RESET_USB_PHY_ANALOG BIT(11)
|
|
||||||
+#define AR934X_RESET_HOST_DMA_INT BIT(10)
|
|
||||||
+#define AR934X_RESET_GE0_MAC BIT(9)
|
|
||||||
+#define AR934X_RESET_ETH_SIWTCH BIT(8)
|
|
||||||
+#define AR934X_RESET_PCIE_PHY BIT(7)
|
|
||||||
+#define AR934X_RESET_PCIE BIT(6)
|
|
||||||
+#define AR934X_RESET_USB_HOST BIT(5)
|
|
||||||
+#define AR934X_RESET_USB_PHY BIT(4)
|
|
||||||
+#define AR934X_RESET_USBSUS_OVERRIDE BIT(3)
|
|
||||||
+#define AR934X_RESET_LUT BIT(2)
|
|
||||||
+#define AR934X_RESET_MBOX BIT(1)
|
|
||||||
+#define AR934X_RESET_I2S BIT(0)
|
|
||||||
+
|
|
||||||
#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
|
|
||||||
|
|
||||||
#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23)
|
|
||||||
@ -1,16 +1,20 @@
|
|||||||
From a01e8727327cf0fb6382ca8700a3a3f73d93202a Mon Sep 17 00:00:00 2001
|
From 4921cb7d9f6997b6f7aefd37c7cfd50324e8fd75 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Fri, 9 Dec 2011 22:23:02 +0100
|
Date: Wed, 14 Mar 2012 20:39:35 +0100
|
||||||
Subject: [PATCH 34/35] MIPS: ath79: add initial support for the Atheros DB120 board
|
Subject: [PATCH 36/47] MIPS: ath79: add initial support for the Atheros DB120 board
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
||||||
|
Cc: linux-mips@linux-mips.org
|
||||||
|
Cc: mcgrof@infradead.org
|
||||||
|
Patchwork: https://patchwork.linux-mips.org/patch/3517/
|
||||||
|
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/Kconfig | 12 +++
|
arch/mips/ath79/Kconfig | 12 ++++
|
||||||
arch/mips/ath79/Makefile | 1 +
|
arch/mips/ath79/Makefile | 1 +
|
||||||
arch/mips/ath79/mach-db120.c | 155 ++++++++++++++++++++++++++++++++++++++++++
|
arch/mips/ath79/mach-db120.c | 134 ++++++++++++++++++++++++++++++++++++++++++
|
||||||
arch/mips/ath79/machtypes.h | 1 +
|
arch/mips/ath79/machtypes.h | 1 +
|
||||||
4 files changed, 169 insertions(+), 0 deletions(-)
|
4 files changed, 148 insertions(+), 0 deletions(-)
|
||||||
create mode 100644 arch/mips/ath79/mach-db120.c
|
create mode 100644 arch/mips/ath79/mach-db120.c
|
||||||
|
|
||||||
--- a/arch/mips/ath79/Kconfig
|
--- a/arch/mips/ath79/Kconfig
|
||||||
@ -45,44 +49,25 @@ Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
|||||||
obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o
|
obj-$(CONFIG_ATH79_MACH_UBNT_XM) += mach-ubnt-xm.o
|
||||||
--- /dev/null
|
--- /dev/null
|
||||||
+++ b/arch/mips/ath79/mach-db120.c
|
+++ b/arch/mips/ath79/mach-db120.c
|
||||||
@@ -0,0 +1,155 @@
|
@@ -0,0 +1,134 @@
|
||||||
+/*
|
+/*
|
||||||
+ * Atheros DB120 reference board support
|
+ * Atheros DB120 reference board support
|
||||||
+ *
|
+ *
|
||||||
+ * Copyright (c) 2011 Qualcomm Atheros
|
+ * Copyright (c) 2011 Qualcomm Atheros
|
||||||
+ * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org>
|
+ * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org>
|
||||||
+ *
|
+ *
|
||||||
+ * All rights reserved.
|
+ * Permission to use, copy, modify, and/or distribute this software for any
|
||||||
|
+ * purpose with or without fee is hereby granted, provided that the above
|
||||||
|
+ * copyright notice and this permission notice appear in all copies.
|
||||||
+ *
|
+ *
|
||||||
+ * Redistribution and use in source and binary forms, with or without
|
+ * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
|
||||||
+ * modification, are permitted (subject to the limitations in the
|
+ * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
|
||||||
+ * disclaimer below) provided that the following conditions are met:
|
+ * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
|
||||||
|
+ * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
|
||||||
|
+ * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
|
||||||
|
+ * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
|
||||||
|
+ * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
|
||||||
+ *
|
+ *
|
||||||
+ * * Redistributions of source code must retain the above copyright
|
|
||||||
+ * notice, this list of conditions and the following disclaimer.
|
|
||||||
+ *
|
|
||||||
+ * * Redistributions in binary form must reproduce the above copyright
|
|
||||||
+ * notice, this list of conditions and the following disclaimer in the
|
|
||||||
+ * documentation and/or other materials provided with the
|
|
||||||
+ * distribution.
|
|
||||||
+ *
|
|
||||||
+ * * Neither the name of Qualcomm Atheros nor the names of its
|
|
||||||
+ * contributors may be used to endorse or promote products derived
|
|
||||||
+ * from this software without specific prior written permission.
|
|
||||||
+ *
|
|
||||||
+ * NO EXPRESS OR IMPLIED LICENSES TO ANY PARTY'S PATENT RIGHTS ARE
|
|
||||||
+ * GRANTED BY THIS LICENSE. THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT
|
|
||||||
+ * HOLDERS AND CONTRIBUTORS "AS IS" AND ANY EXPRESS OR IMPLIED
|
|
||||||
+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
|
||||||
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
|
||||||
+ * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
|
|
||||||
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
|
|
||||||
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
|
|
||||||
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
|
|
||||||
+ * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
|
|
||||||
+ * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
|
|
||||||
+ * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
|
|
||||||
+ * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
|
||||||
+ */
|
+ */
|
||||||
+
|
+
|
||||||
+#include <linux/pci.h>
|
+#include <linux/pci.h>
|
||||||
@ -92,7 +77,6 @@ Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
|||||||
+#include "dev-gpio-buttons.h"
|
+#include "dev-gpio-buttons.h"
|
||||||
+#include "dev-leds-gpio.h"
|
+#include "dev-leds-gpio.h"
|
||||||
+#include "dev-spi.h"
|
+#include "dev-spi.h"
|
||||||
+#include "dev-usb.h"
|
|
||||||
+#include "dev-wmac.h"
|
+#include "dev-wmac.h"
|
||||||
+#include "pci.h"
|
+#include "pci.h"
|
||||||
+
|
+
|
||||||
@ -194,7 +178,6 @@ Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
|||||||
+ db120_gpio_keys);
|
+ db120_gpio_keys);
|
||||||
+ ath79_register_spi(&db120_spi_data, db120_spi_info,
|
+ ath79_register_spi(&db120_spi_data, db120_spi_info,
|
||||||
+ ARRAY_SIZE(db120_spi_info));
|
+ ARRAY_SIZE(db120_spi_info));
|
||||||
+ ath79_register_usb();
|
|
||||||
+ ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET);
|
+ ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET);
|
||||||
+ db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);
|
+ db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);
|
||||||
+}
|
+}
|
||||||
@ -0,0 +1,37 @@
|
|||||||
|
From fe0cc1327ddfb69b171102019a8148a9c8b352b8 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Date: Wed, 28 Mar 2012 11:00:19 +0200
|
||||||
|
Subject: [PATCH 37/47] MIPS: ath79: use correct IRQ number for the OHCI controller on AR7240
|
||||||
|
|
||||||
|
The currently assigned IRQ number to the OHCI
|
||||||
|
controller is incorrect for the AR7240 SoC, and
|
||||||
|
that leads to the following error message from
|
||||||
|
the OHCI driver:
|
||||||
|
|
||||||
|
ohci_hcd: USB 1.1 'Open' Host Controller (OHCI) Driver
|
||||||
|
ath79-ohci ath79-ohci: Atheros built-in OHCI controller
|
||||||
|
ath79-ohci ath79-ohci: new USB bus registered, assigned bus number 1
|
||||||
|
ath79-ohci ath79-ohci: irq 14, io mem 0x1b000000
|
||||||
|
hub 1-0:1.0: USB hub found
|
||||||
|
hub 1-0:1.0: 1 port detected
|
||||||
|
usb 1-1: new full-speed USB device number 2 using ath79-ohci
|
||||||
|
ath79-ohci ath79-ohci: Unlink after no-IRQ? Controller is probably using the wrong IRQ.
|
||||||
|
|
||||||
|
Fix this by using the correct IRQ number.
|
||||||
|
|
||||||
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
---
|
||||||
|
arch/mips/ath79/dev-usb.c | 2 ++
|
||||||
|
1 files changed, 2 insertions(+), 0 deletions(-)
|
||||||
|
|
||||||
|
--- a/arch/mips/ath79/dev-usb.c
|
||||||
|
+++ b/arch/mips/ath79/dev-usb.c
|
||||||
|
@@ -145,6 +145,8 @@ static void __init ar7240_usb_setup(void
|
||||||
|
|
||||||
|
ath79_ohci_resources[0].start = AR7240_OHCI_BASE;
|
||||||
|
ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;
|
||||||
|
+ ath79_ohci_resources[1].start = ATH79_CPU_IRQ_USB;
|
||||||
|
+ ath79_ohci_resources[1].end = ATH79_CPU_IRQ_USB;
|
||||||
|
platform_device_register(&ath79_ohci_device);
|
||||||
|
}
|
||||||
|
|
||||||
@ -0,0 +1,140 @@
|
|||||||
|
From 30b15d9a4b05e38ae19e340b63e1a2bca917d557 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Date: Wed, 28 Mar 2012 14:15:23 +0200
|
||||||
|
Subject: [PATCH 38/47] MIPS: ath79: use a helper function for USB resource initialization
|
||||||
|
|
||||||
|
This improves code readability, and ensures that
|
||||||
|
all resource fields will be initialized correctly.
|
||||||
|
Additionally, it helps to reduce the size of the
|
||||||
|
kernel image by using uninitialized resource
|
||||||
|
variables.
|
||||||
|
|
||||||
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
---
|
||||||
|
arch/mips/ath79/dev-usb.c | 64 +++++++++++++++++++-------------------------
|
||||||
|
1 files changed, 28 insertions(+), 36 deletions(-)
|
||||||
|
|
||||||
|
--- a/arch/mips/ath79/dev-usb.c
|
||||||
|
+++ b/arch/mips/ath79/dev-usb.c
|
||||||
|
@@ -25,17 +25,7 @@
|
||||||
|
#include "common.h"
|
||||||
|
#include "dev-usb.h"
|
||||||
|
|
||||||
|
-static struct resource ath79_ohci_resources[] = {
|
||||||
|
- [0] = {
|
||||||
|
- /* .start and .end fields are filled dynamically */
|
||||||
|
- .flags = IORESOURCE_MEM,
|
||||||
|
- },
|
||||||
|
- [1] = {
|
||||||
|
- .start = ATH79_MISC_IRQ_OHCI,
|
||||||
|
- .end = ATH79_MISC_IRQ_OHCI,
|
||||||
|
- .flags = IORESOURCE_IRQ,
|
||||||
|
- },
|
||||||
|
-};
|
||||||
|
+static struct resource ath79_ohci_resources[2];
|
||||||
|
|
||||||
|
static u64 ath79_ohci_dmamask = DMA_BIT_MASK(32);
|
||||||
|
|
||||||
|
@@ -54,17 +44,7 @@ static struct platform_device ath79_ohci
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
-static struct resource ath79_ehci_resources[] = {
|
||||||
|
- [0] = {
|
||||||
|
- /* .start and .end fields are filled dynamically */
|
||||||
|
- .flags = IORESOURCE_MEM,
|
||||||
|
- },
|
||||||
|
- [1] = {
|
||||||
|
- .start = ATH79_CPU_IRQ_USB,
|
||||||
|
- .end = ATH79_CPU_IRQ_USB,
|
||||||
|
- .flags = IORESOURCE_IRQ,
|
||||||
|
- },
|
||||||
|
-};
|
||||||
|
+static struct resource ath79_ehci_resources[2];
|
||||||
|
|
||||||
|
static u64 ath79_ehci_dmamask = DMA_BIT_MASK(32);
|
||||||
|
|
||||||
|
@@ -90,6 +70,20 @@ static struct platform_device ath79_ehci
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
+static void __init ath79_usb_init_resource(struct resource res[2],
|
||||||
|
+ unsigned long base,
|
||||||
|
+ unsigned long size,
|
||||||
|
+ int irq)
|
||||||
|
+{
|
||||||
|
+ res[0].flags = IORESOURCE_MEM;
|
||||||
|
+ res[0].start = base;
|
||||||
|
+ res[0].end = base + size - 1;
|
||||||
|
+
|
||||||
|
+ res[1].flags = IORESOURCE_IRQ;
|
||||||
|
+ res[1].start = irq;
|
||||||
|
+ res[1].end = irq;
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
#define AR71XX_USB_RESET_MASK (AR71XX_RESET_USB_HOST | \
|
||||||
|
AR71XX_RESET_USB_PHY | \
|
||||||
|
AR71XX_RESET_USB_OHCI_DLL)
|
||||||
|
@@ -114,12 +108,12 @@ static void __init ath79_usb_setup(void)
|
||||||
|
|
||||||
|
mdelay(900);
|
||||||
|
|
||||||
|
- ath79_ohci_resources[0].start = AR71XX_OHCI_BASE;
|
||||||
|
- ath79_ohci_resources[0].end = AR71XX_OHCI_BASE + AR71XX_OHCI_SIZE - 1;
|
||||||
|
+ ath79_usb_init_resource(ath79_ohci_resources, AR71XX_OHCI_BASE,
|
||||||
|
+ AR71XX_OHCI_SIZE, ATH79_MISC_IRQ_OHCI);
|
||||||
|
platform_device_register(&ath79_ohci_device);
|
||||||
|
|
||||||
|
- ath79_ehci_resources[0].start = AR71XX_EHCI_BASE;
|
||||||
|
- ath79_ehci_resources[0].end = AR71XX_EHCI_BASE + AR71XX_EHCI_SIZE - 1;
|
||||||
|
+ ath79_usb_init_resource(ath79_ehci_resources, AR71XX_EHCI_BASE,
|
||||||
|
+ AR71XX_EHCI_SIZE, ATH79_CPU_IRQ_USB);
|
||||||
|
ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v1;
|
||||||
|
platform_device_register(&ath79_ehci_device);
|
||||||
|
}
|
||||||
|
@@ -143,10 +137,8 @@ static void __init ar7240_usb_setup(void
|
||||||
|
|
||||||
|
iounmap(usb_ctrl_base);
|
||||||
|
|
||||||
|
- ath79_ohci_resources[0].start = AR7240_OHCI_BASE;
|
||||||
|
- ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;
|
||||||
|
- ath79_ohci_resources[1].start = ATH79_CPU_IRQ_USB;
|
||||||
|
- ath79_ohci_resources[1].end = ATH79_CPU_IRQ_USB;
|
||||||
|
+ ath79_usb_init_resource(ath79_ohci_resources, AR7240_OHCI_BASE,
|
||||||
|
+ AR7240_OHCI_SIZE, ATH79_CPU_IRQ_USB);
|
||||||
|
platform_device_register(&ath79_ohci_device);
|
||||||
|
}
|
||||||
|
|
||||||
|
@@ -161,8 +153,8 @@ static void __init ar724x_usb_setup(void
|
||||||
|
ath79_device_reset_clear(AR724X_RESET_USB_PHY);
|
||||||
|
mdelay(10);
|
||||||
|
|
||||||
|
- ath79_ehci_resources[0].start = AR724X_EHCI_BASE;
|
||||||
|
- ath79_ehci_resources[0].end = AR724X_EHCI_BASE + AR724X_EHCI_SIZE - 1;
|
||||||
|
+ ath79_usb_init_resource(ath79_ehci_resources, AR724X_EHCI_BASE,
|
||||||
|
+ AR724X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
|
||||||
|
ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
|
||||||
|
platform_device_register(&ath79_ehci_device);
|
||||||
|
}
|
||||||
|
@@ -178,8 +170,8 @@ static void __init ar913x_usb_setup(void
|
||||||
|
ath79_device_reset_clear(AR913X_RESET_USB_PHY);
|
||||||
|
mdelay(10);
|
||||||
|
|
||||||
|
- ath79_ehci_resources[0].start = AR913X_EHCI_BASE;
|
||||||
|
- ath79_ehci_resources[0].end = AR913X_EHCI_BASE + AR913X_EHCI_SIZE - 1;
|
||||||
|
+ ath79_usb_init_resource(ath79_ehci_resources, AR913X_EHCI_BASE,
|
||||||
|
+ AR913X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
|
||||||
|
ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
|
||||||
|
platform_device_register(&ath79_ehci_device);
|
||||||
|
}
|
||||||
|
@@ -195,8 +187,8 @@ static void __init ar933x_usb_setup(void
|
||||||
|
ath79_device_reset_clear(AR933X_RESET_USB_PHY);
|
||||||
|
mdelay(10);
|
||||||
|
|
||||||
|
- ath79_ehci_resources[0].start = AR933X_EHCI_BASE;
|
||||||
|
- ath79_ehci_resources[0].end = AR933X_EHCI_BASE + AR933X_EHCI_SIZE - 1;
|
||||||
|
+ ath79_usb_init_resource(ath79_ehci_resources, AR933X_EHCI_BASE,
|
||||||
|
+ AR933X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
|
||||||
|
ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
|
||||||
|
platform_device_register(&ath79_ehci_device);
|
||||||
|
}
|
||||||
@ -0,0 +1,78 @@
|
|||||||
|
From 635d5a2ac8aa483c3a0635c60bff8ea8978ff6a7 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Date: Sun, 11 Dec 2011 18:34:13 +0100
|
||||||
|
Subject: [PATCH 39/47] MIPS: ath79: add USB platform setup code for AR934X
|
||||||
|
|
||||||
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
---
|
||||||
|
arch/mips/ath79/dev-usb.c | 28 ++++++++++++++++++++++++
|
||||||
|
arch/mips/include/asm/mach-ath79/ar71xx_regs.h | 7 ++++++
|
||||||
|
2 files changed, 35 insertions(+), 0 deletions(-)
|
||||||
|
|
||||||
|
--- a/arch/mips/ath79/dev-usb.c
|
||||||
|
+++ b/arch/mips/ath79/dev-usb.c
|
||||||
|
@@ -193,6 +193,32 @@ static void __init ar933x_usb_setup(void
|
||||||
|
platform_device_register(&ath79_ehci_device);
|
||||||
|
}
|
||||||
|
|
||||||
|
+static void __init ar934x_usb_setup(void)
|
||||||
|
+{
|
||||||
|
+ u32 bootstrap;
|
||||||
|
+
|
||||||
|
+ bootstrap = ath79_reset_rr(AR934X_RESET_REG_BOOTSTRAP);
|
||||||
|
+ if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE)
|
||||||
|
+ return;
|
||||||
|
+
|
||||||
|
+ ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE);
|
||||||
|
+ udelay(1000);
|
||||||
|
+
|
||||||
|
+ ath79_device_reset_clear(AR934X_RESET_USB_PHY);
|
||||||
|
+ udelay(1000);
|
||||||
|
+
|
||||||
|
+ ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG);
|
||||||
|
+ udelay(1000);
|
||||||
|
+
|
||||||
|
+ ath79_device_reset_clear(AR934X_RESET_USB_HOST);
|
||||||
|
+ udelay(1000);
|
||||||
|
+
|
||||||
|
+ ath79_usb_init_resource(ath79_ehci_resources, AR934X_EHCI_BASE,
|
||||||
|
+ AR934X_EHCI_SIZE, ATH79_CPU_IRQ_USB);
|
||||||
|
+ ath79_ehci_device.dev.platform_data = &ath79_ehci_pdata_v2;
|
||||||
|
+ platform_device_register(&ath79_ehci_device);
|
||||||
|
+}
|
||||||
|
+
|
||||||
|
void __init ath79_register_usb(void)
|
||||||
|
{
|
||||||
|
if (soc_is_ar71xx())
|
||||||
|
@@ -205,6 +231,8 @@ void __init ath79_register_usb(void)
|
||||||
|
ar913x_usb_setup();
|
||||||
|
else if (soc_is_ar933x())
|
||||||
|
ar933x_usb_setup();
|
||||||
|
+ else if (soc_is_ar934x())
|
||||||
|
+ ar934x_usb_setup();
|
||||||
|
else
|
||||||
|
BUG();
|
||||||
|
}
|
||||||
|
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||||
|
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
||||||
|
@@ -63,6 +63,8 @@
|
||||||
|
|
||||||
|
#define AR934X_WMAC_BASE (AR71XX_APB_BASE + 0x00100000)
|
||||||
|
#define AR934X_WMAC_SIZE 0x20000
|
||||||
|
+#define AR934X_EHCI_BASE 0x1b000000
|
||||||
|
+#define AR934X_EHCI_SIZE 0x1000
|
||||||
|
|
||||||
|
/*
|
||||||
|
* DDR_CTRL block
|
||||||
|
@@ -288,6 +290,11 @@
|
||||||
|
#define AR933X_RESET_USB_PHY BIT(4)
|
||||||
|
#define AR933X_RESET_USBSUS_OVERRIDE BIT(3)
|
||||||
|
|
||||||
|
+#define AR934X_RESET_USB_PHY_ANALOG BIT(11)
|
||||||
|
+#define AR934X_RESET_USB_HOST BIT(5)
|
||||||
|
+#define AR934X_RESET_USB_PHY BIT(4)
|
||||||
|
+#define AR934X_RESET_USBSUS_OVERRIDE BIT(3)
|
||||||
|
+
|
||||||
|
#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
|
||||||
|
|
||||||
|
#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23)
|
||||||
@ -0,0 +1,28 @@
|
|||||||
|
From 932c1688e960bff170f1fc8072b3d3e958407a60 Mon Sep 17 00:00:00 2001
|
||||||
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
Date: Tue, 13 Mar 2012 13:51:09 +0100
|
||||||
|
Subject: [PATCH 40/47] MIPS: ath79: register USB host controller on the DB120 board
|
||||||
|
|
||||||
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
|
---
|
||||||
|
arch/mips/ath79/mach-db120.c | 2 ++
|
||||||
|
1 files changed, 2 insertions(+), 0 deletions(-)
|
||||||
|
|
||||||
|
--- a/arch/mips/ath79/mach-db120.c
|
||||||
|
+++ b/arch/mips/ath79/mach-db120.c
|
||||||
|
@@ -25,6 +25,7 @@
|
||||||
|
#include "dev-gpio-buttons.h"
|
||||||
|
#include "dev-leds-gpio.h"
|
||||||
|
#include "dev-spi.h"
|
||||||
|
+#include "dev-usb.h"
|
||||||
|
#include "dev-wmac.h"
|
||||||
|
#include "pci.h"
|
||||||
|
|
||||||
|
@@ -126,6 +127,7 @@ static void __init db120_setup(void)
|
||||||
|
db120_gpio_keys);
|
||||||
|
ath79_register_spi(&db120_spi_data, db120_spi_info,
|
||||||
|
ARRAY_SIZE(db120_spi_info));
|
||||||
|
+ ath79_register_usb();
|
||||||
|
ath79_register_wmac(art + DB120_WMAC_CALDATA_OFFSET);
|
||||||
|
db120_pci_init(art + DB120_PCIE_CALDATA_OFFSET);
|
||||||
|
}
|
||||||
@ -1,41 +0,0 @@
|
|||||||
From cbf8930fe259777fb746f0387bf821729061c122 Mon Sep 17 00:00:00 2001
|
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
|
||||||
Date: Sun, 11 Dec 2011 22:09:20 +0100
|
|
||||||
Subject: [PATCH 35/35] USB: ehci-ath79: add device_id entry for the AR934X SoCs
|
|
||||||
|
|
||||||
Also make the USB_EHCI_ATH79 selectable for the AR934X SoCs.
|
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|
||||||
Acked-by: Luis R. Rodriguez <mcgrof@qca.qualcomm.com>
|
|
||||||
Cc: Alan Stern <stern@rowland.harvard.edu>
|
|
||||||
Cc: Greg Kroah-Hartman <gregkh@suse.de>
|
|
||||||
Cc: linux-usb@vger.kernel.org
|
|
||||||
---
|
|
||||||
drivers/usb/host/Kconfig | 2 +-
|
|
||||||
drivers/usb/host/ehci-ath79.c | 4 ++++
|
|
||||||
2 files changed, 5 insertions(+), 1 deletions(-)
|
|
||||||
|
|
||||||
--- a/drivers/usb/host/Kconfig
|
|
||||||
+++ b/drivers/usb/host/Kconfig
|
|
||||||
@@ -219,7 +219,7 @@ config USB_CNS3XXX_EHCI
|
|
||||||
|
|
||||||
config USB_EHCI_ATH79
|
|
||||||
bool "EHCI support for AR7XXX/AR9XXX SoCs"
|
|
||||||
- depends on USB_EHCI_HCD && (SOC_AR71XX || SOC_AR724X || SOC_AR913X || SOC_AR933X)
|
|
||||||
+ depends on USB_EHCI_HCD && (SOC_AR71XX || SOC_AR724X || SOC_AR913X || SOC_AR933X || SOC_AR934X)
|
|
||||||
select USB_EHCI_ROOT_HUB_TT
|
|
||||||
default y
|
|
||||||
---help---
|
|
||||||
--- a/drivers/usb/host/ehci-ath79.c
|
|
||||||
+++ b/drivers/usb/host/ehci-ath79.c
|
|
||||||
@@ -37,6 +37,10 @@ static const struct platform_device_id e
|
|
||||||
.driver_data = EHCI_ATH79_IP_V2,
|
|
||||||
},
|
|
||||||
{
|
|
||||||
+ .name = "ar934x-ehci",
|
|
||||||
+ .driver_data = EHCI_ATH79_IP_V2,
|
|
||||||
+ },
|
|
||||||
+ {
|
|
||||||
/* terminating entry */
|
|
||||||
},
|
|
||||||
};
|
|
||||||
@ -1,13 +1,13 @@
|
|||||||
From 8e948c035dd7983eccc3a889f2497e64044f3a31 Mon Sep 17 00:00:00 2001
|
From 5e5ffd34e38fbbfa0a78833f35aa3c4d5d77e122 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Wed, 11 Jan 2012 20:06:35 +0100
|
Date: Wed, 11 Jan 2012 20:06:35 +0100
|
||||||
Subject: [PATCH 1/7] spi/ath79: add delay between SCK changes
|
Subject: [PATCH 41/47] spi/ath79: add delay between SCK changes
|
||||||
|
|
||||||
The driver uses the "as fast as it can" approach
|
The driver uses the "as fast as it can" approach
|
||||||
to drive the SCK signal. However this does not
|
to drive the SCK signal. However this does not
|
||||||
work with certain low speed SPI chips (e.g. the
|
work with certain low speed SPI chips (e.g. the
|
||||||
PCF2123 RTC chip). Add per-bit slowdowns in order
|
PCF2123 RTC chip). Add per-bit slowdowns in order
|
||||||
to be able to use the driver with such chips as
|
to be able to use the driver with such chips as
|
||||||
well.
|
well.
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From ea7e40aedae58b7a0f0ccd8658063de499734874 Mon Sep 17 00:00:00 2001
|
From 52fa804e11c1722ec56de2e3888a9f8dfb96404b Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Wed, 11 Jan 2012 20:33:41 +0100
|
Date: Wed, 11 Jan 2012 20:33:41 +0100
|
||||||
Subject: [PATCH 2/7] spi/ath79: add missing HIGH->LOW SCK transition
|
Subject: [PATCH 42/47] spi/ath79: add missing HIGH->LOW SCK transition
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
---
|
---
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From ecf57a64feb737dec1da72aab21dccd30a88ba19 Mon Sep 17 00:00:00 2001
|
From 3ba7fd81798169e8d40bc7e4800c6a0e691c40b7 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Mon, 9 Jan 2012 15:03:28 +0100
|
Date: Mon, 9 Jan 2012 15:03:28 +0100
|
||||||
Subject: [PATCH 3/7] spi/ath79: remove superfluous chip select code
|
Subject: [PATCH 43/47] spi/ath79: remove superfluous chip select code
|
||||||
|
|
||||||
The spi_bitbang driver calls the chipselect function
|
The spi_bitbang driver calls the chipselect function
|
||||||
of the driver from spi_bitbang_setup in order to
|
of the driver from spi_bitbang_setup in order to
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From dd5b424b0b3f0370f9b63594ad53c16989b6ad78 Mon Sep 17 00:00:00 2001
|
From 07f515fc0f69d18110cb2369e0b5d0fb4bdd7dfa Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Mon, 9 Jan 2012 15:04:21 +0100
|
Date: Mon, 9 Jan 2012 15:04:21 +0100
|
||||||
Subject: [PATCH 4/7] spi/ath79: use gpio_request_one
|
Subject: [PATCH 44/47] spi/ath79: use gpio_request_one
|
||||||
|
|
||||||
Use gpio_request_one() instead of multiple gpiolib calls.
|
Use gpio_request_one() instead of multiple gpiolib calls.
|
||||||
|
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From 25e681989198e94656eab9df22b8b761abd2ae26 Mon Sep 17 00:00:00 2001
|
From 47fdda225880ab0aaa8a75f61991a72fade591ab Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Mon, 9 Jan 2012 15:00:46 +0100
|
Date: Mon, 9 Jan 2012 15:00:46 +0100
|
||||||
Subject: [PATCH 5/7] spi/ath79: avoid multiple initialization of the SPI controller
|
Subject: [PATCH 45/47] spi/ath79: avoid multiple initialization of the SPI controller
|
||||||
|
|
||||||
Currently we are initializing the SPI controller in
|
Currently we are initializing the SPI controller in
|
||||||
the chip select line function, and that function is
|
the chip select line function, and that function is
|
||||||
@ -1,7 +1,7 @@
|
|||||||
From e01dcc2835017b55e936bd150ddab29bfcf2c63c Mon Sep 17 00:00:00 2001
|
From 8f30eb1354f54684d1d09599b2466f1a0e69d9c3 Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Wed, 11 Jan 2012 22:19:32 +0100
|
Date: Wed, 11 Jan 2012 22:19:32 +0100
|
||||||
Subject: [PATCH 6/7] spi/ath79: add shutdown handler
|
Subject: [PATCH 46/47] spi/ath79: add shutdown handler
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
---
|
---
|
||||||
@ -1,17 +1,18 @@
|
|||||||
From bdbd9b2861ba73557795915598bb276a8568d130 Mon Sep 17 00:00:00 2001
|
From 16535fe56591ff85acd6776f53ff515799b037ba Mon Sep 17 00:00:00 2001
|
||||||
From: Gabor Juhos <juhosg@openwrt.org>
|
From: Gabor Juhos <juhosg@openwrt.org>
|
||||||
Date: Wed, 11 Jan 2012 22:25:11 +0100
|
Date: Wed, 11 Jan 2012 22:25:11 +0100
|
||||||
Subject: [PATCH 7/7] spi/ath79: make chipselect logic more flexible
|
Subject: [PATCH 47/47] spi/ath79: make chipselect logic more flexible
|
||||||
|
|
||||||
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
||||||
---
|
---
|
||||||
arch/mips/ath79/mach-ap121.c | 6 ++
|
arch/mips/ath79/mach-ap121.c | 6 ++
|
||||||
arch/mips/ath79/mach-ap81.c | 6 ++
|
arch/mips/ath79/mach-ap81.c | 6 ++
|
||||||
|
arch/mips/ath79/mach-db120.c | 6 ++
|
||||||
arch/mips/ath79/mach-pb44.c | 6 ++
|
arch/mips/ath79/mach-pb44.c | 6 ++
|
||||||
arch/mips/ath79/mach-ubnt-xm.c | 6 ++
|
arch/mips/ath79/mach-ubnt-xm.c | 6 ++
|
||||||
.../include/asm/mach-ath79/ath79_spi_platform.h | 8 ++-
|
.../include/asm/mach-ath79/ath79_spi_platform.h | 8 ++-
|
||||||
drivers/spi/spi-ath79.c | 63 ++++++++++++--------
|
drivers/spi/spi-ath79.c | 70 +++++++++++++-------
|
||||||
6 files changed, 69 insertions(+), 26 deletions(-)
|
7 files changed, 82 insertions(+), 26 deletions(-)
|
||||||
|
|
||||||
--- a/arch/mips/ath79/mach-ap121.c
|
--- a/arch/mips/ath79/mach-ap121.c
|
||||||
+++ b/arch/mips/ath79/mach-ap121.c
|
+++ b/arch/mips/ath79/mach-ap121.c
|
||||||
@ -55,6 +56,27 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
|
--- a/arch/mips/ath79/mach-db120.c
|
||||||
|
+++ b/arch/mips/ath79/mach-db120.c
|
||||||
|
@@ -76,12 +76,18 @@ static struct gpio_keys_button db120_gpi
|
||||||
|
},
|
||||||
|
};
|
||||||
|
|
||||||
|
+static struct ath79_spi_controller_data db120_spi0_data = {
|
||||||
|
+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
|
||||||
|
+ .cs_line = 0,
|
||||||
|
+};
|
||||||
|
+
|
||||||
|
static struct spi_board_info db120_spi_info[] = {
|
||||||
|
{
|
||||||
|
.bus_num = 0,
|
||||||
|
.chip_select = 0,
|
||||||
|
.max_speed_hz = 25000000,
|
||||||
|
.modalias = "s25sl064a",
|
||||||
|
+ .controller_data = &db120_spi0_data,
|
||||||
|
}
|
||||||
|
};
|
||||||
|
|
||||||
--- a/arch/mips/ath79/mach-pb44.c
|
--- a/arch/mips/ath79/mach-pb44.c
|
||||||
+++ b/arch/mips/ath79/mach-pb44.c
|
+++ b/arch/mips/ath79/mach-pb44.c
|
||||||
@@ -87,12 +87,18 @@ static struct gpio_keys_button pb44_gpio
|
@@ -87,12 +87,18 @@ static struct gpio_keys_button pb44_gpio
|
||||||
@ -83,8 +105,8 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||||||
};
|
};
|
||||||
|
|
||||||
+static struct ath79_spi_controller_data ubnt_xm_spi0_data = {
|
+static struct ath79_spi_controller_data ubnt_xm_spi0_data = {
|
||||||
+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
|
+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
|
||||||
+ .cs_line = 0,
|
+ .cs_line = 0,
|
||||||
+};
|
+};
|
||||||
+
|
+
|
||||||
static struct spi_board_info ubnt_xm_spi_info[] = {
|
static struct spi_board_info ubnt_xm_spi_info[] = {
|
||||||
@ -200,14 +222,18 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||||||
}
|
}
|
||||||
|
|
||||||
return status;
|
return status;
|
||||||
@@ -145,9 +155,15 @@ static int ath79_spi_setup_cs(struct spi
|
@@ -145,9 +155,19 @@ static int ath79_spi_setup_cs(struct spi
|
||||||
|
|
||||||
static void ath79_spi_cleanup_cs(struct spi_device *spi)
|
static void ath79_spi_cleanup_cs(struct spi_device *spi)
|
||||||
{
|
{
|
||||||
- if (spi->chip_select) {
|
- if (spi->chip_select) {
|
||||||
- struct ath79_spi_controller_data *cdata = spi->controller_data;
|
- struct ath79_spi_controller_data *cdata = spi->controller_data;
|
||||||
- gpio_free(cdata->gpio);
|
- gpio_free(cdata->gpio);
|
||||||
+ struct ath79_spi_controller_data *cdata = spi->controller_data;
|
+ struct ath79_spi_controller_data *cdata;
|
||||||
|
+
|
||||||
|
+ cdata = spi->controller_data;
|
||||||
|
+ if (!cdata)
|
||||||
|
+ return;
|
||||||
+
|
+
|
||||||
+ switch (cdata->cs_type) {
|
+ switch (cdata->cs_type) {
|
||||||
+ case ATH79_SPI_CS_TYPE_INTERNAL:
|
+ case ATH79_SPI_CS_TYPE_INTERNAL:
|
||||||
@ -219,7 +245,17 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
@@ -215,6 +231,10 @@ static __devinit int ath79_spi_probe(str
|
@@ -155,6 +175,9 @@ static int ath79_spi_setup(struct spi_de
|
||||||
|
{
|
||||||
|
int status = 0;
|
||||||
|
|
||||||
|
+ if (spi->controller_data == NULL)
|
||||||
|
+ return -EINVAL;
|
||||||
|
+
|
||||||
|
if (spi->bits_per_word > 32)
|
||||||
|
return -EINVAL;
|
||||||
|
|
||||||
|
@@ -215,6 +238,10 @@ static __devinit int ath79_spi_probe(str
|
||||||
unsigned long rate;
|
unsigned long rate;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
@ -230,7 +266,7 @@ Signed-off-by: Gabor Juhos <juhosg@openwrt.org>
|
|||||||
master = spi_alloc_master(&pdev->dev, sizeof(*sp));
|
master = spi_alloc_master(&pdev->dev, sizeof(*sp));
|
||||||
if (master == NULL) {
|
if (master == NULL) {
|
||||||
dev_err(&pdev->dev, "failed to allocate spi master\n");
|
dev_err(&pdev->dev, "failed to allocate spi master\n");
|
||||||
@@ -224,17 +244,10 @@ static __devinit int ath79_spi_probe(str
|
@@ -224,17 +251,10 @@ static __devinit int ath79_spi_probe(str
|
||||||
sp = spi_master_get_devdata(master);
|
sp = spi_master_get_devdata(master);
|
||||||
platform_set_drvdata(pdev, sp);
|
platform_set_drvdata(pdev, sp);
|
||||||
|
|
||||||
@ -1,21 +0,0 @@
|
|||||||
--- a/arch/mips/ath79/mach-db120.c
|
|
||||||
+++ b/arch/mips/ath79/mach-db120.c
|
|
||||||
@@ -95,12 +95,18 @@ static struct gpio_keys_button db120_gpi
|
|
||||||
},
|
|
||||||
};
|
|
||||||
|
|
||||||
+static struct ath79_spi_controller_data db120_spi0_data = {
|
|
||||||
+ .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
|
|
||||||
+ .cs_line = 0,
|
|
||||||
+};
|
|
||||||
+
|
|
||||||
static struct spi_board_info db120_spi_info[] = {
|
|
||||||
{
|
|
||||||
.bus_num = 0,
|
|
||||||
.chip_select = 0,
|
|
||||||
.max_speed_hz = 25000000,
|
|
||||||
.modalias = "s25sl064a",
|
|
||||||
+ .controller_data = &db120_spi0_data,
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
||||||
@ -1,27 +0,0 @@
|
|||||||
--- a/arch/mips/ath79/gpio.c
|
|
||||||
+++ b/arch/mips/ath79/gpio.c
|
|
||||||
@@ -188,8 +188,10 @@ void __init ath79_gpio_init(void)
|
|
||||||
|
|
||||||
if (soc_is_ar71xx())
|
|
||||||
ath79_gpio_count = AR71XX_GPIO_COUNT;
|
|
||||||
- else if (soc_is_ar724x())
|
|
||||||
- ath79_gpio_count = AR724X_GPIO_COUNT;
|
|
||||||
+ else if (soc_is_ar7240())
|
|
||||||
+ ath79_gpio_count = AR7240_GPIO_COUNT;
|
|
||||||
+ else if (soc_is_ar7241() || soc_is_ar7242())
|
|
||||||
+ ath79_gpio_count = AR7241_GPIO_COUNT;
|
|
||||||
else if (soc_is_ar913x())
|
|
||||||
ath79_gpio_count = AR913X_GPIO_COUNT;
|
|
||||||
else if (soc_is_ar933x())
|
|
||||||
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
|
||||||
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
|
||||||
@@ -428,7 +428,8 @@
|
|
||||||
#define AR71XX_GPIO_REG_FUNC 0x28
|
|
||||||
|
|
||||||
#define AR71XX_GPIO_COUNT 16
|
|
||||||
-#define AR724X_GPIO_COUNT 18
|
|
||||||
+#define AR7240_GPIO_COUNT 18
|
|
||||||
+#define AR7241_GPIO_COUNT 20
|
|
||||||
#define AR913X_GPIO_COUNT 22
|
|
||||||
#define AR933X_GPIO_COUNT 30
|
|
||||||
#define AR934X_GPIO_COUNT 23
|
|
||||||
@ -1,12 +0,0 @@
|
|||||||
--- a/arch/mips/ath79/dev-wmac.c
|
|
||||||
+++ b/arch/mips/ath79/dev-wmac.c
|
|
||||||
@@ -62,8 +62,8 @@ static void __init ar913x_wmac_setup(voi
|
|
||||||
|
|
||||||
static int ar933x_wmac_reset(void)
|
|
||||||
{
|
|
||||||
- ath79_device_reset_clear(AR933X_RESET_WMAC);
|
|
||||||
ath79_device_reset_set(AR933X_RESET_WMAC);
|
|
||||||
+ ath79_device_reset_clear(AR933X_RESET_WMAC);
|
|
||||||
|
|
||||||
return 0;
|
|
||||||
}
|
|
||||||
@ -1,18 +0,0 @@
|
|||||||
--- a/arch/mips/include/asm/mach-ath79/pci.h
|
|
||||||
+++ b/arch/mips/include/asm/mach-ath79/pci.h
|
|
||||||
@@ -16,13 +16,13 @@
|
|
||||||
#if defined(CONFIG_PCI) && defined(CONFIG_SOC_AR71XX)
|
|
||||||
int ar71xx_pcibios_init(void);
|
|
||||||
#else
|
|
||||||
-static inline int ar71xx_pcibios_init(void) { return 0 };
|
|
||||||
+static inline int ar71xx_pcibios_init(void) { return 0; }
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#if defined(CONFIG_PCI_AR724X)
|
|
||||||
int ar724x_pcibios_init(int irq);
|
|
||||||
#else
|
|
||||||
-static inline int ar724x_pcibios_init(int irq) { return 0 };
|
|
||||||
+static inline int ar724x_pcibios_init(int irq) { return 0; }
|
|
||||||
#endif
|
|
||||||
|
|
||||||
#endif /* __ASM_MACH_ATH79_PCI_H */
|
|
||||||
@ -1,11 +0,0 @@
|
|||||||
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
|
||||||
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
|
|
||||||
@@ -313,7 +313,7 @@
|
|
||||||
#define AR934X_RESET_USB_PHY_ANALOG BIT(11)
|
|
||||||
#define AR934X_RESET_HOST_DMA_INT BIT(10)
|
|
||||||
#define AR934X_RESET_GE0_MAC BIT(9)
|
|
||||||
-#define AR934X_RESET_ETH_SIWTCH BIT(8)
|
|
||||||
+#define AR934X_RESET_ETH_SWITCH BIT(8)
|
|
||||||
#define AR934X_RESET_PCIE_PHY BIT(7)
|
|
||||||
#define AR934X_RESET_PCIE BIT(6)
|
|
||||||
#define AR934X_RESET_USB_HOST BIT(5)
|
|
||||||
@ -1,11 +0,0 @@
|
|||||||
--- a/arch/mips/ath79/dev-usb.c
|
|
||||||
+++ b/arch/mips/ath79/dev-usb.c
|
|
||||||
@@ -126,6 +126,8 @@ static void __init ar7240_usb_setup(void
|
|
||||||
|
|
||||||
ath79_ohci_resources[0].start = AR7240_OHCI_BASE;
|
|
||||||
ath79_ohci_resources[0].end = AR7240_OHCI_BASE + AR7240_OHCI_SIZE - 1;
|
|
||||||
+ ath79_ohci_resources[1].start = ATH79_CPU_IRQ_USB;
|
|
||||||
+ ath79_ohci_resources[1].end = ATH79_CPU_IRQ_USB;
|
|
||||||
platform_device_register(&ath79_ohci_device);
|
|
||||||
}
|
|
||||||
|
|
||||||
@ -1,23 +0,0 @@
|
|||||||
--- a/arch/mips/ath79/dev-usb.c
|
|
||||||
+++ b/arch/mips/ath79/dev-usb.c
|
|
||||||
@@ -190,16 +190,16 @@ static void __init ar934x_usb_setup(void
|
|
||||||
if (bootstrap & AR934X_BOOTSTRAP_USB_MODE_DEVICE)
|
|
||||||
return;
|
|
||||||
|
|
||||||
- ath79_device_reset_clear(AR934X_RESET_USBSUS_OVERRIDE);
|
|
||||||
+ ath79_device_reset_set(AR934X_RESET_USBSUS_OVERRIDE);
|
|
||||||
udelay(1000);
|
|
||||||
|
|
||||||
- ath79_device_reset_set(AR934X_RESET_USB_PHY);
|
|
||||||
+ ath79_device_reset_clear(AR934X_RESET_USB_PHY);
|
|
||||||
udelay(1000);
|
|
||||||
|
|
||||||
- ath79_device_reset_set(AR934X_RESET_USB_PHY_ANALOG);
|
|
||||||
+ ath79_device_reset_clear(AR934X_RESET_USB_PHY_ANALOG);
|
|
||||||
udelay(1000);
|
|
||||||
|
|
||||||
- ath79_device_reset_set(AR934X_RESET_USB_HOST);
|
|
||||||
+ ath79_device_reset_clear(AR934X_RESET_USB_HOST);
|
|
||||||
udelay(1000);
|
|
||||||
|
|
||||||
ath79_ehci_resources[0].start = AR934X_EHCI_BASE;
|
|
||||||
@ -34,7 +34,7 @@
|
|||||||
}
|
}
|
||||||
|
|
||||||
static void ath79_spi_disable(struct ath79_spi *sp)
|
static void ath79_spi_disable(struct ath79_spi *sp)
|
||||||
@@ -222,6 +229,110 @@ static u32 ath79_spi_txrx_mode0(struct s
|
@@ -229,6 +236,110 @@ static u32 ath79_spi_txrx_mode0(struct s
|
||||||
return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
|
return ath79_spi_rr(sp, AR71XX_SPI_REG_RDS);
|
||||||
}
|
}
|
||||||
|
|
||||||
@ -145,7 +145,7 @@
|
|||||||
static __devinit int ath79_spi_probe(struct platform_device *pdev)
|
static __devinit int ath79_spi_probe(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
struct spi_master *master;
|
struct spi_master *master;
|
||||||
@@ -244,6 +355,8 @@ static __devinit int ath79_spi_probe(str
|
@@ -251,6 +362,8 @@ static __devinit int ath79_spi_probe(str
|
||||||
sp = spi_master_get_devdata(master);
|
sp = spi_master_get_devdata(master);
|
||||||
platform_set_drvdata(pdev, sp);
|
platform_set_drvdata(pdev, sp);
|
||||||
|
|
||||||
@ -154,7 +154,7 @@
|
|||||||
master->setup = ath79_spi_setup;
|
master->setup = ath79_spi_setup;
|
||||||
master->cleanup = ath79_spi_cleanup;
|
master->cleanup = ath79_spi_cleanup;
|
||||||
master->bus_num = pdata->bus_num;
|
master->bus_num = pdata->bus_num;
|
||||||
@@ -252,7 +365,7 @@ static __devinit int ath79_spi_probe(str
|
@@ -259,7 +372,7 @@ static __devinit int ath79_spi_probe(str
|
||||||
sp->bitbang.master = spi_master_get(master);
|
sp->bitbang.master = spi_master_get(master);
|
||||||
sp->bitbang.chipselect = ath79_spi_chipselect;
|
sp->bitbang.chipselect = ath79_spi_chipselect;
|
||||||
sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0;
|
sp->bitbang.txrx_word[SPI_MODE_0] = ath79_spi_txrx_mode0;
|
||||||
@ -163,7 +163,7 @@
|
|||||||
sp->bitbang.flags = SPI_CS_HIGH;
|
sp->bitbang.flags = SPI_CS_HIGH;
|
||||||
|
|
||||||
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
||||||
@@ -277,7 +390,8 @@ static __devinit int ath79_spi_probe(str
|
@@ -284,7 +397,8 @@ static __devinit int ath79_spi_probe(str
|
||||||
if (ret)
|
if (ret)
|
||||||
goto err_clk_put;
|
goto err_clk_put;
|
||||||
|
|
||||||
|
|||||||
@ -59,7 +59,7 @@
|
|||||||
|
|
||||||
--- a/arch/mips/ath79/mach-db120.c
|
--- a/arch/mips/ath79/mach-db120.c
|
||||||
+++ b/arch/mips/ath79/mach-db120.c
|
+++ b/arch/mips/ath79/mach-db120.c
|
||||||
@@ -153,7 +153,7 @@ static void __init db120_setup(void)
|
@@ -134,7 +134,7 @@ static void __init db120_setup(void)
|
||||||
ath79_register_spi(&db120_spi_data, db120_spi_info,
|
ath79_register_spi(&db120_spi_data, db120_spi_info,
|
||||||
ARRAY_SIZE(db120_spi_info));
|
ARRAY_SIZE(db120_spi_info));
|
||||||
ath79_register_usb();
|
ath79_register_usb();
|
||||||
|
|||||||
@ -76,7 +76,7 @@
|
|||||||
|
|
||||||
#define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT 0
|
#define AR934X_PLL_CPU_CONFIG_NFRAC_SHIFT 0
|
||||||
#define AR934X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f
|
#define AR934X_PLL_CPU_CONFIG_NFRAC_MASK 0x3f
|
||||||
@@ -285,7 +306,11 @@
|
@@ -285,16 +306,50 @@
|
||||||
#define AR913X_RESET_USB_HOST BIT(5)
|
#define AR913X_RESET_USB_HOST BIT(5)
|
||||||
#define AR913X_RESET_USB_PHY BIT(4)
|
#define AR913X_RESET_USB_PHY BIT(4)
|
||||||
|
|
||||||
@ -88,16 +88,46 @@
|
|||||||
#define AR933X_RESET_USB_HOST BIT(5)
|
#define AR933X_RESET_USB_HOST BIT(5)
|
||||||
#define AR933X_RESET_USB_PHY BIT(4)
|
#define AR933X_RESET_USB_PHY BIT(4)
|
||||||
#define AR933X_RESET_USBSUS_OVERRIDE BIT(3)
|
#define AR933X_RESET_USBSUS_OVERRIDE BIT(3)
|
||||||
@@ -323,6 +348,8 @@
|
|
||||||
#define AR934X_RESET_MBOX BIT(1)
|
+#define AR934X_RESET_HOST BIT(31)
|
||||||
#define AR934X_RESET_I2S BIT(0)
|
+#define AR934X_RESET_SLIC BIT(30)
|
||||||
|
+#define AR934X_RESET_HDMA BIT(29)
|
||||||
|
+#define AR934X_RESET_EXTERNAL BIT(28)
|
||||||
|
+#define AR934X_RESET_RTC BIT(27)
|
||||||
|
+#define AR934X_RESET_PCIE_EP_INT BIT(26)
|
||||||
|
+#define AR934X_RESET_CHKSUM_ACC BIT(25)
|
||||||
|
+#define AR934X_RESET_FULL_CHIP BIT(24)
|
||||||
|
+#define AR934X_RESET_GE1_MDIO BIT(23)
|
||||||
|
+#define AR934X_RESET_GE0_MDIO BIT(22)
|
||||||
|
+#define AR934X_RESET_CPU_NMI BIT(21)
|
||||||
|
+#define AR934X_RESET_CPU_COLD BIT(20)
|
||||||
|
+#define AR934X_RESET_HOST_RESET_INT BIT(19)
|
||||||
|
+#define AR934X_RESET_PCIE_EP BIT(18)
|
||||||
|
+#define AR934X_RESET_UART1 BIT(17)
|
||||||
|
+#define AR934X_RESET_DDR BIT(16)
|
||||||
|
+#define AR934X_RESET_USB_PHY_PLL_PWD_EXT BIT(15)
|
||||||
|
+#define AR934X_RESET_NANDF BIT(14)
|
||||||
|
+#define AR934X_RESET_GE1_MAC BIT(13)
|
||||||
|
+#define AR934X_RESET_ETH_SWITCH_ANALOG BIT(12)
|
||||||
|
#define AR934X_RESET_USB_PHY_ANALOG BIT(11)
|
||||||
|
+#define AR934X_RESET_HOST_DMA_INT BIT(10)
|
||||||
|
+#define AR934X_RESET_GE0_MAC BIT(9)
|
||||||
|
+#define AR934X_RESET_ETH_SWITCH BIT(8)
|
||||||
|
+#define AR934X_RESET_PCIE_PHY BIT(7)
|
||||||
|
+#define AR934X_RESET_PCIE BIT(6)
|
||||||
|
#define AR934X_RESET_USB_HOST BIT(5)
|
||||||
|
#define AR934X_RESET_USB_PHY BIT(4)
|
||||||
|
#define AR934X_RESET_USBSUS_OVERRIDE BIT(3)
|
||||||
|
+#define AR934X_RESET_LUT BIT(2)
|
||||||
|
+#define AR934X_RESET_MBOX BIT(1)
|
||||||
|
+#define AR934X_RESET_I2S BIT(0)
|
||||||
|
|
||||||
+#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18)
|
+#define AR933X_BOOTSTRAP_MDIO_GPIO_EN BIT(18)
|
||||||
+#define AR933X_BOOTSTRAP_EEPBUSY BIT(4)
|
+#define AR933X_BOOTSTRAP_EEPBUSY BIT(4)
|
||||||
#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
|
#define AR933X_BOOTSTRAP_REF_CLK_40 BIT(0)
|
||||||
|
|
||||||
#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23)
|
#define AR934X_BOOTSTRAP_SW_OPTION8 BIT(23)
|
||||||
@@ -427,6 +454,14 @@
|
@@ -399,10 +454,138 @@
|
||||||
#define AR71XX_GPIO_REG_INT_ENABLE 0x24
|
#define AR71XX_GPIO_REG_INT_ENABLE 0x24
|
||||||
#define AR71XX_GPIO_REG_FUNC 0x28
|
#define AR71XX_GPIO_REG_FUNC 0x28
|
||||||
|
|
||||||
@ -110,9 +140,8 @@
|
|||||||
+#define AR934X_GPIO_REG_FUNC 0x6c
|
+#define AR934X_GPIO_REG_FUNC 0x6c
|
||||||
+
|
+
|
||||||
#define AR71XX_GPIO_COUNT 16
|
#define AR71XX_GPIO_COUNT 16
|
||||||
#define AR7240_GPIO_COUNT 18
|
#define AR724X_GPIO_COUNT 18
|
||||||
#define AR7241_GPIO_COUNT 20
|
#define AR913X_GPIO_COUNT 22
|
||||||
@@ -434,4 +469,124 @@
|
|
||||||
#define AR933X_GPIO_COUNT 30
|
#define AR933X_GPIO_COUNT 30
|
||||||
#define AR934X_GPIO_COUNT 23
|
#define AR934X_GPIO_COUNT 23
|
||||||
|
|
||||||
|
|||||||
@ -7,9 +7,9 @@
|
|||||||
- * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org>
|
- * Copyright (c) 2011 Gabor Juhos <juhosg@openwrt.org>
|
||||||
+ * Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
|
+ * Copyright (c) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
|
||||||
*
|
*
|
||||||
* All rights reserved.
|
* Permission to use, copy, modify, and/or distribute this software for any
|
||||||
*
|
* purpose with or without fee is hereby granted, provided that the above
|
||||||
@@ -38,16 +38,25 @@
|
@@ -19,16 +19,25 @@
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <linux/pci.h>
|
#include <linux/pci.h>
|
||||||
@ -37,7 +37,7 @@
|
|||||||
#define DB120_GPIO_LED_WLAN_5G 12
|
#define DB120_GPIO_LED_WLAN_5G 12
|
||||||
#define DB120_GPIO_LED_WLAN_2G 13
|
#define DB120_GPIO_LED_WLAN_2G 13
|
||||||
#define DB120_GPIO_LED_STATUS 14
|
#define DB120_GPIO_LED_STATUS 14
|
||||||
@@ -58,8 +67,10 @@
|
@@ -39,8 +48,10 @@
|
||||||
#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */
|
#define DB120_KEYS_POLL_INTERVAL 20 /* msecs */
|
||||||
#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL)
|
#define DB120_KEYS_DEBOUNCE_INTERVAL (3 * DB120_KEYS_POLL_INTERVAL)
|
||||||
|
|
||||||
@ -50,7 +50,7 @@
|
|||||||
|
|
||||||
static struct gpio_led db120_leds_gpio[] __initdata = {
|
static struct gpio_led db120_leds_gpio[] __initdata = {
|
||||||
{
|
{
|
||||||
@@ -82,6 +93,11 @@ static struct gpio_led db120_leds_gpio[]
|
@@ -63,6 +74,11 @@ static struct gpio_led db120_leds_gpio[]
|
||||||
.gpio = DB120_GPIO_LED_WLAN_2G,
|
.gpio = DB120_GPIO_LED_WLAN_2G,
|
||||||
.active_low = 1,
|
.active_low = 1,
|
||||||
},
|
},
|
||||||
@ -62,7 +62,7 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
static struct gpio_keys_button db120_gpio_keys[] __initdata = {
|
static struct gpio_keys_button db120_gpio_keys[] __initdata = {
|
||||||
@@ -95,66 +111,90 @@ static struct gpio_keys_button db120_gpi
|
@@ -76,66 +92,90 @@ static struct gpio_keys_button db120_gpi
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|||||||
@ -42,8 +42,8 @@
|
|||||||
};
|
};
|
||||||
|
|
||||||
-static struct ath79_spi_controller_data ubnt_xm_spi0_data = {
|
-static struct ath79_spi_controller_data ubnt_xm_spi0_data = {
|
||||||
- .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
|
- .cs_type = ATH79_SPI_CS_TYPE_INTERNAL,
|
||||||
- .cs_line = 0,
|
- .cs_line = 0,
|
||||||
-};
|
-};
|
||||||
-
|
-
|
||||||
-static struct spi_board_info ubnt_xm_spi_info[] = {
|
-static struct spi_board_info ubnt_xm_spi_info[] = {
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user