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git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-25 09:20:16 +02:00
Fix gpio initialisation.
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e20cd0d3eb
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@ -206,11 +206,11 @@ static int jz_gpio_irq_set_type(unsigned int irq, unsigned int flow_type)
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switch(flow_type) {
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switch(flow_type) {
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case IRQ_TYPE_EDGE_RISING:
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case IRQ_TYPE_EDGE_RISING:
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case IRQ_TYPE_EDGE_BOTH:
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writel(IRQ_TO_BIT(irq), IRQ_TO_DIRECTION_SET_REG(irq));
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writel(IRQ_TO_BIT(irq), IRQ_TO_DIRECTION_SET_REG(irq));
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writel(IRQ_TO_BIT(irq), IRQ_TO_TRIGGER_SET_REG(irq));
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writel(IRQ_TO_BIT(irq), IRQ_TO_TRIGGER_SET_REG(irq));
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break;
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break;
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case IRQ_TYPE_EDGE_FALLING:
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case IRQ_TYPE_EDGE_FALLING:
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case IRQ_TYPE_EDGE_BOTH:
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writel(IRQ_TO_BIT(irq), IRQ_TO_DIRECTION_CLEAR_REG(irq));
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writel(IRQ_TO_BIT(irq), IRQ_TO_DIRECTION_CLEAR_REG(irq));
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writel(IRQ_TO_BIT(irq), IRQ_TO_TRIGGER_SET_REG(irq));
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writel(IRQ_TO_BIT(irq), IRQ_TO_TRIGGER_SET_REG(irq));
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break;
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break;
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@ -284,7 +284,6 @@ __init int jz_gpiolib_init(void)
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for (i = 0; i < ARRAY_SIZE(jz_gpio_chips); ++i, ++chip) {
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for (i = 0; i < ARRAY_SIZE(jz_gpio_chips); ++i, ++chip) {
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gpiochip_add(&chip->gpio_chip);
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gpiochip_add(&chip->gpio_chip);
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enable_irq(JZ_IRQ_INTC_GPIO(i));
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set_irq_chained_handler(JZ_IRQ_INTC_GPIO(i), jz_gpio_irq_demux_handler);
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set_irq_chained_handler(JZ_IRQ_INTC_GPIO(i), jz_gpio_irq_demux_handler);
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for (irq = chip->irq_base; irq < chip->irq_base + chip->gpio_chip.ngpio;
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for (irq = chip->irq_base; irq < chip->irq_base + chip->gpio_chip.ngpio;
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++irq)
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++irq)
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@ -295,3 +294,6 @@ __init int jz_gpiolib_init(void)
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return 0;
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return 0;
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}
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}
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arch_initcall(jz_gpiolib_init);
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