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ar71xx: move arch specific files to files-2.6.39

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@29867 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
2012-01-22 22:38:11 +00:00
parent b66dee35c3
commit 22b99f32a1
121 changed files with 0 additions and 0 deletions
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310
target/linux/ar71xx/files/drivers/mtd/maps/ar91xx_flash.c
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@@ -1,310 +0,0 @@
/*
* Parallel flash driver for the Atheros AR91xx SoC
*
* Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/module.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/slab.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/partitions.h>
#include <linux/io.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/ar91xx_flash.h>
#define DRV_NAME "ar91xx-flash"
struct ar91xx_flash_info {
struct mtd_info *mtd;
struct map_info map;
#ifdef CONFIG_MTD_PARTITIONS
int nr_parts;
struct mtd_partition *parts;
#endif
};
static map_word ar91xx_flash_read(struct map_info *map, unsigned long ofs)
{
map_word val;
if (map_bankwidth_is_1(map))
val.x[0] = __raw_readb(map->virt + (ofs ^ 3));
else if (map_bankwidth_is_2(map))
val.x[0] = __raw_readw(map->virt + (ofs ^ 2));
else
val = map_word_ff(map);
return val;
}
static void ar91xx_flash_write(struct map_info *map, map_word d,
unsigned long ofs)
{
if (map_bankwidth_is_1(map))
__raw_writeb(d.x[0], map->virt + (ofs ^ 3));
else if (map_bankwidth_is_2(map))
__raw_writew(d.x[0], map->virt + (ofs ^ 2));
mb();
}
static map_word ar91xx_flash_read_lock(struct map_info *map, unsigned long ofs)
{
map_word ret;
ar71xx_flash_acquire();
ret = ar91xx_flash_read(map, ofs);
ar71xx_flash_release();
return ret;
}
static void ar91xx_flash_write_lock(struct map_info *map, map_word d,
unsigned long ofs)
{
ar71xx_flash_acquire();
ar91xx_flash_write(map, d, ofs);
ar71xx_flash_release();
}
static void ar91xx_flash_copy_from_lock(struct map_info *map, void *to,
unsigned long from, ssize_t len)
{
ar71xx_flash_acquire();
inline_map_copy_from(map, to, from, len);
ar71xx_flash_release();
}
static void ar91xx_flash_copy_to_lock(struct map_info *map, unsigned long to,
const void *from, ssize_t len)
{
ar71xx_flash_acquire();
inline_map_copy_to(map, to, from, len);
ar71xx_flash_release();
}
static int ar91xx_flash_remove(struct platform_device *pdev)
{
struct ar91xx_flash_platform_data *pdata;
struct ar91xx_flash_info *info;
info = platform_get_drvdata(pdev);
if (info == NULL)
return 0;
platform_set_drvdata(pdev, NULL);
if (info->mtd == NULL)
return 0;
pdata = pdev->dev.platform_data;
#ifdef CONFIG_MTD_PARTITIONS
if (info->nr_parts) {
del_mtd_partitions(info->mtd);
kfree(info->parts);
} else if (pdata->nr_parts) {
del_mtd_partitions(info->mtd);
} else {
del_mtd_device(info->mtd);
}
#else
del_mtd_device(info->mtd);
#endif
map_destroy(info->mtd);
return 0;
}
static const char *rom_probe_types[] = { "cfi_probe", "jedec_probe", NULL };
#ifdef CONFIG_MTD_PARTITIONS
static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL };
#endif
static int ar91xx_flash_probe(struct platform_device *pdev)
{
struct ar91xx_flash_platform_data *pdata;
struct ar91xx_flash_info *info;
struct resource *res;
struct resource *region;
const char **probe_type;
int err = 0;
pdata = pdev->dev.platform_data;
if (pdata == NULL)
return -EINVAL;
info = devm_kzalloc(&pdev->dev, sizeof(struct ar91xx_flash_info),
GFP_KERNEL);
if (info == NULL) {
err = -ENOMEM;
goto err_out;
}
platform_set_drvdata(pdev, info);
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (res == NULL) {
err = -ENOENT;
goto err_out;
}
dev_info(&pdev->dev, "%.8llx at %.8llx\n",
(unsigned long long)(res->end - res->start + 1),
(unsigned long long)res->start);
region = devm_request_mem_region(&pdev->dev,
res->start, res->end - res->start + 1,
dev_name(&pdev->dev));
if (region == NULL) {
dev_err(&pdev->dev, "could not reserve memory region\n");
err = -ENOMEM;
goto err_out;
}
info->map.name = dev_name(&pdev->dev);
info->map.phys = res->start;
info->map.size = res->end - res->start + 1;
info->map.bankwidth = pdata->width;
info->map.virt = devm_ioremap(&pdev->dev, info->map.phys,
info->map.size);
if (info->map.virt == NULL) {
dev_err(&pdev->dev, "failed to ioremap flash region\n");
err = -EIO;
goto err_out;
}
simple_map_init(&info->map);
if (pdata->is_shared) {
info->map.read = ar91xx_flash_read_lock;
info->map.write = ar91xx_flash_write_lock;
info->map.copy_from = ar91xx_flash_copy_from_lock;
info->map.copy_to = ar91xx_flash_copy_to_lock;
} else {
info->map.read = ar91xx_flash_read;
info->map.write = ar91xx_flash_write;
}
probe_type = rom_probe_types;
for (; info->mtd == NULL && *probe_type != NULL; probe_type++)
info->mtd = do_map_probe(*probe_type, &info->map);
if (info->mtd == NULL) {
dev_err(&pdev->dev, "map_probe failed\n");
err = -ENXIO;
goto err_out;
}
info->mtd->owner = THIS_MODULE;
#ifdef CONFIG_MTD_PARTITIONS
if (pdata->nr_parts) {
dev_info(&pdev->dev, "using static partition mapping\n");
add_mtd_partitions(info->mtd, pdata->parts, pdata->nr_parts);
return 0;
}
err = parse_mtd_partitions(info->mtd, part_probe_types,
&info->parts, 0);
if (err > 0) {
add_mtd_partitions(info->mtd, info->parts, err);
return 0;
}
#endif
add_mtd_device(info->mtd);
return 0;
err_out:
ar91xx_flash_remove(pdev);
return err;
}
#ifdef CONFIG_PM
static int ar91xx_flash_suspend(struct platform_device *dev, pm_message_t state)
{
struct ar91xx_flash_info *info = platform_get_drvdata(dev);
int ret = 0;
if (info->mtd->suspend)
ret = info->mtd->suspend(info->mtd);
if (ret)
goto fail;
return 0;
fail:
if (info->mtd->suspend) {
BUG_ON(!info->mtd->resume);
info->mtd->resume(info->mtd);
}
return ret;
}
static int ar91xx_flash_resume(struct platform_device *pdev)
{
struct ar91xx_flash_info *info = platform_get_drvdata(pdev);
if (info->mtd->resume)
info->mtd->resume(info->mtd);
return 0;
}
static void ar91xx_flash_shutdown(struct platform_device *pdev)
{
struct ar91xx_flash_info *info = platform_get_drvdata(pdev);
if (info->mtd->suspend && info->mtd->resume)
if (info->mtd->suspend(info->mtd) == 0)
info->mtd->resume(info->mtd);
}
#else
#define ar91xx_flash_suspend NULL
#define ar91xx_flash_resume NULL
#define ar91xx_flash_shutdown NULL
#endif
static struct platform_driver ar91xx_flash_driver = {
.probe = ar91xx_flash_probe,
.remove = ar91xx_flash_remove,
.suspend = ar91xx_flash_suspend,
.resume = ar91xx_flash_resume,
.shutdown = ar91xx_flash_shutdown,
.driver = {
.name = DRV_NAME,
.owner = THIS_MODULE,
},
};
static int __init ar91xx_flash_init(void)
{
return platform_driver_register(&ar91xx_flash_driver);
}
static void __exit ar91xx_flash_exit(void)
{
platform_driver_unregister(&ar91xx_flash_driver);
}
module_init(ar91xx_flash_init);
module_exit(ar91xx_flash_exit);
MODULE_LICENSE("GPL v2");
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
MODULE_DESCRIPTION("Parallel flash driver for the Atheros AR91xx SoC");
MODULE_ALIAS("platform:" DRV_NAME);

33
target/linux/ar71xx/files/drivers/net/ag71xx/Kconfig
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@@ -1,33 +0,0 @@
config AG71XX
tristate "Atheros AR71xx built-in ethernet mac support"
depends on ATHEROS_AR71XX
select PHYLIB
help
If you wish to compile a kernel for AR71xx/91xx and enable
ethernet support, then you should always answer Y to this.
if AG71XX
config AG71XX_DEBUG
bool "Atheros AR71xx built-in ethernet driver debugging"
default n
help
Atheros AR71xx built-in ethernet driver debugging messages.
config AG71XX_DEBUG_FS
bool "Atheros AR71xx built-in ethernet driver debugfs support"
depends on DEBUG_FS
default n
help
Say Y, if you need access to various statistics provided by
the ag71xx driver.
config AG71XX_AR8216_SUPPORT
bool "special support for the Atheros AR8216 switch"
default n
default y if AR71XX_MACH_WNR2000 || AR71XX_MACH_MZK_W04NU
help
Say 'y' here if you want to enable special support for the
Atheros AR8216 switch found on some boards.
endif

15
target/linux/ar71xx/files/drivers/net/ag71xx/Makefile
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@@ -1,15 +0,0 @@
#
# Makefile for the Atheros AR71xx built-in ethernet macs
#
ag71xx-y += ag71xx_main.o
ag71xx-y += ag71xx_ethtool.o
ag71xx-y += ag71xx_phy.o
ag71xx-y += ag71xx_mdio.o
ag71xx-y += ag71xx_ar7240.o
ag71xx-$(CONFIG_AG71XX_DEBUG_FS) += ag71xx_debugfs.o
ag71xx-$(CONFIG_AG71XX_AR8216_SUPPORT) += ag71xx_ar8216.o
obj-$(CONFIG_AG71XX) += ag71xx.o

465
target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h
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@@ -1,465 +0,0 @@
/*
* Atheros AR71xx built-in ethernet mac driver
*
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Based on Atheros' AG7100 driver
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef __AG71XX_H
#define __AG71XX_H
#include <linux/kernel.h>
#include <linux/version.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/random.h>
#include <linux/spinlock.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/ethtool.h>
#include <linux/etherdevice.h>
#include <linux/if_vlan.h>
#include <linux/phy.h>
#include <linux/skbuff.h>
#include <linux/dma-mapping.h>
#include <linux/workqueue.h>
#include <linux/bitops.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/platform.h>
#define AG71XX_DRV_NAME "ag71xx"
#define AG71XX_DRV_VERSION "0.5.35"
#define AG71XX_NAPI_WEIGHT 64
#define AG71XX_OOM_REFILL (1 + HZ/10)
#define AG71XX_INT_ERR (AG71XX_INT_RX_BE | AG71XX_INT_TX_BE)
#define AG71XX_INT_TX (AG71XX_INT_TX_PS)
#define AG71XX_INT_RX (AG71XX_INT_RX_PR | AG71XX_INT_RX_OF)
#define AG71XX_INT_POLL (AG71XX_INT_RX | AG71XX_INT_TX)
#define AG71XX_INT_INIT (AG71XX_INT_ERR | AG71XX_INT_POLL)
#define AG71XX_TX_MTU_LEN 1540
#define AG71XX_RX_PKT_RESERVE 64
#define AG71XX_RX_PKT_SIZE \
(AG71XX_RX_PKT_RESERVE + ETH_FRAME_LEN + ETH_FCS_LEN + VLAN_HLEN)
#define AG71XX_TX_RING_SIZE_DEFAULT 64
#define AG71XX_RX_RING_SIZE_DEFAULT 128
#define AG71XX_TX_RING_SIZE_MAX 256
#define AG71XX_RX_RING_SIZE_MAX 256
#ifdef CONFIG_AG71XX_DEBUG
#define DBG(fmt, args...) printk(KERN_DEBUG fmt, ## args)
#else
#define DBG(fmt, args...) do {} while (0)
#endif
#define ag71xx_assert(_cond) \
do { \
if (_cond) \
break; \
printk("%s,%d: assertion failed\n", __FILE__, __LINE__); \
BUG(); \
} while (0)
struct ag71xx_desc {
u32 data;
u32 ctrl;
#define DESC_EMPTY BIT(31)
#define DESC_MORE BIT(24)
#define DESC_PKTLEN_M 0xfff
u32 next;
u32 pad;
} __attribute__((aligned(4)));
struct ag71xx_buf {
struct sk_buff *skb;
struct ag71xx_desc *desc;
dma_addr_t dma_addr;
unsigned long timestamp;
};
struct ag71xx_ring {
struct ag71xx_buf *buf;
u8 *descs_cpu;
dma_addr_t descs_dma;
unsigned int desc_size;
unsigned int curr;
unsigned int dirty;
unsigned int size;
};
struct ag71xx_mdio {
struct mii_bus *mii_bus;
int mii_irq[PHY_MAX_ADDR];
void __iomem *mdio_base;
struct ag71xx_mdio_platform_data *pdata;
};
struct ag71xx_int_stats {
unsigned long rx_pr;
unsigned long rx_be;
unsigned long rx_of;
unsigned long tx_ps;
unsigned long tx_be;
unsigned long tx_ur;
unsigned long total;
};
struct ag71xx_napi_stats {
unsigned long napi_calls;
unsigned long rx_count;
unsigned long rx_packets;
unsigned long rx_packets_max;
unsigned long tx_count;
unsigned long tx_packets;
unsigned long tx_packets_max;
unsigned long rx[AG71XX_NAPI_WEIGHT + 1];
unsigned long tx[AG71XX_NAPI_WEIGHT + 1];
};
struct ag71xx_debug {
struct dentry *debugfs_dir;
struct ag71xx_int_stats int_stats;
struct ag71xx_napi_stats napi_stats;
};
struct ag71xx {
void __iomem *mac_base;
spinlock_t lock;
struct platform_device *pdev;
struct net_device *dev;
struct napi_struct napi;
u32 msg_enable;
struct ag71xx_desc *stop_desc;
dma_addr_t stop_desc_dma;
struct ag71xx_ring rx_ring;
struct ag71xx_ring tx_ring;
struct mii_bus *mii_bus;
struct phy_device *phy_dev;
void *phy_priv;
unsigned int link;
unsigned int speed;
int duplex;
struct work_struct restart_work;
struct delayed_work link_work;
struct timer_list oom_timer;
#ifdef CONFIG_AG71XX_DEBUG_FS
struct ag71xx_debug debug;
#endif
};
extern struct ethtool_ops ag71xx_ethtool_ops;
void ag71xx_link_adjust(struct ag71xx *ag);
int ag71xx_mdio_driver_init(void) __init;
void ag71xx_mdio_driver_exit(void);
int ag71xx_phy_connect(struct ag71xx *ag);
void ag71xx_phy_disconnect(struct ag71xx *ag);
void ag71xx_phy_start(struct ag71xx *ag);
void ag71xx_phy_stop(struct ag71xx *ag);
static inline struct ag71xx_platform_data *ag71xx_get_pdata(struct ag71xx *ag)
{
return ag->pdev->dev.platform_data;
}
static inline int ag71xx_desc_empty(struct ag71xx_desc *desc)
{
return (desc->ctrl & DESC_EMPTY) != 0;
}
static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
{
return desc->ctrl & DESC_PKTLEN_M;
}
/* Register offsets */
#define AG71XX_REG_MAC_CFG1 0x0000
#define AG71XX_REG_MAC_CFG2 0x0004
#define AG71XX_REG_MAC_IPG 0x0008
#define AG71XX_REG_MAC_HDX 0x000c
#define AG71XX_REG_MAC_MFL 0x0010
#define AG71XX_REG_MII_CFG 0x0020
#define AG71XX_REG_MII_CMD 0x0024
#define AG71XX_REG_MII_ADDR 0x0028
#define AG71XX_REG_MII_CTRL 0x002c
#define AG71XX_REG_MII_STATUS 0x0030
#define AG71XX_REG_MII_IND 0x0034
#define AG71XX_REG_MAC_IFCTL 0x0038
#define AG71XX_REG_MAC_ADDR1 0x0040
#define AG71XX_REG_MAC_ADDR2 0x0044
#define AG71XX_REG_FIFO_CFG0 0x0048
#define AG71XX_REG_FIFO_CFG1 0x004c
#define AG71XX_REG_FIFO_CFG2 0x0050
#define AG71XX_REG_FIFO_CFG3 0x0054
#define AG71XX_REG_FIFO_CFG4 0x0058
#define AG71XX_REG_FIFO_CFG5 0x005c
#define AG71XX_REG_FIFO_RAM0 0x0060
#define AG71XX_REG_FIFO_RAM1 0x0064
#define AG71XX_REG_FIFO_RAM2 0x0068
#define AG71XX_REG_FIFO_RAM3 0x006c
#define AG71XX_REG_FIFO_RAM4 0x0070
#define AG71XX_REG_FIFO_RAM5 0x0074
#define AG71XX_REG_FIFO_RAM6 0x0078
#define AG71XX_REG_FIFO_RAM7 0x007c
#define AG71XX_REG_TX_CTRL 0x0180
#define AG71XX_REG_TX_DESC 0x0184
#define AG71XX_REG_TX_STATUS 0x0188
#define AG71XX_REG_RX_CTRL 0x018c
#define AG71XX_REG_RX_DESC 0x0190
#define AG71XX_REG_RX_STATUS 0x0194
#define AG71XX_REG_INT_ENABLE 0x0198
#define AG71XX_REG_INT_STATUS 0x019c
#define AG71XX_REG_FIFO_DEPTH 0x01a8
#define AG71XX_REG_RX_SM 0x01b0
#define AG71XX_REG_TX_SM 0x01b4
#define MAC_CFG1_TXE BIT(0) /* Tx Enable */
#define MAC_CFG1_STX BIT(1) /* Synchronize Tx Enable */
#define MAC_CFG1_RXE BIT(2) /* Rx Enable */
#define MAC_CFG1_SRX BIT(3) /* Synchronize Rx Enable */
#define MAC_CFG1_TFC BIT(4) /* Tx Flow Control Enable */
#define MAC_CFG1_RFC BIT(5) /* Rx Flow Control Enable */
#define MAC_CFG1_LB BIT(8) /* Loopback mode */
#define MAC_CFG1_SR BIT(31) /* Soft Reset */
#define MAC_CFG2_FDX BIT(0)
#define MAC_CFG2_CRC_EN BIT(1)
#define MAC_CFG2_PAD_CRC_EN BIT(2)
#define MAC_CFG2_LEN_CHECK BIT(4)
#define MAC_CFG2_HUGE_FRAME_EN BIT(5)
#define MAC_CFG2_IF_1000 BIT(9)
#define MAC_CFG2_IF_10_100 BIT(8)
#define FIFO_CFG0_WTM BIT(0) /* Watermark Module */
#define FIFO_CFG0_RXS BIT(1) /* Rx System Module */
#define FIFO_CFG0_RXF BIT(2) /* Rx Fabric Module */
#define FIFO_CFG0_TXS BIT(3) /* Tx System Module */
#define FIFO_CFG0_TXF BIT(4) /* Tx Fabric Module */
#define FIFO_CFG0_ALL (FIFO_CFG0_WTM | FIFO_CFG0_RXS | FIFO_CFG0_RXF \
| FIFO_CFG0_TXS | FIFO_CFG0_TXF)
#define FIFO_CFG0_ENABLE_SHIFT 8
#define FIFO_CFG4_DE BIT(0) /* Drop Event */
#define FIFO_CFG4_DV BIT(1) /* RX_DV Event */
#define FIFO_CFG4_FC BIT(2) /* False Carrier */
#define FIFO_CFG4_CE BIT(3) /* Code Error */
#define FIFO_CFG4_CR BIT(4) /* CRC error */
#define FIFO_CFG4_LM BIT(5) /* Length Mismatch */
#define FIFO_CFG4_LO BIT(6) /* Length out of range */
#define FIFO_CFG4_OK BIT(7) /* Packet is OK */
#define FIFO_CFG4_MC BIT(8) /* Multicast Packet */
#define FIFO_CFG4_BC BIT(9) /* Broadcast Packet */
#define FIFO_CFG4_DR BIT(10) /* Dribble */
#define FIFO_CFG4_LE BIT(11) /* Long Event */
#define FIFO_CFG4_CF BIT(12) /* Control Frame */
#define FIFO_CFG4_PF BIT(13) /* Pause Frame */
#define FIFO_CFG4_UO BIT(14) /* Unsupported Opcode */
#define FIFO_CFG4_VT BIT(15) /* VLAN tag detected */
#define FIFO_CFG4_FT BIT(16) /* Frame Truncated */
#define FIFO_CFG4_UC BIT(17) /* Unicast Packet */
#define FIFO_CFG5_DE BIT(0) /* Drop Event */
#define FIFO_CFG5_DV BIT(1) /* RX_DV Event */
#define FIFO_CFG5_FC BIT(2) /* False Carrier */
#define FIFO_CFG5_CE BIT(3) /* Code Error */
#define FIFO_CFG5_LM BIT(4) /* Length Mismatch */
#define FIFO_CFG5_LO BIT(5) /* Length Out of Range */
#define FIFO_CFG5_OK BIT(6) /* Packet is OK */
#define FIFO_CFG5_MC BIT(7) /* Multicast Packet */
#define FIFO_CFG5_BC BIT(8) /* Broadcast Packet */
#define FIFO_CFG5_DR BIT(9) /* Dribble */
#define FIFO_CFG5_CF BIT(10) /* Control Frame */
#define FIFO_CFG5_PF BIT(11) /* Pause Frame */
#define FIFO_CFG5_UO BIT(12) /* Unsupported Opcode */
#define FIFO_CFG5_VT BIT(13) /* VLAN tag detected */
#define FIFO_CFG5_LE BIT(14) /* Long Event */
#define FIFO_CFG5_FT BIT(15) /* Frame Truncated */
#define FIFO_CFG5_16 BIT(16) /* unknown */
#define FIFO_CFG5_17 BIT(17) /* unknown */
#define FIFO_CFG5_SF BIT(18) /* Short Frame */
#define FIFO_CFG5_BM BIT(19) /* Byte Mode */
#define AG71XX_INT_TX_PS BIT(0)
#define AG71XX_INT_TX_UR BIT(1)
#define AG71XX_INT_TX_BE BIT(3)
#define AG71XX_INT_RX_PR BIT(4)
#define AG71XX_INT_RX_OF BIT(6)
#define AG71XX_INT_RX_BE BIT(7)
#define MAC_IFCTL_SPEED BIT(16)
#define MII_CFG_CLK_DIV_4 0
#define MII_CFG_CLK_DIV_6 2
#define MII_CFG_CLK_DIV_8 3
#define MII_CFG_CLK_DIV_10 4
#define MII_CFG_CLK_DIV_14 5
#define MII_CFG_CLK_DIV_20 6
#define MII_CFG_CLK_DIV_28 7
#define MII_CFG_RESET BIT(31)
#define MII_CMD_WRITE 0x0
#define MII_CMD_READ 0x1
#define MII_ADDR_SHIFT 8
#define MII_IND_BUSY BIT(0)
#define MII_IND_INVALID BIT(2)
#define TX_CTRL_TXE BIT(0) /* Tx Enable */
#define TX_STATUS_PS BIT(0) /* Packet Sent */
#define TX_STATUS_UR BIT(1) /* Tx Underrun */
#define TX_STATUS_BE BIT(3) /* Bus Error */
#define RX_CTRL_RXE BIT(0) /* Rx Enable */
#define RX_STATUS_PR BIT(0) /* Packet Received */
#define RX_STATUS_OF BIT(2) /* Rx Overflow */
#define RX_STATUS_BE BIT(3) /* Bus Error */
static inline void ag71xx_check_reg_offset(struct ag71xx *ag, unsigned reg)
{
switch (reg) {
case AG71XX_REG_MAC_CFG1 ... AG71XX_REG_MAC_MFL:
case AG71XX_REG_MAC_IFCTL ... AG71XX_REG_TX_SM:
case AG71XX_REG_MII_CFG:
break;
default:
BUG();
}
}
static inline void ag71xx_wr(struct ag71xx *ag, unsigned reg, u32 value)
{
ag71xx_check_reg_offset(ag, reg);
__raw_writel(value, ag->mac_base + reg);
/* flush write */
(void) __raw_readl(ag->mac_base + reg);
}
static inline u32 ag71xx_rr(struct ag71xx *ag, unsigned reg)
{
ag71xx_check_reg_offset(ag, reg);
return __raw_readl(ag->mac_base + reg);
}
static inline void ag71xx_sb(struct ag71xx *ag, unsigned reg, u32 mask)
{
void __iomem *r;
ag71xx_check_reg_offset(ag, reg);
r = ag->mac_base + reg;
__raw_writel(__raw_readl(r) | mask, r);
/* flush write */
(void)__raw_readl(r);
}
static inline void ag71xx_cb(struct ag71xx *ag, unsigned reg, u32 mask)
{
void __iomem *r;
ag71xx_check_reg_offset(ag, reg);
r = ag->mac_base + reg;
__raw_writel(__raw_readl(r) & ~mask, r);
/* flush write */
(void) __raw_readl(r);
}
static inline void ag71xx_int_enable(struct ag71xx *ag, u32 ints)
{
ag71xx_sb(ag, AG71XX_REG_INT_ENABLE, ints);
}
static inline void ag71xx_int_disable(struct ag71xx *ag, u32 ints)
{
ag71xx_cb(ag, AG71XX_REG_INT_ENABLE, ints);
}
#ifdef CONFIG_AG71XX_AR8216_SUPPORT
void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb);
int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb,
int pktlen);
static inline int ag71xx_has_ar8216(struct ag71xx *ag)
{
return ag71xx_get_pdata(ag)->has_ar8216;
}
#else
static inline void ag71xx_add_ar8216_header(struct ag71xx *ag,
struct sk_buff *skb)
{
}
static inline int ag71xx_remove_ar8216_header(struct ag71xx *ag,
struct sk_buff *skb,
int pktlen)
{
return 0;
}
static inline int ag71xx_has_ar8216(struct ag71xx *ag)
{
return 0;
}
#endif
#ifdef CONFIG_AG71XX_DEBUG_FS
int ag71xx_debugfs_root_init(void);
void ag71xx_debugfs_root_exit(void);
int ag71xx_debugfs_init(struct ag71xx *ag);
void ag71xx_debugfs_exit(struct ag71xx *ag);
void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status);
void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx);
#else
static inline int ag71xx_debugfs_root_init(void) { return 0; }
static inline void ag71xx_debugfs_root_exit(void) {}
static inline int ag71xx_debugfs_init(struct ag71xx *ag) { return 0; }
static inline void ag71xx_debugfs_exit(struct ag71xx *ag) {}
static inline void ag71xx_debugfs_update_int_stats(struct ag71xx *ag,
u32 status) {}
static inline void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag,
int rx, int tx) {}
#endif /* CONFIG_AG71XX_DEBUG_FS */
void ag71xx_ar7240_start(struct ag71xx *ag);
void ag71xx_ar7240_stop(struct ag71xx *ag);
int ag71xx_ar7240_init(struct ag71xx *ag);
void ag71xx_ar7240_cleanup(struct ag71xx *ag);
int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg);
void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val);
u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr,
unsigned reg_addr);
int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr,
unsigned reg_addr, u16 reg_val);
#endif /* _AG71XX_H */

1194
target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar7240.c
View File

File diff suppressed because it is too large Load Diff

44
target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar8216.c
View File

@@ -1,44 +0,0 @@
/*
* Atheros AR71xx built-in ethernet mac driver
* Special support for the Atheros ar8216 switch chip
*
* Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
*
* Based on Atheros' AG7100 driver
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ag71xx.h"
#define AR8216_PACKET_TYPE_MASK 0xf
#define AR8216_PACKET_TYPE_NORMAL 0
#define AR8216_HEADER_LEN 2
void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb)
{
skb_push(skb, AR8216_HEADER_LEN);
skb->data[0] = 0x10;
skb->data[1] = 0x80;
}
int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb,
int pktlen)
{
u8 type;
type = skb->data[1] & AR8216_PACKET_TYPE_MASK;
switch (type) {
case AR8216_PACKET_TYPE_NORMAL:
break;
default:
return -EINVAL;
}
skb_pull(skb, AR8216_HEADER_LEN);
return 0;
}

280
target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_debugfs.c
View File

@@ -1,280 +0,0 @@
/*
* Atheros AR71xx built-in ethernet mac driver
*
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Based on Atheros' AG7100 driver
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/debugfs.h>
#include "ag71xx.h"
static struct dentry *ag71xx_debugfs_root;
static int ag71xx_debugfs_generic_open(struct inode *inode, struct file *file)
{
file->private_data = inode->i_private;
return 0;
}
void ag71xx_debugfs_update_int_stats(struct ag71xx *ag, u32 status)
{
if (status)
ag->debug.int_stats.total++;
if (status & AG71XX_INT_TX_PS)
ag->debug.int_stats.tx_ps++;
if (status & AG71XX_INT_TX_UR)
ag->debug.int_stats.tx_ur++;
if (status & AG71XX_INT_TX_BE)
ag->debug.int_stats.tx_be++;
if (status & AG71XX_INT_RX_PR)
ag->debug.int_stats.rx_pr++;
if (status & AG71XX_INT_RX_OF)
ag->debug.int_stats.rx_of++;
if (status & AG71XX_INT_RX_BE)
ag->debug.int_stats.rx_be++;
}
static ssize_t read_file_int_stats(struct file *file, char __user *user_buf,
size_t count, loff_t *ppos)
{
#define PR_INT_STAT(_label, _field) \
len += snprintf(buf + len, sizeof(buf) - len, \
"%20s: %10lu\n", _label, ag->debug.int_stats._field);
struct ag71xx *ag = file->private_data;
char buf[256];
unsigned int len = 0;
PR_INT_STAT("TX Packet Sent", tx_ps);
PR_INT_STAT("TX Underrun", tx_ur);
PR_INT_STAT("TX Bus Error", tx_be);
PR_INT_STAT("RX Packet Received", rx_pr);
PR_INT_STAT("RX Overflow", rx_of);
PR_INT_STAT("RX Bus Error", rx_be);
len += snprintf(buf + len, sizeof(buf) - len, "\n");
PR_INT_STAT("Total", total);
return simple_read_from_buffer(user_buf, count, ppos, buf, len);
#undef PR_INT_STAT
}
static const struct file_operations ag71xx_fops_int_stats = {
.open = ag71xx_debugfs_generic_open,
.read = read_file_int_stats,
.owner = THIS_MODULE
};
void ag71xx_debugfs_update_napi_stats(struct ag71xx *ag, int rx, int tx)
{
struct ag71xx_napi_stats *stats = &ag->debug.napi_stats;
if (rx) {
stats->rx_count++;
stats->rx_packets += rx;
if (rx <= AG71XX_NAPI_WEIGHT)
stats->rx[rx]++;
if (rx > stats->rx_packets_max)
stats->rx_packets_max = rx;
}
if (tx) {
stats->tx_count++;
stats->tx_packets += tx;
if (tx <= AG71XX_NAPI_WEIGHT)
stats->tx[tx]++;
if (tx > stats->tx_packets_max)
stats->tx_packets_max = tx;
}
}
static ssize_t read_file_napi_stats(struct file *file, char __user *user_buf,
size_t count, loff_t *ppos)
{
struct ag71xx *ag = file->private_data;
struct ag71xx_napi_stats *stats = &ag->debug.napi_stats;
char *buf;
unsigned int buflen;
unsigned int len = 0;
unsigned long rx_avg = 0;
unsigned long tx_avg = 0;
int ret;
int i;
buflen = 2048;
buf = kmalloc(buflen, GFP_KERNEL);
if (!buf)
return -ENOMEM;
if (stats->rx_count)
rx_avg = stats->rx_packets / stats->rx_count;
if (stats->tx_count)
tx_avg = stats->tx_packets / stats->tx_count;
len += snprintf(buf + len, buflen - len, "%3s %10s %10s\n",
"len", "rx", "tx");
for (i = 1; i <= AG71XX_NAPI_WEIGHT; i++)
len += snprintf(buf + len, buflen - len,
"%3d: %10lu %10lu\n",
i, stats->rx[i], stats->tx[i]);
len += snprintf(buf + len, buflen - len, "\n");
len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n",
"sum", stats->rx_count, stats->tx_count);
len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n",
"avg", rx_avg, tx_avg);
len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n",
"max", stats->rx_packets_max, stats->tx_packets_max);
len += snprintf(buf + len, buflen - len, "%3s: %10lu %10lu\n",
"pkt", stats->rx_packets, stats->tx_packets);
ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
kfree(buf);
return ret;
}
static const struct file_operations ag71xx_fops_napi_stats = {
.open = ag71xx_debugfs_generic_open,
.read = read_file_napi_stats,
.owner = THIS_MODULE
};
#define DESC_PRINT_LEN 64
static ssize_t read_file_ring(struct file *file, char __user *user_buf,
size_t count, loff_t *ppos,
struct ag71xx *ag,
struct ag71xx_ring *ring,
unsigned desc_reg)
{
char *buf;
unsigned int buflen;
unsigned int len = 0;
unsigned long flags;
ssize_t ret;
int curr;
int dirty;
u32 desc_hw;
int i;
buflen = (ring->size * DESC_PRINT_LEN);
buf = kmalloc(buflen, GFP_KERNEL);
if (!buf)
return -ENOMEM;
len += snprintf(buf + len, buflen - len,
"Idx ... %-8s %-8s %-8s %-8s . %-10s\n",
"desc", "next", "data", "ctrl", "timestamp");
spin_lock_irqsave(&ag->lock, flags);
curr = (ring->curr % ring->size);
dirty = (ring->dirty % ring->size);
desc_hw = ag71xx_rr(ag, desc_reg);
for (i = 0; i < ring->size; i++) {
struct ag71xx_buf *ab = &ring->buf[i];
u32 desc_dma = ((u32) ring->descs_dma) + i * ring->desc_size;
len += snprintf(buf + len, buflen - len,
"%3d %c%c%c %08x %08x %08x %08x %c %10lu\n",
i,
(i == curr) ? 'C' : ' ',
(i == dirty) ? 'D' : ' ',
(desc_hw == desc_dma) ? 'H' : ' ',
desc_dma,
ab->desc->next,
ab->desc->data,
ab->desc->ctrl,
(ab->desc->ctrl & DESC_EMPTY) ? 'E' : '*',
ab->timestamp);
}
spin_unlock_irqrestore(&ag->lock, flags);
ret = simple_read_from_buffer(user_buf, count, ppos, buf, len);
kfree(buf);
return ret;
}
static ssize_t read_file_tx_ring(struct file *file, char __user *user_buf,
size_t count, loff_t *ppos)
{
struct ag71xx *ag = file->private_data;
return read_file_ring(file, user_buf, count, ppos, ag, &ag->tx_ring,
AG71XX_REG_TX_DESC);
}
static const struct file_operations ag71xx_fops_tx_ring = {
.open = ag71xx_debugfs_generic_open,
.read = read_file_tx_ring,
.owner = THIS_MODULE
};
static ssize_t read_file_rx_ring(struct file *file, char __user *user_buf,
size_t count, loff_t *ppos)
{
struct ag71xx *ag = file->private_data;
return read_file_ring(file, user_buf, count, ppos, ag, &ag->rx_ring,
AG71XX_REG_RX_DESC);
}
static const struct file_operations ag71xx_fops_rx_ring = {
.open = ag71xx_debugfs_generic_open,
.read = read_file_rx_ring,
.owner = THIS_MODULE
};
void ag71xx_debugfs_exit(struct ag71xx *ag)
{
debugfs_remove_recursive(ag->debug.debugfs_dir);
}
int ag71xx_debugfs_init(struct ag71xx *ag)
{
ag->debug.debugfs_dir = debugfs_create_dir(ag->dev->name,
ag71xx_debugfs_root);
if (!ag->debug.debugfs_dir)
return -ENOMEM;
debugfs_create_file("int_stats", S_IRUGO, ag->debug.debugfs_dir,
ag, &ag71xx_fops_int_stats);
debugfs_create_file("napi_stats", S_IRUGO, ag->debug.debugfs_dir,
ag, &ag71xx_fops_napi_stats);
debugfs_create_file("tx_ring", S_IRUGO, ag->debug.debugfs_dir,
ag, &ag71xx_fops_tx_ring);
debugfs_create_file("rx_ring", S_IRUGO, ag->debug.debugfs_dir,
ag, &ag71xx_fops_rx_ring);
return 0;
}
int ag71xx_debugfs_root_init(void)
{
if (ag71xx_debugfs_root)
return -EBUSY;
ag71xx_debugfs_root = debugfs_create_dir(KBUILD_MODNAME, NULL);
if (!ag71xx_debugfs_root)
return -ENOENT;
return 0;
}
void ag71xx_debugfs_root_exit(void)
{
debugfs_remove(ag71xx_debugfs_root);
ag71xx_debugfs_root = NULL;
}

124
target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ethtool.c
View File

@@ -1,124 +0,0 @@
/*
* Atheros AR71xx built-in ethernet mac driver
*
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Based on Atheros' AG7100 driver
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ag71xx.h"
static int ag71xx_ethtool_get_settings(struct net_device *dev,
struct ethtool_cmd *cmd)
{
struct ag71xx *ag = netdev_priv(dev);
struct phy_device *phydev = ag->phy_dev;
if (!phydev)
return -ENODEV;
return phy_ethtool_gset(phydev, cmd);
}
static int ag71xx_ethtool_set_settings(struct net_device *dev,
struct ethtool_cmd *cmd)
{
struct ag71xx *ag = netdev_priv(dev);
struct phy_device *phydev = ag->phy_dev;
if (!phydev)
return -ENODEV;
return phy_ethtool_sset(phydev, cmd);
}
static void ag71xx_ethtool_get_drvinfo(struct net_device *dev,
struct ethtool_drvinfo *info)
{
struct ag71xx *ag = netdev_priv(dev);
strcpy(info->driver, ag->pdev->dev.driver->name);
strcpy(info->version, AG71XX_DRV_VERSION);
strcpy(info->bus_info, dev_name(&ag->pdev->dev));
}
static u32 ag71xx_ethtool_get_msglevel(struct net_device *dev)
{
struct ag71xx *ag = netdev_priv(dev);
return ag->msg_enable;
}
static void ag71xx_ethtool_set_msglevel(struct net_device *dev, u32 msg_level)
{
struct ag71xx *ag = netdev_priv(dev);
ag->msg_enable = msg_level;
}
static void ag71xx_ethtool_get_ringparam(struct net_device *dev,
struct ethtool_ringparam *er)
{
struct ag71xx *ag = netdev_priv(dev);
er->tx_max_pending = AG71XX_TX_RING_SIZE_MAX;
er->rx_max_pending = AG71XX_RX_RING_SIZE_MAX;
er->rx_mini_max_pending = 0;
er->rx_jumbo_max_pending = 0;
er->tx_pending = ag->tx_ring.size;
er->rx_pending = ag->rx_ring.size;
er->rx_mini_pending = 0;
er->rx_jumbo_pending = 0;
}
static int ag71xx_ethtool_set_ringparam(struct net_device *dev,
struct ethtool_ringparam *er)
{
struct ag71xx *ag = netdev_priv(dev);
unsigned tx_size;
unsigned rx_size;
int err;
if (er->rx_mini_pending != 0||
er->rx_jumbo_pending != 0 ||
er->rx_pending == 0 ||
er->tx_pending == 0)
return -EINVAL;
tx_size = er->tx_pending < AG71XX_TX_RING_SIZE_MAX ?
er->tx_pending : AG71XX_TX_RING_SIZE_MAX;
rx_size = er->rx_pending < AG71XX_RX_RING_SIZE_MAX ?
er->rx_pending : AG71XX_RX_RING_SIZE_MAX;
if (netif_running(dev)) {
err = dev->netdev_ops->ndo_stop(dev);
if (err)
return err;
}
ag->tx_ring.size = tx_size;
ag->rx_ring.size = rx_size;
if (netif_running(dev))
err = dev->netdev_ops->ndo_open(dev);
return err;
}
struct ethtool_ops ag71xx_ethtool_ops = {
.set_settings = ag71xx_ethtool_set_settings,
.get_settings = ag71xx_ethtool_get_settings,
.get_drvinfo = ag71xx_ethtool_get_drvinfo,
.get_msglevel = ag71xx_ethtool_get_msglevel,
.set_msglevel = ag71xx_ethtool_set_msglevel,
.get_ringparam = ag71xx_ethtool_get_ringparam,
.set_ringparam = ag71xx_ethtool_set_ringparam,
.get_link = ethtool_op_get_link,
};

1265
target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c
View File

File diff suppressed because it is too large Load Diff

248
target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_mdio.c
View File

@@ -1,248 +0,0 @@
/*
* Atheros AR71xx built-in ethernet mac driver
*
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Based on Atheros' AG7100 driver
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ag71xx.h"
#define AG71XX_MDIO_RETRY 1000
#define AG71XX_MDIO_DELAY 5
static inline void ag71xx_mdio_wr(struct ag71xx_mdio *am, unsigned reg,
u32 value)
{
void __iomem *r;
r = am->mdio_base + reg;
__raw_writel(value, r);
/* flush write */
(void) __raw_readl(r);
}
static inline u32 ag71xx_mdio_rr(struct ag71xx_mdio *am, unsigned reg)
{
return __raw_readl(am->mdio_base + reg);
}
static void ag71xx_mdio_dump_regs(struct ag71xx_mdio *am)
{
DBG("%s: mii_cfg=%08x, mii_cmd=%08x, mii_addr=%08x\n",
am->mii_bus->name,
ag71xx_mdio_rr(am, AG71XX_REG_MII_CFG),
ag71xx_mdio_rr(am, AG71XX_REG_MII_CMD),
ag71xx_mdio_rr(am, AG71XX_REG_MII_ADDR));
DBG("%s: mii_ctrl=%08x, mii_status=%08x, mii_ind=%08x\n",
am->mii_bus->name,
ag71xx_mdio_rr(am, AG71XX_REG_MII_CTRL),
ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS),
ag71xx_mdio_rr(am, AG71XX_REG_MII_IND));
}
int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg)
{
int ret;
int i;
ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE);
ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR,
((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff));
ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_READ);
i = AG71XX_MDIO_RETRY;
while (ag71xx_mdio_rr(am, AG71XX_REG_MII_IND) & MII_IND_BUSY) {
if (i-- == 0) {
printk(KERN_ERR "%s: mii_read timed out\n",
am->mii_bus->name);
ret = 0xffff;
goto out;
}
udelay(AG71XX_MDIO_DELAY);
}
ret = ag71xx_mdio_rr(am, AG71XX_REG_MII_STATUS) & 0xffff;
ag71xx_mdio_wr(am, AG71XX_REG_MII_CMD, MII_CMD_WRITE);
DBG("mii_read: addr=%04x, reg=%04x, value=%04x\n", addr, reg, ret);
out:
return ret;
}
void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val)
{
int i;
DBG("mii_write: addr=%04x, reg=%04x, value=%04x\n", addr, reg, val);
ag71xx_mdio_wr(am, AG71XX_REG_MII_ADDR,
((addr & 0xff) << MII_ADDR_SHIFT) | (reg & 0xff));
ag71xx_mdio_wr(am, AG71XX_REG_MII_CTRL, val);
i = AG71XX_MDIO_RETRY;
while (ag71xx_mdio_rr(am, AG71XX_REG_MII_IND) & MII_IND_BUSY) {
if (i-- == 0) {
printk(KERN_ERR "%s: mii_write timed out\n",
am->mii_bus->name);
break;
}
udelay(AG71XX_MDIO_DELAY);
}
}
static int ag71xx_mdio_reset(struct mii_bus *bus)
{
struct ag71xx_mdio *am = bus->priv;
u32 t;
if (am->pdata->is_ar7240)
t = MII_CFG_CLK_DIV_6;
else
t = MII_CFG_CLK_DIV_28;
ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t | MII_CFG_RESET);
udelay(100);
ag71xx_mdio_wr(am, AG71XX_REG_MII_CFG, t);
udelay(100);
return 0;
}
static int ag71xx_mdio_read(struct mii_bus *bus, int addr, int reg)
{
struct ag71xx_mdio *am = bus->priv;
if (am->pdata->is_ar7240)
return ar7240sw_phy_read(bus, addr, reg);
else
return ag71xx_mdio_mii_read(am, addr, reg);
}
static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val)
{
struct ag71xx_mdio *am = bus->priv;
if (am->pdata->is_ar7240)
ar7240sw_phy_write(bus, addr, reg, val);
else
ag71xx_mdio_mii_write(am, addr, reg, val);
return 0;
}
static int __devinit ag71xx_mdio_probe(struct platform_device *pdev)
{
struct ag71xx_mdio_platform_data *pdata;
struct ag71xx_mdio *am;
struct resource *res;
int i;
int err;
pdata = pdev->dev.platform_data;
if (!pdata) {
dev_err(&pdev->dev, "no platform data specified\n");
return -EINVAL;
}
am = kzalloc(sizeof(*am), GFP_KERNEL);
if (!am) {
err = -ENOMEM;
goto err_out;
}
am->pdata = pdata;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_err(&pdev->dev, "no iomem resource found\n");
err = -ENXIO;
goto err_out;
}
am->mdio_base = ioremap_nocache(res->start, res->end - res->start + 1);
if (!am->mdio_base) {
dev_err(&pdev->dev, "unable to ioremap registers\n");
err = -ENOMEM;
goto err_free_mdio;
}
am->mii_bus = mdiobus_alloc();
if (am->mii_bus == NULL) {
err = -ENOMEM;
goto err_iounmap;
}
am->mii_bus->name = "ag71xx_mdio";
am->mii_bus->read = ag71xx_mdio_read;
am->mii_bus->write = ag71xx_mdio_write;
am->mii_bus->reset = ag71xx_mdio_reset;
am->mii_bus->irq = am->mii_irq;
am->mii_bus->priv = am;
am->mii_bus->parent = &pdev->dev;
snprintf(am->mii_bus->id, MII_BUS_ID_SIZE, "%s", dev_name(&pdev->dev));
am->mii_bus->phy_mask = pdata->phy_mask;
for (i = 0; i < PHY_MAX_ADDR; i++)
am->mii_irq[i] = PHY_POLL;
ag71xx_mdio_wr(am, AG71XX_REG_MAC_CFG1, 0);
err = mdiobus_register(am->mii_bus);
if (err)
goto err_free_bus;
ag71xx_mdio_dump_regs(am);
platform_set_drvdata(pdev, am);
return 0;
err_free_bus:
mdiobus_free(am->mii_bus);
err_iounmap:
iounmap(am->mdio_base);
err_free_mdio:
kfree(am);
err_out:
return err;
}
static int __devexit ag71xx_mdio_remove(struct platform_device *pdev)
{
struct ag71xx_mdio *am = platform_get_drvdata(pdev);
if (am) {
mdiobus_unregister(am->mii_bus);
mdiobus_free(am->mii_bus);
iounmap(am->mdio_base);
kfree(am);
platform_set_drvdata(pdev, NULL);
}
return 0;
}
static struct platform_driver ag71xx_mdio_driver = {
.probe = ag71xx_mdio_probe,
.remove = __exit_p(ag71xx_mdio_remove),
.driver = {
.name = "ag71xx-mdio",
}
};
int __init ag71xx_mdio_driver_init(void)
{
return platform_driver_register(&ag71xx_mdio_driver);
}
void ag71xx_mdio_driver_exit(void)
{
platform_driver_unregister(&ag71xx_mdio_driver);
}

236
target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_phy.c
View File

@@ -1,236 +0,0 @@
/*
* Atheros AR71xx built-in ethernet mac driver
*
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Based on Atheros' AG7100 driver
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include "ag71xx.h"
static void ag71xx_phy_link_adjust(struct net_device *dev)
{
struct ag71xx *ag = netdev_priv(dev);
struct phy_device *phydev = ag->phy_dev;
unsigned long flags;
int status_change = 0;
spin_lock_irqsave(&ag->lock, flags);
if (phydev->link) {
if (ag->duplex != phydev->duplex
|| ag->speed != phydev->speed) {
status_change = 1;
}
}
if (phydev->link != ag->link)
status_change = 1;
ag->link = phydev->link;
ag->duplex = phydev->duplex;
ag->speed = phydev->speed;
if (status_change)
ag71xx_link_adjust(ag);
spin_unlock_irqrestore(&ag->lock, flags);
}
void ag71xx_phy_start(struct ag71xx *ag)
{
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
if (ag->phy_dev) {
phy_start(ag->phy_dev);
} else if (pdata->switch_data) {
ag71xx_ar7240_start(ag);
} else {
ag->link = 1;
ag71xx_link_adjust(ag);
}
}
void ag71xx_phy_stop(struct ag71xx *ag)
{
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
unsigned long flags;
if (ag->phy_dev)
phy_stop(ag->phy_dev);
else if (pdata->switch_data)
ag71xx_ar7240_stop(ag);
spin_lock_irqsave(&ag->lock, flags);
if (ag->link) {
ag->link = 0;
ag71xx_link_adjust(ag);
}
spin_unlock_irqrestore(&ag->lock, flags);
}
static int ag71xx_phy_connect_fixed(struct ag71xx *ag)
{
struct net_device *dev = ag->dev;
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
int ret = 0;
/* use fixed settings */
switch (pdata->speed) {
case SPEED_10:
case SPEED_100:
case SPEED_1000:
break;
default:
printk(KERN_ERR "%s: invalid speed specified\n", dev->name);
ret = -EINVAL;
break;
}
printk(KERN_DEBUG "%s: using fixed link parameters\n", dev->name);
ag->duplex = pdata->duplex;
ag->speed = pdata->speed;
return ret;
}
static int ag71xx_phy_connect_multi(struct ag71xx *ag)
{
struct net_device *dev = ag->dev;
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
struct phy_device *phydev = NULL;
int phy_addr;
int ret = 0;
for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) {
if (!(pdata->phy_mask & (1 << phy_addr)))
continue;
if (ag->mii_bus->phy_map[phy_addr] == NULL)
continue;
DBG("%s: PHY found at %s, uid=%08x\n",
dev->name,
dev_name(&ag->mii_bus->phy_map[phy_addr]->dev),
ag->mii_bus->phy_map[phy_addr]->phy_id);
if (phydev == NULL)
phydev = ag->mii_bus->phy_map[phy_addr];
}
if (!phydev) {
printk(KERN_ERR "%s: no PHY found with phy_mask=%08x\n",
dev->name, pdata->phy_mask);
return -ENODEV;
}
ag->phy_dev = phy_connect(dev, dev_name(&phydev->dev),
&ag71xx_phy_link_adjust, 0,
pdata->phy_if_mode);
if (IS_ERR(ag->phy_dev)) {
printk(KERN_ERR "%s: could not connect to PHY at %s\n",
dev->name, dev_name(&phydev->dev));
return PTR_ERR(ag->phy_dev);
}
/* mask with MAC supported features */
if (pdata->has_gbit)
phydev->supported &= PHY_GBIT_FEATURES;
else
phydev->supported &= PHY_BASIC_FEATURES;
phydev->advertising = phydev->supported;
printk(KERN_DEBUG "%s: connected to PHY at %s [uid=%08x, driver=%s]\n",
dev->name, dev_name(&phydev->dev),
phydev->phy_id, phydev->drv->name);
ag->link = 0;
ag->speed = 0;
ag->duplex = -1;
return ret;
}
static int dev_is_class(struct device *dev, void *class)
{
if (dev->class != NULL && !strcmp(dev->class->name, class))
return 1;
return 0;
}
static struct device *dev_find_class(struct device *parent, char *class)
{
if (dev_is_class(parent, class)) {
get_device(parent);
return parent;
}
return device_find_child(parent, class, dev_is_class);
}
static struct mii_bus *dev_to_mii_bus(struct device *dev)
{
struct device *d;
d = dev_find_class(dev, "mdio_bus");
if (d != NULL) {
struct mii_bus *bus;
bus = to_mii_bus(d);
put_device(d);
return bus;
}
return NULL;
}
int __devinit ag71xx_phy_connect(struct ag71xx *ag)
{
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
if (pdata->mii_bus_dev == NULL ||
pdata->mii_bus_dev->bus == NULL )
return ag71xx_phy_connect_fixed(ag);
ag->mii_bus = dev_to_mii_bus(pdata->mii_bus_dev);
if (ag->mii_bus == NULL) {
printk(KERN_ERR "%s: unable to find MII bus on device '%s'\n",
ag->dev->name, dev_name(pdata->mii_bus_dev));
return -ENODEV;
}
/* Reset the mdio bus explicitly */
if (ag->mii_bus->reset) {
mutex_lock(&ag->mii_bus->mdio_lock);
ag->mii_bus->reset(ag->mii_bus);
mutex_unlock(&ag->mii_bus->mdio_lock);
}
if (pdata->switch_data)
return ag71xx_ar7240_init(ag);
if (pdata->phy_mask)
return ag71xx_phy_connect_multi(ag);
return ag71xx_phy_connect_fixed(ag);
}
void ag71xx_phy_disconnect(struct ag71xx *ag)
{
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
if (pdata->switch_data)
ag71xx_ar7240_cleanup(ag);
else if (ag->phy_dev)
phy_disconnect(ag->phy_dev);
}

283
target/linux/ar71xx/files/drivers/spi/ar71xx_spi.c
View File

@@ -1,283 +0,0 @@
/*
* Atheros AR71xx SPI Controller driver
*
* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>
#include <linux/bitops.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/platform.h>
#define DRV_DESC "Atheros AR71xx SPI Controller driver"
#define DRV_VERSION "0.2.4"
#define DRV_NAME "ar71xx-spi"
#undef PER_BIT_READ
struct ar71xx_spi {
struct spi_bitbang bitbang;
u32 ioc_base;
u32 reg_ctrl;
void __iomem *base;
struct platform_device *pdev;
u32 (*get_ioc_base)(u8 chip_select, int cs_high,
int is_on);
};
static inline u32 ar71xx_spi_rr(struct ar71xx_spi *sp, unsigned reg)
{
return __raw_readl(sp->base + reg);
}
static inline void ar71xx_spi_wr(struct ar71xx_spi *sp, unsigned reg, u32 val)
{
__raw_writel(val, sp->base + reg);
}
static inline struct ar71xx_spi *spidev_to_sp(struct spi_device *spi)
{
return spi_master_get_devdata(spi->master);
}
static u32 ar71xx_spi_get_ioc_base(u8 chip_select, int cs_high, int is_on)
{
u32 ret;
if (is_on == AR71XX_SPI_CS_INACTIVE)
ret = SPI_IOC_CS_ALL;
else
ret = SPI_IOC_CS_ALL & ~SPI_IOC_CS(chip_select);
return ret;
}
static void ar71xx_spi_chipselect(struct spi_device *spi, int value)
{
struct ar71xx_spi *sp = spidev_to_sp(spi);
void __iomem *base = sp->base;
u32 ioc_base;
switch (value) {
case BITBANG_CS_INACTIVE:
ioc_base = sp->get_ioc_base(spi->chip_select,
(spi->mode & SPI_CS_HIGH) != 0,
AR71XX_SPI_CS_INACTIVE);
__raw_writel(ioc_base, base + SPI_REG_IOC);
break;
case BITBANG_CS_ACTIVE:
ioc_base = sp->get_ioc_base(spi->chip_select,
(spi->mode & SPI_CS_HIGH) != 0,
AR71XX_SPI_CS_ACTIVE);
__raw_writel(ioc_base, base + SPI_REG_IOC);
sp->ioc_base = ioc_base;
break;
}
}
static void ar71xx_spi_setup_regs(struct ar71xx_spi *sp)
{
/* enable GPIO mode */
ar71xx_spi_wr(sp, SPI_REG_FS, SPI_FS_GPIO);
/* save CTRL register */
sp->reg_ctrl = ar71xx_spi_rr(sp, SPI_REG_CTRL);
/* TODO: setup speed? */
ar71xx_spi_wr(sp, SPI_REG_CTRL, 0x43);
}
static void ar71xx_spi_restore_regs(struct ar71xx_spi *sp)
{
/* restore CTRL register */
ar71xx_spi_wr(sp, SPI_REG_CTRL, sp->reg_ctrl);
/* disable GPIO mode */
ar71xx_spi_wr(sp, SPI_REG_FS, 0);
}
static int ar71xx_spi_setup(struct spi_device *spi)
{
if (spi->bits_per_word > 32)
return -EINVAL;
return spi_bitbang_setup(spi);
}
static void ar71xx_spi_cleanup(struct spi_device *spi)
{
spi_bitbang_cleanup(spi);
}
static u32 ar71xx_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs,
u32 word, u8 bits)
{
struct ar71xx_spi *sp = spidev_to_sp(spi);
void __iomem *base = sp->base;
u32 ioc = sp->ioc_base;
u32 ret;
/* clock starts at inactive polarity */
for (word <<= (32 - bits); likely(bits); bits--) {
u32 out;
if (word & (1 << 31))
out = ioc | SPI_IOC_DO;
else
out = ioc & ~SPI_IOC_DO;
/* setup MSB (to slave) on trailing edge */
__raw_writel(out, base + SPI_REG_IOC);
__raw_writel(out | SPI_IOC_CLK, base + SPI_REG_IOC);
word <<= 1;
#ifdef PER_BIT_READ
/* sample MSB (from slave) on leading edge */
ret = __raw_readl(base + SPI_REG_RDS);
__raw_writel(out, base + SPI_REG_IOC);
#endif
}
#ifndef PER_BIT_READ
ret = __raw_readl(base + SPI_REG_RDS);
#endif
return ret;
}
static int ar71xx_spi_probe(struct platform_device *pdev)
{
struct spi_master *master;
struct ar71xx_spi *sp;
struct ar71xx_spi_platform_data *pdata;
struct resource *r;
int ret;
master = spi_alloc_master(&pdev->dev, sizeof(*sp));
if (master == NULL) {
dev_err(&pdev->dev, "failed to allocate spi master\n");
return -ENOMEM;
}
sp = spi_master_get_devdata(master);
platform_set_drvdata(pdev, sp);
pdata = pdev->dev.platform_data;
master->setup = ar71xx_spi_setup;
master->cleanup = ar71xx_spi_cleanup;
sp->bitbang.master = spi_master_get(master);
sp->bitbang.chipselect = ar71xx_spi_chipselect;
sp->bitbang.txrx_word[SPI_MODE_0] = ar71xx_spi_txrx_mode0;
sp->bitbang.setup_transfer = spi_bitbang_setup_transfer;
sp->get_ioc_base = ar71xx_spi_get_ioc_base;
if (pdata) {
sp->bitbang.master->bus_num = pdata->bus_num;
sp->bitbang.master->num_chipselect = pdata->num_chipselect;
if (pdata->get_ioc_base)
sp->get_ioc_base = pdata->get_ioc_base;
} else {
sp->bitbang.master->bus_num = 0;
sp->bitbang.master->num_chipselect = 3;
}
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (r == NULL) {
ret = -ENOENT;
goto err1;
}
sp->base = ioremap_nocache(r->start, r->end - r->start + 1);
if (!sp->base) {
ret = -ENXIO;
goto err1;
}
ar71xx_spi_setup_regs(sp);
ret = spi_bitbang_start(&sp->bitbang);
if (!ret)
return 0;
ar71xx_spi_restore_regs(sp);
iounmap(sp->base);
err1:
platform_set_drvdata(pdev, NULL);
spi_master_put(sp->bitbang.master);
return ret;
}
static int ar71xx_spi_remove(struct platform_device *pdev)
{
struct ar71xx_spi *sp = platform_get_drvdata(pdev);
spi_bitbang_stop(&sp->bitbang);
ar71xx_spi_restore_regs(sp);
iounmap(sp->base);
platform_set_drvdata(pdev, NULL);
spi_master_put(sp->bitbang.master);
return 0;
}
static void ar71xx_spi_shutdown(struct platform_device *pdev)
{
int ret;
ret = ar71xx_spi_remove(pdev);
if (ret)
dev_err(&pdev->dev, "shutdown failed with %d\n", ret);
}
static struct platform_driver ar71xx_spi_drv = {
.probe = ar71xx_spi_probe,
.remove = ar71xx_spi_remove,
.shutdown = ar71xx_spi_shutdown,
.driver = {
.name = DRV_NAME,
.owner = THIS_MODULE,
},
};
static int __init ar71xx_spi_init(void)
{
printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
return platform_driver_register(&ar71xx_spi_drv);
}
module_init(ar71xx_spi_init);
static void __exit ar71xx_spi_exit(void)
{
platform_driver_unregister(&ar71xx_spi_drv);
}
module_exit(ar71xx_spi_exit);
MODULE_ALIAS("platform:" DRV_NAME);
MODULE_DESCRIPTION(DRV_DESC);
MODULE_VERSION(DRV_VERSION);
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org>");
MODULE_LICENSE("GPL v2");

316
target/linux/ar71xx/files/drivers/spi/pb44_spi.c
View File

@@ -1,316 +0,0 @@
/*
* Atheros PB44 board SPI controller driver
*
* Copyright (C) 2009 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/spinlock.h>
#include <linux/workqueue.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi_bitbang.h>
#include <linux/bitops.h>
#include <linux/gpio.h>
#include <asm/mach-ar71xx/ar71xx.h>
#include <asm/mach-ar71xx/platform.h>
#define DRV_DESC "Atheros PB44 SPI Controller driver"
#define DRV_VERSION "0.1.0"
#define DRV_NAME "pb44-spi"
#undef PER_BIT_READ
struct ar71xx_spi {
struct spi_bitbang bitbang;
u32 ioc_base;
u32 reg_ctrl;
void __iomem *base;
struct platform_device *pdev;
};
static inline u32 pb44_spi_rr(struct ar71xx_spi *sp, unsigned reg)
{
return __raw_readl(sp->base + reg);
}
static inline void pb44_spi_wr(struct ar71xx_spi *sp, unsigned reg, u32 val)
{
__raw_writel(val, sp->base + reg);
}
static inline struct ar71xx_spi *spidev_to_sp(struct spi_device *spi)
{
return spi_master_get_devdata(spi->master);
}
static void pb44_spi_chipselect(struct spi_device *spi, int is_active)
{
struct ar71xx_spi *sp = spidev_to_sp(spi);
int cs_high = (spi->mode & SPI_CS_HIGH) ? is_active : !is_active;
if (is_active) {
/* set initial clock polarity */
if (spi->mode & SPI_CPOL)
sp->ioc_base |= SPI_IOC_CLK;
else
sp->ioc_base &= ~SPI_IOC_CLK;
pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
}
if (spi->chip_select) {
unsigned long gpio = (unsigned long) spi->controller_data;
/* SPI is normally active-low */
gpio_set_value(gpio, cs_high);
} else {
if (cs_high)
sp->ioc_base |= SPI_IOC_CS0;
else
sp->ioc_base &= ~SPI_IOC_CS0;
pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
}
}
static void pb44_spi_enable(struct ar71xx_spi *sp)
{
/* enable GPIO mode */
pb44_spi_wr(sp, SPI_REG_FS, SPI_FS_GPIO);
/* save CTRL register */
sp->reg_ctrl = pb44_spi_rr(sp, SPI_REG_CTRL);
sp->ioc_base = pb44_spi_rr(sp, SPI_REG_IOC);
pb44_spi_wr(sp, SPI_REG_CTRL, 0x43);
}
static void pb44_spi_disable(struct ar71xx_spi *sp)
{
/* restore CTRL register */
pb44_spi_wr(sp, SPI_REG_CTRL, sp->reg_ctrl);
/* disable GPIO mode */
pb44_spi_wr(sp, SPI_REG_FS, 0);
}
static int pb44_spi_setup_cs(struct spi_device *spi)
{
struct ar71xx_spi *sp = spidev_to_sp(spi);
if (spi->chip_select) {
unsigned long gpio = (unsigned long) spi->controller_data;
int status = 0;
status = gpio_request(gpio, dev_name(&spi->dev));
if (status)
return status;
status = gpio_direction_output(gpio, spi->mode & SPI_CS_HIGH);
if (status) {
gpio_free(gpio);
return status;
}
} else {
if (spi->mode & SPI_CS_HIGH)
sp->ioc_base |= SPI_IOC_CS0;
else
sp->ioc_base &= ~SPI_IOC_CS0;
pb44_spi_wr(sp, SPI_REG_IOC, sp->ioc_base);
}
return 0;
}
static void pb44_spi_cleanup_cs(struct spi_device *spi)
{
if (spi->chip_select) {
unsigned long gpio = (unsigned long) spi->controller_data;
gpio_free(gpio);
}
}
static int pb44_spi_setup(struct spi_device *spi)
{
int status = 0;
if (spi->bits_per_word > 32)
return -EINVAL;
if (!spi->controller_state) {
status = pb44_spi_setup_cs(spi);
if (status)
return status;
}
status = spi_bitbang_setup(spi);
if (status && !spi->controller_state)
pb44_spi_cleanup_cs(spi);
return status;
}
static void pb44_spi_cleanup(struct spi_device *spi)
{
pb44_spi_cleanup_cs(spi);
spi_bitbang_cleanup(spi);
}
static u32 pb44_spi_txrx_mode0(struct spi_device *spi, unsigned nsecs,
u32 word, u8 bits)
{
struct ar71xx_spi *sp = spidev_to_sp(spi);
u32 ioc = sp->ioc_base;
u32 ret;
/* clock starts at inactive polarity */
for (word <<= (32 - bits); likely(bits); bits--) {
u32 out;
if (word & (1 << 31))
out = ioc | SPI_IOC_DO;
else
out = ioc & ~SPI_IOC_DO;
/* setup MSB (to slave) on trailing edge */
pb44_spi_wr(sp, SPI_REG_IOC, out);
pb44_spi_wr(sp, SPI_REG_IOC, out | SPI_IOC_CLK);
word <<= 1;
#ifdef PER_BIT_READ
/* sample MSB (from slave) on leading edge */
ret = pb44_spi_rr(sp, SPI_REG_RDS);
pb44_spi_wr(sp, SPI_REG_IOC, out);
#endif
}
#ifndef PER_BIT_READ
ret = pb44_spi_rr(sp, SPI_REG_RDS);
#endif
return ret;
}
static int pb44_spi_probe(struct platform_device *pdev)
{
struct spi_master *master;
struct ar71xx_spi *sp;
struct ar71xx_spi_platform_data *pdata;
struct resource *r;
int ret;
master = spi_alloc_master(&pdev->dev, sizeof(*sp));
if (master == NULL) {
dev_err(&pdev->dev, "failed to allocate spi master\n");
return -ENOMEM;
}
sp = spi_master_get_devdata(master);
platform_set_drvdata(pdev, sp);
pdata = pdev->dev.platform_data;
master->setup = pb44_spi_setup;
master->cleanup = pb44_spi_cleanup;
if (pdata) {
master->bus_num = pdata->bus_num;
master->num_chipselect = pdata->num_chipselect;
} else {
master->bus_num = 0;
master->num_chipselect = 1;
}
sp->bitbang.master = spi_master_get(master);
sp->bitbang.chipselect = pb44_spi_chipselect;
sp->bitbang.txrx_word[SPI_MODE_0] = pb44_spi_txrx_mode0;
sp->bitbang.setup_transfer = spi_bitbang_setup_transfer;
sp->bitbang.flags = SPI_CS_HIGH;
r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (r == NULL) {
ret = -ENOENT;
goto err1;
}
sp->base = ioremap_nocache(r->start, r->end - r->start + 1);
if (!sp->base) {
ret = -ENXIO;
goto err1;
}
pb44_spi_enable(sp);
ret = spi_bitbang_start(&sp->bitbang);
if (!ret)
return 0;
pb44_spi_disable(sp);
iounmap(sp->base);
err1:
platform_set_drvdata(pdev, NULL);
spi_master_put(sp->bitbang.master);
return ret;
}
static int pb44_spi_remove(struct platform_device *pdev)
{
struct ar71xx_spi *sp = platform_get_drvdata(pdev);
spi_bitbang_stop(&sp->bitbang);
pb44_spi_disable(sp);
iounmap(sp->base);
platform_set_drvdata(pdev, NULL);
spi_master_put(sp->bitbang.master);
return 0;
}
static void pb44_spi_shutdown(struct platform_device *pdev)
{
int ret;
ret = pb44_spi_remove(pdev);
if (ret)
dev_err(&pdev->dev, "shutdown failed with %d\n", ret);
}
static struct platform_driver pb44_spi_drv = {
.probe = pb44_spi_probe,
.remove = pb44_spi_remove,
.shutdown = pb44_spi_shutdown,
.driver = {
.name = DRV_NAME,
.owner = THIS_MODULE,
},
};
static int __init pb44_spi_init(void)
{
return platform_driver_register(&pb44_spi_drv);
}
module_init(pb44_spi_init);
static void __exit pb44_spi_exit(void)
{
platform_driver_unregister(&pb44_spi_drv);
}
module_exit(pb44_spi_exit);
MODULE_ALIAS("platform:" DRV_NAME);
MODULE_DESCRIPTION(DRV_DESC);
MODULE_VERSION(DRV_VERSION);
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
MODULE_LICENSE("GPL v2");

688
target/linux/ar71xx/files/drivers/tty/serial/ar933x_uart.c
View File

@@ -1,688 +0,0 @@
/*
* Atheros AR933X SoC built-in UART driver
*
* Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
*
* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/init.h>
#include <linux/console.h>
#include <linux/sysrq.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/tty.h>
#include <linux/tty_flip.h>
#include <linux/serial_core.h>
#include <linux/serial.h>
#include <linux/slab.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <asm/mach-ar71xx/ar933x_uart.h>
#include <asm/mach-ar71xx/ar933x_uart_platform.h>
#define DRIVER_NAME "ar933x-uart"
#define AR933X_DUMMY_STATUS_RD 0x01
static struct uart_driver ar933x_uart_driver;
struct ar933x_uart_port {
struct uart_port port;
unsigned int ier; /* shadow Interrupt Enable Register */
};
static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
int offset)
{
return readl(up->port.membase + offset);
}
static inline void ar933x_uart_write(struct ar933x_uart_port *up,
int offset, unsigned int value)
{
writel(value, up->port.membase + offset);
}
static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
unsigned int offset,
unsigned int mask,
unsigned int val)
{
unsigned int t;
t = ar933x_uart_read(up, offset);
t &= ~mask;
t |= val;
ar933x_uart_write(up, offset, t);
}
static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
unsigned int offset,
unsigned int val)
{
ar933x_uart_rmw(up, offset, 0, val);
}
static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
unsigned int offset,
unsigned int val)
{
ar933x_uart_rmw(up, offset, val, 0);
}
static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
{
up->ier |= AR933X_UART_INT_TX_EMPTY;
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
}
static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
{
up->ier &= ~AR933X_UART_INT_TX_EMPTY;
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
}
static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
{
unsigned int rdata;
rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
rdata |= AR933X_UART_DATA_TX_CSR;
ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
}
static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
unsigned long flags;
unsigned int rdata;
spin_lock_irqsave(&up->port.lock, flags);
rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
spin_unlock_irqrestore(&up->port.lock, flags);
return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
}
static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
{
return TIOCM_CAR;
}
static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
{
}
static void ar933x_uart_start_tx(struct uart_port *port)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
ar933x_uart_start_tx_interrupt(up);
}
static void ar933x_uart_stop_tx(struct uart_port *port)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
ar933x_uart_stop_tx_interrupt(up);
}
static void ar933x_uart_stop_rx(struct uart_port *port)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
up->ier &= ~AR933X_UART_INT_RX_VALID;
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
}
static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
unsigned long flags;
spin_lock_irqsave(&up->port.lock, flags);
if (break_state == -1)
ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
AR933X_UART_CS_TX_BREAK);
else
ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
AR933X_UART_CS_TX_BREAK);
spin_unlock_irqrestore(&up->port.lock, flags);
}
static void ar933x_uart_enable_ms(struct uart_port *port)
{
}
static void ar933x_uart_set_termios(struct uart_port *port,
struct ktermios *new,
struct ktermios *old)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
unsigned int cs;
unsigned long flags;
unsigned int baud, scale;
/* Only CS8 is supported */
new->c_cflag &= ~CSIZE;
new->c_cflag |= CS8;
/* Only one stop bit is supported */
new->c_cflag &= ~CSTOPB;
cs = 0;
if (new->c_cflag & PARENB) {
if (!(new->c_cflag & PARODD))
cs |= AR933X_UART_CS_PARITY_EVEN;
else
cs |= AR933X_UART_CS_PARITY_ODD;
} else {
cs |= AR933X_UART_CS_PARITY_NONE;
}
/* Mark/space parity is not supported */
new->c_cflag &= ~CMSPAR;
baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
scale = (port->uartclk / (16 * baud)) - 1;
/*
* Ok, we're now changing the port state. Do it with
* interrupts disabled.
*/
spin_lock_irqsave(&up->port.lock, flags);
/* Update the per-port timeout. */
uart_update_timeout(port, new->c_cflag, baud);
up->port.ignore_status_mask = 0;
/* ignore all characters if CREAD is not set */
if ((new->c_cflag & CREAD) == 0)
up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
scale << AR933X_UART_CLOCK_SCALE_S | 8192);
/* setup configuration register */
ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
/* enable host interrupt */
ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
AR933X_UART_CS_HOST_INT_EN);
spin_unlock_irqrestore(&up->port.lock, flags);
if (tty_termios_baud_rate(new))
tty_termios_encode_baud_rate(new, baud, baud);
}
static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
{
struct tty_struct *tty;
int max_count = 256;
tty = tty_port_tty_get(&up->port.state->port);
do {
unsigned int rdata;
unsigned char ch;
rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
break;
/* remove the character from the FIFO */
ar933x_uart_write(up, AR933X_UART_DATA_REG,
AR933X_UART_DATA_RX_CSR);
if (!tty) {
/* discard the data if no tty available */
continue;
}
up->port.icount.rx++;
ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
if (uart_handle_sysrq_char(&up->port, ch))
continue;
if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
tty_insert_flip_char(tty, ch, TTY_NORMAL);
} while (max_count-- > 0);
if (tty) {
tty_flip_buffer_push(tty);
tty_kref_put(tty);
}
}
static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
{
struct circ_buf *xmit = &up->port.state->xmit;
int count;
if (uart_tx_stopped(&up->port))
return;
count = up->port.fifosize;
do {
unsigned int rdata;
rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
break;
if (up->port.x_char) {
ar933x_uart_putc(up, up->port.x_char);
up->port.icount.tx++;
up->port.x_char = 0;
continue;
}
if (uart_circ_empty(xmit))
break;
ar933x_uart_putc(up, xmit->buf[xmit->tail]);
xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
up->port.icount.tx++;
} while (--count > 0);
if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
uart_write_wakeup(&up->port);
if (!uart_circ_empty(xmit))
ar933x_uart_start_tx_interrupt(up);
}
static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
{
struct ar933x_uart_port *up = dev_id;
unsigned int status;
status = ar933x_uart_read(up, AR933X_UART_CS_REG);
if ((status & AR933X_UART_CS_HOST_INT) == 0)
return IRQ_NONE;
spin_lock(&up->port.lock);
status = ar933x_uart_read(up, AR933X_UART_INT_REG);
status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
if (status & AR933X_UART_INT_RX_VALID) {
ar933x_uart_write(up, AR933X_UART_INT_REG,
AR933X_UART_INT_RX_VALID);
ar933x_uart_rx_chars(up);
}
if (status & AR933X_UART_INT_TX_EMPTY) {
ar933x_uart_write(up, AR933X_UART_INT_REG,
AR933X_UART_INT_TX_EMPTY);
ar933x_uart_stop_tx_interrupt(up);
ar933x_uart_tx_chars(up);
}
spin_unlock(&up->port.lock);
return IRQ_HANDLED;
}
static int ar933x_uart_startup(struct uart_port *port)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
unsigned long flags;
int ret;
ret = request_irq(up->port.irq, ar933x_uart_interrupt,
up->port.irqflags, dev_name(up->port.dev), up);
if (ret)
return ret;
spin_lock_irqsave(&up->port.lock, flags);
/* Enable HOST interrupts */
ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
AR933X_UART_CS_HOST_INT_EN);
/* Enable RX interrupts */
up->ier = AR933X_UART_INT_RX_VALID;
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
spin_unlock_irqrestore(&up->port.lock, flags);
return 0;
}
static void ar933x_uart_shutdown(struct uart_port *port)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
/* Disable all interrupts */
up->ier = 0;
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
/* Disable break condition */
ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
AR933X_UART_CS_TX_BREAK);
free_irq(up->port.irq, up);
}
static const char *ar933x_uart_type(struct uart_port *port)
{
return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
}
static void ar933x_uart_release_port(struct uart_port *port)
{
/* Nothing to release ... */
}
static int ar933x_uart_request_port(struct uart_port *port)
{
/* UARTs always present */
return 0;
}
static void ar933x_uart_config_port(struct uart_port *port, int flags)
{
if (flags & UART_CONFIG_TYPE)
port->type = PORT_AR933X;
}
static int ar933x_uart_verify_port(struct uart_port *port,
struct serial_struct *ser)
{
if (ser->type != PORT_UNKNOWN &&
ser->type != PORT_AR933X)
return -EINVAL;
if (ser->irq < 0 || ser->irq >= NR_IRQS)
return -EINVAL;
if (ser->baud_base < 28800)
return -EINVAL;
return 0;
}
static struct uart_ops ar933x_uart_ops = {
.tx_empty = ar933x_uart_tx_empty,
.set_mctrl = ar933x_uart_set_mctrl,
.get_mctrl = ar933x_uart_get_mctrl,
.stop_tx = ar933x_uart_stop_tx,
.start_tx = ar933x_uart_start_tx,
.stop_rx = ar933x_uart_stop_rx,
.enable_ms = ar933x_uart_enable_ms,
.break_ctl = ar933x_uart_break_ctl,
.startup = ar933x_uart_startup,
.shutdown = ar933x_uart_shutdown,
.set_termios = ar933x_uart_set_termios,
.type = ar933x_uart_type,
.release_port = ar933x_uart_release_port,
.request_port = ar933x_uart_request_port,
.config_port = ar933x_uart_config_port,
.verify_port = ar933x_uart_verify_port,
};
#ifdef CONFIG_SERIAL_AR933X_CONSOLE
static struct ar933x_uart_port *
ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
{
unsigned int status;
unsigned int timeout = 60000;
/* Wait up to 60ms for the character(s) to be sent. */
do {
status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
if (--timeout == 0)
break;
udelay(1);
} while ((status & AR933X_UART_DATA_TX_CSR) == 0);
}
static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
{
struct ar933x_uart_port *up = (struct ar933x_uart_port *) port;
ar933x_uart_wait_xmitr(up);
ar933x_uart_putc(up, ch);
}
static void ar933x_uart_console_write(struct console *co, const char *s,
unsigned int count)
{
struct ar933x_uart_port *up = ar933x_console_ports[co->index];
unsigned long flags;
unsigned int int_en;
int locked = 1;
local_irq_save(flags);
if (up->port.sysrq)
locked = 0;
else if (oops_in_progress)
locked = spin_trylock(&up->port.lock);
else
spin_lock(&up->port.lock);
/*
* First save the IER then disable the interrupts
*/
int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
/*
* Finally, wait for transmitter to become empty
* and restore the IER
*/
ar933x_uart_wait_xmitr(up);
ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
if (locked)
spin_unlock(&up->port.lock);
local_irq_restore(flags);
}
static int ar933x_uart_console_setup(struct console *co, char *options)
{
struct ar933x_uart_port *up;
int baud = 115200;
int bits = 8;
int parity = 'n';
int flow = 'n';
if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
return -EINVAL;
up = ar933x_console_ports[co->index];
if (!up)
return -ENODEV;
if (options)
uart_parse_options(options, &baud, &parity, &bits, &flow);
return uart_set_options(&up->port, co, baud, parity, bits, flow);
}
static struct console ar933x_uart_console = {
.name = "ttyATH",
.write = ar933x_uart_console_write,
.device = uart_console_device,
.setup = ar933x_uart_console_setup,
.flags = CON_PRINTBUFFER,
.index = -1,
.data = &ar933x_uart_driver,
};
static void ar933x_uart_add_console_port(struct ar933x_uart_port *up)
{
ar933x_console_ports[up->port.line] = up;
}
#define AR933X_SERIAL_CONSOLE (&ar933x_uart_console)
#else
static inline void ar933x_uart_add_console_port(struct ar933x_uart_port *up) {}
#define AR933X_SERIAL_CONSOLE NULL
#endif /* CONFIG_SERIAL_AR933X_CONSOLE */
static struct uart_driver ar933x_uart_driver = {
.owner = THIS_MODULE,
.driver_name = DRIVER_NAME,
.dev_name = "ttyATH",
.nr = CONFIG_SERIAL_AR933X_NR_UARTS,
.cons = AR933X_SERIAL_CONSOLE,
};
static int __devinit ar933x_uart_probe(struct platform_device *pdev)
{
struct ar933x_uart_platform_data *pdata;
struct ar933x_uart_port *up;
struct uart_port *port;
struct resource *mem_res;
struct resource *irq_res;
int id;
int ret;
pdata = pdev->dev.platform_data;
if (!pdata)
return -EINVAL;
id = pdev->id;
if (id == -1)
id = 0;
if (id > CONFIG_SERIAL_AR933X_NR_UARTS)
return -EINVAL;
mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!mem_res) {
dev_err(&pdev->dev, "no MEM resource\n");
return -EINVAL;
}
irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!irq_res) {
dev_err(&pdev->dev, "no IRQ resource\n");
return -EINVAL;
}
up = kzalloc(sizeof(struct ar933x_uart_port), GFP_KERNEL);
if (!up)
return -ENOMEM;
port = &up->port;
port->mapbase = mem_res->start;
port->membase = ioremap(mem_res->start, AR933X_UART_REGS_SIZE);
if (!port->membase) {
ret = -ENOMEM;
goto err_free_up;
}
port->line = id;
port->irq = irq_res->start;
port->dev = &pdev->dev;
port->type = PORT_AR933X;
port->iotype = UPIO_MEM32;
port->uartclk = pdata->uartclk;
port->regshift = 2;
port->fifosize = AR933X_UART_FIFO_SIZE;
port->ops = &ar933x_uart_ops;
ar933x_uart_add_console_port(up);
ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
if (ret)
goto err_unmap;
platform_set_drvdata(pdev, up);
return 0;
err_unmap:
iounmap(up->port.membase);
err_free_up:
kfree(up);
return ret;
}
static int __devexit ar933x_uart_remove(struct platform_device *pdev)
{
struct ar933x_uart_port *up;
up = platform_get_drvdata(pdev);
platform_set_drvdata(pdev, NULL);
if (up) {
uart_remove_one_port(&ar933x_uart_driver, &up->port);
iounmap(up->port.membase);
kfree(up);
}
return 0;
}
static struct platform_driver ar933x_uart_platform_driver = {
.probe = ar933x_uart_probe,
.remove = __devexit_p(ar933x_uart_remove),
.driver = {
.name = DRIVER_NAME,
.owner = THIS_MODULE,
},
};
static int __init ar933x_uart_init(void)
{
int ret;
ar933x_uart_driver.nr = CONFIG_SERIAL_AR933X_NR_UARTS;
ret = uart_register_driver(&ar933x_uart_driver);
if (ret)
goto err_out;
ret = platform_driver_register(&ar933x_uart_platform_driver);
if (ret)
goto err_unregister_uart_driver;
return 0;
err_unregister_uart_driver:
uart_unregister_driver(&ar933x_uart_driver);
err_out:
return ret;
}
static void __exit ar933x_uart_exit(void)
{
platform_driver_unregister(&ar933x_uart_platform_driver);
uart_unregister_driver(&ar933x_uart_driver);
}
module_init(ar933x_uart_init);
module_exit(ar933x_uart_exit);
MODULE_DESCRIPTION("Atheros AR933X UART driver");
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:" DRIVER_NAME);

242
target/linux/ar71xx/files/drivers/usb/host/ehci-ar71xx.c
View File

@@ -1,242 +0,0 @@
/*
* Bus Glue for Atheros AR71xx built-in EHCI controller.
*
* Copyright (C) 2008-2010 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Atheros' 2.6.15 BSP
* Copyright (C) 2007 Atheros Communications, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/delay.h>
#include <asm/mach-ar71xx/platform.h>
extern int usb_disabled(void);
static int ehci_ar71xx_init(struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
int ret;
ehci->caps = hcd->regs;
ehci->regs = hcd->regs +
HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
ehci->sbrn = 0x20;
ehci->has_synopsys_hc_bug = 1;
ehci_reset(ehci);
ret = ehci_init(hcd);
if (ret)
return ret;
ehci_port_power(ehci, 0);
return 0;
}
static int ehci_ar91xx_init(struct usb_hcd *hcd)
{
struct ehci_hcd *ehci = hcd_to_ehci(hcd);
int ret;
ehci->caps = hcd->regs + 0x100;
ehci->regs = hcd->regs + 0x100 +
HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase));
ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
hcd->has_tt = 1;
ehci->sbrn = 0x20;
ehci_reset(ehci);
ret = ehci_init(hcd);
if (ret)
return ret;
ehci_port_power(ehci, 0);
return 0;
}
static int ehci_ar71xx_probe(const struct hc_driver *driver,
struct usb_hcd **hcd_out,
struct platform_device *pdev)
{
struct usb_hcd *hcd;
struct resource *res;
int irq;
int ret;
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!res) {
dev_dbg(&pdev->dev, "no IRQ specified for %s\n",
dev_name(&pdev->dev));
return -ENODEV;
}
irq = res->start;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_dbg(&pdev->dev, "no base address specified for %s\n",
dev_name(&pdev->dev));
return -ENODEV;
}
hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
if (!hcd)
return -ENOMEM;
hcd->rsrc_start = res->start;
hcd->rsrc_len = res->end - res->start + 1;
if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
dev_dbg(&pdev->dev, "controller already in use\n");
ret = -EBUSY;
goto err_put_hcd;
}
hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
if (!hcd->regs) {
dev_dbg(&pdev->dev, "error mapping memory\n");
ret = -EFAULT;
goto err_release_region;
}
ret = usb_add_hcd(hcd, irq, IRQF_DISABLED | IRQF_SHARED);
if (ret)
goto err_iounmap;
return 0;
err_iounmap:
iounmap(hcd->regs);
err_release_region:
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
err_put_hcd:
usb_put_hcd(hcd);
return ret;
}
static void ehci_ar71xx_remove(struct usb_hcd *hcd,
struct platform_device *pdev)
{
usb_remove_hcd(hcd);
iounmap(hcd->regs);
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
usb_put_hcd(hcd);
}
static const struct hc_driver ehci_ar71xx_hc_driver = {
.description = hcd_name,
.product_desc = "Atheros AR71xx built-in EHCI controller",
.hcd_priv_size = sizeof(struct ehci_hcd),
.irq = ehci_irq,
.flags = HCD_MEMORY | HCD_USB2,
.reset = ehci_ar71xx_init,
.start = ehci_run,
.stop = ehci_stop,
.shutdown = ehci_shutdown,
.urb_enqueue = ehci_urb_enqueue,
.urb_dequeue = ehci_urb_dequeue,
.endpoint_disable = ehci_endpoint_disable,
.endpoint_reset = ehci_endpoint_reset,
.get_frame_number = ehci_get_frame,
.hub_status_data = ehci_hub_status_data,
.hub_control = ehci_hub_control,
#ifdef CONFIG_PM
.hub_suspend = ehci_hub_suspend,
.hub_resume = ehci_hub_resume,
#endif
.relinquish_port = ehci_relinquish_port,
.port_handed_over = ehci_port_handed_over,
.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
};
static const struct hc_driver ehci_ar91xx_hc_driver = {
.description = hcd_name,
.product_desc = "Atheros AR91xx built-in EHCI controller",
.hcd_priv_size = sizeof(struct ehci_hcd),
.irq = ehci_irq,
.flags = HCD_MEMORY | HCD_USB2,
.reset = ehci_ar91xx_init,
.start = ehci_run,
.stop = ehci_stop,
.shutdown = ehci_shutdown,
.urb_enqueue = ehci_urb_enqueue,
.urb_dequeue = ehci_urb_dequeue,
.endpoint_disable = ehci_endpoint_disable,
.endpoint_reset = ehci_endpoint_reset,
.get_frame_number = ehci_get_frame,
.hub_status_data = ehci_hub_status_data,
.hub_control = ehci_hub_control,
#ifdef CONFIG_PM
.hub_suspend = ehci_hub_suspend,
.hub_resume = ehci_hub_resume,
#endif
.relinquish_port = ehci_relinquish_port,
.port_handed_over = ehci_port_handed_over,
.clear_tt_buffer_complete = ehci_clear_tt_buffer_complete,
};
static int ehci_ar71xx_driver_probe(struct platform_device *pdev)
{
struct ar71xx_ehci_platform_data *pdata;
struct usb_hcd *hcd = NULL;
int ret;
if (usb_disabled())
return -ENODEV;
pdata = pdev->dev.platform_data;
if (!pdata) {
dev_err(&pdev->dev, "no platform data specified for %s\n",
dev_name(&pdev->dev));
return -ENODEV;
}
if (pdata->is_ar91xx)
ret = ehci_ar71xx_probe(&ehci_ar91xx_hc_driver, &hcd, pdev);
else
ret = ehci_ar71xx_probe(&ehci_ar71xx_hc_driver, &hcd, pdev);
return ret;
}
static int ehci_ar71xx_driver_remove(struct platform_device *pdev)
{
struct usb_hcd *hcd = platform_get_drvdata(pdev);
ehci_ar71xx_remove(hcd, pdev);
return 0;
}
MODULE_ALIAS("platform:ar71xx-ehci");
static struct platform_driver ehci_ar71xx_driver = {
.probe = ehci_ar71xx_driver_probe,
.remove = ehci_ar71xx_driver_remove,
.driver = {
.name = "ar71xx-ehci",
}
};

165
target/linux/ar71xx/files/drivers/usb/host/ohci-ar71xx.c
View File

@@ -1,165 +0,0 @@
/*
* OHCI HCD (Host Controller Driver) for USB.
*
* Bus Glue for Atheros AR71xx built-in OHCI controller.
*
* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Atheros' 2.6.15 BSP
* Copyright (C) 2007 Atheros Communications, Inc.
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/platform_device.h>
#include <linux/delay.h>
extern int usb_disabled(void);
static int usb_hcd_ar71xx_probe(const struct hc_driver *driver,
struct platform_device *pdev)
{
struct usb_hcd *hcd;
struct resource *res;
int irq;
int ret;
res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
if (!res) {
dev_dbg(&pdev->dev, "no IRQ specified for %s\n",
dev_name(&pdev->dev));
return -ENODEV;
}
irq = res->start;
hcd = usb_create_hcd(driver, &pdev->dev, dev_name(&pdev->dev));
if (!hcd)
return -ENOMEM;
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
if (!res) {
dev_dbg(&pdev->dev, "no base address specified for %s\n",
dev_name(&pdev->dev));
ret = -ENODEV;
goto err_put_hcd;
}
hcd->rsrc_start = res->start;
hcd->rsrc_len = res->end - res->start + 1;
if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) {
dev_dbg(&pdev->dev, "controller already in use\n");
ret = -EBUSY;
goto err_put_hcd;
}
hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len);
if (!hcd->regs) {
dev_dbg(&pdev->dev, "error mapping memory\n");
ret = -EFAULT;
goto err_release_region;
}
ohci_hcd_init(hcd_to_ohci(hcd));
ret = usb_add_hcd(hcd, irq, IRQF_DISABLED);
if (ret)
goto err_stop_hcd;
return 0;
err_stop_hcd:
iounmap(hcd->regs);
err_release_region:
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
err_put_hcd:
usb_put_hcd(hcd);
return ret;
}
void usb_hcd_ar71xx_remove(struct usb_hcd *hcd, struct platform_device *pdev)
{
usb_remove_hcd(hcd);
iounmap(hcd->regs);
release_mem_region(hcd->rsrc_start, hcd->rsrc_len);
usb_put_hcd(hcd);
}
static int __devinit ohci_ar71xx_start(struct usb_hcd *hcd)
{
struct ohci_hcd *ohci = hcd_to_ohci(hcd);
int ret;
ret = ohci_init(ohci);
if (ret < 0)
return ret;
ret = ohci_run(ohci);
if (ret < 0)
goto err;
return 0;
err:
ohci_stop(hcd);
return ret;
}
static const struct hc_driver ohci_ar71xx_hc_driver = {
.description = hcd_name,
.product_desc = "Atheros AR71xx built-in OHCI controller",
.hcd_priv_size = sizeof(struct ohci_hcd),
.irq = ohci_irq,
.flags = HCD_USB11 | HCD_MEMORY,
.start = ohci_ar71xx_start,
.stop = ohci_stop,
.shutdown = ohci_shutdown,
.urb_enqueue = ohci_urb_enqueue,
.urb_dequeue = ohci_urb_dequeue,
.endpoint_disable = ohci_endpoint_disable,
/*
* scheduling support
*/
.get_frame_number = ohci_get_frame,
/*
* root hub support
*/
.hub_status_data = ohci_hub_status_data,
.hub_control = ohci_hub_control,
.start_port_reset = ohci_start_port_reset,
};
static int ohci_hcd_ar71xx_drv_probe(struct platform_device *pdev)
{
if (usb_disabled())
return -ENODEV;
return usb_hcd_ar71xx_probe(&ohci_ar71xx_hc_driver, pdev);
}
static int ohci_hcd_ar71xx_drv_remove(struct platform_device *pdev)
{
struct usb_hcd *hcd = platform_get_drvdata(pdev);
usb_hcd_ar71xx_remove(hcd, pdev);
return 0;
}
MODULE_ALIAS("platform:ar71xx-ohci");
static struct platform_driver ohci_hcd_ar71xx_driver = {
.probe = ohci_hcd_ar71xx_drv_probe,
.remove = ohci_hcd_ar71xx_drv_remove,
.shutdown = usb_hcd_platform_shutdown,
.driver = {
.name = "ar71xx-ohci",
.owner = THIS_MODULE,
},
};

305
target/linux/ar71xx/files/drivers/watchdog/ar71xx_wdt.c
View File

@@ -1,305 +0,0 @@
/*
* Driver for the Atheros AR71xx SoC's built-in hardware watchdog timer.
*
* Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
* Copyright (C) 2008 Gabor Juhos <juhosg@openwrt.org>
* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
*
* Parts of this file are based on Atheros 2.6.31 BSP
*
* This driver was based on: drivers/watchdog/ixp4xx_wdt.c
* Author: Deepak Saxena <dsaxena@plexity.net>
* Copyright 2004 (c) MontaVista, Software, Inc.
*
* which again was based on sa1100 driver,
* Copyright (C) 2000 Oleg Drokin <green@crimea.edu>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*
*/
#include <linux/bitops.h>
#include <linux/errno.h>
#include <linux/fs.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/miscdevice.h>
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/platform_device.h>
#include <linux/types.h>
#include <linux/watchdog.h>
#include <linux/delay.h>
#include <asm/mach-ar71xx/ar71xx.h>
#define DRV_NAME "ar71xx-wdt"
#define DRV_DESC "Atheros AR71xx hardware watchdog driver"
#define DRV_VERSION "0.1.0"
#define WDT_TIMEOUT 15 /* seconds */
static int nowayout = WATCHDOG_NOWAYOUT;
#ifdef CONFIG_WATCHDOG_NOWAYOUT
module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started "
"(default=" __MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
#endif
static unsigned long wdt_flags;
#define WDT_FLAGS_BUSY 0
#define WDT_FLAGS_EXPECT_CLOSE 1
static int wdt_timeout = WDT_TIMEOUT;
static int boot_status;
static int max_timeout;
static u32 wdt_clk_freq;
static inline void ar71xx_wdt_keepalive(void)
{
ar71xx_reset_wr(AR71XX_RESET_REG_WDOG, wdt_clk_freq * wdt_timeout);
}
static inline void ar71xx_wdt_enable(void)
{
printk(KERN_DEBUG DRV_NAME ": enabling watchdog timer\n");
ar71xx_wdt_keepalive();
udelay(2);
ar71xx_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_FCR);
}
static inline void ar71xx_wdt_disable(void)
{
printk(KERN_DEBUG DRV_NAME ": disabling watchdog timer\n");
ar71xx_reset_wr(AR71XX_RESET_REG_WDOG_CTRL, WDOG_CTRL_ACTION_NONE);
}
static int ar71xx_wdt_set_timeout(int val)
{
if (val < 1 || val > max_timeout)
return -EINVAL;
wdt_timeout = val;
ar71xx_wdt_keepalive();
printk(KERN_DEBUG DRV_NAME ": timeout=%d secs\n", wdt_timeout);
return 0;
}
static int ar71xx_wdt_open(struct inode *inode, struct file *file)
{
if (test_and_set_bit(WDT_FLAGS_BUSY, &wdt_flags))
return -EBUSY;
clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
ar71xx_wdt_enable();
return nonseekable_open(inode, file);
}
static int ar71xx_wdt_release(struct inode *inode, struct file *file)
{
if (test_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags)) {
ar71xx_wdt_disable();
} else {
printk(KERN_CRIT DRV_NAME ": device closed unexpectedly, "
"watchdog timer will not stop!\n");
}
clear_bit(WDT_FLAGS_BUSY, &wdt_flags);
clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
return 0;
}
static ssize_t ar71xx_wdt_write(struct file *file, const char *data,
size_t len, loff_t *ppos)
{
if (len) {
if (!nowayout) {
size_t i;
clear_bit(WDT_FLAGS_EXPECT_CLOSE, &wdt_flags);
for (i = 0; i != len; i++) {
char c;
if (get_user(c, data + i))
return -EFAULT;
if (c == 'V')
set_bit(WDT_FLAGS_EXPECT_CLOSE,
&wdt_flags);
}
}
ar71xx_wdt_keepalive();
}
return len;
}
static struct watchdog_info ar71xx_wdt_info = {
.options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING |
WDIOF_MAGICCLOSE | WDIOF_CARDRESET,
.firmware_version = 0,
.identity = "AR71XX watchdog",
};
static long ar71xx_wdt_ioctl(struct file *file,
unsigned int cmd, unsigned long arg)
{
int t;
int ret;
switch (cmd) {
case WDIOC_GETSUPPORT:
ret = copy_to_user((struct watchdog_info *)arg,
&ar71xx_wdt_info,
sizeof(ar71xx_wdt_info)) ? -EFAULT : 0;
break;
case WDIOC_GETSTATUS:
ret = put_user(0, (int *)arg) ? -EFAULT : 0;
break;
case WDIOC_GETBOOTSTATUS:
ret = put_user(boot_status, (int *)arg) ? -EFAULT : 0;
break;
case WDIOC_KEEPALIVE:
ar71xx_wdt_keepalive();
ret = 0;
break;
case WDIOC_SETTIMEOUT:
ret = get_user(t, (int *)arg) ? -EFAULT : 0;
if (ret)
break;
ret = ar71xx_wdt_set_timeout(t);
if (ret)
break;
/* fallthrough */
case WDIOC_GETTIMEOUT:
ret = put_user(wdt_timeout, (int *)arg) ? -EFAULT : 0;
break;
default:
ret = -ENOTTY;
break;
}
return ret;
}
static const struct file_operations ar71xx_wdt_fops = {
.owner = THIS_MODULE,
.write = ar71xx_wdt_write,
.unlocked_ioctl = ar71xx_wdt_ioctl,
.open = ar71xx_wdt_open,
.release = ar71xx_wdt_release,
};
static struct miscdevice ar71xx_wdt_miscdev = {
.minor = WATCHDOG_MINOR,
.name = "watchdog",
.fops = &ar71xx_wdt_fops,
};
static int __devinit ar71xx_wdt_probe(struct platform_device *pdev)
{
int ret;
switch (ar71xx_soc) {
case AR71XX_SOC_AR7130:
case AR71XX_SOC_AR7141:
case AR71XX_SOC_AR7161:
case AR71XX_SOC_AR7240:
case AR71XX_SOC_AR7241:
case AR71XX_SOC_AR7242:
case AR71XX_SOC_AR9130:
case AR71XX_SOC_AR9132:
wdt_clk_freq = ar71xx_ahb_freq;
break;
case AR71XX_SOC_AR9330:
case AR71XX_SOC_AR9331:
case AR71XX_SOC_AR9341:
case AR71XX_SOC_AR9342:
case AR71XX_SOC_AR9344:
wdt_clk_freq = ar71xx_ref_freq;
break;
default:
BUG();
}
max_timeout = (0xfffffffful / wdt_clk_freq);
wdt_timeout = (max_timeout < WDT_TIMEOUT) ? max_timeout : WDT_TIMEOUT;
if (ar71xx_reset_rr(AR71XX_RESET_REG_WDOG_CTRL) & WDOG_CTRL_LAST_RESET)
boot_status = WDIOF_CARDRESET;
ret = misc_register(&ar71xx_wdt_miscdev);
if (ret)
goto err_out;
printk(KERN_INFO DRV_DESC " version " DRV_VERSION "\n");
printk(KERN_DEBUG DRV_NAME ": timeout=%d secs (max=%d)\n",
wdt_timeout, max_timeout);
return 0;
err_out:
return ret;
}
static int __devexit ar71xx_wdt_remove(struct platform_device *pdev)
{
misc_deregister(&ar71xx_wdt_miscdev);
return 0;
}
static void ar71xx_wdt_shutdown(struct platform_device *pdev)
{
ar71xx_wdt_disable();
}
static struct platform_driver ar71xx_wdt_driver = {
.probe = ar71xx_wdt_probe,
.remove = __devexit_p(ar71xx_wdt_remove),
.shutdown = ar71xx_wdt_shutdown,
.driver = {
.name = DRV_NAME,
.owner = THIS_MODULE,
},
};
static int __init ar71xx_wdt_init(void)
{
return platform_driver_register(&ar71xx_wdt_driver);
}
module_init(ar71xx_wdt_init);
static void __exit ar71xx_wdt_exit(void)
{
platform_driver_unregister(&ar71xx_wdt_driver);
}
module_exit(ar71xx_wdt_exit);
MODULE_DESCRIPTION(DRV_DESC);
MODULE_VERSION(DRV_VERSION);
MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org");
MODULE_AUTHOR("Imre Kaloz <kaloz@openwrt.org");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("platform:" DRV_NAME);
MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);