qi-hardware/openwrt-xburst
1
0
Fork 0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2025-04-21 12:27:27 +03:00
Code Activity

[adm5120] change switch register access macros

Browse Source 
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9962 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
2007-12-27 14:58:48 +00:00
parent 4bb1a03501
commit 23d61f22e9
9 changed files with 46 additions and 46 deletions
Download Patch File Download Diff File Expand all files Collapse all files

4
target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_nand.h
View File

@@ -65,8 +65,8 @@
static inline void adm5120_nand_enable(void)
{
SW_WRITE_REG(BW_CNTL1, BW_CNTL1_NAND_ENABLE);
SW_WRITE_REG(BOOT_DONE, 1);
SW_WRITE_REG(SWITCH_REG_BW_CNTL1, BW_CNTL1_NAND_ENABLE);
SW_WRITE_REG(SWITCH_REG_BOOT_DONE, 1);
}
static inline void adm5120_nand_set_wpn(unsigned int set)

4
target/linux/adm5120/files/include/asm-mips/mach-adm5120/adm5120_switch.h
View File

@@ -32,9 +32,9 @@
#define BITMASK(len) ((1 << (len))-1)
#define SW_READ_REG(r) __raw_readl( \
(void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + SWITCH_REG_ ## r)
(void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + r)
#define SW_WRITE_REG(r, v) __raw_writel((v), \
(void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + SWITCH_REG_ ## r)
(void __iomem *)KSEG1ADDR(ADM5120_SWITCH_BASE) + r)
/* Switch register offsets */
#define SWITCH_REG_CODE 0x0000