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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-11-24 00:04:38 +02:00

[x86]: add a subtarget and drivers for the Intel Tolapai SoC

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@20648 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
kaloz 2010-04-01 12:05:27 +00:00
parent 38b25a187b
commit 23f27ea50b
27 changed files with 13278 additions and 1 deletions

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@ -0,0 +1,80 @@
#
# Copyright (C) 2010 OpenWrt.org
#
# This is free software, licensed under the GNU General Public License v2.
# See /LICENSE for more information.
#
include $(TOPDIR)/rules.mk
include $(INCLUDE_DIR)/kernel.mk
PKG_NAME:=ep80579-drivers
PKG_VERSION:=1.0.34
PKG_RELEASE:=1
PKG_SOURCE:=Embedded.L.1.0.34.ADI.R100.tar.gz
PKG_SOURCE_URL:=ftp://ftp.adiengineering.com/Archive/OcracokeIsland/Drivers/Linux/1.0.34/
PKG_MD5SUM:=61df9778f8c1f919257d2f48a0bcb000
PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION)
include $(INCLUDE_DIR)/package.mk
define KernelPackage/ep80579-drivers/Default
DEPENDS:=@TARGET_x86
endef
define KernelPackage/ep80579-eth
$(call KernelPackage/ep80579-drivers/Default)
SUBMENU:=Network Devices
TITLE:=Intel EP80579 ethernet driver
FILES:= \
$(PKG_BUILD_DIR)/Embedded/build/gcu.$(LINUX_KMOD_SUFFIX) \
$(PKG_BUILD_DIR)/Embedded/build/iegbe.$(LINUX_KMOD_SUFFIX)
AUTOLOAD:=$(call AutoLoad,40,gcu iegbe)
endef
define KernelPackage/ep80579-misc
$(call KernelPackage/ep80579-drivers/Default)
SUBMENU:=Other modules
TITLE:=Misc. Intel EP80579 drivers (DMA,, gpio)
FILES:= \
$(PKG_BUILD_DIR)/Embedded/build/dma.$(LINUX_KMOD_SUFFIX) \
$(PKG_BUILD_DIR)/Embedded/build/gpio.$(LINUX_KMOD_SUFFIX)
AUTOLOAD:=$(call AutoLoad,40,gpio dma)
endef
define KernelPackage/ep80579-can
$(call KernelPackage/ep80579-drivers/Default)
SUBMENU:=Other modules
TITLE:=Intel EP80579 CAN driver
FILES:= \
$(PKG_BUILD_DIR)/Embedded/build/timesync.$(LINUX_KMOD_SUFFIX) \
$(PKG_BUILD_DIR)/Embedded/build/can.$(LINUX_KMOD_SUFFIX)
AUTOLOAD:=$(call AutoLoad,40,timesync can)
endef
define Build/Prepare
rm -rf $(PKG_BUILD_DIR)
mkdir -p $(PKG_BUILD_DIR)
tar xzvf $(DL_DIR)/$(PKG_SOURCE) -C $(PKG_BUILD_DIR)/
$(Build/Patch)
endef
define Build/Compile
(cd $(PKG_BUILD_DIR)/Embedded; \
$(MAKE) KERNEL_SOURCE_ROOT=$(LINUX_DIR) \
KSRC=$(LINUX_DIR) \
KOBJ=$(LINUX_DIR) \
ENV_DIR=$(PKG_BUILD_DIR)/Embedded \
all \
)
endef
define KernelPackage/ep80579-eth/install
endef
$(eval $(call KernelPackage,ep80579-can))
$(eval $(call KernelPackage,ep80579-eth))
$(eval $(call KernelPackage,ep80579-misc))

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@ -0,0 +1,22 @@
--- a/build_system/build_files/common.mk
+++ b/build_system/build_files/common.mk
@@ -122,7 +122,7 @@ CC=$(COMPILER)
LD=$(LINKER)
AR=$(ARCHIVER)
-CFLAGS+=-O2
+#CFLAGS+=-O2
PWD= $(shell pwd)
--- a/build_system/build_files/OS/linux_2.6.mk
+++ b/build_system/build_files/OS/linux_2.6.mk
@@ -80,7 +80,7 @@ endif
ifeq ($(OS_LEVEL), kernel_space)
-CFLAGS+=
+#CFLAGS+=
endif

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@ -0,0 +1,53 @@
--- a/Embedded/src/1588/1588.c
+++ b/Embedded/src/1588/1588.c
@@ -291,7 +291,7 @@ int pci_probe(struct pci_dev *dev, const
}
- if ( request_irq(dev->irq, &timesync_isr, SA_SHIRQ, DRIVERNAME,
+ if ( request_irq(dev->irq, &timesync_isr, IRQF_SHARED, DRIVERNAME,
&g_drvr_data) )
{
printk("%s-pci_probe: irq\n", DRIVERNAME);
--- a/Embedded/src/CAN/can_main.c
+++ b/Embedded/src/CAN/can_main.c
@@ -424,7 +424,7 @@ int can_open(struct inode *inode, struct
err = request_irq(
can_os->irq,
can_irq_handler,
- SA_SHIRQ,
+ IRQF_SHARED,
iminor(can_os->inode) ? CAN_PROC_1 : CAN_PROC_0,
&(g_can_os[iminor(can_os->inode)])
);
--- a/Embedded/src/EDMA/dma_linux.c
+++ b/Embedded/src/EDMA/dma_linux.c
@@ -367,7 +367,7 @@ int32_t edma_resume(struct pci_dev *dev)
return -ENODEV;
}
- if (request_irq(dev->irq, &edma_irq_handler, SA_SHIRQ,
+ if (request_irq(dev->irq, &edma_irq_handler, IRQF_SHARED,
g_char_drvr_name, dev) )
{
@@ -829,7 +829,7 @@ int32_t edma_probe(struct pci_dev * dev,
/*
* Obtain a (shared) Interrupt Request (IRQ) Line from the OS.
*/
- if (request_irq(dev->irq, &edma_irq_handler, SA_SHIRQ,
+ if (request_irq(dev->irq, &edma_irq_handler, IRQF_SHARED,
g_char_drvr_name, dev) )
{
--- a/Embedded/src/WDT/iwdt.c
+++ b/Embedded/src/WDT/iwdt.c
@@ -1461,7 +1461,7 @@ static int __init wdt_init_one(struct pc
/* Request irq only if wdt_irq is other than 0 */
if (wdt_irq) {
- if (request_irq(wdt_irq, wdt_isr, SA_INTERRUPT | SA_SHIRQ,
+ if (request_irq(wdt_irq, wdt_isr, IRQF_DISABLED | IRQF_SHARED,
"iwdt", &wdt_miscdev)) {
printk("IRQ %d is not free.\n", wdt_irq);
return -EIO;

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@ -0,0 +1,56 @@
--- a/Embedded/src/GbE/iegbe_main.c
+++ b/Embedded/src/GbE/iegbe_main.c
@@ -724,6 +724,26 @@ static void iegbe_dump_eeprom(struct ieg
kfree(data);
}
+static const struct net_device_ops iegbe_netdev_ops = {
+ .ndo_open = iegbe_open,
+ .ndo_stop = iegbe_close,
+ .ndo_start_xmit = iegbe_xmit_frame,
+ .ndo_get_stats = iegbe_get_stats,
+ .ndo_set_rx_mode = iegbe_set_rx_mode,
+ .ndo_set_mac_address = iegbe_set_mac,
+ .ndo_tx_timeout = iegbe_tx_timeout,
+ .ndo_change_mtu = iegbe_change_mtu,
+ .ndo_do_ioctl = iegbe_ioctl,
+ .ndo_validate_addr = eth_validate_addr,
+
+ .ndo_vlan_rx_register = iegbe_vlan_rx_register,
+ .ndo_vlan_rx_add_vid = iegbe_vlan_rx_add_vid,
+ .ndo_vlan_rx_kill_vid = iegbe_vlan_rx_kill_vid,
+#ifdef CONFIG_NET_POLL_CONTROLLER
+ .ndo_poll_controller = iegbe_netpoll,
+#endif
+};
+
/**
* iegbe_probe - Device Initialization Routine
* @pdev: PCI device information struct
@@ -800,24 +820,11 @@ static int __devinit iegbe_probe(struct
if (!hw->hw_addr)
goto err_ioremap;
- netdev->open = &iegbe_open;
- netdev->stop = &iegbe_close;
- netdev->hard_start_xmit = &iegbe_xmit_frame;
- netdev->get_stats = &iegbe_get_stats;
- netdev->set_rx_mode = &iegbe_set_rx_mode;
- netdev->set_mac_address = &iegbe_set_mac;
- netdev->change_mtu = &iegbe_change_mtu;
- netdev->do_ioctl = &iegbe_ioctl;
+ netdev->netdev_ops = &iegbe_netdev_ops;
set_ethtool_ops(netdev);
- netdev->tx_timeout = &iegbe_tx_timeout;
netdev->watchdog_timeo = 5 * HZ;
netif_napi_add(netdev, &adapter->napi, iegbe_clean, 64);
- netdev->vlan_rx_register = iegbe_vlan_rx_register;
- netdev->vlan_rx_add_vid = iegbe_vlan_rx_add_vid;
- netdev->vlan_rx_kill_vid = iegbe_vlan_rx_kill_vid;
-#ifdef CONFIG_NET_POLL_CONTROLLER
- netdev->poll_controller = iegbe_netpoll;
-#endif
+
strncpy(netdev->name, pci_name(pdev), sizeof(netdev->name) - 1);

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@ -0,0 +1,41 @@
--- a/Embedded/src/GbE/iegbe_main.c
+++ b/Embedded/src/GbE/iegbe_main.c
@@ -3465,12 +3465,12 @@ static irqreturn_t iegbe_intr_msi(int ir
printk("Critical error! ICR = 0x%x\n", icr);
return IRQ_HANDLED;
}
- if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
+ if (likely(napi_schedule_prep(&adapter->napi))) {
adapter->total_tx_bytes = 0;
adapter->total_tx_packets = 0;
adapter->total_rx_bytes = 0;
adapter->total_rx_packets = 0;
- __netif_rx_schedule(netdev, &adapter->napi);
+ __napi_schedule(&adapter->napi);
} else
iegbe_irq_enable(adapter);
@@ -3527,12 +3527,12 @@ iegbe_intr(int irq, void *data)
E1000_WRITE_REG(&adapter->hw, IMC, ~0);
E1000_WRITE_FLUSH(&adapter->hw);
}
- if (likely(netif_rx_schedule_prep(netdev, &adapter->napi))) {
+ if (likely(napi_schedule_prep(&adapter->napi))) {
adapter->total_tx_bytes = 0;
adapter->total_tx_packets = 0;
adapter->total_rx_bytes = 0;
adapter->total_rx_packets = 0;
- __netif_rx_schedule(netdev, &adapter->napi);
+ __napi_schedule(&adapter->napi);
} else
/* this really should not happen! if it does it is basically a
* bug, but not a hard error, so enable ints and continue */
@@ -3574,7 +3574,7 @@ static int iegbe_clean(struct napi_struc
if (work_done < budget) {
if (likely(adapter->itr_setting & 3))
iegbe_set_itr(adapter);
- netif_rx_complete(poll_dev, napi);
+ napi_complete(napi);
iegbe_irq_enable(adapter);
}

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@ -0,0 +1,103 @@
--- a/Embedded/src/GbE/iegbe.h
+++ b/Embedded/src/GbE/iegbe.h
@@ -316,7 +316,6 @@ struct iegbe_adapter {
int cleaned_count);
struct iegbe_rx_ring *rx_ring; /* One per active queue */
struct napi_struct napi;
- struct net_device *polling_netdev; /* One per active queue */
int num_tx_queues;
int num_rx_queues;
--- a/Embedded/src/GbE/iegbe_main.c
+++ b/Embedded/src/GbE/iegbe_main.c
@@ -763,7 +763,7 @@ static int __devinit iegbe_probe(struct
struct iegbe_hw *hw;
static int cards_found = 0;
- int i, err, pci_using_dac;
+ int err, pci_using_dac;
u16 eeprom_data = 0;
u16 eeprom_apme_mask = E1000_EEPROM_APME;
int bars;
@@ -984,11 +984,8 @@ err_eeprom:
iegbe_phy_hw_reset(hw);
if (hw->flash_address)
iounmap(hw->flash_address);
- for (i = 0; i < adapter->num_rx_queues; i++)
- dev_put(&adapter->polling_netdev[i]);
kfree(adapter->tx_ring);
kfree(adapter->rx_ring);
- kfree(adapter->polling_netdev);
err_sw_init:
iounmap(hw->hw_addr);
err_ioremap:
@@ -1017,7 +1014,6 @@ iegbe_remove(struct pci_dev *pdev)
struct net_device *netdev = pci_get_drvdata(pdev);
struct iegbe_adapter *adapter = netdev_priv(netdev);
uint32_t manc;
- int i;
if(adapter->hw.mac_type >= iegbe_82540
&& adapter->hw.mac_type != iegbe_icp_xxxx
@@ -1030,15 +1026,11 @@ iegbe_remove(struct pci_dev *pdev)
}
unregister_netdev(netdev);
- for (i = 0x0; i < adapter->num_rx_queues; i++)
- dev_put(&adapter->polling_netdev[i]);
-
if(!iegbe_check_phy_reset_block(&adapter->hw)) {
iegbe_phy_hw_reset(&adapter->hw);
}
kfree(adapter->tx_ring);
kfree(adapter->rx_ring);
- kfree(adapter->polling_netdev);
iounmap(adapter->hw.hw_addr);
pci_release_regions(pdev);
@@ -1061,7 +1053,6 @@ iegbe_sw_init(struct iegbe_adapter *adap
struct iegbe_hw *hw = &adapter->hw;
struct net_device *netdev = adapter->netdev;
struct pci_dev *pdev = adapter->pdev;
- int i;
/* PCI config space info */
@@ -1111,11 +1102,6 @@ iegbe_sw_init(struct iegbe_adapter *adap
return -ENOMEM;
}
- for (i = 0; i < adapter->num_rx_queues; i++) {
- adapter->polling_netdev[i].priv = adapter;
- dev_hold(&adapter->polling_netdev[i]);
- set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
- }
spin_lock_init(&adapter->tx_queue_lock);
/*
@@ -1137,8 +1123,7 @@ iegbe_sw_init(struct iegbe_adapter *adap
* @adapter: board private structure to initialize
*
* We allocate one ring per queue at run-time since we don't know the
- * number of queues at compile-time. The polling_netdev array is
- * intended for Multiqueue, but should work fine with a single queue.
+ * number of queues at compile-time.
**/
static int __devinit
@@ -1158,15 +1143,6 @@ iegbe_alloc_queues(struct iegbe_adapter
return -ENOMEM;
}
- adapter->polling_netdev = kcalloc(adapter->num_rx_queues,
- sizeof(struct net_device),
- GFP_KERNEL);
- if (!adapter->polling_netdev) {
- kfree(adapter->tx_ring);
- kfree(adapter->rx_ring);
- return -ENOMEM;
- }
-
return E1000_SUCCESS;
}

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@ -0,0 +1,60 @@
--- a/Embedded/src/GbE/iegbe_main.c
+++ b/Embedded/src/GbE/iegbe_main.c
@@ -2161,7 +2161,8 @@ static void iegbe_set_rx_mode(struct net
{
struct iegbe_adapter *adapter = netdev_priv(netdev);
struct iegbe_hw *hw = &adapter->hw;
- struct dev_addr_list *uc_ptr;
+ struct netdev_hw_addr *ha;
+ bool use_uc = false;
struct dev_addr_list *mc_ptr;
u32 rctl;
u32 hash_value;
@@ -2187,12 +2188,11 @@ int mta_reg_count = E1000_NUM_MTA_REGIST
}
}
- uc_ptr = NULL;
if (netdev->uc_count > rar_entries - 1) {
rctl |= E1000_RCTL_UPE;
} else if (!(netdev->flags & IFF_PROMISC)) {
rctl &= ~E1000_RCTL_UPE;
- uc_ptr = netdev->uc_list;
+ use_uc = true;
}
E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
@@ -2210,13 +2210,20 @@ int mta_reg_count = E1000_NUM_MTA_REGIST
* if there are not 14 addresses, go ahead and clear the filters
* -- with 82571 controllers only 0-13 entries are filled here
*/
+ i = 1;
+ if (use_uc)
+ list_for_each_entry(ha, &netdev->uc_list, list) {
+ if (i == rar_entries)
+ break;
+ iegbe_rar_set(hw, ha->addr, i++);
+ }
+
+ WARN_ON(i == rar_entries);
+
mc_ptr = netdev->mc_list;
- for (i = 1; i < rar_entries; i++) {
- if (uc_ptr) {
- iegbe_rar_set(hw, uc_ptr->da_addr, i);
- uc_ptr = uc_ptr->next;
- } else if (mc_ptr) {
+ for (; i < rar_entries; i++) {
+ if (mc_ptr) {
iegbe_rar_set(hw, mc_ptr->da_addr, i);
mc_ptr = mc_ptr->next;
} else {
@@ -2226,7 +2233,6 @@ int mta_reg_count = E1000_NUM_MTA_REGIST
E1000_WRITE_FLUSH(&adapter->hw);
}
}
- WARN_ON(uc_ptr != NULL);
/* clear the old settings from the multicast hash table */

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@ -0,0 +1,20 @@
--- a/Embedded/src/GbE/iegbe_main.c
+++ b/Embedded/src/GbE/iegbe_main.c
@@ -2188,7 +2188,7 @@ int mta_reg_count = E1000_NUM_MTA_REGIST
}
}
- if (netdev->uc_count > rar_entries - 1) {
+ if (netdev->uc.count > rar_entries - 1) {
rctl |= E1000_RCTL_UPE;
} else if (!(netdev->flags & IFF_PROMISC)) {
rctl &= ~E1000_RCTL_UPE;
@@ -2212,7 +2212,7 @@ int mta_reg_count = E1000_NUM_MTA_REGIST
*/
i = 1;
if (use_uc)
- list_for_each_entry(ha, &netdev->uc_list, list) {
+ list_for_each_entry(ha, &netdev->uc.list, list) {
if (i == rar_entries)
break;
iegbe_rar_set(hw, ha->addr, i++);

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@ -0,0 +1,20 @@
--- a/Embedded/src/GbE/iegbe_main.c
+++ b/Embedded/src/GbE/iegbe_main.c
@@ -775,13 +775,13 @@ static int __devinit iegbe_probe(struct
if (err)
return err;
- if (!pci_set_dma_mask(pdev, DMA_64BIT_MASK) &&
- !pci_set_consistent_dma_mask(pdev, DMA_64BIT_MASK)) {
+ if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) &&
+ !pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64))) {
pci_using_dac = 1;
} else {
- err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
+ err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
if (err) {
- err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
+ err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
if (err) {
E1000_ERR("No usable DMA configuration, "
"aborting\n");

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@ -0,0 +1,12 @@
--- a/Embedded/src/GbE/iegbe_ethtool.c
+++ b/Embedded/src/GbE/iegbe_ethtool.c
@@ -944,7 +944,8 @@ iegbe_intr_test(struct iegbe_adapter *ad
*data = 0;
/* Hook up test interrupt handler just for this test */
- if(!request_irq(irq, &iegbe_test_intr, 0, netdev->name, netdev)) {
+ if(!request_irq(irq, &iegbe_test_intr, IRQF_PROBE_SHARED, netdev->name,
+ netdev)) {
shared_int = FALSE;
} else if(request_irq(irq, &iegbe_test_intr, IRQF_SHARED,
netdev->name, netdev)){

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@ -0,0 +1,747 @@
--- a/Embedded/src/GbE/iegbe_oem_phy.c
+++ b/Embedded/src/GbE/iegbe_oem_phy.c
@@ -65,6 +65,10 @@ static int32_t iegbe_oem_link_m88_setup(
static int32_t iegbe_oem_set_phy_mode(struct iegbe_hw *hw);
static int32_t iegbe_oem_detect_phy(struct iegbe_hw *hw);
+static int32_t iegbe_oem_link_bcm5481_setup(struct iegbe_hw *hw);
+static int32_t bcm5481_read_18sv (struct iegbe_hw *hw, int sv, uint16_t *data);
+static int32_t oi_phy_setup (struct iegbe_hw *hw);
+
/**
* iegbe_oem_setup_link
* @hw: iegbe_hw struct containing device specific information
@@ -114,6 +118,10 @@ iegbe_oem_setup_link(struct iegbe_hw *hw
}
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ return E1000_SUCCESS;
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
ret_val = iegbe_oem_link_m88_setup(hw);
@@ -121,6 +129,12 @@ iegbe_oem_setup_link(struct iegbe_hw *hw
return ret_val;
}
break;
+ case BCM5481_PHY_ID:
+ ret_val = iegbe_oem_link_bcm5481_setup(hw);
+ if(ret_val) {
+ return ret_val;
+ }
+ break;
default:
DEBUGOUT("Invalid PHY ID\n");
return -E1000_ERR_PHY_TYPE;
@@ -179,6 +193,51 @@ iegbe_oem_setup_link(struct iegbe_hw *hw
#endif /* ifdef EXTERNAL_MDIO */
}
+/**
+ * iegbe_oem_link_bcm5481_setup
+ * @hw: iegbe_hw struct containing device specific information
+ *
+ * Returns E1000_SUCCESS, negative E1000 error code on failure
+ *
+ * copied verbatim from iegbe_oem_link_m88_setup
+ **/
+static int32_t
+iegbe_oem_link_bcm5481_setup(struct iegbe_hw *hw)
+{
+ int32_t ret_val;
+ uint16_t phy_data;
+
+ //DEBUGFUNC(__func__);
+
+ if(!hw)
+ return -1;
+
+ /* phy_reset_disable is set in iegbe_oem_set_phy_mode */
+ if(hw->phy_reset_disable)
+ return E1000_SUCCESS;
+
+ // Enable MDIX in extended control reg.
+ ret_val = iegbe_oem_read_phy_reg_ex(hw, BCM5481_ECTRL, &phy_data);
+ if(ret_val)
+ {
+ DEBUGOUT("Unable to read BCM5481_ECTRL register\n");
+ return ret_val;
+ }
+
+ phy_data &= ~BCM5481_ECTRL_DISMDIX;
+ ret_val = iegbe_oem_write_phy_reg_ex(hw, BCM5481_ECTRL, phy_data);
+ if(ret_val)
+ {
+ DEBUGOUT("Unable to write BCM5481_ECTRL register\n");
+ return ret_val;
+ }
+
+ ret_val = oi_phy_setup (hw);
+ if (ret_val)
+ return ret_val;
+
+ return E1000_SUCCESS;
+}
/**
* iegbe_oem_link_m88_setup
@@ -340,6 +399,11 @@ iegbe_oem_force_mdi(struct iegbe_hw *hw,
* see iegbe_phy_force_speed_duplex, which does the following for M88
*/
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ case BCM5481_PHY_ID:
+ DEBUGOUT("WARNING: An empty iegbe_oem_force_mdi() has been called!\n");
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
ret_val = iegbe_oem_read_phy_reg_ex(hw,
@@ -415,6 +479,8 @@ iegbe_oem_phy_reset_dsp(struct iegbe_hw
switch (hw->phy_id) {
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
+ case BCM5481_PHY_ID:
+ case BCM5395S_PHY_ID:
DEBUGOUT("No DSP to reset on OEM PHY\n");
break;
default:
@@ -460,6 +526,11 @@ iegbe_oem_cleanup_after_phy_reset(struct
* see iegbe_phy_force_speed_duplex, which does the following for M88
*/
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ case BCM5481_PHY_ID:
+ DEBUGOUT("WARNING: An empty iegbe_oem_cleanup_after_phy_reset() has been called!\n");
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
/*
@@ -573,6 +644,11 @@ iegbe_oem_set_phy_mode(struct iegbe_hw *
* use iegbe_set_phy_mode as example
*/
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ case BCM5481_PHY_ID:
+ DEBUGOUT("WARNING: An empty iegbe_oem_set_phy_mode() has been called!\n");
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
ret_val = iegbe_read_eeprom(hw,
@@ -641,6 +717,19 @@ iegbe_oem_detect_phy(struct iegbe_hw *hw
}
hw->phy_type = iegbe_phy_oem;
+{
+ // If MAC2 (BCM5395 switch), manually detect the phy
+ struct iegbe_adapter *adapter;
+ uint32_t device_number;
+ adapter = (struct iegbe_adapter *) hw->back;
+ device_number = PCI_SLOT(adapter->pdev->devfn);
+ if (device_number == ICP_XXXX_MAC_2) {
+ hw->phy_id = BCM5395S_PHY_ID;
+ hw->phy_revision = 0;
+ return E1000_SUCCESS;
+ }
+}
+
ret_val = iegbe_oem_read_phy_reg_ex(hw, PHY_ID1, &phy_id_high);
if(ret_val) {
DEBUGOUT("Unable to read PHY register PHY_ID1\n");
@@ -690,6 +779,8 @@ iegbe_oem_get_tipg(struct iegbe_hw *hw)
switch (hw->phy_id) {
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
+ case BCM5481_PHY_ID:
+ case BCM5395S_PHY_ID:
phy_num = DEFAULT_ICP_XXXX_TIPG_IPGT;
break;
default:
@@ -738,6 +829,8 @@ iegbe_oem_phy_is_copper(struct iegbe_hw
switch (hw->phy_id) {
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
+ case BCM5481_PHY_ID:
+ case BCM5395S_PHY_ID:
isCopper = TRUE;
break;
default:
@@ -796,13 +889,13 @@ iegbe_oem_get_phy_dev_number(struct iegb
switch(device_number)
{
case ICP_XXXX_MAC_0:
- hw->phy_addr = 0x00;
+ hw->phy_addr = 0x01;
break;
case ICP_XXXX_MAC_1:
- hw->phy_addr = 0x01;
+ hw->phy_addr = 0x02;
break;
case ICP_XXXX_MAC_2:
- hw->phy_addr = 0x02;
+ hw->phy_addr = 0x00;
break;
default: hw->phy_addr = 0x00;
}
@@ -851,6 +944,12 @@ iegbe_oem_mii_ioctl(struct iegbe_adapter
if(!adapter || !ifr) {
return -1;
}
+
+ // If MAC2 (BCM5395 switch) then leave now
+ if ((PCI_SLOT(adapter->pdev->devfn)) == ICP_XXXX_MAC_2) {
+ return -1;
+ }
+
switch (data->reg_num) {
case PHY_CTRL:
if(mii_reg & MII_CR_POWER_DOWN) {
@@ -987,6 +1086,11 @@ void iegbe_oem_get_phy_regs(struct iegbe
* [10] = mdix mode
*/
switch (adapter->hw.phy_id) {
+ case BCM5395S_PHY_ID:
+ case BCM5481_PHY_ID:
+ DEBUGOUT("WARNING: An empty iegbe_oem_get_phy_regs() has been called!\n");
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
if(corrected_len > 0) {
@@ -1068,8 +1172,13 @@ iegbe_oem_phy_loopback(struct iegbe_adap
* Loopback configuration is the same for each of the supported PHYs.
*/
switch (adapter->hw.phy_id) {
+ case BCM5395S_PHY_ID:
+ DEBUGOUT("WARNING: An empty iegbe_oem_phy_loopback() has been called!\n");
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
+ case BCM5481_PHY_ID:
adapter->hw.autoneg = FALSE;
@@ -1182,8 +1291,14 @@ iegbe_oem_loopback_cleanup(struct iegbe_
}
switch (adapter->hw.phy_id) {
+ case BCM5395S_PHY_ID:
+ DEBUGOUT("WARNING: An empty iegbe_oem_loopback_cleanup() has been called!\n");
+ return;
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
+ case BCM5481_PHY_ID:
default:
adapter->hw.autoneg = TRUE;
@@ -1243,6 +1358,11 @@ iegbe_oem_phy_speed_downgraded(struct ie
*/
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ case BCM5481_PHY_ID:
+ *isDowngraded = 0;
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
ret_val = iegbe_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS,
@@ -1305,6 +1425,11 @@ iegbe_oem_check_polarity(struct iegbe_hw
*/
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ case BCM5481_PHY_ID:
+ *polarity = 0;
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
/* return the Polarity bit in the Status register. */
@@ -1367,6 +1492,25 @@ iegbe_oem_phy_is_full_duplex(struct iegb
*/
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ /* Always full duplex */
+ *isFD = 1;
+ break;
+
+ case BCM5481_PHY_ID:
+ ret_val = iegbe_read_phy_reg(hw, BCM5481_ASTAT, &phy_data);
+ if(ret_val) return ret_val;
+
+ switch (BCM5481_ASTAT_HCD(phy_data)) {
+ case BCM5481_ASTAT_1KBTFD:
+ case BCM5481_ASTAT_100BTXFD:
+ *isFD = 1;
+ break;
+ default:
+ *isFD = 0;
+ }
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
ret_val = iegbe_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS,
@@ -1423,6 +1567,25 @@ iegbe_oem_phy_is_speed_1000(struct iegbe
*/
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ /* Always 1000mb */
+ *is1000 = 1;
+ break;
+
+ case BCM5481_PHY_ID:
+ ret_val = iegbe_read_phy_reg(hw, BCM5481_ASTAT, &phy_data);
+ if(ret_val) return ret_val;
+
+ switch (BCM5481_ASTAT_HCD(phy_data)) {
+ case BCM5481_ASTAT_1KBTFD:
+ case BCM5481_ASTAT_1KBTHD:
+ *is1000 = 1;
+ break;
+ default:
+ *is1000 = 0;
+ }
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
ret_val = iegbe_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS,
@@ -1478,6 +1641,25 @@ iegbe_oem_phy_is_speed_100(struct iegbe_
* see iegbe_config_mac_to_phy
*/
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ /* Always 1000Mb, never 100mb */
+ *is100 = 0;
+ break;
+
+ case BCM5481_PHY_ID:
+ ret_val = iegbe_read_phy_reg(hw, BCM5481_ASTAT, &phy_data);
+ if(ret_val) return ret_val;
+
+ switch (BCM5481_ASTAT_HCD(phy_data)) {
+ case BCM5481_ASTAT_100BTXFD:
+ case BCM5481_ASTAT_100BTXHD:
+ *is100 = 1;
+ break;
+ default:
+ *is100 = 0;
+ }
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
ret_val = iegbe_oem_read_phy_reg_ex(hw,
@@ -1535,6 +1717,11 @@ iegbe_oem_phy_get_info(struct iegbe_hw *
* see iegbe_phy_m88_get_info
*/
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ case BCM5481_PHY_ID:
+ DEBUGOUT("WARNING: An empty iegbe_oem_phy_get_info() has been called!\n");
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
/* The downshift status is checked only once, after link is
@@ -1636,8 +1823,13 @@ iegbe_oem_phy_hw_reset(struct iegbe_hw *
* the M88 used in truxton.
*/
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ DEBUGOUT("WARNING: An empty iegbe_oem_phy_hw_reset() has been called!\n");
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
+ case BCM5481_PHY_ID:
ret_val = iegbe_oem_read_phy_reg_ex(hw, PHY_CTRL, &phy_data);
if(ret_val) {
DEBUGOUT("Unable to read register PHY_CTRL\n");
@@ -1699,6 +1891,8 @@ iegbe_oem_phy_init_script(struct iegbe_h
switch (hw->phy_id) {
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
+ case BCM5481_PHY_ID:
+ case BCM5395S_PHY_ID:
DEBUGOUT("Nothing to do for OEM PHY Init");
break;
default:
@@ -1735,6 +1929,11 @@ iegbe_oem_read_phy_reg_ex(struct iegbe_h
return -1;
}
+ if (hw->phy_id == BCM5395S_PHY_ID) {
+ DEBUGOUT("WARNING: iegbe_oem_read_phy_reg_ex() has been unexpectedly called!\n");
+ return -1;
+ }
+
/* call the GCU func that will read the phy
*
* Make note that the M88 phy is what'll be used on Truxton.
@@ -1782,6 +1981,11 @@ iegbe_oem_set_trans_gasket(struct iegbe_
}
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ case BCM5481_PHY_ID:
+ DEBUGOUT("WARNING: An empty iegbe_oem_set_trans_gasket() has been called!\n");
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
/* Gasket set correctly for Marvell Phys, so nothing to do */
@@ -1886,6 +2090,8 @@ iegbe_oem_phy_needs_reset_with_mac(struc
switch (hw->phy_id) {
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
+ case BCM5481_PHY_ID:
+ case BCM5395S_PHY_ID:
ret_val = FALSE;
break;
default:
@@ -1935,6 +2141,8 @@ iegbe_oem_config_dsp_after_link_change(s
switch (hw->phy_id) {
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
+ case BCM5481_PHY_ID:
+ case BCM5395S_PHY_ID:
DEBUGOUT("No DSP to configure on OEM PHY");
break;
default:
@@ -1978,6 +2186,12 @@ iegbe_oem_get_cable_length(struct iegbe_
}
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ case BCM5481_PHY_ID:
+ *min_length = 0;
+ *max_length = iegbe_igp_cable_length_150;
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
ret_val = iegbe_oem_read_phy_reg_ex(hw,
@@ -2061,6 +2275,23 @@ iegbe_oem_phy_is_link_up(struct iegbe_hw
*/
switch (hw->phy_id) {
+ case BCM5395S_PHY_ID:
+ /* Link always up */
+ *isUp = TRUE;
+ return E1000_SUCCESS;
+ break;
+
+ case BCM5481_PHY_ID:
+ iegbe_oem_read_phy_reg_ex(hw, BCM5481_ESTAT, &phy_data);
+ ret_val = iegbe_oem_read_phy_reg_ex(hw, BCM5481_ESTAT, &phy_data);
+ if(ret_val)
+ {
+ DEBUGOUT("Unable to read PHY register BCM5481_ESTAT\n");
+ return ret_val;
+ }
+ statusMask = BCM5481_ESTAT_LINK;
+ break;
+
case M88E1000_I_PHY_ID:
case M88E1141_E_PHY_ID:
iegbe_oem_read_phy_reg_ex(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
@@ -2092,3 +2323,210 @@ iegbe_oem_phy_is_link_up(struct iegbe_hw
#endif /* ifdef EXTERNAL_MDIO */
}
+
+
+//-----
+// Read BCM5481 expansion register
+//
+int32_t
+bcm5481_read_ex (struct iegbe_hw *hw, uint16_t reg, uint16_t *data)
+{
+ int ret;
+ uint16_t selector;
+ uint16_t reg_data;
+
+ // Get the current value of bits 15:12
+ ret = iegbe_oem_read_phy_reg_ex (hw, 0x15, &selector);
+ if (ret)
+ return ret;
+
+ // Select the expansion register
+ selector &= 0xf000;
+ selector |= (0xf << 8) | (reg);
+ iegbe_oem_write_phy_reg_ex (hw, 0x17, selector);
+
+ // Read the expansion register
+ ret = iegbe_oem_read_phy_reg_ex (hw, 0x15, &reg_data);
+
+ // De-select the expansion registers.
+ selector &= 0xf000;
+ iegbe_oem_write_phy_reg_ex (hw, 0x17, selector);
+
+ if (ret)
+ return ret;
+
+ *data = reg_data;
+ return ret;
+}
+
+//-----
+// Read reg 0x18 sub-register
+//
+static int32_t
+bcm5481_read_18sv (struct iegbe_hw *hw, int sv, uint16_t *data)
+{
+ int ret;
+ uint16_t tmp_data;
+
+ // Select reg 0x18, sv
+ tmp_data = ((sv & BCM5481_R18H_SV_MASK) << 12) | BCM5481_R18H_SV_MCTRL;
+ ret = iegbe_oem_write_phy_reg_ex (hw, BCM5481_R18H, tmp_data);
+ if(ret)
+ return ret;
+
+ // Read reg 0x18, sv
+ ret = iegbe_oem_read_phy_reg_ex (hw, BCM5481_R18H, &tmp_data);
+ if(ret)
+ return ret;
+
+ *data = tmp_data;
+ return ret;
+}
+
+//-----
+// Read reg 0x1C sub-register
+//
+int32_t
+bcm5481_read_1csv (struct iegbe_hw *hw, int sv, uint16_t *data)
+{
+ int ret;
+ uint16_t tmp_data;
+
+ // Select reg 0x1c, sv
+ tmp_data = ((sv & BCM5481_R1CH_SV_MASK) << BCM5481_R1CH_SV_SHIFT);
+
+ ret = iegbe_oem_write_phy_reg_ex (hw, BCM5481_R1CH, tmp_data);
+ if(ret)
+ return ret;
+
+ // Read reg 0x1c, sv
+ ret = iegbe_oem_read_phy_reg_ex (hw, BCM5481_R1CH, &tmp_data);
+ if(ret)
+ return ret;
+
+ *data = tmp_data;
+ return ret;
+}
+
+//-----
+// Read-modify-write a 0x1C register.
+//
+// hw - hardware access info.
+// reg - 0x1C register to modify.
+// data - bits which should be set.
+// mask - the '1' bits in this argument will be cleared in the data
+// read from 'reg' then 'data' will be or'd in and the result
+// will be written to 'reg'.
+
+int32_t
+bcm5481_rmw_1csv (struct iegbe_hw *hw, uint16_t reg, uint16_t data, uint16_t mask)
+{
+ int32_t ret;
+ uint16_t reg_data;
+
+ ret = 0;
+
+ ret = bcm5481_read_1csv (hw, reg, &reg_data);
+ if (ret)
+ {
+ DEBUGOUT("Unable to read BCM5481 1CH register\n");
+ printk (KERN_ERR "Unable to read BCM5481 1CH register [0x%x]\n", reg);
+ return ret;
+ }
+
+ reg_data &= ~mask;
+ reg_data |= (BCM5481_R1CH_WE | data);
+
+ ret = iegbe_oem_write_phy_reg_ex (hw, BCM5481_R1CH, reg_data);
+ if(ret)
+ {
+ DEBUGOUT("Unable to write BCM5481 1CH register\n");
+ printk (KERN_ERR "Unable to write BCM5481 1CH register\n");
+ return ret;
+ }
+
+ return ret;
+}
+
+int32_t
+oi_phy_setup (struct iegbe_hw *hw)
+{
+ int ret;
+ uint16_t pmii_data;
+ uint16_t mctrl_data;
+ uint16_t cacr_data;
+
+ ret = 0;
+
+ // Set low power mode via reg 0x18, sv010, bit 6
+ // Do a read-modify-write on reg 0x18, sv010 register to preserve existing bits.
+ ret = bcm5481_read_18sv (hw, BCM5481_R18H_SV_PMII, &pmii_data);
+ if (ret)
+ {
+ DEBUGOUT("Unable to read BCM5481_R18H_SV_PMII register\n");
+ printk (KERN_ERR "Unable to read BCM5481_R18H_SV_PMII register\n");
+ return ret;
+ }
+
+ // Set the LPM bit in the data just read and write back to sv010
+ // The shadow register select bits [2:0] are set by reading the sv010
+ // register.
+ pmii_data |= BCM5481_R18H_SV010_LPM;
+ ret = iegbe_oem_write_phy_reg_ex (hw, BCM5481_R18H, pmii_data);
+ if(ret)
+ {
+ DEBUGOUT("Unable to write BCM5481_R18H register\n");
+ printk (KERN_ERR "Unable to write BCM5481_R18H register\n");
+ return ret;
+ }
+
+
+ // Set the RGMII RXD to RXC skew bit in reg 0x18, sv111
+
+ if (bcm5481_read_18sv (hw, BCM5481_R18H_SV_MCTRL, &mctrl_data))
+ {
+ DEBUGOUT("Unable to read BCM5481_R18H_SV_MCTRL register\n");
+ printk (KERN_ERR "Unable to read BCM5481_R18H_SV_MCTRL register\n");
+ return ret;
+ }
+ mctrl_data |= (BCM5481_R18H_WE | BCM5481_R18H_SV111_SKEW);
+
+ ret = iegbe_oem_write_phy_reg_ex (hw, BCM5481_R18H, mctrl_data);
+ if(ret)
+ {
+ DEBUGOUT("Unable to write BCM5481_R18H register\n");
+ printk (KERN_ERR "Unable to write BCM5481_R18H register\n");
+ return ret;
+ }
+
+ // Enable RGMII transmit clock delay in reg 0x1c, sv00011
+ ret = bcm5481_read_1csv (hw, BCM5481_R1CH_CACR, &cacr_data);
+ if (ret)
+ {
+ DEBUGOUT("Unable to read BCM5481_R1CH_CACR register\n");
+ printk (KERN_ERR "Unable to read BCM5481_R1CH_CACR register\n");
+ return ret;
+ }
+
+ cacr_data |= (BCM5481_R1CH_WE | BCM5481_R1CH_CACR_TCD);
+
+ ret = iegbe_oem_write_phy_reg_ex (hw, BCM5481_R1CH, cacr_data);
+ if(ret)
+ {
+ DEBUGOUT("Unable to write BCM5481_R1CH register\n");
+ printk (KERN_ERR "Unable to write BCM5481_R1CH register\n");
+ return ret;
+ }
+
+ // Enable dual link speed indication (0x1c, sv 00010, bit 2)
+ ret = bcm5481_rmw_1csv (hw, BCM5481_R1CH_SC1, BCM5481_R1CH_SC1_LINK, BCM5481_R1CH_SC1_LINK);
+ if (ret)
+ return ret;
+
+ // Enable link and activity on ACTIVITY LED (0x1c, sv 01001, bit 4=1, bit 3=0)
+ ret = bcm5481_rmw_1csv (hw, BCM5481_R1CH_LCTRL, BCM5481_R1CH_LCTRL_ALEN, BCM5481_R1CH_LCTRL_ALEN | BCM5481_R1CH_LCTRL_AEN);
+ if (ret)
+ return ret;
+
+ return ret;
+}
--- a/Embedded/src/GbE/iegbe_oem_phy.h
+++ b/Embedded/src/GbE/iegbe_oem_phy.h
@@ -95,6 +95,8 @@ int32_t iegbe_oem_phy_is_link_up(struct
#define DEFAULT_ICP_XXXX_TIPG_IPGT 8 /* Inter Packet Gap Transmit Time */
#define ICP_XXXX_TIPG_IPGT_MASK 0x000003FFUL
+#define BCM5481_PHY_ID 0x0143BCA0
+#define BCM5395S_PHY_ID 0x0143BCF0
/* Miscellaneous defines */
#ifdef IEGBE_10_100_ONLY
@@ -103,5 +105,65 @@ int32_t iegbe_oem_phy_is_link_up(struct
#define ICP_XXXX_AUTONEG_ADV_DEFAULT 0x2F
#endif
+/* BCM5481 specifics */
+
+#define BCM5481_ECTRL (0x10)
+#define BCM5481_ESTAT (0x11)
+#define BCM5481_RXERR (0x12)
+#define BCM5481_EXPRW (0x15)
+#define BCM5481_EXPACC (0x17)
+#define BCM5481_ASTAT (0x19)
+#define BCM5481_R18H (0x18)
+#define BCM5481_R1CH (0x1c)
+
+/* indirect register access via register 18h */
+
+#define BCM5481_R18H_SV_MASK (7) // Mask for SV bits.
+#define BCM5481_R18H_SV_ACTRL (0) // SV000 Aux. control
+#define BCM5481_R18H_SV_10BT (1) // SV001 10Base-T
+#define BCM5481_R18H_SV_PMII (2) // SV010 Power/MII control
+#define BCM5481_R18H_SV_MTEST (4) // SV100 Misc. test
+#define BCM5481_R18H_SV_MCTRL (7) // SV111 Misc. control
+
+#define BCM5481_R18H_SV001_POL (1 << 13) // Polarity
+#define BCM5481_R18H_SV010_LPM (1 << 6)
+#define BCM5481_R18H_SV111_SKEW (1 << 8)
+#define BCM5481_R18H_WE (1 << 15) // Write enable
+
+// 0x1c registers
+#define BCM5481_R1CH_SV_SHIFT (10)
+#define BCM5481_R1CH_SV_MASK (0x1f)
+#define BCM5481_R1CH_SC1 (0x02) // sv00010 Spare control 1
+#define BCM5481_R1CH_CACR (0x03) // sv00011 Clock alignment control
+#define BCM5481_R1CH_LCTRL (0x09) // sv01001 LED control
+#define BCM5481_R1CH_LEDS1 (0x0d) // sv01101 LED selector 1
+
+// 0x1c common
+#define BCM5481_R1CH_WE (1 << 15) // Write enable
+
+// 0x1c, sv 00010
+#define BCM5481_R1CH_SC1_LINK (1 << 2) // sv00010 Linkspeed
+
+// 0x1c, sv 00011
+#define BCM5481_R1CH_CACR_TCD (1 << 9) // sv00011 RGMII tx clock delay
+
+// 0x1c, sv 01001
+#define BCM5481_R1CH_LCTRL_ALEN (1 << 4) // Activity/Link enable on ACTIVITY LED
+#define BCM5481_R1CH_LCTRL_AEN (1 << 3) // Activity enable on ACTIVITY LED
+
+#define BCM5481_ECTRL_DISMDIX (1 <<14)
+
+#define BCM5481_MCTRL_AUTOMDIX (1 <<9)
+
+#define BCM5481_ESTAT_LINK (1 << 8)
+
+#define BCM5481_ASTAT_ANC (1 << 15)
+#define BCM5481_ASTAT_ANHCD (7 << 8)
+#define BCM5481_ASTAT_HCD(x) ((x >> 8) & 7)
+#define BCM5481_ASTAT_1KBTFD (0x7)
+#define BCM5481_ASTAT_1KBTHD (0x6)
+#define BCM5481_ASTAT_100BTXFD (0x5)
+#define BCM5481_ASTAT_100BTXHD (0x3)
+
#endif /* ifndef _IEGBE_OEM_PHY_H_ */

View File

@ -0,0 +1,11 @@
--- a/Embedded/src/CAN/icp_can_user.h
+++ b/Embedded/src/CAN/icp_can_user.h
@@ -63,6 +63,8 @@
#ifndef __ICP_CAN_USER_H__
#define __ICP_CAN_USER_H__
+#include <linux/ioctl.h>
+
/*****************************************************************************
* Device IO control codes.
*****************************************************************************/

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@ -0,0 +1,11 @@
--- a/Embedded/src/CAN/can_main.c
+++ b/Embedded/src/CAN/can_main.c
@@ -70,6 +70,8 @@
#include "can_main.h"
#include "can_ioctl.h"
+#include <linux/fs.h>
+
MODULE_AUTHOR("Intel(R) Corporation");
MODULE_DESCRIPTION("Controller Area Network Driver");

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@ -0,0 +1,23 @@
--- a/Embedded/src/CAN/can_main.c
+++ b/Embedded/src/CAN/can_main.c
@@ -654,7 +654,7 @@ int can_dev_io(struct inode *inode, stru
/*****************************************************************************
* Interrupt handler.
*****************************************************************************/
-irqreturn_t can_irq_handler(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t can_irq_handler(int irq, void *dev_id)
{
can_os_t *can_os = (can_os_t *) dev_id;
unsigned int int_status;
--- a/Embedded/src/CAN/can_main.h
+++ b/Embedded/src/CAN/can_main.h
@@ -165,8 +165,7 @@ int can_dev_io(
irqreturn_t can_irq_handler(
int irq,
- void *dev_id,
- struct pt_regs *regs);
+ void *dev_id);
void can_tasklet(
unsigned long arg

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@ -0,0 +1,41 @@
diff -Nur a/Embedded/src/CAN/can_main.c b/Embedded/src/CAN/can_main.c
--- a/Embedded/src/CAN/can_main.c 2009-11-30 10:44:39.044269751 +0100
+++ b/Embedded/src/CAN/can_main.c 2009-11-30 10:54:41.434355642 +0100
@@ -213,8 +213,8 @@
spin_lock_init(&(g_can_os[can_num].int_spinlock));
spin_lock_init(&(g_can_os[can_num].open_spinlock));
- dev->dev.driver_data = (void *) &(g_can_os[can_num]);
- if (!dev->dev.driver_data)
+ dev_set_drvdata(&dev->dev, (void *) &(g_can_os[can_num]));
+ if (!dev_get_drvdata(&dev->dev))
{
printk("Couldn't create CAN device %d. Exiting.\n",
dev->device);
@@ -236,7 +236,7 @@
*****************************************************************************/
void can_pci_remove(struct pci_dev *dev)
{
- can_os_t *can_os = dev->dev.driver_data;
+ can_os_t *can_os = dev_get_drvdata(&dev->dev);
iounmap(can_os->pci_remap);
icp_can_destroy(can_os->can);
@@ -250,7 +250,7 @@
{
unsigned int i;
unsigned int int_status;
- can_os_t *can_os = dev->dev.driver_data;
+ can_os_t *can_os = dev_get_drvdata(&dev->dev);
int err;
/* Indicate that we are suspending */
@@ -321,7 +321,7 @@
int can_pci_resume(struct pci_dev *dev)
{
unsigned int i;
- can_os_t *can_os = dev->dev.driver_data;
+ can_os_t *can_os = dev_get_drvdata(&dev->dev);
/* Restore PCI CFG space */
pci_restore_state(dev);

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@ -0,0 +1,59 @@
--- a/Embedded/src/WDT/iwdt.c
+++ b/Embedded/src/WDT/iwdt.c
@@ -180,19 +180,19 @@ MODULE_PARM_DESC(wdt_scale, "Intel WDT s
module_param(wdt_intr_type, byte, WDT_INT_TYPE_IRQ);
MODULE_PARM_DESC(wdt_intr_type, "Intel WDT interrupt type (default SERIRQ).");
-module_param(wdt_margin1, uint, TIMER_MARGIN);
+module_param(wdt_margin1, uint, 0);
MODULE_PARM_DESC(wdt_margin1, "First stage Intel WDT timeout in steps of 1 ms by default.");
-module_param(wdt_margin2, uint, TIMER_MARGIN);
+module_param(wdt_margin2, uint, 0);
MODULE_PARM_DESC(wdt_margin2, "Second stage Intel WDT timeout in steps of 1 ms by default.");
module_param(nowayout, int, 0);
MODULE_PARM_DESC(nowayout, "Intel WDT can't be stopped once started (default=0)");
-module_param(wdt_index_port, int, 0x4E);
+module_param(wdt_index_port, int, 0);
MODULE_PARM_DESC(wdt_index_port, "WDT Index Port (default 0x4e)");
-module_param(wdt_data_port, int, 0x4E);
+module_param(wdt_data_port, int, 0);
MODULE_PARM_DESC(wdt_data_port, "WDT Data Port (default 0x4f)");
static int wdt_get_iobase(struct pci_dev *dev, u16 *iobase, int *irq);
@@ -218,7 +218,7 @@ static ssize_t wdt_write(struct file *fi
size_t count, loff_t * pos);
static int wdt_ioctl(struct inode *inode, struct file *file,
unsigned int cmd, unsigned long arg);
-static irqreturn_t wdt_isr(int irq, void *dev_id, struct pt_regs *regs);
+static irqreturn_t wdt_isr(int irq, void *dev_id);
static void __exit wdt_cleanup(void);
static int __init wdt_init(void);
static int __init wdt_init_one(struct pci_dev *dev,
@@ -255,7 +255,7 @@ static struct pci_driver wdt_driver = {
name: "iwdt",
id_table: lpc_pci_tbl,
probe: wdt_init_one,
- remove: __devexit(wdt_remove_one),
+ remove: __devexit_p(wdt_remove_one),
suspend: wdt_pci_suspend,
resume: wdt_pci_resume,
};
@@ -1393,12 +1393,12 @@ static int wdt_ioctl(struct inode *inode
/*
* Function Name: wdt_isr()
- * Parameter: int irq - irq number, void *dev_id, struct pt_regs *regs
+ * Parameter: int irq - irq number, void *dev_id
* Return Value:: IRQ_NONE - if the interrupt is not for wdt.
* IRQ_HANDLED - if it is for wdt.
* Description: This is the interrupt service routine of the WDT.
*/
-static irqreturn_t wdt_isr(int irq, void *dev_id, struct pt_regs *regs)
+static irqreturn_t wdt_isr(int irq, void *dev_id)
{
u8 val;

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@ -0,0 +1,22 @@
--- a/Embedded/src/EDMA/dma_linux.c
+++ b/Embedded/src/EDMA/dma_linux.c
@@ -149,8 +149,7 @@ int32_t edma_suspend (struct pci_dev *de
int32_t edma_resume(struct pci_dev *dev);
int32_t initialize_edma_device(struct edma_device *device);
-static irqreturn_t edma_irq_handler(int32_t irq, void * dev_id,
- struct pt_regs * regs);
+static irqreturn_t edma_irq_handler(int32_t irq, void * dev_id);
/* Prototypes - Misc. */
@@ -429,8 +428,7 @@ int32_t edma_release(struct inode * inod
* Return Values: HANDLED = 1, NOT_HANDLED = 0
*****************************************************************************/
-static irqreturn_t edma_irq_handler(int32_t irq, void * dev_id,
- struct pt_regs * regs)
+static irqreturn_t edma_irq_handler(int32_t irq, void * dev_id)
{
uint32_t clear_bits;

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@ -0,0 +1,22 @@
--- a/Embedded/src/1588/1588.c
+++ b/Embedded/src/1588/1588.c
@@ -631,7 +631,7 @@ int restore_interrupts(void)
IRQ_NONE => this device did not interrupt
******************************************************************************/
-irqreturn_t timesync_isr(int irq, void *dev_id, struct pt_regs *regs)
+irqreturn_t timesync_isr(int irq, void *dev_id)
{
if ( !ixTimeSyncAccEventAmmsFlagGet() && !ixTimeSyncAccEventAsmsFlagGet()&&
!ixTimeSyncAccEventAtmFlagGet() && !ixTimeSyncAccEventPpsmFlagGet()&&
--- a/Embedded/src/1588/1588.h
+++ b/Embedded/src/1588/1588.h
@@ -128,7 +128,7 @@ int pci_suspend(struct pci_dev *dev, pm_
int pci_resume(struct pci_dev *dev);
int pci_probe(struct pci_dev *dev, const struct pci_device_id *id);
void pci_remove(struct pci_dev *dev);
-irqreturn_t timesync_isr(int irq, void *dev_id, struct pt_regs *regs);
+irqreturn_t timesync_isr(int irq, void *dev_id);
// private functions
int save_reg_state(void);

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@ -0,0 +1,22 @@
--- a/Embedded/src/CAN/can_main.h
+++ b/Embedded/src/CAN/can_main.h
@@ -65,7 +65,7 @@
#include <linux/interrupt.h>
#include <linux/pci.h>
-#include <asm/semaphore.h>
+#include <linux/semaphore.h>
#include <linux/spinlock.h>
#include <linux/cdev.h>
#include <asm/uaccess.h>
--- a/Embedded/src/EDMA/dma_linux.c
+++ b/Embedded/src/EDMA/dma_linux.c
@@ -87,7 +87,7 @@
#include <linux/fcntl.h> /* O_ACCMODE */
#include <asm/system.h> /* cli, *_flags */
#include <asm/uaccess.h> /* copy_to_user */
-#include <asm/semaphore.h>
+#include <linux/semaphore.h>
#include <asm/io.h> /* inb(), outb() */
#include <linux/kmod.h>
#include <linux/ioport.h> /* request_region */

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@ -0,0 +1,33 @@
diff -Nur a/Embedded/src/1588/1588.c b/Embedded/src/1588/1588.c
--- a/Embedded/src/1588/1588.c 2009-11-10 14:20:46.563322192 +0100
+++ b/Embedded/src/1588/1588.c 2009-11-30 10:44:22.144270452 +0100
@@ -72,6 +72,7 @@
*
****************************************************************************/
+#include <linux/sched.h>
#include "1588.h"
MODULE_AUTHOR("Intel(R) Corporation");
diff -Nur a/Embedded/src/CAN/can_main.c b/Embedded/src/CAN/can_main.c
--- a/Embedded/src/CAN/can_main.c 2009-11-10 14:20:46.563322192 +0100
+++ b/Embedded/src/CAN/can_main.c 2009-11-30 10:44:39.044269751 +0100
@@ -68,6 +68,7 @@
*
**************************************************************************/
+#include <linux/sched.h>
#include "can_main.h"
#include "can_ioctl.h"
diff -Nur a/Embedded/src/WDT/iwdt.c b/Embedded/src/WDT/iwdt.c
--- a/Embedded/src/WDT/iwdt.c 2009-11-10 14:20:46.563322192 +0100
+++ b/Embedded/src/WDT/iwdt.c 2009-11-30 10:44:54.024262744 +0100
@@ -137,6 +137,7 @@
#include <linux/watchdog.h>
#include <linux/miscdevice.h>
#include <linux/interrupt.h>
+#include <linux/sched.h>
#include "iwdt.h"
MODULE_AUTHOR("Intel(R) Corporation");

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@ -0,0 +1,31 @@
--- a/Embedded/src/GbE/kcompat.h
+++ b/Embedded/src/GbE/kcompat.h
@@ -46,12 +46,6 @@ GPL LICENSE SUMMARY
#include <linux/sched.h>
#include <asm/io.h>
-#ifndef IRQ_HANDLED
-#define irqreturn_t void
-#define IRQ_HANDLED
-#define IRQ_NONE
-#endif
-
#ifndef SET_NETDEV_DEV
#define SET_NETDEV_DEV(net, pdev)
#endif
@@ -748,6 +742,15 @@ extern void dump_stack(void);
#endif /* 2.4.24 */
+/*****************************************************************************/
+#if ( LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) )
+#ifndef IRQ_HANDLED
+#define irqreturn_t void
+#define IRQ_HANDLED
+#define IRQ_NONE
+#endif
+#endif /* < 2.6.30 */
+
#endif /* _KCOMPAT_H_ */

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@ -0,0 +1,11 @@
--- a/Embedded/src/GbE/iegbe_main.c
+++ b/Embedded/src/GbE/iegbe_main.c
@@ -3534,7 +3534,7 @@ static int iegbe_clean(struct napi_struc
int tx_cleaned = 0, work_done = 0;
/* Must NOT use netdev_priv macro here. */
- adapter = poll_dev->priv;
+ adapter = netdev_priv(poll_dev);
/* iegbe_clean is called per-cpu. This lock protects
* tx_ring[0] from being cleaned by multiple cpus

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@ -550,6 +550,7 @@ CONFIG_EXPERIMENTAL=y
# CONFIG_EXT4_DEBUG is not set # CONFIG_EXT4_DEBUG is not set
# CONFIG_EXT4DEV_FS is not set # CONFIG_EXT4DEV_FS is not set
# CONFIG_EXT4_FS is not set # CONFIG_EXT4_FS is not set
# CONFIG_EXT4_FS_XATTR is not set
CONFIG_EXTRA_FIRMWARE="" CONFIG_EXTRA_FIRMWARE=""
CONFIG_EXTRA_TARGETS="" CONFIG_EXTRA_TARGETS=""
# CONFIG_EZX_PCAP is not set # CONFIG_EZX_PCAP is not set

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@ -10,7 +10,7 @@ ARCH:=i386
BOARD:=x86 BOARD:=x86
BOARDNAME:=x86 BOARDNAME:=x86
FEATURES:=squashfs jffs2 ext2 vdi vmdk pcmcia tgz FEATURES:=squashfs jffs2 ext2 vdi vmdk pcmcia tgz
SUBTARGETS=generic olpc xen_domu SUBTARGETS=generic olpc xen_domu ep80579
LINUX_VERSION:=2.6.32.10 LINUX_VERSION:=2.6.32.10

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@ -0,0 +1,12 @@
CONFIG_ATA=y
CONFIG_BLK_DEV_SD=y
# CONFIG_MTD_BLOCK2MTD is not set
CONFIG_HIGHMEM4G=y
# CONFIG_HIGHPTE is not set
# CONFIG_MTD is not set
# CONFIG_NOHIGHMEM is not set
CONFIG_SATA_AHCI=y
# CONFIG_SQUASHFS is not set
CONFIG_ITCO_WDT=y
# CONFIG_ITCO_VENDOR_SUPPORT is not set
CONFIG_LOG_BUF_SHIFT=17

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@ -0,0 +1,9 @@
BOARDNAME:=Intel EP80579
DEFAULT_PACKAGES += kmod-ep80579-can kmod-ep80579-eth kmod-ep80579-misc \
kmod-usb-core kmod-usb2 kmod-usb-hid kmod-usb-uhci
define Target/Description
Build firmware images for Intel EP80579 based boards
(e.g : ADI Engineering Ocracoke Island)
endef