diff --git a/target/linux/xburst/patches-2.6.25/010-add-qi_lb60.patch b/target/linux/xburst/patches-2.6.25/010-add-qi_lb60.patch new file mode 100644 index 000000000..25c6f15af --- /dev/null +++ b/target/linux/xburst/patches-2.6.25/010-add-qi_lb60.patch @@ -0,0 +1,383 @@ +diff -ruN linux-2.6.25.20.owrt.qi/arch/mips/jz4740/board-qi_lb60.c linux-2.6.25.20.owrt.qi.mod/arch/mips/jz4740/board-qi_lb60.c +--- linux-2.6.25.20.owrt.qi/arch/mips/jz4740/board-qi_lb60.c 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.25.20.owrt.qi.mod/arch/mips/jz4740/board-qi_lb60.c 2009-08-06 22:20:19.000000000 +0200 +@@ -0,0 +1,110 @@ ++/* ++ * linux/arch/mips/jz4740/board-qi_lb60.c ++ * ++ * QI_LB60 setup routines. ++ * ++ * Copyright (c) 2009 Qi Hardware inc., ++ * Author: Xiangfu Liu ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 3 as ++ * published by the Free Software Foundation. ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++#include ++ ++#include ++#include ++#include ++#include ++ ++#include ++ ++extern void (*jz_timer_callback)(void); ++ ++static void dancing(void) ++{ ++ static unsigned int count = 0; ++ ++ count ++; ++ count &= 1; ++ if (count) ++ __gpio_set_pin(GPIO_LED_EN); ++ else ++ __gpio_clear_pin(GPIO_LED_EN); ++} ++ ++static void pi_timer_callback(void) ++{ ++ static unsigned long count = 0; ++ ++ if ((++count) % 50 == 0) { ++ dancing(); ++ count = 0; ++ } ++} ++ ++static void __init board_cpm_setup(void) ++{ ++ /* Stop unused module clocks here. ++ * We have started all module clocks at arch/mips/jz4740/setup.c. ++ */ ++} ++ ++static void __init board_gpio_setup(void) ++{ ++ /* ++ * Most of the GPIO pins should have been initialized by the boot-loader ++ */ ++ ++ /* ++ * Initialize MSC pins ++ */ ++ /* __gpio_as_msc(); */ ++ ++ /* ++ * Initialize LCD pins ++ */ ++ /* __gpio_as_lcd_18bit(); */ ++ ++ /* ++ * Initialize SSI pins ++ */ ++ /* __gpio_as_ssi(); */ ++ ++ /* ++ * Initialize I2C pins ++ */ ++ /* __gpio_as_i2c(); */ ++ ++ /* ++ * Initialize Other pins ++ */ ++ __gpio_as_output(GPIO_SD_VCC_EN_N); ++ __gpio_disable_pull(GPIO_SD_VCC_EN_N); ++ __gpio_clear_pin(GPIO_SD_VCC_EN_N); ++ ++ __gpio_as_input(GPIO_SD_CD_N); ++ __gpio_disable_pull(GPIO_SD_CD_N); ++ ++ __gpio_as_input(GPIO_SD_WP); ++ __gpio_disable_pull(GPIO_SD_WP); ++ ++ __gpio_as_input(GPIO_DC_DETE_N); ++ __gpio_as_input(GPIO_CHARG_STAT_N); ++} ++ ++void __init jz_board_setup(void) ++{ ++ printk("Qi Hardware JZ4740 QI_LB60 setup\n"); ++ ++ board_cpm_setup(); ++ board_gpio_setup(); ++ ++ jz_timer_callback = pi_timer_callback; ++} +diff -ruN linux-2.6.25.20.owrt.qi/arch/mips/jz4740/Makefile linux-2.6.25.20.owrt.qi.mod/arch/mips/jz4740/Makefile +--- linux-2.6.25.20.owrt.qi/arch/mips/jz4740/Makefile 2009-08-05 03:02:12.000000000 +0200 ++++ linux-2.6.25.20.owrt.qi.mod/arch/mips/jz4740/Makefile 2009-08-06 19:01:25.000000000 +0200 +@@ -16,6 +16,7 @@ + obj-$(CONFIG_JZ4740_LYRA) += board-lyra.o + obj-$(CONFIG_JZ4725_DIPPER) += board-dipper.o + obj-$(CONFIG_JZ4720_VIRGO) += board-virgo.o ++obj-$(CONFIG_JZ4740_QI_LB60) += board-qi_lb60.o + + # PM support + +diff -ruN linux-2.6.25.20.owrt.qi/arch/mips/Kconfig linux-2.6.25.20.owrt.qi.mod/arch/mips/Kconfig +--- linux-2.6.25.20.owrt.qi/arch/mips/Kconfig 2009-08-05 03:02:12.000000000 +0200 ++++ linux-2.6.25.20.owrt.qi.mod/arch/mips/Kconfig 2009-08-06 18:56:17.000000000 +0200 +@@ -18,6 +18,14 @@ + prompt "System type" + default SGI_IP22 + ++config JZ4740_QI_LB60 ++ bool "Ingenic JZ4740 QI_LB60 board" ++ select DMA_NONCOHERENT ++ select SYS_HAS_CPU_MIPS32_R1 ++ select SYS_SUPPORTS_32BIT_KERNEL ++ select SYS_SUPPORTS_LITTLE_ENDIAN ++ select SOC_JZ4740 ++ + config JZ4730_PMP + bool "Ingenic JZ4730 PMP board" + select DMA_NONCOHERENT +diff -ruN linux-2.6.25.20.owrt.qi/drivers/mtd/nand/jz4740_nand.c linux-2.6.25.20.owrt.qi.mod/drivers/mtd/nand/jz4740_nand.c +--- linux-2.6.25.20.owrt.qi/drivers/mtd/nand/jz4740_nand.c 2009-08-05 03:02:12.000000000 +0200 ++++ linux-2.6.25.20.owrt.qi.mod/drivers/mtd/nand/jz4740_nand.c 2009-08-06 19:06:45.000000000 +0200 +@@ -278,6 +278,53 @@ + 20, /* reserved blocks of mtd4 */ + 20}; /* reserved blocks of mtd5 */ + #endif /* CONFIG_JZ4720_VIRGO */ ++ ++#ifdef CONFIG_JZ4740_QI_LB60 ++static struct mtd_partition partition_info[] = { ++ { name: "NAND BOOT partition", ++ offset: 0 * 0x100000, ++ size: 4 * 0x100000, ++ use_planes: 0 }, ++ { name: "NAND KERNEL partition", ++ offset: 4 * 0x100000, ++ size: 4 * 0x100000, ++ use_planes: 0 }, ++ { name: "NAND ROOTFS partition", ++ offset: 8 * 0x100000, ++ size: 504 * 0x100000, ++ use_planes: 0 }, ++ { name: "NAND DATA1 partition", ++ offset: 512 * 0x100000, ++ size: 512 * 0x100000, ++ use_planes: 1 }, ++ { name: "NAND DATA2 partition", ++ offset: 1024 * 0x100000, ++ size: 512 * 0x100000, ++ use_planes: 1 }, ++ { name: "NAND VFAT partition", ++ offset: (1024 + 512) * 0x100000, ++ size: 512 * 0x100000, ++ use_planes: 1 }, ++}; ++ ++/* Define max reserved bad blocks for each partition. ++ * This is used by the mtdblock-jz.c NAND FTL driver only. ++ * ++ * The NAND FTL driver reserves some good blocks which can't be ++ * seen by the upper layer. When the bad block number of a partition ++ * exceeds the max reserved blocks, then there is no more reserved ++ * good blocks to be used by the NAND FTL driver when another bad ++ * block generated. ++ */ ++static int partition_reserved_badblocks[] = { ++ 2, /* reserved blocks of mtd0 */ ++ 2, /* reserved blocks of mtd1 */ ++ 10, /* reserved blocks of mtd2 */ ++ 10, /* reserved blocks of mtd3 */ ++ 10, /* reserved blocks of mtd4 */ ++ 20}; /* reserved blocks of mtd5 */ ++#endif /* CONFIG_JZ4740_QI_LB60 */ ++ + /*------------------------------------------------------------------------- + * Following three functions are exported and used by the mtdblock-jz.c + * NAND FTL driver only. +diff -ruN linux-2.6.25.20.owrt.qi/drivers/video/jzlcd.c linux-2.6.25.20.owrt.qi.mod/drivers/video/jzlcd.c +--- linux-2.6.25.20.owrt.qi/drivers/video/jzlcd.c 2009-08-05 03:02:12.000000000 +0200 ++++ linux-2.6.25.20.owrt.qi.mod/drivers/video/jzlcd.c 2009-08-06 22:23:39.000000000 +0200 +@@ -126,15 +126,18 @@ + MODE_TFT_GEN | HSYNC_N | VSYNC_N | PCLK_N | DE_N, + 320, 240, 16, 60, 3, 3, 3, 3, 3, 85 /* 320x240 */ + #endif +-#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) && defined(CONFIG_JZ4740_PAVO) +- MODE_TFT_GEN | HSYNC_N | VSYNC_N | MODE_TFT_18BIT | PCLK_N, +-// 320, 240, 18, 110, 1, 1, 10, 50, 10, 13 +- 320, 240, 18, 80, 1, 1, 10, 50, 10, 13 +-#endif +-#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) && !(defined(CONFIG_JZ4740_PAVO)) +- MODE_TFT_GEN | HSYNC_N | VSYNC_N | PCLK_N, +- 320, 240, 16, 110, 1, 1, 10, 50, 10, 13 +-#endif ++#if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) ++ #if defined(CONFIG_JZ4740_PAVO) ++ MODE_TFT_GEN | HSYNC_N | VSYNC_N | MODE_TFT_18BIT | PCLK_N, ++ 320, 240, 18, 80, 1, 1, 10, 50, 10, 13 ++ #elif defined(CONFIG_JZ4740_QI_LB60) ++ MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N, ++ 320, 240, 32, 70, 1, 1, 273, 140, 1, 20 ++ #else ++ MODE_TFT_GEN | HSYNC_N | VSYNC_N | PCLK_N, ++ 320, 240, 16, 110, 1, 1, 10, 50, 10, 13 ++ #endif ++#endif /* CONFIG_JZLCD_FOXCONN_PT035TN01 */ + #if defined(CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL) + MODE_8BIT_SERIAL_TFT | PCLK_N | HSYNC_N | VSYNC_N, + 320, 240, 32, 60, 1, 1, 10, 50, 10, 13 +@@ -1523,7 +1526,7 @@ + cfb->pm->data = cfb; + #endif + +- __lcd_display_on(); ++ __lcd_display_off(); + + return 0; + +diff -ruN linux-2.6.25.20.owrt.qi/drivers/video/jzlcd.h linux-2.6.25.20.owrt.qi.mod/drivers/video/jzlcd.h +--- linux-2.6.25.20.owrt.qi/drivers/video/jzlcd.h 2009-08-05 03:02:12.000000000 +0200 ++++ linux-2.6.25.20.owrt.qi.mod/drivers/video/jzlcd.h 2009-08-06 22:29:03.000000000 +0200 +@@ -363,7 +363,11 @@ + #if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) || defined(CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL) + + #if defined(CONFIG_JZLCD_FOXCONN_PT035TN01) /* board pmp */ +-#define MODE 0xcd /* 24bit parellel RGB */ ++ #if defined(CONFIG_JZ4740_QI_LB60) ++ #define MODE 0xc9 ++ #else ++ #define MODE 0xcd /* 24bit parellel RGB */ ++ #endif + #endif + #if defined(CONFIG_JZLCD_INNOLUX_PT035TN01_SERIAL) + #define MODE 0xc9 /* 8bit serial RGB */ +@@ -384,6 +388,11 @@ + #define SPCK (32*1+17) //LCD_CLS + #define SPDA (32*2+12) //LCD_D12 + #define LCD_RET (32*2+23) //LCD_REV, GPC23 ++#elif defined(CONFIG_JZ4740_QI_LB60) ++ #define SPEN (32*2+21) //LCD_SPL ++ #define SPCK (32*2+23) //LCD_CLS ++ #define SPDA (32*2+22) //LCD_D12 ++ #define LCD_RET (32*3+27) + #if 0 /*old driver*/ + #define SPEN (32*1+18) //LCD_SPL + #define SPCK (32*1+17) //LCD_CLS +@@ -655,7 +663,7 @@ + + /*#if defined(CONFIG_JZ4740_LEO) || defined(CONFIG_JZ4740_PAVO)*/ + #if defined(CONFIG_SOC_JZ4740) +-#if defined(CONFIG_JZ4740_PAVO) || defined(CONFIG_JZ4740_LYRA) ++#if defined(CONFIG_JZ4740_PAVO) || defined(CONFIG_JZ4740_LYRA) || defined(CONFIG_JZ4740_QI_LB60) + #define GPIO_PWM 123 /* GP_D27 */ + #define PWM_CHN 4 /* pwm channel */ + #define PWM_FULL 101 +@@ -725,7 +733,7 @@ + do { \ + __gpio_set_pin(GPIO_DISP_OFF_N); \ + __lcd_special_on(); \ +- __lcd_set_backlight_level(80); \ ++ __lcd_set_backlight_level(20); \ + } while (0) + + #define __lcd_display_off() \ +diff -ruN linux-2.6.25.20.owrt.qi/include/asm-mips/mach-jz4740/board-qi_lb60.h linux-2.6.25.20.owrt.qi.mod/include/asm-mips/mach-jz4740/board-qi_lb60.h +--- linux-2.6.25.20.owrt.qi/include/asm-mips/mach-jz4740/board-qi_lb60.h 1970-01-01 01:00:00.000000000 +0100 ++++ linux-2.6.25.20.owrt.qi.mod/include/asm-mips/mach-jz4740/board-qi_lb60.h 2009-08-06 22:11:42.000000000 +0200 +@@ -0,0 +1,79 @@ ++/* ++ * linux/include/asm-mips/mach-jz4740/board-qi_lb60.h ++ * ++ * Copyright (c) 2009 Qi Hardware inc., ++ * Author: Xiangfu Liu ++ * ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License version 3 as ++ * published by the Free Software Foundation. ++ */ ++ ++#ifndef __ASM_JZ4740_QI_LB60_H__ ++#define __ASM_JZ4740_QI_LB60_H__ ++ ++/* ++ * Frequencies of on-board oscillators ++ */ ++#define JZ_EXTAL 12000000 /* Main extal freq: 12 MHz */ ++#define JZ_EXTAL2 32768 /* RTC extal freq: 32.768 KHz */ ++ ++/* ++ * GPIO ++ */ ++#define GPIO_DC_DETE_N (2 * 32 + 26) ++#define GPIO_CHARG_STAT_N (2 * 32 + 27) ++#define GPIO_LED_EN (2 * 32 + 28) ++#define GPIO_LCD_CS (2 * 32 + 21) ++#define GPIO_DISP_OFF_N (3 * 32 + 21) ++#define GPIO_PWM (3 * 32 + 27) ++ ++#define GPIO_AMP_EN (3 * 32 + 4) ++ ++#define GPIO_SD_CD_N (3 * 32 + 0) ++#define GPIO_SD_VCC_EN_N (3 * 32 + 2) ++#define GPIO_SD_WP (3 * 32 + 16) ++ ++#define GPIO_USB_DETE (3 * 32 + 28) ++#define GPIO_BUZZ_PWM (3 * 32 + 27) ++#define GPIO_UDC_HOTPLUG GPIO_USB_DETE ++ ++#define GPIO_AUDIO_POP (1 * 32 + 29) ++#define GPIO_COB_TEST (1 * 32 + 30) ++ ++#define GPIO_KEYOUT_BASE (2 * 32 + 10) ++#define GPIO_KEYIN_BASE (3 * 32 + 18) ++#define GPIO_KEYIN_8 (3 * 32 + 26) ++ ++/* ++ * MMC/SD ++ */ ++#define MSC_WP_PIN GPIO_SD_WP ++#define MSC_HOTPLUG_PIN GPIO_SD_CD_N ++#define MSC_HOTPLUG_IRQ (IRQ_GPIO_0 + GPIO_SD_CD_N) ++ ++#define __msc_init_io() \ ++do { \ ++ __gpio_as_output(GPIO_SD_VCC_EN_N); \ ++ __gpio_as_input(GPIO_SD_CD_N); \ ++} while (0) ++ ++#define __msc_enable_power() \ ++do { \ ++ __gpio_clear_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_disable_power() \ ++do { \ ++ __gpio_set_pin(GPIO_SD_VCC_EN_N); \ ++} while (0) ++ ++#define __msc_card_detected(s) \ ++({ \ ++ int detected = 1; \ ++ if (!__gpio_get_pin(GPIO_SD_CD_N)) \ ++ detected = 0; \ ++ detected; \ ++}) ++ ++#endif /* __ASM_JZ4740_QI_LB60_H__ */ +diff -ruN linux-2.6.25.20.owrt.qi/include/asm-mips/mach-jz4740/jz4740.h linux-2.6.25.20.owrt.qi.mod/include/asm-mips/mach-jz4740/jz4740.h +--- linux-2.6.25.20.owrt.qi/include/asm-mips/mach-jz4740/jz4740.h 2009-08-05 03:02:12.000000000 +0200 ++++ linux-2.6.25.20.owrt.qi.mod/include/asm-mips/mach-jz4740/jz4740.h 2009-08-06 19:00:15.000000000 +0200 +@@ -43,6 +43,10 @@ + #include + #endif + ++#ifdef CONFIG_JZ4740_QI_LB60 ++#include ++#endif ++ + /* Add other platform definition here ... */ + +