1
0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-11-20 03:41:53 +02:00

ar71xx: wrap long lines

(build errors has been fixed - juhosg)

Signed-off-by: Arnaud Lacombe <lacombar@gmail.com>

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@23977 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2010-11-12 18:51:04 +00:00
parent 6be076283d
commit 2adda3cec6
10 changed files with 29 additions and 19 deletions

View File

@ -87,12 +87,14 @@ void __init eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0,
} }
if (mac_addr0) { if (mac_addr0) {
memcpy(eap7660d_wmac0_mac, mac_addr0, sizeof(eap7660d_wmac0_mac)); memcpy(eap7660d_wmac0_mac, mac_addr0,
sizeof(eap7660d_wmac0_mac));
eap7660d_wmac0_data.macaddr = eap7660d_wmac0_mac; eap7660d_wmac0_data.macaddr = eap7660d_wmac0_mac;
} }
if (mac_addr1) { if (mac_addr1) {
memcpy(eap7660d_wmac1_mac, mac_addr1, sizeof(eap7660d_wmac1_mac)); memcpy(eap7660d_wmac1_mac, mac_addr1,
sizeof(eap7660d_wmac1_mac));
eap7660d_wmac1_data.macaddr = eap7660d_wmac1_mac; eap7660d_wmac1_data.macaddr = eap7660d_wmac1_mac;
} }

View File

@ -219,4 +219,5 @@ static void __init nbg460n_setup(void)
nbg460n_gpio_buttons); nbg460n_gpio_buttons);
} }
MIPS_MACHINE(AR71XX_MACH_NBG460N, "NBG460N", "Zyxel NBG460N/550N/550NH", nbg460n_setup); MIPS_MACHINE(AR71XX_MACH_NBG460N, "NBG460N", "Zyxel NBG460N/550N/550NH",
nbg460n_setup);

View File

@ -287,11 +287,13 @@ static void __init rb450_generic_setup(int gige)
ar71xx_add_device_mdio(~RB450_MDIO_PHYMASK); ar71xx_add_device_mdio(~RB450_MDIO_PHYMASK);
ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1); ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1);
ar71xx_eth0_data.phy_if_mode = (gige) ? PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII; ar71xx_eth0_data.phy_if_mode = (gige) ?
PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII;
ar71xx_eth0_data.phy_mask = RB450_LAN_PHYMASK; ar71xx_eth0_data.phy_mask = RB450_LAN_PHYMASK;
ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0); ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0);
ar71xx_eth1_data.phy_if_mode = (gige) ? PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII; ar71xx_eth1_data.phy_if_mode = (gige) ?
PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII;
ar71xx_eth1_data.phy_mask = RB450_WAN_PHYMASK; ar71xx_eth1_data.phy_mask = RB450_WAN_PHYMASK;
ar71xx_add_device_eth(1); ar71xx_add_device_eth(1);

View File

@ -170,7 +170,8 @@ static void __init ubnt_rspro_setup(void)
{ {
ubnt_generic_setup(); ubnt_generic_setup();
ar71xx_add_device_mdio(~(UBNT_RSPRO_WAN_PHYMASK | UBNT_RSPRO_LAN_PHYMASK)); ar71xx_add_device_mdio(~(UBNT_RSPRO_WAN_PHYMASK |
UBNT_RSPRO_LAN_PHYMASK));
ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0); ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII; ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;

View File

@ -111,10 +111,9 @@ static int ar724x_pci_read_config(struct pci_bus *bus, unsigned int devfn,
* if we set the BAR with proper base address * if we set the BAR with proper base address
*/ */
if ((where == 0x10) && (size == 4)) { if ((where == 0x10) && (size == 4)) {
if (ar71xx_soc == AR71XX_SOC_AR7240) u32 val;
ar724x_pci_write(ar724x_pci_devcfg_base, where, size, 0xffff); val = (ar71xx_soc == AR71XX_SOC_AR7240) ? 0xffff : 0x1000ffff;
else ar724x_pci_write(ar724x_pci_devcfg_base, where, size, val);
ar724x_pci_write(ar724x_pci_devcfg_base, where, size, 0x1000ffff);
} }
return PCIBIOS_SUCCESSFUL; return PCIBIOS_SUCCESSFUL;
@ -256,7 +255,8 @@ static int __init ar724x_pci_setup(void)
return -ENODEV; return -ENODEV;
} }
if (ar71xx_soc == AR71XX_SOC_AR7241 || ar71xx_soc == AR71XX_SOC_AR7242) { if (ar71xx_soc == AR71XX_SOC_AR7241 ||
ar71xx_soc == AR71XX_SOC_AR7242) {
t = __raw_readl(base + AR724X_PCI_REG_APP); t = __raw_readl(base + AR724X_PCI_REG_APP);
t |= BIT(16); t |= BIT(16);
__raw_writel(t, base + AR724X_PCI_REG_APP); __raw_writel(t, base + AR724X_PCI_REG_APP);

View File

@ -123,7 +123,8 @@ static int wrt160nl_parse_partitions(struct mtd_info *master,
goto free_hdr; goto free_hdr;
} }
kernel_len = le32_to_cpu(theader->offsets[1]) + sizeof(struct cybertan_header); kernel_len = le32_to_cpu(theader->offsets[1]) +
sizeof(struct cybertan_header);
trx_parts[0].name = "u-boot"; trx_parts[0].name = "u-boot";
trx_parts[0].offset = 0; trx_parts[0].offset = 0;
@ -137,7 +138,8 @@ static int wrt160nl_parse_partitions(struct mtd_info *master,
trx_parts[2].name = "rootfs"; trx_parts[2].name = "rootfs";
trx_parts[2].offset = trx_parts[1].offset + trx_parts[1].size; trx_parts[2].offset = trx_parts[1].offset + trx_parts[1].size;
trx_parts[2].size = master->size - 6 * master->erasesize - trx_parts[1].size; trx_parts[2].size = master->size - 6 * master->erasesize -
trx_parts[1].size;
trx_parts[2].mask_flags = 0; trx_parts[2].mask_flags = 0;
trx_parts[3].name = "nvram"; trx_parts[3].name = "nvram";

View File

@ -770,7 +770,8 @@ static struct ar7240sw *ar7240_probe(struct ag71xx *ag)
ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & AR7240_MASK_CTRL_VERSION_M; ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & AR7240_MASK_CTRL_VERSION_M;
if (ver != 1) { if (ver != 1) {
pr_err("%s: unsupported chip, ctrl=%08x\n", ag->dev->name, ctrl); pr_err("%s: unsupported chip, ctrl=%08x\n",
ag->dev->name, ctrl);
return NULL; return NULL;
} }

View File

@ -119,7 +119,8 @@ static int ag71xx_ring_alloc(struct ag71xx_ring *ring, unsigned int size)
} }
for (i = 0; i < size; i++) { for (i = 0; i < size; i++) {
ring->buf[i].desc = (struct ag71xx_desc *)&ring->descs_cpu[i * ring->desc_size]; int idx = i * ring->desc_size;
ring->buf[i].desc = (struct ag71xx_desc *)&ring->descs_cpu[idx];
DBG("ag71xx: ring %p, desc %d at %p\n", DBG("ag71xx: ring %p, desc %d at %p\n",
ring, i, ring->buf[i].desc); ring, i, ring->buf[i].desc);
} }

View File

@ -398,7 +398,8 @@ static int vsc7385_upload_ucode(struct vsc7385 *vsc)
rc = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0, rc = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0,
VSC73XX_ICPU_SRAM, &curVal); VSC73XX_ICPU_SRAM, &curVal);
if (rc) { if (rc) {
dev_err(&spi->dev, "could not read microcode %d\n",rc); dev_err(&spi->dev, "could not read microcode %d\n",
rc);
goto out; goto out;
} }

View File

@ -215,9 +215,8 @@ static int __devinit ar71xx_wdt_probe(struct platform_device *pdev)
max_timeout = (0xfffffffful / ar71xx_ahb_freq); max_timeout = (0xfffffffful / ar71xx_ahb_freq);
wdt_timeout = (max_timeout < WDT_TIMEOUT) ? max_timeout : WDT_TIMEOUT; wdt_timeout = (max_timeout < WDT_TIMEOUT) ? max_timeout : WDT_TIMEOUT;
boot_status = if (ar71xx_reset_rr(AR71XX_RESET_REG_WDOG_CTRL) & WDOG_CTRL_LAST_RESET)
(ar71xx_reset_rr(AR71XX_RESET_REG_WDOG_CTRL) & WDOG_CTRL_LAST_RESET) ? boot_status = WDIOF_CARDRESET;
WDIOF_CARDRESET : 0;
ret = misc_register(&ar71xx_wdt_miscdev); ret = misc_register(&ar71xx_wdt_miscdev);
if (ret) if (ret)