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ar71xx: wrap long lines
(build errors has been fixed - juhosg) Signed-off-by: Arnaud Lacombe <lacombar@gmail.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@23977 3c298f89-4303-0410-b956-a3cf2f4a3e73
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6be076283d
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2adda3cec6
@ -87,12 +87,14 @@ void __init eap7660d_pci_init(u8 *cal_data0, u8 *mac_addr0,
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}
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}
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if (mac_addr0) {
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if (mac_addr0) {
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memcpy(eap7660d_wmac0_mac, mac_addr0, sizeof(eap7660d_wmac0_mac));
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memcpy(eap7660d_wmac0_mac, mac_addr0,
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sizeof(eap7660d_wmac0_mac));
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eap7660d_wmac0_data.macaddr = eap7660d_wmac0_mac;
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eap7660d_wmac0_data.macaddr = eap7660d_wmac0_mac;
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}
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}
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if (mac_addr1) {
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if (mac_addr1) {
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memcpy(eap7660d_wmac1_mac, mac_addr1, sizeof(eap7660d_wmac1_mac));
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memcpy(eap7660d_wmac1_mac, mac_addr1,
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sizeof(eap7660d_wmac1_mac));
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eap7660d_wmac1_data.macaddr = eap7660d_wmac1_mac;
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eap7660d_wmac1_data.macaddr = eap7660d_wmac1_mac;
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}
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}
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@ -219,4 +219,5 @@ static void __init nbg460n_setup(void)
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nbg460n_gpio_buttons);
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nbg460n_gpio_buttons);
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}
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}
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MIPS_MACHINE(AR71XX_MACH_NBG460N, "NBG460N", "Zyxel NBG460N/550N/550NH", nbg460n_setup);
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MIPS_MACHINE(AR71XX_MACH_NBG460N, "NBG460N", "Zyxel NBG460N/550N/550NH",
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nbg460n_setup);
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@ -287,11 +287,13 @@ static void __init rb450_generic_setup(int gige)
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ar71xx_add_device_mdio(~RB450_MDIO_PHYMASK);
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ar71xx_add_device_mdio(~RB450_MDIO_PHYMASK);
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ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1);
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ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 1);
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ar71xx_eth0_data.phy_if_mode = (gige) ? PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII;
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ar71xx_eth0_data.phy_if_mode = (gige) ?
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PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_MII;
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ar71xx_eth0_data.phy_mask = RB450_LAN_PHYMASK;
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ar71xx_eth0_data.phy_mask = RB450_LAN_PHYMASK;
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ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0);
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ar71xx_init_mac(ar71xx_eth1_data.mac_addr, ar71xx_mac_base, 0);
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ar71xx_eth1_data.phy_if_mode = (gige) ? PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII;
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ar71xx_eth1_data.phy_if_mode = (gige) ?
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PHY_INTERFACE_MODE_RGMII : PHY_INTERFACE_MODE_RMII;
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ar71xx_eth1_data.phy_mask = RB450_WAN_PHYMASK;
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ar71xx_eth1_data.phy_mask = RB450_WAN_PHYMASK;
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ar71xx_add_device_eth(1);
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ar71xx_add_device_eth(1);
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@ -170,7 +170,8 @@ static void __init ubnt_rspro_setup(void)
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{
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{
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ubnt_generic_setup();
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ubnt_generic_setup();
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ar71xx_add_device_mdio(~(UBNT_RSPRO_WAN_PHYMASK | UBNT_RSPRO_LAN_PHYMASK));
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ar71xx_add_device_mdio(~(UBNT_RSPRO_WAN_PHYMASK |
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UBNT_RSPRO_LAN_PHYMASK));
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ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
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ar71xx_init_mac(ar71xx_eth0_data.mac_addr, ar71xx_mac_base, 0);
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ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RGMII;
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@ -111,10 +111,9 @@ static int ar724x_pci_read_config(struct pci_bus *bus, unsigned int devfn,
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* if we set the BAR with proper base address
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* if we set the BAR with proper base address
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*/
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*/
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if ((where == 0x10) && (size == 4)) {
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if ((where == 0x10) && (size == 4)) {
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if (ar71xx_soc == AR71XX_SOC_AR7240)
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u32 val;
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ar724x_pci_write(ar724x_pci_devcfg_base, where, size, 0xffff);
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val = (ar71xx_soc == AR71XX_SOC_AR7240) ? 0xffff : 0x1000ffff;
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else
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ar724x_pci_write(ar724x_pci_devcfg_base, where, size, val);
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ar724x_pci_write(ar724x_pci_devcfg_base, where, size, 0x1000ffff);
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}
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}
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return PCIBIOS_SUCCESSFUL;
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return PCIBIOS_SUCCESSFUL;
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@ -256,7 +255,8 @@ static int __init ar724x_pci_setup(void)
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return -ENODEV;
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return -ENODEV;
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}
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}
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if (ar71xx_soc == AR71XX_SOC_AR7241 || ar71xx_soc == AR71XX_SOC_AR7242) {
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if (ar71xx_soc == AR71XX_SOC_AR7241 ||
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ar71xx_soc == AR71XX_SOC_AR7242) {
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t = __raw_readl(base + AR724X_PCI_REG_APP);
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t = __raw_readl(base + AR724X_PCI_REG_APP);
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t |= BIT(16);
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t |= BIT(16);
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__raw_writel(t, base + AR724X_PCI_REG_APP);
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__raw_writel(t, base + AR724X_PCI_REG_APP);
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@ -123,7 +123,8 @@ static int wrt160nl_parse_partitions(struct mtd_info *master,
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goto free_hdr;
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goto free_hdr;
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}
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}
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kernel_len = le32_to_cpu(theader->offsets[1]) + sizeof(struct cybertan_header);
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kernel_len = le32_to_cpu(theader->offsets[1]) +
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sizeof(struct cybertan_header);
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trx_parts[0].name = "u-boot";
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trx_parts[0].name = "u-boot";
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trx_parts[0].offset = 0;
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trx_parts[0].offset = 0;
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@ -137,7 +138,8 @@ static int wrt160nl_parse_partitions(struct mtd_info *master,
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trx_parts[2].name = "rootfs";
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trx_parts[2].name = "rootfs";
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trx_parts[2].offset = trx_parts[1].offset + trx_parts[1].size;
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trx_parts[2].offset = trx_parts[1].offset + trx_parts[1].size;
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trx_parts[2].size = master->size - 6 * master->erasesize - trx_parts[1].size;
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trx_parts[2].size = master->size - 6 * master->erasesize -
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trx_parts[1].size;
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trx_parts[2].mask_flags = 0;
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trx_parts[2].mask_flags = 0;
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trx_parts[3].name = "nvram";
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trx_parts[3].name = "nvram";
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@ -770,7 +770,8 @@ static struct ar7240sw *ar7240_probe(struct ag71xx *ag)
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ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & AR7240_MASK_CTRL_VERSION_M;
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ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & AR7240_MASK_CTRL_VERSION_M;
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if (ver != 1) {
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if (ver != 1) {
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pr_err("%s: unsupported chip, ctrl=%08x\n", ag->dev->name, ctrl);
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pr_err("%s: unsupported chip, ctrl=%08x\n",
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ag->dev->name, ctrl);
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return NULL;
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return NULL;
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}
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}
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@ -119,7 +119,8 @@ static int ag71xx_ring_alloc(struct ag71xx_ring *ring, unsigned int size)
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}
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}
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for (i = 0; i < size; i++) {
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for (i = 0; i < size; i++) {
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ring->buf[i].desc = (struct ag71xx_desc *)&ring->descs_cpu[i * ring->desc_size];
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int idx = i * ring->desc_size;
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ring->buf[i].desc = (struct ag71xx_desc *)&ring->descs_cpu[idx];
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DBG("ag71xx: ring %p, desc %d at %p\n",
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DBG("ag71xx: ring %p, desc %d at %p\n",
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ring, i, ring->buf[i].desc);
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ring, i, ring->buf[i].desc);
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}
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}
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@ -398,7 +398,8 @@ static int vsc7385_upload_ucode(struct vsc7385 *vsc)
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rc = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0,
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rc = vsc7385_read(vsc, VSC73XX_BLOCK_SYSTEM, 0,
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VSC73XX_ICPU_SRAM, &curVal);
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VSC73XX_ICPU_SRAM, &curVal);
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if (rc) {
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if (rc) {
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dev_err(&spi->dev, "could not read microcode %d\n",rc);
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dev_err(&spi->dev, "could not read microcode %d\n",
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rc);
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goto out;
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goto out;
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}
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}
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@ -215,9 +215,8 @@ static int __devinit ar71xx_wdt_probe(struct platform_device *pdev)
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max_timeout = (0xfffffffful / ar71xx_ahb_freq);
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max_timeout = (0xfffffffful / ar71xx_ahb_freq);
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wdt_timeout = (max_timeout < WDT_TIMEOUT) ? max_timeout : WDT_TIMEOUT;
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wdt_timeout = (max_timeout < WDT_TIMEOUT) ? max_timeout : WDT_TIMEOUT;
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boot_status =
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if (ar71xx_reset_rr(AR71XX_RESET_REG_WDOG_CTRL) & WDOG_CTRL_LAST_RESET)
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(ar71xx_reset_rr(AR71XX_RESET_REG_WDOG_CTRL) & WDOG_CTRL_LAST_RESET) ?
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boot_status = WDIOF_CARDRESET;
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WDIOF_CARDRESET : 0;
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ret = misc_register(&ar71xx_wdt_miscdev);
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ret = misc_register(&ar71xx_wdt_miscdev);
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if (ret)
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if (ret)
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