diff --git a/include/autotools.mk b/include/autotools.mk index e1535d0b1..c941a4949 100644 --- a/include/autotools.mk +++ b/include/autotools.mk @@ -32,6 +32,7 @@ update_libtool_ucxx = \ ) \ $(call update_libtool_common) +autoconf_bool = $(patsubst %,$(if $($(1)),--enable,--disable)-%,$(2)) # prevent libtool from linking against host development libraries define libtool_fixup_libdir diff --git a/include/download.mk b/include/download.mk index 2d3f35fee..c924ca051 100644 --- a/include/download.mk +++ b/include/download.mk @@ -63,12 +63,6 @@ define DownloadMethod/cvs ) endef -SVN_VERSION=$(shell svn --version | head -1 | awk '{ print $3 }' | cut -d. -f2) -ifeq ($(SVN_VERSION),5) -else -SVN_OPTS:=--trust-server-cert -endif - define DownloadMethod/svn $(call wrap_mirror, \ echo "Checking out files from the svn repository..."; \ @@ -76,7 +70,9 @@ define DownloadMethod/svn cd $(TMP_DIR)/dl && \ rm -rf $(SUBDIR) && \ [ \! -d $(SUBDIR) ] && \ - svn export --non-interactive $(SVN_OPTS) -r$(VERSION) $(URL) $(SUBDIR) && \ + ( svn help export | grep -q trust-server-cert && \ + svn export --non-interactive --trust-server-cert -r$(VERSION) $(URL) $(SUBDIR) || \ + svn export --non-interactive -r$(VERSION) $(URL) $(SUBDIR) ) && \ echo "Packing checkout..." && \ $(call dl_pack,$(TMP_DIR)/dl/$(FILE),$(SUBDIR)) && \ mv $(TMP_DIR)/dl/$(FILE) $(DL_DIR)/ && \ diff --git a/include/kernel-version.mk b/include/kernel-version.mk index 05bbc1c4e..e4f0b486f 100644 --- a/include/kernel-version.mk +++ b/include/kernel-version.mk @@ -17,9 +17,6 @@ endif ifeq ($(LINUX_VERSION),2.6.31.12) LINUX_KERNEL_MD5SUM:=517be354b81b780e2f4b2ad614d030de endif -ifeq ($(LINUX_VERSION),2.6.32.9) - LINUX_KERNEL_MD5SUM:=0771a9c70503c92f40d815ef76eb62fe -endif ifeq ($(LINUX_VERSION),2.6.32.10) LINUX_KERNEL_MD5SUM:=5d996507ad482a3a8c8e6b2d48e7994b endif diff --git a/include/kernel.mk b/include/kernel.mk index 1ca231282..63df959a4 100644 --- a/include/kernel.mk +++ b/include/kernel.mk @@ -30,8 +30,10 @@ else KERNEL_CROSS?=$(TARGET_CROSS) endif - PATCH_DIR ?= ./patches$(if $(wildcard ./patches-$(KERNEL_PATCHVER)),-$(KERNEL_PATCHVER)) - FILES_DIR ?= $(foreach dir,$(wildcard ./files ./files-$(KERNEL_PATCHVER)),"$(dir)") + ifeq ($(TARGET_BUILD),1) + PATCH_DIR ?= ./patches$(if $(wildcard ./patches-$(KERNEL_PATCHVER)),-$(KERNEL_PATCHVER)) + FILES_DIR ?= $(foreach dir,$(wildcard ./files ./files-$(KERNEL_PATCHVER)),"$(dir)") + endif KERNEL_BUILD_DIR ?= $(BUILD_DIR_BASE)/linux-$(BOARD)$(if $(SUBTARGET),_$(SUBTARGET))$(if $(BUILD_SUFFIX),_$(BUILD_SUFFIX)) LINUX_DIR ?= $(KERNEL_BUILD_DIR)/linux-$(LINUX_VERSION) diff --git a/include/package-ipkg.mk b/include/package-ipkg.mk index 1ddd80a8d..87b142aa5 100644 --- a/include/package-ipkg.mk +++ b/include/package-ipkg.mk @@ -24,11 +24,18 @@ define BuildIPKGVariable $(1)_COMMANDS += var2file "$(call shvar,Package/$(1)/$(2))" $(2); endef +PARENL :=( +PARENR :=) + dep_split=$(subst :,$(space),$(1)) -dep_confvar=CONFIG_$(word 1,$(call dep_split,$(1))) +dep_rem=$(subst !,,$(subst $(strip $(PARENL)),,$(subst $(strip $(PARENR)),,$(word 1,$(call dep_split,$(1)))))) +dep_confvar=$(strip $(foreach cond,$(subst ||, ,$(call dep_rem,$(1))),$(CONFIG_$(cond)))) +dep_pos=$(if $(call dep_confvar,$(1)),$(call dep_val,$(1))) +dep_neg=$(if $(call dep_confvar,$(1)),,$(call dep_val,$(1))) +dep_if=$(if $(findstring !,$(1)),$(call dep_neg,$(1)),$(call dep_pos,$(1))) dep_val=$(word 2,$(call dep_split,$(1))) strip_deps=$(strip $(subst +,,$(filter-out @%,$(1)))) -filter_deps=$(foreach dep,$(call strip_deps,$(1)),$(if $(findstring :,$(dep)),$(if $($(call dep_confvar,$(dep))),$(call dep_val,$(dep))),$(dep))) +filter_deps=$(foreach dep,$(call strip_deps,$(1)),$(if $(findstring :,$(dep)),$(call dep_if,$(dep)),$(dep))) ifeq ($(DUMP),) define BuildTarget/ipkg diff --git a/include/target.mk b/include/target.mk index 61ff2d21a..5eb8547cc 100644 --- a/include/target.mk +++ b/include/target.mk @@ -148,7 +148,9 @@ ifeq ($(DUMP),1) FEATURES += pcie endif ifneq ($(CONFIG_USB)$(CONFIG_USB_SUPPORT),) - FEATURES += usb + ifneq ($(CONFIG_USB_ARCH_HAS_HCD)$(CONFIG_USB_EHCI_HCD),) + FEATURES += usb + endif endif ifneq ($(CONFIG_PCMCIA)$(CONFIG_PCCARD),) FEATURES += pcmcia diff --git a/package/acx-mac80211/patches/001-if_init_conf_removal.patch b/package/acx-mac80211/patches/001-if_init_conf_removal.patch index 2e9bc18a1..29a5a6212 100644 --- a/package/acx-mac80211/patches/001-if_init_conf_removal.patch +++ b/package/acx-mac80211/patches/001-if_init_conf_removal.patch @@ -1,8 +1,6 @@ -Index: acx-mac80211-20100302/acx_func.h -=================================================================== ---- acx-mac80211-20100302.orig/acx_func.h 2010-03-06 12:57:25.000000000 +0100 -+++ acx-mac80211-20100302/acx_func.h 2010-03-06 12:58:10.000000000 +0100 -@@ -704,9 +704,9 @@ +--- a/acx_func.h ++++ b/acx_func.h +@@ -704,9 +704,9 @@ int acx_setup_modes(acx_device_t *adev); void acx_free_modes(acx_device_t *adev); int acx_i_op_tx(struct ieee80211_hw *ieee, struct sk_buff *skb); int acx_e_op_add_interface(struct ieee80211_hw* ieee, @@ -14,11 +12,9 @@ Index: acx-mac80211-20100302/acx_func.h int acx_net_reset(struct ieee80211_hw *ieee); int acx_e_op_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd, struct ieee80211_vif *vif, struct ieee80211_sta *sta, -Index: acx-mac80211-20100302/common.c -=================================================================== ---- acx-mac80211-20100302.orig/common.c 2010-03-06 12:57:31.000000000 +0100 -+++ acx-mac80211-20100302/common.c 2010-03-06 12:59:51.000000000 +0100 -@@ -4402,7 +4402,7 @@ +--- a/common.c ++++ b/common.c +@@ -4402,7 +4402,7 @@ static void acx_s_select_opmode(acx_devi } int acx_e_op_add_interface(struct ieee80211_hw *ieee, @@ -27,7 +23,7 @@ Index: acx-mac80211-20100302/common.c { acx_device_t *adev = ieee2adev(ieee); unsigned long flags; -@@ -4414,14 +4414,14 @@ +@@ -4414,14 +4414,14 @@ int acx_e_op_add_interface(struct ieee80 acx_sem_lock(adev); acx_lock(adev, flags); @@ -45,7 +41,7 @@ Index: acx-mac80211-20100302/common.c } // adev->mode = conf->type; -@@ -4436,8 +4436,8 @@ +@@ -4436,8 +4436,8 @@ int acx_e_op_add_interface(struct ieee80 printk(KERN_INFO "acx: Virtual interface added " "(type: 0x%08X, MAC: %s)\n", @@ -56,7 +52,7 @@ Index: acx-mac80211-20100302/common.c out_unlock: acx_unlock(adev, flags); -@@ -4448,7 +4448,7 @@ +@@ -4448,7 +4448,7 @@ int acx_e_op_add_interface(struct ieee80 } void acx_e_op_remove_interface(struct ieee80211_hw *hw, @@ -65,7 +61,7 @@ Index: acx-mac80211-20100302/common.c { acx_device_t *adev = ieee2adev(hw); -@@ -4457,23 +4457,23 @@ +@@ -4457,23 +4457,23 @@ void acx_e_op_remove_interface(struct ie FN_ENTER; acx_sem_lock(adev); diff --git a/package/acx-mac80211/patches/002-tx_queue_stats_removal.patch b/package/acx-mac80211/patches/002-tx_queue_stats_removal.patch index 907b3596f..ccf1ad39d 100644 --- a/package/acx-mac80211/patches/002-tx_queue_stats_removal.patch +++ b/package/acx-mac80211/patches/002-tx_queue_stats_removal.patch @@ -1,8 +1,6 @@ -Index: acx-mac80211-20100302/acx_func.h -=================================================================== ---- acx-mac80211-20100302.orig/acx_func.h 2010-03-06 13:01:36.000000000 +0100 -+++ acx-mac80211-20100302/acx_func.h 2010-03-06 13:01:56.000000000 +0100 -@@ -714,7 +714,6 @@ +--- a/acx_func.h ++++ b/acx_func.h +@@ -714,7 +714,6 @@ int acx_e_op_set_key(struct ieee80211_hw int acx_e_op_config(struct ieee80211_hw *hw, u32 changed); void acx_e_op_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif, struct ieee80211_bss_conf *info, u32 changed); @@ -10,11 +8,9 @@ Index: acx-mac80211-20100302/acx_func.h int acx_e_conf_tx(struct ieee80211_hw* ieee, u16 queue, const struct ieee80211_tx_queue_params *params); //int acx_passive_scan(struct net_device *net_dev, int state, struct ieee80211_scan_conf *conf); -Index: acx-mac80211-20100302/common.c -=================================================================== ---- acx-mac80211-20100302.orig/common.c 2010-03-06 13:01:38.000000000 +0100 -+++ acx-mac80211-20100302/common.c 2010-03-06 13:02:37.000000000 +0100 -@@ -4662,24 +4662,6 @@ +--- a/common.c ++++ b/common.c +@@ -4662,24 +4662,6 @@ extern void acx_e_op_bss_info_changed(st return; } @@ -39,11 +35,9 @@ Index: acx-mac80211-20100302/common.c int acx_e_conf_tx(struct ieee80211_hw *hw, u16 queue, const struct ieee80211_tx_queue_params *params) { -Index: acx-mac80211-20100302/mem.c -=================================================================== ---- acx-mac80211-20100302.orig/mem.c 2010-03-06 13:01:46.000000000 +0100 -+++ acx-mac80211-20100302/mem.c 2010-03-06 13:02:28.000000000 +0100 -@@ -2321,7 +2321,6 @@ +--- a/mem.c ++++ b/mem.c +@@ -2321,7 +2321,6 @@ static const struct ieee80211_ops acxmem .bss_info_changed = acx_e_op_bss_info_changed, .set_key = acx_e_op_set_key, .get_stats = acx_e_op_get_stats, @@ -51,11 +45,9 @@ Index: acx-mac80211-20100302/mem.c }; -Index: acx-mac80211-20100302/pci.c -=================================================================== ---- acx-mac80211-20100302.orig/pci.c 2010-03-06 13:01:40.000000000 +0100 -+++ acx-mac80211-20100302/pci.c 2010-03-06 13:02:18.000000000 +0100 -@@ -1482,7 +1482,6 @@ +--- a/pci.c ++++ b/pci.c +@@ -1482,7 +1482,6 @@ static const struct ieee80211_ops acxpci .bss_info_changed = acx_e_op_bss_info_changed, .set_key = acx_e_op_set_key, .get_stats = acx_e_op_get_stats, @@ -63,11 +55,9 @@ Index: acx-mac80211-20100302/pci.c }; -Index: acx-mac80211-20100302/usb.c -=================================================================== ---- acx-mac80211-20100302.orig/usb.c 2010-03-06 13:01:44.000000000 +0100 -+++ acx-mac80211-20100302/usb.c 2010-03-06 13:02:22.000000000 +0100 -@@ -757,7 +757,6 @@ +--- a/usb.c ++++ b/usb.c +@@ -757,7 +757,6 @@ static const struct ieee80211_ops acxusb .bss_info_changed = acx_e_op_bss_info_changed, .set_key = acx_e_op_set_key, .get_stats = acx_e_op_get_stats, diff --git a/package/acx-mac80211/patches/003-build_as_modules.patch b/package/acx-mac80211/patches/003-build_as_modules.patch index 349de5686..31a6aae6c 100644 --- a/package/acx-mac80211/patches/003-build_as_modules.patch +++ b/package/acx-mac80211/patches/003-build_as_modules.patch @@ -1,8 +1,6 @@ -Index: acx-mac80211-20100302/Makefile -=================================================================== ---- acx-mac80211-20100302.orig/Makefile 2010-03-06 22:13:23.000000000 +0100 -+++ acx-mac80211-20100302/Makefile 2010-03-06 22:13:28.000000000 +0100 -@@ -29,7 +29,7 @@ +--- a/Makefile ++++ b/Makefile +@@ -29,7 +29,7 @@ ifneq ($(KERNELRELEASE),) acx-mac80211-obj-$(CONFIG_ACX_MAC80211_PCI) += pci.o acx-mac80211-obj-$(CONFIG_ACX_MAC80211_USB) += usb.o acx-mac80211-obj-$(CONFIG_ACX_MAC80211_MEM) += mem.o diff --git a/package/acx-mac80211/patches/004-vlynq_fixes.patch b/package/acx-mac80211/patches/004-vlynq_fixes.patch index 011c67d84..3e1a8bbc6 100644 --- a/package/acx-mac80211/patches/004-vlynq_fixes.patch +++ b/package/acx-mac80211/patches/004-vlynq_fixes.patch @@ -1,8 +1,6 @@ -Index: acx-mac80211-20100302/pci.c -=================================================================== ---- acx-mac80211-20100302.orig/pci.c 2010-03-06 22:22:02.000000000 +0100 -+++ acx-mac80211-20100302/pci.c 2010-03-06 22:22:29.000000000 +0100 -@@ -4309,7 +4309,7 @@ +--- a/pci.c ++++ b/pci.c +@@ -4309,7 +4309,7 @@ static __devinit int vlynq_probe(struct addr = (u32)ioremap(vdev->mem_start, 0x1000); if (!addr) { printk(KERN_ERR "acx: %s: failed to remap io memory\n", @@ -11,7 +9,7 @@ Index: acx-mac80211-20100302/pci.c result = -ENXIO; goto fail; } -@@ -4323,7 +4323,7 @@ +@@ -4323,7 +4323,7 @@ static __devinit int vlynq_probe(struct ieee = ieee80211_alloc_hw(sizeof(struct acx_device), &acxpci_hw_ops); if (!ieee) { printk("acx: could not allocate ieee80211 structure %s\n", @@ -20,7 +18,7 @@ Index: acx-mac80211-20100302/pci.c goto fail_alloc_netdev; } ieee->flags &= ~IEEE80211_HW_RX_INCLUDES_FCS; -@@ -4365,7 +4365,7 @@ +@@ -4365,7 +4365,7 @@ static __devinit int vlynq_probe(struct printk("acx: found %s-based wireless network card at %s, irq:%d, " "phymem:0x%x, mem:0x%p\n", @@ -29,7 +27,7 @@ Index: acx-mac80211-20100302/pci.c vdev->mem_start, adev->iobase); log(L_ANY, "acx: the initial debug setting is 0x%04X\n", acx_debug); -@@ -4416,7 +4416,7 @@ +@@ -4416,7 +4416,7 @@ static __devinit int vlynq_probe(struct * firmware operations happening in parallel or uninitialized data */ @@ -38,7 +36,7 @@ Index: acx-mac80211-20100302/pci.c /* Now we have our device, so make sure the kernel doesn't try * to send packets even though we're not associated to a network yet */ -@@ -4536,7 +4536,7 @@ +@@ -4536,7 +4536,7 @@ static void vlynq_remove(struct vlynq_de CLEAR_BIT(adev->dev_state_mask, ACX_STATE_IFACE_UP); } diff --git a/package/acx-mac80211/patches/005-do_not_override_pci.patch b/package/acx-mac80211/patches/005-do_not_override_pci.patch index b643c091b..e21549bf3 100644 --- a/package/acx-mac80211/patches/005-do_not_override_pci.patch +++ b/package/acx-mac80211/patches/005-do_not_override_pci.patch @@ -1,7 +1,5 @@ -Index: acx-mac80211-20100302/pci.c -=================================================================== ---- acx-mac80211-20100302.orig/pci.c 2010-03-07 12:39:38.000000000 +0100 -+++ acx-mac80211-20100302/pci.c 2010-03-07 12:40:02.000000000 +0100 +--- a/pci.c ++++ b/pci.c @@ -17,8 +17,6 @@ */ #define ACX_MAC80211_PCI 1 diff --git a/package/acx/patches/002-disable-usb.diff b/package/acx/patches/002-disable-usb.diff index 2c7eb1665..e3cf098f1 100644 --- a/package/acx/patches/002-disable-usb.diff +++ b/package/acx/patches/002-disable-usb.diff @@ -1,8 +1,6 @@ -Index: acx-20070101/Makefile -=================================================================== ---- acx-20070101.orig/Makefile 2007-06-04 13:22:42.463399864 +0200 -+++ acx-20070101/Makefile 2007-06-04 13:22:42.747356696 +0200 -@@ -1,7 +1,7 @@ +--- a/Makefile ++++ b/Makefile +@@ -4,7 +4,7 @@ KERNELDIR = /lib/modules/$(KVER)/build obj-m += acx.o acx-obj-y += pci.o @@ -11,15 +9,13 @@ Index: acx-20070101/Makefile acx-objs := wlan.o conv.o ioctl.o common.o $(acx-obj-y) -Index: acx-20070101/acx_config.h -=================================================================== ---- acx-20070101.orig/acx_config.h 2007-06-04 13:22:42.469398952 +0200 -+++ acx-20070101/acx_config.h 2007-06-04 13:22:42.747356696 +0200 +--- a/acx_config.h ++++ b/acx_config.h @@ -1,6 +1,6 @@ /* temporary hack until proper Kconfig integration */ #define CONFIG_ACX_PCI 1 -#define CONFIG_ACX_USB 1 +/*#define CONFIG_ACX_USB 1*/ - #define ACX_RELEASE "v0.3.36" + #define ACX_RELEASE "v0.3.37" diff --git a/package/acx/patches/003-encrypt-broadcast-traffic.diff b/package/acx/patches/003-encrypt-broadcast-traffic.diff index 7fd59f269..4743ab7b4 100644 --- a/package/acx/patches/003-encrypt-broadcast-traffic.diff +++ b/package/acx/patches/003-encrypt-broadcast-traffic.diff @@ -1,6 +1,6 @@ ---- acx-20080210/common.c.orig 2008-04-19 17:38:46.000000000 +0100 -+++ acx-20080210/common.c 2008-04-19 17:40:10.000000000 +0100 -@@ -4155,6 +4155,11 @@ +--- a/common.c ++++ b/common.c +@@ -4155,6 +4155,11 @@ acx_l_process_data_frame_master(acx_devi /* To_DS = 0, From_DS = 1 */ hdr->fc = WF_FC_FROMDSi + WF_FTYPE_DATAi; diff --git a/package/acx/patches/004-add_request_info.patch b/package/acx/patches/004-add_request_info.patch index ff71c7506..d432870e2 100644 --- a/package/acx/patches/004-add_request_info.patch +++ b/package/acx/patches/004-add_request_info.patch @@ -1,6 +1,6 @@ ---- acx-20080210/ioctl.c 2008-02-10 14:06:42.000000000 -0600 -+++ ioctl.c 2008-11-16 02:08:58.000000000 -0600 -@@ -488,6 +488,7 @@ +--- a/ioctl.c ++++ b/ioctl.c +@@ -488,6 +488,7 @@ end_unlock: /* helper. not sure whether it's really a _s_leeping fn */ static char* acx_s_scan_add_station( @@ -8,7 +8,7 @@ acx_device_t *adev, char *ptr, char *end_buf, -@@ -503,14 +504,14 @@ +@@ -503,14 +504,14 @@ acx_s_scan_add_station( iwe.u.ap_addr.sa_family = ARPHRD_ETHER; MAC_COPY(iwe.u.ap_addr.sa_data, bss->bssid); acxlog_mac(L_IOCTL, "scan, station address: ", bss->bssid, "\n"); @@ -25,7 +25,7 @@ /* Add mode */ iwe.cmd = SIOCGIWMODE; -@@ -520,7 +521,7 @@ +@@ -520,7 +521,7 @@ acx_s_scan_add_station( else iwe.u.mode = IW_MODE_ADHOC; log(L_IOCTL, "scan, mode: %d\n", iwe.u.mode); @@ -34,7 +34,7 @@ } /* Add frequency */ -@@ -528,7 +529,7 @@ +@@ -528,7 +529,7 @@ acx_s_scan_add_station( iwe.u.freq.m = acx_channel_freq[bss->channel - 1] * 100000; iwe.u.freq.e = 1; log(L_IOCTL, "scan, frequency: %d\n", iwe.u.freq.m); @@ -43,7 +43,7 @@ /* Add link quality */ iwe.cmd = IWEVQUAL; -@@ -546,7 +547,7 @@ +@@ -546,7 +547,7 @@ acx_s_scan_add_station( iwe.u.qual.updated = 7; log(L_IOCTL, "scan, link quality: %d/%d/%d\n", iwe.u.qual.level, iwe.u.qual.noise, iwe.u.qual.qual); @@ -52,7 +52,7 @@ /* Add encryption */ iwe.cmd = SIOCGIWENCODE; -@@ -556,7 +557,7 @@ +@@ -556,7 +557,7 @@ acx_s_scan_add_station( iwe.u.data.flags = IW_ENCODE_DISABLED; iwe.u.data.length = 0; log(L_IOCTL, "scan, encryption flags: %X\n", iwe.u.data.flags); @@ -61,7 +61,7 @@ /* add rates */ iwe.cmd = SIOCGIWRATE; -@@ -570,7 +571,7 @@ +@@ -570,7 +571,7 @@ acx_s_scan_add_station( if (rate & 1) { iwe.u.bitrate.value = *p * 500000; /* units of 500kb/s */ log(L_IOCTL, "scan, rate: %d\n", iwe.u.bitrate.value); @@ -70,7 +70,7 @@ &iwe, IW_EV_PARAM_LEN); } rate >>= 1; -@@ -625,7 +626,7 @@ +@@ -625,7 +626,7 @@ acx_ioctl_get_scan( for (i = 0; i < ARRAY_SIZE(adev->sta_list); i++) { struct client *bss = &adev->sta_list[i]; if (!bss->used) continue; @@ -79,4 +79,3 @@ extra + IW_SCAN_MAX_DATA, bss); } dwrq->length = ptr - extra; - diff --git a/package/acx/patches/005-2.6.30_fixes.patch b/package/acx/patches/005-2.6.30_fixes.patch index f72bcd623..7503a701f 100644 --- a/package/acx/patches/005-2.6.30_fixes.patch +++ b/package/acx/patches/005-2.6.30_fixes.patch @@ -1,7 +1,6 @@ -diff -urN acx-20080210/pci.c acx-20080210.new/pci.c ---- acx-20080210/pci.c 2009-08-04 00:28:37.000000000 +0200 -+++ acx-20080210.new/pci.c 2009-08-04 00:28:42.000000000 +0200 -@@ -2005,7 +2005,12 @@ +--- a/pci.c ++++ b/pci.c +@@ -2005,7 +2005,12 @@ static void acxpci_s_down(struct net_dev /* then wait until interrupts have finished executing on other CPUs */ acx_lock(adev, flags); disable_acx_irq(adev); @@ -14,7 +13,7 @@ diff -urN acx-20080210/pci.c acx-20080210.new/pci.c acx_unlock(adev, flags); /* we really don't want to have an asynchronous tasklet disturb us -@@ -4164,7 +4169,11 @@ +@@ -4164,7 +4169,11 @@ static __devinit int vlynq_probe(struct addr = (u32)ioremap(vdev->mem_start, 0x1000); if (!addr) { printk(KERN_ERR "%s: failed to remap io memory\n", @@ -26,7 +25,7 @@ diff -urN acx-20080210/pci.c acx-20080210.new/pci.c result = -ENXIO; goto fail; } -@@ -4231,7 +4240,11 @@ +@@ -4231,7 +4240,11 @@ static __devinit int vlynq_probe(struct printk("acx: found %s-based wireless network card at %s, irq:%d, " "phymem:0x%x, mem:0x%p\n", @@ -38,9 +37,8 @@ diff -urN acx-20080210/pci.c acx-20080210.new/pci.c vdev->mem_start, adev->iobase); log(L_ANY, "initial debug setting is 0x%04X\n", acx_debug); -diff -urN acx-20080210/wlan_compat.h acx-20080210.new/wlan_compat.h ---- acx-20080210/wlan_compat.h 2008-02-10 21:06:42.000000000 +0100 -+++ acx-20080210.new/wlan_compat.h 2009-08-04 00:24:26.000000000 +0200 +--- a/wlan_compat.h ++++ b/wlan_compat.h @@ -221,8 +221,10 @@ #ifndef IRQ_NONE #define IRQ_NONE diff --git a/package/acx/patches/006-netdev_ops.patch b/package/acx/patches/006-netdev_ops.patch index f974f17b0..210e92935 100644 --- a/package/acx/patches/006-netdev_ops.patch +++ b/package/acx/patches/006-netdev_ops.patch @@ -1,8 +1,6 @@ -Index: acx-20080210/pci.c -=================================================================== ---- acx-20080210.orig/pci.c 2010-03-06 13:43:06.000000000 +0100 -+++ acx-20080210/pci.c 2010-03-06 13:46:38.000000000 +0100 -@@ -4135,6 +4135,18 @@ +--- a/pci.c ++++ b/pci.c +@@ -4135,6 +4135,18 @@ static struct vlynq_device_id acx_vlynq_ { 0, 0, 0 }, }; @@ -21,7 +19,7 @@ Index: acx-20080210/pci.c static __devinit int vlynq_probe(struct vlynq_device *vdev, struct vlynq_device_id *id) { -@@ -4191,17 +4203,24 @@ +@@ -4191,17 +4203,24 @@ static __devinit int vlynq_probe(struct goto fail_alloc_netdev; } ether_setup(ndev); diff --git a/package/admswconfig/patches/001-matrix.patch b/package/admswconfig/patches/001-matrix.patch index 5f3b5b188..e50d51575 100644 --- a/package/admswconfig/patches/001-matrix.patch +++ b/package/admswconfig/patches/001-matrix.patch @@ -1,6 +1,6 @@ ---- admswconfig-0.1.orig/admswconfig.c 2007-05-30 12:55:35.000000000 +0200 -+++ admswconfig-0.1/admswconfig.c 2007-07-24 19:22:14.000000000 +0200 -@@ -111,9 +111,9 @@ +--- a/admswconfig.c ++++ b/admswconfig.c +@@ -111,9 +111,9 @@ int main(int argc, char **argv) } } else { /* display matrix */ diff --git a/package/apex/patches/100-openwrt_nslu2_armeb_config.patch b/package/apex/patches/100-openwrt_nslu2_armeb_config.patch index 55267d40a..49933eab3 100644 --- a/package/apex/patches/100-openwrt_nslu2_armeb_config.patch +++ b/package/apex/patches/100-openwrt_nslu2_armeb_config.patch @@ -1,6 +1,6 @@ ---- apex-1.5.6/src/mach-ixp42x/slugos-nslu2-armeb_config 2007-06-02 10:06:45.000000000 +0930 -+++ apex-1.5.6/src/mach-ixp42x/slugos-nslu2-armeb_config~ 2007-06-03 02:22:18.000000000 +0930 -@@ -17,7 +17,7 @@ +--- a/src/mach-ixp42x/slugos-nslu2-armeb_config ++++ b/src/mach-ixp42x/slugos-nslu2-armeb_config +@@ -17,7 +17,7 @@ CONFIG_EXPERIMENTAL=y # # General Setup # @@ -9,7 +9,7 @@ CONFIG_CROSS_COMPILE="" CONFIG_AEABI=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y -@@ -143,7 +143,7 @@ +@@ -150,9 +150,9 @@ CONFIG_ENV_REGION_KERNEL_ALT="fis://kern # Overrides # CONFIG_ENV_DEFAULT_CMDLINE_OVERRIDE=y @@ -19,3 +19,5 @@ -CONFIG_ENV_DEFAULT_CMDLINE_ALT="root=/dev/mtdblock4 rootfstype=jffs2 console=ttyS0,115200" +CONFIG_ENV_DEFAULT_CMDLINE_ALT="root=/dev/mtdblock4 rootfstype=squashfs,jffs2 console=ttyS0,115200 init=/etc/preinit noinitrd" # CONFIG_ENV_DEFAULT_STARTUP_OVERRIDE is not set + # CONFIG_ENV_DEFAULT_STARTUP_ALT_P is not set + CONFIG_USES_NOR_BOOTFLASH=y diff --git a/package/apex/patches/120-openwrt_nslu2_16mb_armeb_config.patch b/package/apex/patches/120-openwrt_nslu2_16mb_armeb_config.patch index a358c3f3b..47920914b 100644 --- a/package/apex/patches/120-openwrt_nslu2_16mb_armeb_config.patch +++ b/package/apex/patches/120-openwrt_nslu2_16mb_armeb_config.patch @@ -1,6 +1,6 @@ ---- apex-1.5.6/src/mach-ixp42x/slugos-nslu2-16mb-armeb_config 2007-06-02 10:06:45.000000000 +0930 -+++ apex-1.5.6/src/mach-ixp42x/slugos-nslu2-16mb-armeb_config~ 2007-06-03 02:22:18.000000000 +0930 -@@ -17,7 +17,7 @@ +--- a/src/mach-ixp42x/slugos-nslu2-16mb-armeb_config ++++ b/src/mach-ixp42x/slugos-nslu2-16mb-armeb_config +@@ -17,7 +17,7 @@ CONFIG_EXPERIMENTAL=y # # General Setup # @@ -9,7 +9,7 @@ CONFIG_CROSS_COMPILE="" CONFIG_AEABI=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y -@@ -143,7 +143,7 @@ +@@ -150,9 +150,9 @@ CONFIG_ENV_REGION_KERNEL_ALT="fis://kern # Overrides # CONFIG_ENV_DEFAULT_CMDLINE_OVERRIDE=y @@ -19,3 +19,5 @@ -CONFIG_ENV_DEFAULT_CMDLINE_ALT="root=/dev/mtdblock4 rootfstype=jffs2 console=ttyS0,115200" +CONFIG_ENV_DEFAULT_CMDLINE_ALT="root=/dev/mtdblock4 rootfstype=squashfs,jffs2 console=ttyS0,115200 init=/etc/preinit noinitrd" # CONFIG_ENV_DEFAULT_STARTUP_OVERRIDE is not set + # CONFIG_ENV_DEFAULT_STARTUP_ALT_P is not set + CONFIG_USES_NOR_BOOTFLASH=y diff --git a/package/apex/patches/140-openwrt_fsg3_armeb_config.patch b/package/apex/patches/140-openwrt_fsg3_armeb_config.patch index 1deacf3c2..a1651e69a 100644 --- a/package/apex/patches/140-openwrt_fsg3_armeb_config.patch +++ b/package/apex/patches/140-openwrt_fsg3_armeb_config.patch @@ -1,15 +1,15 @@ ---- apex-1.5.6/src/mach-ixp42x/slugos-fsg3-armeb_config 2007-06-02 10:06:45.000000000 +0930 -+++ apex-1.5.6/src/mach-ixp42x/slugos-fsg3-armeb_config~ 2007-06-03 02:22:18.000000000 +0930 -@@ -17,7 +17,7 @@ +--- a/src/mach-ixp42x/slugos-fsg3-armeb_config ++++ b/src/mach-ixp42x/slugos-fsg3-armeb_config +@@ -17,7 +17,7 @@ CONFIG_EXPERIMENTAL=y # # General Setup # -CONFIG_TARGET_DESCRIPTION="SlugOS FSG3/BE" +CONFIG_TARGET_DESCRIPTION="OpenWRT FSG3" CONFIG_CROSS_COMPILE="" + CONFIG_AEABI=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y - # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set -@@ -143,7 +143,7 @@ +@@ -148,9 +148,9 @@ CONFIG_ENV_REGION_KERNEL_ALT="fis://kern # Overrides # CONFIG_ENV_DEFAULT_CMDLINE_OVERRIDE=y @@ -19,3 +19,5 @@ -CONFIG_ENV_DEFAULT_CMDLINE_ALT="root=/dev/sda2 rootdelay=10 console=ttyS0,115200" +CONFIG_ENV_DEFAULT_CMDLINE_ALT="root=/dev/mtdblock2 rootfstype=squashfs console=ttyS0,115200 init=/etc/preinit noinitrd" # CONFIG_ENV_DEFAULT_STARTUP_OVERRIDE is not set + # CONFIG_ENV_DEFAULT_STARTUP_ALT_P is not set + CONFIG_USES_NOR_BOOTFLASH=y diff --git a/package/apex/patches/150-limit_ram_to_64mb.patch b/package/apex/patches/150-limit_ram_to_64mb.patch index 79ecd9759..3e178166e 100644 --- a/package/apex/patches/150-limit_ram_to_64mb.patch +++ b/package/apex/patches/150-limit_ram_to_64mb.patch @@ -1,6 +1,6 @@ ---- apex-1.5.13/src/mach-ixp42x/slugos-nslu2-armeb_config~ 2008-11-28 14:05:56.905634749 +0000 -+++ apex-1.5.13/src/mach-ixp42x/slugos-nslu2-armeb_config 2008-12-06 13:15:49.857504031 +0000 -@@ -135,7 +135,7 @@ +--- a/src/mach-ixp42x/slugos-nslu2-armeb_config ++++ b/src/mach-ixp42x/slugos-nslu2-armeb_config +@@ -137,7 +137,7 @@ CONFIG_AUTOBOOT_DELAY=10 CONFIG_ENV_STARTUP_KERNEL_COPY=y # CONFIG_ENV_REGION_KERNEL_SWAP is not set CONFIG_ENV_STARTUP_PREFIX_P=y @@ -9,9 +9,9 @@ # # Regions ---- apex-1.5.13/src/mach-ixp42x/slugos-nslu2-16mb-armeb_config~ 2008-11-28 14:05:56.905634749 +0000 -+++ apex-1.5.13/src/mach-ixp42x/slugos-nslu2-16mb-armeb_config 2008-12-06 13:17:41.311867740 +0000 -@@ -135,7 +135,7 @@ +--- a/src/mach-ixp42x/slugos-nslu2-16mb-armeb_config ++++ b/src/mach-ixp42x/slugos-nslu2-16mb-armeb_config +@@ -137,7 +137,7 @@ CONFIG_AUTOBOOT_DELAY=10 CONFIG_ENV_STARTUP_KERNEL_COPY=y # CONFIG_ENV_REGION_KERNEL_SWAP is not set CONFIG_ENV_STARTUP_PREFIX_P=y diff --git a/package/apex/patches/160-openwrt_nas100d_armeb_config.patch b/package/apex/patches/160-openwrt_nas100d_armeb_config.patch index 2eb9b6cbc..83d8c3f71 100644 --- a/package/apex/patches/160-openwrt_nas100d_armeb_config.patch +++ b/package/apex/patches/160-openwrt_nas100d_armeb_config.patch @@ -1,18 +1,20 @@ ---- apex-1.5.6/src/mach-ixp42x/slugos-nas100d-armeb_config 2007-06-02 10:06:45.000000000 +0930 -+++ apex-1.5.6/src/mach-ixp42x/slugos-nas100d-armeb_config~ 2007-06-03 02:22:18.000000000 +0930 -@@ -17,7 +17,7 @@ +--- a/src/mach-ixp42x/slugos-nas100d-armeb_config ++++ b/src/mach-ixp42x/slugos-nas100d-armeb_config +@@ -17,7 +17,7 @@ CONFIG_EXPERIMENTAL=y # # General Setup # -CONFIG_TARGET_DESCRIPTION="SlugOS NAS100D/BE" +CONFIG_TARGET_DESCRIPTION="OpenWRT NAS100D" CONFIG_CROSS_COMPILE="" + CONFIG_AEABI=y CONFIG_CC_OPTIMIZE_FOR_SIZE=y - # CONFIG_CC_OPTIMIZE_FOR_SPEED is not set -@@ -143,5 +143,5 @@ +@@ -145,7 +145,7 @@ CONFIG_ENV_REGION_KERNEL="fis://kernel" # Overrides # CONFIG_ENV_DEFAULT_CMDLINE_OVERRIDE=y -CONFIG_ENV_DEFAULT_CMDLINE="root=/dev/mtdblock2 rootfstype=jffs2 console=ttyS0,115200" +CONFIG_ENV_DEFAULT_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 console=ttyS0,115200 init=/etc/preinit noinitrd" # CONFIG_ENV_DEFAULT_STARTUP_OVERRIDE is not set + CONFIG_USES_NOR_BOOTFLASH=y + CONFIG_RELOCATE_SIMPLE=y diff --git a/package/avila-wdt/src/avila-wdt.c b/package/avila-wdt/src/avila-wdt.c index 18644bc60..981f3857a 100644 --- a/package/avila-wdt/src/avila-wdt.c +++ b/package/avila-wdt/src/avila-wdt.c @@ -21,6 +21,8 @@ #include #include #include +#include +#include #include #include #include diff --git a/package/base-files/Makefile b/package/base-files/Makefile index 7f44cf756..f72d433bd 100644 --- a/package/base-files/Makefile +++ b/package/base-files/Makefile @@ -10,7 +10,7 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=base-files -PKG_RELEASE:=40 +PKG_RELEASE:=41 PKG_FILE_DEPENDS:=$(PLATFORM_DIR)/ $(GENERIC_PLATFORM_DIR)/base-files/ diff --git a/package/base-files/files/etc/config/system b/package/base-files/files/etc/config/system index b0726b7b7..3f121bd4d 100644 --- a/package/base-files/files/etc/config/system +++ b/package/base-files/files/etc/config/system @@ -1,3 +1,12 @@ config system option hostname OpenWrt option timezone UTC + +config rdate + list server ac-ntp0.net.cmu.edu + list server ptbtime1.ptb.de + list server ac-ntp1.net.cmu.edu + list server ntp.xs4all.nl + list server ptbtime2.ptb.de + list server cudns.cit.cornell.edu + list server ptbtime3.ptb.de diff --git a/package/base-files/files/etc/hotplug.d/iface/40-rdate b/package/base-files/files/etc/hotplug.d/iface/40-rdate new file mode 100644 index 000000000..cf56c02ac --- /dev/null +++ b/package/base-files/files/etc/hotplug.d/iface/40-rdate @@ -0,0 +1,46 @@ +uci_get_one() +{ + for var in "$@"; do + uci -P /var/state get "$var" 2>/dev/null && break + done +} + +rand() +{ + random=$(awk 'BEGIN { srand(); print int(rand() * 10 + 1); }') +} + +sync_rdate() +{ + local servers=$(uci_get_one "network.$INTERFACE.lease_timesrv" \ + "system.@rdate[0].server") + + if [ -n "$servers" ]; then + match=0 + tries=3 + rand + + while [ $match = 0 ] && [ $tries != 0 ]; do + for server in $servers; do + if [ $((--random)) = 0 ]; then + rdate -s $server >/dev/null 2>/dev/null && { + logger -t rdate "Synced with $server" + match=1 + } || { + logger -t rdate "Failed to sync with $server" + let tries="$tries - 1" + rand + } + + break + fi + done + done + else + logger -t rdate "No usable time server found" + fi +} + +case "$ACTION" in + ifup) route -n | grep -q ^0.0.0.0 && sync_rdate;; +esac diff --git a/package/base-files/files/etc/rc.common b/package/base-files/files/etc/rc.common index 2b7bf5a11..072f14354 100755 --- a/package/base-files/files/etc/rc.common +++ b/package/base-files/files/etc/rc.common @@ -74,5 +74,5 @@ EOF ALL_COMMANDS="start stop reload restart boot shutdown enable disable enabled depends ${EXTRA_COMMANDS}" list_contains ALL_COMMANDS "$action" || action=help -[ "$action" == reload ] && action='eval reload "$@" || restart "$@" && :' +[ "$action" = "reload" ] && action='eval reload "$@" || restart "$@" && :' $action "$@" diff --git a/package/base-files/files/lib/preinit/30_failsafe_wait b/package/base-files/files/lib/preinit/30_failsafe_wait index 30173c515..04dc57df2 100644 --- a/package/base-files/files/lib/preinit/30_failsafe_wait +++ b/package/base-files/files/lib/preinit/30_failsafe_wait @@ -39,7 +39,7 @@ fs_wait_for_key () { rm -f $keypress_wait } & - echo "Press $1 $2" + echo "Press the [$1] key and hit [enter] $2" # if we're on the console we wait for input { while [ -r $keypress_wait ]; do diff --git a/package/block-extroot/files/50_determine_usb_root b/package/block-extroot/files/50_determine_usb_root index 192990c91..0de9be384 100644 --- a/package/block-extroot/files/50_determine_usb_root +++ b/package/block-extroot/files/50_determine_usb_root @@ -38,7 +38,7 @@ determine_external_root() { config_load fstab config_foreach config_mount_by_section mount 1 - [ "$rootfs_found" = "1" ] && grep -q /overlay /proc/mounts && { + [ "$rootfs_found" = "1" ] && grep -q ' /overlay ' /proc/mounts && { pi_extroot_mount_success=true pi_mount_skip_next=false } diff --git a/package/br2684ctl/Makefile b/package/br2684ctl/Makefile index 4de325ac8..4af040b4e 100644 --- a/package/br2684ctl/Makefile +++ b/package/br2684ctl/Makefile @@ -6,6 +6,7 @@ # include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=br2684ctl PKG_VERSION:=20040226 @@ -15,7 +16,7 @@ PKG_SOURCE:=$(PKG_NAME)_$(PKG_VERSION).orig.tar.gz PKG_SOURCE_URL:=http://ftp.debian.org/debian/pool/main/b/br2684ctl PKG_MD5SUM:=6eb4d8cd174e24a7c078eb4f594f5b69 -PKG_BUILD_DIR:=$(BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION).orig +PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION).orig PKG_BUILD_DEPENDS:=linux-atm include $(INCLUDE_DIR)/package.mk @@ -28,6 +29,7 @@ define Package/$(PKG_NAME) URL:=http://ftp.debian.org/debian/pool/main/b/br2684ctl endef +TARGET_CPPFLAGS += -I$(LINUX_DIR)/include MAKE_FLAGS += CFLAGS="$(TARGET_CPPFLAGS) $(TARGET_CFLAGS) $(TARGET_LDFLAGS)" define Package/$(PKG_NAME)/install diff --git a/package/br2684ctl/patches/100-debian.patch b/package/br2684ctl/patches/100-debian.patch index 45f63640d..8a8b3b743 100644 --- a/package/br2684ctl/patches/100-debian.patch +++ b/package/br2684ctl/patches/100-debian.patch @@ -1,7 +1,5 @@ -Index: br2684ctl-20040226.orig/br2684ctl.c -=================================================================== ---- br2684ctl-20040226.orig.orig/br2684ctl.c 2007-06-04 13:22:22.142489112 +0200 -+++ br2684ctl-20040226.orig/br2684ctl.c 2007-06-04 13:22:22.213478320 +0200 +--- a/br2684ctl.c ++++ b/br2684ctl.c @@ -3,6 +3,8 @@ #include #include @@ -24,7 +22,7 @@ Index: br2684ctl-20040226.orig/br2684ctl.c int lastsock, lastitf; -@@ -39,10 +41,16 @@ +@@ -39,10 +41,16 @@ void fatal(const char *str, int i) void exitFunc(void) { @@ -42,7 +40,7 @@ Index: br2684ctl-20040226.orig/br2684ctl.c int create_pidfile(int num) { FILE *pidfile = NULL; -@@ -80,7 +88,7 @@ +@@ -80,7 +88,7 @@ int create_br(char *nstr) err=ioctl (lastsock, ATM_NEWBACKENDIF, &ni); if (err == 0) @@ -51,7 +49,7 @@ Index: br2684ctl-20040226.orig/br2684ctl.c else syslog(LOG_INFO, "Interface \"%s\" could not be created, reason: %s\n", ni.ifname, -@@ -112,7 +120,7 @@ +@@ -112,7 +120,7 @@ int assign_vcc(char *astr, int encap, in addr.sap_addr.vpi = 0; addr.sap_addr.vci = vci; #endif @@ -60,7 +58,7 @@ Index: br2684ctl-20040226.orig/br2684ctl.c addr.sap_addr.vpi, addr.sap_addr.vci, encap?"VC mux":"LLC"); -@@ -261,11 +269,13 @@ +@@ -261,11 +269,13 @@ int main (int argc, char **argv) } create_pidfile(itfnum); @@ -75,10 +73,8 @@ Index: br2684ctl-20040226.orig/br2684ctl.c return 0; } -Index: br2684ctl-20040226.orig/Makefile -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ br2684ctl-20040226.orig/Makefile 2007-06-04 13:22:22.215478016 +0200 +--- /dev/null ++++ b/Makefile @@ -0,0 +1,13 @@ +OPTS := -O2 +CFLAGS := -Wall -g diff --git a/package/br2684ctl/patches/101-routed_support.patch b/package/br2684ctl/patches/101-routed_support.patch index 8c73a4364..afad9329e 100644 --- a/package/br2684ctl/patches/101-routed_support.patch +++ b/package/br2684ctl/patches/101-routed_support.patch @@ -1,6 +1,5 @@ -diff -Nu br2684ctl-20040226.orig/br2684ctl.c br2684ctl.orig/br2684ctl.c ---- br2684ctl-20040226.orig/br2684ctl.c 2008-03-25 22:26:59.000000000 +0000 -+++ br2684ctl.orig/br2684ctl.c 2008-03-31 10:11:06.000000000 +0100 +--- a/br2684ctl.c ++++ b/br2684ctl.c @@ -10,6 +10,10 @@ #include #include @@ -52,7 +51,7 @@ diff -Nu br2684ctl-20040226.orig/br2684ctl.c br2684ctl.orig/br2684ctl.c exit(0); } -@@ -58,7 +71,7 @@ +@@ -58,7 +71,7 @@ int create_pidfile(int num) if (num < 0) return -1; @@ -61,7 +60,7 @@ diff -Nu br2684ctl-20040226.orig/br2684ctl.c br2684ctl.orig/br2684ctl.c pidfile = fopen(name, "w"); if (pidfile == NULL) return -1; fprintf(pidfile, "%d", getpid()); -@@ -67,9 +80,9 @@ +@@ -67,9 +80,9 @@ int create_pidfile(int num) return 0; } @@ -73,7 +72,7 @@ diff -Nu br2684ctl-20040226.orig/br2684ctl.c br2684ctl.orig/br2684ctl.c if(lastsock<0) { lastsock = socket(PF_ATMPVC, SOCK_DGRAM, ATM_AAL5); -@@ -78,31 +91,36 @@ +@@ -78,31 +91,36 @@ int create_br(char *nstr) syslog(LOG_ERR, "socket creation failed: %s",strerror(errno)); } else { /* create the device with ioctl: */ @@ -118,7 +117,7 @@ diff -Nu br2684ctl-20040226.orig/br2684ctl.c br2684ctl.orig/br2684ctl.c { int err; struct sockaddr_atmpvc addr; -@@ -112,21 +130,17 @@ +@@ -112,21 +130,17 @@ int assign_vcc(char *astr, int encap, in memset(&addr, 0, sizeof(addr)); err=text2atm(astr,(struct sockaddr *)(&addr), sizeof(addr), T2A_PVC); if (err!=0) @@ -145,7 +144,7 @@ diff -Nu br2684ctl-20040226.orig/br2684ctl.c br2684ctl.orig/br2684ctl.c if (qos.aal == 0) { qos.aal = ATM_AAL5; -@@ -137,7 +151,7 @@ +@@ -137,7 +151,7 @@ int assign_vcc(char *astr, int encap, in } if ( (err=setsockopt(fd,SOL_SOCKET,SO_SNDBUF, &bufsize ,sizeof(bufsize))) ) @@ -154,7 +153,7 @@ diff -Nu br2684ctl-20040226.orig/br2684ctl.c br2684ctl.orig/br2684ctl.c if (setsockopt(fd, SOL_ATM, SO_ATMQOS, &qos, sizeof(qos)) < 0) syslog(LOG_ERR,"setsockopt SO_ATMQOS %d", errno); -@@ -145,7 +159,7 @@ +@@ -145,7 +159,7 @@ int assign_vcc(char *astr, int encap, in err = connect(fd, (struct sockaddr*)&addr, sizeof(struct sockaddr_atmpvc)); if (err < 0) @@ -163,7 +162,7 @@ diff -Nu br2684ctl-20040226.orig/br2684ctl.c br2684ctl.orig/br2684ctl.c /* attach the vcc to device: */ -@@ -169,10 +183,30 @@ +@@ -169,10 +183,30 @@ int assign_vcc(char *astr, int encap, in return fd ; } @@ -195,7 +194,7 @@ diff -Nu br2684ctl-20040226.orig/br2684ctl.c br2684ctl.orig/br2684ctl.c exit(1); } -@@ -180,47 +214,63 @@ +@@ -180,47 +214,63 @@ void usage(char *s) int main (int argc, char **argv) { @@ -276,7 +275,7 @@ diff -Nu br2684ctl-20040226.orig/br2684ctl.c br2684ctl.orig/br2684ctl.c case '?': case 'h': default: -@@ -231,6 +281,8 @@ +@@ -231,6 +281,8 @@ int main (int argc, char **argv) if (argc != optind) usage(argv[0]); @@ -285,7 +284,7 @@ diff -Nu br2684ctl-20040226.orig/br2684ctl.c br2684ctl.orig/br2684ctl.c if(lastsock>=0) close(lastsock); if (background) { -@@ -268,11 +275,11 @@ +@@ -268,11 +320,11 @@ int main (int argc, char **argv) } diff --git a/package/bridge-utils/patches/001-libbridge_cflags.patch b/package/bridge-utils/patches/001-libbridge_cflags.patch index cfd5cf785..e35a64947 100644 --- a/package/bridge-utils/patches/001-libbridge_cflags.patch +++ b/package/bridge-utils/patches/001-libbridge_cflags.patch @@ -1,6 +1,6 @@ --- a/libbridge/Makefile.in +++ b/libbridge/Makefile.in -@@ -5,7 +5,7 @@ +@@ -5,7 +5,7 @@ AR=ar RANLIB=@RANLIB@ CC=@CC@ diff --git a/package/broadcom-wl/patches/100-timer_fix.patch b/package/broadcom-wl/patches/100-timer_fix.patch index c3d9f63bb..d1ce9c982 100644 --- a/package/broadcom-wl/patches/100-timer_fix.patch +++ b/package/broadcom-wl/patches/100-timer_fix.patch @@ -1,8 +1,6 @@ -Index: broadcom-wl-4.150.10.5.2/router/shared/linux_timer.c -=================================================================== ---- broadcom-wl-4.150.10.5.2.orig/router/shared/linux_timer.c 2008-04-07 00:15:24.914329846 +0200 -+++ broadcom-wl-4.150.10.5.2/router/shared/linux_timer.c 2008-04-07 00:14:52.288470602 +0200 -@@ -94,6 +94,7 @@ +--- a/router/shared/linux_timer.c ++++ b/router/shared/linux_timer.c +@@ -94,6 +94,7 @@ typedef long uclock_t; #define TFLAG_NONE 0 #define TFLAG_CANCELLED (1<<0) #define TFLAG_DELETED (1<<1) @@ -10,7 +8,7 @@ Index: broadcom-wl-4.150.10.5.2/router/shared/linux_timer.c struct event { struct timeval it_interval; -@@ -207,6 +208,7 @@ +@@ -207,6 +208,7 @@ int timer_create( event_freelist = event->next; event->next = NULL; @@ -18,7 +16,7 @@ Index: broadcom-wl-4.150.10.5.2/router/shared/linux_timer.c check_event_queue(); -@@ -387,6 +389,7 @@ +@@ -387,6 +389,7 @@ int timer_settime } event->flags &= ~TFLAG_CANCELLED; @@ -26,7 +24,7 @@ Index: broadcom-wl-4.150.10.5.2/router/shared/linux_timer.c unblock_timer(); -@@ -502,7 +505,15 @@ +@@ -502,7 +505,15 @@ static void alarm_handler(int i) (*(event->func))((timer_t) event, (int)event->arg); /* If the event has been cancelled, do NOT put it back on the queue. */ @@ -43,7 +41,7 @@ Index: broadcom-wl-4.150.10.5.2/router/shared/linux_timer.c /* if the event is a recurring event, reset the timer and * find its correct place in the sorted list of events. -@@ -545,6 +556,7 @@ +@@ -545,6 +556,7 @@ static void alarm_handler(int i) /* link our new event into the pending event queue. */ event->next = *ppevent; *ppevent = event; diff --git a/package/busybox/config/networking/Config.in b/package/busybox/config/networking/Config.in index 35dae5f59..77a7b07c3 100644 --- a/package/busybox/config/networking/Config.in +++ b/package/busybox/config/networking/Config.in @@ -144,13 +144,13 @@ config BUSYBOX_CONFIG_HOSTNAME config BUSYBOX_CONFIG_HTTPD bool "httpd" - default y + default n help Serve web pages via an HTTP server. config BUSYBOX_CONFIG_FEATURE_HTTPD_RANGES bool "Support 'Ranges:' header" - default y + default n depends on BUSYBOX_CONFIG_HTTPD help Makes httpd emit "Accept-Ranges: bytes" header and understand @@ -177,7 +177,7 @@ config BUSYBOX_CONFIG_FEATURE_HTTPD_SETUID config BUSYBOX_CONFIG_FEATURE_HTTPD_BASIC_AUTH bool "Enable Basic http Authentication" - default y + default n depends on BUSYBOX_CONFIG_HTTPD help Utilizes password settings from /etc/httpd.conf for basic @@ -185,7 +185,7 @@ config BUSYBOX_CONFIG_FEATURE_HTTPD_BASIC_AUTH config BUSYBOX_CONFIG_FEATURE_HTTPD_AUTH_MD5 bool "Support MD5 crypted passwords for http Authentication" - default y + default n depends on BUSYBOX_CONFIG_FEATURE_HTTPD_BASIC_AUTH help Enables basic per URL authentication from /etc/httpd.conf @@ -193,7 +193,7 @@ config BUSYBOX_CONFIG_FEATURE_HTTPD_AUTH_MD5 config BUSYBOX_CONFIG_FEATURE_HTTPD_CGI bool "Support Common Gateway Interface (CGI)" - default y + default n depends on BUSYBOX_CONFIG_HTTPD help This option allows scripts and executables to be invoked @@ -201,7 +201,7 @@ config BUSYBOX_CONFIG_FEATURE_HTTPD_CGI config BUSYBOX_CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR bool "Support for running scripts through an interpreter" - default y + default n depends on BUSYBOX_CONFIG_FEATURE_HTTPD_CGI help This option enables support for running scripts through an @@ -212,7 +212,7 @@ config BUSYBOX_CONFIG_FEATURE_HTTPD_CONFIG_WITH_SCRIPT_INTERPR config BUSYBOX_CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV bool "Set REMOTE_PORT environment variable for CGI" - default y + default n depends on BUSYBOX_CONFIG_FEATURE_HTTPD_CGI help Use of this option can assist scripts in generating @@ -220,7 +220,7 @@ config BUSYBOX_CONFIG_FEATURE_HTTPD_SET_REMOTE_PORT_TO_ENV config BUSYBOX_CONFIG_FEATURE_HTTPD_ENCODE_URL_STR bool "Enable -e option (useful for CGIs written as shell scripts)" - default y + default n depends on BUSYBOX_CONFIG_HTTPD help This option allows html encoding of arbitrary strings for display @@ -230,7 +230,7 @@ config BUSYBOX_CONFIG_FEATURE_HTTPD_ENCODE_URL_STR config BUSYBOX_CONFIG_FEATURE_HTTPD_ERROR_PAGES bool "Support for custom error pages" - default y + default n depends on BUSYBOX_CONFIG_HTTPD help This option allows you to define custom error pages in @@ -243,7 +243,7 @@ config BUSYBOX_CONFIG_FEATURE_HTTPD_ERROR_PAGES config BUSYBOX_CONFIG_FEATURE_HTTPD_PROXY bool "Support for reverse proxy" - default y + default n depends on BUSYBOX_CONFIG_HTTPD help This option allows you to define URLs that will be forwarded diff --git a/package/busybox/files/httpd b/package/busybox/files/httpd deleted file mode 100755 index 3714a02de..000000000 --- a/package/busybox/files/httpd +++ /dev/null @@ -1,54 +0,0 @@ -#!/bin/sh /etc/rc.common -# Copyright (C) 2006 OpenWrt.org - -START=50 -HTTPD_BIN="/usr/sbin/httpd" - -system_config() { - local cfg="$1" - - config_get hostname "$cfg" hostname -} - -httpd_config() { - local cfg="$1" - local c_file port realm home args - - config_get c_file "$cfg" c_file - [ -n "$c_file" -a -f "$c_file" ] && append args "-c \"$c_file\"" - config_get port "$cfg" port - append args "-p ${port:-80}" - config_get home "$cfg" home - home="${home:-/www}" - [ -d "$home" ] || return 1 - append args "-h \"$home\"" - config_get realm "$cfg" realm - realm="${realm:-$hostname}" - append args "-r \"$realm\"" - eval "$HTTPD_BIN $args" -} - -start() { - [ -x "$HTTPD_BIN" ] || return 1 - - unset hostname - config_load system - config_foreach system_config system - hostname="${hostname:-OpenWrt}" - - unset args - config_load httpd - [ "$?" != "0" ] && { - uci_set_default httpd <u.sin; -@@ -101,7 +102,7 @@ +@@ -101,7 +102,7 @@ static void ping4(len_and_sockaddr *lsa) pkt->icmp_type = ICMP_ECHO; pkt->icmp_cksum = in_cksum((unsigned short *) pkt, sizeof(packet)); @@ -28,7 +26,7 @@ Index: busybox-1.15.3/networking/ping.c (struct sockaddr *) &pingaddr, sizeof(pingaddr)); /* listen for replies */ -@@ -135,7 +136,7 @@ +@@ -135,7 +136,7 @@ static void ping6(len_and_sockaddr *lsa) struct icmp6_hdr *pkt; int pingsock, c; int sockopt; @@ -37,7 +35,7 @@ Index: busybox-1.15.3/networking/ping.c pingsock = create_icmp6_socket(); pingaddr = lsa->u.sin6; -@@ -147,7 +148,7 @@ +@@ -147,7 +148,7 @@ static void ping6(len_and_sockaddr *lsa) sockopt = offsetof(struct icmp6_hdr, icmp6_cksum); setsockopt(pingsock, SOL_RAW, IPV6_CHECKSUM, &sockopt, sizeof(sockopt)); diff --git a/package/carl9170/patches/100-request_firmware_compat.patch b/package/carl9170/patches/100-request_firmware_compat.patch index 93fdc6f08..f1dae2d01 100644 --- a/package/carl9170/patches/100-request_firmware_compat.patch +++ b/package/carl9170/patches/100-request_firmware_compat.patch @@ -1,6 +1,6 @@ --- a/drivers/net/wireless/ath/carl9170/usb.c +++ b/drivers/net/wireless/ath/carl9170/usb.c -@@ -983,11 +983,28 @@ err_failed: +@@ -988,11 +988,28 @@ err_failed: ar9170_usb_firmware_failed(aru); } diff --git a/package/carl9170/patches/110-ht_default.patch b/package/carl9170/patches/110-ht_default.patch index aa629497c..5e1c4bccf 100644 --- a/package/carl9170/patches/110-ht_default.patch +++ b/package/carl9170/patches/110-ht_default.patch @@ -1,6 +1,6 @@ --- a/drivers/net/wireless/ath/carl9170/main.c +++ b/drivers/net/wireless/ath/carl9170/main.c -@@ -50,7 +50,7 @@ static int modparam_nohwcrypt; +@@ -51,7 +51,7 @@ static int modparam_nohwcrypt; module_param_named(nohwcrypt, modparam_nohwcrypt, bool, S_IRUGO); MODULE_PARM_DESC(nohwcrypt, "Disable hardware encryption."); diff --git a/package/comgt/patches/001-Makefile.patch b/package/comgt/patches/001-Makefile.patch index 32b56b12b..ed3e9183d 100644 --- a/package/comgt/patches/001-Makefile.patch +++ b/package/comgt/patches/001-Makefile.patch @@ -1,7 +1,5 @@ -Index: comgt.0.32/Makefile -=================================================================== ---- comgt.0.32.orig/Makefile 2007-06-04 13:22:22.665409616 +0200 -+++ comgt.0.32/Makefile 2007-06-04 13:22:22.730399736 +0200 +--- a/Makefile ++++ b/Makefile @@ -1,7 +1,6 @@ # -# Makefile - build and install the comgt package diff --git a/package/compcache/patches/000-provide_lzo_kmod.patch b/package/compcache/patches/000-provide_lzo_kmod.patch index 369bc1feb..1dab08507 100644 --- a/package/compcache/patches/000-provide_lzo_kmod.patch +++ b/package/compcache/patches/000-provide_lzo_kmod.patch @@ -1,6 +1,5 @@ -diff -uNr compcache-org/Makefile compcache-0.6.2/Makefile ---- compcache-org/Makefile 2010-01-24 17:46:50.000000000 +0100 -+++ compcache-0.6.2/Makefile 2010-03-18 16:00:41.000000000 +0100 +--- a/Makefile ++++ b/Makefile @@ -1,14 +1,17 @@ KERNEL_BUILD_PATH ?= "/lib/modules/$(shell uname -r)/build" @@ -20,16 +19,15 @@ diff -uNr compcache-org/Makefile compcache-0.6.2/Makefile make -C sub-projects/rzscontrol doc: -@@ -16,5 +19,6 @@ +@@ -16,5 +19,6 @@ doc: clean: make -C $(KERNEL_BUILD_PATH) M=$(PWD) clean + make -C $(KERNEL_BUILD_PATH) M=$(PWD)/$(LZO) clean make -C sub-projects/rzscontrol clean @rm -rf *.ko -diff -uNr compcache-org/ramzswap_drv.c compcache-0.6.2/ramzswap_drv.c ---- compcache-org/ramzswap_drv.c 2010-01-24 17:52:19.000000000 +0100 -+++ compcache-0.6.2/ramzswap_drv.c 2010-03-18 16:03:23.000000000 +0100 +--- a/ramzswap_drv.c ++++ b/ramzswap_drv.c @@ -23,13 +23,13 @@ #include #include @@ -45,9 +43,8 @@ diff -uNr compcache-org/ramzswap_drv.c compcache-0.6.2/ramzswap_drv.c #include "compat.h" #include "ramzswap_drv.h" -diff -uNr compcache-old/sub-projects/compression/lzo-kmod/lzo1x.c compcache/sub-projects/compression/lzo-kmod/lzo1x.c ---- compcache-old/sub-projects/compression/lzo-kmod/lzo1x.c 1970-01-01 01:00:00.000000000 +0100 -+++ compcache/sub-projects/compression/lzo-kmod/lzo1x.c 2009-10-17 09:35:59.000000000 +0200 +--- /dev/null ++++ b/sub-projects/compression/lzo-kmod/lzo1x.c @@ -0,0 +1,7 @@ +#include + @@ -56,9 +53,8 @@ diff -uNr compcache-old/sub-projects/compression/lzo-kmod/lzo1x.c compcache/sub- + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("LZO1X Lib"); -diff -uNr compcache-old/sub-projects/compression/lzo-kmod/lzo1x_compress.c compcache/sub-projects/compression/lzo-kmod/lzo1x_compress.c ---- compcache-old/sub-projects/compression/lzo-kmod/lzo1x_compress.c 1970-01-01 01:00:00.000000000 +0100 -+++ compcache/sub-projects/compression/lzo-kmod/lzo1x_compress.c 2009-10-17 09:35:59.000000000 +0200 +--- /dev/null ++++ b/sub-projects/compression/lzo-kmod/lzo1x_compress.c @@ -0,0 +1,227 @@ +/* + * LZO1X Compressor from MiniLZO @@ -287,9 +283,8 @@ diff -uNr compcache-old/sub-projects/compression/lzo-kmod/lzo1x_compress.c compc +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("LZO1X-1 Compressor"); + -diff -uNr compcache-old/sub-projects/compression/lzo-kmod/lzo1x_decompress.c compcache/sub-projects/compression/lzo-kmod/lzo1x_decompress.c ---- compcache-old/sub-projects/compression/lzo-kmod/lzo1x_decompress.c 1970-01-01 01:00:00.000000000 +0100 -+++ compcache/sub-projects/compression/lzo-kmod/lzo1x_decompress.c 2009-10-17 09:35:59.000000000 +0200 +--- /dev/null ++++ b/sub-projects/compression/lzo-kmod/lzo1x_decompress.c @@ -0,0 +1,255 @@ +/* + * LZO1X Decompressor from MiniLZO @@ -546,9 +541,8 @@ diff -uNr compcache-old/sub-projects/compression/lzo-kmod/lzo1x_decompress.c com +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("LZO1X Decompressor"); + -diff -uNr compcache-old/sub-projects/compression/lzo-kmod/lzodefs.h compcache/sub-projects/compression/lzo-kmod/lzodefs.h ---- compcache-old/sub-projects/compression/lzo-kmod/lzodefs.h 1970-01-01 01:00:00.000000000 +0100 -+++ compcache/sub-projects/compression/lzo-kmod/lzodefs.h 2009-10-17 09:35:59.000000000 +0200 +--- /dev/null ++++ b/sub-projects/compression/lzo-kmod/lzodefs.h @@ -0,0 +1,43 @@ +/* + * lzodefs.h -- architecture, OS and compiler specific defines @@ -593,9 +587,8 @@ diff -uNr compcache-old/sub-projects/compression/lzo-kmod/lzodefs.h compcache/su +#define DX2(p, s1, s2) (((((size_t)((p)[2]) << (s2)) ^ (p)[1]) \ + << (s1)) ^ (p)[0]) +#define DX3(p, s1, s2, s3) ((DX2((p)+1, s2, s3) << (s1)) ^ (p)[0]) -diff -uNr compcache-old/sub-projects/compression/lzo-kmod/lzo.h compcache/sub-projects/compression/lzo-kmod/lzo.h ---- compcache-old/sub-projects/compression/lzo-kmod/lzo.h 1970-01-01 01:00:00.000000000 +0100 -+++ compcache/sub-projects/compression/lzo-kmod/lzo.h 2009-10-17 09:35:59.000000000 +0200 +--- /dev/null ++++ b/sub-projects/compression/lzo-kmod/lzo.h @@ -0,0 +1,44 @@ +#ifndef __LZO_H__ +#define __LZO_H__ @@ -641,9 +634,8 @@ diff -uNr compcache-old/sub-projects/compression/lzo-kmod/lzo.h compcache/sub-pr +#define LZO_E_NOT_YET_IMPLEMENTED (-9) + +#endif -diff -uNr compcache-old/sub-projects/compression/lzo-kmod/Makefile compcache/sub-projects/compression/lzo-kmod/Makefile ---- compcache-old/sub-projects/compression/lzo-kmod/Makefile 1970-01-01 01:00:00.000000000 +0100 -+++ compcache/sub-projects/compression/lzo-kmod/Makefile 2009-10-17 09:35:59.000000000 +0200 +--- /dev/null ++++ b/sub-projects/compression/lzo-kmod/Makefile @@ -0,0 +1,8 @@ +obj-m += lzo1x_compress.o lzo1x_decompress.o + diff --git a/package/compcache/patches/001-lzo-speed.patch b/package/compcache/patches/001-lzo-speed.patch index 59efe097c..130f79da6 100644 --- a/package/compcache/patches/001-lzo-speed.patch +++ b/package/compcache/patches/001-lzo-speed.patch @@ -1,7 +1,6 @@ -diff -uNr compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_compress.c compcache-0.5.3/sub-projects/compression/lzo-kmod/lzo1x_compress.c ---- compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_compress.c 2009-04-20 06:28:30.000000000 +0200 -+++ compcache-0.5.3/sub-projects/compression/lzo-kmod/lzo1x_compress.c 2009-04-20 06:29:21.000000000 +0200 -@@ -62,8 +62,12 @@ +--- a/sub-projects/compression/lzo-kmod/lzo1x_compress.c ++++ b/sub-projects/compression/lzo-kmod/lzo1x_compress.c +@@ -62,8 +62,12 @@ _lzo1x_1_do_compress(const unsigned char goto literal; try_match: @@ -14,7 +13,7 @@ diff -uNr compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_compress.c if (likely(m_pos[2] == ip[2])) goto match; } -@@ -94,9 +98,14 @@ +@@ -94,9 +98,14 @@ match: } *op++ = tt; } @@ -32,7 +31,7 @@ diff -uNr compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_compress.c } ip += 3; -@@ -208,9 +217,14 @@ +@@ -208,9 +217,14 @@ int lzo1x_1_compress(const unsigned char *op++ = tt; } @@ -50,15 +49,14 @@ diff -uNr compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_compress.c } *op++ = M4_MARKER | 1; -@@ -224,4 +238,3 @@ +@@ -224,4 +238,3 @@ EXPORT_SYMBOL_GPL(lzo1x_1_compress); MODULE_LICENSE("GPL"); MODULE_DESCRIPTION("LZO1X-1 Compressor"); - -diff -uNr compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_decompress.c compcache-0.5.3/sub-projects/compression/lzo-kmod/lzo1x_decompress.c ---- compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_decompress.c 2009-04-20 06:28:30.000000000 +0200 -+++ compcache-0.5.3/sub-projects/compression/lzo-kmod/lzo1x_decompress.c 2009-04-20 06:29:21.000000000 +0200 -@@ -45,10 +45,7 @@ +--- a/sub-projects/compression/lzo-kmod/lzo1x_decompress.c ++++ b/sub-projects/compression/lzo-kmod/lzo1x_decompress.c +@@ -45,10 +45,7 @@ int lzo1x_decompress_safe(const unsigned goto output_overrun; if (HAVE_IP(t + 1, ip_end, ip)) goto input_overrun; @@ -70,7 +68,7 @@ diff -uNr compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_decompress } while ((ip < ip_end)) { -@@ -71,30 +68,27 @@ +@@ -71,30 +68,27 @@ int lzo1x_decompress_safe(const unsigned if (HAVE_IP(t + 4, ip_end, ip)) goto input_overrun; @@ -116,7 +114,7 @@ diff -uNr compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_decompress t = *ip++; if (t >= 16) goto match; -@@ -139,8 +133,7 @@ +@@ -139,8 +133,7 @@ match: t += 31 + *ip++; } m_pos = op - 1; @@ -126,7 +124,7 @@ diff -uNr compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_decompress ip += 2; } else if (t >= 16) { m_pos = op; -@@ -158,8 +151,7 @@ +@@ -158,8 +151,7 @@ match: } t += 7 + *ip++; } @@ -136,7 +134,7 @@ diff -uNr compcache-0.5.3-org/sub-projects/compression/lzo-kmod/lzo1x_decompress ip += 2; if (m_pos == op) goto eof_found; -@@ -184,21 +176,33 @@ +@@ -184,21 +176,33 @@ match: if (HAVE_OP(t + 3 - 1, op_end, op)) goto output_overrun; diff --git a/package/cyassl/Makefile b/package/cyassl/Makefile new file mode 100644 index 000000000..af4bc269b --- /dev/null +++ b/package/cyassl/Makefile @@ -0,0 +1,56 @@ +# +# Copyright (C) 2006-2010 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk + +PKG_NAME:=cyassl +PKG_VERSION:=1.4.0 +PKG_RELEASE:=2 + +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).zip +PKG_SOURCE_URL:=http://www.yassl.com/ +PKG_MD5SUM:=037397c7df84b9a12e614bf46135df1c + +PKG_FIXUP:=libtool +PKG_INSTALL:=1 + +include $(INCLUDE_DIR)/package.mk + +define Package/libcyassl + SECTION:=libs + SUBMENU:=SSL + CATEGORY:=Libraries + DEPENDS:=+zlib + TITLE:=CyaSSL library + URL:=http://www.yassl.com/ +endef + +define Package/libcyassl/description +CyaSSL is an SSL library optimized for small footprint, both on disk and for +memory use. +endef + +TARGET_CFLAGS += $(FPIC) + +CONFIGURE_ARGS += \ + --without-zlib \ + --enable-singleThreaded + +define Build/InstallDev + $(INSTALL_DIR) $(1)/usr/include + $(CP) $(PKG_INSTALL_DIR)/usr/include/* $(1)/usr/include/ + + $(INSTALL_DIR) $(1)/usr/lib + $(CP) $(PKG_INSTALL_DIR)/usr/lib/libcyassl.{a,so*,la} $(1)/usr/lib/ +endef + +define Package/libcyassl/install + $(INSTALL_DIR) $(1)/usr/lib + $(CP) $(PKG_INSTALL_DIR)/usr/lib/libcyassl.so* $(1)/usr/lib/ +endef + +$(eval $(call BuildPackage,libcyassl)) diff --git a/package/cyassl/patches/100-makefile_dollar_make.patch b/package/cyassl/patches/100-makefile_dollar_make.patch new file mode 100644 index 000000000..07f7a8879 --- /dev/null +++ b/package/cyassl/patches/100-makefile_dollar_make.patch @@ -0,0 +1,22 @@ +--- a/Makefile.am ++++ b/Makefile.am +@@ -4,7 +4,7 @@ EXTRA_DIST = cyassl.dsp cyassl.dsw certs + doc/*.pdf + + basic: +- cd src; make; cd ../testsuite; make; cd ../ ++ cd src; $(MAKE); cd ../testsuite; $(MAKE); cd ../ + + openssl-links: + cd lib; ln -s ../src/.libs/libcyassl.a libcrypto.a; \ +--- a/Makefile.in ++++ b/Makefile.in +@@ -638,7 +638,7 @@ uninstall-am: + + + basic: +- cd src; make; cd ../testsuite; make; cd ../ ++ cd src; $(MAKE); cd ../testsuite; $(MAKE); cd ../ + + openssl-links: + cd lib; ln -s ../src/.libs/libcyassl.a libcrypto.a; \ diff --git a/package/cyassl/patches/110-makefile_disable_examples_tests.patch b/package/cyassl/patches/110-makefile_disable_examples_tests.patch new file mode 100644 index 000000000..d991a336d --- /dev/null +++ b/package/cyassl/patches/110-makefile_disable_examples_tests.patch @@ -0,0 +1,53 @@ +--- a/Makefile.am ++++ b/Makefile.am +@@ -1,10 +1,10 @@ +-SUBDIRS = src ctaocrypt examples testsuite ++SUBDIRS = src ctaocrypt + EXTRA_DIST = cyassl.dsp cyassl.dsw certs/*.pem certs/*.der certs/*.txt \ + lib/dummy cyassl.sln cyassl.vcproj cyassl-iphone.xcodeproj/project.pbxproj \ + doc/*.pdf + + basic: +- cd src; $(MAKE); cd ../testsuite; $(MAKE); cd ../ ++ cd src; $(MAKE); cd ../ + + openssl-links: + cd lib; ln -s ../src/.libs/libcyassl.a libcrypto.a; \ +--- a/Makefile.in ++++ b/Makefile.in +@@ -190,7 +190,7 @@ target_os = @target_os@ + target_vendor = @target_vendor@ + top_builddir = @top_builddir@ + top_srcdir = @top_srcdir@ +-SUBDIRS = src ctaocrypt examples testsuite ++SUBDIRS = src ctaocrypt + EXTRA_DIST = cyassl.dsp cyassl.dsw certs/*.pem certs/*.der certs/*.txt \ + lib/dummy cyassl.sln cyassl.vcproj cyassl-iphone.xcodeproj/project.pbxproj \ + doc/*.pdf +@@ -638,7 +638,7 @@ uninstall-am: + + + basic: +- cd src; $(MAKE); cd ../testsuite; $(MAKE); cd ../ ++ cd src; $(MAKE); cd ../ + + openssl-links: + cd lib; ln -s ../src/.libs/libcyassl.a libcrypto.a; \ +--- a/ctaocrypt/Makefile.am ++++ b/ctaocrypt/Makefile.am +@@ -1,3 +1,3 @@ +-SUBDIRS = src test benchmark ++SUBDIRS = src + EXTRA_DIST = ctaocrypt.dsw ctaocrypt.dsp ctaocrypt.sln ctaocrypt.vcproj + +--- a/ctaocrypt/Makefile.in ++++ b/ctaocrypt/Makefile.in +@@ -174,7 +174,7 @@ target_os = @target_os@ + target_vendor = @target_vendor@ + top_builddir = @top_builddir@ + top_srcdir = @top_srcdir@ +-SUBDIRS = src test benchmark ++SUBDIRS = src + EXTRA_DIST = ctaocrypt.dsw ctaocrypt.dsp ctaocrypt.sln ctaocrypt.vcproj + all: all-recursive + diff --git a/package/cyassl/patches/120-makefile_destdir.patch b/package/cyassl/patches/120-makefile_destdir.patch new file mode 100644 index 000000000..d7ad1da67 --- /dev/null +++ b/package/cyassl/patches/120-makefile_destdir.patch @@ -0,0 +1,49 @@ +--- a/Makefile.am ++++ b/Makefile.am +@@ -8,14 +8,11 @@ basic: + + openssl-links: + cd lib; ln -s ../src/.libs/libcyassl.a libcrypto.a; \ +- ln -s ../src/.libs/libcyassl.a libssl.a; \ +- ln -s ../src/.libs/libcyassl.a libcyassl.a; cd ../ ++ ln -s ../src/.libs/libcyassl.a libssl.a; \ ++ ln -s ../src/.libs/libcyassl.a libcyassl.a; cd ../ + + install: +- mkdir ${prefix}/cyassl; \ +- mkdir ${prefix}/cyassl/include; \ +- mkdir ${prefix}/cyassl/include/openssl; \ +- cp include/openssl/*.h ${prefix}/cyassl/include/openssl; \ +- make openssl-links; \ +- mkdir ${prefix}/cyassl/lib; \ +- cp lib/*.a ${prefix}/cyassl/lib ++ $(mkinstalldirs) $(DESTDIR)$(includedir)/cyassl $(DESTDIR)$(libdir); \ ++ cp -fpR include/* $(DESTDIR)$(includedir)/cyassl; \ ++ make openssl-links; \ ++ cp -fpR src/.libs/libcyassl.{a,so*} src/libcyassl.la $(DESTDIR)$(libdir) +--- a/Makefile.in ++++ b/Makefile.in +@@ -642,17 +642,14 @@ basic: + + openssl-links: + cd lib; ln -s ../src/.libs/libcyassl.a libcrypto.a; \ +- ln -s ../src/.libs/libcyassl.a libssl.a; \ +- ln -s ../src/.libs/libcyassl.a libcyassl.a; cd ../ ++ ln -s ../src/.libs/libcyassl.a libssl.a; \ ++ ln -s ../src/.libs/libcyassl.a libcyassl.a; cd ../ + + install: +- mkdir ${prefix}/cyassl; \ +- mkdir ${prefix}/cyassl/include; \ +- mkdir ${prefix}/cyassl/include/openssl; \ +- cp include/openssl/*.h ${prefix}/cyassl/include/openssl; \ +- make openssl-links; \ +- mkdir ${prefix}/cyassl/lib; \ +- cp lib/*.a ${prefix}/cyassl/lib ++ $(mkinstalldirs) $(DESTDIR)$(includedir)/cyassl $(DESTDIR)$(libdir); \ ++ cp -fpR include/* $(DESTDIR)$(includedir)/cyassl; \ ++ make openssl-links; \ ++ cp -fpR src/.libs/libcyassl.{a,so*} src/libcyassl.la $(DESTDIR)$(libdir) + # Tell versions [3.59,3.63) of GNU make to not export all variables. + # Otherwise a system limit (for SysV at least) may be exceeded. + .NOEXPORT: diff --git a/package/cyassl/patches/130-configure_disable_pthreads_tests.patch b/package/cyassl/patches/130-configure_disable_pthreads_tests.patch new file mode 100644 index 000000000..a109c4e0f --- /dev/null +++ b/package/cyassl/patches/130-configure_disable_pthreads_tests.patch @@ -0,0 +1,444 @@ +--- a/configure ++++ b/configure +@@ -874,10 +874,6 @@ F77 + FFLAGS + ac_ct_F77 + LIBTOOL +-acx_pthread_config +-PTHREAD_CC +-PTHREAD_LIBS +-PTHREAD_CFLAGS + LIBOBJS + LTLIBOBJS' + ac_subst_files='' +@@ -21946,430 +21942,6 @@ ac_compile='$CC -c $CFLAGS $CPPFLAGS con + ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' + ac_compiler_gnu=$ac_cv_c_compiler_gnu + +-acx_pthread_ok=no +- +-# We used to check for pthread.h first, but this fails if pthread.h +-# requires special compiler flags (e.g. on True64 or Sequent). +-# It gets checked for in the link test anyway. +- +-# First of all, check if the user has set any of the PTHREAD_LIBS, +-# etcetera environment variables, and if threads linking works using +-# them: +-if test x"$PTHREAD_LIBS$PTHREAD_CFLAGS" != x; then +- save_CFLAGS="$CFLAGS" +- CFLAGS="$CFLAGS $PTHREAD_CFLAGS" +- save_LIBS="$LIBS" +- LIBS="$PTHREAD_LIBS $LIBS" +- { echo "$as_me:$LINENO: checking for pthread_join in LIBS=$PTHREAD_LIBS with CFLAGS=$PTHREAD_CFLAGS" >&5 +-echo $ECHO_N "checking for pthread_join in LIBS=$PTHREAD_LIBS with CFLAGS=$PTHREAD_CFLAGS... $ECHO_C" >&6; } +- cat >conftest.$ac_ext <<_ACEOF +-/* confdefs.h. */ +-_ACEOF +-cat confdefs.h >>conftest.$ac_ext +-cat >>conftest.$ac_ext <<_ACEOF +-/* end confdefs.h. */ +- +-/* Override any GCC internal prototype to avoid an error. +- Use char because int might match the return type of a GCC +- builtin and then its argument prototype would still apply. */ +-#ifdef __cplusplus +-extern "C" +-#endif +-char pthread_join (); +-int +-main () +-{ +-return pthread_join (); +- ; +- return 0; +-} +-_ACEOF +-rm -f conftest.$ac_objext conftest$ac_exeext +-if { (ac_try="$ac_link" +-case "(($ac_try" in +- *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; +- *) ac_try_echo=$ac_try;; +-esac +-eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 +- (eval "$ac_link") 2>conftest.er1 +- ac_status=$? +- grep -v '^ *+' conftest.er1 >conftest.err +- rm -f conftest.er1 +- cat conftest.err >&5 +- echo "$as_me:$LINENO: \$? = $ac_status" >&5 +- (exit $ac_status); } && { +- test -z "$ac_c_werror_flag" || +- test ! -s conftest.err +- } && test -s conftest$ac_exeext && +- $as_test_x conftest$ac_exeext; then +- acx_pthread_ok=yes +-else +- echo "$as_me: failed program was:" >&5 +-sed 's/^/| /' conftest.$ac_ext >&5 +- +- +-fi +- +-rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +- conftest$ac_exeext conftest.$ac_ext +- { echo "$as_me:$LINENO: result: $acx_pthread_ok" >&5 +-echo "${ECHO_T}$acx_pthread_ok" >&6; } +- if test x"$acx_pthread_ok" = xno; then +- PTHREAD_LIBS="" +- PTHREAD_CFLAGS="" +- fi +- LIBS="$save_LIBS" +- CFLAGS="$save_CFLAGS" +-fi +- +-# We must check for the threads library under a number of different +-# names; the ordering is very important because some systems +-# (e.g. DEC) have both -lpthread and -lpthreads, where one of the +-# libraries is broken (non-POSIX). +- +-# Create a list of thread flags to try. Items starting with a "-" are +-# C compiler flags, and other items are library names, except for "none" +-# which indicates that we try without any flags at all, and "pthread-config" +-# which is a program returning the flags for the Pth emulation library. +- +-acx_pthread_flags="pthreads none -Kthread -kthread lthread -pthread -pthreads -mthreads pthread --thread-safe -mt pthread-config" +- +-# The ordering *is* (sometimes) important. Some notes on the +-# individual items follow: +- +-# pthreads: AIX (must check this before -lpthread) +-# none: in case threads are in libc; should be tried before -Kthread and +-# other compiler flags to prevent continual compiler warnings +-# -Kthread: Sequent (threads in libc, but -Kthread needed for pthread.h) +-# -kthread: FreeBSD kernel threads (preferred to -pthread since SMP-able) +-# lthread: LinuxThreads port on FreeBSD (also preferred to -pthread) +-# -pthread: Linux/gcc (kernel threads), BSD/gcc (userland threads) +-# -pthreads: Solaris/gcc +-# -mthreads: Mingw32/gcc, Lynx/gcc +-# -mt: Sun Workshop C (may only link SunOS threads [-lthread], but it +-# doesn't hurt to check since this sometimes defines pthreads too; +-# also defines -D_REENTRANT) +-# ... -mt is also the pthreads flag for HP/aCC +-# pthread: Linux, etcetera +-# --thread-safe: KAI C++ +-# pthread-config: use pthread-config program (for GNU Pth library) +- +-case "${host_cpu}-${host_os}" in +- *solaris*) +- +- # On Solaris (at least, for some versions), libc contains stubbed +- # (non-functional) versions of the pthreads routines, so link-based +- # tests will erroneously succeed. (We need to link with -pthreads/-mt/ +- # -lpthread.) (The stubs are missing pthread_cleanup_push, or rather +- # a function called by this macro, so we could check for that, but +- # who knows whether they'll stub that too in a future libc.) So, +- # we'll just look for -pthreads and -lpthread first: +- +- acx_pthread_flags="-pthreads pthread -mt -pthread $acx_pthread_flags" +- ;; +-esac +- +-if test x"$acx_pthread_ok" = xno; then +-for flag in $acx_pthread_flags; do +- +- case $flag in +- none) +- { echo "$as_me:$LINENO: checking whether pthreads work without any flags" >&5 +-echo $ECHO_N "checking whether pthreads work without any flags... $ECHO_C" >&6; } +- ;; +- +- -*) +- { echo "$as_me:$LINENO: checking whether pthreads work with $flag" >&5 +-echo $ECHO_N "checking whether pthreads work with $flag... $ECHO_C" >&6; } +- PTHREAD_CFLAGS="$flag" +- ;; +- +- pthread-config) +- # Extract the first word of "pthread-config", so it can be a program name with args. +-set dummy pthread-config; ac_word=$2 +-{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +-echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +-if test "${ac_cv_prog_acx_pthread_config+set}" = set; then +- echo $ECHO_N "(cached) $ECHO_C" >&6 +-else +- if test -n "$acx_pthread_config"; then +- ac_cv_prog_acx_pthread_config="$acx_pthread_config" # Let the user override the test. +-else +-as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +-for as_dir in $PATH +-do +- IFS=$as_save_IFS +- test -z "$as_dir" && as_dir=. +- for ac_exec_ext in '' $ac_executable_extensions; do +- if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then +- ac_cv_prog_acx_pthread_config="yes" +- echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 +- break 2 +- fi +-done +-done +-IFS=$as_save_IFS +- +- test -z "$ac_cv_prog_acx_pthread_config" && ac_cv_prog_acx_pthread_config="no" +-fi +-fi +-acx_pthread_config=$ac_cv_prog_acx_pthread_config +-if test -n "$acx_pthread_config"; then +- { echo "$as_me:$LINENO: result: $acx_pthread_config" >&5 +-echo "${ECHO_T}$acx_pthread_config" >&6; } +-else +- { echo "$as_me:$LINENO: result: no" >&5 +-echo "${ECHO_T}no" >&6; } +-fi +- +- +- if test x"$acx_pthread_config" = xno; then continue; fi +- PTHREAD_CFLAGS="`pthread-config --cflags`" +- PTHREAD_LIBS="`pthread-config --ldflags` `pthread-config --libs`" +- ;; +- +- *) +- { echo "$as_me:$LINENO: checking for the pthreads library -l$flag" >&5 +-echo $ECHO_N "checking for the pthreads library -l$flag... $ECHO_C" >&6; } +- PTHREAD_LIBS="-l$flag" +- ;; +- esac +- +- save_LIBS="$LIBS" +- save_CFLAGS="$CFLAGS" +- LIBS="$PTHREAD_LIBS $LIBS" +- CFLAGS="$CFLAGS $PTHREAD_CFLAGS" +- +- # Check for various functions. We must include pthread.h, +- # since some functions may be macros. (On the Sequent, we +- # need a special flag -Kthread to make this header compile.) +- # We check for pthread_join because it is in -lpthread on IRIX +- # while pthread_create is in libc. We check for pthread_attr_init +- # due to DEC craziness with -lpthreads. We check for +- # pthread_cleanup_push because it is one of the few pthread +- # functions on Solaris that doesn't have a non-functional libc stub. +- # We try pthread_create on general principles. +- cat >conftest.$ac_ext <<_ACEOF +-/* confdefs.h. */ +-_ACEOF +-cat confdefs.h >>conftest.$ac_ext +-cat >>conftest.$ac_ext <<_ACEOF +-/* end confdefs.h. */ +-#include +-int +-main () +-{ +-pthread_t th; pthread_join(th, 0); +- pthread_attr_init(0); pthread_cleanup_push(0, 0); +- pthread_create(0,0,0,0); pthread_cleanup_pop(0); +- ; +- return 0; +-} +-_ACEOF +-rm -f conftest.$ac_objext conftest$ac_exeext +-if { (ac_try="$ac_link" +-case "(($ac_try" in +- *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; +- *) ac_try_echo=$ac_try;; +-esac +-eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 +- (eval "$ac_link") 2>conftest.er1 +- ac_status=$? +- grep -v '^ *+' conftest.er1 >conftest.err +- rm -f conftest.er1 +- cat conftest.err >&5 +- echo "$as_me:$LINENO: \$? = $ac_status" >&5 +- (exit $ac_status); } && { +- test -z "$ac_c_werror_flag" || +- test ! -s conftest.err +- } && test -s conftest$ac_exeext && +- $as_test_x conftest$ac_exeext; then +- acx_pthread_ok=yes +-else +- echo "$as_me: failed program was:" >&5 +-sed 's/^/| /' conftest.$ac_ext >&5 +- +- +-fi +- +-rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +- conftest$ac_exeext conftest.$ac_ext +- +- LIBS="$save_LIBS" +- CFLAGS="$save_CFLAGS" +- +- { echo "$as_me:$LINENO: result: $acx_pthread_ok" >&5 +-echo "${ECHO_T}$acx_pthread_ok" >&6; } +- if test "x$acx_pthread_ok" = xyes; then +- break; +- fi +- +- PTHREAD_LIBS="" +- PTHREAD_CFLAGS="" +-done +-fi +- +-# Various other checks: +-if test "x$acx_pthread_ok" = xyes; then +- save_LIBS="$LIBS" +- LIBS="$PTHREAD_LIBS $LIBS" +- save_CFLAGS="$CFLAGS" +- CFLAGS="$CFLAGS $PTHREAD_CFLAGS" +- +- # Detect AIX lossage: JOINABLE attribute is called UNDETACHED. +- { echo "$as_me:$LINENO: checking for joinable pthread attribute" >&5 +-echo $ECHO_N "checking for joinable pthread attribute... $ECHO_C" >&6; } +- attr_name=unknown +- for attr in PTHREAD_CREATE_JOINABLE PTHREAD_CREATE_UNDETACHED; do +- cat >conftest.$ac_ext <<_ACEOF +-/* confdefs.h. */ +-_ACEOF +-cat confdefs.h >>conftest.$ac_ext +-cat >>conftest.$ac_ext <<_ACEOF +-/* end confdefs.h. */ +-#include +-int +-main () +-{ +-int attr=$attr; return attr; +- ; +- return 0; +-} +-_ACEOF +-rm -f conftest.$ac_objext conftest$ac_exeext +-if { (ac_try="$ac_link" +-case "(($ac_try" in +- *\"* | *\`* | *\\*) ac_try_echo=\$ac_try;; +- *) ac_try_echo=$ac_try;; +-esac +-eval "echo \"\$as_me:$LINENO: $ac_try_echo\"") >&5 +- (eval "$ac_link") 2>conftest.er1 +- ac_status=$? +- grep -v '^ *+' conftest.er1 >conftest.err +- rm -f conftest.er1 +- cat conftest.err >&5 +- echo "$as_me:$LINENO: \$? = $ac_status" >&5 +- (exit $ac_status); } && { +- test -z "$ac_c_werror_flag" || +- test ! -s conftest.err +- } && test -s conftest$ac_exeext && +- $as_test_x conftest$ac_exeext; then +- attr_name=$attr; break +-else +- echo "$as_me: failed program was:" >&5 +-sed 's/^/| /' conftest.$ac_ext >&5 +- +- +-fi +- +-rm -f core conftest.err conftest.$ac_objext conftest_ipa8_conftest.oo \ +- conftest$ac_exeext conftest.$ac_ext +- done +- { echo "$as_me:$LINENO: result: $attr_name" >&5 +-echo "${ECHO_T}$attr_name" >&6; } +- if test "$attr_name" != PTHREAD_CREATE_JOINABLE; then +- +-cat >>confdefs.h <<_ACEOF +-#define PTHREAD_CREATE_JOINABLE $attr_name +-_ACEOF +- +- fi +- +- { echo "$as_me:$LINENO: checking if more special flags are required for pthreads" >&5 +-echo $ECHO_N "checking if more special flags are required for pthreads... $ECHO_C" >&6; } +- flag=no +- case "${host_cpu}-${host_os}" in +- *-aix* | *-freebsd* | *-darwin*) flag="-D_THREAD_SAFE";; +- *solaris* | *-osf* | *-hpux*) flag="-D_REENTRANT";; +- esac +- { echo "$as_me:$LINENO: result: ${flag}" >&5 +-echo "${ECHO_T}${flag}" >&6; } +- if test "x$flag" != xno; then +- PTHREAD_CFLAGS="$flag $PTHREAD_CFLAGS" +- fi +- +- LIBS="$save_LIBS" +- CFLAGS="$save_CFLAGS" +- +- # More AIX lossage: must compile with xlc_r or cc_r +- if test x"$GCC" != xyes; then +- for ac_prog in xlc_r cc_r +-do +- # Extract the first word of "$ac_prog", so it can be a program name with args. +-set dummy $ac_prog; ac_word=$2 +-{ echo "$as_me:$LINENO: checking for $ac_word" >&5 +-echo $ECHO_N "checking for $ac_word... $ECHO_C" >&6; } +-if test "${ac_cv_prog_PTHREAD_CC+set}" = set; then +- echo $ECHO_N "(cached) $ECHO_C" >&6 +-else +- if test -n "$PTHREAD_CC"; then +- ac_cv_prog_PTHREAD_CC="$PTHREAD_CC" # Let the user override the test. +-else +-as_save_IFS=$IFS; IFS=$PATH_SEPARATOR +-for as_dir in $PATH +-do +- IFS=$as_save_IFS +- test -z "$as_dir" && as_dir=. +- for ac_exec_ext in '' $ac_executable_extensions; do +- if { test -f "$as_dir/$ac_word$ac_exec_ext" && $as_test_x "$as_dir/$ac_word$ac_exec_ext"; }; then +- ac_cv_prog_PTHREAD_CC="$ac_prog" +- echo "$as_me:$LINENO: found $as_dir/$ac_word$ac_exec_ext" >&5 +- break 2 +- fi +-done +-done +-IFS=$as_save_IFS +- +-fi +-fi +-PTHREAD_CC=$ac_cv_prog_PTHREAD_CC +-if test -n "$PTHREAD_CC"; then +- { echo "$as_me:$LINENO: result: $PTHREAD_CC" >&5 +-echo "${ECHO_T}$PTHREAD_CC" >&6; } +-else +- { echo "$as_me:$LINENO: result: no" >&5 +-echo "${ECHO_T}no" >&6; } +-fi +- +- +- test -n "$PTHREAD_CC" && break +-done +-test -n "$PTHREAD_CC" || PTHREAD_CC="${CC}" +- +- else +- PTHREAD_CC=$CC +- fi +-else +- PTHREAD_CC="$CC" +-fi +- +- +- +- +- +-# Finally, execute ACTION-IF-FOUND/ACTION-IF-NOT-FOUND: +-if test x"$acx_pthread_ok" = xyes; then +- +-cat >>confdefs.h <<\_ACEOF +-#define HAVE_PTHREAD 1 +-_ACEOF +- +- : +-else +- acx_pthread_ok=no +- +-fi +-ac_ext=c +-ac_cpp='$CPP $CPPFLAGS' +-ac_compile='$CC -c $CFLAGS $CPPFLAGS conftest.$ac_ext >&5' +-ac_link='$CC -o conftest$ac_exeext $CFLAGS $CPPFLAGS $LDFLAGS conftest.$ac_ext $LIBS >&5' +-ac_compiler_gnu=$ac_cv_c_compiler_gnu +- +- +- +-LIBS="$PTHREAD_LIBS $LIBS" +-CFLAGS="$CFLAGS $PTHREAD_CFLAGS" +- + + { echo "$as_me:$LINENO: checking for library containing gethostbyname" >&5 + echo $ECHO_N "checking for library containing gethostbyname... $ECHO_C" >&6; } diff --git a/package/dropbear/patches/100-pubkey_path.patch b/package/dropbear/patches/100-pubkey_path.patch index 25a81614c..c1802f51e 100644 --- a/package/dropbear/patches/100-pubkey_path.patch +++ b/package/dropbear/patches/100-pubkey_path.patch @@ -1,7 +1,6 @@ -diff -ur dropbear-0.52.orig/svr-authpubkey.c dropbear-0.52/svr-authpubkey.c ---- dropbear-0.52.orig/svr-authpubkey.c 2009-04-08 00:32:16.000000000 +0200 -+++ dropbear-0.52/svr-authpubkey.c 2009-04-08 00:44:11.000000000 +0200 -@@ -209,17 +209,21 @@ +--- a/svr-authpubkey.c ++++ b/svr-authpubkey.c +@@ -209,17 +209,21 @@ static int checkpubkey(unsigned char* al goto out; } @@ -34,7 +33,7 @@ diff -ur dropbear-0.52.orig/svr-authpubkey.c dropbear-0.52/svr-authpubkey.c if (authfile == NULL) { goto out; } -@@ -372,26 +376,35 @@ +@@ -372,26 +376,35 @@ static int checkpubkeyperms() { goto out; } diff --git a/package/dropbear/patches/110-change_user.patch b/package/dropbear/patches/110-change_user.patch index eb1db52db..964229bd7 100644 --- a/package/dropbear/patches/110-change_user.patch +++ b/package/dropbear/patches/110-change_user.patch @@ -1,8 +1,6 @@ -Index: dropbear-0.52/svr-chansession.c -=================================================================== ---- dropbear-0.52.orig/svr-chansession.c 2008-04-22 17:29:49.000000000 -0700 -+++ dropbear-0.52/svr-chansession.c 2008-04-22 17:29:49.000000000 -0700 -@@ -852,12 +852,12 @@ +--- a/svr-chansession.c ++++ b/svr-chansession.c +@@ -852,12 +852,12 @@ static void execchild(void *user_data) { /* We can only change uid/gid as root ... */ if (getuid() == 0) { diff --git a/package/dropbear/patches/130-ssh_ignore_o_and_x_args.patch b/package/dropbear/patches/130-ssh_ignore_o_and_x_args.patch index 17ea4e755..7c4306c36 100644 --- a/package/dropbear/patches/130-ssh_ignore_o_and_x_args.patch +++ b/package/dropbear/patches/130-ssh_ignore_o_and_x_args.patch @@ -1,8 +1,6 @@ -Index: dropbear-0.52/cli-runopts.c -=================================================================== ---- dropbear-0.52.orig/cli-runopts.c 2008-04-22 17:29:49.000000000 -0700 -+++ dropbear-0.52/cli-runopts.c 2008-04-22 17:29:50.000000000 -0700 -@@ -271,6 +271,10 @@ +--- a/cli-runopts.c ++++ b/cli-runopts.c +@@ -271,6 +271,10 @@ void cli_getopts(int argc, char ** argv) debug_trace = 1; break; #endif @@ -13,7 +11,7 @@ Index: dropbear-0.52/cli-runopts.c case 'F': case 'e': case 'c': -@@ -282,7 +286,6 @@ +@@ -282,7 +286,6 @@ void cli_getopts(int argc, char ** argv) #ifndef ENABLE_CLI_LOCALTCPFWD case 'L': #endif diff --git a/package/dropbear/patches/150-dbconvert_standalone.patch b/package/dropbear/patches/150-dbconvert_standalone.patch index 4b46ddfdb..3e0b00855 100644 --- a/package/dropbear/patches/150-dbconvert_standalone.patch +++ b/package/dropbear/patches/150-dbconvert_standalone.patch @@ -1,7 +1,5 @@ -Index: dropbear-0.52/options.h -=================================================================== ---- dropbear-0.52.orig/options.h 2008-04-22 17:29:49.000000000 -0700 -+++ dropbear-0.52/options.h 2008-04-22 17:29:50.000000000 -0700 +--- a/options.h ++++ b/options.h @@ -5,6 +5,11 @@ #ifndef _OPTIONS_H_ #define _OPTIONS_H_ diff --git a/package/e2fsprogs/Makefile b/package/e2fsprogs/Makefile index 3a08db323..21942ef0d 100644 --- a/package/e2fsprogs/Makefile +++ b/package/e2fsprogs/Makefile @@ -8,8 +8,8 @@ include $(TOPDIR)/rules.mk PKG_NAME:=e2fsprogs -PKG_VERSION:=1.40.11 -PKG_MD5SUM:=004cea70d724fdc7f1a952dffe4c9db8 +PKG_VERSION:=1.41.11 +PKG_MD5SUM:=fb507a40c2706bc38306f150d069e345 PKG_RELEASE:=1 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz diff --git a/package/e2fsprogs/patches/001-fix_abs_shlibs_symlinks.patch b/package/e2fsprogs/patches/001-fix_abs_shlibs_symlinks.patch deleted file mode 100644 index e6dd084ac..000000000 --- a/package/e2fsprogs/patches/001-fix_abs_shlibs_symlinks.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/lib/Makefile.elf-lib -+++ b/lib/Makefile.elf-lib -@@ -45,7 +45,7 @@ install-shlibs install:: $(ELF_LIB) inst - @echo " SYMLINK $(ELF_INSTALL_DIR)/$(ELF_SONAME)" - @$(LN_S) -f $(ELF_LIB) $(DESTDIR)$(ELF_INSTALL_DIR)/$(ELF_SONAME) - @echo " SYMLINK $(libdir)/$(ELF_IMAGE).so" -- @$(LN_S) -f $(ELF_INSTALL_DIR)/$(ELF_SONAME) \ -+ @$(LN_S) -f $(ELF_SONAME) \ - $(DESTDIR)$(libdir)/$(ELF_IMAGE).so - @echo " LDCONFIG" - @-$(LDCONFIG) diff --git a/package/fuse/patches/112-no_break_on_mknod.patch b/package/fuse/patches/112-no_break_on_mknod.patch index a992d8c8e..6f4cef9aa 100644 --- a/package/fuse/patches/112-no_break_on_mknod.patch +++ b/package/fuse/patches/112-no_break_on_mknod.patch @@ -1,7 +1,6 @@ -diff -Nurp fuse-2.8.1.orig/util/Makefile.in fuse-2.8.1/util/Makefile.in ---- fuse-2.8.1.orig/util/Makefile.in 2009-09-11 12:50:00.000000000 +0200 -+++ fuse-2.8.1/util/Makefile.in 2009-12-17 01:05:15.720554385 +0100 -@@ -543,7 +543,7 @@ uninstall-am: uninstall-binPROGRAMS unin +--- a/util/Makefile.in ++++ b/util/Makefile.in +@@ -585,7 +585,7 @@ uninstall-am: uninstall-binPROGRAMS unin install-exec-hook: -chown root $(DESTDIR)$(bindir)/fusermount -chmod u+s $(DESTDIR)$(bindir)/fusermount diff --git a/package/fuse/patches/300-workaround-uclibc-pthread-breakage.patch b/package/fuse/patches/300-workaround-uclibc-pthread-breakage.patch index dded4d850..a7d0c0ad2 100644 --- a/package/fuse/patches/300-workaround-uclibc-pthread-breakage.patch +++ b/package/fuse/patches/300-workaround-uclibc-pthread-breakage.patch @@ -1,6 +1,5 @@ -diff -Nurp fuse-2.8.1.orig/lib/helper.c fuse-2.8.1/lib/helper.c ---- fuse-2.8.1.orig/lib/helper.c 2009-06-18 13:14:09.000000000 +0200 -+++ fuse-2.8.1/lib/helper.c 2009-12-17 01:11:32.773356000 +0100 +--- a/lib/helper.c ++++ b/lib/helper.c @@ -180,13 +180,41 @@ err: int fuse_daemonize(int foreground) { diff --git a/package/hostapd/Config.in b/package/hostapd/Config.in index e185820e5..19893382a 100644 --- a/package/hostapd/Config.in +++ b/package/hostapd/Config.in @@ -10,7 +10,7 @@ config WPA_SUPPLICANT_NO_TIMESTAMP_CHECK choice prompt "Choose TLS provider" default WPA_SUPPLICANT_INTERNAL - depends PACKAGE_wpa-supplicant + depends PACKAGE_wpa-supplicant || PACKAGE_wpad config WPA_SUPPLICANT_INTERNAL bool "internal" diff --git a/package/hostapd/Makefile b/package/hostapd/Makefile index 002cd5328..f4142f76d 100644 --- a/package/hostapd/Makefile +++ b/package/hostapd/Makefile @@ -54,15 +54,16 @@ DRIVER_MAKEOPTS= \ CONFIG_DRIVER_NL80211=$(CONFIG_PACKAGE_kmod-mac80211) \ CONFIG_DRIVER_MADWIFI=$(CONFIG_PACKAGE_kmod-madwifi) \ CONFIG_DRIVER_HOSTAP=$(CONFIG_PACKAGE_kmod-hostap) \ - CONFIG_IEEE80211N=$(CONFIG_PACKAGE_kmod-ath9k) - -ifeq ($(LOCAL_TYPE),supplicant) - ifeq ($(LOCAL_VARIANT),full) - DRIVER_MAKEOPTS += $(if $(CONFIG_WPA_SUPPLICANT_OPENSSL),CONFIG_TLS=openssl) - endif -endif + CONFIG_IEEE80211N=$(CONFIG_PACKAGE_kmod-ath9k) \ + CONFIG_IEEE80211W=$(CONFIG_PACKAGE_kmod-ath9k) ifneq ($(LOCAL_TYPE),hostapd) + ifdef CONFIG_WPA_SUPPLICANT_OPENSSL + ifeq ($(LOCAL_VARIANT),full) + DRIVER_MAKEOPTS += CONFIG_TLS=openssl + TARGET_LDFLAGS += -lcrypto -lssl + endif + endif ifdef CONFIG_WPA_SUPPLICANT_NO_TIMESTAMP_CHECK TARGET_CFLAGS += -DNO_TIMESTAMP_CHECK endif @@ -70,12 +71,14 @@ ifneq ($(LOCAL_TYPE),hostapd) CONFIG_DRIVER_ROBOSWITCH=$(CONFIG_PACKAGE_kmod-switch) endif +DRV_DEPENDS:=+PACKAGE_kmod-mac80211:libnl-tiny +PACKAGE_kmod-mac80211:crda @(!(TARGET_avr32||TARGET_etrax)||BROKEN) + define Package/hostapd/Default SECTION:=net CATEGORY:=Network TITLE:=IEEE 802.1x Authenticator URL:=http://hostap.epitest.fi/ - DEPENDS:= +PACKAGE_kmod-mac80211:libnl-tiny +PACKAGE_kmod-mac80211:crda @(!(TARGET_avr32||TARGET_etrax)||BROKEN) + DEPENDS:=$(DRV_DEPENDS) MAINTAINER:=Felix Fietkau endef @@ -116,13 +119,13 @@ define Package/wpad/Default CATEGORY:=Network TITLE:=IEEE 802.1x Authenticator/Supplicant URL:=http://hostap.epitest.fi/ - DEPENDS:= +PACKAGE_kmod-mac80211:libnl-tiny +PACKAGE_kmod-mac80211:crda @(!(TARGET_avr32||TARGET_etrax)||BROKEN) MAINTAINER:=Felix Fietkau endef define Package/wpad $(call Package/wpad/Default) TITLE+= (full) + DEPENDS:=$(DRV_DEPENDS) +WPA_SUPPLICANT_OPENSSL:libopenssl VARIANT:=wpad-full endef @@ -134,6 +137,7 @@ endef define Package/wpad-mini $(call Package/wpad/Default) TITLE+= (WPA-PSK only) + DEPENDS:=$(DRV_DEPENDS) VARIANT:=wpad-mini endef @@ -146,7 +150,7 @@ define Package/wpa-supplicant CATEGORY:=Network TITLE:=WPA Supplicant URL:=http://hostap.epitest.fi/wpa_supplicant/ - DEPENDS:= +PACKAGE_kmod-mac80211:libnl-tiny +PACKAGE_kmod-mac80211:crda @(!(TARGET_avr32||TARGET_etrax)||BROKEN) + DEPENDS:=$(DRV_DEPENDS) +WPA_SUPPLICANT_OPENSSL:libopenssl VARIANT:=supplicant-full MAINTAINER:=Felix Fietkau endef @@ -162,7 +166,7 @@ endef define Package/wpa-supplicant-mini $(Package/wpa-supplicant) TITLE:=WPA Supplicant (minimal version) - DEPENDS:=$(if $(CONFIG_WPA_SUPPLICANT_OPENSSL),+libopenssl) + DEPENDS:=$(DRV_DEPENDS) VARIANT:=supplicant-mini endef diff --git a/package/hostapd/files/hostapd.sh b/package/hostapd/files/hostapd.sh index c83c06df8..9ef8282bd 100644 --- a/package/hostapd/files/hostapd.sh +++ b/package/hostapd/files/hostapd.sh @@ -106,6 +106,21 @@ hostapd_set_bss_options() { append "$var" "ssid=$ssid" "$N" [ -n "$bridge" ] && append "$var" "bridge=$bridge" "$N" [ -n "$ieee80211d" ] && append "$var" "ieee80211d=$ieee80211d" "$N" + + [ "$wpa" -ge "2" ] && config_get ieee80211w "$vif" ieee80211w + case "$ieee80211w" in + [012]) + append "$var" "ieee80211w=$ieee80211w" "$N" + [ "$ieee80211w" -gt "0" ] && { + config_get ieee80211w_max_timeout "$vif" ieee80211w_max_timeout + config_get ieee80211w_retry_timeout "$vif" ieee80211w_retry_timeout + [ -n "$ieee80211w_max_timeout" ] && \ + append "$var" "assoc_sa_query_max_timeout=$ieee80211w_max_timeout" "$N" + [ -n "$ieee80211w_retry_timeout" ] && \ + append "$var" "assoc_sa_query_retry_timeout=$ieee80211w_retry_timeout" "$N" + } + ;; + esac } hostapd_setup_vif() { diff --git a/package/hostapd/files/wpa_supplicant-full.config b/package/hostapd/files/wpa_supplicant-full.config index 5e7fd27d1..8d6813a56 100644 --- a/package/hostapd/files/wpa_supplicant-full.config +++ b/package/hostapd/files/wpa_supplicant-full.config @@ -301,7 +301,7 @@ CONFIG_PEERKEY=y # This version is an experimental implementation based on IEEE 802.11w/D1.0 # draft and is subject to change since the standard has not yet been finalized. # Driver support is also needed for IEEE 802.11w. -#CONFIG_IEEE80211W=y +CONFIG_IEEE80211W=y # Select TLS implementation # openssl = OpenSSL (default) diff --git a/package/hostapd/files/wpa_supplicant.sh b/package/hostapd/files/wpa_supplicant.sh index a9f8ca132..74d20c666 100644 --- a/package/hostapd/files/wpa_supplicant.sh +++ b/package/hostapd/files/wpa_supplicant.sh @@ -50,28 +50,25 @@ wpa_supplicant_setup_vif() { *psk*) key_mgmt='WPA-PSK' config_get_bool usepassphrase "$vif" passphrase 1 + if [ "$usepassphrase" = "1" ]; then + passphrase="psk=\"${key}\"" + else + passphrase="psk=${key}" + fi case "$enc" in *psk2*) proto='proto=RSN' - if [ "$usepassphrase" = "1" ]; then - passphrase="psk=\"${key}\"" - else - passphrase="psk=${key}" - fi + config_get ieee80211w "$vif" ieee80211w ;; *psk*) proto='proto=WPA' - if [ "$usepassphrase" = "1" ]; then - passphrase="psk=\"${key}\"" - else - passphrase="psk=${key}" - fi ;; esac ;; *wpa*|*8021x*) proto='proto=WPA2' key_mgmt='WPA-EAP' + config_get ieee80211w "$vif" ieee80211w config_get ca_cert "$vif" ca_cert ca_cert=${ca_cert:+"ca_cert=\"$ca_cert\""} case "$eap_type" in @@ -95,6 +92,13 @@ wpa_supplicant_setup_vif() { eap_type="eap=$(echo $eap_type | tr 'a-z' 'A-Z')" ;; esac + + case "$ieee80211w" in + [012]) + ieee80211w="ieee80211w=$ieee80211w" + ;; + esac + config_get ifname "$vif" ifname config_get bridge "$vif" bridge config_get ssid "$vif" ssid @@ -109,6 +113,7 @@ network={ $bssid key_mgmt=$key_mgmt $proto + $ieee80211w $passphrase $pairwise $group diff --git a/package/hotplug2/patches/100-env_memleak.patch b/package/hotplug2/patches/100-env_memleak.patch index 31f404029..28a3e2510 100644 --- a/package/hotplug2/patches/100-env_memleak.patch +++ b/package/hotplug2/patches/100-env_memleak.patch @@ -1,7 +1,6 @@ -diff -Naur a/action.c b/action.c ---- a/action.c 2009-11-18 13:15:21.000000000 +0000 -+++ b/action.c 2009-11-18 13:11:19.000000000 +0000 -@@ -31,6 +31,30 @@ +--- a/action.c ++++ b/action.c +@@ -31,6 +31,30 @@ static void action_dumb(const struct set } /** @@ -32,7 +31,7 @@ diff -Naur a/action.c b/action.c * Choose what action should be taken according to passed settings. * * @1 Hotplug settings -@@ -41,16 +65,25 @@ +@@ -41,16 +65,25 @@ static void action_dumb(const struct set */ void action_perform(struct settings_t *settings, struct uevent_t *event) { int i; diff --git a/package/hotplug2/patches/110-static_worker.patch b/package/hotplug2/patches/110-static_worker.patch index bca4aace7..3a5181f74 100644 --- a/package/hotplug2/patches/110-static_worker.patch +++ b/package/hotplug2/patches/110-static_worker.patch @@ -1,6 +1,5 @@ -diff -Naur a/common.mak b/common.mak ---- a/common.mak 2009-11-18 13:15:21.000000000 +0000 -+++ b/common.mak 2009-11-18 13:25:18.000000000 +0000 +--- a/common.mak ++++ b/common.mak @@ -1,7 +1,7 @@ # vim:set sw=8 nosta: @@ -10,10 +9,9 @@ diff -Naur a/common.mak b/common.mak CFLAGS=$(COPTS) FPIC=-fPIC -diff -Naur a/Makefile b/Makefile ---- a/Makefile 2009-11-18 13:15:21.000000000 +0000 -+++ b/Makefile 2009-11-18 13:25:18.000000000 +0000 -@@ -40,5 +40,6 @@ +--- a/Makefile ++++ b/Makefile +@@ -40,5 +40,6 @@ ifdef STATIC_WORKER CFLAGS += -DSTATIC_WORKER=1 else CFLAGS += $(FPIC) diff --git a/package/ifxmips-dsl-api/Config.in b/package/ifxmips-dsl-api/Config.in index 277d96ebf..f27181e31 100644 --- a/package/ifxmips-dsl-api/Config.in +++ b/package/ifxmips-dsl-api/Config.in @@ -19,5 +19,6 @@ endchoice config IFXMIPS_DSL_DEBUG bool "ifxmips-dsl debugging" + depends on PACKAGE_kmod-ifxmips-dsl-api help Say Y, if you need ifxmips-dsl to display debug messages. diff --git a/package/ifxmips-dsl-api/Makefile b/package/ifxmips-dsl-api/Makefile index fdb07214b..3fc31eda4 100644 --- a/package/ifxmips-dsl-api/Makefile +++ b/package/ifxmips-dsl-api/Makefile @@ -117,6 +117,11 @@ define Build/Prepare $(TAR) -C $(PKG_BUILD_DIR) -xzf $(DL_DIR)/$(FW_BASE_NAME)_b-$(FW_B_VER).tar.gz endef +define Build/Configure + (cd $(PKG_BUILD_DIR); aclocal && autoconf && automake) + $(call Build/Configure/Default) +endef + define Build/Compile cd $(LINUX_DIR); \ ARCH=mips CROSS_COMPILE="$(KERNEL_CROSS)" \ diff --git a/package/ifxmips-dsl-api/patches/100-dsl_compat.patch b/package/ifxmips-dsl-api/patches/100-dsl_compat.patch index a3b9930c2..dea82f030 100644 --- a/package/ifxmips-dsl-api/patches/100-dsl_compat.patch +++ b/package/ifxmips-dsl-api/patches/100-dsl_compat.patch @@ -1,7 +1,5 @@ -Index: drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_device_danube.h -=================================================================== ---- drv_dsl_cpe_api-3.24.4.4.orig/src/include/drv_dsl_cpe_device_danube.h 2009-05-12 20:02:16.000000000 +0200 -+++ drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_device_danube.h 2009-11-01 00:57:23.000000000 +0100 +--- a/src/include/drv_dsl_cpe_device_danube.h ++++ b/src/include/drv_dsl_cpe_device_danube.h @@ -24,7 +24,7 @@ #include "drv_dsl_cpe_simulator_danube.h" #else @@ -11,10 +9,8 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/include/drv_dsl_cpe_device_danube.h #endif /* defined(DSL_CPE_SIMULATOR_DRIVER) && defined(WIN32)*/ #define DSL_MAX_LINE_NUMBER 1 -Index: drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c -=================================================================== ---- drv_dsl_cpe_api-3.24.4.4.orig/src/common/drv_dsl_cpe_os_linux.c 2009-11-01 01:00:08.000000000 +0100 -+++ drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c 2009-11-01 01:03:51.000000000 +0100 +--- a/src/common/drv_dsl_cpe_os_linux.c ++++ b/src/common/drv_dsl_cpe_os_linux.c @@ -11,6 +11,7 @@ #ifdef __LINUX__ @@ -23,7 +19,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c #include "drv_dsl_cpe_api.h" #include "drv_dsl_cpe_api_ioctl.h" -@@ -1058,6 +1059,7 @@ +@@ -1058,6 +1059,7 @@ static void DSL_DRV_DebugInit(void) /* Entry point of driver */ int __init DSL_ModuleInit(void) { @@ -31,7 +27,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/common/drv_dsl_cpe_os_linux.c DSL_int_t i; printk(DSL_DRV_CRLF DSL_DRV_CRLF "Infineon CPE API Driver version: %s" DSL_DRV_CRLF, -@@ -1104,7 +1106,8 @@ +@@ -1104,7 +1106,8 @@ int __init DSL_ModuleInit(void) } DSL_DRV_DevNodeInit(); diff --git a/package/ifxmips-dsl-api/patches/200-mei_compat.patch b/package/ifxmips-dsl-api/patches/200-mei_compat.patch index 58a1081cc..352a974e6 100644 --- a/package/ifxmips-dsl-api/patches/200-mei_compat.patch +++ b/package/ifxmips-dsl-api/patches/200-mei_compat.patch @@ -1,7 +1,5 @@ -Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c -=================================================================== ---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_mei.c 2009-10-31 23:30:20.000000000 +0100 -+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c 2010-01-24 14:21:32.000000000 +0100 +--- a/src/mei/ifxmips_mei.c ++++ b/src/mei/ifxmips_mei.c @@ -41,18 +41,20 @@ #include #include @@ -39,7 +37,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c #define IFX_MEI_EMSG(fmt, args...) printk(KERN_ERR "[%s %d]: " fmt,__FUNCTION__, __LINE__, ## args) #define IFX_MEI_DMSG(fmt, args...) printk(KERN_INFO "[%s %d]: " fmt,__FUNCTION__, __LINE__, ## args) -@@ -173,7 +175,8 @@ +@@ -173,7 +175,8 @@ static u32 *mei_arc_swap_buff = NULL; // extern void ifxmips_mask_and_ack_irq(unsigned int irq_nr); #define MEI_MASK_AND_ACK_IRQ ifxmips_mask_and_ack_irq @@ -49,7 +47,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c static struct file_operations bsp_mei_operations = { owner:THIS_MODULE, -@@ -2294,10 +2297,10 @@ +@@ -2294,10 +2297,10 @@ IFX_MEI_InitDevice (int num) IFX_MEI_EMSG ("request_irq %d failed!\n", pDev->nIrq[IFX_DFEIR]); return -1; } @@ -62,7 +60,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c // IFX_MEI_DMSG("Device %d initialized. IER %#x\n", num, bsp_get_irq_ier(pDev->nIrq[IFX_DYING_GASP])); return 0; } -@@ -2922,6 +2925,7 @@ +@@ -2922,6 +2925,7 @@ int __init IFX_MEI_ModuleInit (void) { int i = 0; @@ -70,7 +68,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c printk ("IFX MEI Version %ld.%02ld.%02ld", bsp_mei_version.major, bsp_mei_version.minor, bsp_mei_version.revision); -@@ -2935,14 +2939,15 @@ +@@ -2935,14 +2939,15 @@ IFX_MEI_ModuleInit (void) IFX_MEI_InitProcFS (i); #endif } @@ -88,7 +86,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_mei.c return 0; } -@@ -2996,3 +3001,5 @@ +@@ -2996,3 +3001,5 @@ EXPORT_SYMBOL (DSL_BSP_EventCBUnregister module_init (IFX_MEI_ModuleInit); module_exit (IFX_MEI_ModuleExit); diff --git a/package/ifxmips-dsl-api/patches/300-atm_compat.patch b/package/ifxmips-dsl-api/patches/300-atm_compat.patch index 35c7b13f8..27dc16307 100644 --- a/package/ifxmips-dsl-api/patches/300-atm_compat.patch +++ b/package/ifxmips-dsl-api/patches/300-atm_compat.patch @@ -1,7 +1,5 @@ -Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c -=================================================================== ---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_core.c 2009-11-01 14:29:05.000000000 +0100 -+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c 2009-11-01 16:07:46.000000000 +0100 +--- a/src/mei/ifxmips_atm_core.c ++++ b/src/mei/ifxmips_atm_core.c @@ -58,9 +58,8 @@ /* * Chip Specific Head File @@ -14,7 +12,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c #include "ifxmips_atm_core.h" -@@ -1146,7 +1145,7 @@ +@@ -1146,7 +1145,7 @@ static INLINE void mailbox_signal(unsign static void set_qsb(struct atm_vcc *vcc, struct atm_qos *qos, unsigned int queue) { @@ -23,7 +21,7 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c unsigned int qsb_qid = queue + FIRST_QSB_QID; union qsb_queue_parameter_table qsb_queue_parameter_table = {{0}}; union qsb_queue_vbr_parameter_table qsb_queue_vbr_parameter_table = {{0}}; -@@ -1318,7 +1317,7 @@ +@@ -1318,7 +1317,7 @@ static void set_qsb(struct atm_vcc *vcc, static void qsb_global_set(void) { @@ -32,15 +30,13 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c int i; unsigned int tmp1, tmp2, tmp3; -@@ -2505,3 +2504,4 @@ +@@ -2505,3 +2504,4 @@ static void __exit ifx_atm_exit(void) module_init(ifx_atm_init); module_exit(ifx_atm_exit); +MODULE_LICENSE("Dual BSD/GPL"); -Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_common.h -=================================================================== ---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_ppe_common.h 2009-11-01 14:30:55.000000000 +0100 -+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_common.h 2009-11-01 15:58:50.000000000 +0100 +--- a/src/mei/ifxmips_atm_ppe_common.h ++++ b/src/mei/ifxmips_atm_ppe_common.h @@ -1,9 +1,10 @@ #ifndef IFXMIPS_ATM_PPE_COMMON_H #define IFXMIPS_ATM_PPE_COMMON_H @@ -63,10 +59,8 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_common.h /* * Code/Data Memory (CDM) Interface Configuration Register */ -Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.h -=================================================================== ---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_core.h 2009-11-01 14:30:55.000000000 +0100 -+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.h 2009-11-01 15:58:50.000000000 +0100 +--- a/src/mei/ifxmips_atm_core.h ++++ b/src/mei/ifxmips_atm_core.h @@ -25,8 +25,8 @@ #define IFXMIPS_ATM_CORE_H @@ -78,10 +72,8 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.h #include "ifxmips_atm_ppe_common.h" #include "ifxmips_atm_fw_regs_common.h" -Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_compat.h -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_compat.h 2009-11-01 15:58:50.000000000 +0100 +--- /dev/null ++++ b/src/mei/ifxmips_compat.h @@ -0,0 +1,43 @@ +#ifndef _IFXMIPS_COMPAT_H__ +#define _IFXMIPS_COMPAT_H__ @@ -126,10 +118,8 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_compat.h +#define CONFIG_IFXMIPS_DSL_CPE_MEI y + +#endif -Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_danube.h -=================================================================== ---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_ppe_danube.h 2009-11-01 14:30:55.000000000 +0100 -+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_danube.h 2009-11-01 15:58:50.000000000 +0100 +--- a/src/mei/ifxmips_atm_ppe_danube.h ++++ b/src/mei/ifxmips_atm_ppe_danube.h @@ -1,7 +1,7 @@ #ifndef IFXMIPS_ATM_PPE_DANUBE_H #define IFXMIPS_ATM_PPE_DANUBE_H @@ -148,10 +138,8 @@ Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_ppe_danube.h -Index: drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_danube.c -=================================================================== ---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_danube.c 2009-11-01 14:29:18.000000000 +0100 -+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_danube.c 2009-11-01 15:58:50.000000000 +0100 +--- a/src/mei/ifxmips_atm_danube.c ++++ b/src/mei/ifxmips_atm_danube.c @@ -45,10 +45,9 @@ /* * Chip Specific Head File diff --git a/package/ifxmips-dsl-api/patches/400-debug-output.patch b/package/ifxmips-dsl-api/patches/400-debug-output.patch index d3b05b1b2..59d4b41cc 100644 --- a/package/ifxmips-dsl-api/patches/400-debug-output.patch +++ b/package/ifxmips-dsl-api/patches/400-debug-output.patch @@ -1,6 +1,6 @@ ---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_mei.c 2010-03-14 02:59:49.000000000 +0100 -+++ drv_dsl_cpe_api-3.24.4.4/src/mei//ifxmips_mei.c 2010-03-14 03:02:13.000000000 +0100 -@@ -78,8 +78,8 @@ +--- a/src/mei/ifxmips_mei.c ++++ b/src/mei/ifxmips_mei.c +@@ -79,8 +79,8 @@ #define ifxmips_w32(val, reg) __raw_writel(val, reg) #define ifxmips_w32_mask(clear, set, reg) ifxmips_w32((ifxmips_r32(reg) & ~clear) | set, reg) */ @@ -11,7 +11,7 @@ #ifdef CONFIG_IFXMIPS_MEI_FW_LOOPBACK //#define DFE_MEM_TEST -@@ -1300,7 +1300,7 @@ IFX_MEI_RunAdslModem (DSL_DEV_Device_t * +@@ -1301,7 +1301,7 @@ IFX_MEI_RunAdslModem (DSL_DEV_Device_t * IFX_MEI_EMSG (">>> malloc fail for codeswap buff!!! <<<\n"); return DSL_DEV_MEI_ERR_FAILURE; } @@ -20,7 +20,7 @@ } DSL_DEV_PRIVATE(pDev)->img_hdr = -@@ -1475,7 +1475,7 @@ IFX_MEI_DFEMemoryFree (DSL_DEV_Device_t +@@ -1476,7 +1476,7 @@ IFX_MEI_DFEMemoryFree (DSL_DEV_Device_t } if(mei_arc_swap_buff != NULL){ @@ -29,7 +29,7 @@ kfree(mei_arc_swap_buff); mei_arc_swap_buff=NULL; } -@@ -1495,7 +1495,7 @@ IFX_MEI_DFEMemoryAlloc (DSL_DEV_Device_t +@@ -1496,7 +1496,7 @@ IFX_MEI_DFEMemoryAlloc (DSL_DEV_Device_t // DSL_DEV_PRIVATE(pDev)->adsl_mem_info; int allocate_size = SDRAM_SEGMENT_SIZE; @@ -38,7 +38,7 @@ // Alloc Swap Pages for (idx = 0; size > 0 && idx < MAX_BAR_REGISTERS; idx++) { // skip bar15 for XDATA usage. -@@ -1595,7 +1595,7 @@ DSL_BSP_FWDownload (DSL_DEV_Device_t * p +@@ -1596,7 +1596,7 @@ DSL_BSP_FWDownload (DSL_DEV_Device_t * p ssize_t retval = -ENOMEM; int idx = 0; @@ -47,7 +47,7 @@ if (*loff == 0) { if (size < sizeof (img_hdr_tmp)) { -@@ -1647,7 +1647,7 @@ DSL_BSP_FWDownload (DSL_DEV_Device_t * p +@@ -1648,7 +1648,7 @@ DSL_BSP_FWDownload (DSL_DEV_Device_t * p goto error; } adsl_mem_info[XDATA_REGISTER].type = FREE_RELOAD; @@ -56,7 +56,7 @@ IFX_MEI_BarUpdate (pDev, (DSL_DEV_PRIVATE(pDev)->nBar)); } else if (DSL_DEV_PRIVATE(pDev)-> image_size == 0) { -@@ -1926,7 +1926,7 @@ static void +@@ -1927,7 +1927,7 @@ static void WriteMbox (u32 * mboxarray, u32 size) { IFX_MEI_DebugWrite (&dsl_devices[0], IMBOX_BASE, mboxarray, size); @@ -65,7 +65,7 @@ IFX_MEI_LongWordWriteOffset (&dsl_devices[0], (u32) ME_ME2ARC_INT, MEI_TO_ARC_MSGAV); } -@@ -1935,7 +1935,7 @@ static void +@@ -1936,7 +1936,7 @@ static void ReadMbox (u32 * mboxarray, u32 size) { IFX_MEI_DebugRead (&dsl_devices[0], OMBOX_BASE, mboxarray, size); @@ -74,7 +74,7 @@ } static void -@@ -1965,7 +1965,7 @@ arc_code_page_download (uint32_t arc_cod +@@ -1966,7 +1966,7 @@ arc_code_page_download (uint32_t arc_cod { int count; @@ -83,7 +83,7 @@ IFX_MEI_ControlModeSet (&dsl_devices[0], MEI_MASTER_MODE); IFX_MEI_HaltArc (&dsl_devices[0]); IFX_MEI_LongWordWriteOffset (&dsl_devices[0], (u32) ME_DX_AD, 0); -@@ -2004,21 +2004,21 @@ dfe_loopback_irq_handler (DSL_DEV_Device +@@ -2005,21 +2005,21 @@ dfe_loopback_irq_handler (DSL_DEV_Device memset (&rd_mbox[0], 0, 10 * 4); ReadMbox (&rd_mbox[0], 6); if (rd_mbox[0] == 0x0) { @@ -110,7 +110,7 @@ } } } -@@ -2036,21 +2036,21 @@ wait_mem_test_result (void) +@@ -2037,21 +2037,21 @@ wait_mem_test_result (void) uint32_t mbox[5]; mbox[0] = 0; @@ -137,7 +137,7 @@ } } -@@ -2066,7 +2066,7 @@ arc_ping_testing (DSL_DEV_Device_t *pDev +@@ -2067,7 +2067,7 @@ arc_ping_testing (DSL_DEV_Device_t *pDev rd_mbox[i] = 0; } @@ -146,7 +146,7 @@ wr_mbox[0] = MEI_PING; WriteMbox (&wr_mbox[0], 10); -@@ -2074,7 +2074,7 @@ arc_ping_testing (DSL_DEV_Device_t *pDev +@@ -2075,7 +2075,7 @@ arc_ping_testing (DSL_DEV_Device_t *pDev MEI_WAIT (100); } @@ -155,7 +155,7 @@ got_int = 0; wr_mbox[0] = 0x4; -@@ -2093,14 +2093,14 @@ arc_ping_testing (DSL_DEV_Device_t *pDev +@@ -2094,14 +2094,14 @@ arc_ping_testing (DSL_DEV_Device_t *pDev IFX_MEI_LongWordWriteOffset (&dsl_devices[0], (u32) ME_ME2ARC_INT, MEI_TO_ARC_MSGAV); @@ -173,7 +173,7 @@ got_int = 0; //schedule(); DSL_ENABLE_IRQ (pDev->nIrq[IFX_DFEIR]); -@@ -2151,7 +2151,7 @@ DFE_Loopback_Test (void) +@@ -2152,7 +2152,7 @@ DFE_Loopback_Test (void) DSL_DEV_PRIVATE(pDev)->adsl_mem_info[idx].type = FREE_RELOAD; IFX_MEI_WRITE_REGISTER_L ((((uint32_t) DSL_DEV_PRIVATE(pDev)->adsl_mem_info[idx].address) & 0x0fffffff), IFXMIPS_MEI_BASE_ADDR + ME_XMEM_BAR_BASE + idx * 4); @@ -182,7 +182,7 @@ IFXMIPS_MEI_BASE_ADDR + ME_XMEM_BAR_BASE + idx * 4, (((uint32_t) ((ifx_mei_device_private_t *) -@@ -2168,20 +2168,20 @@ DFE_Loopback_Test (void) +@@ -2169,20 +2169,20 @@ DFE_Loopback_Test (void) return DSL_DEV_MEI_ERR_FAILURE; } //WriteARCreg(AUX_IC_CTRL,2); @@ -207,7 +207,7 @@ memcpy ((u8 *) (DSL_DEV_PRIVATE(pDev)-> adsl_mem_info[0].address + 0x1004), &arc_ahb_access_code[0], sizeof (arc_ahb_access_code)); -@@ -2189,13 +2189,13 @@ DFE_Loopback_Test (void) +@@ -2190,13 +2190,13 @@ DFE_Loopback_Test (void) #endif //DFE_PING_TEST @@ -223,7 +223,7 @@ #endif //DFE_MEM_TEST #ifdef DFE_ATM_LOOPBACK arc_debug_data = 0xf; -@@ -2214,7 +2214,7 @@ DFE_Loopback_Test (void) +@@ -2215,7 +2215,7 @@ DFE_Loopback_Test (void) IFX_MEI_DebugWrite (&dsl_devices[0], 0x32010, &arc_debug_data, 1); #endif //DFE_ATM_LOOPBACK IFX_MEI_IRQEnable (pDev); @@ -232,7 +232,7 @@ IFX_MEI_RunArc (&dsl_devices[0]); #ifdef DFE_PING_TEST -@@ -2525,7 +2525,7 @@ IFX_MEI_Ioctls (DSL_DEV_Device_t * pDev, +@@ -2526,7 +2526,7 @@ IFX_MEI_Ioctls (DSL_DEV_Device_t * pDev, break; case DSL_FIO_BSP_DSL_START: @@ -241,7 +241,7 @@ if ((meierr = IFX_MEI_RunAdslModem (pDev)) != DSL_DEV_MEI_ERR_SUCCESS) { IFX_MEI_EMSG ("IFX_MEI_RunAdslModem() error..."); meierr = DSL_DEV_MEI_ERR_FAILURE; -@@ -2926,11 +2926,11 @@ IFX_MEI_ModuleInit (void) +@@ -2927,11 +2927,11 @@ IFX_MEI_ModuleInit (void) int i = 0; static struct class *dsl_class; @@ -255,7 +255,7 @@ return -EIO; } IFX_MEI_InitDevNode (i); -@@ -2942,7 +2942,7 @@ IFX_MEI_ModuleInit (void) +@@ -2943,7 +2943,7 @@ IFX_MEI_ModuleInit (void) dsl_bsp_event_callback[i].function = NULL; #ifdef CONFIG_IFXMIPS_MEI_FW_LOOPBACK @@ -264,9 +264,9 @@ DFE_Loopback_Test (); #endif dsl_class = class_create(THIS_MODULE, "ifx_mei"); ---- drv_dsl_cpe_api-3.24.4.4.orig/src/mei/ifxmips_atm_core.c 2010-03-13 16:42:49.000000000 +0100 -+++ drv_dsl_cpe_api-3.24.4.4/src/mei/ifxmips_atm_core.c 2010-03-14 03:39:05.000000000 +0100 -@@ -2336,7 +2335,7 @@ static int atm_showtime_enter(struct por +--- a/src/mei/ifxmips_atm_core.c ++++ b/src/mei/ifxmips_atm_core.c +@@ -2335,7 +2335,7 @@ static int atm_showtime_enter(struct por IFX_REG_W32(0x0F, UTP_CFG); #endif @@ -275,7 +275,7 @@ return IFX_SUCCESS; } -@@ -2352,7 +2351,7 @@ static int atm_showtime_exit(void) +@@ -2351,7 +2351,7 @@ static int atm_showtime_exit(void) // TODO: ReTX clean state g_xdata_addr = NULL; @@ -284,4 +284,3 @@ return IFX_SUCCESS; } - diff --git a/package/ifxmips-dsl-api/patches/500-portability.patch b/package/ifxmips-dsl-api/patches/500-portability.patch new file mode 100644 index 000000000..cbac514f2 --- /dev/null +++ b/package/ifxmips-dsl-api/patches/500-portability.patch @@ -0,0 +1,184 @@ +--- a/configure.in ++++ b/configure.in +@@ -333,12 +333,12 @@ AC_ARG_ENABLE(ifxos-include, + echo Set the lib_ifxos include path $enableval + AC_SUBST([IFXOS_INCLUDE_PATH],[$enableval]) + else +- echo -e Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH ++ echo Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH + AC_SUBST([IFXOS_INCLUDE_PATH],[$DEFAULT_IFXOS_INCLUDE_PATH]) + fi + ], + [ +- echo -e Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH ++ echo Set the default lib_ifxos include path $DEFAULT_IFXOS_INCLUDE_PATH + AC_SUBST([IFXOS_INCLUDE_PATH],[$DEFAULT_IFXOS_INCLUDE_PATH]) + ] + ) +@@ -1702,73 +1702,73 @@ dnl Set the configure params for dist ch + AC_SUBST([DISTCHECK_CONFIGURE_PARAMS],[$CONFIGURE_OPTIONS]) + + AC_CONFIG_COMMANDS_PRE([ +-echo -e "------------------------------------------------------------------------" +-echo -e " Configuration for drv_dsl_cpe_api:" +-echo -e " Configure model type: $DSL_CONFIG_MODEL_TYPE" +-echo -e " Source code location: $srcdir" +-echo -e " Compiler: $CC" +-echo -e " Compiler c-flags: $CFLAGS" +-echo -e " Extra compiler c-flags: $EXTRA_DRV_CFLAGS" +-echo -e " Host System Type: $host" +-echo -e " Install path: $prefix" +-echo -e " Linux kernel include path: $KERNEL_INCL_PATH" +-echo -e " Linux kernel build path: $KERNEL_BUILD_PATH" +-echo -e " Linux kernel architecture: $KERNEL_ARCH" +-echo -e " Include IFXOS: $INCLUDE_DSL_CPE_API_IFXOS_SUPPORT" +-echo -e " IFXOS include path: $IFXOS_INCLUDE_PATH" +-echo -e " Driver Include Path $DSL_DRIVER_INCL_PATH" +-echo -e " DSL device: $DSL_DEVICE_NAME" +-echo -e " Max device number: $DSL_DRV_MAX_DEVICE_NUMBER" +-echo -e " Channels per line: $DSL_CHANNELS_PER_LINE" +-echo -e " Build lib (only for kernel 2.6) $DSL_CPE_API_LIBRARY_BUILD_2_6" +-echo -e " DSL data led flash frequency: $DSL_DATA_LED_FLASH_FREQUENCY Hz" +-echo -e " Disable debug prints: $DSL_DEBUG_DISABLE" +-echo -e " Preselection of max. debug level: $DSL_DBG_MAX_LEVEL_SET" +-echo -e " Preselected max. debug level: $DSL_DBG_MAX_LEVEL_PRE" +-echo -e " Include deprecated functions: $INCLUDE_DEPRECATED" +-echo -e " Include Device Exception Codes: $INCLUDE_DEVICE_EXCEPTION_CODES" +-echo -e " Include FW request support: $INCLUDE_FW_REQUEST_SUPPORT" +-echo -e " Include ADSL trace buffer: $INCLUDE_DSL_CPE_TRACE_BUFFER" +-echo -e " Include ADSL MIB: $INCLUDE_DSL_ADSL_MIB" +-echo -e " Include ADSL LED: $INCLUDE_ADSL_LED" +-echo -e " Include CEOC: $INCLUDE_DSL_CEOC" +-echo -e " Include config get support: $INCLUDE_DSL_CONFIG_GET" +-echo -e " Include System i/f configuration: $INCLUDE_DSL_SYSTEM_INTERFACE" +-echo -e " Include Resource Statistics: $INCLUDE_DSL_RESOURCE_STATISTICS" +-echo -e " Include Framing Parameters: $INCLUDE_DSL_FRAMING_PARAMETERS" +-echo -e " Include G997 Line Inventory: $INCLUDE_DSL_G997_LINE_INVENTORY" +-echo -e " Include G997 Framing Parameters: $INCLUDE_DSL_G997_FRAMING_PARAMETERS" +-echo -e " Include G997 per tone data: $INCLUDE_DSL_G997_PER_TONE" +-echo -e " Include G997 status: $INCLUDE_DSL_G997_STATUS" +-echo -e " Include G997 alarm: $INCLUDE_DSL_G997_ALARM" +-echo -e " Include DSL Bonding: $INCLUDE_DSL_BONDING" +-echo -e " Include Misc Line Status $INCLUDE_DSL_CPE_MISC_LINE_STATUS" +-echo -e " Include DELT: $INCLUDE_DSL_DELT" +-echo -e " Include DELT data static storage: $DSL_CPE_STATIC_DELT_DATA" +-echo -e " Include PM: $INCLUDE_DSL_PM" +-echo -e " Include PM config: $INCLUDE_DSL_CPE_PM_CONFIG" +-echo -e " Include PM total: $INCLUDE_DSL_CPE_PM_TOTAL_COUNTERS" +-echo -e " Include PM history: $INCLUDE_DSL_CPE_PM_HISTORY" +-echo -e " Include PM showtime: $INCLUDE_DSL_CPE_PM_SHOWTIME_COUNTERS" +-echo -e " Include PM optional: $INCLUDE_DSL_CPE_PM_OPTIONAL_PARAMETERS" +-echo -e " Include PM line: $INCLUDE_DSL_CPE_PM_LINE_COUNTERS" +-echo -e " Include PM line event showtime: $INCLUDE_DSL_CPE_PM_LINE_EVENT_SHOWTIME_COUNTERS" +-echo -e " Include PM channel: $INCLUDE_DSL_CPE_PM_CHANNEL_COUNTERS" +-echo -e " Include PM channel extended: $INCLUDE_DSL_CPE_PM_CHANNEL_EXT_COUNTERS" +-echo -e " Include PM data path: $INCLUDE_DSL_CPE_PM_DATA_PATH_COUNTERS" +-echo -e " Include PM data path failure: $INCLUDE_DSL_CPE_PM_DATA_PATH_FAILURE_COUNTERS" +-echo -e " Include PM ReTx: $INCLUDE_DSL_CPE_PM_RETX_COUNTERS" +-echo -e " Include PM line threshold: $INCLUDE_DSL_CPE_PM_LINE_THRESHOLDS" +-echo -e " Include PM channel threshold: $INCLUDE_DSL_CPE_PM_CHANNEL_THRESHOLDS" +-echo -e " Include PM data path threshold: $INCLUDE_DSL_CPE_PM_DATA_PATH_THRESHOLDS" +-echo -e " Include PM ReTx threshold: $INCLUDE_DSL_CPE_PM_RETX_THRESHOLDS" +-echo -e " Include FW memory free support: $INCLUDE_DSL_FIRMWARE_MEMORY_FREE" +-echo -e "----------------------- deprectated ! ----------------------------------" +-echo -e " Include PM line failure: $INCLUDE_DSL_CPE_PM_LINE_FAILURE_COUNTERS" +-echo -e "" +-echo -e " Settings:" +-echo -e " Configure options: $CONFIGURE_OPTIONS" +-echo -e "------------------------------------------------------------------------" ++echo "------------------------------------------------------------------------" ++echo " Configuration for drv_dsl_cpe_api:" ++echo " Configure model type: $DSL_CONFIG_MODEL_TYPE" ++echo " Source code location: $srcdir" ++echo " Compiler: $CC" ++echo " Compiler c-flags: $CFLAGS" ++echo " Extra compiler c-flags: $EXTRA_DRV_CFLAGS" ++echo " Host System Type: $host" ++echo " Install path: $prefix" ++echo " Linux kernel include path: $KERNEL_INCL_PATH" ++echo " Linux kernel build path: $KERNEL_BUILD_PATH" ++echo " Linux kernel architecture: $KERNEL_ARCH" ++echo " Include IFXOS: $INCLUDE_DSL_CPE_API_IFXOS_SUPPORT" ++echo " IFXOS include path: $IFXOS_INCLUDE_PATH" ++echo " Driver Include Path $DSL_DRIVER_INCL_PATH" ++echo " DSL device: $DSL_DEVICE_NAME" ++echo " Max device number: $DSL_DRV_MAX_DEVICE_NUMBER" ++echo " Channels per line: $DSL_CHANNELS_PER_LINE" ++echo " Build lib (only for kernel 2.6) $DSL_CPE_API_LIBRARY_BUILD_2_6" ++echo " DSL data led flash frequency: $DSL_DATA_LED_FLASH_FREQUENCY Hz" ++echo " Disable debug prints: $DSL_DEBUG_DISABLE" ++echo " Preselection of max. debug level: $DSL_DBG_MAX_LEVEL_SET" ++echo " Preselected max. debug level: $DSL_DBG_MAX_LEVEL_PRE" ++echo " Include deprecated functions: $INCLUDE_DEPRECATED" ++echo " Include Device Exception Codes: $INCLUDE_DEVICE_EXCEPTION_CODES" ++echo " Include FW request support: $INCLUDE_FW_REQUEST_SUPPORT" ++echo " Include ADSL trace buffer: $INCLUDE_DSL_CPE_TRACE_BUFFER" ++echo " Include ADSL MIB: $INCLUDE_DSL_ADSL_MIB" ++echo " Include ADSL LED: $INCLUDE_ADSL_LED" ++echo " Include CEOC: $INCLUDE_DSL_CEOC" ++echo " Include config get support: $INCLUDE_DSL_CONFIG_GET" ++echo " Include System i/f configuration: $INCLUDE_DSL_SYSTEM_INTERFACE" ++echo " Include Resource Statistics: $INCLUDE_DSL_RESOURCE_STATISTICS" ++echo " Include Framing Parameters: $INCLUDE_DSL_FRAMING_PARAMETERS" ++echo " Include G997 Line Inventory: $INCLUDE_DSL_G997_LINE_INVENTORY" ++echo " Include G997 Framing Parameters: $INCLUDE_DSL_G997_FRAMING_PARAMETERS" ++echo " Include G997 per tone data: $INCLUDE_DSL_G997_PER_TONE" ++echo " Include G997 status: $INCLUDE_DSL_G997_STATUS" ++echo " Include G997 alarm: $INCLUDE_DSL_G997_ALARM" ++echo " Include DSL Bonding: $INCLUDE_DSL_BONDING" ++echo " Include Misc Line Status $INCLUDE_DSL_CPE_MISC_LINE_STATUS" ++echo " Include DELT: $INCLUDE_DSL_DELT" ++echo " Include DELT data static storage: $DSL_CPE_STATIC_DELT_DATA" ++echo " Include PM: $INCLUDE_DSL_PM" ++echo " Include PM config: $INCLUDE_DSL_CPE_PM_CONFIG" ++echo " Include PM total: $INCLUDE_DSL_CPE_PM_TOTAL_COUNTERS" ++echo " Include PM history: $INCLUDE_DSL_CPE_PM_HISTORY" ++echo " Include PM showtime: $INCLUDE_DSL_CPE_PM_SHOWTIME_COUNTERS" ++echo " Include PM optional: $INCLUDE_DSL_CPE_PM_OPTIONAL_PARAMETERS" ++echo " Include PM line: $INCLUDE_DSL_CPE_PM_LINE_COUNTERS" ++echo " Include PM line event showtime: $INCLUDE_DSL_CPE_PM_LINE_EVENT_SHOWTIME_COUNTERS" ++echo " Include PM channel: $INCLUDE_DSL_CPE_PM_CHANNEL_COUNTERS" ++echo " Include PM channel extended: $INCLUDE_DSL_CPE_PM_CHANNEL_EXT_COUNTERS" ++echo " Include PM data path: $INCLUDE_DSL_CPE_PM_DATA_PATH_COUNTERS" ++echo " Include PM data path failure: $INCLUDE_DSL_CPE_PM_DATA_PATH_FAILURE_COUNTERS" ++echo " Include PM ReTx: $INCLUDE_DSL_CPE_PM_RETX_COUNTERS" ++echo " Include PM line threshold: $INCLUDE_DSL_CPE_PM_LINE_THRESHOLDS" ++echo " Include PM channel threshold: $INCLUDE_DSL_CPE_PM_CHANNEL_THRESHOLDS" ++echo " Include PM data path threshold: $INCLUDE_DSL_CPE_PM_DATA_PATH_THRESHOLDS" ++echo " Include PM ReTx threshold: $INCLUDE_DSL_CPE_PM_RETX_THRESHOLDS" ++echo " Include FW memory free support: $INCLUDE_DSL_FIRMWARE_MEMORY_FREE" ++echo "----------------------- deprectated ! ----------------------------------" ++echo " Include PM line failure: $INCLUDE_DSL_CPE_PM_LINE_FAILURE_COUNTERS" ++echo "" ++echo " Settings:" ++echo " Configure options: $CONFIGURE_OPTIONS" ++echo "------------------------------------------------------------------------" + ]) + + AC_CONFIG_FILES([Makefile src/Makefile]) +--- a/src/Makefile.am ++++ b/src/Makefile.am +@@ -303,7 +303,7 @@ if KERNEL_2_6 + drv_dsl_cpe_api_OBJS = "$(subst .c,.o,$(filter %.c,$(drv_dsl_cpe_api_SOURCES)))" + + drv_dsl_cpe_api.ko: $(drv_dsl_cpe_api_SOURCES) +- @echo -e "drv_dsl_cpe_api: Making Linux 2.6.x kernel object" ++ @echo "drv_dsl_cpe_api: Making Linux 2.6.x kernel object" + if test ! -e common/drv_dsl_cpe_api.c ; then \ + echo "copy source files (as links only!)"; \ + for f in $(filter %.c,$(drv_dsl_cpe_api_SOURCES)); do \ +@@ -311,10 +311,10 @@ drv_dsl_cpe_api.ko: $(drv_dsl_cpe_api_SO + cp -s $(addprefix @abs_srcdir@/,$$f) $(PWD)/`dirname $$f`/ ; \ + done \ + fi +- @echo -e "# drv_dsl_cpe_api: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild +- @echo -e "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild +- @echo -e "$(subst .ko,,$@)-y := $(drv_dsl_cpe_api_OBJS)" >> $(PWD)/Kbuild +- @echo -e "EXTRA_CFLAGS := $(CFLAGS) -DHAVE_CONFIG_H $(drv_dsl_cpe_api_CFLAGS) $(DSL_DRIVER_INCL_PATH) $(IFXOS_INCLUDE_PATH) -I@abs_srcdir@/include -I$(PWD)/include" >> $(PWD)/Kbuild ++ @echo "# drv_dsl_cpe_api: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild ++ @echo "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild ++ @echo "$(subst .ko,,$@)-y := $(drv_dsl_cpe_api_OBJS)" >> $(PWD)/Kbuild ++ @echo "EXTRA_CFLAGS := $(CFLAGS) -DHAVE_CONFIG_H $(drv_dsl_cpe_api_CFLAGS) $(DSL_DRIVER_INCL_PATH) $(IFXOS_INCLUDE_PATH) -I@abs_srcdir@/include -I$(PWD)/include" >> $(PWD)/Kbuild + $(MAKE) ARCH=@KERNEL_ARCH@ -C @KERNEL_BUILD_PATH@ O=@KERNEL_BUILD_PATH@ M=$(PWD) modules + + clean-generic: diff --git a/package/ifxmips-dsl-control/Makefile b/package/ifxmips-dsl-control/Makefile index 90cefd259..035deada1 100644 --- a/package/ifxmips-dsl-control/Makefile +++ b/package/ifxmips-dsl-control/Makefile @@ -7,6 +7,7 @@ # ralph / blogic include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk PKG_BASE_NAME:=dsl_cpe_control_danube PKG_VERSION:=3.24.4.4 @@ -73,6 +74,8 @@ CONFIGURE_ARGS += \ --enable-soap-support endif +TARGET_CFLAGS += -I$(LINUX_DIR)/include + define Package/ifxmips-dsl-control/install $(INSTALL_DIR) $(1)/etc/init.d $(INSTALL_BIN) ./files/ifx_cpe_control_init.sh $(1)/etc/init.d/ diff --git a/package/ifxos/Makefile b/package/ifxos/Makefile new file mode 100644 index 000000000..de4da7de8 --- /dev/null +++ b/package/ifxos/Makefile @@ -0,0 +1,50 @@ +# +# Copyright (C) 2009 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# +# $Id: $ + +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk + +PKG_NAME:=lib_ifxos +PKG_VERSION:=1.5.10 +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz +PKG_RELEASE:=1 +PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources +PKG_MD5SUM:=3602797b0f531f37546c6beb748d50cf + +include $(INCLUDE_DIR)/package.mk + +define KernelPackage/ifxos + SUBMENU:=Lantiq + TITLE:=Lantiq OS abstraction library + URL:=http://www.lantiq.com/ + MAINTAINER:=Lantiq + DEPENDS:=@TARGET_ifxmips + FILES:=$(PKG_BUILD_DIR)/src/drv_ifxos.$(LINUX_KMOD_SUFFIX) + AUTOLOAD:=$(call AutoLoad,10,drv_ifxos) +endef + +CONFIGURE_ARGS += \ + ARCH=$(LINUX_KARCH) \ + --enable-linux-26 \ + --enable-kernelbuild="$(LINUX_DIR)" \ + --enable-kernelincl="$(LINUX_DIR)/include" \ + --enable-add_drv_cflags="-fno-pic -mno-abicalls -mlong-calls -G 0" + +define Build/Configure + (cd $(PKG_BUILD_DIR); aclocal && autoconf && automake) + $(call Build/Configure/Default) +endef + +define Build/InstallDev + $(INSTALL_DIR) $(1)/usr/{lib,include/ifxos} + $(CP) $(PKG_BUILD_DIR)/src/include/* $(1)/usr/include/ifxos + mkdir -p $(1)/usr/lib + $(CP) $(PKG_BUILD_DIR)/src/libifxos.a $(1)/usr/lib/libifxos.a +endef + +$(eval $(call KernelPackage,ifxos)) diff --git a/package/ifxos/patches/100-portability.patch b/package/ifxos/patches/100-portability.patch new file mode 100644 index 000000000..92b0ea01c --- /dev/null +++ b/package/ifxos/patches/100-portability.patch @@ -0,0 +1,43 @@ +--- a/configure.in ++++ b/configure.in +@@ -149,12 +149,12 @@ AC_ARG_ENABLE(targetincl, + echo Set the target image include path $enableval + AC_SUBST([TARGET_INCL_PATH],[$enableval]) + else +- echo -e Set the default target image include path $DEFAULT_TARGET_INCL_PATH ++ echo Set the default target image include path $DEFAULT_TARGET_INCL_PATH + AC_SUBST([TARGET_INCL_PATH],[$DEFAULT_TARGET_INCL_PATH]) + fi + ], + [ +- echo -e Set the default target image include path $DEFAULT_TARGET_INCL_PATH ++ echo Set the default target image include path $DEFAULT_TARGET_INCL_PATH + AC_SUBST([TARGET_INCL_PATH],[$DEFAULT_TARGET_INCL_PATH]) + ] + ) +--- a/src/Makefile.am ++++ b/src/Makefile.am +@@ -610,7 +610,7 @@ if KERNEL_2_6 + drv_ifxos_OBJS = "$(subst .c,.o,$(filter %.c,$(drv_ifxos_SOURCES)))" + + drv_ifxos.ko: $(drv_ifxos_SOURCES) +- @echo -e "drv_ifxos: Making Linux 2.6.x kernel object" ++ @echo "drv_ifxos: Making Linux 2.6.x kernel object" + if test ! -e common/ifxos_debug.c ; then \ + echo "copy source files (as links only!)"; \ + for f in $(filter %.c,$(drv_ifxos_SOURCES)); do \ +@@ -618,10 +618,10 @@ drv_ifxos.ko: $(drv_ifxos_SOURCES) + cp -s $(addprefix @abs_srcdir@/,$$f) $(PWD)/`dirname $$f`/ ; \ + done \ + fi +- @echo -e "# drv_ifxos: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild +- @echo -e "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild +- @echo -e "$(subst .ko,,$@)-y := $(drv_ifxos_OBJS)" >> $(PWD)/Kbuild +- @echo -e "EXTRA_CFLAGS := $(CFLAGS) -DHAVE_CONFIG_H $(drv_ifxos_CFLAGS) $(DSL_DRIVER_INCL_PATH) -I@abs_srcdir@/include -I$(PWD)/include" >> $(PWD)/Kbuild ++ @echo "# drv_ifxos: Generated to build Linux 2.6.x kernel object" > $(PWD)/Kbuild ++ @echo "obj-m := $(subst .ko,.o,$@)" >> $(PWD)/Kbuild ++ @echo "$(subst .ko,,$@)-y := $(drv_ifxos_OBJS)" >> $(PWD)/Kbuild ++ @echo "EXTRA_CFLAGS := $(CFLAGS) -DHAVE_CONFIG_H $(drv_ifxos_CFLAGS) $(DSL_DRIVER_INCL_PATH) -I@abs_srcdir@/include -I$(PWD)/include" >> $(PWD)/Kbuild + $(MAKE) ARCH=@KERNEL_ARCH@ -C @KERNEL_BUILD_PATH@ O=@KERNEL_BUILD_PATH@ M=$(PWD) modules + + clean-generic: diff --git a/package/iproute2/patches/110-extra-ccopts.patch b/package/iproute2/patches/110-extra-ccopts.patch index b1edc6a96..1921ae9e2 100644 --- a/package/iproute2/patches/110-extra-ccopts.patch +++ b/package/iproute2/patches/110-extra-ccopts.patch @@ -1,6 +1,6 @@ ---- ./Makefile.old 2009-10-18 21:14:18.344641842 +0200 -+++ ./Makefile 2009-10-18 21:14:33.558618672 +0200 -@@ -22,7 +22,7 @@ +--- a/Makefile ++++ b/Makefile +@@ -22,7 +22,7 @@ ADDLIB+=ipx_ntop.o ipx_pton.o CC = gcc HOSTCC = gcc diff --git a/package/iptables/patches/002-layer7_2.17.patch b/package/iptables/patches/002-layer7_2.17.patch index a62d87f61..3257f0fb7 100644 --- a/package/iptables/patches/002-layer7_2.17.patch +++ b/package/iptables/patches/002-layer7_2.17.patch @@ -1,6 +1,5 @@ -diff -Nur a/libxt_layer7.c b/libxt_layer7.c ---- a/extensions/libxt_layer7.c 1970-01-01 01:00:00.000000000 +0100 -+++ b/extensions/libxt_layer7.c 2008-08-22 16:00:52.000000000 +0200 +--- /dev/null ++++ b/extensions/libxt_layer7.c @@ -0,0 +1,368 @@ +/* + Shared library add-on to iptables for layer 7 matching support. @@ -370,9 +369,8 @@ diff -Nur a/libxt_layer7.c b/libxt_layer7.c +{ + xtables_register_match(&layer7); +} -diff -Nur a/libxt_layer7.man b/libxt_layer7.man ---- a/extensions/libxt_layer7.man 1970-01-01 01:00:00.000000000 +0100 -+++ b/extensions/libxt_layer7.man 2008-08-22 16:00:52.000000000 +0200 +--- /dev/null ++++ b/extensions/libxt_layer7.man @@ -0,0 +1,14 @@ +This module matches packets based on the application layer data of +their connections. It uses regular expression matching to compare diff --git a/package/iptables/patches/009-table-alignment.patch b/package/iptables/patches/009-table-alignment.patch index b11c0afd6..53012ab32 100644 --- a/package/iptables/patches/009-table-alignment.patch +++ b/package/iptables/patches/009-table-alignment.patch @@ -1,6 +1,6 @@ --- a/libiptc/libiptc.c +++ b/libiptc/libiptc.c -@@ -69,7 +69,7 @@ +@@ -69,7 +69,7 @@ static const char *hooknames[] = { struct ipt_error_target { STRUCT_ENTRY_TARGET t; diff --git a/package/iptables/patches/010-multiport-linux-2.4-compat.patch b/package/iptables/patches/010-multiport-linux-2.4-compat.patch index 7233d3aeb..e87dfc1b6 100644 --- a/package/iptables/patches/010-multiport-linux-2.4-compat.patch +++ b/package/iptables/patches/010-multiport-linux-2.4-compat.patch @@ -22,7 +22,7 @@ static void multiport_help_v1(void) { printf( -@@ -71,26 +56,6 @@ +@@ -71,26 +56,6 @@ proto_to_name(u_int8_t proto) } } @@ -49,7 +49,7 @@ static void parse_multi_ports_v1(const char *portstring, struct xt_multiport_v1 *multiinfo, -@@ -154,73 +119,6 @@ +@@ -154,73 +119,6 @@ check_proto(u_int16_t pnum, u_int8_t inv /* Function which parses command options; returns true if it ate an option */ static int @@ -123,7 +123,7 @@ __multiport_parse_v1(int c, char **argv, int invert, unsigned int *flags, struct xt_entry_match **match, u_int16_t pnum, u_int8_t invflags) -@@ -313,55 +211,6 @@ +@@ -313,55 +211,6 @@ print_port(u_int16_t port, u_int8_t prot } /* Prints out the matchinfo. */ @@ -179,7 +179,7 @@ static void __multiport_print_v1(const struct xt_entry_match *match, int numeric, u_int16_t proto) { -@@ -418,48 +267,6 @@ +@@ -418,48 +267,6 @@ static void multiport_print6_v1(const vo } /* Saves the union ipt_matchinfo in parsable form to stdout. */ @@ -228,7 +228,7 @@ static void __multiport_save_v1(const struct xt_entry_match *match, u_int16_t proto) { -@@ -513,34 +320,6 @@ +@@ -513,34 +320,6 @@ static struct xtables_match multiport_mt { .family = NFPROTO_IPV4, .name = "multiport", diff --git a/package/kernel/modules/crypto.mk b/package/kernel/modules/crypto.mk index 0e161fea0..d3c24c9c7 100644 --- a/package/kernel/modules/crypto.mk +++ b/package/kernel/modules/crypto.mk @@ -267,7 +267,6 @@ $(call KernelPackage/crypto/Depends,) $(LINUX_DIR)/crypto/sha512$(SHA512_SUFFIX).$(LINUX_KMOD_SUFFIX) \ $(LINUX_DIR)/crypto/tea.$(LINUX_KMOD_SUFFIX) \ $(LINUX_DIR)/crypto/twofish.$(LINUX_KMOD_SUFFIX) \ - $(LINUX_DIR)/crypto/twofish_common.$(LINUX_KMOD_SUFFIX) \ $(LINUX_DIR)/crypto/wp512.$(LINUX_KMOD_SUFFIX) endef @@ -276,7 +275,8 @@ define KernelPackage/crypto-misc/2.6 $(LINUX_DIR)/crypto/camellia.$(LINUX_KMOD_SUFFIX) \ $(LINUX_DIR)/crypto/crc32c.$(LINUX_KMOD_SUFFIX) \ $(LINUX_DIR)/crypto/fcrypt.$(LINUX_KMOD_SUFFIX) \ - $(LINUX_DIR)/crypto/tgr192.$(LINUX_KMOD_SUFFIX) + $(LINUX_DIR)/crypto/tgr192.$(LINUX_KMOD_SUFFIX) \ + $(LINUX_DIR)/crypto/twofish_common.$(LINUX_KMOD_SUFFIX) endef define KernelPackage/crypto-misc/x86 diff --git a/package/kernel/modules/other.mk b/package/kernel/modules/other.mk index 6c7f42c75..8d51f90d2 100644 --- a/package/kernel/modules/other.mk +++ b/package/kernel/modules/other.mk @@ -133,7 +133,6 @@ define KernelPackage/pcmcia-core CONFIG_PCMCIA \ CONFIG_CARDBUS \ CONFIG_PCCARD \ - CONFIG_PCCARD_NONSTATIC \ PCMCIA_DEBUG=n endef @@ -143,15 +142,15 @@ define KernelPackage/pcmcia-core/2.4 # CONFIG_CARDBUS FILES:= \ $(LINUX_DIR)/drivers/pcmcia/pcmcia_core.$(LINUX_KMOD_SUFFIX) \ - $(LINUX_DIR)/drivers/pcmcia/ds.$(LINUX_KMOD_SUFFIX) - AUTOLOAD:=$(call AutoLoad,25,pcmcia_core ds) + $(LINUX_DIR)/drivers/pcmcia/ds.$(LINUX_KMOD_SUFFIX) \ + $(LINUX_DIR)/drivers/pcmcia/yenta_socket.$(LINUX_KMOD_SUFFIX) + AUTOLOAD:=$(call AutoLoad,25,pcmcia_core ds yenta_socket) endef define KernelPackage/pcmcia-core/2.6 # KCONFIG:= \ # CONFIG_PCCARD \ # CONFIG_PCMCIA \ -# CONFIG_PCCARD_NONSTATIC \ # PCMCIA_DEBUG=n FILES:= \ $(LINUX_DIR)/drivers/pcmcia/pcmcia_core.$(LINUX_KMOD_SUFFIX) \ @@ -169,20 +168,10 @@ $(eval $(call KernelPackage,pcmcia-core)) define KernelPackage/pcmcia-yenta SUBMENU:=$(OTHER_MENU) TITLE:=yenta socket driver - DEPENDS:=kmod-pcmcia-core + DEPENDS:=@LINUX_2_6 kmod-pcmcia-core KCONFIG:= \ - CONFIG_PCMCIA \ - CONFIG_CARDBUS \ + CONFIG_PCCARD_NONSTATIC \ CONFIG_YENTA -endef - -define KernelPackage/pcmcia-yenta/2.4 - FILES:= \ - $(LINUX_DIR)/drivers/pcmcia/yenta_socket.$(LINUX_KMOD_SUFFIX) - AUTOLOAD:=$(call AutoLoad,41,yenta_socket) -endef - -define KernelPackage/pcmcia-yenta/2.6 FILES:= \ $(LINUX_DIR)/drivers/pcmcia/rsrc_nonstatic.$(LINUX_KMOD_SUFFIX) \ $(LINUX_DIR)/drivers/pcmcia/yenta_socket.$(LINUX_KMOD_SUFFIX) diff --git a/package/kernel/modules/video.mk b/package/kernel/modules/video.mk index c0ab5d15a..6bc19fd4f 100644 --- a/package/kernel/modules/video.mk +++ b/package/kernel/modules/video.mk @@ -120,7 +120,7 @@ $(call KernelPackage/video/Depends,@LINUX_2_6 @USB_SUPPORT +kmod-usb-core) TITLE:=SN9C102 Camera Chip support KCONFIG:=CONFIG_USB_SN9C102 FILES:=$(LINUX_DIR)/drivers/media/video/sn9c102/sn9c102.$(LINUX_KMOD_SUFFIX) - AUTOLOAD:=$(call AutoLoad,70,sn9c102) + AUTOLOAD:=$(call AutoLoad,70,gspca_sn9c20x) endef diff --git a/package/kernel/modules/xen.mk b/package/kernel/modules/xen.mk index e5f62ae42..2252af469 100644 --- a/package/kernel/modules/xen.mk +++ b/package/kernel/modules/xen.mk @@ -71,7 +71,7 @@ define KernelPackage/xen-fbdev ) endef -define KernelPackage/xen-fs/description +define KernelPackage/xen-fbdev/description Kernel module for the Xen virtual frame buffer endef diff --git a/package/kexec-tools/patches/0004-mips_regdefs.patch b/package/kexec-tools/patches/0004-mips_regdefs.patch index 886624ce7..7e21349aa 100644 --- a/package/kexec-tools/patches/0004-mips_regdefs.patch +++ b/package/kexec-tools/patches/0004-mips_regdefs.patch @@ -1,6 +1,5 @@ -diff -urN kexec-tools-testing-20080324/kexec/arch/mips/regdef.h kexec-tools-testing-20080324.new/kexec/arch/mips/regdef.h ---- kexec-tools-testing-20080324/kexec/arch/mips/regdef.h 1970-01-01 01:00:00.000000000 +0100 -+++ kexec-tools-testing-20080324.new/kexec/arch/mips/regdef.h 2008-07-18 13:37:18.000000000 +0200 +--- /dev/null ++++ b/kexec/arch/mips/regdef.h @@ -0,0 +1,100 @@ +/* + * This file is subject to the terms and conditions of the GNU General Public diff --git a/package/kexec-tools/patches/0005-mips64_support.patch b/package/kexec-tools/patches/0005-mips64_support.patch index 6b53eace4..e5da10e14 100644 --- a/package/kexec-tools/patches/0005-mips64_support.patch +++ b/package/kexec-tools/patches/0005-mips64_support.patch @@ -1,7 +1,5 @@ -Index: kexec-tools-2.0.1/kexec/arch/mips/Makefile -=================================================================== ---- kexec-tools-2.0.1.orig/kexec/arch/mips/Makefile 2008-07-15 02:46:43.000000000 +0200 -+++ kexec-tools-2.0.1/kexec/arch/mips/Makefile 2009-09-27 19:07:26.000000000 +0200 +--- a/kexec/arch/mips/Makefile ++++ b/kexec/arch/mips/Makefile @@ -4,7 +4,7 @@ mips_KEXEC_SRCS = kexec/arch/mips/kexec-mips.c mips_KEXEC_SRCS += kexec/arch/mips/kexec-elf-mips.c @@ -11,10 +9,8 @@ Index: kexec-tools-2.0.1/kexec/arch/mips/Makefile mips_ADD_BUFFER = mips_ADD_SEGMENT = -Index: kexec-tools-2.0.1/kexec/arch/mips/crashdump-mips.c -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ kexec-tools-2.0.1/kexec/arch/mips/crashdump-mips.c 2009-09-27 19:07:26.000000000 +0200 +--- /dev/null ++++ b/kexec/arch/mips/crashdump-mips.c @@ -0,0 +1,371 @@ +/* + * kexec: Linux boots Linux @@ -387,10 +383,8 @@ Index: kexec-tools-2.0.1/kexec/arch/mips/crashdump-mips.c + (start != end) : 0; +} + -Index: kexec-tools-2.0.1/kexec/arch/mips/crashdump-mips.h -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ kexec-tools-2.0.1/kexec/arch/mips/crashdump-mips.h 2009-09-27 19:07:26.000000000 +0200 +--- /dev/null ++++ b/kexec/arch/mips/crashdump-mips.h @@ -0,0 +1,26 @@ +#ifndef CRASHDUMP_MIPS_H +#define CRASHDUMP_MIPS_H @@ -418,10 +412,8 @@ Index: kexec-tools-2.0.1/kexec/arch/mips/crashdump-mips.h +#define BACKUP_SRC_SIZE (BACKUP_SRC_END - BACKUP_SRC_START + 1) + +#endif /* CRASHDUMP_MIPS_H */ -Index: kexec-tools-2.0.1/kexec/arch/mips/include/arch/options.h -=================================================================== ---- kexec-tools-2.0.1.orig/kexec/arch/mips/include/arch/options.h 2008-07-15 02:46:43.000000000 +0200 -+++ kexec-tools-2.0.1/kexec/arch/mips/include/arch/options.h 2009-09-27 19:18:21.000000000 +0200 +--- a/kexec/arch/mips/include/arch/options.h ++++ b/kexec/arch/mips/include/arch/options.h @@ -2,10 +2,21 @@ #define KEXEC_ARCH_MIPS_OPTIONS_H @@ -444,10 +436,8 @@ Index: kexec-tools-2.0.1/kexec/arch/mips/include/arch/options.h +#endif #endif /* KEXEC_ARCH_MIPS_OPTIONS_H */ -Index: kexec-tools-2.0.1/kexec/arch/mips/kexec-elf-mips.c -=================================================================== ---- kexec-tools-2.0.1.orig/kexec/arch/mips/kexec-elf-mips.c 2008-07-15 02:46:43.000000000 +0200 -+++ kexec-tools-2.0.1/kexec/arch/mips/kexec-elf-mips.c 2009-09-27 19:16:39.000000000 +0200 +--- a/kexec/arch/mips/kexec-elf-mips.c ++++ b/kexec/arch/mips/kexec-elf-mips.c @@ -25,51 +25,18 @@ #include #include "../../kexec.h" @@ -504,7 +494,7 @@ Index: kexec-tools-2.0.1/kexec/arch/mips/kexec-elf-mips.c int elf_mips_probe(const char *buf, off_t len) { -@@ -108,16 +75,14 @@ +@@ -108,16 +75,14 @@ int elf_mips_load(int argc, char **argv, struct kexec_info *info) { struct mem_ehdr ehdr; @@ -528,7 +518,7 @@ Index: kexec-tools-2.0.1/kexec/arch/mips/kexec-elf-mips.c static const struct option options[] = { KEXEC_ARCH_OPTIONS {"command-line", 1, 0, OPT_APPEND}, -@@ -144,38 +109,81 @@ +@@ -144,38 +109,81 @@ int elf_mips_load(int argc, char **argv, break; } } @@ -636,11 +626,9 @@ Index: kexec-tools-2.0.1/kexec/arch/mips/kexec-elf-mips.c return 0; } -Index: kexec-tools-2.0.1/kexec/arch/mips/kexec-mips.c -=================================================================== ---- kexec-tools-2.0.1.orig/kexec/arch/mips/kexec-mips.c 2008-07-15 02:46:43.000000000 +0200 -+++ kexec-tools-2.0.1/kexec/arch/mips/kexec-mips.c 2009-09-27 19:20:25.000000000 +0200 -@@ -97,8 +97,18 @@ +--- a/kexec/arch/mips/kexec-mips.c ++++ b/kexec/arch/mips/kexec-mips.c +@@ -97,8 +97,18 @@ int file_types = sizeof(file_type) / siz void arch_usage(void) { @@ -659,7 +647,7 @@ Index: kexec-tools-2.0.1/kexec/arch/mips/kexec-mips.c int arch_process_options(int argc, char **argv) { static const struct option options[] = { -@@ -113,6 +123,11 @@ +@@ -113,6 +123,11 @@ int arch_process_options(int argc, char switch(opt) { default: break; @@ -671,7 +659,7 @@ Index: kexec-tools-2.0.1/kexec/arch/mips/kexec-mips.c } } /* Reset getopt for the next pass; called in other source modules */ -@@ -126,6 +141,10 @@ +@@ -126,6 +141,10 @@ const struct arch_map_entry arches[] = { * use KEXEC_ARCH_DEFAULT instead of KEXEC_ARCH_MIPS here. */ { "mips", KEXEC_ARCH_DEFAULT }, @@ -682,7 +670,7 @@ Index: kexec-tools-2.0.1/kexec/arch/mips/kexec-mips.c { 0 }, }; -@@ -138,18 +157,9 @@ +@@ -138,18 +157,9 @@ void arch_update_purgatory(struct kexec_ { } @@ -702,10 +690,8 @@ Index: kexec-tools-2.0.1/kexec/arch/mips/kexec-mips.c } /* -Index: kexec-tools-2.0.1/kexec/arch/mips/kexec-mips.h -=================================================================== ---- kexec-tools-2.0.1.orig/kexec/arch/mips/kexec-mips.h 2008-07-15 02:46:43.000000000 +0200 -+++ kexec-tools-2.0.1/kexec/arch/mips/kexec-mips.h 2009-09-27 19:21:32.000000000 +0200 +--- a/kexec/arch/mips/kexec-mips.h ++++ b/kexec/arch/mips/kexec-mips.h @@ -1,17 +1,16 @@ #ifndef KEXEC_MIPS_H #define KEXEC_MIPS_H diff --git a/package/libpcap/patches/102-makefile_disable_manpages.patch b/package/libpcap/patches/102-makefile_disable_manpages.patch index f0a4f3821..ee852141c 100644 --- a/package/libpcap/patches/102-makefile_disable_manpages.patch +++ b/package/libpcap/patches/102-makefile_disable_manpages.patch @@ -1,6 +1,6 @@ --- a/Makefile.in +++ b/Makefile.in -@@ -461,14 +461,6 @@ +@@ -461,14 +461,6 @@ install: libpcap.a pcap-config (mkdir -p $(DESTDIR)$(includedir); chmod 755 $(DESTDIR)$(includedir)) [ -d $(DESTDIR)$(includedir)/pcap ] || \ (mkdir -p $(DESTDIR)$(includedir)/pcap; chmod 755 $(DESTDIR)$(includedir)/pcap) @@ -15,7 +15,7 @@ $(INSTALL_DATA) $(srcdir)/pcap/pcap.h \ $(DESTDIR)$(includedir)/pcap/pcap.h $(INSTALL_DATA) $(srcdir)/pcap/bpf.h \ -@@ -487,36 +479,6 @@ +@@ -487,36 +479,6 @@ install: libpcap.a pcap-config [ -d $(DESTDIR)$(bindir) ] || \ (mkdir -p $(DESTDIR)$(bindir); chmod 755 $(DESTDIR)$(bindir)) $(INSTALL_PROGRAM) pcap-config $(DESTDIR)$(bindir)/pcap-config @@ -52,7 +52,7 @@ install-shared: install-shared-$(DYEXT) install-shared-so: libpcap.so -@@ -536,23 +498,6 @@ +@@ -536,23 +498,6 @@ uninstall: rm -f $(DESTDIR)$(includedir)/pcap.h rm -f $(DESTDIR)$(includedir)/pcap-bpf.h rm -f $(DESTDIR)$(includedir)/pcap-namedb.h diff --git a/package/libreadline/patches/100-fix_avr32_compile b/package/libreadline/patches/100-fix_avr32_compile index dca067636..4d55b8035 100644 --- a/package/libreadline/patches/100-fix_avr32_compile +++ b/package/libreadline/patches/100-fix_avr32_compile @@ -1,6 +1,6 @@ --- a/support/config.sub +++ b/support/config.sub -@@ -228,7 +228,7 @@ +@@ -228,7 +228,7 @@ case $basic_machine in | a29k \ | alpha | alphaev[4-8] | alphaev56 | alphaev6[78] | alphapca5[67] \ | alpha64 | alpha64ev[4-8] | alpha64ev56 | alpha64ev6[78] | alpha64pca5[67] \ @@ -9,7 +9,7 @@ | clipper \ | d10v | d30v | dlx | dsp16xx \ | fr30 | frv \ -@@ -293,7 +293,7 @@ +@@ -293,7 +293,7 @@ case $basic_machine in | alphapca5[67]-* | alpha64pca5[67]-* | arc-* \ | amd64-* \ | arm-* | armbe-* | armle-* | armeb-* | armv*-* \ diff --git a/package/linux-atm/Makefile b/package/linux-atm/Makefile index 8fd081b70..c8a18c3d3 100644 --- a/package/linux-atm/Makefile +++ b/package/linux-atm/Makefile @@ -6,6 +6,7 @@ # include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=linux-atm PKG_VERSION:=2.5.1 @@ -40,37 +41,35 @@ define Package/atm-tools/description This package contains the Linux ATM tools. endef -define Build/Prepare - $(call Build/Prepare/Default) - $(INSTALL_BIN) $(SCRIPT_DIR)/config.sub $(SCRIPT_DIR)/config.guess $(PKG_BUILD_DIR)/ -endef - define Build/Configure $(call Build/Configure/Default) # prevent autoheader invocation touch $(PKG_BUILD_DIR)/stamp-h.in endef +TARGET_CFLAGS += -I$(LINUX_DIR)/include + define Build/Compile + # src/qgen is built with HOSTCC, which does not really like our LDFLAGS + $(MAKE) -C $(PKG_BUILD_DIR)/src/qgen \ + LDFLAGS="" \ + all $(MAKE) -C $(PKG_BUILD_DIR) \ DESTDIR="$(PKG_INSTALL_DIR)" \ all install endef -ifneq ($(CONFIG_PACKAGE_linux-atm),) - define Build/InstallDev - mkdir -p $(1)/usr/include - $(CP) $(PKG_BUILD_DIR)/src/include/atm{,d,sap}.h \ - $(1)/usr/include/ - mkdir -p $(1)/usr/lib - $(CP) $(PKG_BUILD_DIR)/src/lib/.libs/libatm.{a,so*} \ - $(1)/usr/lib/ - endef -endif +define Build/InstallDev + $(INSTALL_DIR) $(1)/usr + $(CP) \ + $(PKG_INSTALL_DIR)/usr/include \ + $(PKG_INSTALL_DIR)/usr/lib \ + $(1)/usr/ +endef define Package/linux-atm/install $(INSTALL_DIR) $(1)/usr/lib - $(CP) $(PKG_BUILD_DIR)/src/lib/.libs/libatm.so.* $(1)/usr/lib/ + $(CP) $(PKG_INSTALL_DIR)/usr/lib/libatm.so* $(1)/usr/lib/ endef define Package/atm-tools/install diff --git a/package/linux-atm/patches/200-no_libfl.patch b/package/linux-atm/patches/200-no_libfl.patch index 7c03a22f4..4a95c9ae2 100644 --- a/package/linux-atm/patches/200-no_libfl.patch +++ b/package/linux-atm/patches/200-no_libfl.patch @@ -1,8 +1,6 @@ -Index: linux-atm-2.5.1/src/qgen/Makefile.am -=================================================================== ---- linux-atm-2.5.1.orig/src/qgen/Makefile.am 2010-02-27 01:36:10.156687492 +0100 -+++ linux-atm-2.5.1/src/qgen/Makefile.am 2010-02-27 01:36:23.388686762 +0100 -@@ -2,7 +2,7 @@ +--- a/src/qgen/Makefile.am ++++ b/src/qgen/Makefile.am +@@ -2,7 +2,7 @@ noinst_PROGRAMS = qgen qgen_SOURCES = common.c common.h file.c file.h first.c ql_y.y ql_l.l qgen.c \ qgen.h second.c third.c @@ -11,11 +9,9 @@ Index: linux-atm-2.5.1/src/qgen/Makefile.am CC = @CC_FOR_BUILD@ CFLAGS = @CFLAGS_FOR_BUILD@ -Index: linux-atm-2.5.1/src/qgen/Makefile.in -=================================================================== ---- linux-atm-2.5.1.orig/src/qgen/Makefile.in 2010-02-27 01:36:10.156687492 +0100 -+++ linux-atm-2.5.1/src/qgen/Makefile.in 2010-02-27 02:06:38.992684137 +0100 -@@ -58,7 +58,7 @@ +--- a/src/qgen/Makefile.in ++++ b/src/qgen/Makefile.in +@@ -58,7 +58,7 @@ depcomp = $(SHELL) $(top_srcdir)/depcomp am__depfiles_maybe = depfiles am__mv = mv -f COMPILE = $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) $(AM_CPPFLAGS) \ @@ -24,7 +20,7 @@ Index: linux-atm-2.5.1/src/qgen/Makefile.in LTCOMPILE = $(LIBTOOL) --tag=CC $(AM_LIBTOOLFLAGS) $(LIBTOOLFLAGS) \ --mode=compile $(CC) $(DEFS) $(DEFAULT_INCLUDES) $(INCLUDES) \ $(AM_CPPFLAGS) $(CPPFLAGS) $(AM_CFLAGS) $(CFLAGS) -@@ -208,7 +208,7 @@ +@@ -208,7 +208,7 @@ top_srcdir = @top_srcdir@ qgen_SOURCES = common.c common.h file.c file.h first.c ql_y.y ql_l.l qgen.c \ qgen.h second.c third.c @@ -33,11 +29,9 @@ Index: linux-atm-2.5.1/src/qgen/Makefile.in #TESTS = $(check_PROGRAMS) EXTRA_DIST = ql_y.h ql_y.c ql_l.c -Index: linux-atm-2.5.1/src/sigd/Makefile.am -=================================================================== ---- linux-atm-2.5.1.orig/src/sigd/Makefile.am 2010-02-27 01:36:10.160686786 +0100 -+++ linux-atm-2.5.1/src/sigd/Makefile.am 2010-02-27 01:36:23.392683892 +0100 -@@ -8,7 +8,7 @@ +--- a/src/sigd/Makefile.am ++++ b/src/sigd/Makefile.am +@@ -8,7 +8,7 @@ atmsigd_XTRAS = mess.o $(top_builddir)/s $(top_builddir)/src/q2931/qd.dump.o \ $(top_builddir)/src/lib/libatm.la \ $(top_builddir)/src/saal/libsaal.a @@ -46,11 +40,9 @@ Index: linux-atm-2.5.1/src/sigd/Makefile.am atmsigd_DEPENDENCIES = mess.c $(atmsigd_XTRAS) CLEANFILES = mess.c -Index: linux-atm-2.5.1/src/sigd/Makefile.in -=================================================================== ---- linux-atm-2.5.1.orig/src/sigd/Makefile.in 2010-02-27 01:36:10.160686786 +0100 -+++ linux-atm-2.5.1/src/sigd/Makefile.in 2010-02-27 01:36:23.396685195 +0100 -@@ -244,7 +244,7 @@ +--- a/src/sigd/Makefile.in ++++ b/src/sigd/Makefile.in +@@ -244,7 +244,7 @@ atmsigd_XTRAS = mess.o $(top_builddir)/s $(top_builddir)/src/lib/libatm.la \ $(top_builddir)/src/saal/libsaal.a @@ -59,10 +51,8 @@ Index: linux-atm-2.5.1/src/sigd/Makefile.in atmsigd_DEPENDENCIES = mess.c $(atmsigd_XTRAS) CLEANFILES = mess.c sysconf_DATA = atmsigd.conf -Index: linux-atm-2.5.1/src/switch/debug/debug.c -=================================================================== ---- linux-atm-2.5.1.orig/src/switch/debug/debug.c 2010-02-27 01:36:10.160686786 +0100 -+++ linux-atm-2.5.1/src/switch/debug/debug.c 2010-02-27 01:36:23.396685195 +0100 +--- a/src/switch/debug/debug.c ++++ b/src/switch/debug/debug.c @@ -20,6 +20,11 @@ #define PRV(call) ((FAB *) (call)->fab) @@ -75,11 +65,9 @@ Index: linux-atm-2.5.1/src/switch/debug/debug.c typedef struct _fab { CALL *next; /* relay.c may not keep track of calls, but WE are */ -Index: linux-atm-2.5.1/src/switch/debug/Makefile.am -=================================================================== ---- linux-atm-2.5.1.orig/src/switch/debug/Makefile.am 2010-02-27 01:36:10.164686879 +0100 -+++ linux-atm-2.5.1/src/switch/debug/Makefile.am 2010-02-27 01:36:23.396685195 +0100 -@@ -5,7 +5,7 @@ +--- a/src/switch/debug/Makefile.am ++++ b/src/switch/debug/Makefile.am +@@ -5,7 +5,7 @@ INCLUDES = -I$(srcdir)/../../q2931 sw_debug_SOURCES = debug.c sw_debug_XTRAS = $(top_builddir)/src/switch/libsw.a \ $(top_builddir)/src/lib/libatm.la @@ -88,11 +76,9 @@ Index: linux-atm-2.5.1/src/switch/debug/Makefile.am sw_debug_DEPENDENCIES = $(sw_debug_XTRAS) -Index: linux-atm-2.5.1/src/switch/debug/Makefile.in -=================================================================== ---- linux-atm-2.5.1.orig/src/switch/debug/Makefile.in 2010-02-27 01:36:10.164686879 +0100 -+++ linux-atm-2.5.1/src/switch/debug/Makefile.in 2010-02-27 01:36:23.396685195 +0100 -@@ -199,7 +199,8 @@ +--- a/src/switch/debug/Makefile.in ++++ b/src/switch/debug/Makefile.in +@@ -199,7 +199,8 @@ sw_debug_SOURCES = debug.c sw_debug_XTRAS = $(top_builddir)/src/switch/libsw.a \ $(top_builddir)/src/lib/libatm.la @@ -102,11 +88,9 @@ Index: linux-atm-2.5.1/src/switch/debug/Makefile.in sw_debug_DEPENDENCIES = $(sw_debug_XTRAS) EXTRA_DIST = demo README all: all-am -Index: linux-atm-2.5.1/src/switch/tcp/Makefile.am -=================================================================== ---- linux-atm-2.5.1.orig/src/switch/tcp/Makefile.am 2010-02-27 01:36:10.201682113 +0100 -+++ linux-atm-2.5.1/src/switch/tcp/Makefile.am 2010-02-27 01:36:23.412882977 +0100 -@@ -5,7 +5,7 @@ +--- a/src/switch/tcp/Makefile.am ++++ b/src/switch/tcp/Makefile.am +@@ -5,7 +5,7 @@ INCLUDES = -I$(srcdir)/../../q2931 sw_tcp_SOURCES = tcpsw.c sw_tcp_XTRAS = $(top_builddir)/src/switch/libsw.a \ $(top_builddir)/src/lib/libatm.la @@ -115,11 +99,9 @@ Index: linux-atm-2.5.1/src/switch/tcp/Makefile.am sw_tcp_DEPENDENCIES = $(sw_tcp_XTRAS) EXTRA_DIST = mkfiles README -Index: linux-atm-2.5.1/src/switch/tcp/Makefile.in -=================================================================== ---- linux-atm-2.5.1.orig/src/switch/tcp/Makefile.in 2010-02-27 01:36:10.209681349 +0100 -+++ linux-atm-2.5.1/src/switch/tcp/Makefile.in 2010-02-27 01:36:23.417680887 +0100 -@@ -199,7 +199,7 @@ +--- a/src/switch/tcp/Makefile.in ++++ b/src/switch/tcp/Makefile.in +@@ -199,7 +199,7 @@ sw_tcp_SOURCES = tcpsw.c sw_tcp_XTRAS = $(top_builddir)/src/switch/libsw.a \ $(top_builddir)/src/lib/libatm.la @@ -128,10 +110,8 @@ Index: linux-atm-2.5.1/src/switch/tcp/Makefile.in sw_tcp_DEPENDENCIES = $(sw_tcp_XTRAS) EXTRA_DIST = mkfiles README all: all-am -Index: linux-atm-2.5.1/src/switch/tcp/tcpsw.c -=================================================================== ---- linux-atm-2.5.1.orig/src/switch/tcp/tcpsw.c 2010-02-27 01:36:10.221684444 +0100 -+++ linux-atm-2.5.1/src/switch/tcp/tcpsw.c 2010-02-27 01:36:23.428680415 +0100 +--- a/src/switch/tcp/tcpsw.c ++++ b/src/switch/tcp/tcpsw.c @@ -35,6 +35,10 @@ #define MAX_PACKET (ATM_MAX_AAL5_PDU+sizeof(struct atmtcp_hdr)) #define BUFFER_SIZE (MAX_PACKET*2) @@ -143,11 +123,9 @@ Index: linux-atm-2.5.1/src/switch/tcp/tcpsw.c typedef struct _table { struct _link *out; /* output port */ -Index: linux-atm-2.5.1/src/test/Makefile.am -=================================================================== ---- linux-atm-2.5.1.orig/src/test/Makefile.am 2010-02-27 01:36:10.221684444 +0100 -+++ linux-atm-2.5.1/src/test/Makefile.am 2010-02-27 01:36:23.428680415 +0100 -@@ -20,7 +20,7 @@ +--- a/src/test/Makefile.am ++++ b/src/test/Makefile.am +@@ -20,7 +20,7 @@ br_SOURCES = br.c bw_SOURCES = bw.c isp_SOURCES = isp.c isp.h ispl_y.y ispl_l.l isp_XTRAS = $(LDADD) @@ -156,11 +134,9 @@ Index: linux-atm-2.5.1/src/test/Makefile.am isp_DEPENDENCIES = $(isp_XTRAS) window_SOURCES = window.c -Index: linux-atm-2.5.1/src/test/Makefile.in -=================================================================== ---- linux-atm-2.5.1.orig/src/test/Makefile.in 2010-02-27 01:36:10.225688778 +0100 -+++ linux-atm-2.5.1/src/test/Makefile.in 2010-02-27 01:36:23.432685583 +0100 -@@ -282,7 +282,7 @@ +--- a/src/test/Makefile.in ++++ b/src/test/Makefile.in +@@ -282,7 +282,7 @@ br_SOURCES = br.c bw_SOURCES = bw.c isp_SOURCES = isp.c isp.h ispl_y.y ispl_l.l isp_XTRAS = $(LDADD) @@ -169,15 +145,12 @@ Index: linux-atm-2.5.1/src/test/Makefile.in isp_DEPENDENCIES = $(isp_XTRAS) window_SOURCES = window.c CLEANFILES = errnos.inc - -Index: linux-atm-2.5.1/src/test/ispl_l.l -=================================================================== ---- linux-atm-2.5.1/src/test/ispl_l.l-orig 2010-03-15 10:52:39.000000000 -0500 -+++ linux-atm-2.5.1/src/test/ispl_l.l 2010-03-15 10:54:45.000000000 -0500 -@@ -17,6 +17,11 @@ - #include "isp.h" +--- a/src/test/ispl_l.l ++++ b/src/test/ispl_l.l +@@ -18,6 +18,11 @@ #include "ispl_y.h" + +int yywrap(void) +{ + return 1; @@ -186,14 +159,12 @@ Index: linux-atm-2.5.1/src/test/ispl_l.l static int lineno = 1; %} -Index: linux-atm-2.5.1/src/qgen/ql_l.l -=================================================================== ---- linux-atm-2.5.1/src/qgen/ql_l.l.orig 2010-03-15 11:07:01.000000000 -0500 -+++ linux-atm-2.5.1/src/qgen/ql_l.l 2010-03-15 11:06:04.000000000 -0500 -@@ -10,6 +10,11 @@ - #include "qgen.h" +--- a/src/qgen/ql_l.l ++++ b/src/qgen/ql_l.l +@@ -11,6 +11,11 @@ #include "ql_y.h" + +int yywrap(void) +{ + return 1; @@ -202,11 +173,8 @@ Index: linux-atm-2.5.1/src/qgen/ql_l.l typedef struct _tree { struct _tree *left,*right; const char str[0]; - -Index: linux-atm-2.5.1/src/sigd/cfg_l.l -=================================================================== ---- linux-atm-2.5.1/src/sigd/cfg_l.l-orig 2010-03-15 11:12:39.000000000 -0500 -+++ linux-atm-2.5.1/src/sigd/cfg_l.l 2010-03-15 11:13:22.000000000 -0500 +--- a/src/sigd/cfg_l.l ++++ b/src/sigd/cfg_l.l @@ -16,6 +16,10 @@ #include "cfg_y.h" diff --git a/package/lua/patches/010-lua-5.1.3-lnum-full-260308.patch b/package/lua/patches/010-lua-5.1.3-lnum-full-260308.patch index f8d8fc7f1..619094540 100644 --- a/package/lua/patches/010-lua-5.1.3-lnum-full-260308.patch +++ b/package/lua/patches/010-lua-5.1.3-lnum-full-260308.patch @@ -1,8 +1,6 @@ -Index: lua-5.1.4/src/Makefile -=================================================================== ---- lua-5.1.4.orig/src/Makefile 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/Makefile 2008-08-24 16:48:20.000000000 +0200 -@@ -25,7 +25,7 @@ +--- a/src/Makefile ++++ b/src/Makefile +@@ -25,7 +25,7 @@ PLATS= aix ansi bsd freebsd generic linu LUA_A= liblua.a CORE_O= lapi.o lcode.o ldebug.o ldo.o ldump.o lfunc.o lgc.o llex.o lmem.o \ lobject.o lopcodes.o lparser.o lstate.o lstring.o ltable.o ltm.o \ @@ -11,7 +9,7 @@ Index: lua-5.1.4/src/Makefile LIB_O= lauxlib.o lbaselib.o ldblib.o liolib.o lmathlib.o loslib.o ltablib.o \ lstrlib.o loadlib.o linit.o -@@ -148,6 +148,7 @@ +@@ -148,6 +148,7 @@ llex.o: llex.c lua.h luaconf.h ldo.h lob lmathlib.o: lmathlib.c lua.h luaconf.h lauxlib.h lualib.h lmem.o: lmem.c lua.h luaconf.h ldebug.h lstate.h lobject.h llimits.h \ ltm.h lzio.h lmem.h ldo.h @@ -19,7 +17,7 @@ Index: lua-5.1.4/src/Makefile loadlib.o: loadlib.c lua.h luaconf.h lauxlib.h lualib.h lobject.o: lobject.c lua.h luaconf.h ldo.h lobject.h llimits.h lstate.h \ ltm.h lzio.h lmem.h lstring.h lgc.h lvm.h -@@ -179,4 +180,18 @@ +@@ -179,4 +180,18 @@ lzio.o: lzio.c lua.h luaconf.h llimits.h print.o: print.c ldebug.h lstate.h lua.h luaconf.h lobject.h llimits.h \ ltm.h lzio.h lmem.h lopcodes.h lundump.h @@ -38,10 +36,8 @@ Index: lua-5.1.4/src/Makefile +print.c: lnum.h + # (end of Makefile) -Index: lua-5.1.4/src/lapi.c -=================================================================== ---- lua-5.1.4.orig/src/lapi.c 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lapi.c 2008-08-24 16:48:20.000000000 +0200 +--- a/src/lapi.c ++++ b/src/lapi.c @@ -28,7 +28,7 @@ #include "ltm.h" #include "lundump.h" @@ -51,7 +47,7 @@ Index: lua-5.1.4/src/lapi.c const char lua_ident[] = -@@ -241,12 +241,13 @@ +@@ -241,12 +241,13 @@ LUA_API void lua_pushvalue (lua_State *L LUA_API int lua_type (lua_State *L, int idx) { StkId o = index2adr(L, idx); @@ -66,7 +62,7 @@ Index: lua-5.1.4/src/lapi.c return (t == LUA_TNONE) ? "no value" : luaT_typenames[t]; } -@@ -264,6 +265,14 @@ +@@ -264,6 +265,14 @@ LUA_API int lua_isnumber (lua_State *L, } @@ -81,7 +77,7 @@ Index: lua-5.1.4/src/lapi.c LUA_API int lua_isstring (lua_State *L, int idx) { int t = lua_type(L, idx); return (t == LUA_TSTRING || t == LUA_TNUMBER); -@@ -309,31 +318,66 @@ +@@ -309,31 +318,66 @@ LUA_API int lua_lessthan (lua_State *L, } @@ -158,7 +154,7 @@ Index: lua-5.1.4/src/lapi.c LUA_API int lua_toboolean (lua_State *L, int idx) { const TValue *o = index2adr(L, idx); return !l_isfalse(o); -@@ -364,6 +408,7 @@ +@@ -364,6 +408,7 @@ LUA_API size_t lua_objlen (lua_State *L, case LUA_TSTRING: return tsvalue(o)->len; case LUA_TUSERDATA: return uvalue(o)->len; case LUA_TTABLE: return luaH_getn(hvalue(o)); @@ -166,7 +162,7 @@ Index: lua-5.1.4/src/lapi.c case LUA_TNUMBER: { size_t l; lua_lock(L); /* `luaV_tostring' may create a new string */ -@@ -426,6 +471,8 @@ +@@ -426,6 +471,8 @@ LUA_API void lua_pushnil (lua_State *L) } @@ -175,7 +171,7 @@ Index: lua-5.1.4/src/lapi.c LUA_API void lua_pushnumber (lua_State *L, lua_Number n) { lua_lock(L); setnvalue(L->top, n); -@@ -434,12 +481,22 @@ +@@ -434,12 +481,22 @@ LUA_API void lua_pushnumber (lua_State * } @@ -200,7 +196,7 @@ Index: lua-5.1.4/src/lapi.c LUA_API void lua_pushlstring (lua_State *L, const char *s, size_t len) { -@@ -569,7 +626,7 @@ +@@ -569,7 +626,7 @@ LUA_API void lua_rawgeti (lua_State *L, lua_lock(L); o = index2adr(L, idx); api_check(L, ttistable(o)); @@ -209,7 +205,7 @@ Index: lua-5.1.4/src/lapi.c api_incr_top(L); lua_unlock(L); } -@@ -597,6 +654,9 @@ +@@ -597,6 +654,9 @@ LUA_API int lua_getmetatable (lua_State case LUA_TUSERDATA: mt = uvalue(obj)->metatable; break; @@ -219,7 +215,7 @@ Index: lua-5.1.4/src/lapi.c default: mt = G(L)->mt[ttype(obj)]; break; -@@ -687,7 +747,7 @@ +@@ -687,7 +747,7 @@ LUA_API void lua_rawseti (lua_State *L, api_checknelems(L, 1); o = index2adr(L, idx); api_check(L, ttistable(o)); @@ -228,7 +224,7 @@ Index: lua-5.1.4/src/lapi.c luaC_barriert(L, hvalue(o), L->top-1); L->top--; lua_unlock(L); -@@ -721,7 +781,7 @@ +@@ -721,7 +781,7 @@ LUA_API int lua_setmetatable (lua_State break; } default: { @@ -237,7 +233,7 @@ Index: lua-5.1.4/src/lapi.c break; } } -@@ -1085,3 +1145,32 @@ +@@ -1085,3 +1145,32 @@ LUA_API const char *lua_setupvalue (lua_ return name; } @@ -270,10 +266,8 @@ Index: lua-5.1.4/src/lapi.c + else lua_pushnumber( L, nvalue_fast(o) ); + return 1; +} -Index: lua-5.1.4/src/lapi.h -=================================================================== ---- lua-5.1.4.orig/src/lapi.h 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lapi.h 2008-08-24 16:48:20.000000000 +0200 +--- a/src/lapi.h ++++ b/src/lapi.h @@ -13,4 +13,6 @@ LUAI_FUNC void luaA_pushobject (lua_State *L, const TValue *o); @@ -281,10 +275,8 @@ Index: lua-5.1.4/src/lapi.h +int lua_pushvalue_as_number (lua_State *L, int idx); + #endif -Index: lua-5.1.4/src/lauxlib.c -=================================================================== ---- lua-5.1.4.orig/src/lauxlib.c 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lauxlib.c 2008-08-24 16:48:20.000000000 +0200 +--- a/src/lauxlib.c ++++ b/src/lauxlib.c @@ -23,7 +23,7 @@ #include "lua.h" @@ -294,7 +286,7 @@ Index: lua-5.1.4/src/lauxlib.c #define FREELIST_REF 0 /* free list of references */ -@@ -66,7 +66,7 @@ +@@ -66,7 +66,7 @@ LUALIB_API int luaL_typerror (lua_State static void tag_error (lua_State *L, int narg, int tag) { @@ -303,7 +295,7 @@ Index: lua-5.1.4/src/lauxlib.c } -@@ -188,8 +188,8 @@ +@@ -188,8 +188,8 @@ LUALIB_API lua_Number luaL_optnumber (lu LUALIB_API lua_Integer luaL_checkinteger (lua_State *L, int narg) { lua_Integer d = lua_tointeger(L, narg); @@ -314,7 +306,7 @@ Index: lua-5.1.4/src/lauxlib.c return d; } -@@ -200,6 +200,16 @@ +@@ -200,6 +200,16 @@ LUALIB_API lua_Integer luaL_optinteger ( } @@ -331,11 +323,9 @@ Index: lua-5.1.4/src/lauxlib.c LUALIB_API int luaL_getmetafield (lua_State *L, int obj, const char *event) { if (!lua_getmetatable(L, obj)) /* no metatable? */ return 0; -Index: lua-5.1.4/src/lauxlib.h -=================================================================== ---- lua-5.1.4.orig/src/lauxlib.h 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lauxlib.h 2008-08-24 16:48:20.000000000 +0200 -@@ -57,6 +57,12 @@ +--- a/src/lauxlib.h ++++ b/src/lauxlib.h +@@ -57,6 +57,12 @@ LUALIB_API lua_Number (luaL_optnumber) ( LUALIB_API lua_Integer (luaL_checkinteger) (lua_State *L, int numArg); LUALIB_API lua_Integer (luaL_optinteger) (lua_State *L, int nArg, lua_Integer def); @@ -348,10 +338,8 @@ Index: lua-5.1.4/src/lauxlib.h LUALIB_API void (luaL_checkstack) (lua_State *L, int sz, const char *msg); LUALIB_API void (luaL_checktype) (lua_State *L, int narg, int t); -Index: lua-5.1.4/src/lbaselib.c -=================================================================== ---- lua-5.1.4.orig/src/lbaselib.c 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lbaselib.c 2008-08-24 16:48:20.000000000 +0200 +--- a/src/lbaselib.c ++++ b/src/lbaselib.c @@ -18,7 +18,9 @@ #include "lauxlib.h" @@ -363,7 +351,7 @@ Index: lua-5.1.4/src/lbaselib.c -@@ -54,20 +56,25 @@ +@@ -54,20 +56,25 @@ static int luaB_tonumber (lua_State *L) int base = luaL_optint(L, 2, 10); if (base == 10) { /* standard conversion */ luaL_checkany(L, 1); @@ -394,7 +382,7 @@ Index: lua-5.1.4/src/lbaselib.c lua_pushnumber(L, (lua_Number)n); return 1; } -@@ -144,7 +151,7 @@ +@@ -144,7 +151,7 @@ static int luaB_setfenv (lua_State *L) { luaL_checktype(L, 2, LUA_TTABLE); getfunc(L, 0); lua_pushvalue(L, 2); @@ -403,7 +391,7 @@ Index: lua-5.1.4/src/lbaselib.c /* change environment of current thread */ lua_pushthread(L); lua_insert(L, -2); -@@ -209,7 +216,7 @@ +@@ -209,7 +216,7 @@ static int luaB_collectgarbage (lua_Stat return 1; } default: { @@ -412,7 +400,7 @@ Index: lua-5.1.4/src/lbaselib.c return 1; } } -@@ -631,6 +638,8 @@ +@@ -631,6 +638,8 @@ static void base_open (lua_State *L) { luaL_register(L, "_G", base_funcs); lua_pushliteral(L, LUA_VERSION); lua_setglobal(L, "_VERSION"); /* set global _VERSION */ @@ -421,10 +409,8 @@ Index: lua-5.1.4/src/lbaselib.c /* `ipairs' and `pairs' need auxliliary functions as upvalues */ auxopen(L, "ipairs", luaB_ipairs, ipairsaux); auxopen(L, "pairs", luaB_pairs, luaB_next); -Index: lua-5.1.4/src/lcode.c -=================================================================== ---- lua-5.1.4.orig/src/lcode.c 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lcode.c 2008-08-24 16:48:20.000000000 +0200 +--- a/src/lcode.c ++++ b/src/lcode.c @@ -22,13 +22,18 @@ #include "lopcodes.h" #include "lparser.h" @@ -446,7 +432,7 @@ Index: lua-5.1.4/src/lcode.c } -@@ -231,12 +236,16 @@ +@@ -231,12 +236,16 @@ static int addk (FuncState *fs, TValue * TValue *idx = luaH_set(L, fs->h, k); Proto *f = fs->f; int oldsize = f->sizek; @@ -467,7 +453,7 @@ Index: lua-5.1.4/src/lcode.c luaM_growvector(L, f->k, fs->nk, f->sizek, TValue, MAXARG_Bx, "constant table overflow"); while (oldsize < f->sizek) setnilvalue(&f->k[oldsize++]); -@@ -261,6 +270,21 @@ +@@ -261,6 +270,21 @@ int luaK_numberK (FuncState *fs, lua_Num } @@ -489,7 +475,7 @@ Index: lua-5.1.4/src/lcode.c static int boolK (FuncState *fs, int b) { TValue o; setbvalue(&o, b); -@@ -359,6 +383,16 @@ +@@ -359,6 +383,16 @@ static void discharge2reg (FuncState *fs luaK_codeABx(fs, OP_LOADK, reg, luaK_numberK(fs, e->u.nval)); break; } @@ -506,7 +492,7 @@ Index: lua-5.1.4/src/lcode.c case VRELOCABLE: { Instruction *pc = &getcode(fs, e); SETARG_A(*pc, reg); -@@ -444,6 +478,10 @@ +@@ -444,6 +478,10 @@ void luaK_exp2val (FuncState *fs, expdes int luaK_exp2RK (FuncState *fs, expdesc *e) { luaK_exp2val(fs, e); switch (e->k) { @@ -517,7 +503,7 @@ Index: lua-5.1.4/src/lcode.c case VKNUM: case VTRUE: case VFALSE: -@@ -451,6 +489,10 @@ +@@ -451,6 +489,10 @@ int luaK_exp2RK (FuncState *fs, expdesc if (fs->nk <= MAXINDEXRK) { /* constant fit in RK operand? */ e->u.s.info = (e->k == VNIL) ? nilK(fs) : (e->k == VKNUM) ? luaK_numberK(fs, e->u.nval) : @@ -528,7 +514,7 @@ Index: lua-5.1.4/src/lcode.c boolK(fs, (e->k == VTRUE)); e->k = VK; return RKASK(e->u.s.info); -@@ -540,7 +582,10 @@ +@@ -540,7 +582,10 @@ void luaK_goiftrue (FuncState *fs, expde int pc; /* pc of last jump */ luaK_dischargevars(fs, e); switch (e->k) { @@ -540,7 +526,7 @@ Index: lua-5.1.4/src/lcode.c pc = NO_JUMP; /* always true; do nothing */ break; } -@@ -598,7 +643,10 @@ +@@ -598,7 +643,10 @@ static void codenot (FuncState *fs, expd e->k = VTRUE; break; } @@ -552,7 +538,7 @@ Index: lua-5.1.4/src/lcode.c e->k = VFALSE; break; } -@@ -634,25 +682,70 @@ +@@ -634,25 +682,70 @@ void luaK_indexed (FuncState *fs, expdes static int constfolding (OpCode op, expdesc *e1, expdesc *e2) { lua_Number v1, v2, r; @@ -628,7 +614,7 @@ Index: lua-5.1.4/src/lcode.c e1->u.nval = r; return 1; } -@@ -696,7 +789,8 @@ +@@ -696,7 +789,8 @@ static void codecomp (FuncState *fs, OpC void luaK_prefix (FuncState *fs, UnOpr op, expdesc *e) { expdesc e2; @@ -638,11 +624,9 @@ Index: lua-5.1.4/src/lcode.c switch (op) { case OPR_MINUS: { if (!isnumeral(e)) -Index: lua-5.1.4/src/lcode.h -=================================================================== ---- lua-5.1.4.orig/src/lcode.h 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lcode.h 2008-08-24 16:48:20.000000000 +0200 -@@ -71,6 +71,6 @@ +--- a/src/lcode.h ++++ b/src/lcode.h +@@ -71,6 +71,6 @@ LUAI_FUNC void luaK_prefix (FuncState *f LUAI_FUNC void luaK_infix (FuncState *fs, BinOpr op, expdesc *v); LUAI_FUNC void luaK_posfix (FuncState *fs, BinOpr op, expdesc *v1, expdesc *v2); LUAI_FUNC void luaK_setlist (FuncState *fs, int base, int nelems, int tostore); @@ -650,11 +634,9 @@ Index: lua-5.1.4/src/lcode.h +LUAI_FUNC int luaK_integerK (FuncState *fs, lua_Integer r); #endif -Index: lua-5.1.4/src/ldebug.c -=================================================================== ---- lua-5.1.4.orig/src/ldebug.c 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/ldebug.c 2008-08-24 16:48:20.000000000 +0200 -@@ -183,7 +183,7 @@ +--- a/src/ldebug.c ++++ b/src/ldebug.c +@@ -183,7 +183,7 @@ static void collectvalidlines (lua_State int *lineinfo = f->l.p->lineinfo; int i; for (i=0; il.p->sizelineinfo; i++) @@ -663,7 +645,7 @@ Index: lua-5.1.4/src/ldebug.c sethvalue(L, L->top, t); } incr_top(L); -@@ -566,7 +566,7 @@ +@@ -566,7 +566,7 @@ static int isinstack (CallInfo *ci, cons void luaG_typeerror (lua_State *L, const TValue *o, const char *op) { const char *name = NULL; @@ -672,7 +654,7 @@ Index: lua-5.1.4/src/ldebug.c const char *kind = (isinstack(L->ci, o)) ? getobjname(L, L->ci, cast_int(o - L->base), &name) : NULL; -@@ -594,8 +594,8 @@ +@@ -594,8 +594,8 @@ void luaG_aritherror (lua_State *L, cons int luaG_ordererror (lua_State *L, const TValue *p1, const TValue *p2) { @@ -683,11 +665,9 @@ Index: lua-5.1.4/src/ldebug.c if (t1[2] == t2[2]) luaG_runerror(L, "attempt to compare two %s values", t1); else -Index: lua-5.1.4/src/ldo.c -=================================================================== ---- lua-5.1.4.orig/src/ldo.c 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/ldo.c 2008-08-24 16:48:20.000000000 +0200 -@@ -219,9 +219,9 @@ +--- a/src/ldo.c ++++ b/src/ldo.c +@@ -219,9 +219,9 @@ static StkId adjust_varargs (lua_State * luaC_checkGC(L); htab = luaH_new(L, nvar, 1); /* create `arg' table */ for (i=0; i #include @@ -750,7 +726,7 @@ Index: lua-5.1.4/src/liolib.c #define IO_INPUT 1 #define IO_OUTPUT 2 -@@ -269,6 +271,13 @@ +@@ -269,6 +271,13 @@ static int io_lines (lua_State *L) { ** ======================================================= */ @@ -764,7 +740,7 @@ Index: lua-5.1.4/src/liolib.c static int read_number (lua_State *L, FILE *f) { lua_Number d; -@@ -279,6 +288,43 @@ +@@ -279,6 +288,43 @@ static int read_number (lua_State *L, FI else return 0; /* read fails */ } @@ -808,7 +784,7 @@ Index: lua-5.1.4/src/liolib.c static int test_eof (lua_State *L, FILE *f) { int c = getc(f); -@@ -352,6 +398,14 @@ +@@ -352,6 +398,14 @@ static int g_read (lua_State *L, FILE *f case 'n': /* number */ success = read_number(L, f); break; @@ -823,7 +799,7 @@ Index: lua-5.1.4/src/liolib.c case 'l': /* line */ success = read_line(L, f); break; -@@ -412,9 +466,10 @@ +@@ -412,9 +466,10 @@ static int g_write (lua_State *L, FILE * int status = 1; for (; nargs--; arg++) { if (lua_type(L, arg) == LUA_TNUMBER) { @@ -837,7 +813,7 @@ Index: lua-5.1.4/src/liolib.c } else { size_t l; -@@ -457,7 +512,7 @@ +@@ -457,7 +512,7 @@ static int f_setvbuf (lua_State *L) { static const char *const modenames[] = {"no", "full", "line", NULL}; FILE *f = tofile(L); int op = luaL_checkoption(L, 2, NULL, modenames); @@ -846,10 +822,8 @@ Index: lua-5.1.4/src/liolib.c int res = setvbuf(f, NULL, mode[op], sz); return pushresult(L, res == 0, NULL); } -Index: lua-5.1.4/src/llex.c -=================================================================== ---- lua-5.1.4.orig/src/llex.c 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/llex.c 2008-08-24 16:48:20.000000000 +0200 +--- a/src/llex.c ++++ b/src/llex.c @@ -22,6 +22,7 @@ #include "lstring.h" #include "ltable.h" @@ -877,7 +851,7 @@ Index: lua-5.1.4/src/llex.c NULL }; -@@ -90,7 +95,11 @@ +@@ -90,7 +95,11 @@ static const char *txtToken (LexState *l switch (token) { case TK_NAME: case TK_STRING: @@ -889,7 +863,7 @@ Index: lua-5.1.4/src/llex.c save(ls, '\0'); return luaZ_buffer(ls->buff); default: -@@ -173,23 +182,27 @@ +@@ -173,23 +182,27 @@ static void buffreplace (LexState *ls, c if (p[n] == from) p[n] = to; } @@ -922,7 +896,7 @@ Index: lua-5.1.4/src/llex.c lua_assert(isdigit(ls->current)); do { save_and_next(ls); -@@ -200,8 +213,9 @@ +@@ -200,8 +213,9 @@ static void read_numeral (LexState *ls, save_and_next(ls); save(ls, '\0'); buffreplace(ls, '.', ls->decpoint); /* follow locale for decimal point */ @@ -934,7 +908,7 @@ Index: lua-5.1.4/src/llex.c } -@@ -329,6 +343,7 @@ +@@ -329,6 +343,7 @@ static void read_string (LexState *ls, i } @@ -942,7 +916,7 @@ Index: lua-5.1.4/src/llex.c static int llex (LexState *ls, SemInfo *seminfo) { luaZ_resetbuffer(ls->buff); for (;;) { -@@ -400,8 +415,7 @@ +@@ -400,8 +415,7 @@ static int llex (LexState *ls, SemInfo * } else if (!isdigit(ls->current)) return '.'; else { @@ -952,7 +926,7 @@ Index: lua-5.1.4/src/llex.c } } case EOZ: { -@@ -414,8 +428,7 @@ +@@ -414,8 +428,7 @@ static int llex (LexState *ls, SemInfo * continue; } else if (isdigit(ls->current)) { @@ -962,11 +936,9 @@ Index: lua-5.1.4/src/llex.c } else if (isalpha(ls->current) || ls->current == '_') { /* identifier or reserved word */ -Index: lua-5.1.4/src/llex.h -=================================================================== ---- lua-5.1.4.orig/src/llex.h 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/llex.h 2008-08-24 16:48:20.000000000 +0200 -@@ -29,19 +29,22 @@ +--- a/src/llex.h ++++ b/src/llex.h +@@ -29,19 +29,22 @@ enum RESERVED { TK_RETURN, TK_THEN, TK_TRUE, TK_UNTIL, TK_WHILE, /* other terminal symbols */ TK_CONCAT, TK_DOTS, TK_EQ, TK_GE, TK_LE, TK_NE, TK_NUMBER, @@ -994,11 +966,9 @@ Index: lua-5.1.4/src/llex.h TString *ts; } SemInfo; /* semantics information */ -Index: lua-5.1.4/src/llimits.h -=================================================================== ---- lua-5.1.4.orig/src/llimits.h 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/llimits.h 2008-08-24 16:48:20.000000000 +0200 -@@ -49,6 +49,7 @@ +--- a/src/llimits.h ++++ b/src/llimits.h +@@ -49,6 +49,7 @@ typedef LUAI_USER_ALIGNMENT_T L_Umaxalig /* result of a `usual argument conversion' over lua_Number */ typedef LUAI_UACNUMBER l_uacNumber; @@ -1006,7 +976,7 @@ Index: lua-5.1.4/src/llimits.h /* internal assertions for in-house debugging */ -@@ -80,7 +81,6 @@ +@@ -80,7 +81,6 @@ typedef LUAI_UACNUMBER l_uacNumber; #define cast_int(i) cast(int, (i)) @@ -1014,10 +984,8 @@ Index: lua-5.1.4/src/llimits.h /* ** type for virtual-machine instructions ** must be an unsigned with (at least) 4 bytes (see details in lopcodes.h) -Index: lua-5.1.4/src/lmathlib.c -=================================================================== ---- lua-5.1.4.orig/src/lmathlib.c 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lmathlib.c 2008-08-24 16:48:20.000000000 +0200 +--- a/src/lmathlib.c ++++ b/src/lmathlib.c @@ -4,7 +4,6 @@ ** See Copyright Notice in lua.h */ @@ -1262,7 +1230,7 @@ Index: lua-5.1.4/src/lmathlib.c return 1; } -@@ -138,19 +234,20 @@ +@@ -138,19 +234,20 @@ static int math_rad (lua_State *L) { static int math_frexp (lua_State *L) { int e; @@ -1285,7 +1253,7 @@ Index: lua-5.1.4/src/lmathlib.c int n = lua_gettop(L); /* number of arguments */ lua_Number dmin = luaL_checknumber(L, 1); int i; -@@ -165,6 +262,7 @@ +@@ -165,6 +262,7 @@ static int math_min (lua_State *L) { static int math_max (lua_State *L) { @@ -1293,7 +1261,7 @@ Index: lua-5.1.4/src/lmathlib.c int n = lua_gettop(L); /* number of arguments */ lua_Number dmax = luaL_checknumber(L, 1); int i; -@@ -182,25 +280,20 @@ +@@ -182,25 +280,20 @@ static int math_random (lua_State *L) { /* the `%' avoids the (rare) case of r==1, and is needed also because on some systems (SunOS!) `rand()' may return a value larger than RAND_MAX */ lua_Number r = (lua_Number)(rand()%RAND_MAX) / (lua_Number)RAND_MAX; @@ -1333,7 +1301,7 @@ Index: lua-5.1.4/src/lmathlib.c } return 1; } -@@ -211,6 +304,66 @@ +@@ -211,6 +304,66 @@ static int math_randomseed (lua_State *L return 0; } @@ -1400,7 +1368,7 @@ Index: lua-5.1.4/src/lmathlib.c static const luaL_Reg mathlib[] = { {"abs", math_abs}, -@@ -241,6 +394,18 @@ +@@ -241,6 +394,18 @@ static const luaL_Reg mathlib[] = { {"sqrt", math_sqrt}, {"tanh", math_tanh}, {"tan", math_tan}, @@ -1419,7 +1387,7 @@ Index: lua-5.1.4/src/lmathlib.c {NULL, NULL} }; -@@ -252,8 +417,10 @@ +@@ -252,8 +417,10 @@ LUALIB_API int luaopen_math (lua_State * luaL_register(L, LUA_MATHLIBNAME, mathlib); lua_pushnumber(L, PI); lua_setfield(L, -2, "pi"); @@ -1431,10 +1399,8 @@ Index: lua-5.1.4/src/lmathlib.c #if defined(LUA_COMPAT_MOD) lua_getfield(L, -1, "fmod"); lua_setfield(L, -2, "mod"); -Index: lua-5.1.4/src/lnum.c -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ lua-5.1.4/src/lnum.c 2008-08-24 16:48:20.000000000 +0200 +--- /dev/null ++++ b/src/lnum.c @@ -0,0 +1,312 @@ +/* +** $Id: lnum.c,v ... $ @@ -1748,10 +1714,8 @@ Index: lua-5.1.4/src/lnum.c + return 0; +} + -Index: lua-5.1.4/src/lnum.h -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ lua-5.1.4/src/lnum.h 2008-08-24 16:48:20.000000000 +0200 +--- /dev/null ++++ b/src/lnum.h @@ -0,0 +1,116 @@ +/* +** $Id: lnum.h,v ... $ @@ -1869,10 +1833,8 @@ Index: lua-5.1.4/src/lnum.h +{ lua_Integer _i; if (tt_integer_valued(o,&_i)) setivalue(o,_i); } + +#endif -Index: lua-5.1.4/src/lnum_config.h -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ lua-5.1.4/src/lnum_config.h 2008-08-24 16:48:20.000000000 +0200 +--- /dev/null ++++ b/src/lnum_config.h @@ -0,0 +1,221 @@ +/* +** $Id: lnum_config.h,v ... $ @@ -2095,10 +2057,8 @@ Index: lua-5.1.4/src/lnum_config.h + +#endif + -Index: lua-5.1.4/src/lobject.c -=================================================================== ---- lua-5.1.4.orig/src/lobject.c 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lobject.c 2008-08-24 16:48:20.000000000 +0200 +--- a/src/lobject.c ++++ b/src/lobject.c @@ -21,7 +21,8 @@ #include "lstate.h" #include "lstring.h" @@ -2109,7 +2069,7 @@ Index: lua-5.1.4/src/lobject.c const TValue luaO_nilobject_ = {{NULL}, LUA_TNIL}; -@@ -70,12 +71,31 @@ +@@ -70,12 +71,31 @@ int luaO_log2 (unsigned int x) { int luaO_rawequalObj (const TValue *t1, const TValue *t2) { @@ -2143,7 +2103,7 @@ Index: lua-5.1.4/src/lobject.c case LUA_TBOOLEAN: return bvalue(t1) == bvalue(t2); /* boolean true must be 1 !! */ case LUA_TLIGHTUSERDATA: -@@ -86,21 +106,6 @@ +@@ -86,21 +106,6 @@ int luaO_rawequalObj (const TValue *t1, } } @@ -2165,7 +2125,7 @@ Index: lua-5.1.4/src/lobject.c static void pushstr (lua_State *L, const char *str) { setsvalue2s(L, L->top, luaS_new(L, str)); incr_top(L); -@@ -131,7 +136,11 @@ +@@ -131,7 +136,11 @@ const char *luaO_pushvfstring (lua_State break; } case 'd': { @@ -2178,15 +2138,13 @@ Index: lua-5.1.4/src/lobject.c incr_top(L); break; } -@@ -212,3 +221,4 @@ +@@ -212,3 +221,4 @@ void luaO_chunkid (char *out, const char } } } + -Index: lua-5.1.4/src/lobject.h -=================================================================== ---- lua-5.1.4.orig/src/lobject.h 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lobject.h 2008-08-24 16:48:20.000000000 +0200 +--- a/src/lobject.h ++++ b/src/lobject.h @@ -17,7 +17,11 @@ @@ -2200,7 +2158,7 @@ Index: lua-5.1.4/src/lobject.h #define NUM_TAGS (LAST_TAG+1) -@@ -59,7 +63,12 @@ +@@ -59,7 +63,12 @@ typedef struct GCheader { typedef union { GCObject *gc; void *p; @@ -2213,7 +2171,7 @@ Index: lua-5.1.4/src/lobject.h int b; } Value; -@@ -77,7 +86,11 @@ +@@ -77,7 +86,11 @@ typedef struct lua_TValue { /* Macros to test type */ #define ttisnil(o) (ttype(o) == LUA_TNIL) @@ -2226,7 +2184,7 @@ Index: lua-5.1.4/src/lobject.h #define ttisstring(o) (ttype(o) == LUA_TSTRING) #define ttistable(o) (ttype(o) == LUA_TTABLE) #define ttisfunction(o) (ttype(o) == LUA_TFUNCTION) -@@ -90,7 +103,25 @@ +@@ -90,7 +103,25 @@ typedef struct lua_TValue { #define ttype(o) ((o)->tt) #define gcvalue(o) check_exp(iscollectable(o), (o)->value.gc) #define pvalue(o) check_exp(ttislightuserdata(o), (o)->value.p) @@ -2253,7 +2211,7 @@ Index: lua-5.1.4/src/lobject.h #define rawtsvalue(o) check_exp(ttisstring(o), &(o)->value.gc->ts) #define tsvalue(o) (&rawtsvalue(o)->tsv) #define rawuvalue(o) check_exp(ttisuserdata(o), &(o)->value.gc->u) -@@ -116,8 +147,27 @@ +@@ -116,8 +147,27 @@ typedef struct lua_TValue { /* Macros to set values */ #define setnilvalue(obj) ((obj)->tt=LUA_TNIL) @@ -2283,7 +2241,7 @@ Index: lua-5.1.4/src/lobject.h #define setpvalue(obj,x) \ { TValue *i_o=(obj); i_o->value.p=(x); i_o->tt=LUA_TLIGHTUSERDATA; } -@@ -155,9 +205,6 @@ +@@ -155,9 +205,6 @@ typedef struct lua_TValue { i_o->value.gc=cast(GCObject *, (x)); i_o->tt=LUA_TPROTO; \ checkliveness(G(L),i_o); } @@ -2293,7 +2251,7 @@ Index: lua-5.1.4/src/lobject.h #define setobj(L,obj1,obj2) \ { const TValue *o2=(obj2); TValue *o1=(obj1); \ o1->value = o2->value; o1->tt=o2->tt; \ -@@ -185,8 +232,11 @@ +@@ -185,8 +232,11 @@ typedef struct lua_TValue { #define setttype(obj, tt) (ttype(obj) = (tt)) @@ -2307,7 +2265,7 @@ Index: lua-5.1.4/src/lobject.h -@@ -370,12 +420,10 @@ +@@ -370,12 +420,10 @@ LUAI_FUNC int luaO_log2 (unsigned int x) LUAI_FUNC int luaO_int2fb (unsigned int x); LUAI_FUNC int luaO_fb2int (int x); LUAI_FUNC int luaO_rawequalObj (const TValue *t1, const TValue *t2); @@ -2320,11 +2278,9 @@ Index: lua-5.1.4/src/lobject.h - #endif -Index: lua-5.1.4/src/loslib.c -=================================================================== ---- lua-5.1.4.orig/src/loslib.c 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/loslib.c 2008-08-24 16:48:20.000000000 +0200 -@@ -186,15 +186,30 @@ +--- a/src/loslib.c ++++ b/src/loslib.c +@@ -186,15 +186,30 @@ static int os_time (lua_State *L) { } if (t == (time_t)(-1)) lua_pushnil(L); @@ -2357,10 +2313,8 @@ Index: lua-5.1.4/src/loslib.c return 1; } -Index: lua-5.1.4/src/lparser.c -=================================================================== ---- lua-5.1.4.orig/src/lparser.c 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lparser.c 2008-08-24 16:48:20.000000000 +0200 +--- a/src/lparser.c ++++ b/src/lparser.c @@ -33,7 +33,6 @@ #define luaY_checklimit(fs,v,l,m) if ((v)>(l)) errorlimit(fs,l,m) @@ -2369,7 +2323,7 @@ Index: lua-5.1.4/src/lparser.c /* ** nodes for block list (list of active blocks) */ -@@ -72,7 +71,7 @@ +@@ -72,7 +71,7 @@ static void errorlimit (FuncState *fs, i const char *msg = (fs->f->linedefined == 0) ? luaO_pushfstring(fs->L, "main function has more than %d %s", limit, what) : luaO_pushfstring(fs->L, "function at line %d has more than %d %s", @@ -2378,7 +2332,7 @@ Index: lua-5.1.4/src/lparser.c luaX_lexerror(fs->ls, msg, 0); } -@@ -733,6 +732,18 @@ +@@ -733,6 +732,18 @@ static void simpleexp (LexState *ls, exp v->u.nval = ls->t.seminfo.r; break; } @@ -2397,7 +2351,7 @@ Index: lua-5.1.4/src/lparser.c case TK_STRING: { codestring(ls, v, ls->t.seminfo.ts); break; -@@ -1079,7 +1090,7 @@ +@@ -1079,7 +1090,7 @@ static void fornum (LexState *ls, TStrin if (testnext(ls, ',')) exp1(ls); /* optional step */ else { /* default step = 1 */ @@ -2406,11 +2360,9 @@ Index: lua-5.1.4/src/lparser.c luaK_reserveregs(fs, 1); } forbody(ls, base, line, 1, 1); -Index: lua-5.1.4/src/lparser.h -=================================================================== ---- lua-5.1.4.orig/src/lparser.h 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lparser.h 2008-08-24 16:48:20.000000000 +0200 -@@ -31,7 +31,11 @@ +--- a/src/lparser.h ++++ b/src/lparser.h +@@ -31,7 +31,11 @@ typedef enum { VRELOCABLE, /* info = instruction pc */ VNONRELOC, /* info = result register */ VCALL, /* info = instruction pc */ @@ -2423,7 +2375,7 @@ Index: lua-5.1.4/src/lparser.h } expkind; typedef struct expdesc { -@@ -39,6 +43,7 @@ +@@ -39,6 +43,7 @@ typedef struct expdesc { union { struct { int info, aux; } s; lua_Number nval; @@ -2431,11 +2383,9 @@ Index: lua-5.1.4/src/lparser.h } u; int t; /* patch list of `exit when true' */ int f; /* patch list of `exit when false' */ -Index: lua-5.1.4/src/lstrlib.c -=================================================================== ---- lua-5.1.4.orig/src/lstrlib.c 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lstrlib.c 2008-08-24 16:48:20.000000000 +0200 -@@ -43,8 +43,8 @@ +--- a/src/lstrlib.c ++++ b/src/lstrlib.c +@@ -43,8 +43,8 @@ static ptrdiff_t posrelat (ptrdiff_t pos static int str_sub (lua_State *L) { size_t l; const char *s = luaL_checklstring(L, 1, &l); @@ -2446,7 +2396,7 @@ Index: lua-5.1.4/src/lstrlib.c if (start < 1) start = 1; if (end > (ptrdiff_t)l) end = (ptrdiff_t)l; if (start <= end) -@@ -106,8 +106,8 @@ +@@ -106,8 +106,8 @@ static int str_rep (lua_State *L) { static int str_byte (lua_State *L) { size_t l; const char *s = luaL_checklstring(L, 1, &l); @@ -2457,7 +2407,7 @@ Index: lua-5.1.4/src/lstrlib.c int n, i; if (posi <= 0) posi = 1; if ((size_t)pose > l) pose = l; -@@ -496,7 +496,7 @@ +@@ -496,7 +496,7 @@ static int str_find_aux (lua_State *L, i size_t l1, l2; const char *s = luaL_checklstring(L, 1, &l1); const char *p = luaL_checklstring(L, 2, &l2); @@ -2466,7 +2416,7 @@ Index: lua-5.1.4/src/lstrlib.c if (init < 0) init = 0; else if ((size_t)(init) > l1) init = (ptrdiff_t)l1; if (find && (lua_toboolean(L, 4) || /* explicit request? */ -@@ -690,7 +690,7 @@ +@@ -690,7 +690,7 @@ static int str_gsub (lua_State *L) { ** maximum size of each format specification (such as '%-099.99d') ** (+10 accounts for %99.99x plus margin of error) */ @@ -2475,7 +2425,7 @@ Index: lua-5.1.4/src/lstrlib.c static void addquoted (lua_State *L, luaL_Buffer *b, int arg) { -@@ -747,9 +747,9 @@ +@@ -747,9 +747,9 @@ static const char *scanformat (lua_State static void addintlen (char *form) { size_t l = strlen(form); char spec = form[l - 1]; @@ -2488,7 +2438,7 @@ Index: lua-5.1.4/src/lstrlib.c } -@@ -777,12 +777,12 @@ +@@ -777,12 +777,12 @@ static int str_format (lua_State *L) { } case 'd': case 'i': { addintlen(form); @@ -2503,10 +2453,8 @@ Index: lua-5.1.4/src/lstrlib.c break; } case 'e': case 'E': case 'f': -Index: lua-5.1.4/src/ltable.c -=================================================================== ---- lua-5.1.4.orig/src/ltable.c 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/ltable.c 2008-08-24 16:48:20.000000000 +0200 +--- a/src/ltable.c ++++ b/src/ltable.c @@ -33,6 +33,7 @@ #include "lobject.h" #include "lstate.h" @@ -2542,7 +2490,7 @@ Index: lua-5.1.4/src/ltable.c #define dummynode (&dummynode_) static const Node dummynode_ = { -@@ -80,27 +71,46 @@ +@@ -80,27 +71,46 @@ static const Node dummynode_ = { /* ** hash for lua_Numbers @@ -2598,7 +2546,7 @@ Index: lua-5.1.4/src/ltable.c case LUA_TSTRING: return hashstr(t, rawtsvalue(key)); case LUA_TBOOLEAN: -@@ -116,16 +126,20 @@ +@@ -116,16 +126,20 @@ static Node *mainposition (const Table * /* ** returns the index for `key' if `key' is an appropriate key to live in ** the array part of the table, -1 otherwise. @@ -2627,7 +2575,7 @@ Index: lua-5.1.4/src/ltable.c } -@@ -137,8 +151,8 @@ +@@ -137,8 +151,8 @@ static int arrayindex (const TValue *key static int findindex (lua_State *L, Table *t, StkId key) { int i; if (ttisnil(key)) return -1; /* first iteration */ @@ -2638,7 +2586,7 @@ Index: lua-5.1.4/src/ltable.c return i-1; /* yes; that's the index (corrected to C) */ else { Node *n = mainposition(t, key); -@@ -163,7 +177,7 @@ +@@ -163,7 +177,7 @@ int luaH_next (lua_State *L, Table *t, S int i = findindex(L, t, key); /* find original element */ for (i++; i < t->sizearray; i++) { /* try first array part */ if (!ttisnil(&t->array[i])) { /* a non-nil value? */ @@ -2647,7 +2595,7 @@ Index: lua-5.1.4/src/ltable.c setobj2s(L, key+1, &t->array[i]); return 1; } -@@ -209,8 +223,8 @@ +@@ -209,8 +223,8 @@ static int computesizes (int nums[], int static int countint (const TValue *key, int *nums) { @@ -2658,7 +2606,7 @@ Index: lua-5.1.4/src/ltable.c nums[ceillog2(k)]++; /* count as such */ return 1; } -@@ -308,7 +322,7 @@ +@@ -308,7 +322,7 @@ static void resize (lua_State *L, Table /* re-insert elements from vanishing slice */ for (i=nasize; iarray[i])) @@ -2667,7 +2615,7 @@ Index: lua-5.1.4/src/ltable.c } /* shrink array */ luaM_reallocvector(L, t->array, oldasize, nasize, TValue); -@@ -409,7 +423,9 @@ +@@ -409,7 +423,9 @@ static TValue *newkey (lua_State *L, Tab othern = mainposition(t, key2tval(mp)); if (othern != mp) { /* is colliding node out of its main position? */ /* yes; move colliding node into free position */ @@ -2678,7 +2626,7 @@ Index: lua-5.1.4/src/ltable.c gnext(othern) = n; /* redo the chain with `n' in place of `mp' */ *n = *mp; /* copy colliding node into free pos. (mp->next also goes) */ gnext(mp) = NULL; /* now `mp' is free */ -@@ -432,17 +448,18 @@ +@@ -432,17 +448,18 @@ static TValue *newkey (lua_State *L, Tab /* ** search function for integers */ @@ -2702,7 +2650,7 @@ Index: lua-5.1.4/src/ltable.c } while (n); return luaO_nilobject; } -@@ -470,14 +487,12 @@ +@@ -470,14 +487,12 @@ const TValue *luaH_get (Table *t, const switch (ttype(key)) { case LUA_TNIL: return luaO_nilobject; case LUA_TSTRING: return luaH_getstr(t, rawtsvalue(key)); @@ -2722,7 +2670,7 @@ Index: lua-5.1.4/src/ltable.c default: { Node *n = mainposition(t, key); do { /* check whether `key' is somewhere in the chain */ -@@ -498,20 +513,25 @@ +@@ -498,20 +513,25 @@ TValue *luaH_set (lua_State *L, Table *t return cast(TValue *, p); else { if (ttisnil(key)) luaG_runerror(L, "table index is nil"); @@ -2753,7 +2701,7 @@ Index: lua-5.1.4/src/ltable.c return newkey(L, t, &k); } } -@@ -533,20 +553,21 @@ +@@ -533,20 +553,21 @@ static int unbound_search (Table *t, uns unsigned int i = j; /* i is zero or a present index */ j++; /* find `i' and `j' such that i is present and j is not */ @@ -2780,10 +2728,8 @@ Index: lua-5.1.4/src/ltable.c else i = m; } return i; -Index: lua-5.1.4/src/ltable.h -=================================================================== ---- lua-5.1.4.orig/src/ltable.h 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/ltable.h 2008-08-24 16:48:20.000000000 +0200 +--- a/src/ltable.h ++++ b/src/ltable.h @@ -18,8 +18,8 @@ #define key2tval(n) (&(n)->i_key.tvk) @@ -2795,10 +2741,8 @@ Index: lua-5.1.4/src/ltable.h LUAI_FUNC const TValue *luaH_getstr (Table *t, TString *key); LUAI_FUNC TValue *luaH_setstr (lua_State *L, Table *t, TString *key); LUAI_FUNC const TValue *luaH_get (Table *t, const TValue *key); -Index: lua-5.1.4/src/ltm.c -=================================================================== ---- lua-5.1.4.orig/src/ltm.c 2008-08-24 16:46:38.000000000 +0200 -+++ lua-5.1.4/src/ltm.c 2008-08-24 16:48:20.000000000 +0200 +--- a/src/ltm.c ++++ b/src/ltm.c @@ -19,7 +19,6 @@ #include "ltm.h" @@ -2807,7 +2751,7 @@ Index: lua-5.1.4/src/ltm.c const char *const luaT_typenames[] = { "nil", "boolean", "userdata", "number", "string", "table", "function", "userdata", "thread", -@@ -67,6 +66,9 @@ +@@ -67,6 +66,9 @@ const TValue *luaT_gettmbyobj (lua_State case LUA_TUSERDATA: mt = uvalue(o)->metatable; break; @@ -2817,10 +2761,8 @@ Index: lua-5.1.4/src/ltm.c default: mt = G(L)->mt[ttype(o)]; } -Index: lua-5.1.4/src/lua.c -=================================================================== ---- lua-5.1.4.orig/src/lua.c 2008-08-24 16:46:38.000000000 +0200 -+++ lua-5.1.4/src/lua.c 2008-08-24 16:48:20.000000000 +0200 +--- a/src/lua.c ++++ b/src/lua.c @@ -16,7 +16,7 @@ #include "lauxlib.h" @@ -2830,7 +2772,7 @@ Index: lua-5.1.4/src/lua.c static lua_State *globalL = NULL; -@@ -382,6 +382,15 @@ +@@ -382,6 +382,15 @@ int main (int argc, char **argv) { l_message(argv[0], "cannot create state: not enough memory"); return EXIT_FAILURE; } @@ -2846,10 +2788,8 @@ Index: lua-5.1.4/src/lua.c s.argc = argc; s.argv = argv; status = lua_cpcall(L, &pmain, &s); -Index: lua-5.1.4/src/lua.h -=================================================================== ---- lua-5.1.4.orig/src/lua.h 2008-08-24 16:46:38.000000000 +0200 -+++ lua-5.1.4/src/lua.h 2008-08-24 16:48:20.000000000 +0200 +--- a/src/lua.h ++++ b/src/lua.h @@ -19,7 +19,7 @@ #define LUA_VERSION "Lua 5.1" #define LUA_RELEASE "Lua 5.1.4" @@ -2859,7 +2799,7 @@ Index: lua-5.1.4/src/lua.h #define LUA_AUTHORS "R. Ierusalimschy, L. H. de Figueiredo & W. Celes" -@@ -71,6 +71,16 @@ +@@ -71,6 +71,16 @@ typedef void * (*lua_Alloc) (void *ud, v */ #define LUA_TNONE (-1) @@ -2876,7 +2816,7 @@ Index: lua-5.1.4/src/lua.h #define LUA_TNIL 0 #define LUA_TBOOLEAN 1 #define LUA_TLIGHTUSERDATA 2 -@@ -139,6 +149,8 @@ +@@ -139,6 +149,8 @@ LUA_API int (lua_isuserdata) LUA_API int (lua_type) (lua_State *L, int idx); LUA_API const char *(lua_typename) (lua_State *L, int tp); @@ -2885,7 +2825,7 @@ Index: lua-5.1.4/src/lua.h LUA_API int (lua_equal) (lua_State *L, int idx1, int idx2); LUA_API int (lua_rawequal) (lua_State *L, int idx1, int idx2); LUA_API int (lua_lessthan) (lua_State *L, int idx1, int idx2); -@@ -244,6 +256,19 @@ +@@ -244,6 +256,19 @@ LUA_API lua_Alloc (lua_getallocf) (lua_S LUA_API void lua_setallocf (lua_State *L, lua_Alloc f, void *ud); @@ -2905,7 +2845,7 @@ Index: lua-5.1.4/src/lua.h /* ** =============================================================== -@@ -268,7 +293,12 @@ +@@ -268,7 +293,12 @@ LUA_API void lua_setallocf (lua_State *L #define lua_isboolean(L,n) (lua_type(L, (n)) == LUA_TBOOLEAN) #define lua_isthread(L,n) (lua_type(L, (n)) == LUA_TTHREAD) #define lua_isnone(L,n) (lua_type(L, (n)) == LUA_TNONE) @@ -2919,15 +2859,13 @@ Index: lua-5.1.4/src/lua.h #define lua_pushliteral(L, s) \ lua_pushlstring(L, "" s, (sizeof(s)/sizeof(char))-1) -@@ -386,3 +416,4 @@ +@@ -386,3 +416,4 @@ struct lua_Debug { #endif + -Index: lua-5.1.4/src/luaconf.h -=================================================================== ---- lua-5.1.4.orig/src/luaconf.h 2008-08-24 16:46:38.000000000 +0200 -+++ lua-5.1.4/src/luaconf.h 2008-08-24 16:48:20.000000000 +0200 +--- a/src/luaconf.h ++++ b/src/luaconf.h @@ -10,7 +10,9 @@ #include @@ -3123,7 +3061,7 @@ Index: lua-5.1.4/src/luaconf.h /* @@ LUAI_USER_ALIGNMENT_T is a type that requires maximum alignment. ** CHANGE it if your system requires alignments larger than double. (For -@@ -728,28 +652,6 @@ +@@ -728,28 +652,6 @@ union luai_Cast { double l_d; long l_l; #define luai_userstateyield(L,n) ((void)L) @@ -3152,11 +3090,9 @@ Index: lua-5.1.4/src/luaconf.h /* =================================================================== */ /* -Index: lua-5.1.4/src/lundump.c -=================================================================== ---- lua-5.1.4.orig/src/lundump.c 2008-08-24 16:46:38.000000000 +0200 -+++ lua-5.1.4/src/lundump.c 2008-08-24 16:48:20.000000000 +0200 -@@ -73,6 +73,13 @@ +--- a/src/lundump.c ++++ b/src/lundump.c +@@ -73,6 +73,13 @@ static lua_Number LoadNumber(LoadState* return x; } @@ -3170,7 +3106,7 @@ Index: lua-5.1.4/src/lundump.c static TString* LoadString(LoadState* S) { size_t size; -@@ -119,6 +126,9 @@ +@@ -119,6 +126,9 @@ static void LoadConstants(LoadState* S, case LUA_TNUMBER: setnvalue(o,LoadNumber(S)); break; @@ -3180,7 +3116,7 @@ Index: lua-5.1.4/src/lundump.c case LUA_TSTRING: setsvalue2n(S->L,o,LoadString(S)); break; -@@ -223,5 +233,22 @@ +@@ -223,5 +233,22 @@ void luaU_header (char* h) *h++=(char)sizeof(size_t); *h++=(char)sizeof(Instruction); *h++=(char)sizeof(lua_Number); @@ -3204,10 +3140,8 @@ Index: lua-5.1.4/src/lundump.c +#endif + ); } -Index: lua-5.1.4/src/lvm.c -=================================================================== ---- lua-5.1.4.orig/src/lvm.c 2008-08-24 16:46:38.000000000 +0200 -+++ lua-5.1.4/src/lvm.c 2008-08-24 16:48:20.000000000 +0200 +--- a/src/lvm.c ++++ b/src/lvm.c @@ -25,22 +25,35 @@ #include "ltable.h" #include "ltm.h" @@ -3254,7 +3188,7 @@ Index: lua-5.1.4/src/lvm.c } -@@ -49,8 +62,7 @@ +@@ -49,8 +62,7 @@ int luaV_tostring (lua_State *L, StkId o return 0; else { char s[LUAI_MAXNUMBER2STR]; @@ -3264,7 +3198,7 @@ Index: lua-5.1.4/src/lvm.c setsvalue2s(L, obj, luaS_new(L, s)); return 1; } -@@ -218,59 +230,127 @@ +@@ -218,59 +230,127 @@ static int l_strcmp (const TString *ls, } @@ -3417,7 +3351,7 @@ Index: lua-5.1.4/src/lvm.c return !l_isfalse(L->top); } -@@ -310,30 +390,6 @@ +@@ -310,30 +390,6 @@ void luaV_concat (lua_State *L, int tota } @@ -3448,7 +3382,7 @@ Index: lua-5.1.4/src/lvm.c /* ** some macros for common tasks in `luaV_execute' */ -@@ -357,17 +413,154 @@ +@@ -357,17 +413,154 @@ static void Arith (lua_State *L, StkId r #define Protect(x) { L->savedpc = pc; {x;}; base = L->base; } @@ -3612,7 +3546,7 @@ Index: lua-5.1.4/src/lvm.c void luaV_execute (lua_State *L, int nexeccalls) { -@@ -468,38 +661,45 @@ +@@ -468,38 +661,45 @@ void luaV_execute (lua_State *L, int nex continue; } case OP_ADD: { @@ -3671,7 +3605,7 @@ Index: lua-5.1.4/src/lvm.c continue; } case OP_NOT: { -@@ -511,11 +711,11 @@ +@@ -511,11 +711,11 @@ void luaV_execute (lua_State *L, int nex const TValue *rb = RB(i); switch (ttype(rb)) { case LUA_TTABLE: { @@ -3685,7 +3619,7 @@ Index: lua-5.1.4/src/lvm.c break; } default: { /* try metamethod */ -@@ -648,14 +848,30 @@ +@@ -648,14 +848,30 @@ void luaV_execute (lua_State *L, int nex } } case OP_FORLOOP: { @@ -3724,7 +3658,7 @@ Index: lua-5.1.4/src/lvm.c } continue; } -@@ -664,13 +880,21 @@ +@@ -664,13 +880,21 @@ void luaV_execute (lua_State *L, int nex const TValue *plimit = ra+1; const TValue *pstep = ra+2; L->savedpc = pc; /* next steps may throw errors */ @@ -3747,7 +3681,7 @@ Index: lua-5.1.4/src/lvm.c dojump(L, pc, GETARG_sBx(i)); continue; } -@@ -707,7 +931,7 @@ +@@ -707,7 +931,7 @@ void luaV_execute (lua_State *L, int nex luaH_resizearray(L, h, last); /* pre-alloc it at once */ for (; n > 0; n--) { TValue *val = ra+n; @@ -3756,10 +3690,8 @@ Index: lua-5.1.4/src/lvm.c luaC_barriert(L, h, val); } continue; -Index: lua-5.1.4/src/lvm.h -=================================================================== ---- lua-5.1.4.orig/src/lvm.h 2008-08-24 16:46:38.000000000 +0200 -+++ lua-5.1.4/src/lvm.h 2008-08-24 16:48:20.000000000 +0200 +--- a/src/lvm.h ++++ b/src/lvm.h @@ -15,11 +15,9 @@ #define tostring(L,o) ((ttype(o) == LUA_TSTRING) || (luaV_tostring(L, o))) @@ -3774,10 +3706,8 @@ Index: lua-5.1.4/src/lvm.h LUAI_FUNC int luaV_lessthan (lua_State *L, const TValue *l, const TValue *r); -Index: lua-5.1.4/src/print.c -=================================================================== ---- lua-5.1.4.orig/src/print.c 2008-08-24 16:46:38.000000000 +0200 -+++ lua-5.1.4/src/print.c 2008-08-24 16:48:20.000000000 +0200 +--- a/src/print.c ++++ b/src/print.c @@ -14,6 +14,7 @@ #include "lobject.h" #include "lopcodes.h" @@ -3786,7 +3716,7 @@ Index: lua-5.1.4/src/print.c #define PrintFunction luaU_print -@@ -59,8 +60,16 @@ +@@ -59,8 +60,16 @@ static void PrintConstant(const Proto* f case LUA_TBOOLEAN: printf(bvalue(o) ? "true" : "false"); break; diff --git a/package/lua/patches/015-lnum-ppc-compat.patch b/package/lua/patches/015-lnum-ppc-compat.patch index d6c48a775..2ea59f176 100644 --- a/package/lua/patches/015-lnum-ppc-compat.patch +++ b/package/lua/patches/015-lnum-ppc-compat.patch @@ -1,8 +1,6 @@ -Index: lua-5.1.3/src/lua.h -=================================================================== ---- lua-5.1.3.orig/src/lua.h 2008-06-29 11:45:55.000000000 +0200 -+++ lua-5.1.3/src/lua.h 2008-06-29 11:46:28.000000000 +0200 -@@ -79,7 +79,7 @@ +--- a/src/lua.h ++++ b/src/lua.h +@@ -79,7 +79,7 @@ typedef void * (*lua_Alloc) (void *ud, v * not acceptable for 5.1, maybe 5.2 onwards? * 9: greater than existing (5.1) type values. */ diff --git a/package/lua/patches/020-shared_liblua.patch b/package/lua/patches/020-shared_liblua.patch index cb7940f7e..18078ccc1 100644 --- a/package/lua/patches/020-shared_liblua.patch +++ b/package/lua/patches/020-shared_liblua.patch @@ -1,8 +1,6 @@ -Index: lua-5.1.4/Makefile -=================================================================== ---- lua-5.1.4.orig/Makefile 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/Makefile 2008-08-24 16:48:42.000000000 +0200 -@@ -42,8 +42,8 @@ +--- a/Makefile ++++ b/Makefile +@@ -42,8 +42,8 @@ PLATS= aix ansi bsd freebsd generic linu # What to install. TO_BIN= lua luac @@ -13,7 +11,7 @@ Index: lua-5.1.4/Makefile TO_MAN= lua.1 luac.1 # Lua version and release. -@@ -63,6 +63,7 @@ +@@ -63,6 +63,7 @@ install: dummy cd src && $(INSTALL_EXEC) $(TO_BIN) $(INSTALL_BIN) cd src && $(INSTALL_DATA) $(TO_INC) $(INSTALL_INC) cd src && $(INSTALL_DATA) $(TO_LIB) $(INSTALL_LIB) @@ -21,11 +19,9 @@ Index: lua-5.1.4/Makefile cd doc && $(INSTALL_DATA) $(TO_MAN) $(INSTALL_MAN) ranlib: -Index: lua-5.1.4/src/ldo.h -=================================================================== ---- lua-5.1.4.orig/src/ldo.h 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/ldo.h 2008-08-24 16:48:42.000000000 +0200 -@@ -46,7 +46,7 @@ +--- a/src/ldo.h ++++ b/src/ldo.h +@@ -46,7 +46,7 @@ LUAI_FUNC int luaD_pcall (lua_State *L, LUAI_FUNC int luaD_poscall (lua_State *L, StkId firstResult); LUAI_FUNC void luaD_reallocCI (lua_State *L, int newsize); LUAI_FUNC void luaD_reallocstack (lua_State *L, int newsize); @@ -34,10 +30,8 @@ Index: lua-5.1.4/src/ldo.h LUAI_FUNC void luaD_throw (lua_State *L, int errcode); LUAI_FUNC int luaD_rawrunprotected (lua_State *L, Pfunc f, void *ud); -Index: lua-5.1.4/src/lfunc.h -=================================================================== ---- lua-5.1.4.orig/src/lfunc.h 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lfunc.h 2008-08-24 16:48:42.000000000 +0200 +--- a/src/lfunc.h ++++ b/src/lfunc.h @@ -18,7 +18,7 @@ cast(int, sizeof(TValue *)*((n)-1))) @@ -47,10 +41,8 @@ Index: lua-5.1.4/src/lfunc.h LUAI_FUNC Closure *luaF_newCclosure (lua_State *L, int nelems, Table *e); LUAI_FUNC Closure *luaF_newLclosure (lua_State *L, int nelems, Table *e); LUAI_FUNC UpVal *luaF_newupval (lua_State *L); -Index: lua-5.1.4/src/lmem.h -=================================================================== ---- lua-5.1.4.orig/src/lmem.h 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lmem.h 2008-08-24 16:48:42.000000000 +0200 +--- a/src/lmem.h ++++ b/src/lmem.h @@ -38,9 +38,9 @@ ((v)=cast(t *, luaM_reallocv(L, v, oldn, n, sizeof(t)))) @@ -63,10 +55,8 @@ Index: lua-5.1.4/src/lmem.h LUAI_FUNC void *luaM_growaux_ (lua_State *L, void *block, int *size, size_t size_elem, int limit, const char *errormsg); -Index: lua-5.1.4/src/lstring.h -=================================================================== ---- lua-5.1.4.orig/src/lstring.h 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lstring.h 2008-08-24 16:48:42.000000000 +0200 +--- a/src/lstring.h ++++ b/src/lstring.h @@ -25,7 +25,7 @@ LUAI_FUNC void luaS_resize (lua_State *L, int newsize); @@ -76,11 +66,9 @@ Index: lua-5.1.4/src/lstring.h #endif -Index: lua-5.1.4/src/lundump.h -=================================================================== ---- lua-5.1.4.orig/src/lundump.h 2008-08-24 16:46:37.000000000 +0200 -+++ lua-5.1.4/src/lundump.h 2008-08-24 16:48:42.000000000 +0200 -@@ -17,7 +17,7 @@ +--- a/src/lundump.h ++++ b/src/lundump.h +@@ -17,7 +17,7 @@ LUAI_FUNC Proto* luaU_undump (lua_State* LUAI_FUNC void luaU_header (char* h); /* dump one chunk; from ldump.c */ @@ -89,11 +77,9 @@ Index: lua-5.1.4/src/lundump.h #ifdef luac_c /* print one chunk; from print.c */ -Index: lua-5.1.4/src/Makefile -=================================================================== ---- lua-5.1.4.orig/src/Makefile 2008-08-24 16:48:20.000000000 +0200 -+++ lua-5.1.4/src/Makefile 2008-08-24 16:48:42.000000000 +0200 -@@ -23,6 +23,7 @@ +--- a/src/Makefile ++++ b/src/Makefile +@@ -23,6 +23,7 @@ MYLIBS= PLATS= aix ansi bsd freebsd generic linux macosx mingw posix solaris LUA_A= liblua.a @@ -101,7 +87,7 @@ Index: lua-5.1.4/src/Makefile CORE_O= lapi.o lcode.o ldebug.o ldo.o ldump.o lfunc.o lgc.o llex.o lmem.o \ lobject.o lopcodes.o lparser.o lstate.o lstring.o ltable.o ltm.o \ lundump.o lvm.o lzio.o lnum.o -@@ -33,11 +34,12 @@ +@@ -33,11 +34,12 @@ LUA_T= lua LUA_O= lua.o LUAC_T= luac @@ -116,7 +102,7 @@ Index: lua-5.1.4/src/Makefile default: $(PLAT) -@@ -47,14 +49,23 @@ +@@ -47,14 +49,23 @@ o: $(ALL_O) a: $(ALL_A) @@ -143,7 +129,7 @@ Index: lua-5.1.4/src/Makefile $(CC) -o $@ $(MYLDFLAGS) $(LUAC_O) $(LUA_A) $(LIBS) clean: -@@ -96,7 +107,7 @@ +@@ -96,7 +107,7 @@ generic: $(MAKE) all MYCFLAGS= linux: diff --git a/package/lua/patches/030-archindependent-bytecode.patch b/package/lua/patches/030-archindependent-bytecode.patch index b27592fbd..8dfef85d0 100644 --- a/package/lua/patches/030-archindependent-bytecode.patch +++ b/package/lua/patches/030-archindependent-bytecode.patch @@ -1,8 +1,6 @@ -Index: lua-5.1.4/src/ldump.c -=================================================================== ---- lua-5.1.4.orig/src/ldump.c 2008-08-24 16:48:20.000000000 +0200 -+++ lua-5.1.4/src/ldump.c 2008-08-24 16:48:52.000000000 +0200 -@@ -67,12 +67,12 @@ +--- a/src/ldump.c ++++ b/src/ldump.c +@@ -67,12 +67,12 @@ static void DumpString(const TString* s, { if (s==NULL || getstr(s)==NULL) { @@ -17,11 +15,9 @@ Index: lua-5.1.4/src/ldump.c DumpVar(size,D); DumpBlock(getstr(s),size,D); } -Index: lua-5.1.4/src/lundump.c -=================================================================== ---- lua-5.1.4.orig/src/lundump.c 2008-08-24 16:48:20.000000000 +0200 -+++ lua-5.1.4/src/lundump.c 2008-08-24 16:48:52.000000000 +0200 -@@ -25,6 +25,7 @@ +--- a/src/lundump.c ++++ b/src/lundump.c +@@ -25,6 +25,7 @@ typedef struct { ZIO* Z; Mbuffer* b; const char* name; @@ -29,7 +25,7 @@ Index: lua-5.1.4/src/lundump.c } LoadState; #ifdef LUAC_TRUST_BINARIES -@@ -40,7 +41,6 @@ +@@ -40,7 +41,6 @@ static void error(LoadState* S, const ch } #endif @@ -37,7 +33,7 @@ Index: lua-5.1.4/src/lundump.c #define LoadByte(S) (lu_byte)LoadChar(S) #define LoadVar(S,x) LoadMem(S,&x,1,sizeof(x)) #define LoadVector(S,b,n,size) LoadMem(S,b,n,size) -@@ -51,6 +51,49 @@ +@@ -51,6 +51,49 @@ static void LoadBlock(LoadState* S, void IF (r!=0, "unexpected end"); } @@ -87,7 +83,7 @@ Index: lua-5.1.4/src/lundump.c static int LoadChar(LoadState* S) { char x; -@@ -82,7 +125,7 @@ +@@ -82,7 +125,7 @@ static lua_Integer LoadInteger(LoadState static TString* LoadString(LoadState* S) { @@ -96,7 +92,7 @@ Index: lua-5.1.4/src/lundump.c LoadVar(S,size); if (size==0) return NULL; -@@ -196,6 +239,7 @@ +@@ -196,6 +239,7 @@ static void LoadHeader(LoadState* S) char s[LUAC_HEADERSIZE]; luaU_header(h); LoadBlock(S,s,LUAC_HEADERSIZE); @@ -104,7 +100,7 @@ Index: lua-5.1.4/src/lundump.c IF (memcmp(h,s,LUAC_HEADERSIZE)!=0, "bad header"); } -@@ -230,7 +274,7 @@ +@@ -230,7 +274,7 @@ void luaU_header (char* h) *h++=(char)LUAC_FORMAT; *h++=(char)*(char*)&x; /* endianness */ *h++=(char)sizeof(int); diff --git a/package/lua/patches/100-no_readline.patch b/package/lua/patches/100-no_readline.patch index 7368187d8..0350e470a 100644 --- a/package/lua/patches/100-no_readline.patch +++ b/package/lua/patches/100-no_readline.patch @@ -1,6 +1,5 @@ -diff -ur lua-luci-5.1.3/src/luaconf.h lua-luci-5.1.3-new/src/luaconf.h ---- lua-luci-5.1.3/src/luaconf.h 2008-04-14 13:19:54.000000000 +0200 -+++ lua-luci-5.1.3-new/src/luaconf.h 2008-04-14 13:19:17.000000000 +0200 +--- a/src/luaconf.h ++++ b/src/luaconf.h @@ -38,7 +38,6 @@ #if defined(LUA_USE_LINUX) #define LUA_USE_POSIX @@ -9,11 +8,9 @@ diff -ur lua-luci-5.1.3/src/luaconf.h lua-luci-5.1.3-new/src/luaconf.h #endif #if defined(LUA_USE_MACOSX) -Nur in lua-luci-5.1.3-new/src: luaconf.h.orig. -diff -ur lua-luci-5.1.3/src/Makefile lua-luci-5.1.3-new/src/Makefile ---- lua-luci-5.1.3/src/Makefile 2008-04-14 13:19:57.000000000 +0200 -+++ lua-luci-5.1.3-new/src/Makefile 2008-04-14 13:19:17.000000000 +0200 -@@ -17,6 +17,7 @@ +--- a/src/Makefile ++++ b/src/Makefile +@@ -17,6 +17,7 @@ LIBS= -lm $(MYLIBS) MYCFLAGS= MYLDFLAGS= MYLIBS= @@ -21,7 +18,7 @@ diff -ur lua-luci-5.1.3/src/Makefile lua-luci-5.1.3-new/src/Makefile # == END OF USER SETTINGS. NO NEED TO CHANGE ANYTHING BELOW THIS LINE ========= -@@ -86,7 +87,7 @@ +@@ -86,7 +87,7 @@ echo: @echo "MYLIBS = $(MYLIBS)" # convenience targets for popular platforms @@ -30,7 +27,7 @@ diff -ur lua-luci-5.1.3/src/Makefile lua-luci-5.1.3-new/src/Makefile none: @echo "Please choose a platform:" @echo " $(PLATS)" -@@ -101,16 +102,16 @@ +@@ -101,16 +102,16 @@ bsd: $(MAKE) all MYCFLAGS="-DLUA_USE_POSIX -DLUA_USE_DLOPEN" MYLIBS="-Wl,-E" freebsd: @@ -50,4 +47,3 @@ diff -ur lua-luci-5.1.3/src/Makefile lua-luci-5.1.3-new/src/Makefile # use this on Mac OS X 10.3- # $(MAKE) all MYCFLAGS=-DLUA_USE_MACOSX -Nur in lua-luci-5.1.3-new/src: Makefile.orig. diff --git a/package/lua/patches/200-lua-path.patch b/package/lua/patches/200-lua-path.patch index 62dd00e39..054457744 100644 --- a/package/lua/patches/200-lua-path.patch +++ b/package/lua/patches/200-lua-path.patch @@ -1,5 +1,5 @@ ---- b/src/luaconf.h 2008-05-06 20:10:46.000000000 +0200 -+++ a/src/luaconf.h 2008-05-06 20:10:27.000000000 +0200 +--- a/src/luaconf.h ++++ b/src/luaconf.h @@ -95,9 +95,9 @@ ".\\?.dll;" LUA_CDIR"?.dll;" LUA_CDIR"loadall.dll" diff --git a/package/lua/patches/400-luaposix_5.1.4-embedded.patch b/package/lua/patches/400-luaposix_5.1.4-embedded.patch index 73d8eb03b..22c546c8f 100644 --- a/package/lua/patches/400-luaposix_5.1.4-embedded.patch +++ b/package/lua/patches/400-luaposix_5.1.4-embedded.patch @@ -1,8 +1,6 @@ -Index: lua-5.1.4/src/Makefile -=================================================================== ---- lua-5.1.4.orig/src/Makefile 2008-09-25 12:19:44.000000000 +0200 -+++ lua-5.1.4/src/Makefile 2008-09-25 12:20:03.000000000 +0200 -@@ -12,7 +12,7 @@ +--- a/src/Makefile ++++ b/src/Makefile +@@ -12,7 +12,7 @@ CFLAGS= -O2 -Wall $(MYCFLAGS) AR= ar rcu RANLIB= ranlib RM= rm -f @@ -11,7 +9,7 @@ Index: lua-5.1.4/src/Makefile MYCFLAGS= MYLDFLAGS= -@@ -29,7 +29,7 @@ +@@ -29,7 +29,7 @@ CORE_O= lapi.o lcode.o ldebug.o ldo.o ld lobject.o lopcodes.o lparser.o lstate.o lstring.o ltable.o ltm.o \ lundump.o lvm.o lzio.o lnum.o LIB_O= lauxlib.o lbaselib.o ldblib.o liolib.o lmathlib.o loslib.o ltablib.o \ @@ -20,11 +18,9 @@ Index: lua-5.1.4/src/Makefile LUA_T= lua LUA_O= lua.o -Index: lua-5.1.4/src/linit.c -=================================================================== ---- lua-5.1.4.orig/src/linit.c 2008-09-25 12:19:02.000000000 +0200 -+++ lua-5.1.4/src/linit.c 2008-09-25 12:19:32.000000000 +0200 -@@ -23,6 +23,7 @@ +--- a/src/linit.c ++++ b/src/linit.c +@@ -23,6 +23,7 @@ static const luaL_Reg lualibs[] = { {LUA_STRLIBNAME, luaopen_string}, {LUA_MATHLIBNAME, luaopen_math}, {LUA_DBLIBNAME, luaopen_debug}, @@ -32,10 +28,8 @@ Index: lua-5.1.4/src/linit.c {NULL, NULL} }; -Index: lua-5.1.4/src/lposix.c -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ lua-5.1.4/src/lposix.c 2008-09-25 12:16:29.000000000 +0200 +--- /dev/null ++++ b/src/lposix.c @@ -0,0 +1,1139 @@ +/* +* lposix.c @@ -1176,11 +1170,9 @@ Index: lua-5.1.4/src/lposix.c +} + +/*EOF*/ -Index: lua-5.1.4/src/lualib.h -=================================================================== ---- lua-5.1.4.orig/src/lualib.h 2008-09-25 12:18:14.000000000 +0200 -+++ lua-5.1.4/src/lualib.h 2008-09-25 12:18:53.000000000 +0200 -@@ -39,6 +39,9 @@ +--- a/src/lualib.h ++++ b/src/lualib.h +@@ -39,6 +39,9 @@ LUALIB_API int (luaopen_debug) (lua_Stat #define LUA_LOADLIBNAME "package" LUALIB_API int (luaopen_package) (lua_State *L); @@ -1190,10 +1182,8 @@ Index: lua-5.1.4/src/lualib.h /* open all previous libraries */ LUALIB_API void (luaL_openlibs) (lua_State *L); -Index: lua-5.1.4/src/modemuncher.c -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ lua-5.1.4/src/modemuncher.c 2008-09-25 12:16:29.000000000 +0200 +--- /dev/null ++++ b/src/modemuncher.c @@ -0,0 +1,261 @@ +/* + Mode Muncher -- modemuncher.c diff --git a/package/lua/patches/600-refcounting.patch b/package/lua/patches/600-refcounting.patch index 2b4f7890b..554a7c42e 100644 --- a/package/lua/patches/600-refcounting.patch +++ b/package/lua/patches/600-refcounting.patch @@ -205,7 +205,7 @@ lua_unlock(L); return res; } -@@ -1040,20 +1046,21 @@ LUA_API int lua_next (lua_State *L, int +@@ -1040,8 +1046,9 @@ LUA_API int lua_next (lua_State *L, int if (more) { api_incr_top(L); } @@ -217,11 +217,7 @@ lua_unlock(L); return more; } - - - LUA_API void lua_concat (lua_State *L, int n) { - lua_lock(L); - api_checknelems(L, n); +@@ -1053,7 +1060,7 @@ LUA_API void lua_concat (lua_State *L, i if (n >= 2) { luaC_checkGC(L); luaV_concat(L, n, cast_int(L->top - L->base) - 1); @@ -230,7 +226,7 @@ } else if (n == 0) { /* push empty string */ setsvalue2s(L, L->top, luaS_newlstr(L, "", 0)); -@@ -1139,6 +1147,7 @@ LUA_API const char *lua_setupvalue (lua_ +@@ -1139,6 +1146,7 @@ LUA_API const char *lua_setupvalue (lua_ if (name) { L->top--; setobj(L, val, L->top); @@ -238,7 +234,7 @@ luaC_barrier(L, clvalue(fi), L->top); } lua_unlock(L); -@@ -1160,7 +1169,7 @@ LUA_API const char *lua_setupvalue (lua_ +@@ -1160,7 +1168,7 @@ LUA_API const char *lua_setupvalue (lua_ int lua_pushvalue_as_number (lua_State *L, int idx) { const TValue *o = index2adr(L, idx); @@ -518,7 +514,7 @@ } } return p; -@@ -543,7 +551,7 @@ static void atomic (lua_State *L) { +@@ -543,7 +546,7 @@ static void atomic (lua_State *L) { udsize = luaC_separateudata(L, 0); /* separate userdata to be finalized */ marktmu(g); /* mark `preserved' userdata */ udsize += propagateall(g); /* remark, to propagate `preserveness' */ @@ -527,7 +523,7 @@ /* flip current white */ g->currentwhite = cast_byte(otherwhite(g)); g->sweepstrgc = 0; -@@ -685,8 +693,11 @@ void luaC_barrierback (lua_State *L, Tab +@@ -685,8 +688,11 @@ void luaC_barrierback (lua_State *L, Tab void luaC_link (lua_State *L, GCObject *o, lu_byte tt) { global_State *g = G(L); @@ -977,7 +973,7 @@ lua_Number d; lua_Integer i; -@@ -384,6 +386,7 @@ void luaV_concat (lua_State *L, int tota +@@ -384,6 +385,7 @@ void luaV_concat (lua_State *L, int tota size_t l = tsvalue(top-i)->len; memcpy(buffer+tl, svalue(top-i), l); tl += l; @@ -985,7 +981,7 @@ } setsvalue2s(L, top-n, luaS_newlstr(L, buffer, tl)); } -@@ -420,7 +423,7 @@ void luaV_concat (lua_State *L, int tota +@@ -420,7 +422,7 @@ void luaV_concat (lua_State *L, int tota */ static void Arith (lua_State *L, StkId ra, const TValue *rb, const TValue *rc, TMS op) { @@ -994,7 +990,7 @@ const TValue *b, *c; lua_Number nb,nc; -@@ -663,7 +666,7 @@ void luaV_execute (lua_State *L, int nex +@@ -663,7 +665,7 @@ void luaV_execute (lua_State *L, int nex OPCODE_TARGET(LOADNIL) { TValue *rb = RB(i); do { @@ -1003,7 +999,7 @@ } while (rb >= ra); continue; } -@@ -673,7 +676,7 @@ void luaV_execute (lua_State *L, int nex +@@ -673,7 +675,7 @@ void luaV_execute (lua_State *L, int nex continue; } OPCODE_TARGET(GETGLOBAL) { @@ -1012,7 +1008,7 @@ TValue *rb = KBx(i); sethvalue(L, &g, cl->env); lua_assert(ttisstring(rb)); -@@ -685,7 +688,7 @@ void luaV_execute (lua_State *L, int nex +@@ -685,7 +687,7 @@ void luaV_execute (lua_State *L, int nex continue; } OPCODE_TARGET(SETGLOBAL) { @@ -1021,7 +1017,7 @@ sethvalue(L, &g, cl->env); lua_assert(ttisstring(KBx(i))); Protect(luaV_settable(L, &g, KBx(i), ra)); -@@ -895,7 +900,7 @@ void luaV_execute (lua_State *L, int nex +@@ -895,7 +897,7 @@ void luaV_execute (lua_State *L, int nex if (--nexeccalls == 0) /* was previous function running `here'? */ return; /* no: return */ else { /* yes: continue its execution */ @@ -1030,7 +1026,7 @@ lua_assert(isLua(L->ci)); lua_assert(GET_OPCODE(*((L->ci)->savedpc - 1)) == OP_CALL); goto reentry; -@@ -986,6 +991,7 @@ void luaV_execute (lua_State *L, int nex +@@ -986,6 +988,7 @@ void luaV_execute (lua_State *L, int nex for (; n > 0; n--) { TValue *val = ra+n; setobj2t(L, luaH_setint(L, h, last--), val); @@ -1038,7 +1034,7 @@ luaC_barriert(L, h, val); } continue; -@@ -1030,7 +1036,7 @@ void luaV_execute (lua_State *L, int nex +@@ -1030,7 +1033,7 @@ void luaV_execute (lua_State *L, int nex setobjs2s(L, ra + j, ci->base - n + j); } else { diff --git a/package/mac80211/Makefile b/package/mac80211/Makefile index bd569acfe..549e83896 100644 --- a/package/mac80211/Makefile +++ b/package/mac80211/Makefile @@ -10,12 +10,12 @@ include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=mac80211 -PKG_VERSION:=2010-03-03 +PKG_VERSION:=2010-03-24 PKG_RELEASE:=3 PKG_SOURCE_URL:=http://mirror2.openwrt.org/sources # http://www.orbit-lab.org/kernel/compat-wireless-2.6/2010/11 \ # http://wireless.kernel.org/download/compat-wireless-2.6 -PKG_MD5SUM:=af8da65ca4c25b1b69e3d2896d2bbb2f +PKG_MD5SUM:=73357c52b5d6888ea3228b2ca8aa5eca PKG_SOURCE:=compat-wireless-$(PKG_VERSION).tar.bz2 PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/compat-wireless-$(PKG_VERSION) @@ -676,9 +676,11 @@ MAKE_OPTS:= \ CONFIG_AT76C50X_USB= \ CONFIG_WL12XX= \ CONFIG_EEPROM_93CX6= \ + CONFIG_HERMES= \ CONFIG_AR9170_USB=$(if $(CONFIG_PACKAGE_kmod-ar9170),m) \ CONFIG_AR9170_LEDS=$(CONFIG_LEDS_TRIGGERS) \ CONFIG_IWM= \ + CONFIG_ATH9K_HTC= \ MADWIFI= \ OLD_IWL= \ KLIB_BUILD="$(LINUX_DIR)" \ diff --git a/package/mac80211/patches/001-disable_b44.patch b/package/mac80211/patches/001-disable_b44.patch index 0682e746c..ce10e71bb 100644 --- a/package/mac80211/patches/001-disable_b44.patch +++ b/package/mac80211/patches/001-disable_b44.patch @@ -1,6 +1,6 @@ --- a/config.mk +++ b/config.mk -@@ -271,8 +271,8 @@ endif +@@ -269,8 +269,8 @@ endif CONFIG_P54_PCI=m diff --git a/package/mac80211/patches/002-disable_rfkill.patch b/package/mac80211/patches/002-disable_rfkill.patch index 17fd787dd..2599dbb84 100644 --- a/package/mac80211/patches/002-disable_rfkill.patch +++ b/package/mac80211/patches/002-disable_rfkill.patch @@ -9,7 +9,7 @@ ifeq ($(CONFIG_MAC80211),y) $(error "ERROR: you have MAC80211 compiled into the kernel, CONFIG_MAC80211=y, as such you cannot replace its mac80211 driver. You need this set to CONFIG_MAC80211=m. If you are using Fedora upgrade your kernel as later version should this set as modular. For further information on Fedora see https://bugzilla.redhat.com/show_bug.cgi?id=470143. If you are using your own kernel recompile it and make mac80211 modular") -@@ -461,8 +461,8 @@ endif +@@ -492,8 +492,8 @@ endif # We need the backported rfkill module on kernel < 2.6.31. # In more recent kernel versions use the in kernel rfkill module. ifdef CONFIG_COMPAT_KERNEL_31 diff --git a/package/mac80211/patches/007-remove_misc_drivers.patch b/package/mac80211/patches/007-remove_misc_drivers.patch index c648b8651..a51a4b36e 100644 --- a/package/mac80211/patches/007-remove_misc_drivers.patch +++ b/package/mac80211/patches/007-remove_misc_drivers.patch @@ -1,6 +1,6 @@ --- a/config.mk +++ b/config.mk -@@ -296,10 +296,10 @@ endif +@@ -299,10 +299,10 @@ endif CONFIG_MWL8K=m # Ethernet drivers go here @@ -13,9 +13,9 @@ +# CONFIG_ATL1E=m +# CONFIG_ATL1C=m - endif - ## end of PCI -@@ -338,10 +338,10 @@ CONFIG_USB_NET_COMPAT_RNDIS_HOST=n + CONFIG_HERMES=m + CONFIG_HERMES_CACHE_FW_ON_INIT=y +@@ -355,10 +355,10 @@ CONFIG_USB_NET_COMPAT_RNDIS_HOST=n CONFIG_USB_NET_COMPAT_RNDIS_WLAN=n CONFIG_USB_NET_COMPAT_CDCETHER=n else diff --git a/package/mac80211/patches/010-no_pcmcia.patch b/package/mac80211/patches/010-no_pcmcia.patch index 1334dbb14..a9437ce8e 100644 --- a/package/mac80211/patches/010-no_pcmcia.patch +++ b/package/mac80211/patches/010-no_pcmcia.patch @@ -9,7 +9,7 @@ CONFIG_SSB=m else include $(KLIB_BUILD)/.config -@@ -197,7 +197,7 @@ CONFIG_B43=m +@@ -194,7 +194,7 @@ CONFIG_B43=m CONFIG_B43_HWRNG=y CONFIG_B43_PCI_AUTOSELECT=y ifneq ($(CONFIG_PCMCIA),) @@ -18,7 +18,7 @@ endif CONFIG_B43_LEDS=y CONFIG_B43_PHY_LP=y -@@ -248,7 +248,7 @@ CONFIG_SSB_BLOCKIO=y +@@ -246,7 +246,7 @@ CONFIG_SSB_BLOCKIO=y CONFIG_SSB_PCIHOST=y CONFIG_SSB_B43_PCI_BRIDGE=y ifneq ($(CONFIG_PCMCIA),) diff --git a/package/mac80211/patches/011-no_sdio.patch b/package/mac80211/patches/011-no_sdio.patch index aa651edd2..bd6bdfe78 100644 --- a/package/mac80211/patches/011-no_sdio.patch +++ b/package/mac80211/patches/011-no_sdio.patch @@ -1,6 +1,6 @@ --- a/config.mk +++ b/config.mk -@@ -382,8 +382,8 @@ endif # end of SPI driver list +@@ -407,8 +407,8 @@ endif # end of SPI driver list ifneq ($(CONFIG_MMC),) @@ -10,4 +10,4 @@ +# CONFIG_B43_SDIO=y CONFIG_WL1251_SDIO=m - ifdef CONFIG_COMPAT_KERNEL_27 + ifneq ($(CONFIG_ARM),) diff --git a/package/mac80211/patches/013-disable_b43_nphy.patch b/package/mac80211/patches/013-disable_b43_nphy.patch new file mode 100644 index 000000000..747c52ab0 --- /dev/null +++ b/package/mac80211/patches/013-disable_b43_nphy.patch @@ -0,0 +1,11 @@ +--- a/config.mk ++++ b/config.mk +@@ -198,7 +198,7 @@ ifneq ($(CONFIG_PCMCIA),) + endif + CONFIG_B43_LEDS=y + CONFIG_B43_PHY_LP=y +-CONFIG_B43_NPHY=y ++# CONFIG_B43_NPHY is not set + # CONFIG_B43_FORCE_PIO=y + # CONFIG_B43_DEBUG=y + diff --git a/package/mac80211/patches/014-add_iw_handler.patch b/package/mac80211/patches/014-add_iw_handler.patch new file mode 100644 index 000000000..5119b35fb --- /dev/null +++ b/package/mac80211/patches/014-add_iw_handler.patch @@ -0,0 +1,33 @@ +commit b7d48ccc687c44213121b1b565dccdc4488f5d9a +Author: Pavel Roskin +Date: Wed Mar 24 17:23:37 2010 -0400 + + compat: add compat-2.6.35.h and IW_HANDLER + + Signed-off-by: Pavel Roskin + +--- /dev/null ++++ b/include/linux/compat-2.6.35.h +@@ -0,0 +1,13 @@ ++#ifndef LINUX_26_35_COMPAT_H ++#define LINUX_26_35_COMPAT_H ++ ++#include ++ ++#if (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)) ++ ++#define IW_HANDLER(id, func) \ ++ [IW_IOCTL_IDX(id)] = func ++ ++#endif /* (LINUX_VERSION_CODE < KERNEL_VERSION(2,6,35)) */ ++ ++#endif /* LINUX_26_35_COMPAT_H */ +--- a/include/linux/compat-2.6.h ++++ b/include/linux/compat-2.6.h +@@ -27,5 +27,6 @@ + #include + #include + #include ++#include + + #endif /* LINUX_26_COMPAT_H */ diff --git a/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch b/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch index 4f3446976..81c049615 100644 --- a/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch +++ b/package/mac80211/patches/201-ath5k-WAR-for-AR71xx-PCI-bug.patch @@ -1,6 +1,6 @@ --- a/drivers/net/wireless/ath/ath5k/reset.c +++ b/drivers/net/wireless/ath/ath5k/reset.c -@@ -1360,10 +1360,18 @@ int ath5k_hw_reset(struct ath5k_hw *ah, +@@ -1377,10 +1377,18 @@ int ath5k_hw_reset(struct ath5k_hw *ah, * guess we can tweak it and see how it goes ;-) */ if (ah->ah_version != AR5K_AR5210) { diff --git a/package/mac80211/patches/408-ath9k_tweak_rx_intr_mitigation.patch b/package/mac80211/patches/408-ath9k_tweak_rx_intr_mitigation.patch index 48401bcd1..9d8ce1a33 100644 --- a/package/mac80211/patches/408-ath9k_tweak_rx_intr_mitigation.patch +++ b/package/mac80211/patches/408-ath9k_tweak_rx_intr_mitigation.patch @@ -1,6 +1,6 @@ --- a/drivers/net/wireless/ath/ath9k/hw.c +++ b/drivers/net/wireless/ath/ath9k/hw.c -@@ -2111,7 +2111,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st +@@ -2097,7 +2097,7 @@ int ath9k_hw_reset(struct ath_hw *ah, st if (ah->config.rx_intr_mitigation) { REG_RMW_FIELD(ah, AR_RIMT, AR_RIMT_LAST, 500); diff --git a/package/mac80211/patches/520-cfg80211_get_freq.patch b/package/mac80211/patches/520-cfg80211_get_freq.patch index 928cf4042..f7e478f29 100644 --- a/package/mac80211/patches/520-cfg80211_get_freq.patch +++ b/package/mac80211/patches/520-cfg80211_get_freq.patch @@ -20,7 +20,7 @@ } --- a/net/wireless/nl80211.c +++ b/net/wireless/nl80211.c -@@ -885,6 +885,11 @@ static int nl80211_send_iface(struct sk_ +@@ -886,6 +886,11 @@ static int nl80211_send_iface(struct sk_ NLA_PUT_U32(msg, NL80211_ATTR_WIPHY, rdev->wiphy_idx); NLA_PUT_STRING(msg, NL80211_ATTR_IFNAME, dev->name); NLA_PUT_U32(msg, NL80211_ATTR_IFTYPE, dev->ieee80211_ptr->iftype); diff --git a/package/mac80211/patches/530-ath9k_fix_ampdu_rate_handling.patch b/package/mac80211/patches/530-ath9k_fix_ampdu_rate_handling.patch deleted file mode 100644 index 4e1d59972..000000000 --- a/package/mac80211/patches/530-ath9k_fix_ampdu_rate_handling.patch +++ /dev/null @@ -1,42 +0,0 @@ ---- a/drivers/net/wireless/ath/ath9k/xmit.c -+++ b/drivers/net/wireless/ath/ath9k/xmit.c -@@ -1947,10 +1947,10 @@ static void ath_tx_rc_status(struct ath_ - tx_rateindex = ds->ds_txstat.ts_rateindex; - WARN_ON(tx_rateindex >= hw->max_rates); - -- if (update_rc) -- tx_info->pad[0] |= ATH_TX_INFO_UPDATE_RC; - if (ds->ds_txstat.ts_status & ATH9K_TXERR_FILT) - tx_info->flags |= IEEE80211_TX_STAT_TX_FILTERED; -+ if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && update_rc) -+ tx_info->flags |= IEEE80211_TX_STAT_AMPDU; - - if ((ds->ds_txstat.ts_status & ATH9K_TXERR_FILT) == 0 && - (bf->bf_flags & ATH9K_TXDESC_NOACK) == 0 && update_rc) { ---- a/drivers/net/wireless/ath/ath9k/rc.h -+++ b/drivers/net/wireless/ath/ath9k/rc.h -@@ -172,7 +172,6 @@ struct ath_rate_priv { - - #define ATH_TX_INFO_FRAME_TYPE_INTERNAL (1 << 0) - #define ATH_TX_INFO_FRAME_TYPE_PAUSE (1 << 1) --#define ATH_TX_INFO_UPDATE_RC (1 << 2) - #define ATH_TX_INFO_XRETRY (1 << 3) - #define ATH_TX_INFO_UNDERRUN (1 << 4) - ---- a/drivers/net/wireless/ath/ath9k/rc.c -+++ b/drivers/net/wireless/ath/ath9k/rc.c -@@ -1226,8 +1226,12 @@ static void ath_tx_status(void *priv, st - long_retry = rate->count - 1; - } - -- if (!priv_sta || !ieee80211_is_data(fc) || -- !(tx_info->pad[0] & ATH_TX_INFO_UPDATE_RC)) -+ if (!priv_sta || !ieee80211_is_data(fc)) -+ return; -+ -+ /* This packet was aggregated but doesn't carry status info */ -+ if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && -+ !(tx_info->flags & IEEE80211_TX_STAT_AMPDU)) - return; - - if (tx_info->flags & IEEE80211_TX_STAT_TX_FILTERED) diff --git a/package/mac80211/patches/560-minstrel_ht.patch b/package/mac80211/patches/530-minstrel_ht.patch similarity index 100% rename from package/mac80211/patches/560-minstrel_ht.patch rename to package/mac80211/patches/530-minstrel_ht.patch diff --git a/package/mac80211/patches/570-ath9k_use_minstrel.patch b/package/mac80211/patches/540-ath9k_use_minstrel.patch similarity index 100% rename from package/mac80211/patches/570-ath9k_use_minstrel.patch rename to package/mac80211/patches/540-ath9k_use_minstrel.patch diff --git a/package/mac80211/patches/540-minstrel_debugfs_cleanup.patch b/package/mac80211/patches/540-minstrel_debugfs_cleanup.patch deleted file mode 100644 index 9a13bae70..000000000 --- a/package/mac80211/patches/540-minstrel_debugfs_cleanup.patch +++ /dev/null @@ -1,80 +0,0 @@ ---- a/net/mac80211/rc80211_minstrel.h -+++ b/net/mac80211/rc80211_minstrel.h -@@ -80,6 +80,11 @@ struct minstrel_priv { - unsigned int lookaround_rate_mrr; - }; - -+struct minstrel_debugfs_info { -+ size_t len; -+ char buf[]; -+}; -+ - void minstrel_add_sta_debugfs(void *priv, void *priv_sta, struct dentry *dir); - void minstrel_remove_sta_debugfs(void *priv, void *priv_sta); - ---- a/net/mac80211/rc80211_minstrel_debugfs.c -+++ b/net/mac80211/rc80211_minstrel_debugfs.c -@@ -52,21 +52,15 @@ - #include - #include "rc80211_minstrel.h" - --struct minstrel_stats_info { -- struct minstrel_sta_info *mi; -- char buf[4096]; -- size_t len; --}; -- - static int - minstrel_stats_open(struct inode *inode, struct file *file) - { - struct minstrel_sta_info *mi = inode->i_private; -- struct minstrel_stats_info *ms; -+ struct minstrel_debugfs_info *ms; - unsigned int i, tp, prob, eprob; - char *p; - -- ms = kmalloc(sizeof(*ms), GFP_KERNEL); -+ ms = kmalloc(sizeof(*ms) + 4096, GFP_KERNEL); - if (!ms) - return -ENOMEM; - -@@ -107,35 +101,18 @@ minstrel_stats_open(struct inode *inode, - } - - static ssize_t --minstrel_stats_read(struct file *file, char __user *buf, size_t len, loff_t *o) -+minstrel_stats_read(struct file *file, char __user *buf, size_t len, loff_t *ppos) - { -- struct minstrel_stats_info *ms; -- char *src; -+ struct minstrel_debugfs_info *ms; - - ms = file->private_data; -- src = ms->buf; -- -- len = min(len, ms->len); -- if (len <= *o) -- return 0; -- -- src += *o; -- len -= *o; -- *o += len; -- -- if (copy_to_user(buf, src, len)) -- return -EFAULT; -- -- return len; -+ return simple_read_from_buffer(buf, len, ppos, ms->buf, ms->len); - } - - static int - minstrel_stats_release(struct inode *inode, struct file *file) - { -- struct minstrel_stats_info *ms = file->private_data; -- -- kfree(ms); -- -+ kfree(file->private_data); - return 0; - } - diff --git a/package/mac80211/patches/550-ath9k_bb_fix.patch b/package/mac80211/patches/550-ath9k_bb_fix.patch new file mode 100644 index 000000000..17bee7c2c --- /dev/null +++ b/package/mac80211/patches/550-ath9k_bb_fix.patch @@ -0,0 +1,59 @@ +--- a/drivers/net/wireless/ath/ath9k/hw.c ++++ b/drivers/net/wireless/ath/ath9k/hw.c +@@ -1911,6 +1911,34 @@ static void ath9k_enable_rfkill(struct a + REG_SET_BIT(ah, AR_PHY_TEST, RFSILENT_BB); + } + ++bool ath9k_hw_check_alive(struct ath_hw *ah) ++{ ++ int count = 50; ++ u32 reg; ++ ++ if (AR_SREV_9285_10_OR_LATER(ah)) ++ return true; ++ ++ do { ++ reg = REG_READ(ah, AR_OBS_BUS_1); ++ ++ if ((reg & 0x7E7FFFEF) != 0x00702400) ++ return true; ++ ++ switch (reg & 0x7E000B00) { ++ case 0x1E000000: ++ case 0x52000B00: ++ case 0x18000B00: ++ continue; ++ default: ++ return true; ++ } ++ } while (count-- > 0); ++ ++ return false; ++} ++EXPORT_SYMBOL(ath9k_hw_check_alive); ++ + int ath9k_hw_reset(struct ath_hw *ah, struct ath9k_channel *chan, + bool bChannelChange) + { +--- a/drivers/net/wireless/ath/ath9k/hw.h ++++ b/drivers/net/wireless/ath/ath9k/hw.h +@@ -679,6 +679,7 @@ void ath9k_hw_set11nmac2040(struct ath_h + void ath9k_hw_beaconinit(struct ath_hw *ah, u32 next_beacon, u32 beacon_period); + void ath9k_hw_set_sta_beacon_timers(struct ath_hw *ah, + const struct ath9k_beacon_state *bs); ++bool ath9k_hw_check_alive(struct ath_hw *ah); + + bool ath9k_hw_setpower(struct ath_hw *ah, enum ath9k_power_mode mode); + +--- a/drivers/net/wireless/ath/ath9k/main.c ++++ b/drivers/net/wireless/ath/ath9k/main.c +@@ -405,7 +405,8 @@ void ath9k_tasklet(unsigned long data) + + ath9k_ps_wakeup(sc); + +- if (status & ATH9K_INT_FATAL) { ++ if ((status & ATH9K_INT_FATAL) || ++ !ath9k_hw_check_alive(ah)) { + ath_reset(sc, false); + ath9k_ps_restore(sc); + return; diff --git a/package/mac80211/patches/550-minstrel_extern.patch b/package/mac80211/patches/550-minstrel_extern.patch deleted file mode 100644 index 8a6064c3e..000000000 --- a/package/mac80211/patches/550-minstrel_extern.patch +++ /dev/null @@ -1,56 +0,0 @@ ---- a/net/mac80211/rc80211_minstrel.h -+++ b/net/mac80211/rc80211_minstrel.h -@@ -85,7 +85,13 @@ struct minstrel_debugfs_info { - char buf[]; - }; - -+extern struct rate_control_ops mac80211_minstrel; - void minstrel_add_sta_debugfs(void *priv, void *priv_sta, struct dentry *dir); - void minstrel_remove_sta_debugfs(void *priv, void *priv_sta); - -+/* debugfs */ -+int minstrel_stats_open(struct inode *inode, struct file *file); -+ssize_t minstrel_stats_read(struct file *file, char __user *buf, size_t len, loff_t *o); -+int minstrel_stats_release(struct inode *inode, struct file *file); -+ - #endif ---- a/net/mac80211/rc80211_minstrel.c -+++ b/net/mac80211/rc80211_minstrel.c -@@ -541,7 +541,7 @@ minstrel_free(void *priv) - kfree(priv); - } - --static struct rate_control_ops mac80211_minstrel = { -+struct rate_control_ops mac80211_minstrel = { - .name = "minstrel", - .tx_status = minstrel_tx_status, - .get_rate = minstrel_get_rate, ---- a/net/mac80211/rc80211_minstrel_debugfs.c -+++ b/net/mac80211/rc80211_minstrel_debugfs.c -@@ -52,7 +52,7 @@ - #include - #include "rc80211_minstrel.h" - --static int -+int - minstrel_stats_open(struct inode *inode, struct file *file) - { - struct minstrel_sta_info *mi = inode->i_private; -@@ -100,7 +100,7 @@ minstrel_stats_open(struct inode *inode, - return 0; - } - --static ssize_t -+ssize_t - minstrel_stats_read(struct file *file, char __user *buf, size_t len, loff_t *ppos) - { - struct minstrel_debugfs_info *ms; -@@ -109,7 +109,7 @@ minstrel_stats_read(struct file *file, c - return simple_read_from_buffer(buf, len, ppos, ms->buf, ms->len); - } - --static int -+int - minstrel_stats_release(struct inode *inode, struct file *file) - { - kfree(file->private_data); diff --git a/package/mac80211/patches/580-tx_status_optimization.patch b/package/mac80211/patches/580-tx_status_optimization.patch deleted file mode 100644 index 34eeff2f1..000000000 --- a/package/mac80211/patches/580-tx_status_optimization.patch +++ /dev/null @@ -1,48 +0,0 @@ ---- a/net/mac80211/status.c -+++ b/net/mac80211/status.c -@@ -171,7 +171,7 @@ void ieee80211_tx_status(struct ieee8021 - struct net_device *prev_dev = NULL; - struct sta_info *sta, *tmp; - int retry_count = -1, i; -- bool injected; -+ bool send_to_cooked; - - for (i = 0; i < IEEE80211_TX_MAX_RATES; i++) { - /* the HW cannot have attempted that rate */ -@@ -296,11 +296,15 @@ void ieee80211_tx_status(struct ieee8021 - /* this was a transmitted frame, but now we want to reuse it */ - skb_orphan(skb); - -+ /* Need to make a copy before skb->cb gets cleared */ -+ send_to_cooked = !!(info->flags & IEEE80211_TX_CTL_INJECTED) || -+ (type != IEEE80211_FTYPE_DATA); -+ - /* - * This is a bit racy but we can avoid a lot of work - * with this test... - */ -- if (!local->monitors && !local->cooked_mntrs) { -+ if (!local->monitors && (!send_to_cooked || !local->cooked_mntrs)) { - dev_kfree_skb(skb); - return; - } -@@ -345,9 +349,6 @@ void ieee80211_tx_status(struct ieee8021 - /* for now report the total retry_count */ - rthdr->data_retries = retry_count; - -- /* Need to make a copy before skb->cb gets cleared */ -- injected = !!(info->flags & IEEE80211_TX_CTL_INJECTED); -- - /* XXX: is this sufficient for BPF? */ - skb_set_mac_header(skb, 0); - skb->ip_summed = CHECKSUM_UNNECESSARY; -@@ -362,8 +363,7 @@ void ieee80211_tx_status(struct ieee8021 - continue; - - if ((sdata->u.mntr_flags & MONITOR_FLAG_COOK_FRAMES) && -- !injected && -- (type == IEEE80211_FTYPE_DATA)) -+ !send_to_cooked) - continue; - - if (prev_dev) { diff --git a/package/mac80211/patches/590-ath9k_rekey_crash_fix.patch b/package/mac80211/patches/590-ath9k_rekey_crash_fix.patch deleted file mode 100644 index 484c8c899..000000000 --- a/package/mac80211/patches/590-ath9k_rekey_crash_fix.patch +++ /dev/null @@ -1,37 +0,0 @@ ---- a/drivers/net/wireless/ath/ath9k/xmit.c -+++ b/drivers/net/wireless/ath/ath9k/xmit.c -@@ -1353,25 +1353,6 @@ static enum ath9k_pkt_type get_hw_packet - return htype; - } - --static bool is_pae(struct sk_buff *skb) --{ -- struct ieee80211_hdr *hdr; -- __le16 fc; -- -- hdr = (struct ieee80211_hdr *)skb->data; -- fc = hdr->frame_control; -- -- if (ieee80211_is_data(fc)) { -- if (ieee80211_is_nullfunc(fc) || -- /* Port Access Entity (IEEE 802.1X) */ -- (skb->protocol == cpu_to_be16(ETH_P_PAE))) { -- return true; -- } -- } -- -- return false; --} -- - static int get_hw_crypto_keytype(struct sk_buff *skb) - { - struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb); -@@ -1696,7 +1677,7 @@ static void ath_tx_start_dma(struct ath_ - goto tx_done; - } - -- if ((tx_info->flags & IEEE80211_TX_CTL_AMPDU) && !is_pae(skb)) { -+ if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) { - /* - * Try aggregation if it's a unicast data frame - * and the destination is HT capable. diff --git a/package/madwifi/patches/459-2.6.33_compile.patch b/package/madwifi/patches/459-2.6.33_compile.patch index 493db5534..e3b94b1c8 100644 --- a/package/madwifi/patches/459-2.6.33_compile.patch +++ b/package/madwifi/patches/459-2.6.33_compile.patch @@ -1,7 +1,5 @@ -Index: madwifi-trunk-r3314/kernelversion.c -=================================================================== ---- madwifi-trunk-r3314.orig/kernelversion.c 2010-03-03 11:24:57.250287480 +0100 -+++ madwifi-trunk-r3314/kernelversion.c 2010-03-03 11:25:30.255287207 +0100 +--- a/kernelversion.c ++++ b/kernelversion.c @@ -10,7 +10,11 @@ /* Linux 2.6.18+ uses */ @@ -15,11 +13,9 @@ Index: madwifi-trunk-r3314/kernelversion.c #endif char *uts_release = UTS_RELEASE; -Index: madwifi-trunk-r3314/ath/if_ath.c -=================================================================== ---- madwifi-trunk-r3314.orig/ath/if_ath.c 2010-03-03 11:25:33.266287431 +0100 -+++ madwifi-trunk-r3314/ath/if_ath.c 2010-03-03 12:07:39.606288303 +0100 -@@ -11580,227 +11580,231 @@ +--- a/ath/if_ath.c ++++ b/ath/if_ath.c +@@ -11580,227 +11580,231 @@ static int mincalibrate = 1; /* once a static int maxint = 0x7fffffff; /* 32-bit big */ static const ctl_table ath_sysctl_template[] = { @@ -287,7 +283,7 @@ Index: madwifi-trunk-r3314/ath/if_ath.c .procname = "cca_thresh", .mode = 0644, .proc_handler = ath_sysctl_halparam, -@@ -11838,12 +11842,16 @@ +@@ -11838,12 +11842,16 @@ ath_dynamic_sysctl_register(struct ath_s /* setup the table */ memset(sc->sc_sysctls, 0, space); @@ -304,7 +300,7 @@ Index: madwifi-trunk-r3314/ath/if_ath.c sc->sc_sysctls[2].procname = dev_name; sc->sc_sysctls[2].mode = 0555; sc->sc_sysctls[2].child = &sc->sc_sysctls[4]; -@@ -11966,7 +11974,7 @@ +@@ -11966,7 +11974,7 @@ ath_announce(struct net_device *dev) */ static ctl_table ath_static_sysctls[] = { #ifdef AR_DEBUG @@ -313,7 +309,7 @@ Index: madwifi-trunk-r3314/ath/if_ath.c .procname = "debug", .mode = 0644, .data = &ath_debug, -@@ -11974,14 +11982,14 @@ +@@ -11974,14 +11982,14 @@ static ctl_table ath_static_sysctls[] = .proc_handler = proc_dointvec }, #endif @@ -330,7 +326,7 @@ Index: madwifi-trunk-r3314/ath/if_ath.c .procname = "calibrate", .mode = 0644, .data = &ath_calinterval, -@@ -11993,14 +12001,14 @@ +@@ -11993,14 +12001,14 @@ static ctl_table ath_static_sysctls[] = { 0 } }; static ctl_table ath_ath_table[] = { @@ -347,10 +343,8 @@ Index: madwifi-trunk-r3314/ath/if_ath.c .procname = "dev", .mode = 0555, .child = ath_ath_table -Index: madwifi-trunk-r3314/ath/if_ath_ahb.h -=================================================================== ---- madwifi-trunk-r3314.orig/ath/if_ath_ahb.h 2010-03-03 11:32:20.295286997 +0100 -+++ madwifi-trunk-r3314/ath/if_ath_ahb.h 2010-03-03 11:32:56.782287828 +0100 +--- a/ath/if_ath_ahb.h ++++ b/ath/if_ath_ahb.h @@ -112,7 +112,11 @@ do { (void) (start); (void) (size); } while (0) #endif @@ -363,11 +357,9 @@ Index: madwifi-trunk-r3314/ath/if_ath_ahb.h #define bus_map_single dma_map_single #define bus_unmap_single dma_unmap_single #define bus_alloc_consistent(_hwdev, _sz, _hdma) \ -Index: madwifi-trunk-r3314/ath_hal/ah_os.c -=================================================================== ---- madwifi-trunk-r3314.orig/ath_hal/ah_os.c 2010-03-03 12:12:00.246286932 +0100 -+++ madwifi-trunk-r3314/ath_hal/ah_os.c 2010-03-03 12:12:59.503287204 +0100 -@@ -518,7 +518,7 @@ +--- a/ath_hal/ah_os.c ++++ b/ath_hal/ah_os.c +@@ -518,7 +518,7 @@ EXPORT_SYMBOL(ath_hal_memcmp); static ctl_table ath_hal_sysctls[] = { #ifdef AH_DEBUG @@ -376,7 +368,7 @@ Index: madwifi-trunk-r3314/ath_hal/ah_os.c .procname = "debug", .mode = 0644, .data = &ath_hal_debug, -@@ -526,21 +526,21 @@ +@@ -526,21 +526,21 @@ static ctl_table ath_hal_sysctls[] = { .proc_handler = proc_dointvec }, #endif @@ -401,7 +393,7 @@ Index: madwifi-trunk-r3314/ath_hal/ah_os.c .procname = "swba_backoff", .mode = 0644, .data = &ath_hal_additional_swba_backoff, -@@ -548,19 +548,19 @@ +@@ -548,19 +548,19 @@ static ctl_table ath_hal_sysctls[] = { .proc_handler = proc_dointvec }, #ifdef AH_DEBUG_ALQ @@ -424,7 +416,7 @@ Index: madwifi-trunk-r3314/ath_hal/ah_os.c .procname = "alq_lost", .mode = 0644, .data = &ath_hal_alq_lost, -@@ -571,21 +571,21 @@ +@@ -571,21 +571,21 @@ static ctl_table ath_hal_sysctls[] = { { 0 } }; static ctl_table ath_hal_table[] = { @@ -449,11 +441,9 @@ Index: madwifi-trunk-r3314/ath_hal/ah_os.c .procname = "dev", .mode = 0555, .child = ath_ath_table -Index: madwifi-trunk-r3314/include/compat.h -=================================================================== ---- madwifi-trunk-r3314.orig/include/compat.h 2010-03-03 11:58:09.526287574 +0100 -+++ madwifi-trunk-r3314/include/compat.h 2010-03-03 12:09:53.194286975 +0100 -@@ -193,6 +193,12 @@ +--- a/include/compat.h ++++ b/include/compat.h +@@ -193,6 +193,12 @@ static inline int timeval_compare(struct #define __skb_queue_after(_list, _old, _new) __skb_append(_old, _new, _list) #endif @@ -466,11 +456,9 @@ Index: madwifi-trunk-r3314/include/compat.h #endif /* __KERNEL__ */ #endif /* _ATH_COMPAT_H_ */ -Index: madwifi-trunk-r3314/net80211/ieee80211_linux.c -=================================================================== ---- madwifi-trunk-r3314.orig/net80211/ieee80211_linux.c 2010-03-03 11:56:37.423286722 +0100 -+++ madwifi-trunk-r3314/net80211/ieee80211_linux.c 2010-03-03 12:11:06.962288262 +0100 -@@ -699,39 +699,39 @@ +--- a/net80211/ieee80211_linux.c ++++ b/net80211/ieee80211_linux.c +@@ -699,39 +699,39 @@ IEEE80211_SYSCTL_DECL(ieee80211_sysctl_m static const ctl_table ieee80211_sysctl_template[] = { #ifdef IEEE80211_DEBUG @@ -517,7 +505,7 @@ Index: madwifi-trunk-r3314/net80211/ieee80211_linux.c .procname = "%parent", .maxlen = IFNAMSIZ, .mode = 0444, -@@ -786,12 +786,16 @@ +@@ -786,12 +786,16 @@ ieee80211_virtfs_latevattach(struct ieee /* setup the table */ memset(vap->iv_sysctls, 0, space); diff --git a/package/madwifi/patches/461-rx_stats_count_fix.patch b/package/madwifi/patches/461-rx_stats_count_fix.patch new file mode 100644 index 000000000..4b5ce28cc --- /dev/null +++ b/package/madwifi/patches/461-rx_stats_count_fix.patch @@ -0,0 +1,23 @@ +--- a/net80211/ieee80211_input.c ++++ b/net80211/ieee80211_input.c +@@ -202,7 +202,6 @@ ieee80211_input(struct ieee80211vap * va + struct ieee80211com *ic; + struct net_device *dev; + struct ieee80211_node *ni_wds = NULL; +- struct net_device_stats *stats; + struct ieee80211_frame *wh; + struct ieee80211_key *key; + struct ether_header *eh; +@@ -685,12 +684,6 @@ ieee80211_input(struct ieee80211vap * va + if (! accept_data_frame(vap, ni, key, skb, eh)) + goto out; + +- if (ni->ni_subif && ((eh)->ether_type != __constant_htons(ETHERTYPE_PAE))) +- stats = &ni->ni_subif->iv_devstats; +- else +- stats = &vap->iv_devstats; +- stats->rx_packets++; +- stats->rx_bytes += skb->len; + IEEE80211_NODE_STAT(ni, rx_data); + IEEE80211_NODE_STAT_ADD(ni, rx_bytes, skb->len); + ic->ic_lastdata = jiffies; diff --git a/package/madwifi/patches/462-fix_ap_scan.patch b/package/madwifi/patches/462-fix_ap_scan.patch new file mode 100644 index 000000000..8a14f5b66 --- /dev/null +++ b/package/madwifi/patches/462-fix_ap_scan.patch @@ -0,0 +1,26 @@ +--- a/net80211/ieee80211_scan_ap.c ++++ b/net80211/ieee80211_scan_ap.c +@@ -595,6 +595,14 @@ ap_end(struct ieee80211_scan_state *ss, + + ic = vap->iv_ic; + ++ /* if we're already running, switch back to the home channel */ ++ if ((vap->iv_state == IEEE80211_S_RUN) && ++ (ic->ic_bsschan != IEEE80211_CHAN_ANYC)) { ++ ic->ic_curchan = ic->ic_bsschan; ++ ic->ic_set_channel(ic); ++ goto out; ++ } ++ + /* record stats for the channel that was scanned last */ + ic->ic_set_channel(ic); + spin_lock_irqsave(&channel_lock, sflags); +@@ -648,6 +656,8 @@ ap_end(struct ieee80211_scan_state *ss, + IEEE80211_SCHEDULE_TQUEUE(&as->as_actiontq); + res = 1; + } ++ ++out: + SCAN_AP_UNLOCK_IRQ(as); + return res; + } diff --git a/package/madwifi/patches/463-fix_txrate_display.patch b/package/madwifi/patches/463-fix_txrate_display.patch new file mode 100644 index 000000000..0889f78fe --- /dev/null +++ b/package/madwifi/patches/463-fix_txrate_display.patch @@ -0,0 +1,10 @@ +--- a/ath_rate/minstrel/minstrel.c ++++ b/ath_rate/minstrel/minstrel.c +@@ -728,6 +728,7 @@ ath_rate_statistics(struct ieee80211_nod + rn->max_tp_rate2 = index_max_tp2; + rn->max_prob_rate = index_max_prob; + rn->current_rate = index_max_tp; ++ ni->ni_txrate = index_max_tp; + } + + static struct ath_ratectrl * diff --git a/package/mmc_over_gpio/Makefile b/package/mmc_over_gpio/Makefile index 9c2e7277a..4c6fdb5a9 100644 --- a/package/mmc_over_gpio/Makefile +++ b/package/mmc_over_gpio/Makefile @@ -23,6 +23,28 @@ define KernelPackage/mmc-over-gpio AUTOLOAD:=$(call AutoLoad,93,gpiommc) endef +define Package/kmod-mmc-over-gpio/config +config KMOD_MMC_OVER_GPIO_DI_PIN + int "GPIO DI PIN" + depends PACKAGE_kmod-mmc-over-gpio + default 1 + +config KMOD_MMC_OVER_GPIO_DO_PIN + int "GPIO DO PIN" + depends PACKAGE_kmod-mmc-over-gpio + default 3 + +config KMOD_MMC_OVER_GPIO_CLK_PIN + int "GPIO CLK PIN" + depends PACKAGE_kmod-mmc-over-gpio + default 4 + +config KMOD_MMC_OVER_GPIO_CS_PIN + int "GPIO CS PIN" + depends PACKAGE_kmod-mmc-over-gpio + default 7 +endef + define KernelPackage/mmc-over-gpio/description Support for driving an MMC/SD card over GPIO pins via SPI. endef @@ -39,6 +61,12 @@ define KernelPackage/mmc-over-gpio/install $(INSTALL_DATA) ./files/mmc_over_gpio.config $(1)/etc/config/mmc_over_gpio $(INSTALL_DIR) $(1)/etc/init.d $(INSTALL_BIN) ./files/mmc_over_gpio.init $(1)/etc/init.d/mmc_over_gpio + + $(SED) 's,@GPIO_DI_PIN@,$(CONFIG_KMOD_MMC_OVER_GPIO_DI_PIN),g' \ + -e 's,@GPIO_DO_PIN@,$(CONFIG_KMOD_MMC_OVER_GPIO_DO_PIN),g' \ + -e 's,@GPIO_CLK_PIN@,$(CONFIG_KMOD_MMC_OVER_GPIO_CLK_PIN),g' \ + -e 's,@GPIO_CS_PIN@,$(CONFIG_KMOD_MMC_OVER_GPIO_CS_PIN),g' \ + $(1)/etc/config/mmc_over_gpio endef $(eval $(call KernelPackage,mmc-over-gpio)) diff --git a/package/mmc_over_gpio/files/mmc_over_gpio.config b/package/mmc_over_gpio/files/mmc_over_gpio.config index 77a9e304c..23f008485 100644 --- a/package/mmc_over_gpio/files/mmc_over_gpio.config +++ b/package/mmc_over_gpio/files/mmc_over_gpio.config @@ -1,8 +1,8 @@ config 'mmc_over_gpio' option 'name' 'default' option 'enabled' '0' - option 'DI_pin' '1' - option 'DO_pin' '3' - option 'CLK_pin' '4' - option 'CS_pin' '7' + option 'DI_pin' '@GPIO_DI_PIN@' + option 'DO_pin' '@GPIO_DO_PIN@' + option 'CLK_pin' '@GPIO_CLK_PIN@' + option 'CS_pin' '@GPIO_CS_PIN@' option 'mode' '0' diff --git a/package/mtd/Makefile b/package/mtd/Makefile index ced26d5c6..9438b96fd 100644 --- a/package/mtd/Makefile +++ b/package/mtd/Makefile @@ -9,7 +9,7 @@ include $(TOPDIR)/rules.mk include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=mtd -PKG_RELEASE:=11 +PKG_RELEASE:=12 PKG_BUILD_DIR := $(KERNEL_BUILD_DIR)/$(PKG_NAME) STAMP_PREPARED := $(STAMP_PREPARED)_$(call confvar,CONFIG_MTD_REDBOOT_PARTS) diff --git a/package/mtd/src/crc32.h b/package/mtd/src/crc32.h index ee3145bc1..68f8ee4fe 100644 --- a/package/mtd/src/crc32.h +++ b/package/mtd/src/crc32.h @@ -7,7 +7,7 @@ extern const uint32_t crc32_table[256]; /* Return a 32-bit CRC of the contents of the buffer. */ - static inline uint32_t +static inline uint32_t crc32(uint32_t val, const void *ss, int len) { const unsigned char *s = ss; @@ -16,4 +16,11 @@ crc32(uint32_t val, const void *ss, int len) return val; } +static inline unsigned int crc32buf(char *buf, size_t len) +{ + return crc32(0xFFFFFFFF, buf, len); +} + + + #endif diff --git a/package/mtd/src/fis.c b/package/mtd/src/fis.c index 3108c5a9e..b285d24db 100644 --- a/package/mtd/src/fis.c +++ b/package/mtd/src/fis.c @@ -146,7 +146,7 @@ fis_remap(struct fis_part *old, int n_old, struct fis_part *new, int n_new) struct fis_image_desc *desc; struct fis_part *part; uint32_t offset = 0, size = 0; - char *end, *tmp; + char *start, *end, *tmp; int i; desc = fis_open(); @@ -156,6 +156,7 @@ fis_remap(struct fis_part *old, int n_old, struct fis_part *new, int n_new) if (!quiet) fprintf(stderr, "Updating FIS table... \n"); + start = (char *) desc; end = (char *) desc + fis_erasesize; while ((char *) desc < end) { if (!desc->hdr.name[0] || (desc->hdr.name[0] == 0xff)) @@ -167,9 +168,12 @@ fis_remap(struct fis_part *old, int n_old, struct fis_part *new, int n_new) if (!strcmp((char *) desc->hdr.name, "RedBoot")) redboot = desc; + /* update max offset */ + if (offset < desc->hdr.flash_base) + offset = desc->hdr.flash_base; + for (i = 0; i < n_old; i++) { if (!strncmp((char *) desc->hdr.name, (char *) old[i].name, sizeof(desc->hdr.name))) { - size += desc->hdr.size; last = desc; if (!first) first = desc; @@ -180,13 +184,21 @@ fis_remap(struct fis_part *old, int n_old, struct fis_part *new, int n_new) } desc--; - if (desc == last) { - desc = fisdir; - } + /* determine size of available space */ + desc = (struct fis_image_desc *) start; + while ((char *) desc < end) { + if (!desc->hdr.name[0] || (desc->hdr.name[0] == 0xff)) + break; - /* size fixup */ - if (desc && (last->hdr.flash_base < desc->hdr.flash_base - last->hdr.size)) - size += (desc->hdr.flash_base - last->hdr.flash_base) - last->hdr.size; + if (desc->hdr.flash_base > last->hdr.flash_base && + desc->hdr.flash_base < offset) + offset = desc->hdr.flash_base; + + desc++; + } + desc--; + + size = offset - first->hdr.flash_base; #ifdef notyet desc = first - 1; diff --git a/package/mtd/src/mtd.c b/package/mtd/src/mtd.c index 752547656..ff75fcb8a 100644 --- a/package/mtd/src/mtd.c +++ b/package/mtd/src/mtd.c @@ -44,10 +44,23 @@ #include "mtd-api.h" #include "fis.h" #include "mtd.h" +#include "crc32.h" #define MAX_ARGS 8 #define JFFS2_DEFAULT_DIR "" /* directory name without /, empty means root dir */ +#if __BYTE_ORDER == __BIG_ENDIAN +#define STORE32_LE(X) ((((X) & 0x000000FF) << 24) | (((X) & 0x0000FF00) << 8) | (((X) & 0x00FF0000) >> 8) | (((X) & 0xFF000000) >> 24)) +#elif __BYTE_ORDER == __LITTLE_ENDIAN +#define STORE32_LE(X) (X) +#else +#error unkown endianness! +#endif + +ssize_t pread(int fd, void *buf, size_t count, off_t offset); +ssize_t pwrite(int fd, const void *buf, size_t count, off_t offset); + +#define TRX_MAGIC 0x30524448 /* "HDR0" */ struct trx_header { uint32_t magic; /* "HDR0" */ uint32_t len; /* Length of file including header */ @@ -251,6 +264,82 @@ mtd_erase(const char *mtd) } +static int +mtd_fixtrx(const char *mtd, size_t offset) +{ + int fd; + struct trx_header *trx; + char *buf; + ssize_t res; + size_t block_offset; + + if (quiet < 2) + fprintf(stderr, "Trying to fix trx header in %s at 0x%x...\n", mtd, offset); + + block_offset = offset & ~(erasesize - 1); + offset -= block_offset; + + fd = mtd_check_open(mtd); + if(fd < 0) { + fprintf(stderr, "Could not open mtd device: %s\n", mtd); + exit(1); + } + + if (block_offset + erasesize > mtdsize) { + fprintf(stderr, "Offset too large, device size 0x%x\n", mtdsize); + exit(1); + } + + buf = malloc(erasesize); + if (!buf) { + perror("malloc"); + exit(1); + } + + res = pread(fd, buf, erasesize, block_offset); + if (res != erasesize) { + perror("pread"); + exit(1); + } + + trx = (struct trx_header *) (buf + offset); + if (trx->magic != STORE32_LE(0x30524448)) { + fprintf(stderr, "No trx magic found\n"); + exit(1); + } + + if (trx->len == STORE32_LE(erasesize - offset)) { + if (quiet < 2) + fprintf(stderr, "Header already fixed, exiting\n"); + close(fd); + return 0; + } + + trx->len = STORE32_LE(erasesize - offset); + + trx->crc32 = STORE32_LE(crc32buf((char*) &trx->flag_version, erasesize - offset - 3*4)); + if (mtd_erase_block(fd, block_offset)) { + fprintf(stderr, "Can't erease block at 0x%x (%s)\n", block_offset, strerror(errno)); + exit(1); + } + + if (quiet < 2) + fprintf(stderr, "New crc32: 0x%x, rewriting block\n", trx->crc32); + + if (pwrite(fd, buf, erasesize, block_offset) != erasesize) { + fprintf(stderr, "Error writing block (%s)\n", strerror(errno)); + exit(1); + } + + if (quiet < 2) + fprintf(stderr, "Done.\n"); + + close (fd); + sync(); + return 0; + +} + static int mtd_refresh(const char *mtd) { @@ -480,6 +569,7 @@ static void usage(void) " erase erase all data on device\n" " write |- write (use - for stdin) to device\n" " jffs2write append to the jffs2 partition on the device\n" + " fixtrx fix the checksum in a trx header on first boot\n" "Following options are available:\n" " -q quiet mode (once: no [w] on writing,\n" " twice: no status messages)\n" @@ -488,6 +578,7 @@ static void usage(void) " -e erase before executing the command\n" " -d directory for jffs2write, defaults to \"tmp\"\n" " -j integrate into jffs2 data when writing an image\n" + " -o offset offset of the trx header in the partition (for fixtrx)\n" #ifdef FIS_SUPPORT " -F [:[:]][,...]\n" " alter the fis partition table to create new partitions replacing\n" @@ -518,12 +609,14 @@ int main (int argc, char **argv) int ch, i, boot, imagefd = 0, force, unlocked; char *erase[MAX_ARGS], *device = NULL; char *fis_layout = NULL; + size_t offset = 0; enum { CMD_ERASE, CMD_WRITE, CMD_UNLOCK, CMD_REFRESH, - CMD_JFFS2WRITE + CMD_JFFS2WRITE, + CMD_FIXTRX, } cmd = -1; erase[0] = NULL; @@ -536,7 +629,7 @@ int main (int argc, char **argv) #ifdef FIS_SUPPORT "F:" #endif - "frqe:d:j:")) != -1) + "frqe:d:j:o:")) != -1) switch (ch) { case 'f': force = 1; @@ -561,6 +654,14 @@ int main (int argc, char **argv) case 'd': jffs2dir = optarg; break; + case 'o': + errno = 0; + offset = strtoul(optarg, 0, 0); + if (errno) { + fprintf(stderr, "-o: illegal numeric string\n"); + usage(); + } + break; #ifdef FIS_SUPPORT case 'F': fis_layout = optarg; @@ -585,6 +686,9 @@ int main (int argc, char **argv) } else if ((strcmp(argv[0], "erase") == 0) && (argc == 2)) { cmd = CMD_ERASE; device = argv[1]; + } else if ((strcmp(argv[0], "fixtrx") == 0) && (argc == 2)) { + cmd = CMD_FIXTRX; + device = argv[1]; } else if ((strcmp(argv[0], "write") == 0) && (argc == 3)) { cmd = CMD_WRITE; device = argv[2]; @@ -657,6 +761,9 @@ int main (int argc, char **argv) case CMD_REFRESH: mtd_refresh(device); break; + case CMD_FIXTRX: + mtd_fixtrx(device, offset); + break; } sync(); diff --git a/package/mtd/src/trx.c b/package/mtd/src/trx.c index 5457a365b..7094ef62b 100644 --- a/package/mtd/src/trx.c +++ b/package/mtd/src/trx.c @@ -1,7 +1,7 @@ /* * trx.c * - * Copyright (C) 2005 Mike Baker + * Copyright (C) 2005 Mike Baker * Copyright (C) 2008 Felix Fietkau * * This program is free software; you can redistribute it and/or @@ -31,6 +31,7 @@ #include #include "mtd-api.h" #include "mtd.h" +#include "crc32.h" #define TRX_MAGIC 0x30524448 /* "HDR0" */ struct trx_header { @@ -41,39 +42,6 @@ struct trx_header { unsigned offsets[3]; /* Offsets of partitions from start of header */ }; -static unsigned long *crc32 = NULL; - -static void init_crc32() -{ - unsigned long crc; - unsigned long poly = 0xEDB88320L; - int n, bit; - - if (crc32) - return; - - crc32 = (unsigned long *) malloc(256 * sizeof(unsigned long)); - if (!crc32) { - perror("malloc"); - exit(1); - } - - for (n = 0; n < 256; n++) { - crc = (unsigned long) n; - for (bit = 0; bit < 8; bit++) - crc = (crc & 1) ? (poly ^ (crc >> 1)) : (crc >> 1); - crc32[n] = crc; - } -} - -static unsigned int crc32buf(char *buf, size_t len) -{ - unsigned int crc = 0xFFFFFFFF; - for (; len; len--, buf++) - crc = crc32[(crc ^ *buf) & 0xff] ^ (crc >> 8); - return crc; -} - int trx_fixup(int fd, const char *name) { @@ -107,7 +75,6 @@ trx_fixup(int fd, const char *name) goto err; } - init_crc32(); scan = ptr + offsetof(struct trx_header, flag_version); trx->crc32 = crc32buf(scan, trx->len - (scan - ptr)); msync(ptr, sizeof(struct trx_header), MS_SYNC|MS_INVALIDATE); diff --git a/package/ncurses/patches/100-ncurses-5.6-20080112-urxvt.patch b/package/ncurses/patches/100-ncurses-5.6-20080112-urxvt.patch index 90fcd5029..39e60ba98 100644 --- a/package/ncurses/patches/100-ncurses-5.6-20080112-urxvt.patch +++ b/package/ncurses/patches/100-ncurses-5.6-20080112-urxvt.patch @@ -1,7 +1,6 @@ -diff -up ncurses-5.6/misc/terminfo.src.urxvt ncurses-5.6/misc/terminfo.src ---- ncurses-5.6/misc/terminfo.src.urxvt 2008-01-10 14:09:13.000000000 +0100 -+++ ncurses-5.6/misc/terminfo.src 2008-01-10 14:13:17.000000000 +0100 -@@ -3882,6 +3882,172 @@ rxvt-cygwin-native|rxvt terminal emulato +--- a/misc/terminfo.src ++++ b/misc/terminfo.src +@@ -3965,6 +3965,172 @@ rxvt-cygwin-native|rxvt terminal emulato rxvt-16color|xterm with 16 colors like aixterm, ncv#32, use=ibm+16color, use=rxvt, diff --git a/package/ncurses/patches/101-ncurses-5.6-20080628-kbs.patch b/package/ncurses/patches/101-ncurses-5.6-20080628-kbs.patch index 2f1913fe9..3b3abd7b0 100644 --- a/package/ncurses/patches/101-ncurses-5.6-20080628-kbs.patch +++ b/package/ncurses/patches/101-ncurses-5.6-20080628-kbs.patch @@ -1,7 +1,6 @@ -diff -up ncurses-5.6/misc/terminfo.src.kbs ncurses-5.6/misc/terminfo.src ---- ncurses-5.6/misc/terminfo.src.kbs 2008-07-04 14:20:05.000000000 +0200 -+++ ncurses-5.6/misc/terminfo.src 2008-07-04 14:34:12.000000000 +0200 -@@ -3023,6 +3023,7 @@ xterm-xfree86|xterm terminal emulator (X +--- a/misc/terminfo.src ++++ b/misc/terminfo.src +@@ -3054,6 +3054,7 @@ xterm-xfree86|xterm terminal emulator (X # This version reflects the current xterm features. xterm-new|modern xterm terminal emulator, npc, @@ -9,7 +8,7 @@ diff -up ncurses-5.6/misc/terminfo.src.kbs ncurses-5.6/misc/terminfo.src indn=\E[%p1%dS, kDC=\E[3;2~, kEND=\E[1;2F, kHOM=\E[1;2H, kIC=\E[2;2~, kNXT=\E[6;2~, kPRV=\E[5;2~, kb2=\EOE, kcbt=\E[Z, kcub1=\EOD, kcud1=\EOB, kcuf1=\EOC, kcuu1=\EOA, -@@ -3740,6 +3741,7 @@ mlterm+pcfkeys|fragment for PC-style fke +@@ -3818,6 +3819,7 @@ mlterm+pcfkeys|fragment for PC-style fke rxvt-basic|rxvt terminal base (X Window System), OTbs, am, bce, eo, mir, msgr, xenl, xon, cols#80, it#8, lines#24, @@ -17,7 +16,7 @@ diff -up ncurses-5.6/misc/terminfo.src.kbs ncurses-5.6/misc/terminfo.src acsc=``aaffggjjkkllmmnnooppqqrrssttuuvvwwxxyyzz{{||}}~~, bel=^G, blink=\E[5m, bold=\E[1m, civis=\E[?25l, clear=\E[H\E[2J, cnorm=\E[?25h, cr=^M, -@@ -3750,7 +3752,7 @@ rxvt-basic|rxvt terminal base (X Window +@@ -3828,7 +3830,7 @@ rxvt-basic|rxvt terminal base (X Window enacs=\E(B\E)0, flash=\E[?5h\E[?5l, home=\E[H, ht=^I, hts=\EH, ich=\E[%p1%d@, ich1=\E[@, il=\E[%p1%dL, il1=\E[L, ind=^J, is1=\E[?47l\E=\E[?1l, @@ -26,7 +25,7 @@ diff -up ncurses-5.6/misc/terminfo.src.kbs ncurses-5.6/misc/terminfo.src kcbt=\E[Z, kmous=\E[M, rc=\E8, rev=\E[7m, ri=\EM, rmacs=^O, rmcup=\E[2J\E[?47l\E8, rmir=\E[4l, rmkx=\E>, rmso=\E[27m, rmul=\E[24m, -@@ -4451,6 +4453,7 @@ eterm|gnu emacs term.el terminal emulati +@@ -4541,6 +4543,7 @@ eterm|gnu emacs term.el terminal emulati screen|VT 100/ANSI X3.64 virtual terminal, OTbs, OTpt, am, km, mir, msgr, xenl, G0, colors#8, cols#80, it#8, lines#24, pairs#64, @@ -34,7 +33,7 @@ diff -up ncurses-5.6/misc/terminfo.src.kbs ncurses-5.6/misc/terminfo.src acsc=++\,\,--..00``aaffgghhiijjkkllmmnnooppqqrrssttuuvvwwxxyyzz{{||}}~~, bel=^G, blink=\E[5m, bold=\E[1m, cbt=\E[Z, civis=\E[?25l, clear=\E[H\E[J, cnorm=\E[34h\E[?25h, cr=^M, -@@ -4460,7 +4463,7 @@ screen|VT 100/ANSI X3.64 virtual termina +@@ -4550,7 +4553,7 @@ screen|VT 100/ANSI X3.64 virtual termina cvvis=\E[34l, dch=\E[%p1%dP, dch1=\E[P, dl=\E[%p1%dM, dl1=\E[M, ed=\E[J, el=\E[K, el1=\E[1K, enacs=\E(B\E)0, flash=\Eg, home=\E[H, ht=^I, hts=\EH, ich=\E[%p1%d@, @@ -43,7 +42,7 @@ diff -up ncurses-5.6/misc/terminfo.src.kbs ncurses-5.6/misc/terminfo.src kcub1=\EOD, kcud1=\EOB, kcuf1=\EOC, kcuu1=\EOA, kdch1=\E[3~, kend=\E[4~, kf1=\EOP, kf10=\E[21~, kf11=\E[23~, kf12=\E[24~, kf2=\EOQ, kf3=\EOR, kf4=\EOS, -@@ -4565,6 +4568,7 @@ screen.xterm-r6|screen customized for X1 +@@ -4655,6 +4658,7 @@ screen.xterm-r6|screen customized for X1 # on Solaris because Sun's curses implementation gets confused. screen.teraterm|disable ncv in teraterm, ncv#127, diff --git a/package/ncurses/patches/500-cross.patch b/package/ncurses/patches/500-cross.patch index b1e8d63f3..ace6252fe 100644 --- a/package/ncurses/patches/500-cross.patch +++ b/package/ncurses/patches/500-cross.patch @@ -1,7 +1,6 @@ -diff -ur ncurses-5.6/aclocal.m4 ncurses-5.6-owrt/aclocal.m4 ---- ncurses-5.6/aclocal.m4 2006-12-17 17:12:38.000000000 +0100 -+++ ncurses-5.6-owrt/aclocal.m4 2007-06-09 19:47:38.000000000 +0200 -@@ -4298,7 +4298,7 @@ +--- a/aclocal.m4 ++++ b/aclocal.m4 +@@ -4298,7 +4298,7 @@ CF_EOF EXTRA_LDFLAGS="-Wl,-rpath,\${libdir} $EXTRA_LDFLAGS" fi CF_SHARED_SONAME diff --git a/package/ncurses/patches/900-terminfo.patch b/package/ncurses/patches/900-terminfo.patch index 71c720fbf..7aab3dbca 100644 --- a/package/ncurses/patches/900-terminfo.patch +++ b/package/ncurses/patches/900-terminfo.patch @@ -1,6 +1,6 @@ ---- a/misc/terminfo.src 2009-03-16 08:18:53.000000000 +0300 -+++ b/misc/terminfo.src 2006-10-07 21:52:03.000000000 +0400 -@@ -3707,12 +3530,11 @@ +--- a/misc/terminfo.src ++++ b/misc/terminfo.src +@@ -3707,12 +3707,11 @@ konsole-xf3x|KDE console window with key # The value for kbs reflects local customization rather than the settings used # for XFree86 xterm. konsole-xf4x|KDE console window with keyboard for XFree86 4.x xterm, diff --git a/package/nozomi/patches/001-devfs.patch b/package/nozomi/patches/001-devfs.patch index 742409ec6..08cda0b57 100644 --- a/package/nozomi/patches/001-devfs.patch +++ b/package/nozomi/patches/001-devfs.patch @@ -1,8 +1,6 @@ -Index: nozomi-060209/nozomi.c -=================================================================== ---- nozomi-060209.orig/nozomi.c 2007-06-04 13:22:47.268669352 +0200 -+++ nozomi-060209/nozomi.c 2007-06-04 13:22:47.338658712 +0200 -@@ -2093,11 +2093,15 @@ +--- a/nozomi.c ++++ b/nozomi.c +@@ -2093,11 +2093,15 @@ static int ntty_tty_init(dc_t *dc) { td->magic = TTY_DRIVER_MAGIC; td->driver_name = NOZOMI_NAME_TTY; diff --git a/package/nozomi/patches/002-nozomi_vf_01.patch b/package/nozomi/patches/002-nozomi_vf_01.patch index f78a24417..7e6405e7e 100644 --- a/package/nozomi/patches/002-nozomi_vf_01.patch +++ b/package/nozomi/patches/002-nozomi_vf_01.patch @@ -1,7 +1,5 @@ -Index: nozomi-060209/nozomi.c -=================================================================== ---- nozomi-060209.orig/nozomi.c 2007-06-04 13:22:47.338658712 +0200 -+++ nozomi-060209/nozomi.c 2007-06-04 13:22:47.527629984 +0200 +--- a/nozomi.c ++++ b/nozomi.c @@ -7,6 +7,9 @@ * * Maintained by: Paul Hardwick, p.hardwick@option.com @@ -20,7 +18,7 @@ Index: nozomi-060209/nozomi.c #include -@@ -133,23 +137,23 @@ +@@ -133,23 +137,23 @@ static int nzdebug = NOZOMI_DEBUG_LEVEL; /* TODO: rewrite to optimize macros... */ #define SET_FCR(value__) \ do { \ @@ -48,7 +46,7 @@ Index: nozomi-060209/nozomi.c } while(0) #define GET_MEM(value__, addr__, length__) \ -@@ -265,7 +269,7 @@ +@@ -265,7 +269,7 @@ static int nzdebug = NOZOMI_DEBUG_LEVEL; /* There are two types of nozomi cards, one with 2048 memory and with 8192 memory */ typedef enum { F32_2 = 2048, /* Has 512 bytes downlink and uplink * 2 -> 2048 */ @@ -57,7 +55,7 @@ Index: nozomi-060209/nozomi.c } card_type_t; /* Two different toggle channels exist */ -@@ -438,12 +442,12 @@ +@@ -438,12 +442,12 @@ typedef struct { u32 base_addr; u8 closing; @@ -75,7 +73,7 @@ Index: nozomi-060209/nozomi.c card_type_t card_type; config_table_t config_table; /* Configuration table */ struct pci_dev *pdev; -@@ -490,7 +494,7 @@ +@@ -490,7 +494,7 @@ static struct pci_device_id nozomi_pci_t /* Used to store interrupt variables */ typedef struct { @@ -84,7 +82,7 @@ Index: nozomi-060209/nozomi.c } irq_t; MODULE_DEVICE_TABLE(pci, nozomi_pci_tbl); -@@ -1345,9 +1349,9 @@ +@@ -1345,9 +1349,9 @@ void nozomi_setup_private_data(dc_t *dc) u32 offset = dc->base_addr + dc->card_type/2; int i; @@ -97,7 +95,7 @@ Index: nozomi-060209/nozomi.c dc->ier_last_written = 0; dc->closing = 0; -@@ -1366,13 +1370,16 @@ +@@ -1366,13 +1370,16 @@ void nozomi_setup_private_data(dc_t *dc) static void tty_flip_queue_function(void *tmp_dc) { dc_t *dc = (dc_t*) tmp_dc; int i; @@ -114,7 +112,7 @@ Index: nozomi-060209/nozomi.c } } } -@@ -1555,7 +1562,11 @@ +@@ -1555,7 +1562,11 @@ err_disable_device: static void tty_do_close(dc_t *dc, port_t *port) { @@ -127,7 +125,7 @@ Index: nozomi-060209/nozomi.c if ( !port->tty_open_count ) { goto exit; -@@ -1569,7 +1580,9 @@ +@@ -1569,7 +1580,9 @@ static void tty_do_close(dc_t *dc, port_ if ( port->tty_open_count == 0) { D1("close: %d", port->token_dl ); @@ -137,7 +135,7 @@ Index: nozomi-060209/nozomi.c } exit: -@@ -1679,8 +1692,11 @@ +@@ -1679,8 +1692,11 @@ static int ntty_open(struct tty_struct * s32 index = get_index(tty); port_t *port = get_port_by_tty(tty); dc_t *dc = get_dc_by_tty(tty); @@ -150,7 +148,7 @@ Index: nozomi-060209/nozomi.c tty->low_latency = 1; tty->driver_data = port; -@@ -1698,7 +1714,9 @@ +@@ -1698,7 +1714,9 @@ static int ntty_open(struct tty_struct * if ( port->tty_open_count == 1) { port->rx_data = port->tx_data = 0; D1("open: %d", port->token_dl ); @@ -160,7 +158,7 @@ Index: nozomi-060209/nozomi.c } up(&port->tty_sem); -@@ -1722,6 +1740,7 @@ +@@ -1722,6 +1740,7 @@ static s32 ntty_write(struct tty_struct int rval = -EINVAL; dc_t *dc = get_dc_by_tty(tty); port_t *port = (port_t *) tty->driver_data; @@ -168,7 +166,7 @@ Index: nozomi-060209/nozomi.c /* D1( "WRITEx: %d, index = %d", count, index); */ -@@ -1729,7 +1748,10 @@ +@@ -1729,7 +1748,10 @@ static s32 ntty_write(struct tty_struct return -ENODEV; } @@ -180,7 +178,7 @@ Index: nozomi-060209/nozomi.c if (! port->tty_open_count) { D1( " "); -@@ -1752,6 +1774,7 @@ +@@ -1752,6 +1774,7 @@ static s32 ntty_write(struct tty_struct goto exit; } @@ -188,7 +186,7 @@ Index: nozomi-060209/nozomi.c // CTS is only valid on the modem channel if ( port == &(dc->port[PORT_MDM]) ) { if ( port->ctrl_dl.CTS ) { -@@ -1763,6 +1786,7 @@ +@@ -1763,6 +1786,7 @@ static s32 ntty_write(struct tty_struct } else { enable_transmit_ul(port->tty_index, dc ); } @@ -196,7 +194,7 @@ Index: nozomi-060209/nozomi.c exit: up(&port->tty_sem); -@@ -1782,7 +1806,9 @@ +@@ -1782,7 +1806,9 @@ static int ntty_write_room(struct tty_st return 0; } @@ -207,7 +205,7 @@ Index: nozomi-060209/nozomi.c if (! port->tty_open_count) { goto exit; -@@ -1969,6 +1995,8 @@ +@@ -1969,6 +1995,8 @@ static int ntty_ioctl_tiocgicount(struct static int ntty_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg) { port_t *port = (port_t *) tty->driver_data; @@ -216,7 +214,7 @@ Index: nozomi-060209/nozomi.c int mask; int rval = -ENOIOCTLCMD; -@@ -1991,7 +2019,9 @@ +@@ -1991,7 +2019,9 @@ static int ntty_ioctl(struct tty_struct rval = ntty_ioctl_tiocgicount(tty, file, cmd, arg); break; case TIOCMGET: @@ -226,7 +224,7 @@ Index: nozomi-060209/nozomi.c break; case TIOCMSET: rval = ntty_tiocmset(tty, file, arg); -@@ -2000,20 +2030,24 @@ +@@ -2000,20 +2030,24 @@ static int ntty_ioctl(struct tty_struct if (get_user(mask, (unsigned long *) arg)) return -EFAULT; diff --git a/package/nvram/Makefile b/package/nvram/Makefile index f5eba9e2b..6ac11a9be 100644 --- a/package/nvram/Makefile +++ b/package/nvram/Makefile @@ -41,6 +41,12 @@ define Build/Compile LDFLAGS="$(TARGET_LDFLAGS)" endef +define Build/InstallDev + $(INSTALL_DIR) $(1)/usr/lib + $(INSTALL_BIN) $(PKG_BUILD_DIR)/libnvram.so.0.1 $(1)/usr/lib/ + ln -s libnvram.so.0.1 $(1)/usr/lib/libnvram.so +endef + define Package/nvram/install $(INSTALL_DIR) $(1)/etc/init.d $(INSTALL_BIN) ./files/nvram.init $(1)/etc/init.d/nvram diff --git a/package/openssl/patches/110-optimize-for-size.patch b/package/openssl/patches/110-optimize-for-size.patch index 769a3d936..ae35f50ce 100644 --- a/package/openssl/patches/110-optimize-for-size.patch +++ b/package/openssl/patches/110-optimize-for-size.patch @@ -1,5 +1,3 @@ -diff --git a/Configure b/Configure -index 32e154b..eec5066 100755 --- a/Configure +++ b/Configure @@ -370,6 +370,8 @@ my %table=( diff --git a/package/openssl/patches/120-makedepend.patch b/package/openssl/patches/120-makedepend.patch index 95600ff8e..4ed6f6d22 100644 --- a/package/openssl/patches/120-makedepend.patch +++ b/package/openssl/patches/120-makedepend.patch @@ -1,6 +1,6 @@ --- a/util/domd +++ b/util/domd -@@ -22,7 +23,7 @@ if [ "$MAKEDEPEND" = "gcc" ]; then +@@ -22,7 +22,7 @@ if expr "$MAKEDEPEND" : '.*gcc$' > /dev/ done sed -e '/^# DO NOT DELETE.*/,$d' < Makefile > Makefile.tmp echo '# DO NOT DELETE THIS LINE -- make depend depends on it.' >> Makefile.tmp diff --git a/package/openssl/patches/140-makefile-dirs.patch b/package/openssl/patches/140-makefile-dirs.patch index 997978250..84eee83ab 100644 --- a/package/openssl/patches/140-makefile-dirs.patch +++ b/package/openssl/patches/140-makefile-dirs.patch @@ -1,6 +1,6 @@ --- a/Makefile.org +++ b/Makefile.org -@@ -131,7 +131,7 @@ FIPSCANLIB= +@@ -132,7 +132,7 @@ FIPSCANLIB= BASEADDR= diff --git a/package/openssl/patches/150-no_engines.patch b/package/openssl/patches/150-no_engines.patch index e344b4942..ed34698a8 100644 --- a/package/openssl/patches/150-no_engines.patch +++ b/package/openssl/patches/150-no_engines.patch @@ -1,6 +1,6 @@ --- a/Configure +++ b/Configure -@@ -1850,6 +1850,11 @@ EOF +@@ -1904,6 +1904,11 @@ EOF close(OUT); } diff --git a/package/openssl/patches/160-disable_doc_tests.patch b/package/openssl/patches/160-disable_doc_tests.patch index 32a6d2930..8c042ef6f 100644 --- a/package/openssl/patches/160-disable_doc_tests.patch +++ b/package/openssl/patches/160-disable_doc_tests.patch @@ -1,6 +1,6 @@ --- a/Makefile +++ b/Makefile -@@ -133,7 +133,7 @@ FIPSCANLIB= +@@ -134,7 +134,7 @@ FIPSCANLIB= BASEADDR=0xFB00000 @@ -9,7 +9,7 @@ SHLIBDIRS= crypto ssl # dirs in crypto to build -@@ -150,7 +150,7 @@ SDIRS= \ +@@ -151,7 +151,7 @@ SDIRS= \ # tests to perform. "alltests" is a special word indicating that all tests # should be performed. @@ -18,7 +18,7 @@ MAKEFILE= Makefile -@@ -162,7 +162,7 @@ SHELL=/bin/sh +@@ -163,7 +163,7 @@ SHELL=/bin/sh TOP= . ONEDIRS=out tmp @@ -27,7 +27,7 @@ WDIRS= windows LIBS= libcrypto.a libssl.a SHARED_CRYPTO=libcrypto$(SHLIB_EXT) -@@ -321,7 +321,7 @@ FIPS_EX_OBJ= ../crypto/aes/aes_cfb.o \ +@@ -323,7 +323,7 @@ FIPS_EX_OBJ= ../crypto/aes/aes_cfb.o \ ../crypto/uid.o sub_all: build_all @@ -36,7 +36,7 @@ build_libs: build_crypto build_fips build_ssl build_shared build_engines -@@ -613,7 +613,7 @@ dist: +@@ -617,7 +617,7 @@ dist: dist_pem_h: (cd crypto/pem; $(MAKE) -e $(BUILDENV) pem.h; $(MAKE) clean) @@ -47,7 +47,7 @@ @$(PERL) $(TOP)/util/mkdir-p.pl $(INSTALL_PREFIX)$(INSTALLTOP)/bin \ --- a/Makefile.org +++ b/Makefile.org -@@ -611,7 +611,7 @@ dist: +@@ -615,7 +615,7 @@ dist: dist_pem_h: (cd crypto/pem; $(MAKE) -e $(BUILDENV) pem.h; $(MAKE) clean) diff --git a/package/openssl/patches/200-ocf-20080917.patch b/package/openssl/patches/200-ocf-20080917.patch index 92520ea4e..2c6c04a1a 100644 --- a/package/openssl/patches/200-ocf-20080917.patch +++ b/package/openssl/patches/200-ocf-20080917.patch @@ -9,7 +9,7 @@ # # --test-sanity Make a number of sanity checks on the data in this file. # This is a debugging tool for OpenSSL developers. -@@ -547,6 +549,9 @@ my %table=( +@@ -554,6 +556,9 @@ my %table=( ##### Compaq Non-Stop Kernel (Tandem) "tandem-c89","c89:-Ww -D__TANDEM -D_XOPEN_SOURCE -D_XOPEN_SOURCE_EXTENDED=1 -D_TANDEM_SOURCE -DB_ENDIAN::(unknown):::THIRTY_TWO_BIT:::", @@ -19,7 +19,7 @@ ); my @MK1MF_Builds=qw(VC-WIN64I VC-WIN64A -@@ -601,6 +606,8 @@ my $montasm=1; # but "no-montasm" is d +@@ -610,6 +615,8 @@ my $montasm=1; # but "no-montasm" is d my $no_asm=0; my $no_dso=0; my $no_gmp=0; @@ -28,9 +28,9 @@ my @skip=(); my $Makefile="Makefile"; my $des_locl="crypto/des/des_locl.h"; -@@ -749,6 +756,14 @@ PROCESS_ARGS: +@@ -762,6 +769,14 @@ PROCESS_ARGS: { - exit(&test_sanity()); + $strict_warnings = 1; } + elsif (/^--with-cryptodev$/) + { @@ -43,7 +43,7 @@ elsif (/^reconfigure/ || /^reconf/) { if (open(IN,"<$Makefile")) -@@ -1037,6 +1052,7 @@ foreach (sort (keys %disabled)) +@@ -1055,6 +1070,7 @@ foreach (sort (keys %disabled)) print " OPENSSL_NO_$ALGO"; if (/^err$/) { $flags .= "-DOPENSSL_NO_ERR "; } @@ -51,7 +51,7 @@ elsif (/^asm$/) { $no_asm = 1; } } else -@@ -1161,6 +1177,16 @@ if (!$no_krb5) +@@ -1184,6 +1200,16 @@ if (!$no_krb5) $withargs{"krb5-dir"} ne ""; } @@ -85,7 +85,7 @@ ---------------------- --- a/Makefile.org +++ b/Makefile.org -@@ -502,7 +502,7 @@ files: +@@ -504,7 +504,7 @@ files: links: @$(PERL) $(TOP)/util/mkdir-p.pl include/openssl @@ -116,7 +116,7 @@ # on Unix, "cyg" for certain forms under Cygwin...) or suffix (.a, .so, --- a/config +++ b/config -@@ -270,7 +270,7 @@ case "${SYSTEM}:${RELEASE}:${VERSION}:${MACHINE}" in +@@ -270,7 +270,7 @@ case "${SYSTEM}:${RELEASE}:${VERSION}:${ echo "ppc-apple-darwin${VERSION}" ;; *) @@ -144,7 +144,7 @@ fi # Only set CC if not supplied already -@@ -493,6 +493,9 @@ echo Operating system: $GUESSOS +@@ -488,6 +491,9 @@ echo Operating system: $GUESSOS # script above so we end up with values in vars but that would take # more time that I want to waste at the moment case "$GUESSOS" in @@ -320,7 +320,7 @@ {FUNC_TYPE_MD,"md2",dgst_main}, --- a/apps/speed.c +++ b/apps/speed.c -@@ -292,7 +292,7 @@ static const char *names[ALGOR_NUM]={ +@@ -296,7 +296,7 @@ static const char *names[ALGOR_NUM]={ "evp","sha256","sha512", "aes-128 ige","aes-192 ige","aes-256 ige"}; static double results[ALGOR_NUM][SIZE_NUM]; @@ -329,7 +329,7 @@ #ifndef OPENSSL_NO_RSA static double rsa_results[RSA_NUM][2]; #endif -@@ -328,6 +328,79 @@ static SIGRETTYPE sig_done(int sig) +@@ -336,6 +336,79 @@ static SIGRETTYPE sig_done(int sig) #define START 0 #define STOP 1 @@ -409,7 +409,7 @@ #if defined(OPENSSL_SYS_NETWARE) /* for NetWare the best we can do is use clock() which returns the -@@ -358,6 +431,11 @@ static double Time_F(int s) +@@ -366,6 +439,11 @@ static double Time_F(int s) { double ret; @@ -421,7 +421,7 @@ #ifdef USE_TOD if(usertime) { -@@ -832,6 +910,14 @@ int MAIN(int argc, char **argv) +@@ -840,6 +918,14 @@ int MAIN(int argc, char **argv) j--; /* Otherwise, -elapsed gets confused with an algorithm. */ } @@ -436,8 +436,8 @@ else if ((argc > 0) && (strcmp(*argv,"-evp") == 0)) { argc--; -@@ -1260,6 +1346,9 @@ int MAIN(int argc, char **argv) - #ifdef HAVE_FORK +@@ -1268,6 +1354,9 @@ int MAIN(int argc, char **argv) + #ifndef NO_FORK BIO_printf(bio_err,"-multi n run n benchmarks in parallel.\n"); #endif +#ifdef __linux__ @@ -446,7 +446,7 @@ goto end; } argc--; -@@ -1267,11 +1356,6 @@ int MAIN(int argc, char **argv) +@@ -1275,11 +1364,6 @@ int MAIN(int argc, char **argv) j++; } @@ -458,7 +458,7 @@ if (j == 0) { for (i=0; icipher_data; struct session_op *sess = &state->d_sess; @@ -896,7 +896,7 @@ memset(sess, 0, sizeof(struct session_op)); -@@ -496,6 +531,20 @@ cryptodev_cleanup(EVP_CIPHER_CTX *ctx) +@@ -505,6 +540,20 @@ cryptodev_cleanup(EVP_CIPHER_CTX *ctx) * gets called when libcrypto requests a cipher NID. */ @@ -917,7 +917,7 @@ /* DES CBC EVP */ const EVP_CIPHER cryptodev_des_cbc = { NID_des_cbc, -@@ -563,6 +612,32 @@ const EVP_CIPHER cryptodev_aes_cbc = { +@@ -572,6 +621,32 @@ const EVP_CIPHER cryptodev_aes_cbc = { NULL }; @@ -950,7 +950,7 @@ /* * Registered by the ENGINE when used to find out how to deal with * a particular NID in the ENGINE. this says what we'll do at the -@@ -576,6 +651,9 @@ cryptodev_engine_ciphers(ENGINE *e, cons +@@ -585,6 +660,9 @@ cryptodev_engine_ciphers(ENGINE *e, cons return (cryptodev_usable_ciphers(nids)); switch (nid) { @@ -960,7 +960,7 @@ case NID_des_ede3_cbc: *cipher = &cryptodev_3des_cbc; break; -@@ -591,6 +669,12 @@ cryptodev_engine_ciphers(ENGINE *e, cons +@@ -600,6 +678,12 @@ cryptodev_engine_ciphers(ENGINE *e, cons case NID_aes_128_cbc: *cipher = &cryptodev_aes_cbc; break; @@ -973,7 +973,7 @@ default: *cipher = NULL; break; -@@ -598,6 +682,234 @@ cryptodev_engine_ciphers(ENGINE *e, cons +@@ -607,6 +691,234 @@ cryptodev_engine_ciphers(ENGINE *e, cons return (*cipher != NULL); } @@ -1208,7 +1208,7 @@ static int cryptodev_engine_digests(ENGINE *e, const EVP_MD **digest, const int **nids, int nid) -@@ -606,10 +918,15 @@ cryptodev_engine_digests(ENGINE *e, cons +@@ -615,10 +927,15 @@ cryptodev_engine_digests(ENGINE *e, cons return (cryptodev_usable_digests(nids)); switch (nid) { @@ -1225,15 +1225,15 @@ *digest = NULL; break; } -@@ -637,6 +954,7 @@ bn2crparam(const BIGNUM *a, struct crpar +@@ -646,6 +963,7 @@ bn2crparam(const BIGNUM *a, struct crpar b = malloc(bytes); if (b == NULL) return (1); + memset(b, 0, bytes); - crp->crp_p = b; + crp->crp_p = (char *)b; crp->crp_nbits = bits; -@@ -681,7 +999,7 @@ zapparams(struct crypt_kop *kop) +@@ -690,7 +1008,7 @@ zapparams(struct crypt_kop *kop) { int i; @@ -1244,7 +1244,7 @@ kop->crk_param[i].crp_p = NULL; --- a/crypto/engine/engine.h +++ b/crypto/engine/engine.h -@@ -703,7 +703,7 @@ typedef int (*dynamic_bind_engine)(ENGIN +@@ -705,7 +705,7 @@ typedef int (*dynamic_bind_engine)(ENGIN * values. */ void *ENGINE_get_static_state(void); @@ -1266,7 +1266,7 @@ #endif --- a/crypto/evp/c_alld.c +++ b/crypto/evp/c_alld.c -@@ -81,7 +81,7 @@ void OpenSSL_add_all_digests(void) +@@ -78,7 +78,7 @@ void OpenSSL_add_all_digests(void) EVP_add_digest(EVP_dss()); #endif #endif @@ -1277,7 +1277,7 @@ EVP_add_digest_alias(SN_sha1WithRSAEncryption,SN_sha1WithRSA); --- a/engines/Makefile +++ b/engines/Makefile -@@ -96,6 +96,7 @@ install: +@@ -97,6 +97,7 @@ install: ( echo installing $$l; \ if [ "$(PLATFORM)" != "Cygwin" ]; then \ case "$(CFLAGS)" in \ @@ -1287,7 +1287,7 @@ *) sfx="bad";; \ --- a/util/domd +++ b/util/domd -@@ -23,13 +23,17 @@ if [ "$D" = "gcc" ]; then +@@ -22,13 +22,17 @@ if expr "$MAKEDEPEND" : '.*gcc$' > /dev/ done sed -e '/^# DO NOT DELETE.*/,$d' < Makefile > Makefile.tmp echo '# DO NOT DELETE THIS LINE -- make depend depends on it.' >> Makefile.tmp diff --git a/package/openssl/patches/300-etrax_support.patch b/package/openssl/patches/300-etrax_support.patch index 758ebeb76..74c9442d5 100644 --- a/package/openssl/patches/300-etrax_support.patch +++ b/package/openssl/patches/300-etrax_support.patch @@ -1,8 +1,8 @@ --- a/Configure +++ b/Configure -@@ -396,6 +396,10 @@ my %table=( - "qnx4", "cc:-DL_ENDIAN -DTERMIO::(unknown):::${x86_gcc_des} ${x86_gcc_opts}:", - "qnx6", "cc:-DL_ENDIAN -DTERMIOS::(unknown)::-lsocket:${x86_gcc_des} ${x86_gcc_opts}:", +@@ -403,6 +403,10 @@ my %table=( + "QNX6", "gcc:-DTERMIOS::::-lsocket::${no_asm}:dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)", + "QNX6-i386", "gcc:-DL_ENDIAN -DTERMIOS -O2 -Wall::::-lsocket:${x86_gcc_des} ${x86_gcc_opts}:${x86_elf_asm}:dlfcn:bsd-gcc-shared:-fPIC::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)", +# cris +"linux-cris", "\$(TARGET_CC):-DL_ENDIAN -DTERMIO -fomit-frame-pointer::-D_REENTRANT::-ldl:BN_LLONG THIRTY_TWO_BIT RC4_CHAR::::::::::::dlfcn:linux-shared:-fpic::.so.\$(SHLIB_MAJOR).\$(SHLIB_MINOR)::", diff --git a/package/opkg/patches/003-fs_overlay_support.patch b/package/opkg/patches/003-fs_overlay_support.patch index 0d4402ed1..4fed4d12e 100644 --- a/package/opkg/patches/003-fs_overlay_support.patch +++ b/package/opkg/patches/003-fs_overlay_support.patch @@ -6,7 +6,7 @@ Signed-off-by: Nicolas Thill --- a/libopkg/opkg_conf.c +++ b/libopkg/opkg_conf.c -@@ -62,6 +62,7 @@ +@@ -62,6 +62,7 @@ opkg_option_t options[] = { { "download_only", OPKG_OPT_TYPE_BOOL, &_conf.download_only }, { "nodeps", OPKG_OPT_TYPE_BOOL, &_conf.nodeps }, { "offline_root", OPKG_OPT_TYPE_STRING, &_conf.offline_root }, @@ -16,7 +16,7 @@ Signed-off-by: Nicolas Thill { "query-all", OPKG_OPT_TYPE_BOOL, &_conf.query_all }, --- a/libopkg/opkg_conf.h +++ b/libopkg/opkg_conf.h -@@ -76,6 +76,7 @@ +@@ -76,6 +76,7 @@ struct opkg_conf int check_signature; int nodeps; /* do not follow dependences */ char *offline_root; @@ -34,7 +34,7 @@ Signed-off-by: Nicolas Thill #include "pkg.h" #include "pkg_hash.h" -@@ -189,13 +190,24 @@ +@@ -189,13 +190,24 @@ static int verify_pkg_installable(pkg_t *pkg) { unsigned long kbs_available, pkg_size_kbs; diff --git a/package/opkg/patches/007-force_static.patch b/package/opkg/patches/007-force_static.patch index 4ae8bfea4..12a7cc66e 100644 --- a/package/opkg/patches/007-force_static.patch +++ b/package/opkg/patches/007-force_static.patch @@ -1,6 +1,6 @@ --- a/libopkg/Makefile.am +++ b/libopkg/Makefile.am -@@ -35,16 +35,10 @@ +@@ -35,16 +35,10 @@ if HAVE_SHA256 opkg_util_sources += sha256.c sha256.h endif @@ -22,7 +22,7 @@ +libopkg_a_LIBADD = $(top_builddir)/libbb/libbb.a $(CURL_LIBS) $(GPGME_LIBS) $(OPENSSL_LIBS) $(PATHFINDER_LIBS) --- a/libbb/Makefile.am +++ b/libbb/Makefile.am -@@ -2,9 +2,9 @@ +@@ -2,9 +2,9 @@ HOST_CPU=@host_cpu@ BUILD_CPU=@build_cpu@ ALL_CFLAGS=-g -O -Wall -DHOST_CPU_STR=\"$(HOST_CPU)\" -DBUILD_CPU=@build_cpu@ @@ -36,7 +36,7 @@ wfopen.c \ --- a/tests/Makefile.am +++ b/tests/Makefile.am -@@ -4,11 +4,11 @@ +@@ -4,11 +4,11 @@ AM_CFLAGS = $(ALL_CFLAGS) -Wall -g -O3 - #noinst_PROGRAMS = libopkg_test opkg_active_list_test noinst_PROGRAMS = libopkg_test @@ -50,7 +50,7 @@ #opkg_extract_test_SOURCES = opkg_extract_test.c #opkg_extract_test_CFLAGS = $(ALL_CFLAGS) -I$(top_srcdir) -@@ -16,7 +16,7 @@ +@@ -16,7 +16,7 @@ noinst_PROGRAMS = libopkg_test #opkg_active_list_test_SOURCES = opkg_active_list_test.c #opkg_active_list_test_CFLAGS = $(ALL_CFLAGS) -I$(top_srcdir) @@ -61,7 +61,7 @@ --- a/src/Makefile.am +++ b/src/Makefile.am -@@ -2,5 +2,5 @@ +@@ -2,5 +2,5 @@ AM_CFLAGS = -I${top_srcdir}/libopkg ${AL bin_PROGRAMS = opkg-cl opkg_cl_SOURCES = opkg-cl.c diff --git a/package/opkg/patches/009-remove-upgrade-all.patch b/package/opkg/patches/009-remove-upgrade-all.patch index d73ef466e..be76ef53c 100644 --- a/package/opkg/patches/009-remove-upgrade-all.patch +++ b/package/opkg/patches/009-remove-upgrade-all.patch @@ -1,6 +1,6 @@ --- a/libopkg/opkg_cmd.c +++ b/libopkg/opkg_cmd.c -@@ -498,17 +498,6 @@ +@@ -498,17 +498,6 @@ opkg_upgrade_cmd(int argc, char **argv) opkg_install_by_name(arg); } } @@ -18,7 +18,7 @@ } opkg_configure_packages(NULL); -@@ -1166,7 +1155,7 @@ +@@ -1166,7 +1155,7 @@ opkg_print_architecture_cmd(int argc, ch array for easier maintenance */ static opkg_cmd_t cmds[] = { {"update", 0, (opkg_cmd_fun_t)opkg_update_cmd, PFM_DESCRIPTION|PFM_SOURCE}, @@ -27,3 +27,14 @@ {"list", 0, (opkg_cmd_fun_t)opkg_list_cmd, PFM_SOURCE}, {"list_installed", 0, (opkg_cmd_fun_t)opkg_list_installed_cmd, PFM_SOURCE}, {"list-installed", 0, (opkg_cmd_fun_t)opkg_list_installed_cmd, PFM_SOURCE}, +--- a/src/opkg-cl.c ++++ b/src/opkg-cl.c +@@ -187,7 +187,7 @@ usage() + + printf("\nPackage Manipulation:\n"); + printf("\tupdate Update list of available packages\n"); +- printf("\tupgrade Upgrade installed packages\n"); ++ printf("\tupgrade Upgrade package(s)\n"); + printf("\tinstall Install package(s)\n"); + printf("\tconfigure Configure unpacked package(s)\n"); + printf("\tremove Remove package(s)\n"); diff --git a/package/opkg/patches/010-remove-flag.patch b/package/opkg/patches/010-remove-flag.patch index 277546fed..c242bea31 100644 --- a/package/opkg/patches/010-remove-flag.patch +++ b/package/opkg/patches/010-remove-flag.patch @@ -1,6 +1,6 @@ --- a/libopkg/opkg_cmd.c +++ b/libopkg/opkg_cmd.c -@@ -738,49 +738,6 @@ +@@ -738,49 +738,6 @@ opkg_remove_cmd(int argc, char **argv) } static int @@ -50,7 +50,7 @@ opkg_files_cmd(int argc, char **argv) { pkg_t *pkg; -@@ -1162,7 +1119,6 @@ +@@ -1162,7 +1119,6 @@ static opkg_cmd_t cmds[] = { {"list_upgradable", 0, (opkg_cmd_fun_t)opkg_list_upgradable_cmd, PFM_SOURCE}, {"list-upgradable", 0, (opkg_cmd_fun_t)opkg_list_upgradable_cmd, PFM_SOURCE}, {"info", 0, (opkg_cmd_fun_t)opkg_info_cmd, 0}, diff --git a/package/opkg/patches/011-old-config-location.patch b/package/opkg/patches/011-old-config-location.patch index 74a98ef4a..931f4f116 100644 --- a/package/opkg/patches/011-old-config-location.patch +++ b/package/opkg/patches/011-old-config-location.patch @@ -1,6 +1,6 @@ --- a/src/opkg-cl.c +++ b/src/opkg-cl.c -@@ -172,7 +172,10 @@ +@@ -172,7 +172,10 @@ args_parse(int argc, char *argv[]) printf("Confusion: getopt_long returned %d\n", c); } } diff --git a/package/pcmcia-cs/patches/001-config-novatel_merlin_u630.patch b/package/pcmcia-cs/patches/001-config-novatel_merlin_u630.patch index c9dca5b72..0d1b13339 100644 --- a/package/pcmcia-cs/patches/001-config-novatel_merlin_u630.patch +++ b/package/pcmcia-cs/patches/001-config-novatel_merlin_u630.patch @@ -1,8 +1,6 @@ -Index: pcmcia-cs-3.2.8/etc/config -=================================================================== ---- pcmcia-cs-3.2.8.orig/etc/config 2007-06-04 13:23:59.533683400 +0200 -+++ pcmcia-cs-3.2.8/etc/config 2007-06-04 13:23:59.600673216 +0200 -@@ -2413,6 +2413,10 @@ +--- a/etc/config ++++ b/etc/config +@@ -2413,6 +2413,10 @@ card "Xircom RBM56G Modem" pci 0x115d, 0x0101 bind "serial_cb" diff --git a/package/pcmcia-cs/patches/002-serial-cardctl_path.patch b/package/pcmcia-cs/patches/002-serial-cardctl_path.patch index 8eaf02a60..ec8603224 100644 --- a/package/pcmcia-cs/patches/002-serial-cardctl_path.patch +++ b/package/pcmcia-cs/patches/002-serial-cardctl_path.patch @@ -1,8 +1,6 @@ -Index: pcmcia-cs-3.2.8/etc/shared -=================================================================== ---- pcmcia-cs-3.2.8.orig/etc/shared 2007-06-04 13:23:59.512686592 +0200 -+++ pcmcia-cs-3.2.8/etc/shared 2007-06-04 13:24:00.335561496 +0200 -@@ -167,7 +167,7 @@ +--- a/etc/shared ++++ b/etc/shared +@@ -167,7 +167,7 @@ get_info () STAB=/var/run/stab fi grep_stab $1 < $STAB || usage diff --git a/package/pcmcia-cs/patches/003-cardmgr_c.patch b/package/pcmcia-cs/patches/003-cardmgr_c.patch index c5c100c62..716a0b26b 100644 --- a/package/pcmcia-cs/patches/003-cardmgr_c.patch +++ b/package/pcmcia-cs/patches/003-cardmgr_c.patch @@ -1,8 +1,6 @@ -Index: pcmcia-cs-3.2.8/cardmgr/cardmgr.c -=================================================================== ---- pcmcia-cs-3.2.8.orig/cardmgr/cardmgr.c 2007-06-04 13:23:59.491689784 +0200 -+++ pcmcia-cs-3.2.8/cardmgr/cardmgr.c 2007-06-04 13:24:00.561527144 +0200 -@@ -739,10 +739,7 @@ +--- a/cardmgr/cardmgr.c ++++ b/cardmgr/cardmgr.c +@@ -739,10 +739,7 @@ static int try_insmod(char *mod, char *o int ret; strcpy(cmd, "insmod "); @@ -14,7 +12,7 @@ Index: pcmcia-cs-3.2.8/cardmgr/cardmgr.c if (access(cmd+7, R_OK) != 0) { syslog(LOG_NOTICE, "module %s not available", cmd+7); free(cmd); -@@ -808,11 +805,13 @@ +@@ -808,11 +805,13 @@ static void install_module(char *mod, ch } if (do_modprobe) { @@ -30,7 +28,7 @@ Index: pcmcia-cs-3.2.8/cardmgr/cardmgr.c } } -@@ -1113,8 +1112,9 @@ +@@ -1113,8 +1112,9 @@ static void do_remove(int sn) /* remove kernel modules in inverse order */ for (i = 0; i < card->bindings; i++) { diff --git a/package/pcmcia-cs/patches/004-pcmcia_resources.patch b/package/pcmcia-cs/patches/004-pcmcia_resources.patch index ce8653746..4ce0de20b 100644 --- a/package/pcmcia-cs/patches/004-pcmcia_resources.patch +++ b/package/pcmcia-cs/patches/004-pcmcia_resources.patch @@ -1,7 +1,5 @@ -Index: pcmcia-cs-3.2.8/etc/config.opts -=================================================================== ---- pcmcia-cs-3.2.8.orig/etc/config.opts 2007-06-04 13:23:59.471692824 +0200 -+++ pcmcia-cs-3.2.8/etc/config.opts 2007-06-04 13:24:00.759497048 +0200 +--- a/etc/config.opts ++++ b/etc/config.opts @@ -17,14 +17,13 @@ # diff --git a/package/ppp/Makefile b/package/ppp/Makefile index b90fa4f2e..f8bfa48b6 100644 --- a/package/ppp/Makefile +++ b/package/ppp/Makefile @@ -6,6 +6,7 @@ # include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk PKG_NAME:=ppp PKG_VERSION:=2.4.4 @@ -20,7 +21,6 @@ PKG_BUILD_DEPENDS:=libpcap PKG_INSTALL:=1 include $(INCLUDE_DIR)/package.mk -include $(INCLUDE_DIR)/kernel.mk define Package/ppp/Default SECTION:=net @@ -108,6 +108,11 @@ $(call Build/Configure/Default,, \ UNAME_R="$(LINUX_VERSION)" \ UNAME_M="$(ARCH)" \ ) + mkdir -p $(PKG_BUILD_DIR)/pppd/plugins/pppoatm/linux + cp \ + $(LINUX_DIR)/include/linux/compiler.h \ + $(LINUX_DIR)/include/linux/atm*.h \ + $(PKG_BUILD_DIR)/pppd/plugins/pppoatm/linux/ endef MAKE_FLAGS += COPTS="$(TARGET_CFLAGS)" \ diff --git a/package/px5g/Makefile b/package/px5g/Makefile new file mode 100644 index 000000000..638f8c0c4 --- /dev/null +++ b/package/px5g/Makefile @@ -0,0 +1,39 @@ +# +# Copyright (C) 2010 Jo-Philipp Wich +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk + +PKG_NAME:=px5g +PKG_RELEASE:=1 + +PKG_BUILD_DIR := $(BUILD_DIR)/$(PKG_NAME) + +include $(INCLUDE_DIR)/package.mk + +define Package/px5g + SECTION:=utils + CATEGORY:=Utilities + TITLE:=Standalone X.509 certificate generator +endef + +define Package/px5g/description + Px5g is a tiny standalone X.509 certificate generator. + It suitable to create key files and certificates in DER + and PEM format for use with stunnel, uhttpd and others. +endef + +define Build/Prepare + mkdir -p $(PKG_BUILD_DIR) + $(CP) ./src/* $(PKG_BUILD_DIR)/ +endef + +define Package/px5g/install + $(INSTALL_DIR) $(1)/usr/sbin + $(INSTALL_BIN) $(PKG_BUILD_DIR)/px5g $(1)/usr/sbin/px5g +endef + +$(eval $(call BuildPackage,px5g)) diff --git a/package/px5g/src/Makefile b/package/px5g/src/Makefile new file mode 100644 index 000000000..2bd95739c --- /dev/null +++ b/package/px5g/src/Makefile @@ -0,0 +1,14 @@ +CFLAGS?=-O2 +CFLAGS+= +SFLAGS:=--std=gnu99 +WFLAGS:=-Wall -Werror -pedantic +LDFLAGS?= +BINARY:=px5g + +all: $(BINARY) + +$(BINARY): *.c library/*.c + $(CC) -I. $(CFLAGS) $(SFLAGS) $(WFLAGS) $(LDFLAGS) -o $@ $+ + +clean: + rm -f $(BINARY) diff --git a/package/px5g/src/library/base64.c b/package/px5g/src/library/base64.c new file mode 100644 index 000000000..b7cc5b84e --- /dev/null +++ b/package/px5g/src/library/base64.c @@ -0,0 +1,264 @@ +/* + * RFC 1521 base64 encoding/decoding + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "polarssl/config.h" + +#if defined(POLARSSL_BASE64_C) + +#include "polarssl/base64.h" + +static const unsigned char base64_enc_map[64] = +{ + 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', 'J', + 'K', 'L', 'M', 'N', 'O', 'P', 'Q', 'R', 'S', 'T', + 'U', 'V', 'W', 'X', 'Y', 'Z', 'a', 'b', 'c', 'd', + 'e', 'f', 'g', 'h', 'i', 'j', 'k', 'l', 'm', 'n', + 'o', 'p', 'q', 'r', 's', 't', 'u', 'v', 'w', 'x', + 'y', 'z', '0', '1', '2', '3', '4', '5', '6', '7', + '8', '9', '+', '/' +}; + +static const unsigned char base64_dec_map[128] = +{ + 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, + 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, + 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, + 127, 127, 127, 127, 127, 127, 127, 127, 127, 127, + 127, 127, 127, 62, 127, 127, 127, 63, 52, 53, + 54, 55, 56, 57, 58, 59, 60, 61, 127, 127, + 127, 64, 127, 127, 127, 0, 1, 2, 3, 4, + 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, + 25, 127, 127, 127, 127, 127, 127, 26, 27, 28, + 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, + 39, 40, 41, 42, 43, 44, 45, 46, 47, 48, + 49, 50, 51, 127, 127, 127, 127, 127 +}; + +/* + * Encode a buffer into base64 format + */ +int base64_encode( unsigned char *dst, int *dlen, + unsigned char *src, int slen ) +{ + int i, n; + int C1, C2, C3; + unsigned char *p; + + if( slen == 0 ) + return( 0 ); + + n = (slen << 3) / 6; + + switch( (slen << 3) - (n * 6) ) + { + case 2: n += 3; break; + case 4: n += 2; break; + default: break; + } + + if( *dlen < n + 1 ) + { + *dlen = n + 1; + return( POLARSSL_ERR_BASE64_BUFFER_TOO_SMALL ); + } + + n = (slen / 3) * 3; + + for( i = 0, p = dst; i < n; i += 3 ) + { + C1 = *src++; + C2 = *src++; + C3 = *src++; + + *p++ = base64_enc_map[(C1 >> 2) & 0x3F]; + *p++ = base64_enc_map[(((C1 & 3) << 4) + (C2 >> 4)) & 0x3F]; + *p++ = base64_enc_map[(((C2 & 15) << 2) + (C3 >> 6)) & 0x3F]; + *p++ = base64_enc_map[C3 & 0x3F]; + } + + if( i < slen ) + { + C1 = *src++; + C2 = ((i + 1) < slen) ? *src++ : 0; + + *p++ = base64_enc_map[(C1 >> 2) & 0x3F]; + *p++ = base64_enc_map[(((C1 & 3) << 4) + (C2 >> 4)) & 0x3F]; + + if( (i + 1) < slen ) + *p++ = base64_enc_map[((C2 & 15) << 2) & 0x3F]; + else *p++ = '='; + + *p++ = '='; + } + + *dlen = p - dst; + *p = 0; + + return( 0 ); +} + +/* + * Decode a base64-formatted buffer + */ +int base64_decode( unsigned char *dst, int *dlen, + unsigned char *src, int slen ) +{ + int i, j, n; + unsigned long x; + unsigned char *p; + + for( i = j = n = 0; i < slen; i++ ) + { + if( ( slen - i ) >= 2 && + src[i] == '\r' && src[i + 1] == '\n' ) + continue; + + if( src[i] == '\n' ) + continue; + + if( src[i] == '=' && ++j > 2 ) + return( POLARSSL_ERR_BASE64_INVALID_CHARACTER ); + + if( src[i] > 127 || base64_dec_map[src[i]] == 127 ) + return( POLARSSL_ERR_BASE64_INVALID_CHARACTER ); + + if( base64_dec_map[src[i]] < 64 && j != 0 ) + return( POLARSSL_ERR_BASE64_INVALID_CHARACTER ); + + n++; + } + + if( n == 0 ) + return( 0 ); + + n = ((n * 6) + 7) >> 3; + + if( *dlen < n ) + { + *dlen = n; + return( POLARSSL_ERR_BASE64_BUFFER_TOO_SMALL ); + } + + for( j = 3, n = x = 0, p = dst; i > 0; i--, src++ ) + { + if( *src == '\r' || *src == '\n' ) + continue; + + j -= ( base64_dec_map[*src] == 64 ); + x = (x << 6) | ( base64_dec_map[*src] & 0x3F ); + + if( ++n == 4 ) + { + n = 0; + if( j > 0 ) *p++ = (unsigned char)( x >> 16 ); + if( j > 1 ) *p++ = (unsigned char)( x >> 8 ); + if( j > 2 ) *p++ = (unsigned char)( x ); + } + } + + *dlen = p - dst; + + return( 0 ); +} + +#if defined(POLARSSL_SELF_TEST) + +#include +#include + +static const unsigned char base64_test_dec[64] = +{ + 0x24, 0x48, 0x6E, 0x56, 0x87, 0x62, 0x5A, 0xBD, + 0xBF, 0x17, 0xD9, 0xA2, 0xC4, 0x17, 0x1A, 0x01, + 0x94, 0xED, 0x8F, 0x1E, 0x11, 0xB3, 0xD7, 0x09, + 0x0C, 0xB6, 0xE9, 0x10, 0x6F, 0x22, 0xEE, 0x13, + 0xCA, 0xB3, 0x07, 0x05, 0x76, 0xC9, 0xFA, 0x31, + 0x6C, 0x08, 0x34, 0xFF, 0x8D, 0xC2, 0x6C, 0x38, + 0x00, 0x43, 0xE9, 0x54, 0x97, 0xAF, 0x50, 0x4B, + 0xD1, 0x41, 0xBA, 0x95, 0x31, 0x5A, 0x0B, 0x97 +}; + +static const unsigned char base64_test_enc[] = + "JEhuVodiWr2/F9mixBcaAZTtjx4Rs9cJDLbpEG8i7hPK" + "swcFdsn6MWwINP+Nwmw4AEPpVJevUEvRQbqVMVoLlw=="; + +/* + * Checkup routine + */ +int base64_self_test( int verbose ) +{ + int len; + unsigned char *src, buffer[128]; + + if( verbose != 0 ) + printf( " Base64 encoding test: " ); + + len = sizeof( buffer ); + src = (unsigned char *) base64_test_dec; + + if( base64_encode( buffer, &len, src, 64 ) != 0 || + memcmp( base64_test_enc, buffer, 88 ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + printf( "passed\n Base64 decoding test: " ); + + len = sizeof( buffer ); + src = (unsigned char *) base64_test_enc; + + if( base64_decode( buffer, &len, src, 88 ) != 0 || + memcmp( base64_test_dec, buffer, 64 ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + printf( "passed\n\n" ); + + return( 0 ); +} + +#endif + +#endif diff --git a/package/px5g/src/library/bignum.c b/package/px5g/src/library/bignum.c new file mode 100644 index 000000000..8b7c12ff0 --- /dev/null +++ b/package/px5g/src/library/bignum.c @@ -0,0 +1,2010 @@ +/* + * Multi-precision integer library + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* + * This MPI implementation is based on: + * + * http://www.cacr.math.uwaterloo.ca/hac/about/chap14.pdf + * http://www.stillhq.com/extracted/gnupg-api/mpi/ + * http://math.libtomcrypt.com/files/tommath.pdf + */ + +#include "polarssl/config.h" + +#if defined(POLARSSL_BIGNUM_C) + +#include "polarssl/bignum.h" +#include "polarssl/bn_mul.h" + +#include +#include +#include + +#define ciL ((int) sizeof(t_int)) /* chars in limb */ +#define biL (ciL << 3) /* bits in limb */ +#define biH (ciL << 2) /* half limb size */ + +/* + * Convert between bits/chars and number of limbs + */ +#define BITS_TO_LIMBS(i) (((i) + biL - 1) / biL) +#define CHARS_TO_LIMBS(i) (((i) + ciL - 1) / ciL) + +/* + * Initialize one or more mpi + */ +void mpi_init( mpi *X, ... ) +{ + va_list args; + + va_start( args, X ); + + while( X != NULL ) + { + X->s = 1; + X->n = 0; + X->p = NULL; + + X = va_arg( args, mpi* ); + } + + va_end( args ); +} + +/* + * Unallocate one or more mpi + */ +void mpi_free( mpi *X, ... ) +{ + va_list args; + + va_start( args, X ); + + while( X != NULL ) + { + if( X->p != NULL ) + { + memset( X->p, 0, X->n * ciL ); + free( X->p ); + } + + X->s = 1; + X->n = 0; + X->p = NULL; + + X = va_arg( args, mpi* ); + } + + va_end( args ); +} + +/* + * Enlarge to the specified number of limbs + */ +int mpi_grow( mpi *X, int nblimbs ) +{ + t_int *p; + + if( X->n < nblimbs ) + { + if( ( p = (t_int *) malloc( nblimbs * ciL ) ) == NULL ) + return( 1 ); + + memset( p, 0, nblimbs * ciL ); + + if( X->p != NULL ) + { + memcpy( p, X->p, X->n * ciL ); + memset( X->p, 0, X->n * ciL ); + free( X->p ); + } + + X->n = nblimbs; + X->p = p; + } + + return( 0 ); +} + +/* + * Copy the contents of Y into X + */ +int mpi_copy( mpi *X, mpi *Y ) +{ + int ret, i; + + if( X == Y ) + return( 0 ); + + for( i = Y->n - 1; i > 0; i-- ) + if( Y->p[i] != 0 ) + break; + i++; + + X->s = Y->s; + + MPI_CHK( mpi_grow( X, i ) ); + + memset( X->p, 0, X->n * ciL ); + memcpy( X->p, Y->p, i * ciL ); + +cleanup: + + return( ret ); +} + +/* + * Swap the contents of X and Y + */ +void mpi_swap( mpi *X, mpi *Y ) +{ + mpi T; + + memcpy( &T, X, sizeof( mpi ) ); + memcpy( X, Y, sizeof( mpi ) ); + memcpy( Y, &T, sizeof( mpi ) ); +} + +/* + * Set value from integer + */ +int mpi_lset( mpi *X, int z ) +{ + int ret; + + MPI_CHK( mpi_grow( X, 1 ) ); + memset( X->p, 0, X->n * ciL ); + + X->p[0] = ( z < 0 ) ? -z : z; + X->s = ( z < 0 ) ? -1 : 1; + +cleanup: + + return( ret ); +} + +/* + * Return the number of least significant bits + */ +int mpi_lsb( mpi *X ) +{ + int i, j, count = 0; + + for( i = 0; i < X->n; i++ ) + for( j = 0; j < (int) biL; j++, count++ ) + if( ( ( X->p[i] >> j ) & 1 ) != 0 ) + return( count ); + + return( 0 ); +} + +/* + * Return the number of most significant bits + */ +int mpi_msb( mpi *X ) +{ + int i, j; + + for( i = X->n - 1; i > 0; i-- ) + if( X->p[i] != 0 ) + break; + + for( j = biL - 1; j >= 0; j-- ) + if( ( ( X->p[i] >> j ) & 1 ) != 0 ) + break; + + return( ( i * biL ) + j + 1 ); +} + +/* + * Return the total size in bytes + */ +int mpi_size( mpi *X ) +{ + return( ( mpi_msb( X ) + 7 ) >> 3 ); +} + +/* + * Convert an ASCII character to digit value + */ +static int mpi_get_digit( t_int *d, int radix, char c ) +{ + *d = 255; + + if( c >= 0x30 && c <= 0x39 ) *d = c - 0x30; + if( c >= 0x41 && c <= 0x46 ) *d = c - 0x37; + if( c >= 0x61 && c <= 0x66 ) *d = c - 0x57; + + if( *d >= (t_int) radix ) + return( POLARSSL_ERR_MPI_INVALID_CHARACTER ); + + return( 0 ); +} + +/* + * Import from an ASCII string + */ +int mpi_read_string( mpi *X, int radix, char *s ) +{ + int ret, i, j, n; + t_int d; + mpi T; + + if( radix < 2 || radix > 16 ) + return( POLARSSL_ERR_MPI_BAD_INPUT_DATA ); + + mpi_init( &T, NULL ); + + if( radix == 16 ) + { + n = BITS_TO_LIMBS( strlen( s ) << 2 ); + + MPI_CHK( mpi_grow( X, n ) ); + MPI_CHK( mpi_lset( X, 0 ) ); + + for( i = strlen( s ) - 1, j = 0; i >= 0; i--, j++ ) + { + if( i == 0 && s[i] == '-' ) + { + X->s = -1; + break; + } + + MPI_CHK( mpi_get_digit( &d, radix, s[i] ) ); + X->p[j / (2 * ciL)] |= d << ( (j % (2 * ciL)) << 2 ); + } + } + else + { + MPI_CHK( mpi_lset( X, 0 ) ); + + for( i = 0; i < (int) strlen( s ); i++ ) + { + if( i == 0 && s[i] == '-' ) + { + X->s = -1; + continue; + } + + MPI_CHK( mpi_get_digit( &d, radix, s[i] ) ); + MPI_CHK( mpi_mul_int( &T, X, radix ) ); + MPI_CHK( mpi_add_int( X, &T, d ) ); + } + } + +cleanup: + + mpi_free( &T, NULL ); + + return( ret ); +} + +/* + * Helper to write the digits high-order first + */ +static int mpi_write_hlp( mpi *X, int radix, char **p ) +{ + int ret; + t_int r; + + if( radix < 2 || radix > 16 ) + return( POLARSSL_ERR_MPI_BAD_INPUT_DATA ); + + MPI_CHK( mpi_mod_int( &r, X, radix ) ); + MPI_CHK( mpi_div_int( X, NULL, X, radix ) ); + + if( mpi_cmp_int( X, 0 ) != 0 ) + MPI_CHK( mpi_write_hlp( X, radix, p ) ); + + if( r < 10 ) + *(*p)++ = (char)( r + 0x30 ); + else + *(*p)++ = (char)( r + 0x37 ); + +cleanup: + + return( ret ); +} + +/* + * Export into an ASCII string + */ +int mpi_write_string( mpi *X, int radix, char *s, int *slen ) +{ + int ret = 0, n; + char *p; + mpi T; + + if( radix < 2 || radix > 16 ) + return( POLARSSL_ERR_MPI_BAD_INPUT_DATA ); + + n = mpi_msb( X ); + if( radix >= 4 ) n >>= 1; + if( radix >= 16 ) n >>= 1; + n += 3; + + if( *slen < n ) + { + *slen = n; + return( POLARSSL_ERR_MPI_BUFFER_TOO_SMALL ); + } + + p = s; + mpi_init( &T, NULL ); + + if( X->s == -1 ) + *p++ = '-'; + + if( radix == 16 ) + { + int c, i, j, k; + + for( i = X->n - 1, k = 0; i >= 0; i-- ) + { + for( j = ciL - 1; j >= 0; j-- ) + { + c = ( X->p[i] >> (j << 3) ) & 0xFF; + + if( c == 0 && k == 0 && (i + j) != 0 ) + continue; + + p += sprintf( p, "%02X", c ); + k = 1; + } + } + } + else + { + MPI_CHK( mpi_copy( &T, X ) ); + MPI_CHK( mpi_write_hlp( &T, radix, &p ) ); + } + + *p++ = '\0'; + *slen = p - s; + +cleanup: + + mpi_free( &T, NULL ); + + return( ret ); +} + +/* + * Read X from an opened file + */ +int mpi_read_file( mpi *X, int radix, FILE *fin ) +{ + t_int d; + int slen; + char *p; + char s[1024]; + + memset( s, 0, sizeof( s ) ); + if( fgets( s, sizeof( s ) - 1, fin ) == NULL ) + return( POLARSSL_ERR_MPI_FILE_IO_ERROR ); + + slen = strlen( s ); + if( s[slen - 1] == '\n' ) { slen--; s[slen] = '\0'; } + if( s[slen - 1] == '\r' ) { slen--; s[slen] = '\0'; } + + p = s + slen; + while( --p >= s ) + if( mpi_get_digit( &d, radix, *p ) != 0 ) + break; + + return( mpi_read_string( X, radix, p + 1 ) ); +} + +/* + * Write X into an opened file (or stdout if fout == NULL) + */ +int mpi_write_file( char *p, mpi *X, int radix, FILE *fout ) +{ + int n, ret; + size_t slen; + size_t plen; + char s[1024]; + + n = sizeof( s ); + memset( s, 0, n ); + n -= 2; + + MPI_CHK( mpi_write_string( X, radix, s, (int *) &n ) ); + + if( p == NULL ) p = ""; + + plen = strlen( p ); + slen = strlen( s ); + s[slen++] = '\r'; + s[slen++] = '\n'; + + if( fout != NULL ) + { + if( fwrite( p, 1, plen, fout ) != plen || + fwrite( s, 1, slen, fout ) != slen ) + return( POLARSSL_ERR_MPI_FILE_IO_ERROR ); + } + else + printf( "%s%s", p, s ); + +cleanup: + + return( ret ); +} + +/* + * Import X from unsigned binary data, big endian + */ +int mpi_read_binary( mpi *X, unsigned char *buf, int buflen ) +{ + int ret, i, j, n; + + for( n = 0; n < buflen; n++ ) + if( buf[n] != 0 ) + break; + + MPI_CHK( mpi_grow( X, CHARS_TO_LIMBS( buflen - n ) ) ); + MPI_CHK( mpi_lset( X, 0 ) ); + + for( i = buflen - 1, j = 0; i >= n; i--, j++ ) + X->p[j / ciL] |= ((t_int) buf[i]) << ((j % ciL) << 3); + +cleanup: + + return( ret ); +} + +/* + * Export X into unsigned binary data, big endian + */ +int mpi_write_binary( mpi *X, unsigned char *buf, int buflen ) +{ + int i, j, n; + + n = mpi_size( X ); + + if( buflen < n ) + return( POLARSSL_ERR_MPI_BUFFER_TOO_SMALL ); + + memset( buf, 0, buflen ); + + for( i = buflen - 1, j = 0; n > 0; i--, j++, n-- ) + buf[i] = (unsigned char)( X->p[j / ciL] >> ((j % ciL) << 3) ); + + return( 0 ); +} + +/* + * Left-shift: X <<= count + */ +int mpi_shift_l( mpi *X, int count ) +{ + int ret, i, v0, t1; + t_int r0 = 0, r1; + + v0 = count / (biL ); + t1 = count & (biL - 1); + + i = mpi_msb( X ) + count; + + if( X->n * (int) biL < i ) + MPI_CHK( mpi_grow( X, BITS_TO_LIMBS( i ) ) ); + + ret = 0; + + /* + * shift by count / limb_size + */ + if( v0 > 0 ) + { + for( i = X->n - 1; i >= v0; i-- ) + X->p[i] = X->p[i - v0]; + + for( ; i >= 0; i-- ) + X->p[i] = 0; + } + + /* + * shift by count % limb_size + */ + if( t1 > 0 ) + { + for( i = v0; i < X->n; i++ ) + { + r1 = X->p[i] >> (biL - t1); + X->p[i] <<= t1; + X->p[i] |= r0; + r0 = r1; + } + } + +cleanup: + + return( ret ); +} + +/* + * Right-shift: X >>= count + */ +int mpi_shift_r( mpi *X, int count ) +{ + int i, v0, v1; + t_int r0 = 0, r1; + + v0 = count / biL; + v1 = count & (biL - 1); + + /* + * shift by count / limb_size + */ + if( v0 > 0 ) + { + for( i = 0; i < X->n - v0; i++ ) + X->p[i] = X->p[i + v0]; + + for( ; i < X->n; i++ ) + X->p[i] = 0; + } + + /* + * shift by count % limb_size + */ + if( v1 > 0 ) + { + for( i = X->n - 1; i >= 0; i-- ) + { + r1 = X->p[i] << (biL - v1); + X->p[i] >>= v1; + X->p[i] |= r0; + r0 = r1; + } + } + + return( 0 ); +} + +/* + * Compare unsigned values + */ +int mpi_cmp_abs( mpi *X, mpi *Y ) +{ + int i, j; + + for( i = X->n - 1; i >= 0; i-- ) + if( X->p[i] != 0 ) + break; + + for( j = Y->n - 1; j >= 0; j-- ) + if( Y->p[j] != 0 ) + break; + + if( i < 0 && j < 0 ) + return( 0 ); + + if( i > j ) return( 1 ); + if( j > i ) return( -1 ); + + for( ; i >= 0; i-- ) + { + if( X->p[i] > Y->p[i] ) return( 1 ); + if( X->p[i] < Y->p[i] ) return( -1 ); + } + + return( 0 ); +} + +/* + * Compare signed values + */ +int mpi_cmp_mpi( mpi *X, mpi *Y ) +{ + int i, j; + + for( i = X->n - 1; i >= 0; i-- ) + if( X->p[i] != 0 ) + break; + + for( j = Y->n - 1; j >= 0; j-- ) + if( Y->p[j] != 0 ) + break; + + if( i < 0 && j < 0 ) + return( 0 ); + + if( i > j ) return( X->s ); + if( j > i ) return( -X->s ); + + if( X->s > 0 && Y->s < 0 ) return( 1 ); + if( Y->s > 0 && X->s < 0 ) return( -1 ); + + for( ; i >= 0; i-- ) + { + if( X->p[i] > Y->p[i] ) return( X->s ); + if( X->p[i] < Y->p[i] ) return( -X->s ); + } + + return( 0 ); +} + +/* + * Compare signed values + */ +int mpi_cmp_int( mpi *X, int z ) +{ + mpi Y; + t_int p[1]; + + *p = ( z < 0 ) ? -z : z; + Y.s = ( z < 0 ) ? -1 : 1; + Y.n = 1; + Y.p = p; + + return( mpi_cmp_mpi( X, &Y ) ); +} + +/* + * Unsigned addition: X = |A| + |B| (HAC 14.7) + */ +int mpi_add_abs( mpi *X, mpi *A, mpi *B ) +{ + int ret, i, j; + t_int *o, *p, c; + + if( X == B ) + { + mpi *T = A; A = X; B = T; + } + + if( X != A ) + MPI_CHK( mpi_copy( X, A ) ); + + for( j = B->n - 1; j >= 0; j-- ) + if( B->p[j] != 0 ) + break; + + MPI_CHK( mpi_grow( X, j + 1 ) ); + + o = B->p; p = X->p; c = 0; + + for( i = 0; i <= j; i++, o++, p++ ) + { + *p += c; c = ( *p < c ); + *p += *o; c += ( *p < *o ); + } + + while( c != 0 ) + { + if( i >= X->n ) + { + MPI_CHK( mpi_grow( X, i + 1 ) ); + p = X->p + i; + } + + *p += c; c = ( *p < c ); i++; + } + +cleanup: + + return( ret ); +} + +/* + * Helper for mpi substraction + */ +static void mpi_sub_hlp( int n, t_int *s, t_int *d ) +{ + int i; + t_int c, z; + + for( i = c = 0; i < n; i++, s++, d++ ) + { + z = ( *d < c ); *d -= c; + c = ( *d < *s ) + z; *d -= *s; + } + + while( c != 0 ) + { + z = ( *d < c ); *d -= c; + c = z; i++; d++; + } +} + +/* + * Unsigned substraction: X = |A| - |B| (HAC 14.9) + */ +int mpi_sub_abs( mpi *X, mpi *A, mpi *B ) +{ + mpi TB; + int ret, n; + + if( mpi_cmp_abs( A, B ) < 0 ) + return( POLARSSL_ERR_MPI_NEGATIVE_VALUE ); + + mpi_init( &TB, NULL ); + + if( X == B ) + { + MPI_CHK( mpi_copy( &TB, B ) ); + B = &TB; + } + + if( X != A ) + MPI_CHK( mpi_copy( X, A ) ); + + ret = 0; + + for( n = B->n - 1; n >= 0; n-- ) + if( B->p[n] != 0 ) + break; + + mpi_sub_hlp( n + 1, B->p, X->p ); + +cleanup: + + mpi_free( &TB, NULL ); + + return( ret ); +} + +/* + * Signed addition: X = A + B + */ +int mpi_add_mpi( mpi *X, mpi *A, mpi *B ) +{ + int ret, s = A->s; + + if( A->s * B->s < 0 ) + { + if( mpi_cmp_abs( A, B ) >= 0 ) + { + MPI_CHK( mpi_sub_abs( X, A, B ) ); + X->s = s; + } + else + { + MPI_CHK( mpi_sub_abs( X, B, A ) ); + X->s = -s; + } + } + else + { + MPI_CHK( mpi_add_abs( X, A, B ) ); + X->s = s; + } + +cleanup: + + return( ret ); +} + +/* + * Signed substraction: X = A - B + */ +int mpi_sub_mpi( mpi *X, mpi *A, mpi *B ) +{ + int ret, s = A->s; + + if( A->s * B->s > 0 ) + { + if( mpi_cmp_abs( A, B ) >= 0 ) + { + MPI_CHK( mpi_sub_abs( X, A, B ) ); + X->s = s; + } + else + { + MPI_CHK( mpi_sub_abs( X, B, A ) ); + X->s = -s; + } + } + else + { + MPI_CHK( mpi_add_abs( X, A, B ) ); + X->s = s; + } + +cleanup: + + return( ret ); +} + +/* + * Signed addition: X = A + b + */ +int mpi_add_int( mpi *X, mpi *A, int b ) +{ + mpi _B; + t_int p[1]; + + p[0] = ( b < 0 ) ? -b : b; + _B.s = ( b < 0 ) ? -1 : 1; + _B.n = 1; + _B.p = p; + + return( mpi_add_mpi( X, A, &_B ) ); +} + +/* + * Signed substraction: X = A - b + */ +int mpi_sub_int( mpi *X, mpi *A, int b ) +{ + mpi _B; + t_int p[1]; + + p[0] = ( b < 0 ) ? -b : b; + _B.s = ( b < 0 ) ? -1 : 1; + _B.n = 1; + _B.p = p; + + return( mpi_sub_mpi( X, A, &_B ) ); +} + +/* + * Helper for mpi multiplication + */ +static void mpi_mul_hlp( int i, t_int *s, t_int *d, t_int b ) +{ + t_int c = 0, t = 0; + +#if defined(MULADDC_HUIT) + for( ; i >= 8; i -= 8 ) + { + MULADDC_INIT + MULADDC_HUIT + MULADDC_STOP + } + + for( ; i > 0; i-- ) + { + MULADDC_INIT + MULADDC_CORE + MULADDC_STOP + } +#else + for( ; i >= 16; i -= 16 ) + { + MULADDC_INIT + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + MULADDC_STOP + } + + for( ; i >= 8; i -= 8 ) + { + MULADDC_INIT + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + + MULADDC_CORE MULADDC_CORE + MULADDC_CORE MULADDC_CORE + MULADDC_STOP + } + + for( ; i > 0; i-- ) + { + MULADDC_INIT + MULADDC_CORE + MULADDC_STOP + } +#endif + + t++; + + do { + *d += c; c = ( *d < c ); d++; + } + while( c != 0 ); +} + +/* + * Baseline multiplication: X = A * B (HAC 14.12) + */ +int mpi_mul_mpi( mpi *X, mpi *A, mpi *B ) +{ + int ret, i, j; + mpi TA, TB; + + mpi_init( &TA, &TB, NULL ); + + if( X == A ) { MPI_CHK( mpi_copy( &TA, A ) ); A = &TA; } + if( X == B ) { MPI_CHK( mpi_copy( &TB, B ) ); B = &TB; } + + for( i = A->n - 1; i >= 0; i-- ) + if( A->p[i] != 0 ) + break; + + for( j = B->n - 1; j >= 0; j-- ) + if( B->p[j] != 0 ) + break; + + MPI_CHK( mpi_grow( X, i + j + 2 ) ); + MPI_CHK( mpi_lset( X, 0 ) ); + + for( i++; j >= 0; j-- ) + mpi_mul_hlp( i, A->p, X->p + j, B->p[j] ); + + X->s = A->s * B->s; + +cleanup: + + mpi_free( &TB, &TA, NULL ); + + return( ret ); +} + +/* + * Baseline multiplication: X = A * b + */ +int mpi_mul_int( mpi *X, mpi *A, t_int b ) +{ + mpi _B; + t_int p[1]; + + _B.s = 1; + _B.n = 1; + _B.p = p; + p[0] = b; + + return( mpi_mul_mpi( X, A, &_B ) ); +} + +/* + * Division by mpi: A = Q * B + R (HAC 14.20) + */ +int mpi_div_mpi( mpi *Q, mpi *R, mpi *A, mpi *B ) +{ + int ret, i, n, t, k; + mpi X, Y, Z, T1, T2; + + if( mpi_cmp_int( B, 0 ) == 0 ) + return( POLARSSL_ERR_MPI_DIVISION_BY_ZERO ); + + mpi_init( &X, &Y, &Z, &T1, &T2, NULL ); + + if( mpi_cmp_abs( A, B ) < 0 ) + { + if( Q != NULL ) MPI_CHK( mpi_lset( Q, 0 ) ); + if( R != NULL ) MPI_CHK( mpi_copy( R, A ) ); + return( 0 ); + } + + MPI_CHK( mpi_copy( &X, A ) ); + MPI_CHK( mpi_copy( &Y, B ) ); + X.s = Y.s = 1; + + MPI_CHK( mpi_grow( &Z, A->n + 2 ) ); + MPI_CHK( mpi_lset( &Z, 0 ) ); + MPI_CHK( mpi_grow( &T1, 2 ) ); + MPI_CHK( mpi_grow( &T2, 3 ) ); + + k = mpi_msb( &Y ) % biL; + if( k < (int) biL - 1 ) + { + k = biL - 1 - k; + MPI_CHK( mpi_shift_l( &X, k ) ); + MPI_CHK( mpi_shift_l( &Y, k ) ); + } + else k = 0; + + n = X.n - 1; + t = Y.n - 1; + mpi_shift_l( &Y, biL * (n - t) ); + + while( mpi_cmp_mpi( &X, &Y ) >= 0 ) + { + Z.p[n - t]++; + mpi_sub_mpi( &X, &X, &Y ); + } + mpi_shift_r( &Y, biL * (n - t) ); + + for( i = n; i > t ; i-- ) + { + if( X.p[i] >= Y.p[t] ) + Z.p[i - t - 1] = ~0; + else + { +#if defined(POLARSSL_HAVE_LONGLONG) + t_dbl r; + + r = (t_dbl) X.p[i] << biL; + r |= (t_dbl) X.p[i - 1]; + r /= Y.p[t]; + if( r > ((t_dbl) 1 << biL) - 1) + r = ((t_dbl) 1 << biL) - 1; + + Z.p[i - t - 1] = (t_int) r; +#else + /* + * __udiv_qrnnd_c, from gmp/longlong.h + */ + t_int q0, q1, r0, r1; + t_int d0, d1, d, m; + + d = Y.p[t]; + d0 = ( d << biH ) >> biH; + d1 = ( d >> biH ); + + q1 = X.p[i] / d1; + r1 = X.p[i] - d1 * q1; + r1 <<= biH; + r1 |= ( X.p[i - 1] >> biH ); + + m = q1 * d0; + if( r1 < m ) + { + q1--, r1 += d; + while( r1 >= d && r1 < m ) + q1--, r1 += d; + } + r1 -= m; + + q0 = r1 / d1; + r0 = r1 - d1 * q0; + r0 <<= biH; + r0 |= ( X.p[i - 1] << biH ) >> biH; + + m = q0 * d0; + if( r0 < m ) + { + q0--, r0 += d; + while( r0 >= d && r0 < m ) + q0--, r0 += d; + } + r0 -= m; + + Z.p[i - t - 1] = ( q1 << biH ) | q0; +#endif + } + + Z.p[i - t - 1]++; + do + { + Z.p[i - t - 1]--; + + MPI_CHK( mpi_lset( &T1, 0 ) ); + T1.p[0] = (t < 1) ? 0 : Y.p[t - 1]; + T1.p[1] = Y.p[t]; + MPI_CHK( mpi_mul_int( &T1, &T1, Z.p[i - t - 1] ) ); + + MPI_CHK( mpi_lset( &T2, 0 ) ); + T2.p[0] = (i < 2) ? 0 : X.p[i - 2]; + T2.p[1] = (i < 1) ? 0 : X.p[i - 1]; + T2.p[2] = X.p[i]; + } + while( mpi_cmp_mpi( &T1, &T2 ) > 0 ); + + MPI_CHK( mpi_mul_int( &T1, &Y, Z.p[i - t - 1] ) ); + MPI_CHK( mpi_shift_l( &T1, biL * (i - t - 1) ) ); + MPI_CHK( mpi_sub_mpi( &X, &X, &T1 ) ); + + if( mpi_cmp_int( &X, 0 ) < 0 ) + { + MPI_CHK( mpi_copy( &T1, &Y ) ); + MPI_CHK( mpi_shift_l( &T1, biL * (i - t - 1) ) ); + MPI_CHK( mpi_add_mpi( &X, &X, &T1 ) ); + Z.p[i - t - 1]--; + } + } + + if( Q != NULL ) + { + mpi_copy( Q, &Z ); + Q->s = A->s * B->s; + } + + if( R != NULL ) + { + mpi_shift_r( &X, k ); + mpi_copy( R, &X ); + + R->s = A->s; + if( mpi_cmp_int( R, 0 ) == 0 ) + R->s = 1; + } + +cleanup: + + mpi_free( &X, &Y, &Z, &T1, &T2, NULL ); + + return( ret ); +} + +/* + * Division by int: A = Q * b + R + * + * Returns 0 if successful + * 1 if memory allocation failed + * POLARSSL_ERR_MPI_DIVISION_BY_ZERO if b == 0 + */ +int mpi_div_int( mpi *Q, mpi *R, mpi *A, int b ) +{ + mpi _B; + t_int p[1]; + + p[0] = ( b < 0 ) ? -b : b; + _B.s = ( b < 0 ) ? -1 : 1; + _B.n = 1; + _B.p = p; + + return( mpi_div_mpi( Q, R, A, &_B ) ); +} + +/* + * Modulo: R = A mod B + */ +int mpi_mod_mpi( mpi *R, mpi *A, mpi *B ) +{ + int ret; + + MPI_CHK( mpi_div_mpi( NULL, R, A, B ) ); + + while( mpi_cmp_int( R, 0 ) < 0 ) + MPI_CHK( mpi_add_mpi( R, R, B ) ); + + while( mpi_cmp_mpi( R, B ) >= 0 ) + MPI_CHK( mpi_sub_mpi( R, R, B ) ); + +cleanup: + + return( ret ); +} + +/* + * Modulo: r = A mod b + */ +int mpi_mod_int( t_int *r, mpi *A, int b ) +{ + int i; + t_int x, y, z; + + if( b == 0 ) + return( POLARSSL_ERR_MPI_DIVISION_BY_ZERO ); + + if( b < 0 ) + b = -b; + + /* + * handle trivial cases + */ + if( b == 1 ) + { + *r = 0; + return( 0 ); + } + + if( b == 2 ) + { + *r = A->p[0] & 1; + return( 0 ); + } + + /* + * general case + */ + for( i = A->n - 1, y = 0; i >= 0; i-- ) + { + x = A->p[i]; + y = ( y << biH ) | ( x >> biH ); + z = y / b; + y -= z * b; + + x <<= biH; + y = ( y << biH ) | ( x >> biH ); + z = y / b; + y -= z * b; + } + + *r = y; + + return( 0 ); +} + +/* + * Fast Montgomery initialization (thanks to Tom St Denis) + */ +static void mpi_montg_init( t_int *mm, mpi *N ) +{ + t_int x, m0 = N->p[0]; + + x = m0; + x += ( ( m0 + 2 ) & 4 ) << 1; + x *= ( 2 - ( m0 * x ) ); + + if( biL >= 16 ) x *= ( 2 - ( m0 * x ) ); + if( biL >= 32 ) x *= ( 2 - ( m0 * x ) ); + if( biL >= 64 ) x *= ( 2 - ( m0 * x ) ); + + *mm = ~x + 1; +} + +/* + * Montgomery multiplication: A = A * B * R^-1 mod N (HAC 14.36) + */ +static void mpi_montmul( mpi *A, mpi *B, mpi *N, t_int mm, mpi *T ) +{ + int i, n, m; + t_int u0, u1, *d; + + memset( T->p, 0, T->n * ciL ); + + d = T->p; + n = N->n; + m = ( B->n < n ) ? B->n : n; + + for( i = 0; i < n; i++ ) + { + /* + * T = (T + u0*B + u1*N) / 2^biL + */ + u0 = A->p[i]; + u1 = ( d[0] + u0 * B->p[0] ) * mm; + + mpi_mul_hlp( m, B->p, d, u0 ); + mpi_mul_hlp( n, N->p, d, u1 ); + + *d++ = u0; d[n + 1] = 0; + } + + memcpy( A->p, d, (n + 1) * ciL ); + + if( mpi_cmp_abs( A, N ) >= 0 ) + mpi_sub_hlp( n, N->p, A->p ); + else + /* prevent timing attacks */ + mpi_sub_hlp( n, A->p, T->p ); +} + +/* + * Montgomery reduction: A = A * R^-1 mod N + */ +static void mpi_montred( mpi *A, mpi *N, t_int mm, mpi *T ) +{ + t_int z = 1; + mpi U; + + U.n = U.s = z; + U.p = &z; + + mpi_montmul( A, &U, N, mm, T ); +} + +/* + * Sliding-window exponentiation: X = A^E mod N (HAC 14.85) + */ +int mpi_exp_mod( mpi *X, mpi *A, mpi *E, mpi *N, mpi *_RR ) +{ + int ret, i, j, wsize, wbits; + int bufsize, nblimbs, nbits; + t_int ei, mm, state; + mpi RR, T, W[64]; + + if( mpi_cmp_int( N, 0 ) < 0 || ( N->p[0] & 1 ) == 0 ) + return( POLARSSL_ERR_MPI_BAD_INPUT_DATA ); + + /* + * Init temps and window size + */ + mpi_montg_init( &mm, N ); + mpi_init( &RR, &T, NULL ); + memset( W, 0, sizeof( W ) ); + + i = mpi_msb( E ); + + wsize = ( i > 671 ) ? 6 : ( i > 239 ) ? 5 : + ( i > 79 ) ? 4 : ( i > 23 ) ? 3 : 1; + + j = N->n + 1; + MPI_CHK( mpi_grow( X, j ) ); + MPI_CHK( mpi_grow( &W[1], j ) ); + MPI_CHK( mpi_grow( &T, j * 2 ) ); + + /* + * If 1st call, pre-compute R^2 mod N + */ + if( _RR == NULL || _RR->p == NULL ) + { + MPI_CHK( mpi_lset( &RR, 1 ) ); + MPI_CHK( mpi_shift_l( &RR, N->n * 2 * biL ) ); + MPI_CHK( mpi_mod_mpi( &RR, &RR, N ) ); + + if( _RR != NULL ) + memcpy( _RR, &RR, sizeof( mpi ) ); + } + else + memcpy( &RR, _RR, sizeof( mpi ) ); + + /* + * W[1] = A * R^2 * R^-1 mod N = A * R mod N + */ + if( mpi_cmp_mpi( A, N ) >= 0 ) + mpi_mod_mpi( &W[1], A, N ); + else mpi_copy( &W[1], A ); + + mpi_montmul( &W[1], &RR, N, mm, &T ); + + /* + * X = R^2 * R^-1 mod N = R mod N + */ + MPI_CHK( mpi_copy( X, &RR ) ); + mpi_montred( X, N, mm, &T ); + + if( wsize > 1 ) + { + /* + * W[1 << (wsize - 1)] = W[1] ^ (wsize - 1) + */ + j = 1 << (wsize - 1); + + MPI_CHK( mpi_grow( &W[j], N->n + 1 ) ); + MPI_CHK( mpi_copy( &W[j], &W[1] ) ); + + for( i = 0; i < wsize - 1; i++ ) + mpi_montmul( &W[j], &W[j], N, mm, &T ); + + /* + * W[i] = W[i - 1] * W[1] + */ + for( i = j + 1; i < (1 << wsize); i++ ) + { + MPI_CHK( mpi_grow( &W[i], N->n + 1 ) ); + MPI_CHK( mpi_copy( &W[i], &W[i - 1] ) ); + + mpi_montmul( &W[i], &W[1], N, mm, &T ); + } + } + + nblimbs = E->n; + bufsize = 0; + nbits = 0; + wbits = 0; + state = 0; + + while( 1 ) + { + if( bufsize == 0 ) + { + if( nblimbs-- == 0 ) + break; + + bufsize = sizeof( t_int ) << 3; + } + + bufsize--; + + ei = (E->p[nblimbs] >> bufsize) & 1; + + /* + * skip leading 0s + */ + if( ei == 0 && state == 0 ) + continue; + + if( ei == 0 && state == 1 ) + { + /* + * out of window, square X + */ + mpi_montmul( X, X, N, mm, &T ); + continue; + } + + /* + * add ei to current window + */ + state = 2; + + nbits++; + wbits |= (ei << (wsize - nbits)); + + if( nbits == wsize ) + { + /* + * X = X^wsize R^-1 mod N + */ + for( i = 0; i < wsize; i++ ) + mpi_montmul( X, X, N, mm, &T ); + + /* + * X = X * W[wbits] R^-1 mod N + */ + mpi_montmul( X, &W[wbits], N, mm, &T ); + + state--; + nbits = 0; + wbits = 0; + } + } + + /* + * process the remaining bits + */ + for( i = 0; i < nbits; i++ ) + { + mpi_montmul( X, X, N, mm, &T ); + + wbits <<= 1; + + if( (wbits & (1 << wsize)) != 0 ) + mpi_montmul( X, &W[1], N, mm, &T ); + } + + /* + * X = A^E * R * R^-1 mod N = A^E mod N + */ + mpi_montred( X, N, mm, &T ); + +cleanup: + + for( i = (1 << (wsize - 1)); i < (1 << wsize); i++ ) + mpi_free( &W[i], NULL ); + + if( _RR != NULL ) + mpi_free( &W[1], &T, NULL ); + else mpi_free( &W[1], &T, &RR, NULL ); + + return( ret ); +} + +/* + * Greatest common divisor: G = gcd(A, B) (HAC 14.54) + */ +int mpi_gcd( mpi *G, mpi *A, mpi *B ) +{ + int ret, lz, lzt; + mpi TG, TA, TB; + + mpi_init( &TG, &TA, &TB, NULL ); + + MPI_CHK( mpi_copy( &TA, A ) ); + MPI_CHK( mpi_copy( &TB, B ) ); + + lz = mpi_lsb( &TA ); + lzt = mpi_lsb( &TB ); + + if ( lzt < lz ) + lz = lzt; + + MPI_CHK( mpi_shift_r( &TA, lz ) ); + MPI_CHK( mpi_shift_r( &TB, lz ) ); + + TA.s = TB.s = 1; + + while( mpi_cmp_int( &TA, 0 ) != 0 ) + { + MPI_CHK( mpi_shift_r( &TA, mpi_lsb( &TA ) ) ); + MPI_CHK( mpi_shift_r( &TB, mpi_lsb( &TB ) ) ); + + if( mpi_cmp_mpi( &TA, &TB ) >= 0 ) + { + MPI_CHK( mpi_sub_abs( &TA, &TA, &TB ) ); + MPI_CHK( mpi_shift_r( &TA, 1 ) ); + } + else + { + MPI_CHK( mpi_sub_abs( &TB, &TB, &TA ) ); + MPI_CHK( mpi_shift_r( &TB, 1 ) ); + } + } + + MPI_CHK( mpi_shift_l( &TB, lz ) ); + MPI_CHK( mpi_copy( G, &TB ) ); + +cleanup: + + mpi_free( &TB, &TA, &TG, NULL ); + + return( ret ); +} + +#if defined(POLARSSL_GENPRIME) + +/* + * Modular inverse: X = A^-1 mod N (HAC 14.61 / 14.64) + */ +int mpi_inv_mod( mpi *X, mpi *A, mpi *N ) +{ + int ret; + mpi G, TA, TU, U1, U2, TB, TV, V1, V2; + + if( mpi_cmp_int( N, 0 ) <= 0 ) + return( POLARSSL_ERR_MPI_BAD_INPUT_DATA ); + + mpi_init( &TA, &TU, &U1, &U2, &G, + &TB, &TV, &V1, &V2, NULL ); + + MPI_CHK( mpi_gcd( &G, A, N ) ); + + if( mpi_cmp_int( &G, 1 ) != 0 ) + { + ret = POLARSSL_ERR_MPI_NOT_ACCEPTABLE; + goto cleanup; + } + + MPI_CHK( mpi_mod_mpi( &TA, A, N ) ); + MPI_CHK( mpi_copy( &TU, &TA ) ); + MPI_CHK( mpi_copy( &TB, N ) ); + MPI_CHK( mpi_copy( &TV, N ) ); + + MPI_CHK( mpi_lset( &U1, 1 ) ); + MPI_CHK( mpi_lset( &U2, 0 ) ); + MPI_CHK( mpi_lset( &V1, 0 ) ); + MPI_CHK( mpi_lset( &V2, 1 ) ); + + do + { + while( ( TU.p[0] & 1 ) == 0 ) + { + MPI_CHK( mpi_shift_r( &TU, 1 ) ); + + if( ( U1.p[0] & 1 ) != 0 || ( U2.p[0] & 1 ) != 0 ) + { + MPI_CHK( mpi_add_mpi( &U1, &U1, &TB ) ); + MPI_CHK( mpi_sub_mpi( &U2, &U2, &TA ) ); + } + + MPI_CHK( mpi_shift_r( &U1, 1 ) ); + MPI_CHK( mpi_shift_r( &U2, 1 ) ); + } + + while( ( TV.p[0] & 1 ) == 0 ) + { + MPI_CHK( mpi_shift_r( &TV, 1 ) ); + + if( ( V1.p[0] & 1 ) != 0 || ( V2.p[0] & 1 ) != 0 ) + { + MPI_CHK( mpi_add_mpi( &V1, &V1, &TB ) ); + MPI_CHK( mpi_sub_mpi( &V2, &V2, &TA ) ); + } + + MPI_CHK( mpi_shift_r( &V1, 1 ) ); + MPI_CHK( mpi_shift_r( &V2, 1 ) ); + } + + if( mpi_cmp_mpi( &TU, &TV ) >= 0 ) + { + MPI_CHK( mpi_sub_mpi( &TU, &TU, &TV ) ); + MPI_CHK( mpi_sub_mpi( &U1, &U1, &V1 ) ); + MPI_CHK( mpi_sub_mpi( &U2, &U2, &V2 ) ); + } + else + { + MPI_CHK( mpi_sub_mpi( &TV, &TV, &TU ) ); + MPI_CHK( mpi_sub_mpi( &V1, &V1, &U1 ) ); + MPI_CHK( mpi_sub_mpi( &V2, &V2, &U2 ) ); + } + } + while( mpi_cmp_int( &TU, 0 ) != 0 ); + + while( mpi_cmp_int( &V1, 0 ) < 0 ) + MPI_CHK( mpi_add_mpi( &V1, &V1, N ) ); + + while( mpi_cmp_mpi( &V1, N ) >= 0 ) + MPI_CHK( mpi_sub_mpi( &V1, &V1, N ) ); + + MPI_CHK( mpi_copy( X, &V1 ) ); + +cleanup: + + mpi_free( &V2, &V1, &TV, &TB, &G, + &U2, &U1, &TU, &TA, NULL ); + + return( ret ); +} + +static const int small_prime[] = +{ + 3, 5, 7, 11, 13, 17, 19, 23, + 29, 31, 37, 41, 43, 47, 53, 59, + 61, 67, 71, 73, 79, 83, 89, 97, + 101, 103, 107, 109, 113, 127, 131, 137, + 139, 149, 151, 157, 163, 167, 173, 179, + 181, 191, 193, 197, 199, 211, 223, 227, + 229, 233, 239, 241, 251, 257, 263, 269, + 271, 277, 281, 283, 293, 307, 311, 313, + 317, 331, 337, 347, 349, 353, 359, 367, + 373, 379, 383, 389, 397, 401, 409, 419, + 421, 431, 433, 439, 443, 449, 457, 461, + 463, 467, 479, 487, 491, 499, 503, 509, + 521, 523, 541, 547, 557, 563, 569, 571, + 577, 587, 593, 599, 601, 607, 613, 617, + 619, 631, 641, 643, 647, 653, 659, 661, + 673, 677, 683, 691, 701, 709, 719, 727, + 733, 739, 743, 751, 757, 761, 769, 773, + 787, 797, 809, 811, 821, 823, 827, 829, + 839, 853, 857, 859, 863, 877, 881, 883, + 887, 907, 911, 919, 929, 937, 941, 947, + 953, 967, 971, 977, 983, 991, 997, -103 +}; + +/* + * Miller-Rabin primality test (HAC 4.24) + */ +int mpi_is_prime( mpi *X, int (*f_rng)(void *), void *p_rng ) +{ + int ret, i, j, n, s, xs; + mpi W, R, T, A, RR; + unsigned char *p; + + if( mpi_cmp_int( X, 0 ) == 0 ) + return( 0 ); + + mpi_init( &W, &R, &T, &A, &RR, NULL ); + + xs = X->s; X->s = 1; + + /* + * test trivial factors first + */ + if( ( X->p[0] & 1 ) == 0 ) + return( POLARSSL_ERR_MPI_NOT_ACCEPTABLE ); + + for( i = 0; small_prime[i] > 0; i++ ) + { + t_int r; + + if( mpi_cmp_int( X, small_prime[i] ) <= 0 ) + return( 0 ); + + MPI_CHK( mpi_mod_int( &r, X, small_prime[i] ) ); + + if( r == 0 ) + return( POLARSSL_ERR_MPI_NOT_ACCEPTABLE ); + } + + /* + * W = |X| - 1 + * R = W >> lsb( W ) + */ + s = mpi_lsb( &W ); + MPI_CHK( mpi_sub_int( &W, X, 1 ) ); + MPI_CHK( mpi_copy( &R, &W ) ); + MPI_CHK( mpi_shift_r( &R, s ) ); + + i = mpi_msb( X ); + /* + * HAC, table 4.4 + */ + n = ( ( i >= 1300 ) ? 2 : ( i >= 850 ) ? 3 : + ( i >= 650 ) ? 4 : ( i >= 350 ) ? 8 : + ( i >= 250 ) ? 12 : ( i >= 150 ) ? 18 : 27 ); + + for( i = 0; i < n; i++ ) + { + /* + * pick a random A, 1 < A < |X| - 1 + */ + MPI_CHK( mpi_grow( &A, X->n ) ); + + p = (unsigned char *) A.p; + for( j = 0; j < A.n * ciL; j++ ) + *p++ = (unsigned char) f_rng( p_rng ); + + j = mpi_msb( &A ) - mpi_msb( &W ); + MPI_CHK( mpi_shift_r( &A, j + 1 ) ); + A.p[0] |= 3; + + /* + * A = A^R mod |X| + */ + MPI_CHK( mpi_exp_mod( &A, &A, &R, X, &RR ) ); + + if( mpi_cmp_mpi( &A, &W ) == 0 || + mpi_cmp_int( &A, 1 ) == 0 ) + continue; + + j = 1; + while( j < s && mpi_cmp_mpi( &A, &W ) != 0 ) + { + /* + * A = A * A mod |X| + */ + MPI_CHK( mpi_mul_mpi( &T, &A, &A ) ); + MPI_CHK( mpi_mod_mpi( &A, &T, X ) ); + + if( mpi_cmp_int( &A, 1 ) == 0 ) + break; + + j++; + } + + /* + * not prime if A != |X| - 1 or A == 1 + */ + if( mpi_cmp_mpi( &A, &W ) != 0 || + mpi_cmp_int( &A, 1 ) == 0 ) + { + ret = POLARSSL_ERR_MPI_NOT_ACCEPTABLE; + break; + } + } + +cleanup: + + X->s = xs; + + mpi_free( &RR, &A, &T, &R, &W, NULL ); + + return( ret ); +} + +/* + * Prime number generation + */ +int mpi_gen_prime( mpi *X, int nbits, int dh_flag, + int (*f_rng)(void *), void *p_rng ) +{ + int ret, k, n; + unsigned char *p; + mpi Y; + + if( nbits < 3 ) + return( POLARSSL_ERR_MPI_BAD_INPUT_DATA ); + + mpi_init( &Y, NULL ); + + n = BITS_TO_LIMBS( nbits ); + + MPI_CHK( mpi_grow( X, n ) ); + MPI_CHK( mpi_lset( X, 0 ) ); + + p = (unsigned char *) X->p; + for( k = 0; k < X->n * ciL; k++ ) + *p++ = (unsigned char) f_rng( p_rng ); + + k = mpi_msb( X ); + if( k < nbits ) MPI_CHK( mpi_shift_l( X, nbits - k ) ); + if( k > nbits ) MPI_CHK( mpi_shift_r( X, k - nbits ) ); + + X->p[0] |= 3; + + if( dh_flag == 0 ) + { + while( ( ret = mpi_is_prime( X, f_rng, p_rng ) ) != 0 ) + { + if( ret != POLARSSL_ERR_MPI_NOT_ACCEPTABLE ) + goto cleanup; + + MPI_CHK( mpi_add_int( X, X, 2 ) ); + } + } + else + { + MPI_CHK( mpi_sub_int( &Y, X, 1 ) ); + MPI_CHK( mpi_shift_r( &Y, 1 ) ); + + while( 1 ) + { + if( ( ret = mpi_is_prime( X, f_rng, p_rng ) ) == 0 ) + { + if( ( ret = mpi_is_prime( &Y, f_rng, p_rng ) ) == 0 ) + break; + + if( ret != POLARSSL_ERR_MPI_NOT_ACCEPTABLE ) + goto cleanup; + } + + if( ret != POLARSSL_ERR_MPI_NOT_ACCEPTABLE ) + goto cleanup; + + MPI_CHK( mpi_add_int( &Y, X, 1 ) ); + MPI_CHK( mpi_add_int( X, X, 2 ) ); + MPI_CHK( mpi_shift_r( &Y, 1 ) ); + } + } + +cleanup: + + mpi_free( &Y, NULL ); + + return( ret ); +} + +#endif + +#if defined(POLARSSL_SELF_TEST) + +#define GCD_PAIR_COUNT 3 + +static const int gcd_pairs[GCD_PAIR_COUNT][3] = +{ + { 693, 609, 21 }, + { 1764, 868, 28 }, + { 768454923, 542167814, 1 } +}; + +/* + * Checkup routine + */ +int mpi_self_test( int verbose ) +{ + int ret, i; + mpi A, E, N, X, Y, U, V; + + mpi_init( &A, &E, &N, &X, &Y, &U, &V, NULL ); + + MPI_CHK( mpi_read_string( &A, 16, + "EFE021C2645FD1DC586E69184AF4A31E" \ + "D5F53E93B5F123FA41680867BA110131" \ + "944FE7952E2517337780CB0DB80E61AA" \ + "E7C8DDC6C5C6AADEB34EB38A2F40D5E6" ) ); + + MPI_CHK( mpi_read_string( &E, 16, + "B2E7EFD37075B9F03FF989C7C5051C20" \ + "34D2A323810251127E7BF8625A4F49A5" \ + "F3E27F4DA8BD59C47D6DAABA4C8127BD" \ + "5B5C25763222FEFCCFC38B832366C29E" ) ); + + MPI_CHK( mpi_read_string( &N, 16, + "0066A198186C18C10B2F5ED9B522752A" \ + "9830B69916E535C8F047518A889A43A5" \ + "94B6BED27A168D31D4A52F88925AA8F5" ) ); + + MPI_CHK( mpi_mul_mpi( &X, &A, &N ) ); + + MPI_CHK( mpi_read_string( &U, 16, + "602AB7ECA597A3D6B56FF9829A5E8B85" \ + "9E857EA95A03512E2BAE7391688D264A" \ + "A5663B0341DB9CCFD2C4C5F421FEC814" \ + "8001B72E848A38CAE1C65F78E56ABDEF" \ + "E12D3C039B8A02D6BE593F0BBBDA56F1" \ + "ECF677152EF804370C1A305CAF3B5BF1" \ + "30879B56C61DE584A0F53A2447A51E" ) ); + + if( verbose != 0 ) + printf( " MPI test #1 (mul_mpi): " ); + + if( mpi_cmp_mpi( &X, &U ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + printf( "passed\n" ); + + MPI_CHK( mpi_div_mpi( &X, &Y, &A, &N ) ); + + MPI_CHK( mpi_read_string( &U, 16, + "256567336059E52CAE22925474705F39A94" ) ); + + MPI_CHK( mpi_read_string( &V, 16, + "6613F26162223DF488E9CD48CC132C7A" \ + "0AC93C701B001B092E4E5B9F73BCD27B" \ + "9EE50D0657C77F374E903CDFA4C642" ) ); + + if( verbose != 0 ) + printf( " MPI test #2 (div_mpi): " ); + + if( mpi_cmp_mpi( &X, &U ) != 0 || + mpi_cmp_mpi( &Y, &V ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + printf( "passed\n" ); + + MPI_CHK( mpi_exp_mod( &X, &A, &E, &N, NULL ) ); + + MPI_CHK( mpi_read_string( &U, 16, + "36E139AEA55215609D2816998ED020BB" \ + "BD96C37890F65171D948E9BC7CBAA4D9" \ + "325D24D6A3C12710F10A09FA08AB87" ) ); + + if( verbose != 0 ) + printf( " MPI test #3 (exp_mod): " ); + + if( mpi_cmp_mpi( &X, &U ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + printf( "passed\n" ); + + MPI_CHK( mpi_inv_mod( &X, &A, &N ) ); + + MPI_CHK( mpi_read_string( &U, 16, + "003A0AAEDD7E784FC07D8F9EC6E3BFD5" \ + "C3DBA76456363A10869622EAC2DD84EC" \ + "C5B8A74DAC4D09E03B5E0BE779F2DF61" ) ); + + if( verbose != 0 ) + printf( " MPI test #4 (inv_mod): " ); + + if( mpi_cmp_mpi( &X, &U ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + printf( "passed\n" ); + + if( verbose != 0 ) + printf( " MPI test #5 (simple gcd): " ); + + for ( i = 0; i < GCD_PAIR_COUNT; i++) + { + MPI_CHK( mpi_lset( &X, gcd_pairs[i][0] ) ); + MPI_CHK( mpi_lset( &Y, gcd_pairs[i][1] ) ); + + MPI_CHK( mpi_gcd( &A, &X, &Y ) ); + + if( mpi_cmp_int( &A, gcd_pairs[i][2] ) != 0 ) + { + if( verbose != 0 ) + printf( "failed at %d\n", i ); + + return( 1 ); + } + } + + if( verbose != 0 ) + printf( "passed\n" ); + +cleanup: + + if( ret != 0 && verbose != 0 ) + printf( "Unexpected error, return code = %08X\n", ret ); + + mpi_free( &V, &U, &Y, &X, &N, &E, &A, NULL ); + + if( verbose != 0 ) + printf( "\n" ); + + return( ret ); +} + +#endif + +#endif diff --git a/package/px5g/src/library/havege.c b/package/px5g/src/library/havege.c new file mode 100644 index 000000000..266299d3b --- /dev/null +++ b/package/px5g/src/library/havege.c @@ -0,0 +1,276 @@ +/* + * HAVEGE: HArdware Volatile Entropy Gathering and Expansion + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* + * The HAVEGE RNG was designed by Andre Seznec in 2002. + * + * http://www.irisa.fr/caps/projects/hipsor/publi.php + * + * Contact: seznec(at)irisa_dot_fr - orocheco(at)irisa_dot_fr + */ + +#include +#include + +#include "polarssl/config.h" + +#if defined(POLARSSL_HAVEGE_C) + +#include "polarssl/havege.h" +#include "polarssl/timing.h" + +/* ------------------------------------------------------------------------ + * On average, one iteration accesses two 8-word blocks in the havege WALK + * table, and generates 16 words in the RES array. + * + * The data read in the WALK table is updated and permuted after each use. + * The result of the hardware clock counter read is used for this update. + * + * 25 conditional tests are present. The conditional tests are grouped in + * two nested groups of 12 conditional tests and 1 test that controls the + * permutation; on average, there should be 6 tests executed and 3 of them + * should be mispredicted. + * ------------------------------------------------------------------------ + */ + +#define SWAP(X,Y) { int *T = X; X = Y; Y = T; } + +#define TST1_ENTER if( PTEST & 1 ) { PTEST ^= 3; PTEST >>= 1; +#define TST2_ENTER if( PTEST & 1 ) { PTEST ^= 3; PTEST >>= 1; + +#define TST1_LEAVE U1++; } +#define TST2_LEAVE U2++; } + +#define ONE_ITERATION \ + \ + PTEST = PT1 >> 20; \ + \ + TST1_ENTER TST1_ENTER TST1_ENTER TST1_ENTER \ + TST1_ENTER TST1_ENTER TST1_ENTER TST1_ENTER \ + TST1_ENTER TST1_ENTER TST1_ENTER TST1_ENTER \ + \ + TST1_LEAVE TST1_LEAVE TST1_LEAVE TST1_LEAVE \ + TST1_LEAVE TST1_LEAVE TST1_LEAVE TST1_LEAVE \ + TST1_LEAVE TST1_LEAVE TST1_LEAVE TST1_LEAVE \ + \ + PTX = (PT1 >> 18) & 7; \ + PT1 &= 0x1FFF; \ + PT2 &= 0x1FFF; \ + CLK = (int) hardclock(); \ + \ + i = 0; \ + A = &WALK[PT1 ]; RES[i++] ^= *A; \ + B = &WALK[PT2 ]; RES[i++] ^= *B; \ + C = &WALK[PT1 ^ 1]; RES[i++] ^= *C; \ + D = &WALK[PT2 ^ 4]; RES[i++] ^= *D; \ + \ + IN = (*A >> (1)) ^ (*A << (31)) ^ CLK; \ + *A = (*B >> (2)) ^ (*B << (30)) ^ CLK; \ + *B = IN ^ U1; \ + *C = (*C >> (3)) ^ (*C << (29)) ^ CLK; \ + *D = (*D >> (4)) ^ (*D << (28)) ^ CLK; \ + \ + A = &WALK[PT1 ^ 2]; RES[i++] ^= *A; \ + B = &WALK[PT2 ^ 2]; RES[i++] ^= *B; \ + C = &WALK[PT1 ^ 3]; RES[i++] ^= *C; \ + D = &WALK[PT2 ^ 6]; RES[i++] ^= *D; \ + \ + if( PTEST & 1 ) SWAP( A, C ); \ + \ + IN = (*A >> (5)) ^ (*A << (27)) ^ CLK; \ + *A = (*B >> (6)) ^ (*B << (26)) ^ CLK; \ + *B = IN; CLK = (int) hardclock(); \ + *C = (*C >> (7)) ^ (*C << (25)) ^ CLK; \ + *D = (*D >> (8)) ^ (*D << (24)) ^ CLK; \ + \ + A = &WALK[PT1 ^ 4]; \ + B = &WALK[PT2 ^ 1]; \ + \ + PTEST = PT2 >> 1; \ + \ + PT2 = (RES[(i - 8) ^ PTY] ^ WALK[PT2 ^ PTY ^ 7]); \ + PT2 = ((PT2 & 0x1FFF) & (~8)) ^ ((PT1 ^ 8) & 0x8); \ + PTY = (PT2 >> 10) & 7; \ + \ + TST2_ENTER TST2_ENTER TST2_ENTER TST2_ENTER \ + TST2_ENTER TST2_ENTER TST2_ENTER TST2_ENTER \ + TST2_ENTER TST2_ENTER TST2_ENTER TST2_ENTER \ + \ + TST2_LEAVE TST2_LEAVE TST2_LEAVE TST2_LEAVE \ + TST2_LEAVE TST2_LEAVE TST2_LEAVE TST2_LEAVE \ + TST2_LEAVE TST2_LEAVE TST2_LEAVE TST2_LEAVE \ + \ + C = &WALK[PT1 ^ 5]; \ + D = &WALK[PT2 ^ 5]; \ + \ + RES[i++] ^= *A; \ + RES[i++] ^= *B; \ + RES[i++] ^= *C; \ + RES[i++] ^= *D; \ + \ + IN = (*A >> ( 9)) ^ (*A << (23)) ^ CLK; \ + *A = (*B >> (10)) ^ (*B << (22)) ^ CLK; \ + *B = IN ^ U2; \ + *C = (*C >> (11)) ^ (*C << (21)) ^ CLK; \ + *D = (*D >> (12)) ^ (*D << (20)) ^ CLK; \ + \ + A = &WALK[PT1 ^ 6]; RES[i++] ^= *A; \ + B = &WALK[PT2 ^ 3]; RES[i++] ^= *B; \ + C = &WALK[PT1 ^ 7]; RES[i++] ^= *C; \ + D = &WALK[PT2 ^ 7]; RES[i++] ^= *D; \ + \ + IN = (*A >> (13)) ^ (*A << (19)) ^ CLK; \ + *A = (*B >> (14)) ^ (*B << (18)) ^ CLK; \ + *B = IN; \ + *C = (*C >> (15)) ^ (*C << (17)) ^ CLK; \ + *D = (*D >> (16)) ^ (*D << (16)) ^ CLK; \ + \ + PT1 = ( RES[(i - 8) ^ PTX] ^ \ + WALK[PT1 ^ PTX ^ 7] ) & (~1); \ + PT1 ^= (PT2 ^ 0x10) & 0x10; \ + \ + for( n++, i = 0; i < 16; i++ ) \ + hs->pool[n % COLLECT_SIZE] ^= RES[i]; + +/* + * Entropy gathering function + */ +static void havege_fill( havege_state *hs ) +{ + int i, n = 0; + int U1, U2, *A, *B, *C, *D; + int PT1, PT2, *WALK, RES[16]; + int PTX, PTY, CLK, PTEST, IN; + + WALK = hs->WALK; + PT1 = hs->PT1; + PT2 = hs->PT2; + + PTX = U1 = 0; + PTY = U2 = 0; + + memset( RES, 0, sizeof( RES ) ); + + while( n < COLLECT_SIZE * 4 ) + { + ONE_ITERATION + ONE_ITERATION + ONE_ITERATION + ONE_ITERATION + } + + hs->PT1 = PT1; + hs->PT2 = PT2; + + hs->offset[0] = 0; + hs->offset[1] = COLLECT_SIZE / 2; +} + +/* + * HAVEGE initialization + */ +void havege_init( havege_state *hs ) +{ + memset( hs, 0, sizeof( havege_state ) ); + + havege_fill( hs ); +} + +/* + * HAVEGE rand function + */ +int havege_rand( void *p_rng ) +{ + int ret; + havege_state *hs = (havege_state *) p_rng; + + if( hs->offset[1] >= COLLECT_SIZE ) + havege_fill( hs ); + + ret = hs->pool[hs->offset[0]++]; + ret ^= hs->pool[hs->offset[1]++]; + + return( ret ); +} + +#if defined(POLARSSL_RAND_TEST) + +#include + +int main( int argc, char *argv[] ) +{ + FILE *f; + time_t t; + int i, j, k; + havege_state hs; + unsigned char buf[1024]; + + if( argc < 2 ) + { + fprintf( stderr, "usage: %s \n", argv[0] ); + return( 1 ); + } + + if( ( f = fopen( argv[1], "wb+" ) ) == NULL ) + { + printf( "failed to open '%s' for writing.\n", argv[0] ); + return( 1 ); + } + + havege_init( &hs ); + + t = time( NULL ); + + for( i = 0, k = 32768; i < k; i++ ) + { + for( j = 0; j < sizeof( buf ); j++ ) + buf[j] = havege_rand( &hs ); + + fwrite( buf, sizeof( buf ), 1, f ); + + printf( "Generating 32Mb of data in file '%s'... %04.1f" \ + "%% done\r", argv[1], (100 * (float) (i + 1)) / k ); + fflush( stdout ); + } + + if( t == time( NULL ) ) + t--; + + fclose( f ); + return( 0 ); +} + +#endif + +#endif diff --git a/package/px5g/src/library/rsa.c b/package/px5g/src/library/rsa.c new file mode 100644 index 000000000..131b6c6c9 --- /dev/null +++ b/package/px5g/src/library/rsa.c @@ -0,0 +1,750 @@ +/* + * The RSA public-key cryptosystem + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* + * RSA was designed by Ron Rivest, Adi Shamir and Len Adleman. + * + * http://theory.lcs.mit.edu/~rivest/rsapaper.pdf + * http://www.cacr.math.uwaterloo.ca/hac/about/chap8.pdf + */ + +#include "polarssl/config.h" + +#if defined(POLARSSL_RSA_C) + +#include "polarssl/rsa.h" + +#include +#include +#include + +/* + * Initialize an RSA context + */ +void rsa_init( rsa_context *ctx, + int padding, + int hash_id, + int (*f_rng)(void *), + void *p_rng ) +{ + memset( ctx, 0, sizeof( rsa_context ) ); + + ctx->padding = padding; + ctx->hash_id = hash_id; + + ctx->f_rng = f_rng; + ctx->p_rng = p_rng; +} + +#if defined(POLARSSL_GENPRIME) + +/* + * Generate an RSA keypair + */ +int rsa_gen_key( rsa_context *ctx, int nbits, int exponent ) +{ + int ret; + mpi P1, Q1, H, G; + + if( ctx->f_rng == NULL || nbits < 128 || exponent < 3 ) + return( POLARSSL_ERR_RSA_BAD_INPUT_DATA ); + + mpi_init( &P1, &Q1, &H, &G, NULL ); + + /* + * find primes P and Q with Q < P so that: + * GCD( E, (P-1)*(Q-1) ) == 1 + */ + MPI_CHK( mpi_lset( &ctx->E, exponent ) ); + + do + { + MPI_CHK( mpi_gen_prime( &ctx->P, ( nbits + 1 ) >> 1, 0, + ctx->f_rng, ctx->p_rng ) ); + + MPI_CHK( mpi_gen_prime( &ctx->Q, ( nbits + 1 ) >> 1, 0, + ctx->f_rng, ctx->p_rng ) ); + + if( mpi_cmp_mpi( &ctx->P, &ctx->Q ) < 0 ) + mpi_swap( &ctx->P, &ctx->Q ); + + if( mpi_cmp_mpi( &ctx->P, &ctx->Q ) == 0 ) + continue; + + MPI_CHK( mpi_mul_mpi( &ctx->N, &ctx->P, &ctx->Q ) ); + if( mpi_msb( &ctx->N ) != nbits ) + continue; + + MPI_CHK( mpi_sub_int( &P1, &ctx->P, 1 ) ); + MPI_CHK( mpi_sub_int( &Q1, &ctx->Q, 1 ) ); + MPI_CHK( mpi_mul_mpi( &H, &P1, &Q1 ) ); + MPI_CHK( mpi_gcd( &G, &ctx->E, &H ) ); + } + while( mpi_cmp_int( &G, 1 ) != 0 ); + + /* + * D = E^-1 mod ((P-1)*(Q-1)) + * DP = D mod (P - 1) + * DQ = D mod (Q - 1) + * QP = Q^-1 mod P + */ + MPI_CHK( mpi_inv_mod( &ctx->D , &ctx->E, &H ) ); + MPI_CHK( mpi_mod_mpi( &ctx->DP, &ctx->D, &P1 ) ); + MPI_CHK( mpi_mod_mpi( &ctx->DQ, &ctx->D, &Q1 ) ); + MPI_CHK( mpi_inv_mod( &ctx->QP, &ctx->Q, &ctx->P ) ); + + ctx->len = ( mpi_msb( &ctx->N ) + 7 ) >> 3; + +cleanup: + + mpi_free( &G, &H, &Q1, &P1, NULL ); + + if( ret != 0 ) + { + rsa_free( ctx ); + return( POLARSSL_ERR_RSA_KEY_GEN_FAILED | ret ); + } + + return( 0 ); +} + +#endif + +/* + * Check a public RSA key + */ +int rsa_check_pubkey( rsa_context *ctx ) +{ + if( ( ctx->N.p[0] & 1 ) == 0 || + ( ctx->E.p[0] & 1 ) == 0 ) + return( POLARSSL_ERR_RSA_KEY_CHECK_FAILED ); + + if( mpi_msb( &ctx->N ) < 128 || + mpi_msb( &ctx->N ) > 4096 ) + return( POLARSSL_ERR_RSA_KEY_CHECK_FAILED ); + + if( mpi_msb( &ctx->E ) < 2 || + mpi_msb( &ctx->E ) > 64 ) + return( POLARSSL_ERR_RSA_KEY_CHECK_FAILED ); + + return( 0 ); +} + +/* + * Check a private RSA key + */ +int rsa_check_privkey( rsa_context *ctx ) +{ + int ret; + mpi PQ, DE, P1, Q1, H, I, G; + + if( ( ret = rsa_check_pubkey( ctx ) ) != 0 ) + return( ret ); + + mpi_init( &PQ, &DE, &P1, &Q1, &H, &I, &G, NULL ); + + MPI_CHK( mpi_mul_mpi( &PQ, &ctx->P, &ctx->Q ) ); + MPI_CHK( mpi_mul_mpi( &DE, &ctx->D, &ctx->E ) ); + MPI_CHK( mpi_sub_int( &P1, &ctx->P, 1 ) ); + MPI_CHK( mpi_sub_int( &Q1, &ctx->Q, 1 ) ); + MPI_CHK( mpi_mul_mpi( &H, &P1, &Q1 ) ); + MPI_CHK( mpi_mod_mpi( &I, &DE, &H ) ); + MPI_CHK( mpi_gcd( &G, &ctx->E, &H ) ); + + if( mpi_cmp_mpi( &PQ, &ctx->N ) == 0 && + mpi_cmp_int( &I, 1 ) == 0 && + mpi_cmp_int( &G, 1 ) == 0 ) + { + mpi_free( &G, &I, &H, &Q1, &P1, &DE, &PQ, NULL ); + return( 0 ); + } + +cleanup: + + mpi_free( &G, &I, &H, &Q1, &P1, &DE, &PQ, NULL ); + return( POLARSSL_ERR_RSA_KEY_CHECK_FAILED | ret ); +} + +/* + * Do an RSA public key operation + */ +int rsa_public( rsa_context *ctx, + unsigned char *input, + unsigned char *output ) +{ + int ret, olen; + mpi T; + + mpi_init( &T, NULL ); + + MPI_CHK( mpi_read_binary( &T, input, ctx->len ) ); + + if( mpi_cmp_mpi( &T, &ctx->N ) >= 0 ) + { + mpi_free( &T, NULL ); + return( POLARSSL_ERR_RSA_BAD_INPUT_DATA ); + } + + olen = ctx->len; + MPI_CHK( mpi_exp_mod( &T, &T, &ctx->E, &ctx->N, &ctx->RN ) ); + MPI_CHK( mpi_write_binary( &T, output, olen ) ); + +cleanup: + + mpi_free( &T, NULL ); + + if( ret != 0 ) + return( POLARSSL_ERR_RSA_PUBLIC_FAILED | ret ); + + return( 0 ); +} + +/* + * Do an RSA private key operation + */ +int rsa_private( rsa_context *ctx, + unsigned char *input, + unsigned char *output ) +{ + int ret, olen; + mpi T, T1, T2; + + mpi_init( &T, &T1, &T2, NULL ); + + MPI_CHK( mpi_read_binary( &T, input, ctx->len ) ); + + if( mpi_cmp_mpi( &T, &ctx->N ) >= 0 ) + { + mpi_free( &T, NULL ); + return( POLARSSL_ERR_RSA_BAD_INPUT_DATA ); + } + +#if 0 + MPI_CHK( mpi_exp_mod( &T, &T, &ctx->D, &ctx->N, &ctx->RN ) ); +#else + /* + * faster decryption using the CRT + * + * T1 = input ^ dP mod P + * T2 = input ^ dQ mod Q + */ + MPI_CHK( mpi_exp_mod( &T1, &T, &ctx->DP, &ctx->P, &ctx->RP ) ); + MPI_CHK( mpi_exp_mod( &T2, &T, &ctx->DQ, &ctx->Q, &ctx->RQ ) ); + + /* + * T = (T1 - T2) * (Q^-1 mod P) mod P + */ + MPI_CHK( mpi_sub_mpi( &T, &T1, &T2 ) ); + MPI_CHK( mpi_mul_mpi( &T1, &T, &ctx->QP ) ); + MPI_CHK( mpi_mod_mpi( &T, &T1, &ctx->P ) ); + + /* + * output = T2 + T * Q + */ + MPI_CHK( mpi_mul_mpi( &T1, &T, &ctx->Q ) ); + MPI_CHK( mpi_add_mpi( &T, &T2, &T1 ) ); +#endif + + olen = ctx->len; + MPI_CHK( mpi_write_binary( &T, output, olen ) ); + +cleanup: + + mpi_free( &T, &T1, &T2, NULL ); + + if( ret != 0 ) + return( POLARSSL_ERR_RSA_PRIVATE_FAILED | ret ); + + return( 0 ); +} + +/* + * Add the message padding, then do an RSA operation + */ +int rsa_pkcs1_encrypt( rsa_context *ctx, + int mode, int ilen, + unsigned char *input, + unsigned char *output ) +{ + int nb_pad, olen; + unsigned char *p = output; + + olen = ctx->len; + + switch( ctx->padding ) + { + case RSA_PKCS_V15: + + if( ilen < 0 || olen < ilen + 11 ) + return( POLARSSL_ERR_RSA_BAD_INPUT_DATA ); + + nb_pad = olen - 3 - ilen; + + *p++ = 0; + *p++ = RSA_CRYPT; + + while( nb_pad-- > 0 ) + { + do { + *p = (unsigned char) rand(); + } while( *p == 0 ); + p++; + } + *p++ = 0; + memcpy( p, input, ilen ); + break; + + default: + + return( POLARSSL_ERR_RSA_INVALID_PADDING ); + } + + return( ( mode == RSA_PUBLIC ) + ? rsa_public( ctx, output, output ) + : rsa_private( ctx, output, output ) ); +} + +/* + * Do an RSA operation, then remove the message padding + */ +int rsa_pkcs1_decrypt( rsa_context *ctx, + int mode, int *olen, + unsigned char *input, + unsigned char *output, + int output_max_len) +{ + int ret, ilen; + unsigned char *p; + unsigned char buf[512]; + + ilen = ctx->len; + + if( ilen < 16 || ilen > (int) sizeof( buf ) ) + return( POLARSSL_ERR_RSA_BAD_INPUT_DATA ); + + ret = ( mode == RSA_PUBLIC ) + ? rsa_public( ctx, input, buf ) + : rsa_private( ctx, input, buf ); + + if( ret != 0 ) + return( ret ); + + p = buf; + + switch( ctx->padding ) + { + case RSA_PKCS_V15: + + if( *p++ != 0 || *p++ != RSA_CRYPT ) + return( POLARSSL_ERR_RSA_INVALID_PADDING ); + + while( *p != 0 ) + { + if( p >= buf + ilen - 1 ) + return( POLARSSL_ERR_RSA_INVALID_PADDING ); + p++; + } + p++; + break; + + default: + + return( POLARSSL_ERR_RSA_INVALID_PADDING ); + } + + if (ilen - (int)(p - buf) > output_max_len) + return( POLARSSL_ERR_RSA_OUTPUT_TO_LARGE ); + + *olen = ilen - (int)(p - buf); + memcpy( output, p, *olen ); + + return( 0 ); +} + +/* + * Do an RSA operation to sign the message digest + */ +int rsa_pkcs1_sign( rsa_context *ctx, + int mode, + int hash_id, + int hashlen, + unsigned char *hash, + unsigned char *sig ) +{ + int nb_pad, olen; + unsigned char *p = sig; + + olen = ctx->len; + + switch( ctx->padding ) + { + case RSA_PKCS_V15: + + switch( hash_id ) + { + case RSA_RAW: + nb_pad = olen - 3 - hashlen; + break; + + case RSA_MD2: + case RSA_MD4: + case RSA_MD5: + nb_pad = olen - 3 - 34; + break; + + case RSA_SHA1: + nb_pad = olen - 3 - 35; + break; + + default: + return( POLARSSL_ERR_RSA_BAD_INPUT_DATA ); + } + + if( nb_pad < 8 ) + return( POLARSSL_ERR_RSA_BAD_INPUT_DATA ); + + *p++ = 0; + *p++ = RSA_SIGN; + memset( p, 0xFF, nb_pad ); + p += nb_pad; + *p++ = 0; + break; + + default: + + return( POLARSSL_ERR_RSA_INVALID_PADDING ); + } + + switch( hash_id ) + { + case RSA_RAW: + memcpy( p, hash, hashlen ); + break; + + case RSA_MD2: + memcpy( p, ASN1_HASH_MDX, 18 ); + memcpy( p + 18, hash, 16 ); + p[13] = 2; break; + + case RSA_MD4: + memcpy( p, ASN1_HASH_MDX, 18 ); + memcpy( p + 18, hash, 16 ); + p[13] = 4; break; + + case RSA_MD5: + memcpy( p, ASN1_HASH_MDX, 18 ); + memcpy( p + 18, hash, 16 ); + p[13] = 5; break; + + case RSA_SHA1: + memcpy( p, ASN1_HASH_SHA1, 15 ); + memcpy( p + 15, hash, 20 ); + break; + + default: + return( POLARSSL_ERR_RSA_BAD_INPUT_DATA ); + } + + return( ( mode == RSA_PUBLIC ) + ? rsa_public( ctx, sig, sig ) + : rsa_private( ctx, sig, sig ) ); +} + +/* + * Do an RSA operation and check the message digest + */ +int rsa_pkcs1_verify( rsa_context *ctx, + int mode, + int hash_id, + int hashlen, + unsigned char *hash, + unsigned char *sig ) +{ + int ret, len, siglen; + unsigned char *p, c; + unsigned char buf[512]; + + siglen = ctx->len; + + if( siglen < 16 || siglen > (int) sizeof( buf ) ) + return( POLARSSL_ERR_RSA_BAD_INPUT_DATA ); + + ret = ( mode == RSA_PUBLIC ) + ? rsa_public( ctx, sig, buf ) + : rsa_private( ctx, sig, buf ); + + if( ret != 0 ) + return( ret ); + + p = buf; + + switch( ctx->padding ) + { + case RSA_PKCS_V15: + + if( *p++ != 0 || *p++ != RSA_SIGN ) + return( POLARSSL_ERR_RSA_INVALID_PADDING ); + + while( *p != 0 ) + { + if( p >= buf + siglen - 1 || *p != 0xFF ) + return( POLARSSL_ERR_RSA_INVALID_PADDING ); + p++; + } + p++; + break; + + default: + + return( POLARSSL_ERR_RSA_INVALID_PADDING ); + } + + len = siglen - (int)( p - buf ); + + if( len == 34 ) + { + c = p[13]; + p[13] = 0; + + if( memcmp( p, ASN1_HASH_MDX, 18 ) != 0 ) + return( POLARSSL_ERR_RSA_VERIFY_FAILED ); + + if( ( c == 2 && hash_id == RSA_MD2 ) || + ( c == 4 && hash_id == RSA_MD4 ) || + ( c == 5 && hash_id == RSA_MD5 ) ) + { + if( memcmp( p + 18, hash, 16 ) == 0 ) + return( 0 ); + else + return( POLARSSL_ERR_RSA_VERIFY_FAILED ); + } + } + + if( len == 35 && hash_id == RSA_SHA1 ) + { + if( memcmp( p, ASN1_HASH_SHA1, 15 ) == 0 && + memcmp( p + 15, hash, 20 ) == 0 ) + return( 0 ); + else + return( POLARSSL_ERR_RSA_VERIFY_FAILED ); + } + + if( len == hashlen && hash_id == RSA_RAW ) + { + if( memcmp( p, hash, hashlen ) == 0 ) + return( 0 ); + else + return( POLARSSL_ERR_RSA_VERIFY_FAILED ); + } + + return( POLARSSL_ERR_RSA_INVALID_PADDING ); +} + +/* + * Free the components of an RSA key + */ +void rsa_free( rsa_context *ctx ) +{ + mpi_free( &ctx->RQ, &ctx->RP, &ctx->RN, + &ctx->QP, &ctx->DQ, &ctx->DP, + &ctx->Q, &ctx->P, &ctx->D, + &ctx->E, &ctx->N, NULL ); +} + +#if defined(POLARSSL_SELF_TEST) + +#include "polarssl/sha1.h" + +/* + * Example RSA-1024 keypair, for test purposes + */ +#define KEY_LEN 128 + +#define RSA_N "9292758453063D803DD603D5E777D788" \ + "8ED1D5BF35786190FA2F23EBC0848AEA" \ + "DDA92CA6C3D80B32C4D109BE0F36D6AE" \ + "7130B9CED7ACDF54CFC7555AC14EEBAB" \ + "93A89813FBF3C4F8066D2D800F7C38A8" \ + "1AE31942917403FF4946B0A83D3D3E05" \ + "EE57C6F5F5606FB5D4BC6CD34EE0801A" \ + "5E94BB77B07507233A0BC7BAC8F90F79" + +#define RSA_E "10001" + +#define RSA_D "24BF6185468786FDD303083D25E64EFC" \ + "66CA472BC44D253102F8B4A9D3BFA750" \ + "91386C0077937FE33FA3252D28855837" \ + "AE1B484A8A9A45F7EE8C0C634F99E8CD" \ + "DF79C5CE07EE72C7F123142198164234" \ + "CABB724CF78B8173B9F880FC86322407" \ + "AF1FEDFDDE2BEB674CA15F3E81A1521E" \ + "071513A1E85B5DFA031F21ECAE91A34D" + +#define RSA_P "C36D0EB7FCD285223CFB5AABA5BDA3D8" \ + "2C01CAD19EA484A87EA4377637E75500" \ + "FCB2005C5C7DD6EC4AC023CDA285D796" \ + "C3D9E75E1EFC42488BB4F1D13AC30A57" + +#define RSA_Q "C000DF51A7C77AE8D7C7370C1FF55B69" \ + "E211C2B9E5DB1ED0BF61D0D9899620F4" \ + "910E4168387E3C30AA1E00C339A79508" \ + "8452DD96A9A5EA5D9DCA68DA636032AF" + +#define RSA_DP "C1ACF567564274FB07A0BBAD5D26E298" \ + "3C94D22288ACD763FD8E5600ED4A702D" \ + "F84198A5F06C2E72236AE490C93F07F8" \ + "3CC559CD27BC2D1CA488811730BB5725" + +#define RSA_DQ "4959CBF6F8FEF750AEE6977C155579C7" \ + "D8AAEA56749EA28623272E4F7D0592AF" \ + "7C1F1313CAC9471B5C523BFE592F517B" \ + "407A1BD76C164B93DA2D32A383E58357" + +#define RSA_QP "9AE7FBC99546432DF71896FC239EADAE" \ + "F38D18D2B2F0E2DD275AA977E2BF4411" \ + "F5A3B2A5D33605AEBBCCBA7FEB9F2D2F" \ + "A74206CEC169D74BF5A8C50D6F48EA08" + +#define PT_LEN 24 +#define RSA_PT "\xAA\xBB\xCC\x03\x02\x01\x00\xFF\xFF\xFF\xFF\xFF" \ + "\x11\x22\x33\x0A\x0B\x0C\xCC\xDD\xDD\xDD\xDD\xDD" + +/* + * Checkup routine + */ +int rsa_self_test( int verbose ) +{ + int len; + rsa_context rsa; + unsigned char sha1sum[20]; + unsigned char rsa_plaintext[PT_LEN]; + unsigned char rsa_decrypted[PT_LEN]; + unsigned char rsa_ciphertext[KEY_LEN]; + + memset( &rsa, 0, sizeof( rsa_context ) ); + + rsa.len = KEY_LEN; + mpi_read_string( &rsa.N , 16, RSA_N ); + mpi_read_string( &rsa.E , 16, RSA_E ); + mpi_read_string( &rsa.D , 16, RSA_D ); + mpi_read_string( &rsa.P , 16, RSA_P ); + mpi_read_string( &rsa.Q , 16, RSA_Q ); + mpi_read_string( &rsa.DP, 16, RSA_DP ); + mpi_read_string( &rsa.DQ, 16, RSA_DQ ); + mpi_read_string( &rsa.QP, 16, RSA_QP ); + + if( verbose != 0 ) + printf( " RSA key validation: " ); + + if( rsa_check_pubkey( &rsa ) != 0 || + rsa_check_privkey( &rsa ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + printf( "passed\n PKCS#1 encryption : " ); + + memcpy( rsa_plaintext, RSA_PT, PT_LEN ); + + if( rsa_pkcs1_encrypt( &rsa, RSA_PUBLIC, PT_LEN, + rsa_plaintext, rsa_ciphertext ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + printf( "passed\n PKCS#1 decryption : " ); + + if( rsa_pkcs1_decrypt( &rsa, RSA_PRIVATE, &len, + rsa_ciphertext, rsa_decrypted, + sizeof(rsa_decrypted) ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( memcmp( rsa_decrypted, rsa_plaintext, len ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + printf( "passed\n PKCS#1 data sign : " ); + + sha1( rsa_plaintext, PT_LEN, sha1sum ); + + if( rsa_pkcs1_sign( &rsa, RSA_PRIVATE, RSA_SHA1, 20, + sha1sum, rsa_ciphertext ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + printf( "passed\n PKCS#1 sig. verify: " ); + + if( rsa_pkcs1_verify( &rsa, RSA_PUBLIC, RSA_SHA1, 20, + sha1sum, rsa_ciphertext ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + printf( "passed\n\n" ); + + rsa_free( &rsa ); + + return( 0 ); +} + +#endif + +#endif diff --git a/package/px5g/src/library/sha1.c b/package/px5g/src/library/sha1.c new file mode 100644 index 000000000..54a4416f3 --- /dev/null +++ b/package/px5g/src/library/sha1.c @@ -0,0 +1,622 @@ +/* + * FIPS-180-1 compliant SHA-1 implementation + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* + * The SHA-1 standard was published by NIST in 1993. + * + * http://www.itl.nist.gov/fipspubs/fip180-1.htm + */ + +#include "polarssl/config.h" + +#if defined(POLARSSL_SHA1_C) + +#include "polarssl/sha1.h" + +#include +#include + +/* + * 32-bit integer manipulation macros (big endian) + */ +#ifndef GET_ULONG_BE +#define GET_ULONG_BE(n,b,i) \ +{ \ + (n) = ( (unsigned long) (b)[(i) ] << 24 ) \ + | ( (unsigned long) (b)[(i) + 1] << 16 ) \ + | ( (unsigned long) (b)[(i) + 2] << 8 ) \ + | ( (unsigned long) (b)[(i) + 3] ); \ +} +#endif + +#ifndef PUT_ULONG_BE +#define PUT_ULONG_BE(n,b,i) \ +{ \ + (b)[(i) ] = (unsigned char) ( (n) >> 24 ); \ + (b)[(i) + 1] = (unsigned char) ( (n) >> 16 ); \ + (b)[(i) + 2] = (unsigned char) ( (n) >> 8 ); \ + (b)[(i) + 3] = (unsigned char) ( (n) ); \ +} +#endif + +/* + * SHA-1 context setup + */ +void sha1_starts( sha1_context *ctx ) +{ + ctx->total[0] = 0; + ctx->total[1] = 0; + + ctx->state[0] = 0x67452301; + ctx->state[1] = 0xEFCDAB89; + ctx->state[2] = 0x98BADCFE; + ctx->state[3] = 0x10325476; + ctx->state[4] = 0xC3D2E1F0; +} + +static void sha1_process( sha1_context *ctx, unsigned char data[64] ) +{ + unsigned long temp, W[16], A, B, C, D, E; + + GET_ULONG_BE( W[ 0], data, 0 ); + GET_ULONG_BE( W[ 1], data, 4 ); + GET_ULONG_BE( W[ 2], data, 8 ); + GET_ULONG_BE( W[ 3], data, 12 ); + GET_ULONG_BE( W[ 4], data, 16 ); + GET_ULONG_BE( W[ 5], data, 20 ); + GET_ULONG_BE( W[ 6], data, 24 ); + GET_ULONG_BE( W[ 7], data, 28 ); + GET_ULONG_BE( W[ 8], data, 32 ); + GET_ULONG_BE( W[ 9], data, 36 ); + GET_ULONG_BE( W[10], data, 40 ); + GET_ULONG_BE( W[11], data, 44 ); + GET_ULONG_BE( W[12], data, 48 ); + GET_ULONG_BE( W[13], data, 52 ); + GET_ULONG_BE( W[14], data, 56 ); + GET_ULONG_BE( W[15], data, 60 ); + +#define S(x,n) ((x << n) | ((x & 0xFFFFFFFF) >> (32 - n))) + +#define R(t) \ +( \ + temp = W[(t - 3) & 0x0F] ^ W[(t - 8) & 0x0F] ^ \ + W[(t - 14) & 0x0F] ^ W[ t & 0x0F], \ + ( W[t & 0x0F] = S(temp,1) ) \ +) + +#define P(a,b,c,d,e,x) \ +{ \ + e += S(a,5) + F(b,c,d) + K + x; b = S(b,30); \ +} + + A = ctx->state[0]; + B = ctx->state[1]; + C = ctx->state[2]; + D = ctx->state[3]; + E = ctx->state[4]; + +#define F(x,y,z) (z ^ (x & (y ^ z))) +#define K 0x5A827999 + + P( A, B, C, D, E, W[0] ); + P( E, A, B, C, D, W[1] ); + P( D, E, A, B, C, W[2] ); + P( C, D, E, A, B, W[3] ); + P( B, C, D, E, A, W[4] ); + P( A, B, C, D, E, W[5] ); + P( E, A, B, C, D, W[6] ); + P( D, E, A, B, C, W[7] ); + P( C, D, E, A, B, W[8] ); + P( B, C, D, E, A, W[9] ); + P( A, B, C, D, E, W[10] ); + P( E, A, B, C, D, W[11] ); + P( D, E, A, B, C, W[12] ); + P( C, D, E, A, B, W[13] ); + P( B, C, D, E, A, W[14] ); + P( A, B, C, D, E, W[15] ); + P( E, A, B, C, D, R(16) ); + P( D, E, A, B, C, R(17) ); + P( C, D, E, A, B, R(18) ); + P( B, C, D, E, A, R(19) ); + +#undef K +#undef F + +#define F(x,y,z) (x ^ y ^ z) +#define K 0x6ED9EBA1 + + P( A, B, C, D, E, R(20) ); + P( E, A, B, C, D, R(21) ); + P( D, E, A, B, C, R(22) ); + P( C, D, E, A, B, R(23) ); + P( B, C, D, E, A, R(24) ); + P( A, B, C, D, E, R(25) ); + P( E, A, B, C, D, R(26) ); + P( D, E, A, B, C, R(27) ); + P( C, D, E, A, B, R(28) ); + P( B, C, D, E, A, R(29) ); + P( A, B, C, D, E, R(30) ); + P( E, A, B, C, D, R(31) ); + P( D, E, A, B, C, R(32) ); + P( C, D, E, A, B, R(33) ); + P( B, C, D, E, A, R(34) ); + P( A, B, C, D, E, R(35) ); + P( E, A, B, C, D, R(36) ); + P( D, E, A, B, C, R(37) ); + P( C, D, E, A, B, R(38) ); + P( B, C, D, E, A, R(39) ); + +#undef K +#undef F + +#define F(x,y,z) ((x & y) | (z & (x | y))) +#define K 0x8F1BBCDC + + P( A, B, C, D, E, R(40) ); + P( E, A, B, C, D, R(41) ); + P( D, E, A, B, C, R(42) ); + P( C, D, E, A, B, R(43) ); + P( B, C, D, E, A, R(44) ); + P( A, B, C, D, E, R(45) ); + P( E, A, B, C, D, R(46) ); + P( D, E, A, B, C, R(47) ); + P( C, D, E, A, B, R(48) ); + P( B, C, D, E, A, R(49) ); + P( A, B, C, D, E, R(50) ); + P( E, A, B, C, D, R(51) ); + P( D, E, A, B, C, R(52) ); + P( C, D, E, A, B, R(53) ); + P( B, C, D, E, A, R(54) ); + P( A, B, C, D, E, R(55) ); + P( E, A, B, C, D, R(56) ); + P( D, E, A, B, C, R(57) ); + P( C, D, E, A, B, R(58) ); + P( B, C, D, E, A, R(59) ); + +#undef K +#undef F + +#define F(x,y,z) (x ^ y ^ z) +#define K 0xCA62C1D6 + + P( A, B, C, D, E, R(60) ); + P( E, A, B, C, D, R(61) ); + P( D, E, A, B, C, R(62) ); + P( C, D, E, A, B, R(63) ); + P( B, C, D, E, A, R(64) ); + P( A, B, C, D, E, R(65) ); + P( E, A, B, C, D, R(66) ); + P( D, E, A, B, C, R(67) ); + P( C, D, E, A, B, R(68) ); + P( B, C, D, E, A, R(69) ); + P( A, B, C, D, E, R(70) ); + P( E, A, B, C, D, R(71) ); + P( D, E, A, B, C, R(72) ); + P( C, D, E, A, B, R(73) ); + P( B, C, D, E, A, R(74) ); + P( A, B, C, D, E, R(75) ); + P( E, A, B, C, D, R(76) ); + P( D, E, A, B, C, R(77) ); + P( C, D, E, A, B, R(78) ); + P( B, C, D, E, A, R(79) ); + +#undef K +#undef F + + ctx->state[0] += A; + ctx->state[1] += B; + ctx->state[2] += C; + ctx->state[3] += D; + ctx->state[4] += E; +} + +/* + * SHA-1 process buffer + */ +void sha1_update( sha1_context *ctx, unsigned char *input, int ilen ) +{ + int fill; + unsigned long left; + + if( ilen <= 0 ) + return; + + left = ctx->total[0] & 0x3F; + fill = 64 - left; + + ctx->total[0] += ilen; + ctx->total[0] &= 0xFFFFFFFF; + + if( ctx->total[0] < (unsigned long) ilen ) + ctx->total[1]++; + + if( left && ilen >= fill ) + { + memcpy( (void *) (ctx->buffer + left), + (void *) input, fill ); + sha1_process( ctx, ctx->buffer ); + input += fill; + ilen -= fill; + left = 0; + } + + while( ilen >= 64 ) + { + sha1_process( ctx, input ); + input += 64; + ilen -= 64; + } + + if( ilen > 0 ) + { + memcpy( (void *) (ctx->buffer + left), + (void *) input, ilen ); + } +} + +static const unsigned char sha1_padding[64] = +{ + 0x80, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 +}; + +/* + * SHA-1 final digest + */ +void sha1_finish( sha1_context *ctx, unsigned char output[20] ) +{ + unsigned long last, padn; + unsigned long high, low; + unsigned char msglen[8]; + + high = ( ctx->total[0] >> 29 ) + | ( ctx->total[1] << 3 ); + low = ( ctx->total[0] << 3 ); + + PUT_ULONG_BE( high, msglen, 0 ); + PUT_ULONG_BE( low, msglen, 4 ); + + last = ctx->total[0] & 0x3F; + padn = ( last < 56 ) ? ( 56 - last ) : ( 120 - last ); + + sha1_update( ctx, (unsigned char *) sha1_padding, padn ); + sha1_update( ctx, msglen, 8 ); + + PUT_ULONG_BE( ctx->state[0], output, 0 ); + PUT_ULONG_BE( ctx->state[1], output, 4 ); + PUT_ULONG_BE( ctx->state[2], output, 8 ); + PUT_ULONG_BE( ctx->state[3], output, 12 ); + PUT_ULONG_BE( ctx->state[4], output, 16 ); +} + +/* + * output = SHA-1( input buffer ) + */ +void sha1( unsigned char *input, int ilen, unsigned char output[20] ) +{ + sha1_context ctx; + + sha1_starts( &ctx ); + sha1_update( &ctx, input, ilen ); + sha1_finish( &ctx, output ); + + memset( &ctx, 0, sizeof( sha1_context ) ); +} + +/* + * output = SHA-1( file contents ) + */ +int sha1_file( char *path, unsigned char output[20] ) +{ + FILE *f; + size_t n; + sha1_context ctx; + unsigned char buf[1024]; + + if( ( f = fopen( path, "rb" ) ) == NULL ) + return( 1 ); + + sha1_starts( &ctx ); + + while( ( n = fread( buf, 1, sizeof( buf ), f ) ) > 0 ) + sha1_update( &ctx, buf, (int) n ); + + sha1_finish( &ctx, output ); + + memset( &ctx, 0, sizeof( sha1_context ) ); + + if( ferror( f ) != 0 ) + { + fclose( f ); + return( 2 ); + } + + fclose( f ); + return( 0 ); +} + +/* + * SHA-1 HMAC context setup + */ +void sha1_hmac_starts( sha1_context *ctx, unsigned char *key, int keylen ) +{ + int i; + unsigned char sum[20]; + + if( keylen > 64 ) + { + sha1( key, keylen, sum ); + keylen = 20; + key = sum; + } + + memset( ctx->ipad, 0x36, 64 ); + memset( ctx->opad, 0x5C, 64 ); + + for( i = 0; i < keylen; i++ ) + { + ctx->ipad[i] = (unsigned char)( ctx->ipad[i] ^ key[i] ); + ctx->opad[i] = (unsigned char)( ctx->opad[i] ^ key[i] ); + } + + sha1_starts( ctx ); + sha1_update( ctx, ctx->ipad, 64 ); + + memset( sum, 0, sizeof( sum ) ); +} + +/* + * SHA-1 HMAC process buffer + */ +void sha1_hmac_update( sha1_context *ctx, unsigned char *input, int ilen ) +{ + sha1_update( ctx, input, ilen ); +} + +/* + * SHA-1 HMAC final digest + */ +void sha1_hmac_finish( sha1_context *ctx, unsigned char output[20] ) +{ + unsigned char tmpbuf[20]; + + sha1_finish( ctx, tmpbuf ); + sha1_starts( ctx ); + sha1_update( ctx, ctx->opad, 64 ); + sha1_update( ctx, tmpbuf, 20 ); + sha1_finish( ctx, output ); + + memset( tmpbuf, 0, sizeof( tmpbuf ) ); +} + +/* + * output = HMAC-SHA-1( hmac key, input buffer ) + */ +void sha1_hmac( unsigned char *key, int keylen, + unsigned char *input, int ilen, + unsigned char output[20] ) +{ + sha1_context ctx; + + sha1_hmac_starts( &ctx, key, keylen ); + sha1_hmac_update( &ctx, input, ilen ); + sha1_hmac_finish( &ctx, output ); + + memset( &ctx, 0, sizeof( sha1_context ) ); +} + +#if defined(POLARSSL_SELF_TEST) +/* + * FIPS-180-1 test vectors + */ +static unsigned char sha1_test_buf[3][57] = +{ + { "abc" }, + { "abcdbcdecdefdefgefghfghighijhijkijkljklmklmnlmnomnopnopq" }, + { "" } +}; + +static const int sha1_test_buflen[3] = +{ + 3, 56, 1000 +}; + +static const unsigned char sha1_test_sum[3][20] = +{ + { 0xA9, 0x99, 0x3E, 0x36, 0x47, 0x06, 0x81, 0x6A, 0xBA, 0x3E, + 0x25, 0x71, 0x78, 0x50, 0xC2, 0x6C, 0x9C, 0xD0, 0xD8, 0x9D }, + { 0x84, 0x98, 0x3E, 0x44, 0x1C, 0x3B, 0xD2, 0x6E, 0xBA, 0xAE, + 0x4A, 0xA1, 0xF9, 0x51, 0x29, 0xE5, 0xE5, 0x46, 0x70, 0xF1 }, + { 0x34, 0xAA, 0x97, 0x3C, 0xD4, 0xC4, 0xDA, 0xA4, 0xF6, 0x1E, + 0xEB, 0x2B, 0xDB, 0xAD, 0x27, 0x31, 0x65, 0x34, 0x01, 0x6F } +}; + +/* + * RFC 2202 test vectors + */ +static unsigned char sha1_hmac_test_key[7][26] = +{ + { "\x0B\x0B\x0B\x0B\x0B\x0B\x0B\x0B\x0B\x0B\x0B\x0B\x0B\x0B\x0B\x0B" + "\x0B\x0B\x0B\x0B" }, + { "Jefe" }, + { "\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA\xAA" + "\xAA\xAA\xAA\xAA" }, + { "\x01\x02\x03\x04\x05\x06\x07\x08\x09\x0A\x0B\x0C\x0D\x0E\x0F\x10" + "\x11\x12\x13\x14\x15\x16\x17\x18\x19" }, + { "\x0C\x0C\x0C\x0C\x0C\x0C\x0C\x0C\x0C\x0C\x0C\x0C\x0C\x0C\x0C\x0C" + "\x0C\x0C\x0C\x0C" }, + { "" }, /* 0xAA 80 times */ + { "" } +}; + +static const int sha1_hmac_test_keylen[7] = +{ + 20, 4, 20, 25, 20, 80, 80 +}; + +static unsigned char sha1_hmac_test_buf[7][74] = +{ + { "Hi There" }, + { "what do ya want for nothing?" }, + { "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" + "\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD\xDD" }, + { "\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD" + "\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD" + "\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD" + "\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD" + "\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD\xCD" }, + { "Test With Truncation" }, + { "Test Using Larger Than Block-Size Key - Hash Key First" }, + { "Test Using Larger Than Block-Size Key and Larger" + " Than One Block-Size Data" } +}; + +static const int sha1_hmac_test_buflen[7] = +{ + 8, 28, 50, 50, 20, 54, 73 +}; + +static const unsigned char sha1_hmac_test_sum[7][20] = +{ + { 0xB6, 0x17, 0x31, 0x86, 0x55, 0x05, 0x72, 0x64, 0xE2, 0x8B, + 0xC0, 0xB6, 0xFB, 0x37, 0x8C, 0x8E, 0xF1, 0x46, 0xBE, 0x00 }, + { 0xEF, 0xFC, 0xDF, 0x6A, 0xE5, 0xEB, 0x2F, 0xA2, 0xD2, 0x74, + 0x16, 0xD5, 0xF1, 0x84, 0xDF, 0x9C, 0x25, 0x9A, 0x7C, 0x79 }, + { 0x12, 0x5D, 0x73, 0x42, 0xB9, 0xAC, 0x11, 0xCD, 0x91, 0xA3, + 0x9A, 0xF4, 0x8A, 0xA1, 0x7B, 0x4F, 0x63, 0xF1, 0x75, 0xD3 }, + { 0x4C, 0x90, 0x07, 0xF4, 0x02, 0x62, 0x50, 0xC6, 0xBC, 0x84, + 0x14, 0xF9, 0xBF, 0x50, 0xC8, 0x6C, 0x2D, 0x72, 0x35, 0xDA }, + { 0x4C, 0x1A, 0x03, 0x42, 0x4B, 0x55, 0xE0, 0x7F, 0xE7, 0xF2, + 0x7B, 0xE1 }, + { 0xAA, 0x4A, 0xE5, 0xE1, 0x52, 0x72, 0xD0, 0x0E, 0x95, 0x70, + 0x56, 0x37, 0xCE, 0x8A, 0x3B, 0x55, 0xED, 0x40, 0x21, 0x12 }, + { 0xE8, 0xE9, 0x9D, 0x0F, 0x45, 0x23, 0x7D, 0x78, 0x6D, 0x6B, + 0xBA, 0xA7, 0x96, 0x5C, 0x78, 0x08, 0xBB, 0xFF, 0x1A, 0x91 } +}; + +/* + * Checkup routine + */ +int sha1_self_test( int verbose ) +{ + int i, j, buflen; + unsigned char buf[1024]; + unsigned char sha1sum[20]; + sha1_context ctx; + + /* + * SHA-1 + */ + for( i = 0; i < 3; i++ ) + { + if( verbose != 0 ) + printf( " SHA-1 test #%d: ", i + 1 ); + + sha1_starts( &ctx ); + + if( i == 2 ) + { + memset( buf, 'a', buflen = 1000 ); + + for( j = 0; j < 1000; j++ ) + sha1_update( &ctx, buf, buflen ); + } + else + sha1_update( &ctx, sha1_test_buf[i], + sha1_test_buflen[i] ); + + sha1_finish( &ctx, sha1sum ); + + if( memcmp( sha1sum, sha1_test_sum[i], 20 ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + printf( "passed\n" ); + } + + if( verbose != 0 ) + printf( "\n" ); + + for( i = 0; i < 7; i++ ) + { + if( verbose != 0 ) + printf( " HMAC-SHA-1 test #%d: ", i + 1 ); + + if( i == 5 || i == 6 ) + { + memset( buf, '\xAA', buflen = 80 ); + sha1_hmac_starts( &ctx, buf, buflen ); + } + else + sha1_hmac_starts( &ctx, sha1_hmac_test_key[i], + sha1_hmac_test_keylen[i] ); + + sha1_hmac_update( &ctx, sha1_hmac_test_buf[i], + sha1_hmac_test_buflen[i] ); + + sha1_hmac_finish( &ctx, sha1sum ); + + buflen = ( i == 4 ) ? 12 : 20; + + if( memcmp( sha1sum, sha1_hmac_test_sum[i], buflen ) != 0 ) + { + if( verbose != 0 ) + printf( "failed\n" ); + + return( 1 ); + } + + if( verbose != 0 ) + printf( "passed\n" ); + } + + if( verbose != 0 ) + printf( "\n" ); + + return( 0 ); +} + +#endif + +#endif diff --git a/package/px5g/src/library/timing.c b/package/px5g/src/library/timing.c new file mode 100644 index 000000000..6b7ab740e --- /dev/null +++ b/package/px5g/src/library/timing.c @@ -0,0 +1,265 @@ +/* + * Portable interface to the CPU cycle counter + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ + +#include "polarssl/config.h" + +#if defined(POLARSSL_TIMING_C) + +#include "polarssl/timing.h" + +#if defined(WIN32) + +#include +#include + +struct _hr_time +{ + LARGE_INTEGER start; +}; + +#else + +#include +#include +#include +#include +#include + +struct _hr_time +{ + struct timeval start; +}; + +#endif + +#if (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__) + +unsigned long hardclock( void ) +{ + unsigned long tsc; + __asm rdtsc + __asm mov [tsc], eax + return( tsc ); +} + +#else +#if defined(__GNUC__) && defined(__i386__) + +unsigned long hardclock( void ) +{ + unsigned long tsc; + asm( "rdtsc" : "=a" (tsc) ); + return( tsc ); +} + +#else +#if defined(__GNUC__) && (defined(__amd64__) || defined(__x86_64__)) + +unsigned long hardclock( void ) +{ + unsigned long lo, hi; + asm( "rdtsc" : "=a" (lo), "=d" (hi) ); + return( lo | (hi << 32) ); +} + +#else +#if defined(__GNUC__) && (defined(__powerpc__) || defined(__ppc__)) + +unsigned long hardclock( void ) +{ + unsigned long tbl, tbu0, tbu1; + + do + { + asm( "mftbu %0" : "=r" (tbu0) ); + asm( "mftb %0" : "=r" (tbl ) ); + asm( "mftbu %0" : "=r" (tbu1) ); + } + while( tbu0 != tbu1 ); + + return( tbl ); +} + +#else +#if defined(__GNUC__) && defined(__sparc__) + +unsigned long hardclock( void ) +{ + unsigned long tick; + asm( ".byte 0x83, 0x41, 0x00, 0x00" ); + asm( "mov %%g1, %0" : "=r" (tick) ); + return( tick ); +} + +#else +#if defined(__GNUC__) && defined(__alpha__) + +unsigned long hardclock( void ) +{ + unsigned long cc; + asm( "rpcc %0" : "=r" (cc) ); + return( cc & 0xFFFFFFFF ); +} + +#else +#if defined(__GNUC__) && defined(__ia64__) + +unsigned long hardclock( void ) +{ + unsigned long itc; + asm( "mov %0 = ar.itc" : "=r" (itc) ); + return( itc ); +} + +#else + +static int hardclock_init = 0; +static struct timeval tv_init; + +unsigned long hardclock( void ) +{ + struct timeval tv_cur; + + if( hardclock_init == 0 ) + { + gettimeofday( &tv_init, NULL ); + hardclock_init = 1; + } + + gettimeofday( &tv_cur, NULL ); + return( ( tv_cur.tv_sec - tv_init.tv_sec ) * 1000000 + + ( tv_cur.tv_usec - tv_init.tv_usec ) ); +} + +#endif /* generic */ +#endif /* IA-64 */ +#endif /* Alpha */ +#endif /* SPARC8 */ +#endif /* PowerPC */ +#endif /* AMD64 */ +#endif /* i586+ */ + +int alarmed = 0; + +#if defined(WIN32) + +unsigned long get_timer( struct hr_time *val, int reset ) +{ + unsigned long delta; + LARGE_INTEGER offset, hfreq; + struct _hr_time *t = (struct _hr_time *) val; + + QueryPerformanceCounter( &offset ); + QueryPerformanceFrequency( &hfreq ); + + delta = (unsigned long)( ( 1000 * + ( offset.QuadPart - t->start.QuadPart ) ) / + hfreq.QuadPart ); + + if( reset ) + QueryPerformanceCounter( &t->start ); + + return( delta ); +} + +DWORD WINAPI TimerProc( LPVOID uElapse ) +{ + Sleep( (DWORD) uElapse ); + alarmed = 1; + return( TRUE ); +} + +void set_alarm( int seconds ) +{ + DWORD ThreadId; + + alarmed = 0; + CloseHandle( CreateThread( NULL, 0, TimerProc, + (LPVOID) ( seconds * 1000 ), 0, &ThreadId ) ); +} + +void m_sleep( int milliseconds ) +{ + Sleep( milliseconds ); +} + +#else + +unsigned long get_timer( struct hr_time *val, int reset ) +{ + unsigned long delta; + struct timeval offset; + struct _hr_time *t = (struct _hr_time *) val; + + gettimeofday( &offset, NULL ); + + delta = ( offset.tv_sec - t->start.tv_sec ) * 1000 + + ( offset.tv_usec - t->start.tv_usec ) / 1000; + + if( reset ) + { + t->start.tv_sec = offset.tv_sec; + t->start.tv_usec = offset.tv_usec; + } + + return( delta ); +} + +static void sighandler( int signum ) +{ + alarmed = 1; + signal( signum, sighandler ); +} + +void set_alarm( int seconds ) +{ + alarmed = 0; + signal( SIGALRM, sighandler ); + alarm( seconds ); +} + +void m_sleep( int milliseconds ) +{ + struct timeval tv; + + tv.tv_sec = milliseconds / 1000; + tv.tv_usec = milliseconds * 1000; + + select( 0, NULL, NULL, NULL, &tv ); +} + +#endif + +#endif diff --git a/package/px5g/src/library/x509write.c b/package/px5g/src/library/x509write.c new file mode 100644 index 000000000..fabee20ea --- /dev/null +++ b/package/px5g/src/library/x509write.c @@ -0,0 +1,1139 @@ +/* + * X.509 certificate and private key writing + * + * Copyright (C) 2006-2007 Pascal Vizeli + * Modifications (C) 2009 Steven Barth + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License, version 2.1 as published by the Free Software Foundation. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ +/* + * The ITU-T X.509 standard defines a certificat format for PKI. + * + * http://www.ietf.org/rfc/rfc2459.txt + * http://www.ietf.org/rfc/rfc3279.txt + * + * ftp://ftp.rsasecurity.com/pub/pkcs/ascii/pkcs-1v2.asc + * + * http://www.itu.int/ITU-T/studygroups/com17/languages/X.680-0207.pdf + * http://www.itu.int/ITU-T/studygroups/com17/languages/X.690-0207.pdf + * + * For CRS: + * http://www.faqs.org/rfcs/rfc2314.html + */ +#include "polarssl/config.h" +#include "polarssl/x509.h" +#include "polarssl/base64.h" +#include "polarssl/sha1.h" + +#include +#include +#include +#include +#include + +#define and && +#define or || + +#if defined _MSC_VER && !defined snprintf +#define snprintf _snprintf +#endif + +static int x509write_realloc_node(x509_node *node, size_t larger); +static int x509write_file(x509_node *node, char *path, int format, const char* pem_prolog, const char* pem_epilog); + +/* + * evaluate how mani octet have this integer + */ +static int asn1_eval_octet(unsigned int digit) +{ + int i, byte; + + for (byte = 4, i = 24; i >= 0; i -= 8, --byte) + if (((digit >> i) & 0xFF) != 0) + return byte; + + return 0; +} + +/* + * write the asn.1 lenght form into p + */ +static int asn1_add_len(unsigned int size, x509_node *node) +{ + if (size > 127) { + + /* long size */ + int byte = asn1_eval_octet(size); + int i = 0; + + *(node->p) = (0x80 | byte) & 0xFF; + ++node->p; + + for (i = byte; i > 0; --i) { + + *(node->p) = (size >> ((i - 1) * 8)) & 0xFF; + ++node->p; + } + + } else { + + /* short size */ + *(node->p) = size & 0xFF; + if (size != 0) + ++node->p; + } + + return 0; +} + +/* + * write a ans.1 object into p + */ +static int asn1_add_obj(unsigned char *value, unsigned int size, int tag, + x509_node *node) +{ + int tl = 2; + + if (tag == ASN1_BIT_STRING) + ++tl; + + if (size > 127) + x509write_realloc_node(node, (size_t) size + tl + + asn1_eval_octet(size)); + else + x509write_realloc_node(node, (size_t) size + tl); + + if (node->data == NULL) + return 1; + + /* tag */ + *(node->p) = tag & 0xFF; + ++node->p; + + /* len */ + if (tag == ASN1_BIT_STRING) { + asn1_add_len((unsigned int) size + 1, node); + *(node->p) = 0x00; + ++node->p; + } else { + asn1_add_len((unsigned int) size, node); + } + + /* value */ + if (size > 0) { + + memcpy(node->p, value, (size_t) size); + if ((node->p += size -1) != node->end) + return POLARSSL_ERR_X509_POINT_ERROR; + } else { + /* make nothing -> NULL */ + } + + return 0; +} + +/* + * write a asn.1 conform integer object + */ +static int asn1_add_int(signed int value, x509_node *node) +{ + signed int i = 0, neg = 1; + unsigned int byte, u_val = 0, tmp_val = 0; + + /* if negate? */ + if (value < 0) { + neg = -1; + u_val = ~value; + } else { + u_val = value; + } + + byte = asn1_eval_octet(u_val); + /* 0 isn't NULL */ + if (byte == 0) + byte = 1; + + /* ASN.1 integer is signed! */ + if (byte < 4 and ((u_val >> ((byte -1) * 8)) & 0xFF) == 0x80) + byte += 1; + + if (x509write_realloc_node(node, (size_t) byte + 2) != 0) + return 1; + + /* tag */ + *(node->p) = ASN1_INTEGER; + ++node->p; + + /* len */ + asn1_add_len(byte, node); + + /* value */ + for (i = byte; i > 0; --i) { + + tmp_val = (u_val >> ((i - 1) * 8)) & 0xFF; + if (neg == 1) + *(node->p) = tmp_val; + else + *(node->p) = ~tmp_val; + + if (i > 1) + ++node->p; + } + + if (node->p != node->end) + return POLARSSL_ERR_X509_POINT_ERROR; + + return 0; +} + +/* + * write a asn.1 conform mpi object + */ +static int asn1_add_mpi(mpi *value, int tag, x509_node *node) +{ + size_t size = (mpi_msb(value) / 8) + 1; + unsigned char *buf; + int buf_len = (int) size, tl = 2; + + if (tag == ASN1_BIT_STRING) + ++tl; + + if (size > 127) + x509write_realloc_node(node, size + (size_t) tl + + asn1_eval_octet((unsigned int)size)); + else + x509write_realloc_node(node, size + (size_t) tl); + + if (node->data == NULL) + return 1; + + buf = (unsigned char*) malloc(size); + if (mpi_write_binary(value, buf, buf_len) != 0) + return POLARSSL_ERR_MPI_BUFFER_TOO_SMALL; + + /* tag */ + *(node->p) = tag & 0xFF; + ++node->p; + + /* len */ + if (tag == ASN1_BIT_STRING) { + asn1_add_len((unsigned int) size + 1, node); + *(node->p) = 0x00; + ++node->p; + } else { + asn1_add_len((unsigned int) size, node); + } + + /* value */ + memcpy(node->p, buf, size); + free(buf); + + if ((node->p += (int) size -1) != node->end) + return POLARSSL_ERR_X509_POINT_ERROR; + + return 0; +} + +/* + * write a node into asn.1 conform object + */ +static int asn1_append_tag(x509_node *node, int tag) +{ + int tl = 2; + + x509_node tmp; + x509write_init_node(&tmp); + + if (tag == ASN1_BIT_STRING) + ++tl; + + if (node->len > 127) + x509write_realloc_node(&tmp, node->len + (size_t) tl + + asn1_eval_octet((unsigned int)node->len)); + else + x509write_realloc_node(&tmp, node->len + (size_t) tl); + + if (tmp.data == NULL) { + x509write_free_node(&tmp); + return 1; + } + + /* tag */ + *(tmp.p) = tag & 0xFF; + ++tmp.p; + + /* len */ + if (tag == ASN1_BIT_STRING) { + asn1_add_len((unsigned int) node->len + 1, &tmp); + *(tmp.p) = 0x00; + ++tmp.p; + } else { + asn1_add_len((unsigned int) node->len, &tmp); + } + + /* value */ + memcpy(tmp.p, node->data, node->len); + + /* good? */ + if ((tmp.p += (int) node->len -1) != tmp.end) { + x509write_free_node(&tmp); + return POLARSSL_ERR_X509_POINT_ERROR; + } + + free(node->data); + node->data = tmp.data; + node->p = tmp.p; + node->end = tmp.end; + node->len = tmp.len; + + return 0; +} + +/* + * write nodes into a asn.1 object + */ +static int asn1_append_nodes(x509_node *node, int tag, int anz, ...) +{ + va_list ap; + size_t size = 0; + x509_node *tmp; + int count; + + va_start(ap, anz); + count = anz; + + while (count--) { + + tmp = va_arg(ap, x509_node*); + if (tmp->data != NULL) + size += tmp->len; + } + + if ( size > 127) { + if (x509write_realloc_node(node, size + (size_t) 2 + + asn1_eval_octet(size)) != 0) + return 1; + } else { + if (x509write_realloc_node(node, size + (size_t) 2) != 0) + return 1; + } + + /* tag */ + *(node->p) = tag & 0xFF; + ++node->p; + + /* len */ + asn1_add_len(size, node); + + /* value */ + va_start(ap, anz); + count = anz; + + while (count--) { + + tmp = va_arg(ap, x509_node*); + if (tmp->data != NULL) { + + memcpy(node->p, tmp->data, tmp->len); + if ((node->p += (int) tmp->len -1) != node->end) + ++node->p; + } + } + + va_end(ap); + return 0; +} + +/* + * write a ASN.1 conform object identifiere include a "tag" + */ +static int asn1_add_oid(x509_node *node, unsigned char *oid, size_t len, + int tag, int tag_val, unsigned char *value, size_t val_len) +{ + int ret; + x509_node tmp; + + x509write_init_node(&tmp); + + /* OBJECT IDENTIFIER */ + if ((ret = asn1_add_obj(oid, len, ASN1_OID, &tmp)) != 0) { + x509write_free_node(&tmp); + return ret; + } + + /* value */ + if ((ret = asn1_add_obj(value, val_len, tag_val, &tmp)) != 0) { + x509write_free_node(&tmp); + return ret; + } + + /* SET/SEQUENCE */ + if ((ret = asn1_append_nodes(node, tag, 1, &tmp)) != 0) { + x509write_free_node(&tmp); + return ret; + } + + x509write_free_node(&tmp); + return 0; +} + +/* + * utcTime UTCTime + */ +static int asn1_add_date_utc(unsigned char *time, x509_node *node) +{ + unsigned char date[13], *sp; + x509_time xtime; + int ret; + + sscanf((char*)time, "%d-%d-%d %d:%d:%d", &xtime.year, &xtime.mon, + &xtime.day, &xtime.hour, &xtime.min, &xtime.sec); + + /* convert to YY */ + if (xtime.year > 2000) + xtime.year -= 2000; + else + xtime.year -= 1900; + + snprintf((char*)date, 13, "%2d%2d%2d%2d%2d%2d", xtime.year, xtime.mon, xtime.day, + xtime.hour, xtime.min, xtime.sec); + + /* replace ' ' to '0' */ + for (sp = date; *sp != '\0'; ++sp) + if (*sp == '\x20') + *sp = '\x30'; + + date[12] = 'Z'; + + if ((ret = asn1_add_obj(date, 13, ASN1_UTC_TIME, node)) != 0) + return ret; + + return 0; +} + +/* + * serialize an rsa key into DER + */ + +int x509write_serialize_key(rsa_context *rsa, x509_node *node) +{ + int ret = 0; + x509write_init_node(node); + + /* vers, n, e, d, p, q, dp, dq, pq */ + if ((ret = asn1_add_int(rsa->ver, node)) != 0) + return ret; + if ((ret = asn1_add_mpi(&rsa->N, ASN1_INTEGER, node)) != 0) + return ret; + if ((ret = asn1_add_mpi(&rsa->E, ASN1_INTEGER, node)) != 0) + return ret; + if ((ret = asn1_add_mpi(&rsa->D, ASN1_INTEGER, node)) != 0) + return ret; + if ((ret = asn1_add_mpi(&rsa->P, ASN1_INTEGER, node)) != 0) + return ret; + if ((ret = asn1_add_mpi(&rsa->Q, ASN1_INTEGER, node)) != 0) + return ret; + if ((ret = asn1_add_mpi(&rsa->DP, ASN1_INTEGER, node)) != 0) + return ret; + if ((ret = asn1_add_mpi(&rsa->DQ, ASN1_INTEGER, node)) != 0) + return ret; + if ((ret = asn1_add_mpi(&rsa->QP, ASN1_INTEGER, node)) != 0) + return ret; + if ((ret = asn1_append_tag(node, ASN1_CONSTRUCTED | ASN1_SEQUENCE)) != 0) + return ret; + + return 0; +} + +/* + * write a der/pem encoded rsa private key into a file + */ +int x509write_keyfile(rsa_context *rsa, char *path, int out_flag) +{ + int ret = 0; + const char key_beg[] = "-----BEGIN RSA PRIVATE KEY-----\n", + key_end[] = "-----END RSA PRIVATE KEY-----\n"; + x509_node node; + + x509write_init_node(&node); + if ((ret = x509write_serialize_key(rsa,&node)) != 0) { + x509write_free_node(&node); + return ret; + } + + ret = x509write_file(&node,path,out_flag,key_beg,key_end); + x509write_free_node(&node); + + return ret; +} + + +/* + * reasize the memory for node + */ +static int x509write_realloc_node(x509_node *node, size_t larger) +{ + /* init len */ + if (node->data == NULL) { + node->len = 0; + node->data = malloc(larger); + if(node->data == NULL) + return 1; + } else { + /* realloc memory */ + if ((node->data = realloc(node->data, node->len + larger)) == NULL) + return 1; + } + + /* init pointer */ + node->p = &node->data[node->len]; + node->len += larger; + node->end = &node->data[node->len -1]; + + return 0; +} + +/* + * init node + */ +void x509write_init_node(x509_node *node) +{ + memset(node, 0, sizeof(x509_node)); +} + +/* + * clean memory + */ +void x509write_free_node(x509_node *node) +{ + if (node->data != NULL) + free(node->data); + node->p = NULL; + node->end = NULL; + node->len = 0; +} + +/* + * write a x509 certificate into file + */ +int x509write_crtfile(x509_raw *chain, unsigned char *path, int out_flag) +{ + const char cer_beg[] = "-----BEGIN CERTIFICATE-----\n", + cer_end[] = "-----END CERTIFICATE-----\n"; + + return x509write_file(&chain->raw, (char*)path, out_flag, cer_beg, cer_end); +} + +/* + * write a x509 certificate into file + */ +int x509write_csrfile(x509_raw *chain, unsigned char *path, int out_flag) +{ + const char cer_beg[] = "-----BEGIN CERTIFICATE REQUEST-----\n", + cer_end[] = "-----END CERTIFICATE REQUEST-----\n"; + + return x509write_file(&chain->raw, (char*)path, out_flag, cer_beg, cer_end); +} + +/* + * write an x509 file + */ +static int x509write_file(x509_node *node, char *path, int format, + const char* pem_prolog, const char* pem_epilog) +{ + FILE *ofstream = stdout; + int is_err = 1, buf_len, i, n; + unsigned char* base_buf; + + if (path) { + if ((ofstream = fopen(path, "wb")) == NULL) + return 1; + } + + switch (format) { + case X509_OUTPUT_DER: + if (fwrite(node->data, 1, node->len, ofstream) + != node->len) + is_err = -1; + break; + + case X509_OUTPUT_PEM: + if (fprintf(ofstream,pem_prolog)<0) { + is_err = -1; + break; + } + + buf_len = node->len << 1; + base_buf = (unsigned char*) malloc((size_t)buf_len); + memset(base_buf,0,buf_len); + if (base64_encode(base_buf, &buf_len, node->data, + (int) node->len) != 0) { + is_err = -1; + break; + } + + n=strlen((char*)base_buf); + for(i=0;isubpubkey; + + x509write_init_node(&n_tmp); + x509write_init_node(&n_tmp2); + + /* + * RSAPublicKey ::= SEQUENCE { + * modulus INTEGER, -- n + * publicExponent INTEGER -- e + * } + */ + if ((ret = asn1_add_mpi(&pubkey->N, ASN1_INTEGER, &n_tmp)) != 0) { + x509write_free_node(&n_tmp); + x509write_free_node(&n_tmp2); + return ret; + } + if ((ret = asn1_add_mpi(&pubkey->E, ASN1_INTEGER, &n_tmp)) != 0) { + x509write_free_node(&n_tmp); + x509write_free_node(&n_tmp2); + return ret; + } + if ((ret = asn1_append_tag(&n_tmp, ASN1_CONSTRUCTED | ASN1_SEQUENCE)) + != 0) { + x509write_free_node(&n_tmp); + x509write_free_node(&n_tmp2); + return ret; + } + + /* + * SubjectPublicKeyInfo ::= SEQUENCE { + * algorithm AlgorithmIdentifier, + * subjectPublicKey BIT STRING } + */ + if ((ret = asn1_append_tag(&n_tmp, ASN1_BIT_STRING)) != 0) { + x509write_free_node(&n_tmp); + x509write_free_node(&n_tmp2); + return ret; + } + if ((ret = asn1_add_oid(&n_tmp2, (unsigned char*)OID_PKCS1_RSA, 9, + ASN1_CONSTRUCTED | ASN1_SEQUENCE, ASN1_NULL, + (unsigned char *)"", 0)) != 0) { + x509write_free_node(&n_tmp); + x509write_free_node(&n_tmp2); + return ret; + } + + if ((ret = asn1_append_nodes(node, ASN1_CONSTRUCTED | ASN1_SEQUENCE, 2, + &n_tmp2, &n_tmp))) { + x509write_free_node(&n_tmp); + x509write_free_node(&n_tmp2); + return ret; + } + + x509write_free_node(&n_tmp); + x509write_free_node(&n_tmp2); + return 0; +} + +/* + * RelativeDistinguishedName ::= + * SET OF AttributeTypeAndValue + * + * AttributeTypeAndValue ::= SEQUENCE { + * type AttributeType, + * value AttributeValue } + */ +static int x509write_add_name(x509_node *node, unsigned char *oid, + unsigned int oid_len, unsigned char *value, int len, int value_tag) +{ + int ret; + x509_node n_tmp; + + x509write_init_node(&n_tmp); + + if ((ret = asn1_add_oid(&n_tmp, oid, oid_len, + ASN1_CONSTRUCTED | ASN1_SEQUENCE, value_tag, + value, len))) { + x509write_free_node(&n_tmp); + return ret; + } + + if ((asn1_append_nodes(node, ASN1_CONSTRUCTED | ASN1_SET, 1, &n_tmp)) + != 0) { + x509write_free_node(&n_tmp); + return ret; + } + + x509write_free_node(&n_tmp); + return 0; +} + +/* + * Parse the name string and add to node + */ +static int x509write_parse_names(x509_node *node, unsigned char *names) +{ + unsigned char *sp, *begin = NULL; + unsigned char oid[3] = OID_X520, tag[4], *tag_sp = tag; + unsigned char *C = NULL, *CN = NULL, *O = NULL, *OU = NULL, + *ST = NULL, *L = NULL, *R = NULL; + int C_len = 0, CN_len = 0, O_len = 0, OU_len = 0, ST_len = 0, + L_len = 0, R_len = 0; + int ret = 0, is_tag = 1, is_begin = -1, len = 0; + + + for (sp = names; ; ++sp) { + + /* filter tag */ + if (is_tag == 1) { + + if (tag_sp == &tag[3]) + return POLARSSL_ERR_X509_VALUE_TO_LENGTH; + + /* is tag end? */ + if (*sp == '=') { + is_tag = -1; + *tag_sp = '\0'; + is_begin = 1; + /* set len 0 (reset) */ + len = 0; + } else { + /* tag hasn't ' '! */ + if (*sp != ' ') { + *tag_sp = *sp; + ++tag_sp; + } + } + /* filter value */ + } else { + + /* set pointer of value begin */ + if (is_begin == 1) { + begin = sp; + is_begin = -1; + } + + /* is value at end? */ + if (*sp == ';' or *sp == '\0') { + is_tag = 1; + + /* common name */ + if (tag[0] == 'C' and tag[1] == 'N') { + CN = begin; + CN_len = len; + + /* organization */ + } else if (tag[0] == 'O' and tag[1] == '\0') { + O = begin; + O_len = len; + + /* country */ + } else if (tag[0] == 'C' and tag[1] == '\0') { + C = begin; + C_len = len; + + /* organisation unit */ + } else if (tag[0] == 'O' and tag[1] == 'U') { + OU = begin; + OU_len = len; + + /* state */ + } else if (tag[0] == 'S' and tag[1] == 'T') { + ST = begin; + ST_len = len; + + /* locality */ + } else if (tag[0] == 'L' and tag[1] == '\0') { + L = begin; + L_len = len; + + /* email */ + } else if (tag[0] == 'R' and tag[1] == '\0') { + R = begin; + R_len = len; + } + + /* set tag poiner to begin */ + tag_sp = tag; + + /* is at end? */ + if (*sp == '\0' or *(sp +1) == '\0') + break; + } else { + ++len; + } + } + + /* make saver */ + if (*sp == '\0') + break; + } /* end for */ + + /* country */ + if (C != NULL) { + oid[2] = X520_COUNTRY; + if ((ret = x509write_add_name(node, oid, 3, C, C_len, + ASN1_PRINTABLE_STRING)) != 0) + return ret; + } + + /* state */ + if (ST != NULL) { + oid[2] = X520_STATE; + if ((ret = x509write_add_name(node, oid, 3, ST, ST_len, + ASN1_PRINTABLE_STRING)) != 0) + return ret; + } + + /* locality */ + if (L != NULL) { + oid[2] = X520_LOCALITY; + if ((ret = x509write_add_name(node, oid, 3, L, L_len, + ASN1_PRINTABLE_STRING)) != 0) + return ret; + } + + /* organization */ + if (O != NULL) { + oid[2] = X520_ORGANIZATION; + if ((ret = x509write_add_name(node, oid, 3, O, O_len, + ASN1_PRINTABLE_STRING)) != 0) + return ret; + } + + /* organisation unit */ + if (OU != NULL) { + oid[2] = X520_ORG_UNIT; + if ((ret = x509write_add_name(node, oid, 3, OU, OU_len, + ASN1_PRINTABLE_STRING)) != 0) + return ret; + } + + /* common name */ + if (CN != NULL) { + oid[2] = X520_COMMON_NAME; + if ((ret = x509write_add_name(node, oid, 3, CN, CN_len, + ASN1_PRINTABLE_STRING)) != 0) + return ret; + } + + /* email */ + if (R != NULL) { + if ((ret = x509write_add_name(node, (unsigned char*)OID_PKCS9_EMAIL, + 9, R, R_len, ASN1_IA5_STRING)) != 0) + return ret; + } + + if ((asn1_append_tag(node, ASN1_CONSTRUCTED | ASN1_SEQUENCE)) != 0) + return ret; + + return 0; +} + +/* + * Copy raw data from orginal ca to node + */ +static int x509write_copy_from_raw(x509_node *node, x509_buf *raw) +{ + if (x509write_realloc_node(node, raw->len) != 0) + return 1; + + memcpy(node->p, raw->p, (size_t)raw->len); + if ((node->p += raw->len -1) != node->end) + return POLARSSL_ERR_X509_POINT_ERROR; + + return 0; +} + +/* + * Add the issuer + */ + +int x509write_add_issuer(x509_raw *crt, unsigned char *issuer) +{ + return x509write_parse_names(&crt->issuer, issuer); +} + +/* + * Add the subject + */ +int x509write_add_subject(x509_raw *crt, unsigned char *subject) +{ + return x509write_parse_names(&crt->subject, subject); +} + +/* + * Copy issuer line from another cert to issuer + */ +int x509write_copy_issuer(x509_raw *crt, x509_cert *from_crt) +{ + return x509write_copy_from_raw(&crt->issuer, &from_crt->issuer_raw); +} + +/* + * Copy subject line from another cert + */ +int x509write_copy_subject(x509_raw *crt, x509_cert *from_crt) +{ + return x509write_copy_from_raw(&crt->subject, &from_crt->subject_raw); +} + +/* + * Copy subject line form antoher cert into issuer + */ +int x509write_copy_issuer_form_subject(x509_raw *crt, + x509_cert *from_crt) +{ + return x509write_copy_from_raw(&crt->issuer, &from_crt->subject_raw); +} + +/* + * Copy issuer line from another cert into subject + */ +int x509write_copy_subject_from_issuer(x509_raw *crt, + x509_cert * from_crt) +{ + return x509write_copy_from_raw(&crt->subject, &from_crt->issuer_raw); +} + +/* + * Validity ::= SEQUENCE { + * notBefore Time, + * notAfter Time } + * + * Time ::= CHOICE { + * utcTime UTCTime, + * generalTime GeneralizedTime } + */ +/* TODO: No handle GeneralizedTime! */ +int x509write_add_validity(x509_raw *chain, unsigned char *befor, + unsigned char *after) +{ + int ret; + + x509_node *node = &chain->validity; + + /* notBefore */ + if ((ret = asn1_add_date_utc(befor, node)) != 0) + return ret; + + /* notAfter */ + if ((ret = asn1_add_date_utc(after, node)) != 0) + return ret; + + if ((ret = asn1_append_tag(node, ASN1_CONSTRUCTED | ASN1_SEQUENCE)) != 0) + return ret; + + return 0; +} + +/* + * make hash from tbs and sign that with private key + */ +static int x509write_make_sign(x509_raw *chain, rsa_context *privkey) +{ + int ret; + unsigned char hash[20], *sign; + size_t sign_len = (size_t) mpi_size(&privkey->N); + + /* make hash */ + sha1(chain->tbs.data, chain->tbs.len, hash); + + /* create sign */ + sign = (unsigned char *) malloc(sign_len); + if (sign == NULL) + return 1; + + if ((ret = rsa_pkcs1_sign(privkey, RSA_PRIVATE, RSA_SHA1, 20, hash, + sign)) != 0) + return ret; + + if ((ret = asn1_add_obj(sign, sign_len, ASN1_BIT_STRING, + &chain->sign)) != 0) + return ret; + + /* + * AlgorithmIdentifier ::= SEQUENCE { + * algorithm OBJECT IDENTIFIER, + * parameters ANY DEFINED BY algorithm OPTIONAL } + */ + return asn1_add_oid(&chain->signalg, (unsigned char*)OID_PKCS1_RSA_SHA, 9, + ASN1_CONSTRUCTED | ASN1_SEQUENCE, ASN1_NULL, + (unsigned char*)"", 0); +} + +/* + * Create a self signed certificate + */ +int x509write_create_sign(x509_raw *chain, rsa_context *privkey) +{ + int ret, serial; + + /* + * Version ::= INTEGER { v1(0), v2(1), v3(2) } + */ + if ((ret = asn1_add_int(2, &chain->version)) != 0) + return ret; + + if ((ret = asn1_append_tag(&chain->version, ASN1_CONTEXT_SPECIFIC | + ASN1_CONSTRUCTED)) != 0) + return ret; + + + /* + * CertificateSerialNumber ::= INTEGER + */ + srand((unsigned int) time(NULL)); + serial = rand(); + if ((ret = asn1_add_int(serial, &chain->serial)) != 0) + return ret; + + /* + * AlgorithmIdentifier ::= SEQUENCE { + * algorithm OBJECT IDENTIFIER, + * parameters ANY DEFINED BY algorithm OPTIONAL } + */ + if ((ret = asn1_add_oid(&chain->tbs_signalg, + (unsigned char*)OID_PKCS1_RSA_SHA, 9, ASN1_CONSTRUCTED | + ASN1_SEQUENCE, ASN1_NULL, (unsigned char*)"", 0)) != 0) + return ret; + + /* + * Create the tbs + */ + if ((ret = asn1_append_nodes(&chain->tbs, ASN1_CONSTRUCTED | + ASN1_SEQUENCE, 7, &chain->version, &chain->serial, + &chain->tbs_signalg, &chain->issuer, &chain->validity, + &chain->subject, &chain->subpubkey)) != 0) + return ret; + + /* make signing */ + if ((ret = x509write_make_sign(chain, privkey)) != 0) + return ret; + + /* finishing */ + if ((ret = asn1_append_nodes(&chain->raw, ASN1_CONSTRUCTED | + ASN1_SEQUENCE, 3, &chain->tbs, &chain->signalg, + &chain->sign)) != 0) + return ret; + + return 0; +} + +int x509write_create_selfsign(x509_raw *chain, rsa_context *privkey) +{ + /* + * On self signed certificate are subject and issuer the same + */ + x509write_free_node(&chain->issuer); + chain->issuer = chain->subject; + return x509write_create_sign(chain, privkey); +} + +/* + * CertificationRequestInfo ::= SEQUENCE { + * version Version, + * subject Name, + * subjectPublicKeyInfo SubjectPublicKeyInfo, + * attributes [0] IMPLICIT Attributes } + * + * CertificationRequest ::= SEQUENCE { + * certificationRequestInfo CertificationRequestInfo, + * signatureAlgorithm SignatureAlgorithmIdentifier, + * signature Signature } + * + * It use chain.serail for attributes! + * + */ +int x509write_create_csr(x509_raw *chain, rsa_context *privkey) +{ + int ret; + + /* version ::= INTEGER */ + if ((ret = asn1_add_int(0, &chain->version)) != 0) + return ret; + + /* write attributes */ + if ((ret = asn1_add_obj((unsigned char*)"", 0, ASN1_CONTEXT_SPECIFIC | + ASN1_CONSTRUCTED, &chain->serial)) != 0) + return ret; + + /* create CertificationRequestInfo */ + if ((ret = asn1_append_nodes(&chain->tbs, ASN1_CONSTRUCTED | + ASN1_SEQUENCE, 4, &chain->version, &chain->subject, + &chain->subpubkey, &chain->serial)) != 0) + return ret; + + /* make signing */ + if ((ret = x509write_make_sign(chain, privkey)) != 0) + return ret; + + /* finish */ + if ((ret = asn1_append_nodes(&chain->raw, ASN1_CONSTRUCTED | ASN1_SEQUENCE, + 3, &chain->tbs, &chain->signalg, &chain->sign)) != 0) + return ret; + + return ret; +} + +/* + * Free memory + */ +void x509write_free_raw(x509_raw *chain) +{ + x509write_free_node(&chain->raw); + x509write_free_node(&chain->tbs); + x509write_free_node(&chain->version); + x509write_free_node(&chain->serial); + x509write_free_node(&chain->tbs_signalg); + x509write_free_node(&chain->issuer); + x509write_free_node(&chain->validity); + if (chain->subject.data != chain->issuer.data) + x509write_free_node(&chain->subject); + x509write_free_node(&chain->subpubkey); + x509write_free_node(&chain->signalg); + x509write_free_node(&chain->sign); +} + +void x509write_init_raw(x509_raw *chain) +{ + memset((void *) chain, 0, sizeof(x509_raw)); +} + diff --git a/package/px5g/src/polarssl/base64.h b/package/px5g/src/polarssl/base64.h new file mode 100644 index 000000000..c48267b1b --- /dev/null +++ b/package/px5g/src/polarssl/base64.h @@ -0,0 +1,93 @@ +/** + * \file base64.h + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef POLARSSL_BASE64_H +#define POLARSSL_BASE64_H + +#define POLARSSL_ERR_BASE64_BUFFER_TOO_SMALL -0x0010 +#define POLARSSL_ERR_BASE64_INVALID_CHARACTER -0x0012 + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Encode a buffer into base64 format + * + * \param dst destination buffer + * \param dlen size of the buffer + * \param src source buffer + * \param slen amount of data to be encoded + * + * \return 0 if successful, or POLARSSL_ERR_BASE64_BUFFER_TOO_SMALL. + * *dlen is always updated to reflect the amount + * of data that has (or would have) been written. + * + * \note Call this function with *dlen = 0 to obtain the + * required buffer size in *dlen + */ +int base64_encode( unsigned char *dst, int *dlen, + unsigned char *src, int slen ); + +/** + * \brief Decode a base64-formatted buffer + * + * \param dst destination buffer + * \param dlen size of the buffer + * \param src source buffer + * \param slen amount of data to be decoded + * + * \return 0 if successful, POLARSSL_ERR_BASE64_BUFFER_TOO_SMALL, or + * POLARSSL_ERR_BASE64_INVALID_DATA if the input data is not + * correct. *dlen is always updated to reflect the amount + * of data that has (or would have) been written. + * + * \note Call this function with *dlen = 0 to obtain the + * required buffer size in *dlen + */ +int base64_decode( unsigned char *dst, int *dlen, + unsigned char *src, int slen ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int base64_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* base64.h */ diff --git a/package/px5g/src/polarssl/bignum.h b/package/px5g/src/polarssl/bignum.h new file mode 100644 index 000000000..c66730332 --- /dev/null +++ b/package/px5g/src/polarssl/bignum.h @@ -0,0 +1,437 @@ +/** + * \file bignum.h + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef POLARSSL_BIGNUM_H +#define POLARSSL_BIGNUM_H + +#include + +#define POLARSSL_ERR_MPI_FILE_IO_ERROR -0x0002 +#define POLARSSL_ERR_MPI_BAD_INPUT_DATA -0x0004 +#define POLARSSL_ERR_MPI_INVALID_CHARACTER -0x0006 +#define POLARSSL_ERR_MPI_BUFFER_TOO_SMALL -0x0008 +#define POLARSSL_ERR_MPI_NEGATIVE_VALUE -0x000A +#define POLARSSL_ERR_MPI_DIVISION_BY_ZERO -0x000C +#define POLARSSL_ERR_MPI_NOT_ACCEPTABLE -0x000E + +#define MPI_CHK(f) if( ( ret = f ) != 0 ) goto cleanup + +/* + * Define the base integer type, architecture-wise + */ +#if defined(POLARSSL_HAVE_INT8) +typedef unsigned char t_int; +typedef unsigned short t_dbl; +#else +#if defined(POLARSSL_HAVE_INT16) +typedef unsigned short t_int; +typedef unsigned long t_dbl; +#else + typedef unsigned long t_int; + #if defined(_MSC_VER) && defined(_M_IX86) + typedef unsigned __int64 t_dbl; + #else + #if defined(__amd64__) || defined(__x86_64__) || \ + defined(__ppc64__) || defined(__powerpc64__) || \ + defined(__ia64__) || defined(__alpha__) + typedef unsigned int t_dbl __attribute__((mode(TI))); + #else + typedef unsigned long long t_dbl; + #endif + #endif +#endif +#endif + +/** + * \brief MPI structure + */ +typedef struct +{ + int s; /*!< integer sign */ + int n; /*!< total # of limbs */ + t_int *p; /*!< pointer to limbs */ +} +mpi; + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Initialize one or more mpi + */ +void mpi_init( mpi *X, ... ); + +/** + * \brief Unallocate one or more mpi + */ +void mpi_free( mpi *X, ... ); + +/** + * \brief Enlarge to the specified number of limbs + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_grow( mpi *X, int nblimbs ); + +/** + * \brief Copy the contents of Y into X + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_copy( mpi *X, mpi *Y ); + +/** + * \brief Swap the contents of X and Y + */ +void mpi_swap( mpi *X, mpi *Y ); + +/** + * \brief Set value from integer + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_lset( mpi *X, int z ); + +/** + * \brief Return the number of least significant bits + */ +int mpi_lsb( mpi *X ); + +/** + * \brief Return the number of most significant bits + */ +int mpi_msb( mpi *X ); + +/** + * \brief Return the total size in bytes + */ +int mpi_size( mpi *X ); + +/** + * \brief Import from an ASCII string + * + * \param X destination mpi + * \param radix input numeric base + * \param s null-terminated string buffer + * + * \return 0 if successful, or an POLARSSL_ERR_MPI_XXX error code + */ +int mpi_read_string( mpi *X, int radix, char *s ); + +/** + * \brief Export into an ASCII string + * + * \param X source mpi + * \param radix output numeric base + * \param s string buffer + * \param slen string buffer size + * + * \return 0 if successful, or an POLARSSL_ERR_MPI_XXX error code + * + * \note Call this function with *slen = 0 to obtain the + * minimum required buffer size in *slen. + */ +int mpi_write_string( mpi *X, int radix, char *s, int *slen ); + +/** + * \brief Read X from an opened file + * + * \param X destination mpi + * \param radix input numeric base + * \param fin input file handle + * + * \return 0 if successful, or an POLARSSL_ERR_MPI_XXX error code + */ +int mpi_read_file( mpi *X, int radix, FILE *fin ); + +/** + * \brief Write X into an opened file, or stdout + * + * \param p prefix, can be NULL + * \param X source mpi + * \param radix output numeric base + * \param fout output file handle + * + * \return 0 if successful, or an POLARSSL_ERR_MPI_XXX error code + * + * \note Set fout == NULL to print X on the console. + */ +int mpi_write_file( char *p, mpi *X, int radix, FILE *fout ); + +/** + * \brief Import X from unsigned binary data, big endian + * + * \param X destination mpi + * \param buf input buffer + * \param buflen input buffer size + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_read_binary( mpi *X, unsigned char *buf, int buflen ); + +/** + * \brief Export X into unsigned binary data, big endian + * + * \param X source mpi + * \param buf output buffer + * \param buflen output buffer size + * + * \return 0 if successful, + * POLARSSL_ERR_MPI_BUFFER_TOO_SMALL if buf isn't large enough + * + * \note Call this function with *buflen = 0 to obtain the + * minimum required buffer size in *buflen. + */ +int mpi_write_binary( mpi *X, unsigned char *buf, int buflen ); + +/** + * \brief Left-shift: X <<= count + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_shift_l( mpi *X, int count ); + +/** + * \brief Right-shift: X >>= count + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_shift_r( mpi *X, int count ); + +/** + * \brief Compare unsigned values + * + * \return 1 if |X| is greater than |Y|, + * -1 if |X| is lesser than |Y| or + * 0 if |X| is equal to |Y| + */ +int mpi_cmp_abs( mpi *X, mpi *Y ); + +/** + * \brief Compare signed values + * + * \return 1 if X is greater than Y, + * -1 if X is lesser than Y or + * 0 if X is equal to Y + */ +int mpi_cmp_mpi( mpi *X, mpi *Y ); + +/** + * \brief Compare signed values + * + * \return 1 if X is greater than z, + * -1 if X is lesser than z or + * 0 if X is equal to z + */ +int mpi_cmp_int( mpi *X, int z ); + +/** + * \brief Unsigned addition: X = |A| + |B| + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_add_abs( mpi *X, mpi *A, mpi *B ); + +/** + * \brief Unsigned substraction: X = |A| - |B| + * + * \return 0 if successful, + * POLARSSL_ERR_MPI_NEGATIVE_VALUE if B is greater than A + */ +int mpi_sub_abs( mpi *X, mpi *A, mpi *B ); + +/** + * \brief Signed addition: X = A + B + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_add_mpi( mpi *X, mpi *A, mpi *B ); + +/** + * \brief Signed substraction: X = A - B + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_sub_mpi( mpi *X, mpi *A, mpi *B ); + +/** + * \brief Signed addition: X = A + b + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_add_int( mpi *X, mpi *A, int b ); + +/** + * \brief Signed substraction: X = A - b + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_sub_int( mpi *X, mpi *A, int b ); + +/** + * \brief Baseline multiplication: X = A * B + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_mul_mpi( mpi *X, mpi *A, mpi *B ); + +/** + * \brief Baseline multiplication: X = A * b + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_mul_int( mpi *X, mpi *A, t_int b ); + +/** + * \brief Division by mpi: A = Q * B + R + * + * \return 0 if successful, + * 1 if memory allocation failed, + * POLARSSL_ERR_MPI_DIVISION_BY_ZERO if B == 0 + * + * \note Either Q or R can be NULL. + */ +int mpi_div_mpi( mpi *Q, mpi *R, mpi *A, mpi *B ); + +/** + * \brief Division by int: A = Q * b + R + * + * \return 0 if successful, + * 1 if memory allocation failed, + * POLARSSL_ERR_MPI_DIVISION_BY_ZERO if b == 0 + * + * \note Either Q or R can be NULL. + */ +int mpi_div_int( mpi *Q, mpi *R, mpi *A, int b ); + +/** + * \brief Modulo: R = A mod B + * + * \return 0 if successful, + * 1 if memory allocation failed, + * POLARSSL_ERR_MPI_DIVISION_BY_ZERO if B == 0 + */ +int mpi_mod_mpi( mpi *R, mpi *A, mpi *B ); + +/** + * \brief Modulo: r = A mod b + * + * \return 0 if successful, + * 1 if memory allocation failed, + * POLARSSL_ERR_MPI_DIVISION_BY_ZERO if b == 0 + */ +int mpi_mod_int( t_int *r, mpi *A, int b ); + +/** + * \brief Sliding-window exponentiation: X = A^E mod N + * + * \return 0 if successful, + * 1 if memory allocation failed, + * POLARSSL_ERR_MPI_BAD_INPUT_DATA if N is negative or even + * + * \note _RR is used to avoid re-computing R*R mod N across + * multiple calls, which speeds up things a bit. It can + * be set to NULL if the extra performance is unneeded. + */ +int mpi_exp_mod( mpi *X, mpi *A, mpi *E, mpi *N, mpi *_RR ); + +/** + * \brief Greatest common divisor: G = gcd(A, B) + * + * \return 0 if successful, + * 1 if memory allocation failed + */ +int mpi_gcd( mpi *G, mpi *A, mpi *B ); + +/** + * \brief Modular inverse: X = A^-1 mod N + * + * \return 0 if successful, + * 1 if memory allocation failed, + * POLARSSL_ERR_MPI_BAD_INPUT_DATA if N is negative or nil + * POLARSSL_ERR_MPI_NOT_ACCEPTABLE if A has no inverse mod N + */ +int mpi_inv_mod( mpi *X, mpi *A, mpi *N ); + +/** + * \brief Miller-Rabin primality test + * + * \return 0 if successful (probably prime), + * 1 if memory allocation failed, + * POLARSSL_ERR_MPI_NOT_ACCEPTABLE if X is not prime + */ +int mpi_is_prime( mpi *X, int (*f_rng)(void *), void *p_rng ); + +/** + * \brief Prime number generation + * + * \param X destination mpi + * \param nbits required size of X in bits + * \param dh_flag if 1, then (X-1)/2 will be prime too + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \return 0 if successful (probably prime), + * 1 if memory allocation failed, + * POLARSSL_ERR_MPI_BAD_INPUT_DATA if nbits is < 3 + */ +int mpi_gen_prime( mpi *X, int nbits, int dh_flag, + int (*f_rng)(void *), void *p_rng ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int mpi_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* bignum.h */ diff --git a/package/px5g/src/polarssl/bn_mul.h b/package/px5g/src/polarssl/bn_mul.h new file mode 100644 index 000000000..f6d34da58 --- /dev/null +++ b/package/px5g/src/polarssl/bn_mul.h @@ -0,0 +1,731 @@ +/** + * \file bn_mul.h + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +/* + * Multiply source vector [s] with b, add result + * to destination vector [d] and set carry c. + * + * Currently supports: + * + * . IA-32 (386+) . AMD64 / EM64T + * . IA-32 (SSE2) . Motorola 68000 + * . PowerPC, 32-bit . MicroBlaze + * . PowerPC, 64-bit . TriCore + * . SPARC v8 . ARM v3+ + * . Alpha . MIPS32 + * . C, longlong . C, generic + */ +#ifndef POLARSSL_BN_MUL_H +#define POLARSSL_BN_MUL_H + +#include "polarssl/config.h" + +#if defined(POLARSSL_HAVE_ASM) + +#if defined(__GNUC__) +#if defined(__i386__) + +#define MULADDC_INIT \ + asm( "movl %%ebx, %0 " : "=m" (t)); \ + asm( "movl %0, %%esi " :: "m" (s)); \ + asm( "movl %0, %%edi " :: "m" (d)); \ + asm( "movl %0, %%ecx " :: "m" (c)); \ + asm( "movl %0, %%ebx " :: "m" (b)); + +#define MULADDC_CORE \ + asm( "lodsl " ); \ + asm( "mull %ebx " ); \ + asm( "addl %ecx, %eax " ); \ + asm( "adcl $0, %edx " ); \ + asm( "addl (%edi), %eax " ); \ + asm( "adcl $0, %edx " ); \ + asm( "movl %edx, %ecx " ); \ + asm( "stosl " ); + +#if defined(POLARSSL_HAVE_SSE2) + +#define MULADDC_HUIT \ + asm( "movd %ecx, %mm1 " ); \ + asm( "movd %ebx, %mm0 " ); \ + asm( "movd (%edi), %mm3 " ); \ + asm( "paddq %mm3, %mm1 " ); \ + asm( "movd (%esi), %mm2 " ); \ + asm( "pmuludq %mm0, %mm2 " ); \ + asm( "movd 4(%esi), %mm4 " ); \ + asm( "pmuludq %mm0, %mm4 " ); \ + asm( "movd 8(%esi), %mm6 " ); \ + asm( "pmuludq %mm0, %mm6 " ); \ + asm( "movd 12(%esi), %mm7 " ); \ + asm( "pmuludq %mm0, %mm7 " ); \ + asm( "paddq %mm2, %mm1 " ); \ + asm( "movd 4(%edi), %mm3 " ); \ + asm( "paddq %mm4, %mm3 " ); \ + asm( "movd 8(%edi), %mm5 " ); \ + asm( "paddq %mm6, %mm5 " ); \ + asm( "movd 12(%edi), %mm4 " ); \ + asm( "paddq %mm4, %mm7 " ); \ + asm( "movd %mm1, (%edi) " ); \ + asm( "movd 16(%esi), %mm2 " ); \ + asm( "pmuludq %mm0, %mm2 " ); \ + asm( "psrlq $32, %mm1 " ); \ + asm( "movd 20(%esi), %mm4 " ); \ + asm( "pmuludq %mm0, %mm4 " ); \ + asm( "paddq %mm3, %mm1 " ); \ + asm( "movd 24(%esi), %mm6 " ); \ + asm( "pmuludq %mm0, %mm6 " ); \ + asm( "movd %mm1, 4(%edi) " ); \ + asm( "psrlq $32, %mm1 " ); \ + asm( "movd 28(%esi), %mm3 " ); \ + asm( "pmuludq %mm0, %mm3 " ); \ + asm( "paddq %mm5, %mm1 " ); \ + asm( "movd 16(%edi), %mm5 " ); \ + asm( "paddq %mm5, %mm2 " ); \ + asm( "movd %mm1, 8(%edi) " ); \ + asm( "psrlq $32, %mm1 " ); \ + asm( "paddq %mm7, %mm1 " ); \ + asm( "movd 20(%edi), %mm5 " ); \ + asm( "paddq %mm5, %mm4 " ); \ + asm( "movd %mm1, 12(%edi) " ); \ + asm( "psrlq $32, %mm1 " ); \ + asm( "paddq %mm2, %mm1 " ); \ + asm( "movd 24(%edi), %mm5 " ); \ + asm( "paddq %mm5, %mm6 " ); \ + asm( "movd %mm1, 16(%edi) " ); \ + asm( "psrlq $32, %mm1 " ); \ + asm( "paddq %mm4, %mm1 " ); \ + asm( "movd 28(%edi), %mm5 " ); \ + asm( "paddq %mm5, %mm3 " ); \ + asm( "movd %mm1, 20(%edi) " ); \ + asm( "psrlq $32, %mm1 " ); \ + asm( "paddq %mm6, %mm1 " ); \ + asm( "movd %mm1, 24(%edi) " ); \ + asm( "psrlq $32, %mm1 " ); \ + asm( "paddq %mm3, %mm1 " ); \ + asm( "movd %mm1, 28(%edi) " ); \ + asm( "addl $32, %edi " ); \ + asm( "addl $32, %esi " ); \ + asm( "psrlq $32, %mm1 " ); \ + asm( "movd %mm1, %ecx " ); + +#define MULADDC_STOP \ + asm( "emms " ); \ + asm( "movl %0, %%ebx " :: "m" (t)); \ + asm( "movl %%ecx, %0 " : "=m" (c)); \ + asm( "movl %%edi, %0 " : "=m" (d)); \ + asm( "movl %%esi, %0 " : "=m" (s) :: \ + "eax", "ecx", "edx", "esi", "edi" ); + +#else + +#define MULADDC_STOP \ + asm( "movl %0, %%ebx " :: "m" (t)); \ + asm( "movl %%ecx, %0 " : "=m" (c)); \ + asm( "movl %%edi, %0 " : "=m" (d)); \ + asm( "movl %%esi, %0 " : "=m" (s) :: \ + "eax", "ecx", "edx", "esi", "edi" ); + +#endif /* SSE2 */ +#endif /* i386 */ + +#if defined(__amd64__) || defined (__x86_64__) + +#define MULADDC_INIT \ + asm( "movq %0, %%rsi " :: "m" (s)); \ + asm( "movq %0, %%rdi " :: "m" (d)); \ + asm( "movq %0, %%rcx " :: "m" (c)); \ + asm( "movq %0, %%rbx " :: "m" (b)); \ + asm( "xorq %r8, %r8 " ); + +#define MULADDC_CORE \ + asm( "movq (%rsi),%rax " ); \ + asm( "mulq %rbx " ); \ + asm( "addq $8, %rsi " ); \ + asm( "addq %rcx, %rax " ); \ + asm( "movq %r8, %rcx " ); \ + asm( "adcq $0, %rdx " ); \ + asm( "nop " ); \ + asm( "addq %rax, (%rdi) " ); \ + asm( "adcq %rdx, %rcx " ); \ + asm( "addq $8, %rdi " ); + +#define MULADDC_STOP \ + asm( "movq %%rcx, %0 " : "=m" (c)); \ + asm( "movq %%rdi, %0 " : "=m" (d)); \ + asm( "movq %%rsi, %0 " : "=m" (s) :: \ + "rax", "rcx", "rdx", "rbx", "rsi", "rdi", "r8" ); + +#endif /* AMD64 */ + +#if defined(__mc68020__) || defined(__mcpu32__) + +#define MULADDC_INIT \ + asm( "movl %0, %%a2 " :: "m" (s)); \ + asm( "movl %0, %%a3 " :: "m" (d)); \ + asm( "movl %0, %%d3 " :: "m" (c)); \ + asm( "movl %0, %%d2 " :: "m" (b)); \ + asm( "moveq #0, %d0 " ); + +#define MULADDC_CORE \ + asm( "movel %a2@+, %d1 " ); \ + asm( "mulul %d2, %d4:%d1 " ); \ + asm( "addl %d3, %d1 " ); \ + asm( "addxl %d0, %d4 " ); \ + asm( "moveq #0, %d3 " ); \ + asm( "addl %d1, %a3@+ " ); \ + asm( "addxl %d4, %d3 " ); + +#define MULADDC_STOP \ + asm( "movl %%d3, %0 " : "=m" (c)); \ + asm( "movl %%a3, %0 " : "=m" (d)); \ + asm( "movl %%a2, %0 " : "=m" (s) :: \ + "d0", "d1", "d2", "d3", "d4", "a2", "a3" ); + +#define MULADDC_HUIT \ + asm( "movel %a2@+, %d1 " ); \ + asm( "mulul %d2, %d4:%d1 " ); \ + asm( "addxl %d3, %d1 " ); \ + asm( "addxl %d0, %d4 " ); \ + asm( "addl %d1, %a3@+ " ); \ + asm( "movel %a2@+, %d1 " ); \ + asm( "mulul %d2, %d3:%d1 " ); \ + asm( "addxl %d4, %d1 " ); \ + asm( "addxl %d0, %d3 " ); \ + asm( "addl %d1, %a3@+ " ); \ + asm( "movel %a2@+, %d1 " ); \ + asm( "mulul %d2, %d4:%d1 " ); \ + asm( "addxl %d3, %d1 " ); \ + asm( "addxl %d0, %d4 " ); \ + asm( "addl %d1, %a3@+ " ); \ + asm( "movel %a2@+, %d1 " ); \ + asm( "mulul %d2, %d3:%d1 " ); \ + asm( "addxl %d4, %d1 " ); \ + asm( "addxl %d0, %d3 " ); \ + asm( "addl %d1, %a3@+ " ); \ + asm( "movel %a2@+, %d1 " ); \ + asm( "mulul %d2, %d4:%d1 " ); \ + asm( "addxl %d3, %d1 " ); \ + asm( "addxl %d0, %d4 " ); \ + asm( "addl %d1, %a3@+ " ); \ + asm( "movel %a2@+, %d1 " ); \ + asm( "mulul %d2, %d3:%d1 " ); \ + asm( "addxl %d4, %d1 " ); \ + asm( "addxl %d0, %d3 " ); \ + asm( "addl %d1, %a3@+ " ); \ + asm( "movel %a2@+, %d1 " ); \ + asm( "mulul %d2, %d4:%d1 " ); \ + asm( "addxl %d3, %d1 " ); \ + asm( "addxl %d0, %d4 " ); \ + asm( "addl %d1, %a3@+ " ); \ + asm( "movel %a2@+, %d1 " ); \ + asm( "mulul %d2, %d3:%d1 " ); \ + asm( "addxl %d4, %d1 " ); \ + asm( "addxl %d0, %d3 " ); \ + asm( "addl %d1, %a3@+ " ); \ + asm( "addxl %d0, %d3 " ); + +#endif /* MC68000 */ + +#if defined(__powerpc__) || defined(__ppc__) +#if defined(__powerpc64__) || defined(__ppc64__) + +#if defined(__MACH__) && defined(__APPLE__) + +#define MULADDC_INIT \ + asm( "ld r3, %0 " :: "m" (s)); \ + asm( "ld r4, %0 " :: "m" (d)); \ + asm( "ld r5, %0 " :: "m" (c)); \ + asm( "ld r6, %0 " :: "m" (b)); \ + asm( "addi r3, r3, -8 " ); \ + asm( "addi r4, r4, -8 " ); \ + asm( "addic r5, r5, 0 " ); + +#define MULADDC_CORE \ + asm( "ldu r7, 8(r3) " ); \ + asm( "mulld r8, r7, r6 " ); \ + asm( "mulhdu r9, r7, r6 " ); \ + asm( "adde r8, r8, r5 " ); \ + asm( "ld r7, 8(r4) " ); \ + asm( "addze r5, r9 " ); \ + asm( "addc r8, r8, r7 " ); \ + asm( "stdu r8, 8(r4) " ); + +#define MULADDC_STOP \ + asm( "addze r5, r5 " ); \ + asm( "addi r4, r4, 8 " ); \ + asm( "addi r3, r3, 8 " ); \ + asm( "std r5, %0 " : "=m" (c)); \ + asm( "std r4, %0 " : "=m" (d)); \ + asm( "std r3, %0 " : "=m" (s) :: \ + "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); + +#else + +#define MULADDC_INIT \ + asm( "ld %%r3, %0 " :: "m" (s)); \ + asm( "ld %%r4, %0 " :: "m" (d)); \ + asm( "ld %%r5, %0 " :: "m" (c)); \ + asm( "ld %%r6, %0 " :: "m" (b)); \ + asm( "addi %r3, %r3, -8 " ); \ + asm( "addi %r4, %r4, -8 " ); \ + asm( "addic %r5, %r5, 0 " ); + +#define MULADDC_CORE \ + asm( "ldu %r7, 8(%r3) " ); \ + asm( "mulld %r8, %r7, %r6 " ); \ + asm( "mulhdu %r9, %r7, %r6 " ); \ + asm( "adde %r8, %r8, %r5 " ); \ + asm( "ld %r7, 8(%r4) " ); \ + asm( "addze %r5, %r9 " ); \ + asm( "addc %r8, %r8, %r7 " ); \ + asm( "stdu %r8, 8(%r4) " ); + +#define MULADDC_STOP \ + asm( "addze %r5, %r5 " ); \ + asm( "addi %r4, %r4, 8 " ); \ + asm( "addi %r3, %r3, 8 " ); \ + asm( "std %%r5, %0 " : "=m" (c)); \ + asm( "std %%r4, %0 " : "=m" (d)); \ + asm( "std %%r3, %0 " : "=m" (s) :: \ + "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); + +#endif + +#else /* PPC32 */ + +#if defined(__MACH__) && defined(__APPLE__) + +#define MULADDC_INIT \ + asm( "lwz r3, %0 " :: "m" (s)); \ + asm( "lwz r4, %0 " :: "m" (d)); \ + asm( "lwz r5, %0 " :: "m" (c)); \ + asm( "lwz r6, %0 " :: "m" (b)); \ + asm( "addi r3, r3, -4 " ); \ + asm( "addi r4, r4, -4 " ); \ + asm( "addic r5, r5, 0 " ); + +#define MULADDC_CORE \ + asm( "lwzu r7, 4(r3) " ); \ + asm( "mullw r8, r7, r6 " ); \ + asm( "mulhwu r9, r7, r6 " ); \ + asm( "adde r8, r8, r5 " ); \ + asm( "lwz r7, 4(r4) " ); \ + asm( "addze r5, r9 " ); \ + asm( "addc r8, r8, r7 " ); \ + asm( "stwu r8, 4(r4) " ); + +#define MULADDC_STOP \ + asm( "addze r5, r5 " ); \ + asm( "addi r4, r4, 4 " ); \ + asm( "addi r3, r3, 4 " ); \ + asm( "stw r5, %0 " : "=m" (c)); \ + asm( "stw r4, %0 " : "=m" (d)); \ + asm( "stw r3, %0 " : "=m" (s) :: \ + "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); + +#else + +#define MULADDC_INIT \ + asm( "lwz %%r3, %0 " :: "m" (s)); \ + asm( "lwz %%r4, %0 " :: "m" (d)); \ + asm( "lwz %%r5, %0 " :: "m" (c)); \ + asm( "lwz %%r6, %0 " :: "m" (b)); \ + asm( "addi %r3, %r3, -4 " ); \ + asm( "addi %r4, %r4, -4 " ); \ + asm( "addic %r5, %r5, 0 " ); + +#define MULADDC_CORE \ + asm( "lwzu %r7, 4(%r3) " ); \ + asm( "mullw %r8, %r7, %r6 " ); \ + asm( "mulhwu %r9, %r7, %r6 " ); \ + asm( "adde %r8, %r8, %r5 " ); \ + asm( "lwz %r7, 4(%r4) " ); \ + asm( "addze %r5, %r9 " ); \ + asm( "addc %r8, %r8, %r7 " ); \ + asm( "stwu %r8, 4(%r4) " ); + +#define MULADDC_STOP \ + asm( "addze %r5, %r5 " ); \ + asm( "addi %r4, %r4, 4 " ); \ + asm( "addi %r3, %r3, 4 " ); \ + asm( "stw %%r5, %0 " : "=m" (c)); \ + asm( "stw %%r4, %0 " : "=m" (d)); \ + asm( "stw %%r3, %0 " : "=m" (s) :: \ + "r3", "r4", "r5", "r6", "r7", "r8", "r9" ); + +#endif + +#endif /* PPC32 */ +#endif /* PPC64 */ + +#if defined(__sparc__) + +#define MULADDC_INIT \ + asm( "ld %0, %%o0 " :: "m" (s)); \ + asm( "ld %0, %%o1 " :: "m" (d)); \ + asm( "ld %0, %%o2 " :: "m" (c)); \ + asm( "ld %0, %%o3 " :: "m" (b)); + +#define MULADDC_CORE \ + asm( "ld [%o0], %o4 " ); \ + asm( "inc 4, %o0 " ); \ + asm( "ld [%o1], %o5 " ); \ + asm( "umul %o3, %o4, %o4 " ); \ + asm( "addcc %o4, %o2, %o4 " ); \ + asm( "rd %y, %g1 " ); \ + asm( "addx %g1, 0, %g1 " ); \ + asm( "addcc %o4, %o5, %o4 " ); \ + asm( "st %o4, [%o1] " ); \ + asm( "addx %g1, 0, %o2 " ); \ + asm( "inc 4, %o1 " ); + +#define MULADDC_STOP \ + asm( "st %%o2, %0 " : "=m" (c)); \ + asm( "st %%o1, %0 " : "=m" (d)); \ + asm( "st %%o0, %0 " : "=m" (s) :: \ + "g1", "o0", "o1", "o2", "o3", "o4", "o5" ); + +#endif /* SPARCv8 */ + +#if defined(__microblaze__) || defined(microblaze) + +#define MULADDC_INIT \ + asm( "lwi r3, %0 " :: "m" (s)); \ + asm( "lwi r4, %0 " :: "m" (d)); \ + asm( "lwi r5, %0 " :: "m" (c)); \ + asm( "lwi r6, %0 " :: "m" (b)); \ + asm( "andi r7, r6, 0xffff" ); \ + asm( "bsrli r6, r6, 16 " ); + +#define MULADDC_CORE \ + asm( "lhui r8, r3, 0 " ); \ + asm( "addi r3, r3, 2 " ); \ + asm( "lhui r9, r3, 0 " ); \ + asm( "addi r3, r3, 2 " ); \ + asm( "mul r10, r9, r6 " ); \ + asm( "mul r11, r8, r7 " ); \ + asm( "mul r12, r9, r7 " ); \ + asm( "mul r13, r8, r6 " ); \ + asm( "bsrli r8, r10, 16 " ); \ + asm( "bsrli r9, r11, 16 " ); \ + asm( "add r13, r13, r8 " ); \ + asm( "add r13, r13, r9 " ); \ + asm( "bslli r10, r10, 16 " ); \ + asm( "bslli r11, r11, 16 " ); \ + asm( "add r12, r12, r10 " ); \ + asm( "addc r13, r13, r0 " ); \ + asm( "add r12, r12, r11 " ); \ + asm( "addc r13, r13, r0 " ); \ + asm( "lwi r10, r4, 0 " ); \ + asm( "add r12, r12, r10 " ); \ + asm( "addc r13, r13, r0 " ); \ + asm( "add r12, r12, r5 " ); \ + asm( "addc r5, r13, r0 " ); \ + asm( "swi r12, r4, 0 " ); \ + asm( "addi r4, r4, 4 " ); + +#define MULADDC_STOP \ + asm( "swi r5, %0 " : "=m" (c)); \ + asm( "swi r4, %0 " : "=m" (d)); \ + asm( "swi r3, %0 " : "=m" (s) :: \ + "r3", "r4" , "r5" , "r6" , "r7" , "r8" , \ + "r9", "r10", "r11", "r12", "r13" ); + +#endif /* MicroBlaze */ + +#if defined(__tricore__) + +#define MULADDC_INIT \ + asm( "ld.a %%a2, %0 " :: "m" (s)); \ + asm( "ld.a %%a3, %0 " :: "m" (d)); \ + asm( "ld.w %%d4, %0 " :: "m" (c)); \ + asm( "ld.w %%d1, %0 " :: "m" (b)); \ + asm( "xor %d5, %d5 " ); + +#define MULADDC_CORE \ + asm( "ld.w %d0, [%a2+] " ); \ + asm( "madd.u %e2, %e4, %d0, %d1 " ); \ + asm( "ld.w %d0, [%a3] " ); \ + asm( "addx %d2, %d2, %d0 " ); \ + asm( "addc %d3, %d3, 0 " ); \ + asm( "mov %d4, %d3 " ); \ + asm( "st.w [%a3+], %d2 " ); + +#define MULADDC_STOP \ + asm( "st.w %0, %%d4 " : "=m" (c)); \ + asm( "st.a %0, %%a3 " : "=m" (d)); \ + asm( "st.a %0, %%a2 " : "=m" (s) :: \ + "d0", "d1", "e2", "d4", "a2", "a3" ); + +#endif /* TriCore */ + +#if defined(__arm__) + +#define MULADDC_INIT \ + asm( "ldr r0, %0 " :: "m" (s)); \ + asm( "ldr r1, %0 " :: "m" (d)); \ + asm( "ldr r2, %0 " :: "m" (c)); \ + asm( "ldr r3, %0 " :: "m" (b)); + +#define MULADDC_CORE \ + asm( "ldr r4, [r0], #4 " ); \ + asm( "mov r5, #0 " ); \ + asm( "ldr r6, [r1] " ); \ + asm( "umlal r2, r5, r3, r4 " ); \ + asm( "adds r7, r6, r2 " ); \ + asm( "adc r2, r5, #0 " ); \ + asm( "str r7, [r1], #4 " ); + +#define MULADDC_STOP \ + asm( "str r2, %0 " : "=m" (c)); \ + asm( "str r1, %0 " : "=m" (d)); \ + asm( "str r0, %0 " : "=m" (s) :: \ + "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7" ); + +#endif /* ARMv3 */ + +#if defined(__alpha__) + +#define MULADDC_INIT \ + asm( "ldq $1, %0 " :: "m" (s)); \ + asm( "ldq $2, %0 " :: "m" (d)); \ + asm( "ldq $3, %0 " :: "m" (c)); \ + asm( "ldq $4, %0 " :: "m" (b)); + +#define MULADDC_CORE \ + asm( "ldq $6, 0($1) " ); \ + asm( "addq $1, 8, $1 " ); \ + asm( "mulq $6, $4, $7 " ); \ + asm( "umulh $6, $4, $6 " ); \ + asm( "addq $7, $3, $7 " ); \ + asm( "cmpult $7, $3, $3 " ); \ + asm( "ldq $5, 0($2) " ); \ + asm( "addq $7, $5, $7 " ); \ + asm( "cmpult $7, $5, $5 " ); \ + asm( "stq $7, 0($2) " ); \ + asm( "addq $2, 8, $2 " ); \ + asm( "addq $6, $3, $3 " ); \ + asm( "addq $5, $3, $3 " ); + +#define MULADDC_STOP \ + asm( "stq $3, %0 " : "=m" (c)); \ + asm( "stq $2, %0 " : "=m" (d)); \ + asm( "stq $1, %0 " : "=m" (s) :: \ + "$1", "$2", "$3", "$4", "$5", "$6", "$7" ); + +#endif /* Alpha */ + +#if defined(__mips__) + +#define MULADDC_INIT \ + asm( "lw $10, %0 " :: "m" (s)); \ + asm( "lw $11, %0 " :: "m" (d)); \ + asm( "lw $12, %0 " :: "m" (c)); \ + asm( "lw $13, %0 " :: "m" (b)); + +#define MULADDC_CORE \ + asm( "lw $14, 0($10) " ); \ + asm( "multu $13, $14 " ); \ + asm( "addi $10, $10, 4 " ); \ + asm( "mflo $14 " ); \ + asm( "mfhi $9 " ); \ + asm( "addu $14, $12, $14 " ); \ + asm( "lw $15, 0($11) " ); \ + asm( "sltu $12, $14, $12 " ); \ + asm( "addu $15, $14, $15 " ); \ + asm( "sltu $14, $15, $14 " ); \ + asm( "addu $12, $12, $9 " ); \ + asm( "sw $15, 0($11) " ); \ + asm( "addu $12, $12, $14 " ); \ + asm( "addi $11, $11, 4 " ); + +#define MULADDC_STOP \ + asm( "sw $12, %0 " : "=m" (c)); \ + asm( "sw $11, %0 " : "=m" (d)); \ + asm( "sw $10, %0 " : "=m" (s) :: \ + "$9", "$10", "$11", "$12", "$13", "$14", "$15" ); + +#endif /* MIPS */ +#endif /* GNUC */ + +#if (defined(_MSC_VER) && defined(_M_IX86)) || defined(__WATCOMC__) + +#define MULADDC_INIT \ + __asm mov esi, s \ + __asm mov edi, d \ + __asm mov ecx, c \ + __asm mov ebx, b + +#define MULADDC_CORE \ + __asm lodsd \ + __asm mul ebx \ + __asm add eax, ecx \ + __asm adc edx, 0 \ + __asm add eax, [edi] \ + __asm adc edx, 0 \ + __asm mov ecx, edx \ + __asm stosd + +#if defined(POLARSSL_HAVE_SSE2) + +#define EMIT __asm _emit + +#define MULADDC_HUIT \ + EMIT 0x0F EMIT 0x6E EMIT 0xC9 \ + EMIT 0x0F EMIT 0x6E EMIT 0xC3 \ + EMIT 0x0F EMIT 0x6E EMIT 0x1F \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCB \ + EMIT 0x0F EMIT 0x6E EMIT 0x16 \ + EMIT 0x0F EMIT 0xF4 EMIT 0xD0 \ + EMIT 0x0F EMIT 0x6E EMIT 0x66 EMIT 0x04 \ + EMIT 0x0F EMIT 0xF4 EMIT 0xE0 \ + EMIT 0x0F EMIT 0x6E EMIT 0x76 EMIT 0x08 \ + EMIT 0x0F EMIT 0xF4 EMIT 0xF0 \ + EMIT 0x0F EMIT 0x6E EMIT 0x7E EMIT 0x0C \ + EMIT 0x0F EMIT 0xF4 EMIT 0xF8 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCA \ + EMIT 0x0F EMIT 0x6E EMIT 0x5F EMIT 0x04 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xDC \ + EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x08 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xEE \ + EMIT 0x0F EMIT 0x6E EMIT 0x67 EMIT 0x0C \ + EMIT 0x0F EMIT 0xD4 EMIT 0xFC \ + EMIT 0x0F EMIT 0x7E EMIT 0x0F \ + EMIT 0x0F EMIT 0x6E EMIT 0x56 EMIT 0x10 \ + EMIT 0x0F EMIT 0xF4 EMIT 0xD0 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0x6E EMIT 0x66 EMIT 0x14 \ + EMIT 0x0F EMIT 0xF4 EMIT 0xE0 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCB \ + EMIT 0x0F EMIT 0x6E EMIT 0x76 EMIT 0x18 \ + EMIT 0x0F EMIT 0xF4 EMIT 0xF0 \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x04 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0x6E EMIT 0x5E EMIT 0x1C \ + EMIT 0x0F EMIT 0xF4 EMIT 0xD8 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCD \ + EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x10 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xD5 \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x08 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCF \ + EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x14 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xE5 \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x0C \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCA \ + EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x18 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xF5 \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x10 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCC \ + EMIT 0x0F EMIT 0x6E EMIT 0x6F EMIT 0x1C \ + EMIT 0x0F EMIT 0xD4 EMIT 0xDD \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x14 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCE \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x18 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0xD4 EMIT 0xCB \ + EMIT 0x0F EMIT 0x7E EMIT 0x4F EMIT 0x1C \ + EMIT 0x83 EMIT 0xC7 EMIT 0x20 \ + EMIT 0x83 EMIT 0xC6 EMIT 0x20 \ + EMIT 0x0F EMIT 0x73 EMIT 0xD1 EMIT 0x20 \ + EMIT 0x0F EMIT 0x7E EMIT 0xC9 + +#define MULADDC_STOP \ + EMIT 0x0F EMIT 0x77 \ + __asm mov c, ecx \ + __asm mov d, edi \ + __asm mov s, esi \ + +#else + +#define MULADDC_STOP \ + __asm mov c, ecx \ + __asm mov d, edi \ + __asm mov s, esi \ + +#endif /* SSE2 */ +#endif /* MSVC */ + +#endif /* POLARSSL_HAVE_ASM */ + +#if !defined(MULADDC_CORE) +#if defined(POLARSSL_HAVE_LONGLONG) + +#define MULADDC_INIT \ +{ \ + t_dbl r; \ + t_int r0, r1; + +#define MULADDC_CORE \ + r = *(s++) * (t_dbl) b; \ + r0 = r; \ + r1 = r >> biL; \ + r0 += c; r1 += (r0 < c); \ + r0 += *d; r1 += (r0 < *d); \ + c = r1; *(d++) = r0; + +#define MULADDC_STOP \ +} + +#else +#define MULADDC_INIT \ +{ \ + t_int s0, s1, b0, b1; \ + t_int r0, r1, rx, ry; \ + b0 = ( b << biH ) >> biH; \ + b1 = ( b >> biH ); + +#define MULADDC_CORE \ + s0 = ( *s << biH ) >> biH; \ + s1 = ( *s >> biH ); s++; \ + rx = s0 * b1; r0 = s0 * b0; \ + ry = s1 * b0; r1 = s1 * b1; \ + r1 += ( rx >> biH ); \ + r1 += ( ry >> biH ); \ + rx <<= biH; ry <<= biH; \ + r0 += rx; r1 += (r0 < rx); \ + r0 += ry; r1 += (r0 < ry); \ + r0 += c; r1 += (r0 < c); \ + r0 += *d; r1 += (r0 < *d); \ + c = r1; *(d++) = r0; + +#define MULADDC_STOP \ +} + +#endif /* C (generic) */ +#endif /* C (longlong) */ + +#endif /* bn_mul.h */ diff --git a/package/px5g/src/polarssl/config.h b/package/px5g/src/polarssl/config.h new file mode 100644 index 000000000..6463e5219 --- /dev/null +++ b/package/px5g/src/polarssl/config.h @@ -0,0 +1,329 @@ +/** + * \file config.h + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + * + * This set of compile-time options may be used to enable + * or disable features selectively, and reduce the global + * memory footprint. + */ +#ifndef POLARSSL_CONFIG_H +#define POLARSSL_CONFIG_H + +#ifndef _CRT_SECURE_NO_DEPRECATE +#define _CRT_SECURE_NO_DEPRECATE 1 +#endif + +/* + * Uncomment if native integers are 8-bit wide. + * +#define POLARSSL_HAVE_INT8 + */ + +/* + * Uncomment if native integers are 16-bit wide. + * +#define POLARSSL_HAVE_INT16 + */ + +/* + * Uncomment if the compiler supports long long. + */ +#define POLARSSL_HAVE_LONGLONG + + +/* + * Uncomment to enable the use of assembly code. + */ +#define POLARSSL_HAVE_ASM + +/* + * Uncomment if the CPU supports SSE2 (IA-32 specific). + * +#define POLARSSL_HAVE_SSE2 + */ + +/* + * Enable all SSL/TLS debugging messages. + */ +#define POLARSSL_DEBUG_MSG + +/* + * Enable the checkup functions (*_self_test). + */ +#define POLARSSL_SELF_TEST + +/* + * Enable the prime-number generation code. + */ +#define POLARSSL_GENPRIME + +/* + * Uncomment this macro to store the AES tables in ROM. + * +#define POLARSSL_AES_ROM_TABLES + */ + +/* + * Module: library/aes.c + * Caller: library/ssl_tls.c + * + * This module enables the following ciphersuites: + * SSL_RSA_AES_128_SHA + * SSL_RSA_AES_256_SHA + * SSL_EDH_RSA_AES_256_SHA + */ +#define POLARSSL_AES_C + +/* + * Module: library/arc4.c + * Caller: library/ssl_tls.c + * + * This module enables the following ciphersuites: + * SSL_RSA_RC4_128_MD5 + * SSL_RSA_RC4_128_SHA + */ +#define POLARSSL_ARC4_C + +/* + * Module: library/base64.c + * Caller: library/x509parse.c + * + * This module is required for X.509 support. + */ +#define POLARSSL_BASE64_C + +/* + * Module: library/bignum.c + * Caller: library/dhm.c + * library/rsa.c + * library/ssl_tls.c + * library/x509parse.c + * + * This module is required for RSA and DHM support. + */ +#define POLARSSL_BIGNUM_C + +/* + * Module: library/camellia.c + * Caller: + * + * This module enabled the following cipher suites: + */ +#define POLARSSL_CAMELLIA_C + +/* + * Module: library/certs.c + * Caller: + * + * This module is used for testing (ssl_client/server). + */ +#define POLARSSL_CERTS_C + +/* + * Module: library/debug.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * This module provides debugging functions. + */ +#define POLARSSL_DEBUG_C + +/* + * Module: library/des.c + * Caller: library/ssl_tls.c + * + * This module enables the following ciphersuites: + * SSL_RSA_DES_168_SHA + * SSL_EDH_RSA_DES_168_SHA + */ +#define POLARSSL_DES_C + +/* + * Module: library/dhm.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * This module enables the following ciphersuites: + * SSL_EDH_RSA_DES_168_SHA + * SSL_EDH_RSA_AES_256_SHA + */ +#define POLARSSL_DHM_C + +/* + * Module: library/havege.c + * Caller: + * + * This module enables the HAVEGE random number generator. + */ +#define POLARSSL_HAVEGE_C + +/* + * Module: library/md2.c + * Caller: library/x509parse.c + * + * Uncomment to enable support for (rare) MD2-signed X.509 certs. + * +#define POLARSSL_MD2_C + */ + +/* + * Module: library/md4.c + * Caller: library/x509parse.c + * + * Uncomment to enable support for (rare) MD4-signed X.509 certs. + * +#define POLARSSL_MD4_C + */ + +/* + * Module: library/md5.c + * Caller: library/ssl_tls.c + * library/x509parse.c + * + * This module is required for SSL/TLS and X.509. + */ +#define POLARSSL_MD5_C + +/* + * Module: library/net.c + * Caller: + * + * This module provides TCP/IP networking routines. + */ +#define POLARSSL_NET_C + +/* + * Module: library/padlock.c + * Caller: library/aes.c + * + * This modules adds support for the VIA PadLock on x86. + */ +#define POLARSSL_PADLOCK_C + +/* + * Module: library/rsa.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * library/x509.c + * + * This module is required for SSL/TLS and MD5-signed certificates. + */ +#define POLARSSL_RSA_C + +/* + * Module: library/sha1.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * library/x509parse.c + * + * This module is required for SSL/TLS and SHA1-signed certificates. + */ +#define POLARSSL_SHA1_C + +/* + * Module: library/sha2.c + * Caller: + * + * This module adds support for SHA-224 and SHA-256. + */ +#define POLARSSL_SHA2_C + +/* + * Module: library/sha4.c + * Caller: + * + * This module adds support for SHA-384 and SHA-512. + */ +#define POLARSSL_SHA4_C + +/* + * Module: library/ssl_cli.c + * Caller: + * + * This module is required for SSL/TLS client support. + */ +#define POLARSSL_SSL_CLI_C + +/* + * Module: library/ssl_srv.c + * Caller: + * + * This module is required for SSL/TLS server support. + */ +#define POLARSSL_SSL_SRV_C + +/* + * Module: library/ssl_tls.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * + * This module is required for SSL/TLS. + */ +#define POLARSSL_SSL_TLS_C + +/* + * Module: library/timing.c + * Caller: library/havege.c + * + * This module is used by the HAVEGE random number generator. + */ +#define POLARSSL_TIMING_C + +/* + * Module: library/x509parse.c + * Caller: library/ssl_cli.c + * library/ssl_srv.c + * library/ssl_tls.c + * + * This module is required for X.509 certificate parsing. + */ +#define POLARSSL_X509_PARSE_C + +/* + * Module: library/x509_write.c + * Caller: + * + * This module is required for X.509 certificate writing. + */ +#define POLARSSL_X509_WRITE_C + +/* + * Module: library/xtea.c + * Caller: + */ +#define POLARSSL_XTEA_C + +#endif /* config.h */ diff --git a/package/px5g/src/polarssl/havege.h b/package/px5g/src/polarssl/havege.h new file mode 100644 index 000000000..c27cecac0 --- /dev/null +++ b/package/px5g/src/polarssl/havege.h @@ -0,0 +1,75 @@ +/** + * \file havege.h + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef POLARSSL_HAVEGE_H +#define POLARSSL_HAVEGE_H + +#define COLLECT_SIZE 1024 + +/** + * \brief HAVEGE state structure + */ +typedef struct +{ + int PT1, PT2, offset[2]; + int pool[COLLECT_SIZE]; + int WALK[8192]; +} +havege_state; + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief HAVEGE initialization + * + * \param hs HAVEGE state to be initialized + */ +void havege_init( havege_state *hs ); + +/** + * \brief HAVEGE rand function + * + * \param rng_st points to an HAVEGE state + * + * \return A random int + */ +int havege_rand( void *p_rng ); + +#ifdef __cplusplus +} +#endif + +#endif /* havege.h */ diff --git a/package/px5g/src/polarssl/rsa.h b/package/px5g/src/polarssl/rsa.h new file mode 100644 index 000000000..b31dc2f14 --- /dev/null +++ b/package/px5g/src/polarssl/rsa.h @@ -0,0 +1,309 @@ +/** + * \file rsa.h + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef POLARSSL_RSA_H +#define POLARSSL_RSA_H + +#include "polarssl/bignum.h" + +#define POLARSSL_ERR_RSA_BAD_INPUT_DATA -0x0400 +#define POLARSSL_ERR_RSA_INVALID_PADDING -0x0410 +#define POLARSSL_ERR_RSA_KEY_GEN_FAILED -0x0420 +#define POLARSSL_ERR_RSA_KEY_CHECK_FAILED -0x0430 +#define POLARSSL_ERR_RSA_PUBLIC_FAILED -0x0440 +#define POLARSSL_ERR_RSA_PRIVATE_FAILED -0x0450 +#define POLARSSL_ERR_RSA_VERIFY_FAILED -0x0460 +#define POLARSSL_ERR_RSA_OUTPUT_TO_LARGE -0x0470 + +/* + * PKCS#1 constants + */ +#define RSA_RAW 0 +#define RSA_MD2 2 +#define RSA_MD4 3 +#define RSA_MD5 4 +#define RSA_SHA1 5 +#define RSA_SHA256 6 + +#define RSA_PUBLIC 0 +#define RSA_PRIVATE 1 + +#define RSA_PKCS_V15 0 +#define RSA_PKCS_V21 1 + +#define RSA_SIGN 1 +#define RSA_CRYPT 2 + +/* + * DigestInfo ::= SEQUENCE { + * digestAlgorithm DigestAlgorithmIdentifier, + * digest Digest } + * + * DigestAlgorithmIdentifier ::= AlgorithmIdentifier + * + * Digest ::= OCTET STRING + */ +#define ASN1_HASH_MDX \ + "\x30\x20\x30\x0C\x06\x08\x2A\x86\x48" \ + "\x86\xF7\x0D\x02\x00\x05\x00\x04\x10" + +#define ASN1_HASH_SHA1 \ + "\x30\x21\x30\x09\x06\x05\x2B\x0E\x03" \ + "\x02\x1A\x05\x00\x04\x14" + +/** + * \brief RSA context structure + */ +typedef struct +{ + int ver; /*!< always 0 */ + int len; /*!< size(N) in chars */ + + mpi N; /*!< public modulus */ + mpi E; /*!< public exponent */ + + mpi D; /*!< private exponent */ + mpi P; /*!< 1st prime factor */ + mpi Q; /*!< 2nd prime factor */ + mpi DP; /*!< D % (P - 1) */ + mpi DQ; /*!< D % (Q - 1) */ + mpi QP; /*!< 1 / (Q % P) */ + + mpi RN; /*!< cached R^2 mod N */ + mpi RP; /*!< cached R^2 mod P */ + mpi RQ; /*!< cached R^2 mod Q */ + + int padding; /*!< 1.5 or OAEP/PSS */ + int hash_id; /*!< hash identifier */ + int (*f_rng)(void *); /*!< RNG function */ + void *p_rng; /*!< RNG parameter */ +} +rsa_context; + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Initialize an RSA context + * + * \param ctx RSA context to be initialized + * \param padding RSA_PKCS_V15 or RSA_PKCS_V21 + * \param hash_id RSA_PKCS_V21 hash identifier + * \param f_rng RNG function + * \param p_rng RNG parameter + * + * \note The hash_id parameter is actually ignored + * when using RSA_PKCS_V15 padding. + * + * \note Currently (xyssl-0.8), RSA_PKCS_V21 padding + * is not supported. + */ +void rsa_init( rsa_context *ctx, + int padding, + int hash_id, + int (*f_rng)(void *), + void *p_rng ); + +/** + * \brief Generate an RSA keypair + * + * \param ctx RSA context that will hold the key + * \param nbits size of the public key in bits + * \param exponent public exponent (e.g., 65537) + * + * \note rsa_init() must be called beforehand to setup + * the RSA context (especially f_rng and p_rng). + * + * \return 0 if successful, or an POLARSSL_ERR_RSA_XXX error code + */ +int rsa_gen_key( rsa_context *ctx, int nbits, int exponent ); + +/** + * \brief Check a public RSA key + * + * \param ctx RSA context to be checked + * + * \return 0 if successful, or an POLARSSL_ERR_RSA_XXX error code + */ +int rsa_check_pubkey( rsa_context *ctx ); + +/** + * \brief Check a private RSA key + * + * \param ctx RSA context to be checked + * + * \return 0 if successful, or an POLARSSL_ERR_RSA_XXX error code + */ +int rsa_check_privkey( rsa_context *ctx ); + +/** + * \brief Do an RSA public key operation + * + * \param ctx RSA context + * \param input input buffer + * \param output output buffer + * + * \return 0 if successful, or an POLARSSL_ERR_RSA_XXX error code + * + * \note This function does NOT take care of message + * padding. Also, be sure to set input[0] = 0. + * + * \note The input and output buffers must be large + * enough (eg. 128 bytes if RSA-1024 is used). + */ +int rsa_public( rsa_context *ctx, + unsigned char *input, + unsigned char *output ); + +/** + * \brief Do an RSA private key operation + * + * \param ctx RSA context + * \param input input buffer + * \param output output buffer + * + * \return 0 if successful, or an POLARSSL_ERR_RSA_XXX error code + * + * \note The input and output buffers must be large + * enough (eg. 128 bytes if RSA-1024 is used). + */ +int rsa_private( rsa_context *ctx, + unsigned char *input, + unsigned char *output ); + +/** + * \brief Add the message padding, then do an RSA operation + * + * \param ctx RSA context + * \param mode RSA_PUBLIC or RSA_PRIVATE + * \param ilen contains the the plaintext length + * \param input buffer holding the data to be encrypted + * \param output buffer that will hold the ciphertext + * + * \return 0 if successful, or an POLARSSL_ERR_RSA_XXX error code + * + * \note The output buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + */ +int rsa_pkcs1_encrypt( rsa_context *ctx, + int mode, int ilen, + unsigned char *input, + unsigned char *output ); + +/** + * \brief Do an RSA operation, then remove the message padding + * + * \param ctx RSA context + * \param mode RSA_PUBLIC or RSA_PRIVATE + * \param input buffer holding the encrypted data + * \param output buffer that will hold the plaintext + * \param olen will contain the plaintext length + * \param output_max_len maximum length of the output buffer + * + * \return 0 if successful, or an POLARSSL_ERR_RSA_XXX error code + * + * \note The output buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used) otherwise + * an error is thrown. + */ +int rsa_pkcs1_decrypt( rsa_context *ctx, + int mode, int *olen, + unsigned char *input, + unsigned char *output, + int output_max_len); + +/** + * \brief Do a private RSA to sign a message digest + * + * \param ctx RSA context + * \param mode RSA_PUBLIC or RSA_PRIVATE + * \param hash_id RSA_RAW, RSA_MD{2,4,5} or RSA_SHA{1,256} + * \param hashlen message digest length (for RSA_RAW only) + * \param hash buffer holding the message digest + * \param sig buffer that will hold the ciphertext + * + * \return 0 if the signing operation was successful, + * or an POLARSSL_ERR_RSA_XXX error code + * + * \note The "sig" buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + */ +int rsa_pkcs1_sign( rsa_context *ctx, + int mode, + int hash_id, + int hashlen, + unsigned char *hash, + unsigned char *sig ); + +/** + * \brief Do a public RSA and check the message digest + * + * \param ctx points to an RSA public key + * \param mode RSA_PUBLIC or RSA_PRIVATE + * \param hash_id RSA_RAW, RSA_MD{2,4,5} or RSA_SHA{1,256} + * \param hashlen message digest length (for RSA_RAW only) + * \param hash buffer holding the message digest + * \param sig buffer holding the ciphertext + * + * \return 0 if the verify operation was successful, + * or an POLARSSL_ERR_RSA_XXX error code + * + * \note The "sig" buffer must be as large as the size + * of ctx->N (eg. 128 bytes if RSA-1024 is used). + */ +int rsa_pkcs1_verify( rsa_context *ctx, + int mode, + int hash_id, + int hashlen, + unsigned char *hash, + unsigned char *sig ); + +/** + * \brief Free the components of an RSA key + */ +void rsa_free( rsa_context *ctx ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int rsa_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* rsa.h */ diff --git a/package/px5g/src/polarssl/sha1.h b/package/px5g/src/polarssl/sha1.h new file mode 100644 index 000000000..3ca7dc319 --- /dev/null +++ b/package/px5g/src/polarssl/sha1.h @@ -0,0 +1,150 @@ +/** + * \file sha1.h + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef POLARSSL_SHA1_H +#define POLARSSL_SHA1_H + +/** + * \brief SHA-1 context structure + */ +typedef struct +{ + unsigned long total[2]; /*!< number of bytes processed */ + unsigned long state[5]; /*!< intermediate digest state */ + unsigned char buffer[64]; /*!< data block being processed */ + + unsigned char ipad[64]; /*!< HMAC: inner padding */ + unsigned char opad[64]; /*!< HMAC: outer padding */ +} +sha1_context; + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief SHA-1 context setup + * + * \param ctx context to be initialized + */ +void sha1_starts( sha1_context *ctx ); + +/** + * \brief SHA-1 process buffer + * + * \param ctx SHA-1 context + * \param input buffer holding the data + * \param ilen length of the input data + */ +void sha1_update( sha1_context *ctx, unsigned char *input, int ilen ); + +/** + * \brief SHA-1 final digest + * + * \param ctx SHA-1 context + * \param output SHA-1 checksum result + */ +void sha1_finish( sha1_context *ctx, unsigned char output[20] ); + +/** + * \brief Output = SHA-1( input buffer ) + * + * \param input buffer holding the data + * \param ilen length of the input data + * \param output SHA-1 checksum result + */ +void sha1( unsigned char *input, int ilen, unsigned char output[20] ); + +/** + * \brief Output = SHA-1( file contents ) + * + * \param path input file name + * \param output SHA-1 checksum result + * + * \return 0 if successful, 1 if fopen failed, + * or 2 if fread failed + */ +int sha1_file( char *path, unsigned char output[20] ); + +/** + * \brief SHA-1 HMAC context setup + * + * \param ctx HMAC context to be initialized + * \param key HMAC secret key + * \param keylen length of the HMAC key + */ +void sha1_hmac_starts( sha1_context *ctx, unsigned char *key, int keylen ); + +/** + * \brief SHA-1 HMAC process buffer + * + * \param ctx HMAC context + * \param input buffer holding the data + * \param ilen length of the input data + */ +void sha1_hmac_update( sha1_context *ctx, unsigned char *input, int ilen ); + +/** + * \brief SHA-1 HMAC final digest + * + * \param ctx HMAC context + * \param output SHA-1 HMAC checksum result + */ +void sha1_hmac_finish( sha1_context *ctx, unsigned char output[20] ); + +/** + * \brief Output = HMAC-SHA-1( hmac key, input buffer ) + * + * \param key HMAC secret key + * \param keylen length of the HMAC key + * \param input buffer holding the data + * \param ilen length of the input data + * \param output HMAC-SHA-1 result + */ +void sha1_hmac( unsigned char *key, int keylen, + unsigned char *input, int ilen, + unsigned char output[20] ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int sha1_self_test( int verbose ); + +#ifdef __cplusplus +} +#endif + +#endif /* sha1.h */ diff --git a/package/px5g/src/polarssl/timing.h b/package/px5g/src/polarssl/timing.h new file mode 100644 index 000000000..62d627f61 --- /dev/null +++ b/package/px5g/src/polarssl/timing.h @@ -0,0 +1,81 @@ +/** + * \file timing.h + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef POLARSSL_TIMING_H +#define POLARSSL_TIMING_H + +/** + * \brief timer structure + */ +struct hr_time +{ + unsigned char opaque[32]; +}; + +#ifdef __cplusplus +extern "C" { +#endif + +extern int alarmed; + +/** + * \brief Return the CPU cycle counter value + */ +unsigned long hardclock( void ); + +/** + * \brief Return the elapsed time in milliseconds + * + * \param val points to a timer structure + * \param reset if set to 1, the timer is restarted + */ +unsigned long get_timer( struct hr_time *val, int reset ); + +/** + * \brief Setup an alarm clock + * + * \param seconds delay before the "alarmed" flag is set + */ +void set_alarm( int seconds ); + +/** + * \brief Sleep for a certain amount of time + */ +void m_sleep( int milliseconds ); + +#ifdef __cplusplus +} +#endif + +#endif /* timing.h */ diff --git a/package/px5g/src/polarssl/x509.h b/package/px5g/src/polarssl/x509.h new file mode 100644 index 000000000..908a1dbf5 --- /dev/null +++ b/package/px5g/src/polarssl/x509.h @@ -0,0 +1,549 @@ +/** + * \file x509.h + * + * Based on XySSL: Copyright (C) 2006-2008 Christophe Devine + * + * Copyright (C) 2009 Paul Bakker + * + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * + * * Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * * Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * * Neither the names of PolarSSL or XySSL nor the names of its contributors + * may be used to endorse or promote products derived from this software + * without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS + * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT + * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS + * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT + * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, + * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED + * TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR + * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF + * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING + * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS + * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + */ +#ifndef POLARSSL_X509_H +#define POLARSSL_X509_H + +#include "polarssl/rsa.h" + +#define POLARSSL_ERR_ASN1_OUT_OF_DATA -0x0014 +#define POLARSSL_ERR_ASN1_UNEXPECTED_TAG -0x0016 +#define POLARSSL_ERR_ASN1_INVALID_LENGTH -0x0018 +#define POLARSSL_ERR_ASN1_LENGTH_MISMATCH -0x001A +#define POLARSSL_ERR_ASN1_INVALID_DATA -0x001C + +#define POLARSSL_ERR_X509_FEATURE_UNAVAILABLE -0x0020 +#define POLARSSL_ERR_X509_CERT_INVALID_PEM -0x0040 +#define POLARSSL_ERR_X509_CERT_INVALID_FORMAT -0x0060 +#define POLARSSL_ERR_X509_CERT_INVALID_VERSION -0x0080 +#define POLARSSL_ERR_X509_CERT_INVALID_SERIAL -0x00A0 +#define POLARSSL_ERR_X509_CERT_INVALID_ALG -0x00C0 +#define POLARSSL_ERR_X509_CERT_INVALID_NAME -0x00E0 +#define POLARSSL_ERR_X509_CERT_INVALID_DATE -0x0100 +#define POLARSSL_ERR_X509_CERT_INVALID_PUBKEY -0x0120 +#define POLARSSL_ERR_X509_CERT_INVALID_SIGNATURE -0x0140 +#define POLARSSL_ERR_X509_CERT_INVALID_EXTENSIONS -0x0160 +#define POLARSSL_ERR_X509_CERT_UNKNOWN_VERSION -0x0180 +#define POLARSSL_ERR_X509_CERT_UNKNOWN_SIG_ALG -0x01A0 +#define POLARSSL_ERR_X509_CERT_UNKNOWN_PK_ALG -0x01C0 +#define POLARSSL_ERR_X509_CERT_SIG_MISMATCH -0x01E0 +#define POLARSSL_ERR_X509_CERT_VERIFY_FAILED -0x0200 +#define POLARSSL_ERR_X509_KEY_INVALID_PEM -0x0220 +#define POLARSSL_ERR_X509_KEY_INVALID_VERSION -0x0240 +#define POLARSSL_ERR_X509_KEY_INVALID_FORMAT -0x0260 +#define POLARSSL_ERR_X509_KEY_INVALID_ENC_IV -0x0280 +#define POLARSSL_ERR_X509_KEY_UNKNOWN_ENC_ALG -0x02A0 +#define POLARSSL_ERR_X509_KEY_PASSWORD_REQUIRED -0x02C0 +#define POLARSSL_ERR_X509_KEY_PASSWORD_MISMATCH -0x02E0 +#define POLARSSL_ERR_X509_POINT_ERROR -0x0300 +#define POLARSSL_ERR_X509_VALUE_TO_LENGTH -0x0320 + +#define BADCERT_EXPIRED 1 +#define BADCERT_REVOKED 2 +#define BADCERT_CN_MISMATCH 4 +#define BADCERT_NOT_TRUSTED 8 + +/* + * DER constants + */ +#define ASN1_BOOLEAN 0x01 +#define ASN1_INTEGER 0x02 +#define ASN1_BIT_STRING 0x03 +#define ASN1_OCTET_STRING 0x04 +#define ASN1_NULL 0x05 +#define ASN1_OID 0x06 +#define ASN1_UTF8_STRING 0x0C +#define ASN1_SEQUENCE 0x10 +#define ASN1_SET 0x11 +#define ASN1_PRINTABLE_STRING 0x13 +#define ASN1_T61_STRING 0x14 +#define ASN1_IA5_STRING 0x16 +#define ASN1_UTC_TIME 0x17 +#define ASN1_UNIVERSAL_STRING 0x1C +#define ASN1_BMP_STRING 0x1E +#define ASN1_PRIMITIVE 0x00 +#define ASN1_CONSTRUCTED 0x20 +#define ASN1_CONTEXT_SPECIFIC 0x80 + +/* + * various object identifiers + */ +#define X520_COMMON_NAME 3 +#define X520_COUNTRY 6 +#define X520_LOCALITY 7 +#define X520_STATE 8 +#define X520_ORGANIZATION 10 +#define X520_ORG_UNIT 11 +#define PKCS9_EMAIL 1 + +#define X509_OUTPUT_DER 0x01 +#define X509_OUTPUT_PEM 0x02 +#define PEM_LINE_LENGTH 72 +#define X509_ISSUER 0x01 +#define X509_SUBJECT 0x02 + +#define OID_X520 "\x55\x04" +#define OID_CN "\x55\x04\x03" +#define OID_PKCS1 "\x2A\x86\x48\x86\xF7\x0D\x01\x01" +#define OID_PKCS1_RSA "\x2A\x86\x48\x86\xF7\x0D\x01\x01\x01" +#define OID_PKCS1_RSA_SHA "\x2A\x86\x48\x86\xF7\x0D\x01\x01\x05" +#define OID_PKCS9 "\x2A\x86\x48\x86\xF7\x0D\x01\x09" +#define OID_PKCS9_EMAIL "\x2A\x86\x48\x86\xF7\x0D\x01\x09\x01" + +/* + * Structures for parsing X.509 certificates + */ +typedef struct _x509_buf +{ + int tag; + int len; + unsigned char *p; +} +x509_buf; + +typedef struct _x509_name +{ + x509_buf oid; + x509_buf val; + struct _x509_name *next; +} +x509_name; + +typedef struct _x509_time +{ + int year, mon, day; + int hour, min, sec; +} +x509_time; + +typedef struct _x509_cert +{ + x509_buf raw; + x509_buf tbs; + + int version; + x509_buf serial; + x509_buf sig_oid1; + + x509_buf issuer_raw; + x509_buf subject_raw; + + x509_name issuer; + x509_name subject; + + x509_time valid_from; + x509_time valid_to; + + x509_buf pk_oid; + rsa_context rsa; + + x509_buf issuer_id; + x509_buf subject_id; + x509_buf v3_ext; + + int ca_istrue; + int max_pathlen; + + x509_buf sig_oid2; + x509_buf sig; + + struct _x509_cert *next; +} +x509_cert; + +/* + * Structures for writing X.509 certificates + */ +typedef struct _x509_node +{ + unsigned char *data; + unsigned char *p; + unsigned char *end; + + size_t len; +} +x509_node; + +typedef struct _x509_raw +{ + x509_node raw; + x509_node tbs; + + x509_node version; + x509_node serial; + x509_node tbs_signalg; + x509_node issuer; + x509_node validity; + x509_node subject; + x509_node subpubkey; + + x509_node signalg; + x509_node sign; +} +x509_raw; + +#ifdef __cplusplus +extern "C" { +#endif + +/** + * \brief Parse one or more certificates and add them + * to the chained list + * + * \param chain points to the start of the chain + * \param buf buffer holding the certificate data + * \param buflen size of the buffer + * + * \return 0 if successful, or a specific X509 error code + */ +int x509parse_crt( x509_cert *crt, unsigned char *buf, int buflen ); + +/** + * \brief Load one or more certificates and add them + * to the chained list + * + * \param chain points to the start of the chain + * \param path filename to read the certificates from + * + * \return 0 if successful, or a specific X509 error code + */ +int x509parse_crtfile( x509_cert *crt, char *path ); + +/** + * \brief Parse a private RSA key + * + * \param rsa RSA context to be initialized + * \param buf input buffer + * \param buflen size of the buffer + * \param pwd password for decryption (optional) + * \param pwdlen size of the password + * + * \return 0 if successful, or a specific X509 error code + */ +int x509parse_key( rsa_context *rsa, + unsigned char *buf, int buflen, + unsigned char *pwd, int pwdlen ); + +/** + * \brief Load and parse a private RSA key + * + * \param rsa RSA context to be initialized + * \param path filename to read the private key from + * \param pwd password to decrypt the file (can be NULL) + * + * \return 0 if successful, or a specific X509 error code + */ +int x509parse_keyfile( rsa_context *rsa, char *path, char *password ); + +/** + * \brief Store the certificate DN in printable form into buf; + * no more than (end - buf) characters will be written. + */ +int x509parse_dn_gets( char *buf, char *end, x509_name *dn ); + +/** + * \brief Returns an informational string about the + * certificate. + */ +char *x509parse_cert_info( char *prefix, x509_cert *crt ); + +/** + * \brief Return 0 if the certificate is still valid, + * or BADCERT_EXPIRED + */ +int x509parse_expired( x509_cert *crt ); + +/** + * \brief Verify the certificate signature + * + * \param crt a certificate to be verified + * \param trust_ca the trusted CA chain + * \param cn expected Common Name (can be set to + * NULL if the CN must not be verified) + * \param flags result of the verification + * + * \return 0 if successful or POLARSSL_ERR_X509_SIG_VERIFY_FAILED, + * in which case *flags will have one or more of + * the following values set: + * BADCERT_EXPIRED -- + * BADCERT_REVOKED -- + * BADCERT_CN_MISMATCH -- + * BADCERT_NOT_TRUSTED + * + * \note TODO: add two arguments, depth and crl + */ +int x509parse_verify( x509_cert *crt, + x509_cert *trust_ca, + char *cn, int *flags ); + +/** + * \brief Unallocate all certificate data + */ +void x509_free( x509_cert *crt ); + +/** + * \brief Checkup routine + * + * \return 0 if successful, or 1 if the test failed + */ +int x509_self_test( int verbose ); + +/** + * \brief Write a certificate info file + * + * \param chain points to the raw certificate data + * \param path filename to write the certificate to + * \param format X509_OUTPUT_DER or X509_OUTPUT_PEM + * + * \return 0 if successful, or a specific X509 error code + */ +int x509write_crtfile( x509_raw *chain, + unsigned char *path, + int format ); + +/** + * \brief Write a certificate signing request message format file + * + * \param chain points to the raw certificate (with x509write_create_csr) data + * \param path filename to write the certificate to + * \param format X509_OUTPUT_DER or X509_OUTPUT_PEM + * + * \return 0 if successful, or a specific X509 error code + */ +int x509write_csrfile( x509_raw *chain, + unsigned char *path, + int format ); + +/* + * \brief Write a private RSA key into a file + * + * \param rsa points to an RSA key + * \param path filename to write the key to + * \param format X509_OUTPUT_DER or X509_OUTPUT_PEM + * + * \return 0 if successful, or a specific X509 error code + */ +int x509write_keyfile( rsa_context *rsa, + char *path, + int format ); + +/** + * \brief Add a public key to certificate + * + * \param chain points to the raw certificate data + * \param pubkey points to an RSA key + * + * \return 0 if successful, or a specific X509 error code + */ +int x509write_add_pubkey( x509_raw *chain, rsa_context *pubkey ); + +/** + * \brief Create x509 subject/issuer field to raw certificate + * from string or CA cert. Make string NULL if you will + * use the CA copy function or make CA NULL then used + * the string parse. + * + * \param chain points to the raw certificate data + * \param names a string that can hold (separete with ";"): + * CN=CommonName + * -- O=Organization + * -- OU=OrgUnit + * -- ST=State + * -- L=Locality + * -- R=Email + * -- C=Country + * . Make that NULL if you didn't need that. + * \param flag flag is X509_ISSUER or X509_SUBJECT that defined + * where change + * \param ca the certificate for copy data. Make that NULL if you + * didn't need that. + * \param ca_flag set the ca field from copy to crt + * + * \return 0 if successful, or a specific X509 error code + */ +int x509write_add_customize ( x509_raw *crt, + unsigned char *names, + int flag, + x509_cert *ca, + int ca_flag ); + +/** +* \brief Add x509 issuer field +* +* \param chain points to the raw certificate data +* \param issuer a string holding (separete with ";"): +* CN=CommonName +* -- O=Organization +* -- OU=OrgUnit +* -- ST=State +* -- L=Locality +* -- R=Email +* -- C=Country +* . Set this to NULL if not needed. +* \return 0 if successful, or a specific X509 error code +*/ +int x509write_add_issuer( x509_raw *crt, unsigned char *issuer); + +/** + * \brief Add x509 subject field + * + * \param chain points to the raw certificate data + * \param subject a string holding (separete with ";"): + * CN=CommonName + * -- O=Organization + * -- OU=OrgUnit + * -- ST=State + * -- L=Locality + * -- R=Email + * -- C=Country + * . Set this to NULL if not needed. + * \return 0 if successful, or a specific X509 error code + */ +int x509write_add_subject( x509_raw *crt, unsigned char *subject); + +/** +* \brief Copy x509 issuer field from another certificate +* +* \param chain points to the raw certificate data +* \param from_crt the certificate whose issuer is to be copied. +* \return 0 if successful, or a specific X509 error code +*/ +int x509write_copy_issuer(x509_raw *crt, x509_cert *from_crt); + +/** +* \brief Copy x509 subject field from another certificate +* +* \param chain points to the raw certificate data +* \param from_crt the certificate whose subject is to be copied. +* \return 0 if successful, or a specific X509 error code +*/ +int x509write_copy_subject(x509_raw *crt, x509_cert *from_crt); + +/** +* \brief Copy x509 issuer field from the subject of another certificate +* +* \param chain points to the raw certificate data +* \param from_crt the certificate whose subject is to be copied. +* \return 0 if successful, or a specific X509 error code +*/ +int x509write_copy_issuer_from_subject(x509_raw *crt, x509_cert *from_crt); + +/** +* \brief Copy x509 subject field from the issuer of another certificate +* +* \param chain points to the raw certificate data +* \param from_crt the certificate whose issuer is to be copied. +* \return 0 if successful, or a specific X509 error code +*/ +int x509write_copy_subject_from_issuer(x509_raw *crt, x509_cert *from_crt); + +/** + * \brief Create x509 validity time in UTC + * + * \param chain points to the raw certificate data + * \param before valid not before in format YYYY-MM-DD hh:mm:ss + * \param after valid not after in format YYYY-MM-DD hh:mm:ss + * + * \return 0 if successful, or a specific X509 error code + */ +int x509write_add_validity( x509_raw *crt, + unsigned char *before, + unsigned char *after ); + +/** + * \brief Create a self-signed certificate + * + * \param chain points to the raw certificate data + * \param rsa a private key to sign the certificate + * + * \return 0 if successful, or a specific X509 error code + */ +int x509write_create_selfsign( x509_raw *crt, rsa_context *raw ); + +/** + * \brief Create a certificate + * + * \param chain points to the raw certificate data + * \param rsa a private key to sign the certificate + * + * \return 0 if successful, or a specific X509 error code + */ +int x509write_create_sign( x509_raw *crt, rsa_context *raw ); + +/** + * \brief Create a certificate signing request + * + * \param chain points to the raw certificate data. Didn't use the + * same chain that u have use for certificate. + * \param privkey a rsa private key + * + * \return 0 if successful, or a specific X509 error code + */ +int x509write_create_csr( x509_raw *chain, rsa_context *privkey ); + +/** + * \brief Serialize an rsa key into DER + * + * \param rsa a rsa key for output + * \param node a x509 node for write into + * + * \return 0 if successful, or a specific X509 error code + */ +int x509write_serialize_key( rsa_context *rsa, x509_node *node ); + +/** + * \brief Unallocate all raw certificate data + */ +void x509write_free_raw( x509_raw *crt ); + +/** + * \brief Allocate all raw certificate data + */ +void x509write_init_raw( x509_raw *crt ); + +/** + * \brief Unallocate all node certificate data + */ +void x509write_free_node( x509_node *crt_node ); + +/** + * \brief Allocate all node certificate data + */ +void x509write_init_node( x509_node *crt_node ); + +#ifdef __cplusplus +} +#endif + +#endif /* x509.h */ diff --git a/package/px5g/src/px5g.c b/package/px5g/src/px5g.c new file mode 100644 index 000000000..2b3e78585 --- /dev/null +++ b/package/px5g/src/px5g.c @@ -0,0 +1,197 @@ +/* + * px5g - Embedded x509 key and certificate generator based on PolarSSL + * + * Copyright (C) 2009 Steven Barth + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public + * License, version 2.1 as published by the Free Software Foundation. + * + * This library is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, write to the Free Software + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, + * MA 02110-1301 USA + */ + +#include +#include +#include +#include +#include "polarssl/havege.h" +#include "polarssl/bignum.h" +#include "polarssl/x509.h" +#include "polarssl/rsa.h" + +#define PX5G_VERSION "0.1" +#define PX5G_COPY "Copyright (c) 2009 Steven Barth " +#define PX5G_LICENSE "Licensed under the GNU Lesser General Public License v2.1" + +int rsakey(char **arg) { + havege_state hs; + rsa_context rsa; + + unsigned int ksize = 512; + int exp = 65537; + char *path = NULL; + int flag = X509_OUTPUT_PEM; + + while (*arg && **arg == '-') { + if (!strcmp(*arg, "-out") && arg[1]) { + path = arg[1]; + arg++; + } else if (!strcmp(*arg, "-3")) { + exp = 3; + } else if (!strcmp(*arg, "-der")) { + flag = X509_OUTPUT_DER; + } + arg++; + } + + if (*arg) { + ksize = (unsigned int)atoi(*arg); + } + + havege_init(&hs); + rsa_init(&rsa, RSA_PKCS_V15, 0, havege_rand, &hs); + + fprintf(stderr, "Generating RSA private key, %i bit long modulus\n", ksize); + if (rsa_gen_key(&rsa, ksize, exp)) { + fprintf(stderr, "error: key generation failed\n"); + return 1; + } + + if (x509write_keyfile(&rsa, path, flag)) { + fprintf(stderr, "error: I/O error\n"); + return 1; + } + + rsa_free(&rsa); + return 0; +} + +int selfsigned(char **arg) { + havege_state hs; + rsa_context rsa; + x509_node node; + + char *subject = ""; + unsigned int ksize = 512; + int exp = 65537; + unsigned int days = 30; + char *keypath = NULL, *certpath = NULL; + int flag = X509_OUTPUT_PEM; + time_t from = time(NULL), to; + char fstr[20], tstr[20]; + + while (*arg && **arg == '-') { + if (!strcmp(*arg, "-der")) { + flag = X509_OUTPUT_DER; + } else if (!strcmp(*arg, "-newkey") && arg[1]) { + if (strncmp(arg[1], "rsa:", 4)) { + fprintf(stderr, "error: invalid algorithm"); + return 1; + } + ksize = (unsigned int)atoi(arg[1] + 4); + arg++; + } else if (!strcmp(*arg, "-days") && arg[1]) { + days = (unsigned int)atoi(arg[1]); + arg++; + } else if (!strcmp(*arg, "-keyout") && arg[1]) { + keypath = arg[1]; + arg++; + } else if (!strcmp(*arg, "-out") && arg[1]) { + certpath = arg[1]; + arg++; + } else if (!strcmp(*arg, "-subj") && arg[1]) { + if (arg[1][0] != '/' || strchr(arg[1], ';')) { + fprintf(stderr, "error: invalid subject"); + return 1; + } + subject = calloc(strlen(arg[1]) + 1, 1); + char *oldc = arg[1] + 1, *newc = subject, *delim; + do { + delim = strchr(oldc, '='); + if (!delim) { + fprintf(stderr, "error: invalid subject"); + return 1; + } + memcpy(newc, oldc, delim - oldc + 1); + newc += delim - oldc + 1; + oldc = delim + 1; + + delim = strchr(oldc, '/'); + if (!delim) { + delim = arg[1] + strlen(arg[1]); + } + memcpy(newc, oldc, delim - oldc); + newc += delim - oldc; + *newc++ = ';'; + oldc = delim + 1; + } while(*delim); + arg++; + } + arg++; + } + + havege_init(&hs); + rsa_init(&rsa, RSA_PKCS_V15, 0, havege_rand, &hs); + x509write_init_node(&node); + fprintf(stderr, "Generating RSA private key, %i bit long modulus\n", ksize); + if (rsa_gen_key(&rsa, ksize, exp)) { + fprintf(stderr, "error: key generation failed\n"); + return 1; + } + + if (keypath) { + if (x509write_keyfile(&rsa, keypath, flag)) { + fprintf(stderr, "error: I/O error\n"); + return 1; + } + } + + from = (from < 1000000000) ? 1000000000 : from; + strftime(fstr, sizeof(fstr), "%F %H:%M:%S", gmtime(&from)); + to = from + 60 * 60 * 24 * days; + strftime(tstr, sizeof(tstr), "%F %H:%M:%S", gmtime(&to)); + + x509_raw cert; + x509write_init_raw(&cert); + x509write_add_pubkey(&cert, &rsa); + x509write_add_subject(&cert, (unsigned char*)subject); + x509write_add_validity(&cert, (unsigned char*)fstr, (unsigned char*)tstr); + fprintf(stderr, "Generating selfsigned certificate with subject '%s'" + " and validity %s-%s\n", subject, fstr, tstr); + if (x509write_create_selfsign(&cert, &rsa)) { + fprintf(stderr, "error: certificate generation failed\n"); + } + + if (x509write_crtfile(&cert, (unsigned char*)certpath, flag)) { + fprintf(stderr, "error: I/O error\n"); + return 1; + } + + x509write_free_raw(&cert); + rsa_free(&rsa); + return 0; +} + +int main(int argc, char *argv[]) { + if (!argv[1]) { + //Usage + } else if (!strcmp(argv[1], "rsakey")) { + return rsakey(argv+2); + } else if (!strcmp(argv[1], "selfsigned")) { + return selfsigned(argv+2); + } + + fprintf(stderr, + "PX5G X.509 Certificate Generator Utility v" PX5G_VERSION "\n" PX5G_COPY + "\nbased on PolarSSL by Christophe Devine and Paul Bakker\n\n"); + fprintf(stderr, "Usage: %s [rsakey|selfsigned]\n", *argv); + return 1; +} diff --git a/package/uboot-ifxmips/Config.in b/package/uboot-ifxmips/Config.in new file mode 100644 index 000000000..4562fc8ef --- /dev/null +++ b/package/uboot-ifxmips/Config.in @@ -0,0 +1,5 @@ +config IFXMIPS_UBOOT_A800 + bool "add ARV452 Switch bringup hack" + depends on PACKAGE_uboot-ifxmips + help + Say Y, if you have a arv452 board (wav-281, A800, ..) diff --git a/package/uboot-ifxmips/Makefile b/package/uboot-ifxmips/Makefile index ade82bf7b..932c17f41 100644 --- a/package/uboot-ifxmips/Makefile +++ b/package/uboot-ifxmips/Makefile @@ -25,7 +25,7 @@ define Package/uboot-ifxmips CATEGORY:=Boot Loaders DEPENDS:=@TARGET_ifxmips TITLE:=U-Boot for Infineon MIPS boards - URL:=http://www.denx.de/wiki/UBoot/WebHome + URL:=http://www.denx.de/wiki/U-Boot endef define Build/Prepare @@ -34,6 +34,10 @@ define Build/Prepare find $(PKG_BUILD_DIR) -name .svn | $(XARGS) rm -rf endef +define Package/uboot-ifxmips/config + source "$(SOURCE)/Config.in" +endef + UBOOT_CONFIG:=danube UBOOT_MAKE_OPTS:=\ @@ -43,6 +47,11 @@ UBOOT_MAKE_OPTS:=\ PLATFORM_CPU=mips32r2 \ UBOOT_RAM_TEXT_BASE=0xA0400000 +A800_FIX:= +ifeq ($(CONFIG_IFXMIPS_UBOOT_A800),y) +A800_FIX += -DA800_SWITCH +endif + define Build/Configure $(MAKE) -s -C $(PKG_BUILD_DIR) \ $(UBOOT_MAKE_OPTS) \ @@ -52,7 +61,7 @@ endef define Build/Compile $(MAKE) -C $(PKG_BUILD_DIR) \ $(UBOOT_MAKE_OPTS) \ - OWRT_FLAGS="-DTEXT_BASE=0xa0400000" \ + OWRT_FLAGS="-DTEXT_BASE=0xa0400000 ${A800_FIX}" \ ifx_all $(CP) $(PKG_BUILD_DIR)/u-boot.srec $(PKG_BUILD_DIR)/asc.srec $(PKG_BUILD_DIR)/gct \ @@ -61,7 +70,7 @@ define Build/Compile $(PKG_BUILD_DIR)/u-boot.asc $(MAKE) -C $(PKG_BUILD_DIR) \ $(UBOOT_MAKE_OPTS) \ - OWRT_FLAGS="-DDANUBE_BOOT_FROM_EBU=1 -DTEXT_BASE=0xB0000000" \ + OWRT_FLAGS="-DDANUBE_BOOT_FROM_EBU=1 -DTEXT_BASE=0xB0000000 ${A800_FIX}" \ clean ifx_all endef diff --git a/package/uboot-ifxmips/files/board/ifx/danube/flash.c b/package/uboot-ifxmips/files/board/ifx/danube/flash.c index bc919c1c1..d95888fdf 100644 --- a/package/uboot-ifxmips/files/board/ifx/danube/flash.c +++ b/package/uboot-ifxmips/files/board/ifx/danube/flash.c @@ -83,12 +83,10 @@ unsigned long flash_init (void) unsigned long size = 0; int i; - printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__); /* Init: no FLASHes known */ for (i=0; i < CFG_MAX_FLASH_BANKS; ++i) { // 1 bank ulong flashbase = (i == 0) ? PHYS_FLASH_1 : PHYS_FLASH_2; // 0xb0000000, 0xb4000000 - printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__); volatile ulong * buscon = (ulong *) ((i == 0) ? DANUBE_EBU_BUSCON0 : DANUBE_EBU_BUSCON1); @@ -96,12 +94,10 @@ unsigned long flash_init (void) // *buscon &= ~AMAZON_EBU_BUSCON0_WRDIS; /* Enable write protection */ *buscon |= DANUBE_EBU_BUSCON0_WRDIS; -printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__); #if 1 memset(&flash_info[i], 0, sizeof(flash_info_t)); #endif -printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__); flash_info[i].size = flash_get_size((FPW *)flashbase, &flash_info[i]); @@ -463,23 +459,19 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info) // asm("SYNC"); switch (addr[1] & 0xff) { case (uchar)AMD_MANUFACT: - printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__); info->flash_id = FLASH_MAN_AMD; break; case (uchar)INTEL_MANUFACT: // 0x0089 - printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__); info->flash_id = FLASH_MAN_INTEL; //0x00300000 break; //joelin for MXIC case (uchar)MX_MANUFACT: // 0x00c2 - printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__); info->flash_id = FLASH_MAN_MX ;//0x00030000 break; default: - printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__); info->flash_id = FLASH_UNKNOWN; info->sector_count = 0; info->size = 0; @@ -489,11 +481,9 @@ ulong flash_get_size (FPWV *addr, flash_info_t *info) break;*/ } - printf("%s:%s[%d] %08lx\n", __FILE__, __func__, __LINE__, addr[0]); /* Check 16 bits or 32 bits of ID so work on 32 or 16 bit bus. */ if (info->flash_id != FLASH_UNKNOWN) switch (addr[0]) { case (FPW)EON_ID_EN29LV320B: - printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__); info->flash_id += FLASH_29LV320B; info->sector_count = 71; info->size = 0x00400000 * (sizeof(FPW)/2); diff --git a/package/uboot-ifxmips/patches/001-portability.patch b/package/uboot-ifxmips/patches/001-portability.patch new file mode 100644 index 000000000..02af987a4 --- /dev/null +++ b/package/uboot-ifxmips/patches/001-portability.patch @@ -0,0 +1,30 @@ +--- a/Makefile ++++ b/Makefile +@@ -275,10 +275,10 @@ $(U_BOOT_NAND): $(NAND_SPL) $(obj)u-boot + cat nand_spl/u-boot-spl-16k.bin $(obj)u-boot.bin > $(obj)u-boot-nand.bin + + version: +- @echo -n "#define U_BOOT_VERSION \"U-Boot " > $(VERSION_FILE); \ +- echo -n "$(U_BOOT_VERSION)" >> $(VERSION_FILE); \ +- echo -n $(shell $(CONFIG_SHELL) $(TOPDIR)/tools/setlocalversion \ +- $(TOPDIR)) >> $(VERSION_FILE); \ ++ @printf "#define U_BOOT_VERSION \"U-Boot " > $(VERSION_FILE); \ ++ printf "$(U_BOOT_VERSION)" >> $(VERSION_FILE); \ ++ printf "$(shell $(CONFIG_SHELL) $(TOPDIR)/tools/setlocalversion \ ++ $(TOPDIR))" >> $(VERSION_FILE); \ + echo "\"" >> $(VERSION_FILE) + + gdbtools: +@@ -1593,10 +1593,10 @@ MPC8540EVAL_66_slave_config: unconf + @mkdir -p $(obj)include + @echo "" >$(obj)include/config.h ; \ + if [ "$(findstring _33_,$@)" ] ; then \ +- echo -n "... 33 MHz PCI" ; \ ++ printf "... 33 MHz PCI" ; \ + else \ + echo "#define CONFIG_SYSCLK_66M" >>$(obj)include/config.h ; \ +- echo -n "... 66 MHz PCI" ; \ ++ printf "... 66 MHz PCI" ; \ + fi ; \ + if [ "$(findstring _slave_,$@)" ] ; then \ + echo "#define CONFIG_PCI_SLAVE" >>$(obj)include/config.h ; \ diff --git a/package/uboot-ifxmips/patches/100-ifx.patch b/package/uboot-ifxmips/patches/100-ifx.patch index 5b0859c3b..5360099fb 100644 --- a/package/uboot-ifxmips/patches/100-ifx.patch +++ b/package/uboot-ifxmips/patches/100-ifx.patch @@ -1,7 +1,5 @@ -Index: u-boot-1.1.5/Makefile -=================================================================== ---- u-boot-1.1.5.orig/Makefile 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/Makefile 2009-11-09 16:35:03.000000000 +0100 +--- a/Makefile ++++ b/Makefile @@ -24,7 +24,7 @@ VERSION = 1 PATCHLEVEL = 1 @@ -11,7 +9,7 @@ Index: u-boot-1.1.5/Makefile U_BOOT_VERSION = $(VERSION).$(PATCHLEVEL).$(SUBLEVEL)$(EXTRAVERSION) VERSION_FILE = $(obj)include/version_autogenerated.h -@@ -44,6 +44,25 @@ +@@ -44,6 +44,25 @@ export HOSTARCH HOSTOS # Deal with colliding definitions from tcsh etc. VENDOR= @@ -37,7 +35,7 @@ Index: u-boot-1.1.5/Makefile ######################################################################### # # U-boot build supports producing a object files to the separate external -@@ -164,6 +183,11 @@ +@@ -164,6 +183,11 @@ include $(TOPDIR)/config.mk # U-Boot objects....order is important (i.e. start must be first) OBJS = cpu/$(CPU)/start.o @@ -49,7 +47,7 @@ Index: u-boot-1.1.5/Makefile ifeq ($(CPU),i386) OBJS += cpu/$(CPU)/start16.o OBJS += cpu/$(CPU)/reset.o -@@ -183,6 +207,7 @@ +@@ -183,6 +207,7 @@ OBJS += cpu/$(CPU)/cplbhdlr.o cpu/$(CPU) endif OBJS := $(addprefix $(obj),$(OBJS)) @@ -57,7 +55,7 @@ Index: u-boot-1.1.5/Makefile LIBS = lib_generic/libgeneric.a LIBS += board/$(BOARDDIR)/lib$(BOARD).a -@@ -206,15 +231,24 @@ +@@ -206,15 +231,24 @@ LIBS += common/libcommon.a LIBS += $(BOARDLIBS) LIBS := $(addprefix $(obj),$(LIBS)) @@ -83,7 +81,7 @@ Index: u-boot-1.1.5/Makefile post \ post/cpu .PHONY : $(SUBDIRS) -@@ -226,14 +260,75 @@ +@@ -226,14 +260,75 @@ endif __OBJS := $(subst $(obj),,$(OBJS)) __LIBS := $(subst $(obj),,$(LIBS)) @@ -159,7 +157,7 @@ Index: u-boot-1.1.5/Makefile $(obj)u-boot.hex: $(obj)u-boot $(OBJCOPY) ${OBJCFLAGS} -O ihex $< $@ -@@ -243,28 +338,33 @@ +@@ -243,28 +338,33 @@ $(obj)u-boot.srec: $(obj)u-boot $(obj)u-boot.bin: $(obj)u-boot $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@ @@ -201,7 +199,7 @@ Index: u-boot-1.1.5/Makefile $(SUBDIRS): $(MAKE) -C $@ all -@@ -310,7 +410,12 @@ +@@ -310,7 +410,12 @@ etags: $(obj)System.map: $(obj)u-boot @$(NM) $< | \ grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \ @@ -215,7 +213,7 @@ Index: u-boot-1.1.5/Makefile ######################################################################### else -@@ -2032,7 +2137,20 @@ +@@ -2032,7 +2137,20 @@ sc520_spunk_rel_config : unconfig # MIPS #======================================================================== ######################################################################### @@ -237,7 +235,7 @@ Index: u-boot-1.1.5/Makefile ######################################################################### xtract_incaip = $(subst _100MHz,,$(subst _133MHz,,$(subst _150MHz,,$(subst _config,,$1)))) -@@ -2254,7 +2372,7 @@ +@@ -2254,7 +2372,7 @@ clobber: clean | xargs -0 rm -f rm -f $(OBJS) $(obj)*.bak $(obj)ctags $(obj)etags $(obj)TAGS $(obj)include/version_autogenerated.h rm -fr $(obj)*.*~ @@ -246,10 +244,8 @@ Index: u-boot-1.1.5/Makefile rm -f $(obj)tools/crc32.c $(obj)tools/environment.c $(obj)tools/env/crc32.c rm -f $(obj)tools/inca-swap-bytes $(obj)cpu/mpc824x/bedbug_603e.c rm -f $(obj)include/asm/proc $(obj)include/asm/arch $(obj)include/asm -Index: u-boot-1.1.5/common/cmd_bootm.c -=================================================================== ---- u-boot-1.1.5.orig/common/cmd_bootm.c 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/common/cmd_bootm.c 2009-11-09 16:35:03.000000000 +0100 +--- a/common/cmd_bootm.c ++++ b/common/cmd_bootm.c @@ -31,6 +31,7 @@ #include #include @@ -258,7 +254,7 @@ Index: u-boot-1.1.5/common/cmd_bootm.c #include #include -@@ -79,6 +80,8 @@ +@@ -79,6 +80,8 @@ DECLARE_GLOBAL_DATA_PTR; # define CHUNKSZ (64 * 1024) #endif @@ -267,7 +263,7 @@ Index: u-boot-1.1.5/common/cmd_bootm.c int gunzip (void *, int, unsigned char *, unsigned long *); static void *zalloc(void *, unsigned, unsigned); -@@ -341,6 +344,7 @@ +@@ -341,6 +344,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag #endif /* CONFIG_HW_WATCHDOG || CONFIG_WATCHDOG */ } break; @@ -275,7 +271,7 @@ Index: u-boot-1.1.5/common/cmd_bootm.c case IH_COMP_GZIP: printf (" Uncompressing %s ... ", name); if (gunzip ((void *)ntohl(hdr->ih_load), unc_len, -@@ -350,6 +354,7 @@ +@@ -350,6 +354,7 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag do_reset (cmdtp, flag, argc, argv); } break; @@ -283,7 +279,7 @@ Index: u-boot-1.1.5/common/cmd_bootm.c #ifdef CONFIG_BZIP2 case IH_COMP_BZIP2: printf (" Uncompressing %s ... ", name); -@@ -369,6 +374,18 @@ +@@ -369,6 +374,18 @@ int do_bootm (cmd_tbl_t *cmdtp, int flag } break; #endif /* CONFIG_BZIP2 */ @@ -302,7 +298,7 @@ Index: u-boot-1.1.5/common/cmd_bootm.c default: if (iflag) enable_interrupts(); -@@ -1176,6 +1193,8 @@ +@@ -1176,6 +1193,8 @@ U_BOOT_CMD( ); #endif /* CFG_CMD_IMLS */ @@ -311,7 +307,7 @@ Index: u-boot-1.1.5/common/cmd_bootm.c void print_image_hdr (image_header_t *hdr) { -@@ -1270,12 +1289,15 @@ +@@ -1270,12 +1289,15 @@ print_type (image_header_t *hdr) case IH_COMP_NONE: comp = "uncompressed"; break; case IH_COMP_GZIP: comp = "gzip compressed"; break; case IH_COMP_BZIP2: comp = "bzip2 compressed"; break; @@ -327,17 +323,15 @@ Index: u-boot-1.1.5/common/cmd_bootm.c #define ZALLOC_ALIGNMENT 16 static void *zalloc(void *x, unsigned items, unsigned size) -@@ -1427,3 +1449,5 @@ +@@ -1427,3 +1449,5 @@ do_bootm_lynxkdi (cmd_tbl_t *cmdtp, int } #endif /* CONFIG_LYNXKDI */ + +#endif /* ! CFG_HEAD_CODE */ -Index: u-boot-1.1.5/common/cmd_flash.c -=================================================================== ---- u-boot-1.1.5.orig/common/cmd_flash.c 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/common/cmd_flash.c 2009-11-09 16:35:03.000000000 +0100 -@@ -196,9 +196,17 @@ +--- a/common/cmd_flash.c ++++ b/common/cmd_flash.c +@@ -196,9 +196,17 @@ addr_spec(char *arg1, char *arg2, ulong } static int @@ -358,7 +352,7 @@ Index: u-boot-1.1.5/common/cmd_flash.c { flash_info_t *info; ulong bank; -@@ -211,9 +219,7 @@ +@@ -211,9 +219,7 @@ flash_fill_sect_ranges (ulong addr_first s_last [bank] = -1; /* last sector to erase */ } @@ -369,7 +363,7 @@ Index: u-boot-1.1.5/common/cmd_flash.c ulong b_end; int sect; short s_end; -@@ -225,7 +231,6 @@ +@@ -225,7 +231,6 @@ flash_fill_sect_ranges (ulong addr_first b_end = info->start[0] + info->size - 1; /* bank end addr */ s_end = info->sector_count - 1; /* last sector */ @@ -377,7 +371,7 @@ Index: u-boot-1.1.5/common/cmd_flash.c for (sect=0; sect < info->sector_count; ++sect) { ulong end; /* last address in current sect */ -@@ -238,11 +243,21 @@ +@@ -238,11 +243,21 @@ flash_fill_sect_ranges (ulong addr_first if (addr_first == info->start[sect]) { s_first[bank] = sect; @@ -399,7 +393,7 @@ Index: u-boot-1.1.5/common/cmd_flash.c if (s_first[bank] >= 0) { if (s_last[bank] < 0) { if (addr_last > b_end) { -@@ -316,6 +331,8 @@ +@@ -316,6 +331,8 @@ int do_flerase (cmd_tbl_t *cmdtp, int fl struct part_info *part; u8 dev_type, dev_num, pnum; #endif @@ -408,7 +402,7 @@ Index: u-boot-1.1.5/common/cmd_flash.c int rcode = 0; if (argc < 2) { -@@ -369,7 +386,7 @@ +@@ -369,7 +386,7 @@ int do_flerase (cmd_tbl_t *cmdtp, int fl } #endif @@ -417,7 +411,7 @@ Index: u-boot-1.1.5/common/cmd_flash.c printf ("Usage:\n%s\n", cmdtp->usage); return 1; } -@@ -397,11 +414,117 @@ +@@ -397,11 +414,117 @@ int do_flerase (cmd_tbl_t *cmdtp, int fl return 1; } @@ -537,7 +531,7 @@ Index: u-boot-1.1.5/common/cmd_flash.c { flash_info_t *info; ulong bank; -@@ -413,27 +536,66 @@ +@@ -413,27 +536,66 @@ int flash_sect_erase (ulong addr_first, int erased = 0; int planned; int rcode = 0; @@ -620,7 +614,7 @@ Index: u-boot-1.1.5/common/cmd_flash.c } else if (rcode == 0) { puts ("Error: start and/or end address" " not on sector boundary\n"); -@@ -629,8 +791,22 @@ +@@ -629,8 +791,22 @@ int flash_sect_protect (int p, ulong add int protected, i; int planned; int rcode; @@ -645,7 +639,7 @@ Index: u-boot-1.1.5/common/cmd_flash.c protected = 0; -@@ -690,7 +866,7 @@ +@@ -690,7 +866,7 @@ U_BOOT_CMD( ); U_BOOT_CMD( @@ -654,11 +648,9 @@ Index: u-boot-1.1.5/common/cmd_flash.c "erase - erase FLASH memory\n", "start end\n" " - erase FLASH from addr 'start' to addr 'end'\n" -Index: u-boot-1.1.5/common/cmd_nvedit.c -=================================================================== ---- u-boot-1.1.5.orig/common/cmd_nvedit.c 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/common/cmd_nvedit.c 2009-11-09 16:35:03.000000000 +0100 -@@ -540,8 +540,19 @@ +--- a/common/cmd_nvedit.c ++++ b/common/cmd_nvedit.c +@@ -540,8 +540,19 @@ int do_saveenv (cmd_tbl_t *cmdtp, int fl extern char * env_name_spec; printf ("Saving Environment to %s...\n", env_name_spec); @@ -679,11 +671,9 @@ Index: u-boot-1.1.5/common/cmd_nvedit.c } -Index: u-boot-1.1.5/common/console.c -=================================================================== ---- u-boot-1.1.5.orig/common/console.c 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/common/console.c 2009-11-09 16:35:03.000000000 +0100 -@@ -324,7 +324,7 @@ +--- a/common/console.c ++++ b/common/console.c +@@ -324,7 +324,7 @@ inline void dbg(const char *fmt, ...) #endif /** U-Boot INIT FUNCTIONS *************************************************/ @@ -692,7 +682,7 @@ Index: u-boot-1.1.5/common/console.c int console_assign (int file, char *devname) { int flag, i; -@@ -357,7 +357,7 @@ +@@ -357,7 +357,7 @@ int console_assign (int file, char *devn return -1; } @@ -701,7 +691,7 @@ Index: u-boot-1.1.5/common/console.c /* Called before relocation - use serial functions */ int console_init_f (void) { -@@ -392,6 +392,7 @@ +@@ -392,6 +392,7 @@ device_t *search_device (int flags, char } #endif /* CFG_CONSOLE_IS_IN_ENV || CONFIG_SPLASH_SCREEN */ @@ -709,16 +699,14 @@ Index: u-boot-1.1.5/common/console.c #ifdef CFG_CONSOLE_IS_IN_ENV /* Called after the relocation - use desired console functions */ int console_init_r (void) -@@ -570,3 +571,4 @@ +@@ -570,3 +571,4 @@ int console_init_r (void) } #endif /* CFG_CONSOLE_IS_IN_ENV */ +#endif //CFG_HEAD_CODE -Index: u-boot-1.1.5/common/devices.c -=================================================================== ---- u-boot-1.1.5.orig/common/devices.c 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/common/devices.c 2009-11-09 16:35:03.000000000 +0100 -@@ -39,6 +39,7 @@ +--- a/common/devices.c ++++ b/common/devices.c +@@ -39,6 +39,7 @@ DECLARE_GLOBAL_DATA_PTR; list_t devlist = 0; device_t *stdio_devices[] = { NULL, NULL, NULL }; char *stdio_names[MAX_FILES] = { "stdin", "stdout", "stderr" }; @@ -726,17 +714,15 @@ Index: u-boot-1.1.5/common/devices.c #if defined(CONFIG_SPLASH_SCREEN) && !defined(CFG_DEVICE_NULLDEV) #define CFG_DEVICE_NULLDEV 1 -@@ -214,3 +215,5 @@ +@@ -214,3 +215,5 @@ int devices_done (void) return 0; } +#endif //CFG_HEAD_CODE + -Index: u-boot-1.1.5/common/env_common.c -=================================================================== ---- u-boot-1.1.5.orig/common/env_common.c 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/common/env_common.c 2009-11-09 16:35:03.000000000 +0100 -@@ -219,7 +219,9 @@ +--- a/common/env_common.c ++++ b/common/env_common.c +@@ -219,7 +219,9 @@ void env_relocate (void) * We must allocate a buffer for the environment */ env_ptr = (env_t *)malloc (CFG_ENV_SIZE); @@ -747,7 +733,7 @@ Index: u-boot-1.1.5/common/env_common.c #endif /* -@@ -227,6 +229,10 @@ +@@ -227,6 +229,10 @@ void env_relocate (void) */ env_get_char = env_get_char_memory; @@ -758,7 +744,7 @@ Index: u-boot-1.1.5/common/env_common.c if (gd->env_valid == 0) { #if defined(CONFIG_GTH) || defined(CFG_ENV_IS_NOWHERE) /* Environment not changable */ puts ("Using default environment\n\n"); -@@ -242,18 +248,17 @@ +@@ -242,18 +248,17 @@ void env_relocate (void) } memset (env_ptr, 0, sizeof(env_t)); @@ -781,11 +767,9 @@ Index: u-boot-1.1.5/common/env_common.c gd->env_addr = (ulong)&(env_ptr->data); #ifdef CONFIG_AMIGAONEG3SE -Index: u-boot-1.1.5/common/env_flash.c -=================================================================== ---- u-boot-1.1.5.orig/common/env_flash.c 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/common/env_flash.c 2009-11-09 16:35:03.000000000 +0100 -@@ -66,7 +66,6 @@ +--- a/common/env_flash.c ++++ b/common/env_flash.c +@@ -66,7 +66,6 @@ static env_t *flash_addr = (env_t *)CFG_ #endif #else /* ! ENV_IS_EMBEDDED */ @@ -793,7 +777,7 @@ Index: u-boot-1.1.5/common/env_flash.c env_t *env_ptr = (env_t *)CFG_ENV_ADDR; #ifdef CMD_SAVEENV static env_t *flash_addr = (env_t *)CFG_ENV_ADDR; -@@ -201,6 +200,7 @@ +@@ -201,6 +200,7 @@ int saveenv(void) debug (" %08lX ... %08lX ...", (ulong)&(flash_addr_new->data), sizeof(env_ptr->data)+(ulong)&(flash_addr_new->data)); @@ -801,7 +785,7 @@ Index: u-boot-1.1.5/common/env_flash.c if ((rc = flash_write((char *)env_ptr->data, (ulong)&(flash_addr_new->data), sizeof(env_ptr->data))) || -@@ -256,7 +256,6 @@ +@@ -256,7 +256,6 @@ Done: #endif /* CMD_SAVEENV */ #else /* ! CFG_ENV_ADDR_REDUND */ @@ -809,7 +793,7 @@ Index: u-boot-1.1.5/common/env_flash.c int env_init(void) { #ifdef CONFIG_OMAP2420H4 -@@ -280,6 +279,52 @@ +@@ -280,6 +279,52 @@ bad_flash: #ifdef CMD_SAVEENV @@ -862,7 +846,7 @@ Index: u-boot-1.1.5/common/env_flash.c int saveenv(void) { int len, rc; -@@ -331,7 +376,7 @@ +@@ -331,7 +376,7 @@ int saveenv(void) return 1; puts ("Erasing Flash..."); @@ -871,11 +855,9 @@ Index: u-boot-1.1.5/common/env_flash.c return 1; puts ("Writing to Flash... "); -Index: u-boot-1.1.5/config.mk -=================================================================== ---- u-boot-1.1.5.orig/config.mk 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/config.mk 2009-11-09 16:35:03.000000000 +0100 -@@ -127,10 +127,15 @@ +--- a/config.mk ++++ b/config.mk +@@ -127,10 +127,15 @@ OBJCOPY = $(CROSS_COMPILE)objcopy OBJDUMP = $(CROSS_COMPILE)objdump RANLIB = $(CROSS_COMPILE)RANLIB @@ -891,7 +873,7 @@ Index: u-boot-1.1.5/config.mk ifndef LDSCRIPT #LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds.debug ifeq ($(CONFIG_NAND_U_BOOT),y) -@@ -139,12 +144,15 @@ +@@ -139,12 +144,15 @@ else LDSCRIPT := $(TOPDIR)/board/$(BOARDDIR)/u-boot.lds endif endif @@ -909,7 +891,7 @@ Index: u-boot-1.1.5/config.mk ifneq ($(OBJTREE),$(SRCTREE)) CPPFLAGS += -I$(OBJTREE)/include2 -I$(OBJTREE)/include -@@ -180,7 +188,8 @@ +@@ -180,7 +188,8 @@ endif AFLAGS := $(AFLAGS_DEBUG) -D__ASSEMBLY__ $(CPPFLAGS) @@ -919,7 +901,7 @@ Index: u-boot-1.1.5/config.mk # Location of a usable BFD library, where we define "usable" as # "built for ${HOST}, supports ${TARGET}". Sensible values are -@@ -214,12 +223,19 @@ +@@ -214,12 +223,19 @@ endif export CONFIG_SHELL HPATH HOSTCC HOSTCFLAGS CROSS_COMPILE \ AS LD CC CPP AR NM STRIP OBJCOPY OBJDUMP \ MAKE @@ -940,7 +922,7 @@ Index: u-boot-1.1.5/config.mk %.s: %.S $(CPP) $(AFLAGS) -o $@ $< %.o: %.S -@@ -229,12 +245,20 @@ +@@ -229,12 +245,20 @@ ifndef REMOTE_BUILD else @@ -961,11 +943,9 @@ Index: u-boot-1.1.5/config.mk endif ######################################################################### -Index: u-boot-1.1.5/drivers/Makefile -=================================================================== ---- u-boot-1.1.5.orig/drivers/Makefile 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/drivers/Makefile 2009-11-09 16:35:03.000000000 +0100 -@@ -50,7 +50,7 @@ +--- a/drivers/Makefile ++++ b/drivers/Makefile +@@ -50,7 +50,7 @@ COBJS = 3c589.o 5701rls.o ali512x.o \ videomodes.o w83c553f.o \ ks8695eth.o \ pxa_pcmcia.o mpc8xx_pcmcia.o tqm8xx_pcmcia.o \ @@ -974,10 +954,8 @@ Index: u-boot-1.1.5/drivers/Makefile SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) -Index: u-boot-1.1.5/include/asm-mips/mipsregs.h -=================================================================== ---- u-boot-1.1.5.orig/include/asm-mips/mipsregs.h 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/include/asm-mips/mipsregs.h 2009-11-09 16:35:03.000000000 +0100 +--- a/include/asm-mips/mipsregs.h ++++ b/include/asm-mips/mipsregs.h @@ -48,6 +48,7 @@ #define CP0_CAUSE $13 #define CP0_EPC $14 @@ -986,7 +964,7 @@ Index: u-boot-1.1.5/include/asm-mips/mipsregs.h #define CP0_CONFIG $16 #define CP0_LLADDR $17 #define CP0_WATCHLO $18 -@@ -330,11 +331,32 @@ +@@ -330,11 +331,32 @@ __BUILD_SET_CP0(config,CP0_CONFIG) # define KSU_USER 0x00000010 # define KSU_SUPERVISOR 0x00000008 # define KSU_KERNEL 0x00000000 @@ -1019,7 +997,7 @@ Index: u-boot-1.1.5/include/asm-mips/mipsregs.h /* * Bitfields in the R[23]000 cp0 status register. -@@ -471,6 +493,14 @@ +@@ -471,6 +493,14 @@ __BUILD_SET_CP0(config,CP0_CONFIG) #define CAUSEF_BD (1 << 31) /* @@ -1034,7 +1012,7 @@ Index: u-boot-1.1.5/include/asm-mips/mipsregs.h * Bits in the coprozessor 0 config register. */ #define CONF_CM_CACHABLE_NO_WA 0 -@@ -544,4 +574,10 @@ +@@ -544,4 +574,10 @@ __BUILD_SET_CP0(config,CP0_CONFIG) #define CEB_KERNEL 2 /* Count events in kernel mode EXL = ERL = 0 */ #define CEB_EXL 1 /* Count events with EXL = 1, ERL = 0 */ @@ -1045,10 +1023,8 @@ Index: u-boot-1.1.5/include/asm-mips/mipsregs.h +#define ECCF_WST (0x1 << ECCB_WST) + #endif /* _ASM_MIPSREGS_H */ -Index: u-boot-1.1.5/include/cmd_confdefs.h -=================================================================== ---- u-boot-1.1.5.orig/include/cmd_confdefs.h 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/include/cmd_confdefs.h 2009-11-09 16:35:03.000000000 +0100 +--- a/include/cmd_confdefs.h ++++ b/include/cmd_confdefs.h @@ -94,6 +94,7 @@ #define CFG_CMD_EXT2 0x1000000000000000ULL /* EXT2 Support */ #define CFG_CMD_SNTP 0x2000000000000000ULL /* SNTP support */ @@ -1065,28 +1041,22 @@ Index: u-boot-1.1.5/include/cmd_confdefs.h CFG_CMD_VFD ) /* Default configuration -Index: u-boot-1.1.5/include/config.h -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-1.1.5/include/config.h 2009-11-09 16:35:03.000000000 +0100 +--- /dev/null ++++ b/include/config.h @@ -0,0 +1,2 @@ +/* Automatically generated - do not edit */ +#include -Index: u-boot-1.1.5/include/config.mk -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-1.1.5/include/config.mk 2009-11-09 16:35:03.000000000 +0100 +--- /dev/null ++++ b/include/config.mk @@ -0,0 +1,5 @@ +ARCH = mips +CPU = mips +BOARD = danube +VENDOR = ifx +SOC = danube -Index: u-boot-1.1.5/include/flash.h -=================================================================== ---- u-boot-1.1.5.orig/include/flash.h 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/include/flash.h 2009-11-09 16:36:11.000000000 +0100 -@@ -79,7 +79,7 @@ +--- a/include/flash.h ++++ b/include/flash.h +@@ -79,7 +79,7 @@ typedef struct { extern unsigned long flash_init (void); extern void flash_print_info (flash_info_t *); extern int flash_erase (flash_info_t *, int, int); @@ -1095,7 +1065,7 @@ Index: u-boot-1.1.5/include/flash.h extern int flash_sect_protect (int flag, ulong addr_first, ulong addr_last); /* common/flash.c */ -@@ -131,7 +131,9 @@ +@@ -131,7 +131,9 @@ extern void flash_read_factory_serial(fl #define MT2_MANUFACT 0x002C002C /* alternate MICRON manufacturer ID*/ #define EXCEL_MANUFACT 0x004A004A /* Excel Semiconductor */ @@ -1106,7 +1076,7 @@ Index: u-boot-1.1.5/include/flash.h #define MT_ID_28F400_T 0x44704470 /* 28F400B3 ID ( 4 M, top boot sector) */ #define MT_ID_28F400_B 0x44714471 /* 28F400B3 ID ( 4 M, bottom boot sect) */ -@@ -299,6 +301,10 @@ +@@ -299,6 +301,10 @@ extern void flash_read_factory_serial(fl #define TOSH_ID_FVT160 0xC2 /* TC58FVT160 ID (16 M, top ) */ #define TOSH_ID_FVB160 0x43 /* TC58FVT160 ID (16 M, bottom ) */ @@ -1117,7 +1087,7 @@ Index: u-boot-1.1.5/include/flash.h /*----------------------------------------------------------------------- * Internal FLASH identification codes * -@@ -422,6 +428,10 @@ +@@ -422,6 +428,10 @@ extern void flash_read_factory_serial(fl #define FLASH_S29GL064M 0x00F0 /* Spansion S29GL064M-R6 */ #define FLASH_S29GL128N 0x00F1 /* Spansion S29GL128N */ @@ -1128,10 +1098,8 @@ Index: u-boot-1.1.5/include/flash.h #define FLASH_UNKNOWN 0xFFFF /* unknown flash type */ -Index: u-boot-1.1.5/include/image.h -=================================================================== ---- u-boot-1.1.5.orig/include/image.h 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/include/image.h 2009-11-09 16:35:03.000000000 +0100 +--- a/include/image.h ++++ b/include/image.h @@ -132,6 +132,7 @@ #define IH_COMP_NONE 0 /* No Compression Used */ #define IH_COMP_GZIP 1 /* gzip Compression Used */ @@ -1140,10 +1108,8 @@ Index: u-boot-1.1.5/include/image.h #define IH_MAGIC 0x27051956 /* Image Magic Number */ #define IH_NMLEN 32 /* Image Name Length */ -Index: u-boot-1.1.5/include/syscall.h -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-1.1.5/include/syscall.h 2009-11-09 16:35:03.000000000 +0100 +--- /dev/null ++++ b/include/syscall.h @@ -0,0 +1,42 @@ +#ifndef __MON_SYS_CALL_H__ +#define __MON_SYS_CALL_H__ @@ -1187,10 +1153,8 @@ Index: u-boot-1.1.5/include/syscall.h +#define SYSCALL_GET_TIMER 10 + +#endif -Index: u-boot-1.1.5/ld_uboot.conf -=================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ u-boot-1.1.5/ld_uboot.conf 2009-11-09 16:35:03.000000000 +0100 +--- /dev/null ++++ b/ld_uboot.conf @@ -0,0 +1,8 @@ +TAG_DWNLD() +{ @@ -1200,11 +1164,9 @@ Index: u-boot-1.1.5/ld_uboot.conf +{ + 0xA0B00000 +}; /* Start u-boot image */ -Index: u-boot-1.1.5/lib_generic/Makefile -=================================================================== ---- u-boot-1.1.5.orig/lib_generic/Makefile 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/lib_generic/Makefile 2009-11-09 16:35:03.000000000 +0100 -@@ -28,7 +28,7 @@ +--- a/lib_generic/Makefile ++++ b/lib_generic/Makefile +@@ -28,7 +28,7 @@ LIB = $(obj)libgeneric.a COBJS = bzlib.o bzlib_crctable.o bzlib_decompress.o \ bzlib_randtable.o bzlib_huffman.o \ crc32.o ctype.o display_options.o ldiv.o \ @@ -1213,10 +1175,8 @@ Index: u-boot-1.1.5/lib_generic/Makefile SRCS := $(COBJS:.o=.c) OBJS := $(addprefix $(obj),$(COBJS)) -Index: u-boot-1.1.5/lib_mips/board.c -=================================================================== ---- u-boot-1.1.5.orig/lib_mips/board.c 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/lib_mips/board.c 2009-11-09 16:35:03.000000000 +0100 +--- a/lib_mips/board.c ++++ b/lib_mips/board.c @@ -29,9 +29,30 @@ #include #include @@ -1249,7 +1209,7 @@ Index: u-boot-1.1.5/lib_mips/board.c (CFG_ENV_ADDR >= (CFG_MONITOR_BASE + CFG_MONITOR_LEN)) ) || \ defined(CFG_ENV_IS_IN_NVRAM) #define TOTAL_MALLOC_LEN (CFG_MALLOC_LEN + CFG_ENV_SIZE) -@@ -39,21 +60,24 @@ +@@ -39,21 +60,24 @@ DECLARE_GLOBAL_DATA_PTR; #define TOTAL_MALLOC_LEN CFG_MALLOC_LEN #endif @@ -1279,7 +1239,7 @@ Index: u-boot-1.1.5/lib_mips/board.c /* * Begin and End of memory area for malloc(), and current "brk" -@@ -62,14 +86,15 @@ +@@ -62,14 +86,15 @@ static ulong mem_malloc_start; static ulong mem_malloc_end; static ulong mem_malloc_brk; @@ -1299,7 +1259,7 @@ Index: u-boot-1.1.5/lib_mips/board.c mem_malloc_end = dest_addr; mem_malloc_start = dest_addr - TOTAL_MALLOC_LEN; mem_malloc_brk = mem_malloc_start; -@@ -79,6 +104,25 @@ +@@ -79,6 +104,25 @@ static void mem_malloc_init (void) mem_malloc_end - mem_malloc_start); } @@ -1325,7 +1285,7 @@ Index: u-boot-1.1.5/lib_mips/board.c void *sbrk (ptrdiff_t increment) { ulong old = mem_malloc_brk; -@@ -99,42 +143,58 @@ +@@ -99,42 +143,58 @@ static int init_func_ram (void) #else int board_type = 0; /* use dummy arg */ #endif @@ -1389,7 +1349,7 @@ Index: u-boot-1.1.5/lib_mips/board.c /* * Breath some life into the board... -@@ -159,27 +219,49 @@ +@@ -159,27 +219,49 @@ static int init_baudrate (void) typedef int (init_fnc_t) (void); init_fnc_t *init_sequence[] = { @@ -1444,7 +1404,7 @@ Index: u-boot-1.1.5/lib_mips/board.c ulong *s; #ifdef CONFIG_PURPLE void copy_code (ulong); -@@ -219,13 +301,12 @@ +@@ -219,13 +301,12 @@ void board_init_f(ulong bootflag) addr -= len; addr &= ~(16 * 1024 - 1); @@ -1460,7 +1420,7 @@ Index: u-boot-1.1.5/lib_mips/board.c /* * (permanently) allocate a Board Info struct -@@ -234,20 +315,17 @@ +@@ -234,20 +315,17 @@ void board_init_f(ulong bootflag) addr_sp -= sizeof(bd_t); bd = (bd_t *)addr_sp; gd->bd = bd; @@ -1484,7 +1444,7 @@ Index: u-boot-1.1.5/lib_mips/board.c /* * Finally, we set up a new (bigger) stack. -@@ -279,7 +357,16 @@ +@@ -279,7 +357,16 @@ void board_init_f(ulong bootflag) copy_code(addr); #endif @@ -1501,7 +1461,7 @@ Index: u-boot-1.1.5/lib_mips/board.c /* NOTREACHED - relocate_code() does not return */ } -@@ -292,7 +379,110 @@ +@@ -292,7 +379,110 @@ void board_init_f(ulong bootflag) * ************************************************************************ */ @@ -1612,7 +1572,7 @@ Index: u-boot-1.1.5/lib_mips/board.c void board_init_r (gd_t *id, ulong dest_addr) { cmd_tbl_t *cmdtp; -@@ -305,6 +495,8 @@ +@@ -305,6 +495,8 @@ void board_init_r (gd_t *id, ulong dest_ bd_t *bd; int i; @@ -1621,7 +1581,7 @@ Index: u-boot-1.1.5/lib_mips/board.c gd = id; gd->flags |= GD_FLG_RELOC; /* tell others: relocation done */ -@@ -321,12 +513,10 @@ +@@ -321,12 +513,10 @@ void board_init_r (gd_t *id, ulong dest_ ulong addr; addr = (ulong) (cmdtp->cmd) + gd->reloc_off; @@ -1638,7 +1598,7 @@ Index: u-boot-1.1.5/lib_mips/board.c addr = (ulong)(cmdtp->name) + gd->reloc_off; cmdtp->name = (char *)addr; -@@ -363,7 +553,13 @@ +@@ -363,7 +553,13 @@ void board_init_r (gd_t *id, ulong dest_ /* initialize malloc() area */ mem_malloc_init(); malloc_bin_reloc(); @@ -1652,7 +1612,7 @@ Index: u-boot-1.1.5/lib_mips/board.c /* relocate environment function pointers etc. */ env_relocate(); -@@ -424,9 +620,12 @@ +@@ -424,9 +620,12 @@ void board_init_r (gd_t *id, ulong dest_ /* NOTREACHED - no way out of command loop except booting */ } @@ -1665,11 +1625,9 @@ Index: u-boot-1.1.5/lib_mips/board.c +#endif //DEBUG_ENABLE_BOOTSTRAP_PRINTF for (;;); } -Index: u-boot-1.1.5/lib_mips/time.c -=================================================================== ---- u-boot-1.1.5.orig/lib_mips/time.c 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/lib_mips/time.c 2009-11-09 16:35:03.000000000 +0100 -@@ -80,6 +80,19 @@ +--- a/lib_mips/time.c ++++ b/lib_mips/time.c +@@ -80,6 +80,19 @@ void udelay (unsigned long usec) /*NOP*/; } @@ -1689,10 +1647,8 @@ Index: u-boot-1.1.5/lib_mips/time.c /* * This function is derived from PowerPC code (read timebase as long long). * On MIPS it just returns the timer value. -Index: u-boot-1.1.5/net/eth.c -=================================================================== ---- u-boot-1.1.5.orig/net/eth.c 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/net/eth.c 2009-11-09 16:35:03.000000000 +0100 +--- a/net/eth.c ++++ b/net/eth.c @@ -25,6 +25,9 @@ #include #include @@ -1703,7 +1659,7 @@ Index: u-boot-1.1.5/net/eth.c #if (CONFIG_COMMANDS & CFG_CMD_NET) && defined(CONFIG_NET_MULTI) -@@ -54,6 +57,9 @@ +@@ -54,6 +57,9 @@ extern int scc_initialize(bd_t*); extern int skge_initialize(bd_t*); extern int tsec_initialize(bd_t*, int, char *); extern int npe_initialize(bd_t *); @@ -1713,7 +1669,7 @@ Index: u-boot-1.1.5/net/eth.c static struct eth_device *eth_devices, *eth_current; -@@ -235,7 +241,9 @@ +@@ -235,7 +241,9 @@ int eth_initialize(bd_t *bis) #if defined(CONFIG_RTL8169) rtl8169_initialize(bis); #endif @@ -1724,10 +1680,8 @@ Index: u-boot-1.1.5/net/eth.c if (!eth_devices) { puts ("No ethernet found.\n"); } else { -Index: u-boot-1.1.5/tools/mkimage.c -=================================================================== ---- u-boot-1.1.5.orig/tools/mkimage.c 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/tools/mkimage.c 2009-11-09 16:35:03.000000000 +0100 +--- a/tools/mkimage.c ++++ b/tools/mkimage.c @@ -28,6 +28,7 @@ #ifndef __WIN32__ #include /* for host / network byte order conversions */ @@ -1736,7 +1690,7 @@ Index: u-boot-1.1.5/tools/mkimage.c #include #include #include -@@ -138,6 +139,7 @@ +@@ -138,6 +139,7 @@ table_entry_t comp_name[] = { { IH_COMP_NONE, "none", "uncompressed", }, { IH_COMP_BZIP2, "bzip2", "bzip2 compressed", }, { IH_COMP_GZIP, "gzip", "gzip compressed", }, @@ -1744,7 +1698,7 @@ Index: u-boot-1.1.5/tools/mkimage.c { -1, "", "", }, }; -@@ -445,7 +447,7 @@ +@@ -445,7 +447,7 @@ NXTARG: ; } /* We're a bit of paranoid */ @@ -1753,7 +1707,7 @@ Index: u-boot-1.1.5/tools/mkimage.c (void) fdatasync (ifd); #else (void) fsync (ifd); -@@ -495,7 +497,7 @@ +@@ -495,7 +497,7 @@ NXTARG: ; (void) munmap((void *)ptr, sbuf.st_size); /* We're a bit of paranoid */ @@ -1762,10 +1716,8 @@ Index: u-boot-1.1.5/tools/mkimage.c (void) fdatasync (ifd); #else (void) fsync (ifd); -Index: u-boot-1.1.5/cpu/mips/cache.S -=================================================================== ---- u-boot-1.1.5.orig/cpu/mips/cache.S 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/cpu/mips/cache.S 2009-11-09 16:35:03.000000000 +0100 +--- a/cpu/mips/cache.S ++++ b/cpu/mips/cache.S @@ -29,7 +29,9 @@ #include #include @@ -1777,7 +1729,7 @@ Index: u-boot-1.1.5/cpu/mips/cache.S /* 16KB is the maximum size of instruction and data caches on * MIPS 4K. -@@ -155,6 +157,9 @@ +@@ -155,6 +157,9 @@ mips_cache_reset: */ mtc0 zero, CP0_TAGLO @@ -1787,7 +1739,7 @@ Index: u-boot-1.1.5/cpu/mips/cache.S /* * The caches are probably in an indeterminate state, -@@ -171,6 +176,9 @@ +@@ -171,6 +176,9 @@ mips_cache_reset: move a1, a2 icacheopn(a0,a1,a2,a3,121,(Index_Store_Tag_I,Fill)) @@ -1797,7 +1749,7 @@ Index: u-boot-1.1.5/cpu/mips/cache.S /* To support Orion/R4600, we initialise the data cache in 3 passes. */ -@@ -200,6 +208,7 @@ +@@ -200,6 +208,7 @@ mips_cache_reset: move a3, t5 # dcacheLineSize move a1, a2 icacheop(a0,a1,a2,a3,Index_Store_Tag_D) @@ -1805,10 +1757,8 @@ Index: u-boot-1.1.5/cpu/mips/cache.S j ra .end mips_cache_reset -Index: u-boot-1.1.5/cpu/mips/config.mk -=================================================================== ---- u-boot-1.1.5.orig/cpu/mips/config.mk 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/cpu/mips/config.mk 2009-11-09 16:35:03.000000000 +0100 +--- a/cpu/mips/config.mk ++++ b/cpu/mips/config.mk @@ -20,20 +20,26 @@ # Foundation, Inc., 59 Temple Place, Suite 330, Boston, # MA 02111-1307 USA @@ -1844,10 +1794,8 @@ Index: u-boot-1.1.5/cpu/mips/config.mk MIPSFLAGS += $(ENDIANNESS) -mabicalls -Index: u-boot-1.1.5/cpu/mips/cpu.c -=================================================================== ---- u-boot-1.1.5.orig/cpu/mips/cpu.c 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/cpu/mips/cpu.c 2009-11-09 16:35:03.000000000 +0100 +--- a/cpu/mips/cpu.c ++++ b/cpu/mips/cpu.c @@ -23,7 +23,12 @@ #include @@ -1862,7 +1810,7 @@ Index: u-boot-1.1.5/cpu/mips/cpu.c #include int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[]) -@@ -34,6 +39,8 @@ +@@ -34,6 +39,8 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, void (*f)(void) = (void *) 0xbfc00000; f(); @@ -1871,10 +1819,8 @@ Index: u-boot-1.1.5/cpu/mips/cpu.c #endif fprintf(stderr, "*** reset failed ***\n"); return 0; -Index: u-boot-1.1.5/cpu/mips/incaip_clock.c -=================================================================== ---- u-boot-1.1.5.orig/cpu/mips/incaip_clock.c 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/cpu/mips/incaip_clock.c 2009-11-09 16:35:03.000000000 +0100 +--- a/cpu/mips/incaip_clock.c ++++ b/cpu/mips/incaip_clock.c @@ -22,8 +22,9 @@ */ @@ -1886,16 +1832,14 @@ Index: u-boot-1.1.5/cpu/mips/incaip_clock.c /******************************************************************************* * -@@ -114,3 +115,5 @@ +@@ -114,3 +115,5 @@ int incaip_set_cpuclk (void) return 0; } + +#endif /* CONFIG_INCA_IP */ -Index: u-boot-1.1.5/cpu/mips/start.S -=================================================================== ---- u-boot-1.1.5.orig/cpu/mips/start.S 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/cpu/mips/start.S 2009-11-09 16:35:03.000000000 +0100 +--- a/cpu/mips/start.S ++++ b/cpu/mips/start.S @@ -27,7 +27,9 @@ #include #include @@ -1934,7 +1878,7 @@ Index: u-boot-1.1.5/cpu/mips/start.S #elif defined(CONFIG_PURPLE) .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */ .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */ -@@ -181,6 +192,9 @@ +@@ -181,6 +192,9 @@ _start: * 128 * 8 == 1024 == 0x400 * so this is address R_VEC+0x400 == 0xbfc00400 */ @@ -1944,7 +1888,7 @@ Index: u-boot-1.1.5/cpu/mips/start.S #ifdef CONFIG_PURPLE /* 0xbfc00400 */ .word 0xdc870000 -@@ -205,8 +219,12 @@ +@@ -205,8 +219,12 @@ _start: .word 0x00000000 .word 0x00000000 #endif /* CONFIG_PURPLE */ @@ -1957,7 +1901,7 @@ Index: u-boot-1.1.5/cpu/mips/start.S /* Clear watch registers. */ -@@ -226,6 +244,10 @@ +@@ -226,6 +244,10 @@ reset: /* CAUSE register */ mtc0 zero, CP0_CAUSE @@ -1968,7 +1912,7 @@ Index: u-boot-1.1.5/cpu/mips/start.S /* Init Timer */ mtc0 zero, CP0_COUNT mtc0 zero, CP0_COMPARE -@@ -252,12 +274,26 @@ +@@ -252,12 +274,26 @@ reset: nop #endif @@ -1995,7 +1939,7 @@ Index: u-boot-1.1.5/cpu/mips/start.S /* Initialize caches... */ la t9, mips_cache_reset -@@ -266,7 +302,11 @@ +@@ -266,7 +302,11 @@ reset: /* ... and enable them. */ @@ -2007,7 +1951,7 @@ Index: u-boot-1.1.5/cpu/mips/start.S mtc0 t0, CP0_CONFIG -@@ -280,13 +320,38 @@ +@@ -280,13 +320,38 @@ reset: li t0, CFG_SDRAM_BASE + CFG_INIT_SP_OFFSET la sp, 0(t0) @@ -2046,7 +1990,7 @@ Index: u-boot-1.1.5/cpu/mips/start.S * * This "function" does not return, instead it continues in RAM * after relocating the monitor code. -@@ -295,12 +360,22 @@ +@@ -295,12 +360,22 @@ reset: * a1 = gd * a2 = destination address */ @@ -2069,7 +2013,7 @@ Index: u-boot-1.1.5/cpu/mips/start.S la t3, in_ram lw t2, -12(t3) /* t2 <-- uboot_end_data */ move t1, a2 -@@ -311,7 +386,11 @@ +@@ -311,7 +386,11 @@ relocate_code: * New GOT-PTR = (old GOT-PTR - CFG_MONITOR_BASE) + Destination Address */ move t6, gp @@ -2081,7 +2025,7 @@ Index: u-boot-1.1.5/cpu/mips/start.S add gp, a2 /* gp now adjusted */ sub t6, gp, t6 /* t6 <-- relocation offset */ -@@ -337,12 +416,21 @@ +@@ -337,12 +416,21 @@ relocate_code: /* Jump to where we've relocated ourselves. */ @@ -2103,7 +2047,7 @@ Index: u-boot-1.1.5/cpu/mips/start.S .word num_got_entries in_ram: -@@ -374,12 +462,19 @@ +@@ -374,12 +462,19 @@ in_ram: sw zero, 0(t1) /* delay slot */ move a0, a1 @@ -2124,7 +2068,7 @@ Index: u-boot-1.1.5/cpu/mips/start.S /* Exception handlers. */ -@@ -388,3 +483,20 @@ +@@ -388,3 +483,20 @@ romReserved: romExcHandle: b romExcHandle @@ -2145,10 +2089,8 @@ Index: u-boot-1.1.5/cpu/mips/start.S + IFX_MIPS_HANDLER_1 +#endif +#endif -Index: u-boot-1.1.5/tools/Makefile -=================================================================== ---- u-boot-1.1.5.orig/tools/Makefile 2006-10-20 17:54:33.000000000 +0200 -+++ u-boot-1.1.5/tools/Makefile 2009-11-09 16:35:03.000000000 +0100 +--- a/tools/Makefile ++++ b/tools/Makefile @@ -21,7 +21,7 @@ # MA 02111-1307 USA # diff --git a/package/uboot-ifxmips/patches/120-eon_flash.patch b/package/uboot-ifxmips/patches/120-eon_flash.patch index 0a2624c72..0b0da3c69 100644 --- a/package/uboot-ifxmips/patches/120-eon_flash.patch +++ b/package/uboot-ifxmips/patches/120-eon_flash.patch @@ -1,9 +1,7 @@ -Index: u-boot-1.1.5/board/ifx/danube/flash.c -=================================================================== ---- u-boot-1.1.5.orig/board/ifx/danube/flash.c 2010-03-19 12:12:27.000000000 +0100 -+++ u-boot-1.1.5/board/ifx/danube/flash.c 2010-03-19 12:12:30.000000000 +0100 -@@ -477,7 +477,10 @@ - printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__); +--- a/board/ifx/danube/flash.c ++++ b/board/ifx/danube/flash.c +@@ -470,7 +470,10 @@ ulong flash_get_size (FPWV *addr, flash_ + case (uchar)MX_MANUFACT: // 0x00c2 info->flash_id = FLASH_MAN_MX ;//0x00030000 break; - @@ -12,13 +10,11 @@ Index: u-boot-1.1.5/board/ifx/danube/flash.c + info->flash_id = FLASH_MAN_AMD ; + break; default: - printf("%s:%s[%d]\n", __FILE__, __func__, __LINE__); info->flash_id = FLASH_UNKNOWN; -Index: u-boot-1.1.5/include/flash.h -=================================================================== ---- u-boot-1.1.5.orig/include/flash.h 2010-03-19 12:16:23.000000000 +0100 -+++ u-boot-1.1.5/include/flash.h 2010-03-19 12:16:48.000000000 +0100 -@@ -130,6 +130,7 @@ + info->sector_count = 0; +--- a/include/flash.h ++++ b/include/flash.h +@@ -130,6 +130,7 @@ extern void flash_read_factory_serial(fl #define TOSH_MANUFACT 0x00980098 /* TOSHIBA manuf. ID in D23..D16, D7..D0 */ #define MT2_MANUFACT 0x002C002C /* alternate MICRON manufacturer ID*/ #define EXCEL_MANUFACT 0x004A004A /* Excel Semiconductor */ diff --git a/package/uboot-ifxmips/patches/130-a800.patch b/package/uboot-ifxmips/patches/130-a800.patch new file mode 100644 index 000000000..f358201d1 --- /dev/null +++ b/package/uboot-ifxmips/patches/130-a800.patch @@ -0,0 +1,31 @@ +--- a/drivers/ifx_sw.c ++++ b/drivers/ifx_sw.c +@@ -118,7 +118,7 @@ int danube_switch_initialize(bd_t * bis) + { + struct eth_device *dev; + unsigned short chipid; +- ++ int i; + #if 0 + printf("Entered danube_switch_initialize()\n"); + #endif +@@ -130,6 +130,19 @@ int danube_switch_initialize(bd_t * bis) + } + memset(dev, 0, sizeof(*dev)); + ++#ifdef A800_SWITCH ++ printf ("bring up a800 switch and leds\n"); ++ *EBU_CON_1 = 0x1e7ff; ++ *EBU_ADDR_SEL_1 = 0x14000001; ++ ++ *((volatile u16*)0xb4000000) = 0x0; ++ for(i = 0; i < 1000; i++) ++ udelay(1000); ++ *((volatile u16*)0xb4000000) = (1 << 10); ++ *EBU_CON_1 = 0x8001e7ff; ++#define CLK_OUT2_25MHZ ++#endif ++ + danube_dma_init(); + danube_init_switch_chip(REV_MII_MODE); + diff --git a/package/uboot-lantiq/Makefile b/package/uboot-lantiq/Makefile new file mode 100644 index 000000000..3ffe8846e --- /dev/null +++ b/package/uboot-lantiq/Makefile @@ -0,0 +1,82 @@ +# +# Copyright (C) 2010 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk +include $(INCLUDE_DIR)/kernel.mk + +PKG_NAME:=u-boot +PKG_VERSION:=2009.11.1 +PKG_MD5SUM:=6086421c9e2f3a0d0dbc5f706b551dbc +PKG_RELEASE:=1 + +PKG_BUILD_DIR:=$(KERNEL_BUILD_DIR)/$(PKG_NAME)-$(PKG_VERSION) +PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.bz2 +PKG_SOURCE_URL:=ftp://ftp.denx.de/pub/u-boot +PKG_TARGETS:=bin + +include $(INCLUDE_DIR)/package.mk + +define Package/uboot-lantiq + SECTION:=boot + CATEGORY:=Boot Loaders + DEPENDS:=@TARGET_ifxmips + TITLE:=U-Boot for Lantiq reference boards + URL:=http://www.denx.de/wiki/U-Boot +endef + +define Build/Prepare + $(PKG_UNPACK) + cp -r $(CP_OPTS) $(FILES_DIR)/* $(PKG_BUILD_DIR)/ + $(Build/Patch) + find $(PKG_BUILD_DIR) -name .svn | $(XARGS) rm -rf +endef + +UBOOT_CONFIG:=easy50712_DDR166M +UBOOT_MAKE_OPTS:= \ + CROSS_COMPILE=$(TARGET_CROSS) \ + ENDIANNESS= \ + V=1 + +define Build/Configure/Target + $(MAKE) -s -C $(PKG_BUILD_DIR) \ + $(UBOOT_MAKE_OPTS) \ + O=$(PKG_BUILD_DIR)/$(1) \ + $(1)_config +endef + +define Build/Configure + $(call Build/Configure/Target,$(UBOOT_CONFIG)) + $(call Build/Configure/Target,$(UBOOT_CONFIG)_ramboot) +endef + +define Build/Compile/Target + $(MAKE) -s -C $(PKG_BUILD_DIR) \ + $(UBOOT_MAKE_OPTS) \ + O=$(PKG_BUILD_DIR)/$(1) \ + all +endef + +define Build/Compile + $(call Build/Compile/Target,$(UBOOT_CONFIG)) + $(call Build/Compile/Target,$(UBOOT_CONFIG)_ramboot) +endef + +define Package/uboot-lantiq/install + mkdir -p $(1)/$(UBOOT_CONFIG) + dd \ + if=$(PKG_BUILD_DIR)/$(UBOOT_CONFIG)/u-boot.bin \ + of=$(1)/$(UBOOT_CONFIG)/u-boot.bin \ + bs=64k conv=sync + if [ -e $(UBOOT_CONFIG).conf ]; then \ + perl ./gct \ + $(UBOOT_CONFIG).conf \ + $(PKG_BUILD_DIR)/$(UBOOT_CONFIG)_ramboot/u-boot.srec \ + $(1)/$(UBOOT_CONFIG)/u-boot.asc; \ + fi +endef + +$(eval $(call BuildPackage,uboot-lantiq)) diff --git a/package/uboot-lantiq/easy50712_DDR166M.conf b/package/uboot-lantiq/easy50712_DDR166M.conf new file mode 100644 index 000000000..351d6a108 --- /dev/null +++ b/package/uboot-lantiq/easy50712_DDR166M.conf @@ -0,0 +1,134 @@ + 0xbf800060 0x7 + 0xbf800010 0x0 + 0xbf800020 0x0 + 0xbf800200 0x02 + 0xbf800210 0x0 + +;REG32(MC_DC0) = 0x00001B1B; + 0xbf801000 0x1b1b +;REG32(MC_DC1) = 0x00000000; + 0xbf801010 0x0 +;REG32(MC_DC2) = 0x00000000; + 0xbf801020 0x0 +;REG32(MC_DC3) = 0x00000000; + 0xbf801030 0x0 +;REG32(MC_DC4) = 0x00000000; + 0xbf801040 0x0 +;REG32(MC_DC5) = 0x00000200; + 0xbf801050 0x200 +;REG32(MC_DC6) = 0x00000306; +; 0xbf801060 0x0306 + 0xbf801060 0x0605 +;REG32(MC_DC7) = 0x00000303; + 0xbf801070 0x302 +; 0xbf801070 0x0203 +;REG32(MC_DC8) = 0x00000102; + 0xbf801080 0x102 +;REG32(MC_DC9) = 0x0000070A; + 0xbf801090 0x70a +; 0xbf801090 0x608 +;REG32(MC_DC10) = 0x00000203; + 0xbf8010a0 0x203 +;REG32(MC_DC11) = 0x00000C02; + 0xbf8010b0 0xc02 +; 0xbf8010b0 0x0a02 +;REG32(MC_DC12) = 0x000001C8; + 0xbf8010c0 0x1c8 +;REG32(MC_DC13) = 0x00000001; + 0xbf8010d0 0x1 +;REG32(MC_DC14) = 0x00000000; + 0xbf8010e0 0x0 +;REG32(MC_DC15) = 0x00000F5F; +; 0xbf8010f0 0xf5f + 0xbf8010f0 0xf3c +;REG32(MC_DC16) = 0x0000C800; + 0xbf801100 0xc800 +;REG32(MC_DC17) = 0x0000000D; +; 0xbf801110 0xd + 0xbf801110 0xd +;REG32(MC_DC18) = 0x00000300; + 0xbf801120 0x300 +;REG32(MC_DC19) = 0x00000300; +; 0xbf801130 0x300 + 0xbf801130 0x200 +;REG32(MC_DC20) = 0x00000A04; +; 0xbf801140 0xa04 + 0xbf801140 0xa04 +;REG32(MC_DC21) = 0x00001c00; + 0xbf801150 0xd00 +; 0xbf801150 0x1f00 +;REG32(MC_DC22) = 0x00001E1E; + 0xbf801160 0xd0d +; 0xbf801160 0x1f1f +;REG32(MC_DC23) = 0x00000000; + 0xbf801170 0x0 +;//Disable ECC +;REG32(MC_DC24) = 0x0000007F; +; 0xbf801180 0x7f + 0xbf801180 0x062 +; 0xbf801180 0x37f +;REG32(MC_DC25) = 0x00000000; + 0xbf801190 0x0 +;REG32(MC_DC26) = 0x00000000; + 0xbf8011a0 0x0 +;REG32(MC_DC27) = 0x00000000; + 0xbf8011b0 0x0 +;REG32(MC_DC28) = 0x00000A24; +; 0xbf8011c0 0xa24 + 0xbf8011c0 0x510 +;REG32(MC_DC29) = 0x00002D89; + 0xbf8011d0 0x2d89 +; 0xbf8011d0 0x2d92 +;REG32(MC_DC30) = 0x00000022; + 0xbf8011e0 0x8300 +; 0xbf8011e0 0x8235 +;REG32(MC_DC31) = 0x00000000; + 0xbf8011f0 0x0 +;REG32(MC_DC32) = 0x00000000; + 0xbf801200 0x0 +;REG32(MC_DC33) = 0x00000000; + 0xbf801210 0x0 +;REG32(MC_DC34) = 0x00000000; + 0xbf801220 0x0 +;REG32(MC_DC35) = 0x00000000; + 0xbf801230 0x0 +;REG32(MC_DC36) = 0x00000000; + 0xbf801240 0x0 +;REG32(MC_DC37) = 0x00000000; + 0xbf801250 0x0 +;REG32(MC_DC38) = 0x00000000; + 0xbf801260 0x0 +;REG32(MC_DC39) = 0x00000000; + 0xbf801270 0x0 +;REG32(MC_DC40) = 0x00000000; + 0xbf801280 0x0 +;REG32(MC_DC41) = 0x00000000; + 0xbf801290 0x0 +;REG32(MC_DC42) = 0x00000000; + 0xbf8012a0 0x0 +;REG32(MC_DC43) = 0x00000000; + 0xbf8012b0 0x0 +;REG32(MC_DC44) = 0x00000000; + 0xbf8012c0 0x0 +;REG32(MC_DC45) = 0x00000600; + 0xbf8012d0 0x500 +;REG32(MC_DC46) = 0x00000000; + 0xbf8012e0 0x0 + + 0xbf800060 0x05 + 0xbf801030 0x100 + + + + + + + + + + + + + + + diff --git a/package/uboot-lantiq/files/board/infineon/easy50712/Makefile b/package/uboot-lantiq/files/board/infineon/easy50712/Makefile new file mode 100644 index 000000000..b57ff192c --- /dev/null +++ b/package/uboot-lantiq/files/board/infineon/easy50712/Makefile @@ -0,0 +1,47 @@ +# +# (C) Copyright 2003-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(BOARD).a + +#COBJS := $(BOARD).o +COBJS-y += danube.o + +SOBJS = lowlevel_init.o pmuenable.o + +SRCS := $(SOBJS:.o=.S) $(COBJS-y:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS-y)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB): $(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/package/uboot-lantiq/files/board/infineon/easy50712/config.mk b/package/uboot-lantiq/files/board/infineon/easy50712/config.mk new file mode 100644 index 000000000..c0e5d8244 --- /dev/null +++ b/package/uboot-lantiq/files/board/infineon/easy50712/config.mk @@ -0,0 +1,60 @@ +# +# (C) Copyright 2003 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +# +# Danube board with MIPS 24Kc CPU core +# +sinclude $(OBJTREE)/board/$(BOARDDIR)/config.tmp + +ifdef CONFIG_LZMA_BOOTSTRAP + +ifdef BUILD_BOOTSTRAP + +$(info BUILD_BOOTSTRAP ) +#TEXT_BASE = 0xB0000000 +TEXT_BASE = 0x80010000 + +else # BUILD_BOOTSTRAP + +ifndef TEXT_BASE +$(info redefine TEXT_BASE = 0x80040000 ) +TEXT_BASE = 0x80040000 +endif + +endif # BUILD_BOOTSTRAP + +else + +ifdef BUILD_BOOTSTRAP +$(error BUILD_BOOTSTRAP but not enabled in config) +endif + +ifndef TEXT_BASE +## Standard: boot from ebu +$(info redefine TEXT_BASE = 0xB0000000 ) +TEXT_BASE = 0xB0000000 +## For testing: boot from RAM +# TEXT_BASE = 0x80100000 +endif + +endif # CONFIG_LZMA_BOOTSTRAP diff --git a/package/uboot-lantiq/files/board/infineon/easy50712/danube.c b/package/uboot-lantiq/files/board/infineon/easy50712/danube.c new file mode 100644 index 000000000..473436692 --- /dev/null +++ b/package/uboot-lantiq/files/board/infineon/easy50712/danube.c @@ -0,0 +1,338 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2010 + * Thomas Langer, Ralph Hempel + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include + +extern ulong ifx_get_ddr_hz(void); +extern ulong ifx_get_cpuclk(void); + +/* definitions for external PHYs / Switches */ +/* Split values into phy address and register address */ +#define PHYADDR(_reg) ((_reg >> 5) & 0xff), (_reg & 0x1f) + +/* IDs and registers of known external switches */ +#define ID_SAMURAI_0 0x1020 +#define ID_SAMURAI_1 0x0007 +#define SAMURAI_ID_REG0 0xA0 +#define SAMURAI_ID_REG1 0xA1 + +#define ID_TANTOS 0x2599 + +void _machine_restart(void) +{ + *DANUBE_RCU_RST_REQ |=1<<30; +} + +#ifdef CONFIG_SYS_RAMBOOT +phys_size_t initdram(int board_type) +{ + return get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, CONFIG_SYS_MAX_RAM); +} +#elif defined(CONFIG_USE_DDR_RAM) +phys_size_t initdram(int board_type) +{ + return (CONFIG_SYS_MAX_RAM); +} +#else + +static ulong max_sdram_size(void) /* per Chip Select */ +{ + /* The only supported SDRAM data width is 16bit. + */ +#define CFG_DW 4 + + /* The only supported number of SDRAM banks is 4. + */ +#define CFG_NB 4 + + ulong cfgpb0 = *DANUBE_SDRAM_MC_CFGPB0; + int cols = cfgpb0 & 0xF; + int rows = (cfgpb0 & 0xF0) >> 4; + ulong size = (1 << (rows + cols)) * CFG_DW * CFG_NB; + + return size; +} + +/* + * Check memory range for valid RAM. A simple memory test determines + * the actually available RAM size between addresses `base' and + * `base + maxsize'. + */ + +static long int dram_size(long int *base, long int maxsize) +{ + volatile long int *addr; + ulong cnt, val; + ulong save[32]; /* to make test non-destructive */ + unsigned char i = 0; + + for (cnt = (maxsize / sizeof (long)) >> 1; cnt > 0; cnt >>= 1) { + addr = base + cnt; /* pointer arith! */ + + save[i++] = *addr; + *addr = ~cnt; + } + + /* write 0 to base address */ + addr = base; + save[i] = *addr; + *addr = 0; + + /* check at base address */ + if ((val = *addr) != 0) { + *addr = save[i]; + return (0); + } + + for (cnt = 1; cnt < maxsize / sizeof (long); cnt <<= 1) { + addr = base + cnt; /* pointer arith! */ + + val = *addr; + *addr = save[--i]; + + if (val != (~cnt)) { + return (cnt * sizeof (long)); + } + } + return (maxsize); +} + +phys_size_t initdram(int board_type) +{ + int rows, cols, best_val = *DANUBE_SDRAM_MC_CFGPB0; + ulong size, max_size = 0; + ulong our_address; + + /* load t9 into our_address */ + asm volatile ("move %0, $25" : "=r" (our_address) :); + + /* Can't probe for RAM size unless we are running from Flash. + * find out whether running from DRAM or Flash. + */ + if (CPHYSADDR(our_address) < CPHYSADDR(PHYS_FLASH_1)) + { + return max_sdram_size(); + } + + for (cols = 0x8; cols <= 0xC; cols++) + { + for (rows = 0xB; rows <= 0xD; rows++) + { + *DANUBE_SDRAM_MC_CFGPB0 = (0x14 << 8) | + (rows << 4) | cols; + size = get_ram_size((long *)CONFIG_SYS_SDRAM_BASE, + max_sdram_size()); + + if (size > max_size) + { + best_val = *DANUBE_SDRAM_MC_CFGPB0; + max_size = size; + } + } + } + + *DANUBE_SDRAM_MC_CFGPB0 = best_val; + return max_size; +} +#endif + +int checkboard (void) +{ + unsigned long chipid = *DANUBE_MPS_CHIPID; + int part_num; + + puts ("Board: "); + + part_num = DANUBE_MPS_CHIPID_PARTNUM_GET(chipid); + switch (part_num) + { + case 0x129: + case 0x12D: + puts("Danube/Twinpass/Vinax-VE "); + break; + default: + printf ("unknown, chip part number 0x%03X ", part_num); + break; + } + printf ("V1.%ld, ", DANUBE_MPS_CHIPID_VERSION_GET(chipid)); + + printf("DDR Speed %ld MHz, ", ifx_get_ddr_hz()/1000000); + printf("CPU Speed %ld MHz\n", ifx_get_cpuclk()/1000000); + + return 0; +} + +#ifdef CONFIG_SKIP_LOWLEVEL_INIT +int board_early_init_f(void) +{ +#ifdef CONFIG_EBU_ADDSEL0 + (*DANUBE_EBU_ADDSEL0) = CONFIG_EBU_ADDSEL0; +#endif +#ifdef CONFIG_EBU_ADDSEL1 + (*DANUBE_EBU_ADDSEL1) = CONFIG_EBU_ADDSEL1; +#endif +#ifdef CONFIG_EBU_ADDSEL2 + (*DANUBE_EBU_ADDSEL2) = CONFIG_EBU_ADDSEL2; +#endif +#ifdef CONFIG_EBU_ADDSEL3 + (*DANUBE_EBU_ADDSEL3) = CONFIG_EBU_ADDSEL3; +#endif +#ifdef CONFIG_EBU_BUSCON0 + (*DANUBE_EBU_BUSCON0) = CONFIG_EBU_BUSCON0; +#endif +#ifdef CONFIG_EBU_BUSCON1 + (*DANUBE_EBU_BUSCON1) = CONFIG_EBU_BUSCON1; +#endif +#ifdef CONFIG_EBU_BUSCON2 + (*DANUBE_EBU_BUSCON2) = CONFIG_EBU_BUSCON2; +#endif +#ifdef CONFIG_EBU_BUSCON3 + (*DANUBE_EBU_BUSCON3) = CONFIG_EBU_BUSCON3; +#endif + + return 0; +} +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */ + +#ifdef CONFIG_EXTRA_SWITCH +static int external_switch_init(void) +{ + unsigned short chipid0=0xdead, chipid1=0xbeef; + static char * const name = "lq_cpe_eth"; + +#ifdef CLK_OUT2_25MHZ + *DANUBE_GPIO_P0_DIR=0x0000ae78; + *DANUBE_GPIO_P0_ALTSEL0=0x00008078; + //joelin for Mii-1 *DANUBE_GPIO_P0_ALTSEL1=0x80000080; + *DANUBE_GPIO_P0_ALTSEL1=0x80000000; //joelin for Mii-1 + *DANUBE_CGU_IFCCR=0x00400010; + *DANUBE_GPIO_P0_OD=0x0000ae78; +#endif + + /* earlier no valid response is available, at least on Twinpass & Tantos @ 111MHz, M4530 platform */ + udelay(100000); + + debug("\nsearching for Samurai switch ... "); + if ( (miiphy_read(name, PHYADDR(SAMURAI_ID_REG0), &chipid0)==0) && + (miiphy_read(name, PHYADDR(SAMURAI_ID_REG1), &chipid1)==0) ) { + if (((chipid0 & 0xFFF0) == ID_SAMURAI_0) && + ((chipid1 & 0x000F) == ID_SAMURAI_1)) { + debug("found"); + + /* enable "Crossover Auto Detect" + defaults */ + /* P0 */ + miiphy_write(name, PHYADDR(0x01), 0x840F); + /* P1 */ + miiphy_write(name, PHYADDR(0x03), 0x840F); + /* P2 */ + miiphy_write(name, PHYADDR(0x05), 0x840F); + /* P3 */ + miiphy_write(name, PHYADDR(0x07), 0x840F); + /* P4 */ + miiphy_write(name, PHYADDR(0x08), 0x840F); + /* P5 */ + miiphy_write(name, PHYADDR(0x09), 0x840F); + /* System Control 4: CPU on port 1 and other */ + miiphy_write(name, PHYADDR(0x12), 0x3602); + #ifdef CLK_OUT2_25MHZ + /* Bandwidth Control Enable Register: enable */ + miiphy_write(name, PHYADDR(0x33), 0x4000); + #endif + } + } + + debug("\nsearching for TANTOS switch ... "); + if (miiphy_read(name, PHYADDR(0x101), &chipid0) == 0) { + if (chipid0 == ID_TANTOS) { + debug("found"); + + /* P5 Basic Control: Force Link Up */ + miiphy_write(name, PHYADDR(0xA1), 0x0004); + /* P6 Basic Control: Force Link Up */ + miiphy_write(name, PHYADDR(0xC1), 0x0004); + /* RGMII/MII Port Control (P4/5/6) */ + miiphy_write(name, PHYADDR(0xF5), 0x0773); + + /* Software workaround. */ + /* PHY reset from P0 to P4. */ + + /* set data for indirect write */ + miiphy_write(name, PHYADDR(0x121), 0x8000); + + /* P0 */ + miiphy_write(name, PHYADDR(0x120), 0x0400); + udelay(1000); + /* P1 */ + miiphy_write(name, PHYADDR(0x120), 0x0420); + udelay(1000); + /* P2 */ + miiphy_write(name, PHYADDR(0x120), 0x0440); + udelay(1000); + /* P3 */ + miiphy_write(name, PHYADDR(0x120), 0x0460); + udelay(1000); + /* P4 */ + miiphy_write(name, PHYADDR(0x120), 0x0480); + udelay(1000); + } + } + debug("\n"); + + return 0; +} +#endif /* CONFIG_EXTRA_SWITCH */ + +int board_eth_init(bd_t *bis) +{ +#if defined(CONFIG_IFX_ETOP) + + *DANUBE_PMU_PWDCR &= 0xFFFFEFDF; + *DANUBE_PMU_PWDCR &=~(1< + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ +/* History: + peng liu May 25, 2006, for PLL setting after reset, 05252006 + */ +#include +#include +#include + +#if defined(CONFIG_USE_DDR_RAM) + +#if defined(CONFIG_USE_DDR_RAM_CFG_111M) +#include "ddr_settings_r111.h" +#define DDR111 +#elif defined(CONFIG_USE_DDR_RAM_CFG_166M) +#include "ddr_settings_r166.h" +#define DDR166 +#elif defined(CONFIG_USE_DDR_RAM_CFG_e111M) +#include "ddr_settings_e111.h" +#define DDR111 +#elif defined(CONFIG_USE_DDR_RAM_CFG_e166M) +#include "ddr_settings_e166.h" +#define DDR166 +#elif defined(CONFIG_USE_DDR_RAM_CFG_promos400) +#include "ddr_settings_PROMOSDDR400.h" +#define DDR166 +#elif defined(CONFIG_USE_DDR_RAM_CFG_samsung166) +#include "ddr_settings_Samsung_166.h" +#define DDR166 +#elif defined(CONFIG_USE_DDR_RAM_CFG_psc166) +#include "ddr_settings_psc_166.h" +#define DDR166 +#else +#warning "missing definition for ddr_settings.h, use default!" +#include "ddr_settings.h" +#endif +#endif /* CONFIG_USE_DDR_RAM */ + +#if defined(CONFIG_USE_DDR_RAM) && !defined(MC_DC0_VALUE) +#error "missing include of ddr_settings.h" +#endif + +#define EBU_MODUL_BASE 0xBE105300 +#define EBU_CLC(value) 0x0000(value) +#define EBU_CON(value) 0x0010(value) +#define EBU_ADDSEL0(value) 0x0020(value) +#define EBU_ADDSEL1(value) 0x0024(value) +#define EBU_ADDSEL2(value) 0x0028(value) +#define EBU_ADDSEL3(value) 0x002C(value) +#define EBU_BUSCON0(value) 0x0060(value) +#define EBU_BUSCON1(value) 0x0064(value) +#define EBU_BUSCON2(value) 0x0068(value) +#define EBU_BUSCON3(value) 0x006C(value) + +#define MC_MODUL_BASE 0xBF800000 +#define MC_ERRCAUSE(value) 0x0010(value) +#define MC_ERRADDR(value) 0x0020(value) +#define MC_CON(value) 0x0060(value) + +#define MC_SRAM_ENABLE 0x00000004 +#define MC_SDRAM_ENABLE 0x00000002 +#define MC_DDRRAM_ENABLE 0x00000001 + +#define MC_SDR_MODUL_BASE 0xBF800200 +#define MC_IOGP(value) 0x0000(value) +#define MC_CTRLENA(value) 0x0010(value) +#define MC_MRSCODE(value) 0x0020(value) +#define MC_CFGDW(value) 0x0030(value) +#define MC_CFGPB0(value) 0x0040(value) +#define MC_LATENCY(value) 0x0080(value) +#define MC_TREFRESH(value) 0x0090(value) +#define MC_SELFRFSH(value) 0x00A0(value) + +#define MC_DDR_MODUL_BASE 0xBF801000 +#define MC_DC00(value) 0x0000(value) +#define MC_DC01(value) 0x0010(value) +#define MC_DC02(value) 0x0020(value) +#define MC_DC03(value) 0x0030(value) +#define MC_DC04(value) 0x0040(value) +#define MC_DC05(value) 0x0050(value) +#define MC_DC06(value) 0x0060(value) +#define MC_DC07(value) 0x0070(value) +#define MC_DC08(value) 0x0080(value) +#define MC_DC09(value) 0x0090(value) +#define MC_DC10(value) 0x00A0(value) +#define MC_DC11(value) 0x00B0(value) +#define MC_DC12(value) 0x00C0(value) +#define MC_DC13(value) 0x00D0(value) +#define MC_DC14(value) 0x00E0(value) +#define MC_DC15(value) 0x00F0(value) +#define MC_DC16(value) 0x0100(value) +#define MC_DC17(value) 0x0110(value) +#define MC_DC18(value) 0x0120(value) +#define MC_DC19(value) 0x0130(value) +#define MC_DC20(value) 0x0140(value) +#define MC_DC21(value) 0x0150(value) +#define MC_DC22(value) 0x0160(value) +#define MC_DC23(value) 0x0170(value) +#define MC_DC24(value) 0x0180(value) +#define MC_DC25(value) 0x0190(value) +#define MC_DC26(value) 0x01A0(value) +#define MC_DC27(value) 0x01B0(value) +#define MC_DC28(value) 0x01C0(value) +#define MC_DC29(value) 0x01D0(value) +#define MC_DC30(value) 0x01E0(value) +#define MC_DC31(value) 0x01F0(value) +#define MC_DC32(value) 0x0200(value) +#define MC_DC33(value) 0x0210(value) +#define MC_DC34(value) 0x0220(value) +#define MC_DC35(value) 0x0230(value) +#define MC_DC36(value) 0x0240(value) +#define MC_DC37(value) 0x0250(value) +#define MC_DC38(value) 0x0260(value) +#define MC_DC39(value) 0x0270(value) +#define MC_DC40(value) 0x0280(value) +#define MC_DC41(value) 0x0290(value) +#define MC_DC42(value) 0x02A0(value) +#define MC_DC43(value) 0x02B0(value) +#define MC_DC44(value) 0x02C0(value) +#define MC_DC45(value) 0x02D0(value) +#define MC_DC46(value) 0x02E0(value) + +#define RCU_OFFSET 0xBF203000 +#define RCU_RST_REQ (RCU_OFFSET + 0x0010) +#define RCU_STS (RCU_OFFSET + 0x0014) + +#define CGU_OFFSET 0xBF103000 +#define PLL0_CFG (CGU_OFFSET + 0x0004) +#define PLL1_CFG (CGU_OFFSET + 0x0008) +#define PLL2_CFG (CGU_OFFSET + 0x000C) +#define CGU_SYS (CGU_OFFSET + 0x0010) +#define CGU_UPDATE (CGU_OFFSET + 0x0014) +#define IF_CLK (CGU_OFFSET + 0x0018) +#define CGU_SMD (CGU_OFFSET + 0x0020) +#define CGU_CT1SR (CGU_OFFSET + 0x0028) +#define CGU_CT2SR (CGU_OFFSET + 0x002C) +#define CGU_PCMCR (CGU_OFFSET + 0x0030) +#define PCI_CR_PCI (CGU_OFFSET + 0x0034) +#define CGU_OSC_CTRL (CGU_OFFSET + 0x001C) +#define CGU_MIPS_PWR_DWN (CGU_OFFSET + 0x0038) +#define CLK_MEASURE (CGU_OFFSET + 0x003C) + +//05252006 +#define pll0_35MHz_CONFIG 0x9D861059 +#define pll1_35MHz_CONFIG 0x1A260CD9 +#define pll2_35MHz_CONFIG 0x8000f1e5 +#define pll0_36MHz_CONFIG 0x1000125D +#define pll1_36MHz_CONFIG 0x1B1E0C99 +#define pll2_36MHz_CONFIG 0x8002f2a1 +//05252006 + +//06063001-joelin disable the PCI CFRAME mask -start +/*CFRAME is an I/O signal, in the chip, the output CFRAME is selected via GPIO altsel pins, so if you select MII1 RXD1, the CFRAME will not come out. +But the CFRAME input still take the signal from the pad and not disabled when altsel choose other function. So when MII1_RXD1 is low from other device, the EBU interface will be disabled. + +The chip function in such a way that disable the CFRAME mask mean EBU not longer check CFRAME to be the device using the bus. +The side effect is the entire PCI block will see CFRAME low all the time meaning PCI cannot use the bus at all so no more PCI function. +*/ +#define PCI_CR_PR_OFFSET 0xBE105400 +#define PCI_CR_PCI_MOD_REG (PCI_CR_PR_OFFSET + 0x0030) +#define PCI_CONFIG_SPACE 0xB7000000 +#define CS_CFM (PCI_CONFIG_SPACE + 0x6C) +//06063001-joelin disable the PCI CFRAME mask -end + .set noreorder + + +/* + * void ebu_init(void) + */ + .globl ebu_init + .ent ebu_init +ebu_init: + +#if defined(CONFIG_EBU_ADDSEL0) || defined(CONFIG_EBU_ADDSEL1) || \ + defined(CONFIG_EBU_ADDSEL2) || defined(CONFIG_EBU_ADDSEL3) || \ + defined(CONFIG_EBU_BUSCON0) || defined(CONFIG_EBU_BUSCON1) || \ + defined(CONFIG_EBU_BUSCON2) || defined(CONFIG_EBU_BUSCON3) + + li t1, EBU_MODUL_BASE +#if defined(CONFIG_EBU_ADDSEL0) + li t2, CONFIG_EBU_ADDSEL0 + sw t2, EBU_ADDSEL0(t1) +#endif +#if defined(CONFIG_EBU_ADDSEL1) + li t2, CONFIG_EBU_ADDSEL1 + sw t2, EBU_ADDSEL1(t1) +#endif +#if defined(CONFIG_EBU_ADDSEL2) + li t2, CONFIG_EBU_ADDSEL2 + sw t2, EBU_ADDSEL2(t1) +#endif +#if defined(CONFIG_EBU_ADDSEL3) + li t2, CONFIG_EBU_ADDSEL3 + sw t2, EBU_ADDSEL3(t1) +#endif + +#if defined(CONFIG_EBU_BUSCON0) + li t2, CONFIG_EBU_BUSCON0 + sw t2, EBU_BUSCON0(t1) +#endif +#if defined(CONFIG_EBU_BUSCON1) + li t2, CONFIG_EBU_BUSCON1 + sw t2, EBU_BUSCON1(t1) +#endif +#if defined(CONFIG_EBU_BUSCON2) + li t2, CONFIG_EBU_BUSCON2 + sw t2, EBU_BUSCON2(t1) +#endif +#if defined(CONFIG_EBU_BUSCON3) + li t2, CONFIG_EBU_BUSCON3 + sw t2, EBU_BUSCON3(t1) +#endif + +#endif + + j ra + nop + + .end ebu_init + + +/* + * void cgu_init(long) + * + * a0 has the clock value + */ + .globl cgu_init + .ent cgu_init +cgu_init: + li t2, CGU_SYS + lw t2,0(t2) + beq t2,a0,freq_up2date + nop + + li t2, RCU_STS + lw t2, 0(t2) + and t2,0x00020000 + beq t2,0x00020000,boot_36MHZ + nop +//05252006 + li t1, PLL0_CFG + li t2, pll0_35MHz_CONFIG + sw t2,0(t1) + li t1, PLL1_CFG + li t2, pll1_35MHz_CONFIG + sw t2,0(t1) + li t1, PLL2_CFG + li t2, pll2_35MHz_CONFIG + sw t2,0(t1) + li t1, CGU_SYS + sw a0,0(t1) + li t1, RCU_RST_REQ + li t2, 0x40000008 + sw t2,0(t1) + b wait_reset + nop +boot_36MHZ: + li t1, PLL0_CFG + li t2, pll0_36MHz_CONFIG + sw t2,0(t1) + li t1, PLL1_CFG + li t2, pll1_36MHz_CONFIG + sw t2,0(t1) + li t1, PLL2_CFG + li t2, pll2_36MHz_CONFIG + sw t2,0(t1) + li t1, CGU_SYS + sw a0,0(t1) + li t1, RCU_RST_REQ + li t2, 0x40000008 + sw t2,0(t1) +//05252006 + +wait_reset: + b wait_reset + nop +freq_up2date: + j ra + nop + + .end cgu_init + +#ifndef CONFIG_USE_DDR_RAM +/* + * void sdram_init(long) + * + * a0 has the clock value + */ + .globl sdram_init + .ent sdram_init +sdram_init: + + /* SDRAM Initialization + */ + li t1, MC_MODUL_BASE + + /* Clear Error log registers */ + sw zero, MC_ERRCAUSE(t1) + sw zero, MC_ERRADDR(t1) + + /* Enable SDRAM module in memory controller */ + li t3, MC_SDRAM_ENABLE + lw t2, MC_CON(t1) + or t3, t2, t3 + sw t3, MC_CON(t1) + + li t1, MC_SDR_MODUL_BASE + + /* disable the controller */ + li t2, 0 + sw t2, MC_CTRLENA(t1) + + li t2, 0x822 + sw t2, MC_IOGP(t1) + + li t2, 0x2 + sw t2, MC_CFGDW(t1) + + /* Set CAS Latency */ + li t2, 0x00000020 + sw t2, MC_MRSCODE(t1) + + /* Set CS0 to SDRAM parameters */ + li t2, 0x000014d8 + sw t2, MC_CFGPB0(t1) + + /* Set SDRAM latency parameters */ + li t2, 0x00036325; /* BC PC100 */ + sw t2, MC_LATENCY(t1) + + /* Set SDRAM refresh rate */ + li t2, 0x00000C30 + sw t2, MC_TREFRESH(t1) + + /* Clear Power-down registers */ + sw zero, MC_SELFRFSH(t1) + + /* Finally enable the controller */ + li t2, 1 + sw t2, MC_CTRLENA(t1) + + j ra + nop + + .end sdram_init + +#endif /* !CONFIG_USE_DDR_RAM */ + +#ifdef CONFIG_USE_DDR_RAM +/* + * void ddrram_init(long) + * + * a0 has the clock value + */ + .globl ddrram_init + .ent ddrram_init +ddrram_init: + + /* DDR-DRAM Initialization + */ + li t1, MC_MODUL_BASE + + /* Clear Error log registers */ + sw zero, MC_ERRCAUSE(t1) + sw zero, MC_ERRADDR(t1) + + /* Enable DDR module in memory controller */ + li t3, MC_DDRRAM_ENABLE + lw t2, MC_CON(t1) + or t3, t2, t3 + sw t3, MC_CON(t1) + + li t1, MC_DDR_MODUL_BASE + + /* Write configuration to DDR controller registers */ + li t2, MC_DC0_VALUE + sw t2, MC_DC00(t1) + + li t2, MC_DC1_VALUE + sw t2, MC_DC01(t1) + + li t2, MC_DC2_VALUE + sw t2, MC_DC02(t1) + + li t2, MC_DC3_VALUE + sw t2, MC_DC03(t1) + + li t2, MC_DC4_VALUE + sw t2, MC_DC04(t1) + + li t2, MC_DC5_VALUE + sw t2, MC_DC05(t1) + + li t2, MC_DC6_VALUE + sw t2, MC_DC06(t1) + + li t2, MC_DC7_VALUE + sw t2, MC_DC07(t1) + + li t2, MC_DC8_VALUE + sw t2, MC_DC08(t1) + + li t2, MC_DC9_VALUE + sw t2, MC_DC09(t1) + + li t2, MC_DC10_VALUE + sw t2, MC_DC10(t1) + + li t2, MC_DC11_VALUE + sw t2, MC_DC11(t1) + + li t2, MC_DC12_VALUE + sw t2, MC_DC12(t1) + + li t2, MC_DC13_VALUE + sw t2, MC_DC13(t1) + + li t2, MC_DC14_VALUE + sw t2, MC_DC14(t1) + + li t2, MC_DC15_VALUE + sw t2, MC_DC15(t1) + + li t2, MC_DC16_VALUE + sw t2, MC_DC16(t1) + + li t2, MC_DC17_VALUE + sw t2, MC_DC17(t1) + + li t2, MC_DC18_VALUE + sw t2, MC_DC18(t1) + + li t2, MC_DC19_VALUE + sw t2, MC_DC19(t1) + + li t2, MC_DC20_VALUE + sw t2, MC_DC20(t1) + + li t2, MC_DC21_VALUE + sw t2, MC_DC21(t1) + + li t2, MC_DC22_VALUE + sw t2, MC_DC22(t1) + + li t2, MC_DC23_VALUE + sw t2, MC_DC23(t1) + + li t2, MC_DC24_VALUE + sw t2, MC_DC24(t1) + + li t2, MC_DC25_VALUE + sw t2, MC_DC25(t1) + + li t2, MC_DC26_VALUE + sw t2, MC_DC26(t1) + + li t2, MC_DC27_VALUE + sw t2, MC_DC27(t1) + + li t2, MC_DC28_VALUE + sw t2, MC_DC28(t1) + + li t2, MC_DC29_VALUE + sw t2, MC_DC29(t1) + + li t2, MC_DC30_VALUE + sw t2, MC_DC30(t1) + + li t2, MC_DC31_VALUE + sw t2, MC_DC31(t1) + + li t2, MC_DC32_VALUE + sw t2, MC_DC32(t1) + + li t2, MC_DC33_VALUE + sw t2, MC_DC33(t1) + + li t2, MC_DC34_VALUE + sw t2, MC_DC34(t1) + + li t2, MC_DC35_VALUE + sw t2, MC_DC35(t1) + + li t2, MC_DC36_VALUE + sw t2, MC_DC36(t1) + + li t2, MC_DC37_VALUE + sw t2, MC_DC37(t1) + + li t2, MC_DC38_VALUE + sw t2, MC_DC38(t1) + + li t2, MC_DC39_VALUE + sw t2, MC_DC39(t1) + + li t2, MC_DC40_VALUE + sw t2, MC_DC40(t1) + + li t2, MC_DC41_VALUE + sw t2, MC_DC41(t1) + + li t2, MC_DC42_VALUE + sw t2, MC_DC42(t1) + + li t2, MC_DC43_VALUE + sw t2, MC_DC43(t1) + + li t2, MC_DC44_VALUE + sw t2, MC_DC44(t1) + + li t2, MC_DC45_VALUE + sw t2, MC_DC45(t1) + + li t2, MC_DC46_VALUE + sw t2, MC_DC46(t1) + + li t2, 0x00000100 + sw t2, MC_DC03(t1) + + j ra + nop + + .end ddrram_init +#endif /* CONFIG_USE_DDR_RAM */ + + .globl lowlevel_init + .ent lowlevel_init +lowlevel_init: + /* EBU, CGU and SDRAM/DDR-RAM Initialization. + */ + move t0, ra + /* We rely on the fact that non of the following ..._init() functions + * modify t0 + */ +#if defined(CONFIG_SYS_EBU_BOOT) +#if defined(DDR166) + /* 0xe8 means CPU0/CPU1 333M, DDR 167M, FPI 83M, PPE 240M */ + li a0,0xe8 +#elif defined(DDR133) + /* 0xe9 means CPU0/CPU1 333M, DDR 133M, FPI 83M, PPE 240M */ + li a0,0xe9 +#else /* defined(DDR111) */ + /* 0xea means CPU0/CPU1 333M, DDR 111M, FPI 83M, PPE 240M */ + li a0,0xea +#endif + bal cgu_init + nop +#endif /* CONFIG_SYS_EBU_BOOT */ + + bal ebu_init + nop + +//06063001-joelin disable the PCI CFRAME mask-start +#ifdef DISABLE_CFRAME + li t1, PCI_CR_PCI //mw bf103034 80000000 + li t2, 0x80000000 + sw t2,0(t1) + + li t1, PCI_CR_PCI_MOD_REG //mw be105430 103 + li t2, 0x103 + sw t2,0(t1) + + li t1, CS_CFM //mw b700006c 0 + li t2, 0x00 + sw t2, 0(t1) + + li t1, PCI_CR_PCI_MOD_REG //mw be105430 103 + li t2, 0x1000103 + sw t2, 0(t1) +#endif +//06063001-joelin disable the PCI CFRAME mask-end + +#ifdef CONFIG_SYS_EBU_BOOT +#ifndef CONFIG_SYS_RAMBOOT +#ifdef CONFIG_USE_DDR_RAM + bal ddrram_init + nop +#else + bal sdram_init + nop +#endif +#endif /* CONFIG_SYS_RAMBOOT */ +#endif /* CONFIG_SYS_EBU_BOOT */ + + move ra, t0 + j ra + nop + + .end lowlevel_init diff --git a/package/uboot-lantiq/files/board/infineon/easy50712/pmuenable.S b/package/uboot-lantiq/files/board/infineon/easy50712/pmuenable.S new file mode 100644 index 000000000..e0d7971d8 --- /dev/null +++ b/package/uboot-lantiq/files/board/infineon/easy50712/pmuenable.S @@ -0,0 +1,48 @@ +/* + * Power Management unit initialization code for AMAZON development board. + * + * Copyright (c) 2003 Ou Ke, Infineon. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include + +#define PMU_PWDCR 0xBF10201C +#define PMU_SR 0xBF102020 + + .globl pmuenable + +pmuenable: + li t0, PMU_PWDCR + li t1, 0x2 /* enable everything */ + sw t1, 0(t0) +#if 0 +1: + li t0, PMU_SR + lw t2, 0(t0) + bne t1, t2, 1b + nop +#endif + j ra + nop + + diff --git a/package/uboot-lantiq/files/board/infineon/easy50712/u-boot.lds b/package/uboot-lantiq/files/board/infineon/easy50712/u-boot.lds new file mode 100644 index 000000000..9a6cd1b8a --- /dev/null +++ b/package/uboot-lantiq/files/board/infineon/easy50712/u-boot.lds @@ -0,0 +1,70 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk Engineering, + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* +OUTPUT_FORMAT("elf32-bigmips", "elf32-bigmips", "elf32-bigmips") +*/ +OUTPUT_FORMAT("elf32-tradbigmips", "elf32-tradbigmips", "elf32-tradbigmips") +OUTPUT_ARCH(mips) +ENTRY(_start) +SECTIONS +{ + . = 0x00000000; + + . = ALIGN(4); + .text : + { + *(.text) + } + + . = ALIGN(4); + .rodata : { *(SORT_BY_ALIGNMENT(SORT_BY_NAME(.rodata*))) } + + . = ALIGN(4); + .data : { *(.data) } + + . = .; + _gp = ALIGN(16) + 0x7ff0; + + .got : { + __got_start = .; + *(.got) + __got_end = .; + } + + .sdata : { *(.sdata) } + + .u_boot_cmd : { + __u_boot_cmd_start = .; + *(.u_boot_cmd) + __u_boot_cmd_end = .; + } + + uboot_end_data = .; + num_got_entries = (__got_end - __got_start) >> 2; + + . = ALIGN(4); + .sbss (NOLOAD) : { *(.sbss) } + .bss (NOLOAD) : { *(.bss) . = ALIGN(4); } + uboot_end = .; +} diff --git a/package/uboot-lantiq/files/cpu/mips/danube/Makefile b/package/uboot-lantiq/files/cpu/mips/danube/Makefile new file mode 100644 index 000000000..c48d02eaa --- /dev/null +++ b/package/uboot-lantiq/files/cpu/mips/danube/Makefile @@ -0,0 +1,46 @@ +######################################################################### +# +# (C) Copyright 2000-2006 +# Wolfgang Denk, DENX Software Engineering, wd@denx.de. +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 59 Temple Place, Suite 330, Boston, +# MA 02111-1307 USA +# + +include $(TOPDIR)/config.mk + +LIB = $(obj)lib$(SOC).a + +COBJS = clock.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(SOBJS) $(COBJS)) + +all: $(obj).depend $(LIB) + +$(LIB): $(OBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) + +######################################################################### + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +######################################################################### diff --git a/package/uboot-lantiq/files/cpu/mips/danube/clock.c b/package/uboot-lantiq/files/cpu/mips/danube/clock.c new file mode 100644 index 000000000..4219f8f92 --- /dev/null +++ b/package/uboot-lantiq/files/cpu/mips/danube/clock.c @@ -0,0 +1,65 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include + +ulong ifx_get_ddr_hz(void) +{ + static const ulong ddr_freq[] = {166666667,133333333,111111111,83333333}; + return ddr_freq[((*DANUBE_CGU_SYS) & 0x3)]; +} + +ulong ifx_get_cpuclk(void) +{ +#ifdef CONFIG_USE_EMULATOR + return EMULATOR_CPU_SPEED; +#else //NOT CONFIG_USE_EMULATOR + unsigned int ddr_clock=ifx_get_ddr_hz(); + switch((*DANUBE_CGU_SYS) & 0xc){ + case 0: + default: + return 323333333; + case 4: + return ddr_clock; + case 8: + return ddr_clock << 1; + } +#endif +} + +ulong get_bus_freq(ulong dummy) +{ +#ifdef CONFIG_USE_EMULATOR + unsigned int clkCPU; + clkCPU = ifx_get_cpuclk(); + return clkCPU >> 2; +#else //NOT CONFIG_USE_EMULATOR + unsigned int ddr_clock=ifx_get_ddr_hz(); + if ((*DANUBE_CGU_SYS) & 0x40){ + return ddr_clock >> 1; + } + return ddr_clock; +#endif +} + diff --git a/package/uboot-lantiq/files/cpu/mips/danube/ifx_cache.S b/package/uboot-lantiq/files/cpu/mips/danube/ifx_cache.S new file mode 100644 index 000000000..fc482dcd6 --- /dev/null +++ b/package/uboot-lantiq/files/cpu/mips/danube/ifx_cache.S @@ -0,0 +1,60 @@ + +#define IFX_CACHE_EXTRA_INVALID_TAG \ + mtc0 zero, CP0_TAGLO, 1; \ + mtc0 zero, CP0_TAGLO, 2; \ + mtc0 zero, CP0_TAGLO, 3; \ + mtc0 zero, CP0_TAGLO, 4; + +#define IFX_CACHE_EXTRA_OPERATION \ + /* set WST bit */ \ + mfc0 a0, CP0_ECC; \ + li a1, ECCF_WST; \ + or a0, a1; \ + mtc0 a0, CP0_ECC; \ + \ + li a0, K0BASE; \ + move a2, t2; /* icacheSize */ \ + move a3, t4; /* icacheLineSize */ \ + move a1, a2; \ + icacheop(a0,a1,a2,a3,(Index_Store_Tag_I)); \ + \ + /* clear WST bit */ \ + mfc0 a0, CP0_ECC; \ + li a1, ~ECCF_WST; \ + and a0, a1; \ + mtc0 a0, CP0_ECC; \ + \ + /* 1: initialise dcache tags. */ \ + \ + /* cache line size */ \ + li a2, CFG_CACHELINE_SIZE; \ + /* kseg0 mem address */ \ + li a1, 0; \ + li a3, CFG_CACHE_SETS * CFG_CACHE_WAYS; \ +1: \ + /* store tag (invalid, not locked) */ \ + cache 0x8, 0(a1); \ + cache 0x9, 0(a1); \ + \ + add a3, -1; \ + bne a3, zero, 1b; \ + add a1, a2; \ + \ + /* set WST bit */ \ + mfc0 a0, CP0_ECC; \ + li a1, ECCF_WST; \ + or a0, a1; \ + mtc0 a0, CP0_ECC; \ + \ + li a0, K0BASE; \ + move a2, t3; /* dcacheSize */ \ + move a3, t5; /* dcacheLineSize */ \ + move a1, a2; \ + icacheop(a0,a1,a2,a3,(Index_Store_Tag_D)); \ + \ + /* clear WST bit */ \ + mfc0 a0, CP0_ECC; \ + li a1, ~ECCF_WST; \ + and a0, a1; \ + mtc0 a0, CP0_ECC; + diff --git a/package/uboot-lantiq/files/drivers/net/ifx_etop.c b/package/uboot-lantiq/files/drivers/net/ifx_etop.c new file mode 100644 index 000000000..9a9e51fa0 --- /dev/null +++ b/package/uboot-lantiq/files/drivers/net/ifx_etop.c @@ -0,0 +1,374 @@ +/* + * Lantiq CPE device ethernet driver. + * Supposed to work on Twinpass/Danube. + * + * Based on INCA-IP driver: + * (C) Copyright 2003-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * (C) Copyright 2010 + * Thomas Langer, Ralph Hempel + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include + +#include +#include +#include +#include +#include +#include + +#include "ifx_etop.h" + +#define TX_CHAN_NO 7 +#define RX_CHAN_NO 6 + +#define NUM_RX_DESC PKTBUFSRX +#define NUM_TX_DESC 8 +#define TOUT_LOOP 100 + +typedef struct +{ + union + { + struct + { + volatile u32 OWN :1; + volatile u32 C :1; + volatile u32 Sop :1; + volatile u32 Eop :1; + volatile u32 reserved :3; + volatile u32 Byteoffset :2; + volatile u32 reserve :7; + volatile u32 DataLen :16; + }field; + + volatile u32 word; + }status; + + volatile u32 DataPtr; +} dma_rx_descriptor_t; + +typedef struct +{ + union + { + struct + { + volatile u32 OWN :1; + volatile u32 C :1; + volatile u32 Sop :1; + volatile u32 Eop :1; + volatile u32 Byteoffset :5; + volatile u32 reserved :7; + volatile u32 DataLen :16; + }field; + + volatile u32 word; + }status; + + volatile u32 DataPtr; +} dma_tx_descriptor_t; + +static volatile dma_rx_descriptor_t rx_des_ring[NUM_RX_DESC] __attribute__ ((aligned(8))); +static volatile dma_tx_descriptor_t tx_des_ring[NUM_TX_DESC] __attribute__ ((aligned(8))); +static int tx_num, rx_num; + +static volatile IfxDMA_t *pDma = (IfxDMA_t *)CKSEG1ADDR(DANUBE_DMA_BASE); + +static int lq_eth_init(struct eth_device *dev, bd_t * bis); +static int lq_eth_send(struct eth_device *dev, volatile void *packet,int length); +static int lq_eth_recv(struct eth_device *dev); +static void lq_eth_halt(struct eth_device *dev); +static void lq_eth_init_chip(void); +static void lq_eth_init_dma(void); + +static int lq_eth_miiphy_read(char *devname, u8 phyAddr, u8 regAddr, u16 * retVal) +{ + u32 timeout = 50000; + u32 phy, reg; + + if ((phyAddr > 0x1F) || (regAddr > 0x1F) || (retVal == NULL)) + return -1; + + phy = (phyAddr & 0x1F) << 21; + reg = (regAddr & 0x1F) << 16; + + *ETOP_MDIO_ACC = 0xC0000000 | phy | reg; + while ((timeout--) && (*ETOP_MDIO_ACC & 0x80000000)) + udelay(10); + + if (timeout==0) { + *retVal = 0; + return -1; + } + *retVal = *ETOP_MDIO_ACC & 0xFFFF; + return 0; +} + +static int lq_eth_miiphy_write(char *devname, u8 phyAddr, u8 regAddr, u16 data) +{ + u32 timeout = 50000; + u32 phy, reg; + + if ((phyAddr > 0x1F) || (regAddr > 0x1F)) + return -1; + + phy = (phyAddr & 0x1F) << 21; + reg = (regAddr & 0x1F) << 16; + + *ETOP_MDIO_ACC = 0x80000000 | phy | reg | data; + while ((timeout--) && (*ETOP_MDIO_ACC & 0x80000000)) + udelay(10); + + if (timeout==0) + return -1; + return 0; +} + + +int lq_eth_initialize(bd_t * bis) +{ + struct eth_device *dev; + + debug("Entered lq_eth_initialize()\n"); + + if (!(dev = malloc (sizeof *dev))) { + printf("Failed to allocate memory\n"); + return -1; + } + memset(dev, 0, sizeof(*dev)); + + sprintf(dev->name, "lq_cpe_eth"); + dev->init = lq_eth_init; + dev->halt = lq_eth_halt; + dev->send = lq_eth_send; + dev->recv = lq_eth_recv; + + eth_register(dev); + +#if defined (CONFIG_MII) || defined(CONFIG_CMD_MII) + /* register mii command access routines */ + miiphy_register(dev->name, + lq_eth_miiphy_read, lq_eth_miiphy_write); +#endif + + lq_eth_init_dma(); + lq_eth_init_chip(); + + return 0; +} + +static int lq_eth_init(struct eth_device *dev, bd_t * bis) +{ + int i; + uchar *enetaddr = dev->enetaddr; + + debug("lq_eth_init %x:%x:%x:%x:%x:%x\n", + enetaddr[0], enetaddr[1], enetaddr[2], enetaddr[3], enetaddr[4], enetaddr[5]); + + *ENET_MAC_DA0 = (enetaddr[0]<<24) + (enetaddr[1]<<16) + (enetaddr[2]<< 8) + enetaddr[3]; + *ENET_MAC_DA1 = (enetaddr[4]<<24) + (enetaddr[5]<<16); + *ENETS_CFG |= 1<<28; /* enable filter for unicast packets */ + + tx_num=0; + rx_num=0; + + for(i=0;i < NUM_RX_DESC; i++) { + dma_rx_descriptor_t * rx_desc = (dma_rx_descriptor_t *)CKSEG1ADDR(&rx_des_ring[i]); + rx_desc->status.word=0; + rx_desc->status.field.OWN=1; + rx_desc->status.field.DataLen=PKTSIZE_ALIGN; /* 1536 */ + rx_desc->DataPtr=(u32)CKSEG1ADDR(NetRxPackets[i]); + NetRxPackets[i][0] = 0xAA; + } + + /* Reset DMA */ + dma_writel(dma_cs, RX_CHAN_NO); + dma_writel(dma_cctrl, 0x2);/*fix me, need to reset this channel first?*/ + dma_writel(dma_cpoll, 0x80000040); + /*set descriptor base*/ + dma_writel(dma_cdba, (u32)rx_des_ring); + dma_writel(dma_cdlen, NUM_RX_DESC); + dma_writel(dma_cie, 0); + dma_writel(dma_cctrl, 0x30000); + + for(i=0;i < NUM_TX_DESC; i++) { + dma_tx_descriptor_t * tx_desc = (dma_tx_descriptor_t *)CKSEG1ADDR(&tx_des_ring[i]); + memset(tx_desc, 0, sizeof(tx_des_ring[0])); + } + + dma_writel(dma_cs, TX_CHAN_NO); + dma_writel(dma_cctrl, 0x2);/*fix me, need to reset this channel first?*/ + dma_writel(dma_cpoll, 0x80000040); + dma_writel(dma_cdba, (u32)tx_des_ring); + dma_writel(dma_cdlen, NUM_TX_DESC); + dma_writel(dma_cie, 0); + dma_writel(dma_cctrl, 0x30100); + + /* turn on DMA rx & tx channel + */ + dma_writel(dma_cs, RX_CHAN_NO); + dma_writel(dma_cctrl, dma_readl(dma_cctrl) | 1); /*reset and turn on the channel*/ + + return 0; +} + +static void lq_eth_halt(struct eth_device *dev) +{ + int i; + + debug("lq_eth_halt()\n"); + + for(i=0;i<8;i++) { + dma_writel(dma_cs, i); + dma_writel(dma_cctrl, dma_readl(dma_cctrl) & ~1);/*stop the dma channel*/ + } +} + +static int lq_eth_send(struct eth_device *dev, volatile void *packet,int length) +{ + int i; + int res = -1; + volatile dma_tx_descriptor_t * tx_desc = (dma_tx_descriptor_t *)CKSEG1ADDR(&tx_des_ring[tx_num]); + + if (length <= 0) { + printf ("%s: bad packet size: %d\n", dev->name, length); + goto Done; + } + + for(i=0; tx_desc->status.field.OWN==1; i++) { + if (i>=TOUT_LOOP) { + printf("NO Tx Descriptor..."); + goto Done; + } + } + + tx_desc->status.field.Sop=1; + tx_desc->status.field.Eop=1; + tx_desc->status.field.C=0; + tx_desc->DataPtr = (u32)CKSEG1ADDR(packet); + if (length<60) + tx_desc->status.field.DataLen = 60; + else + tx_desc->status.field.DataLen = (u32)length; + + flush_cache((u32)packet, tx_desc->status.field.DataLen); + tx_desc->status.field.OWN=1; + + res=length; + tx_num++; + if (tx_num==NUM_TX_DESC) tx_num=0; + + dma_writel(dma_cs, TX_CHAN_NO); + if (!(dma_readl(dma_cctrl) & 1)) { + dma_writel(dma_cctrl, dma_readl(dma_cctrl) | 1); + } + +Done: + return res; +} + +static int lq_eth_recv(struct eth_device *dev) +{ + int length = 0; + volatile dma_rx_descriptor_t * rx_desc; + + rx_desc = (dma_rx_descriptor_t *)CKSEG1ADDR(&rx_des_ring[rx_num]); + + if ((rx_desc->status.field.C == 0) || (rx_desc->status.field.OWN == 1)) { + return 0; + } + length = rx_desc->status.field.DataLen; + if (length > 4) { + invalidate_dcache_range((u32)CKSEG0ADDR(rx_desc->DataPtr), (u32) CKSEG0ADDR(rx_desc->DataPtr) + length); + NetReceive(NetRxPackets[rx_num], length); + } else { + printf("ERROR: Invalid rx packet length.\n"); + } + + rx_desc->status.field.Sop=0; + rx_desc->status.field.Eop=0; + rx_desc->status.field.C=0; + rx_desc->status.field.DataLen=PKTSIZE_ALIGN; + rx_desc->status.field.OWN=1; + + rx_num++; + if (rx_num == NUM_RX_DESC) + rx_num=0; + + return length; +} + +static void lq_eth_init_chip(void) +{ + *ETOP_MDIO_CFG &= ~0x6; + *ENET_MAC_CFG = 0x187; + + // turn on port0, set to rmii and turn off port1. +#ifdef CONFIG_RMII + *ETOP_CFG = (*ETOP_CFG & 0xFFFFFFFC) | 0x0000000A; +#else + *ETOP_CFG = (*ETOP_CFG & 0xFFFFFFFC) | 0x00000008; +#endif + + *ETOP_IG_PLEN_CTRL = 0x004005EE; // set packetlen. + *ENET_MAC_CFG |= 1<<11; /*enable the crc*/ + return; +} + +static void lq_eth_init_dma(void) +{ + /* Reset DMA */ + dma_writel(dma_ctrl, dma_readl(dma_ctrl) | 1); + dma_writel(dma_irnen, 0);/*disable all the interrupts first*/ + + /* Clear Interrupt Status Register */ + dma_writel(dma_irncr, 0xfffff); + /*disable all the dma interrupts*/ + dma_writel(dma_irnen, 0); + /*disable channel 0 and channel 1 interrupts*/ + + dma_writel(dma_cs, RX_CHAN_NO); + dma_writel(dma_cctrl, 0x2);/*fix me, need to reset this channel first?*/ + dma_writel(dma_cpoll, 0x80000040); + /*set descriptor base*/ + dma_writel(dma_cdba, (u32)rx_des_ring); + dma_writel(dma_cdlen, NUM_RX_DESC); + dma_writel(dma_cie, 0); + dma_writel(dma_cctrl, 0x30000); + + dma_writel(dma_cs, TX_CHAN_NO); + dma_writel(dma_cctrl, 0x2);/*fix me, need to reset this channel first?*/ + dma_writel(dma_cpoll, 0x80000040); + dma_writel(dma_cdba, (u32)tx_des_ring); + dma_writel(dma_cdlen, NUM_TX_DESC); + dma_writel(dma_cie, 0); + dma_writel(dma_cctrl, 0x30100); + /*enable the poll function and set the poll counter*/ + //dma_writel(DMA_CPOLL=DANUBE_DMA_POLL_EN | (DANUBE_DMA_POLL_COUNT<<4); + /*set port properties, enable endian conversion for switch*/ + dma_writel(dma_ps, 0); + dma_writel(dma_pctrl, dma_readl(dma_pctrl) | (0xf<<8));/*enable 32 bit endian conversion*/ + + return; +} diff --git a/package/uboot-lantiq/files/drivers/net/ifx_etop.h b/package/uboot-lantiq/files/drivers/net/ifx_etop.h new file mode 100644 index 000000000..99708684e --- /dev/null +++ b/package/uboot-lantiq/files/drivers/net/ifx_etop.h @@ -0,0 +1,91 @@ +/* + * Lantiq switch ethernet driver for Danube family. + * + * Based on INCA-IP driver: + * (C) Copyright 2003-2004 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + * + */ + +#ifndef __DRIVERS_IFX_SW_H__ +#define __DRIVERS_IFX_SW_H__ + +#define DANUBE_PPE32_BASE 0xBE180000 +#define DANUBE_PPE32_DATA_MEM_MAP_REG_BASE (DANUBE_PPE32_BASE + (0x4000 * 4)) + +#define ETOP_MDIO_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0600 * 4))) +#define ETOP_MDIO_ACC ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0601 * 4))) +#define ETOP_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0602 * 4))) +#define ETOP_IG_VLAN_COS ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0603 * 4))) +#define ETOP_IG_DSCP_COS3 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0604 * 4))) +#define ETOP_IG_DSCP_COS2 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0605 * 4))) +#define ETOP_IG_DSCP_COS1 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0606 * 4))) +#define ETOP_IG_DSCP_COS0 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0607 * 4))) +#define ETOP_IG_PLEN_CTRL ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0608 * 4))) +#define ETOP_ISR ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x060A * 4))) +#define ETOP_IER ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x060B * 4))) +#define ETOP_VPID ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x060C * 4))) +#define ENET_MAC_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0610 * 4))) +#define ENETS_DBA ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0612 * 4))) +#define ENETS_CBA ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0613 * 4))) +#define ENETS_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0614 * 4))) +#define ENETS_PGCNT ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0615 * 4))) +#define ENETS_PKTCNT ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0616 * 4))) +#define ENETS_BUF_CTRL ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0617 * 4))) +#define ENETS_COS_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0618 * 4))) +#define ENETS_IGDROP ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0619 * 4))) +#define ENETS_IGERR ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x061A * 4))) +#define ENET_MAC_DA0 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x061B * 4))) +#define ENET_MAC_DA1 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x061C * 4))) + + + +#define DANUBE_DMA_BASE 0xBE104100 + +typedef struct IfxDMA_s +{ + unsigned long dma_clc; /*0x0000*/ + unsigned long dma_rsvd1[1]; /* for mapping */ /*0x0004*/ + unsigned long dma_id; /*0x0008*/ + unsigned long dma_rsvd2[1]; /* for mapping */ /*0x000C*/ + unsigned long dma_ctrl; /*0x0010*/ + unsigned long dma_cpoll; /*0x0014*/ + unsigned long dma_cs; /*0x0018*/ + unsigned long dma_cctrl; /*0x001C*/ + unsigned long dma_cdba; /*0x0020*/ + unsigned long dma_cdlen; /*0x0024*/ + unsigned long dma_cis; /*0x0028*/ + unsigned long dma_cie; /*0x002C*/ + unsigned long dma_rsvd3[4]; /* for mapping */ /*0x0030*/ + unsigned long dma_ps; /*0x0040*/ + unsigned long dma_pctrl; /*0x0044*/ + unsigned long dma_rsvd4[43]; /* for mapping */ /*0x0048*/ + unsigned long dma_irnen; /*0x00F4*/ + unsigned long dma_irncr; /*0x00F8*/ + unsigned long dma_irnicr; /*0x00FC*/ +} IfxDMA_t; + +/* Register access macros */ +#define dma_readl(reg) \ + readl(&pDma->reg) +#define dma_writel(reg,value) \ + writel((value), &pDma->reg) + +int lq_eth_initialize(bd_t * bis); + +#endif /* __DRIVERS_IFX_SW_H__ */ diff --git a/package/uboot-lantiq/files/drivers/serial/ifx_asc.c b/package/uboot-lantiq/files/drivers/serial/ifx_asc.c new file mode 100644 index 000000000..5c13f2662 --- /dev/null +++ b/package/uboot-lantiq/files/drivers/serial/ifx_asc.c @@ -0,0 +1,218 @@ +/* + * (C) Copyright 2003 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * (C) Copyright 2009 + * Infineon Technologies AG, http://www.infineon.com + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#include +#include +#include +#include + +#include "ifx_asc.h" + +#define SET_BIT(reg, mask) asc_writel(reg, asc_readl(reg) | (mask)) +#define CLEAR_BIT(reg, mask) asc_writel(reg, asc_readl(reg) & (~mask)) +#define SET_BITFIELD(reg, mask, off, val) asc_writel(reg, (asc_readl(reg) & (~mask)) | (val << off) ) + +#undef DEBUG_ASC_RAW +#ifdef DEBUG_ASC_RAW +#define DEBUG_ASC_RAW_RX_BUF 0xA0800000 +#define DEBUG_ASC_RAW_TX_BUF 0xA0900000 +#endif + +DECLARE_GLOBAL_DATA_PTR; + +static IfxAsc_t *pAsc = (IfxAsc_t *)CKSEG1ADDR(CONFIG_SYS_IFX_ASC_BASE); + +/* + * FDV fASC + * BaudRate = ----- * -------------------- + * 512 16 * (ReloadValue+1) + */ + +/* + * FDV fASC + * ReloadValue = ( ----- * --------------- ) - 1 + * 512 16 * BaudRate + */ +static void serial_divs(u32 baudrate, u32 fasc, u32 *pfdv, u32 *preload) +{ + u32 clock = fasc / 16; + + u32 fdv; /* best fdv */ + u32 reload = 0; /* best reload */ + u32 diff; /* smallest diff */ + u32 idiff; /* current diff */ + u32 ireload; /* current reload */ + u32 i; /* current fdv */ + u32 result; /* current resulting baudrate */ + + if (clock > 0x7FFFFF) + clock /= 512; + else + baudrate *= 512; + + fdv = 512; /* start with 1:1 fraction */ + diff = baudrate; /* highest possible */ + + /* i is the test fdv value -- start with the largest possible */ + for (i = 512; i > 0; i--) + { + ireload = (clock * i) / baudrate; + if (ireload < 1) + break; /* already invalid */ + result = (clock * i) / ireload; + + idiff = (result > baudrate) ? (result - baudrate) : (baudrate - result); + if (idiff == 0) + { + fdv = i; + reload = ireload; + break; /* can't do better */ + } + else if (idiff < diff) + { + fdv = i; /* best so far */ + reload = ireload; + diff = idiff; /* update lowest diff*/ + } + } + + *pfdv = (fdv == 512) ? 0 : fdv; + *preload = reload - 1; +} + + +void serial_setbrg (void) +{ + u32 ReloadValue, fdv; + + serial_divs(gd->baudrate, get_bus_freq(0), &fdv, &ReloadValue); + + /* Disable Baud Rate Generator; BG should only be written when R=0 */ + CLEAR_BIT(asc_con, ASCCON_R); + + /* Enable Fractional Divider */ + SET_BIT(asc_con, ASCCON_FDE); /* FDE = 1 */ + + /* Set fractional divider value */ + asc_writel(asc_fdv, fdv & ASCFDV_VALUE_MASK); + + /* Set reload value in BG */ + asc_writel(asc_bg, ReloadValue); + + /* Enable Baud Rate Generator */ + SET_BIT(asc_con, ASCCON_R); /* R = 1 */ +} + + +int serial_init (void) +{ + + /* and we have to set CLC register*/ + CLEAR_BIT(asc_clc, ASCCLC_DISS); + SET_BITFIELD(asc_clc, ASCCLC_RMCMASK, ASCCLC_RMCOFFSET, 0x0001); + + /* initialy we are in async mode */ + asc_writel(asc_con, ASCCON_M_8ASYNC); + + /* select input port */ + asc_writel(asc_pisel, CONSOLE_TTY & 0x1); + + /* TXFIFO's filling level */ + SET_BITFIELD(asc_txfcon, ASCTXFCON_TXFITLMASK, + ASCTXFCON_TXFITLOFF, ASC_TXFIFO_FL); + /* enable TXFIFO */ + SET_BIT(asc_txfcon, ASCTXFCON_TXFEN); + + /* RXFIFO's filling level */ + SET_BITFIELD(asc_txfcon, ASCRXFCON_RXFITLMASK, + ASCRXFCON_RXFITLOFF, ASC_RXFIFO_FL); + /* enable RXFIFO */ + SET_BIT(asc_rxfcon, ASCRXFCON_RXFEN); + + /* set baud rate */ + serial_setbrg(); + + /* enable error signals & Receiver enable */ + SET_BIT(asc_whbstate, ASCWHBSTATE_SETREN|ASCCON_FEN|ASCCON_TOEN|ASCCON_ROEN); + + return 0; +} + + +void serial_putc (const char c) +{ + u32 txFl = 0; +#ifdef DEBUG_ASC_RAW + static u8 * debug = (u8 *) DEBUG_ASC_RAW_TX_BUF; + *debug++=c; +#endif + if (c == '\n') + serial_putc ('\r'); + /* check do we have a free space in the TX FIFO */ + /* get current filling level */ + do { + txFl = ( asc_readl(asc_fstat) & ASCFSTAT_TXFFLMASK ) >> ASCFSTAT_TXFFLOFF; + } + while ( txFl == ASC_TXFIFO_FULL ); + + asc_writel(asc_tbuf, c); /* write char to Transmit Buffer Register */ + + /* check for errors */ + if ( asc_readl(asc_state) & ASCSTATE_TOE ) { + SET_BIT(asc_whbstate, ASCWHBSTATE_CLRTOE); + return; + } +} + +void serial_puts (const char *s) +{ + while (*s) { + serial_putc (*s++); + } +} + +int serial_getc (void) +{ + char c; + while ((asc_readl(asc_fstat) & ASCFSTAT_RXFFLMASK) == 0 ); + c = (char)(asc_readl(asc_rbuf) & 0xff); + +#ifdef DEBUG_ASC_RAW + static u8* debug=(u8*)(DEBUG_ASC_RAW_RX_BUF); + *debug++=c; +#endif + return c; +} + + +int serial_tstc (void) +{ + int res = 1; + + if ( (asc_readl(asc_fstat) & ASCFSTAT_RXFFLMASK) == 0 ) { + res = 0; + } + return res; +} diff --git a/package/uboot-lantiq/files/drivers/serial/ifx_asc.h b/package/uboot-lantiq/files/drivers/serial/ifx_asc.h new file mode 100644 index 000000000..2d3a49e1e --- /dev/null +++ b/package/uboot-lantiq/files/drivers/serial/ifx_asc.h @@ -0,0 +1,199 @@ +/***************************************************************************** + * DANUBE BootROM + * Copyright (c) 2005, Infineon Technologies AG, All rights reserved + * IFAP DC COM SD + *****************************************************************************/ +#ifndef __ASC_H +#define __ASC_H + +/* channel operating modes */ +#define ASCOPT_CSIZE 0x00000003 +#define ASCOPT_CS7 0x00000001 +#define ASCOPT_CS8 0x00000002 +#define ASCOPT_PARENB 0x00000004 +#define ASCOPT_STOPB 0x00000008 +#define ASCOPT_PARODD 0x00000010 +#define ASCOPT_CREAD 0x00000020 + +#define ASC_OPTIONS (ASCOPT_CREAD | ASCOPT_CS8) + +/* ASC input select (0 or 1) */ +#define CONSOLE_TTY 0 + +#define ASC_TXFIFO_FL 1 +#define ASC_RXFIFO_FL 1 +#define ASC_TXFIFO_FULL 16 + +/* CLC register's bits and bitfields */ +#define ASCCLC_DISR 0x00000001 +#define ASCCLC_DISS 0x00000002 +#define ASCCLC_RMCMASK 0x0000FF00 +#define ASCCLC_RMCOFFSET 8 + +/* CON register's bits and bitfields */ +#define ASCCON_MODEMASK 0x0000000f +#define ASCCON_M_8ASYNC 0x0 +#define ASCCON_M_8IRDA 0x1 +#define ASCCON_M_7ASYNC 0x2 +#define ASCCON_M_7IRDA 0x3 +#define ASCCON_WLSMASK 0x0000000c +#define ASCCON_WLSOFFSET 2 +#define ASCCON_WLS_8BIT 0x0 +#define ASCCON_WLS_7BIT 0x1 +#define ASCCON_PEN 0x00000010 +#define ASCCON_ODD 0x00000020 +#define ASCCON_SP 0x00000040 +#define ASCCON_STP 0x00000080 +#define ASCCON_BRS 0x00000100 +#define ASCCON_FDE 0x00000200 +#define ASCCON_ERRCLK 0x00000400 +#define ASCCON_EMMASK 0x00001800 +#define ASCCON_EMOFFSET 11 +#define ASCCON_EM_ECHO_OFF 0x0 +#define ASCCON_EM_ECHO_AB 0x1 +#define ASCCON_EM_ECHO_ON 0x2 +#define ASCCON_LB 0x00002000 +#define ASCCON_ACO 0x00004000 +#define ASCCON_R 0x00008000 +#define ASCCON_PAL 0x00010000 +#define ASCCON_FEN 0x00020000 +#define ASCCON_RUEN 0x00040000 +#define ASCCON_ROEN 0x00080000 +#define ASCCON_TOEN 0x00100000 +#define ASCCON_BEN 0x00200000 +#define ASCCON_TXINV 0x01000000 +#define ASCCON_RXINV 0x02000000 +#define ASCCON_TXMSB 0x04000000 +#define ASCCON_RXMSB 0x08000000 + +/* STATE register's bits and bitfields */ +#define ASCSTATE_REN 0x00000001 +#define ASCSTATE_PE 0x00010000 +#define ASCSTATE_FE 0x00020000 +#define ASCSTATE_RUE 0x00040000 +#define ASCSTATE_ROE 0x00080000 +#define ASCSTATE_TOE 0x00100000 +#define ASCSTATE_BE 0x00200000 +#define ASCSTATE_TXBVMASK 0x07000000 +#define ASCSTATE_TXBVOFFSET 24 +#define ASCSTATE_TXEOM 0x08000000 +#define ASCSTATE_RXBVMASK 0x70000000 +#define ASCSTATE_RXBVOFFSET 28 +#define ASCSTATE_RXEOM 0x80000000 + +/* WHBSTATE register's bits and bitfields */ +#define ASCWHBSTATE_CLRREN 0x00000001 +#define ASCWHBSTATE_SETREN 0x00000002 +#define ASCWHBSTATE_CLRPE 0x00000004 +#define ASCWHBSTATE_CLRFE 0x00000008 +#define ASCWHBSTATE_CLRRUE 0x00000010 +#define ASCWHBSTATE_CLRROE 0x00000020 +#define ASCWHBSTATE_CLRTOE 0x00000040 +#define ASCWHBSTATE_CLRBE 0x00000080 +#define ASCWHBSTATE_SETPE 0x00000100 +#define ASCWHBSTATE_SETFE 0x00000200 +#define ASCWHBSTATE_SETRUE 0x00000400 +#define ASCWHBSTATE_SETROE 0x00000800 +#define ASCWHBSTATE_SETTOE 0x00001000 +#define ASCWHBSTATE_SETBE 0x00002000 + +/* ABCON register's bits and bitfields */ +#define ASCABCON_ABEN 0x0001 +#define ASCABCON_AUREN 0x0002 +#define ASCABCON_ABSTEN 0x0004 +#define ASCABCON_ABDETEN 0x0008 +#define ASCABCON_FCDETEN 0x0010 + +/* FDV register mask, offset and bitfields*/ +#define ASCFDV_VALUE_MASK 0x000001FF + +/* WHBABCON register's bits and bitfields */ +#define ASCWHBABCON_CLRABEN 0x0001 +#define ASCWHBABCON_SETABEN 0x0002 + +/* ABSTAT register's bits and bitfields */ +#define ASCABSTAT_FCSDET 0x0001 +#define ASCABSTAT_FCCDET 0x0002 +#define ASCABSTAT_SCSDET 0x0004 +#define ASCABSTAT_SCCDET 0x0008 +#define ASCABSTAT_DETWAIT 0x0010 + +/* WHBABSTAT register's bits and bitfields */ +#define ASCWHBABSTAT_CLRFCSDET 0x0001 +#define ASCWHBABSTAT_SETFCSDET 0x0002 +#define ASCWHBABSTAT_CLRFCCDET 0x0004 +#define ASCWHBABSTAT_SETFCCDET 0x0008 +#define ASCWHBABSTAT_CLRSCSDET 0x0010 +#define ASCWHBABSTAT_SETSCSDET 0x0020 +#define ASCWHBABSTAT_CLRSCCDET 0x0040 +#define ASCWHBABSTAT_SETSCCDET 0x0080 +#define ASCWHBABSTAT_CLRDETWAIT 0x0100 +#define ASCWHBABSTAT_SETDETWAIT 0x0200 + +/* TXFCON register's bits and bitfields */ +#define ASCTXFCON_TXFIFO1 0x00000400 +#define ASCTXFCON_TXFEN 0x0001 +#define ASCTXFCON_TXFFLU 0x0002 +#define ASCTXFCON_TXFITLMASK 0x3F00 +#define ASCTXFCON_TXFITLOFF 8 + +/* RXFCON register's bits and bitfields */ +#define ASCRXFCON_RXFIFO1 0x00000400 +#define ASCRXFCON_RXFEN 0x0001 +#define ASCRXFCON_RXFFLU 0x0002 +#define ASCRXFCON_RXFITLMASK 0x3F00 +#define ASCRXFCON_RXFITLOFF 8 + +/* FSTAT register's bits and bitfields */ +#define ASCFSTAT_RXFFLMASK 0x003F +#define ASCFSTAT_TXFFLMASK 0x3F00 +#define ASCFSTAT_TXFFLOFF 8 + +typedef struct IfxAsc_s +{ + unsigned long asc_clc; /*0x0000*/ + unsigned long asc_pisel; /*0x0004*/ + unsigned long asc_id; /*0x0008*/ + unsigned long asc_rsvd1[1]; /* for mapping */ /*0x000C*/ + unsigned long asc_con; /*0x0010*/ + unsigned long asc_state; /*0x0014*/ + unsigned long asc_whbstate; /*0x0018*/ + unsigned long asc_rsvd2[1]; /* for mapping */ /*0x001C*/ + unsigned long asc_tbuf; /*0x0020*/ + unsigned long asc_rbuf; /*0x0024*/ + unsigned long asc_rsvd3[2]; /* for mapping */ /*0x0028*/ + unsigned long asc_abcon; /*0x0030*/ + unsigned long asc_abstat; /* not used */ /*0x0034*/ + unsigned long asc_whbabcon; /*0x0038*/ + unsigned long asc_whbabstat; /* not used */ /*0x003C*/ + unsigned long asc_rxfcon; /*0x0040*/ + unsigned long asc_txfcon; /*0x0044*/ + unsigned long asc_fstat; /*0x0048*/ + unsigned long asc_rsvd4[1]; /* for mapping */ /*0x004C*/ + unsigned long asc_bg; /*0x0050*/ + unsigned long asc_bg_timer; /*0x0054*/ + unsigned long asc_fdv; /*0x0058*/ + unsigned long asc_pmw; /*0x005C*/ + unsigned long asc_modcon; /*0x0060*/ + unsigned long asc_modstat; /*0x0064*/ + unsigned long asc_rsvd5[2]; /* for mapping */ /*0x0068*/ + unsigned long asc_sfcc; /*0x0070*/ + unsigned long asc_rsvd6[3]; /* for mapping */ /*0x0074*/ + unsigned long asc_eomcon; /*0x0080*/ + unsigned long asc_rsvd7[26]; /* for mapping */ /*0x0084*/ + unsigned long asc_dmacon; /*0x00EC*/ + unsigned long asc_rsvd8[1]; /* for mapping */ /*0x00F0*/ + unsigned long asc_irnen; /*0x00F4*/ + unsigned long asc_irnicr; /*0x00F8*/ + unsigned long asc_irncr; /*0x00FC*/ +} IfxAsc_t; + + +/* Register access macros */ +#define asc_readl(reg) \ + readl(&pAsc->reg) +#define asc_writel(reg,value) \ + writel((value), &pAsc->reg) + + +#endif /* __ASC_H */ diff --git a/package/uboot-lantiq/files/include/asm-mips/danube.h b/package/uboot-lantiq/files/include/asm-mips/danube.h new file mode 100644 index 000000000..7caf8f7aa --- /dev/null +++ b/package/uboot-lantiq/files/include/asm-mips/danube.h @@ -0,0 +1,2015 @@ +#ifndef DANUBE_H +#define DANUBE_H +/****************************************************************************** + Copyright (c) 2002, Infineon Technologies. All rights reserved. + + No Warranty + Because the program is licensed free of charge, there is no warranty for + the program, to the extent permitted by applicable law. Except when + otherwise stated in writing the copyright holders and/or other parties + provide the program "as is" without warranty of any kind, either + expressed or implied, including, but not limited to, the implied + warranties of merchantability and fitness for a particular purpose. The + entire risk as to the quality and performance of the program is with + you. should the program prove defective, you assume the cost of all + necessary servicing, repair or correction. + + In no event unless required by applicable law or agreed to in writing + will any copyright holder, or any other party who may modify and/or + redistribute the program as permitted above, be liable to you for + damages, including any general, special, incidental or consequential + damages arising out of the use or inability to use the program + (including but not limited to loss of data or data being rendered + inaccurate or losses sustained by you or third parties or a failure of + the program to operate with any other programs), even if such holder or + other party has been advised of the possibility of such damages. +******************************************************************************/ + +/***********************************************************************/ +/* Module : MEI register address and bits */ +/***********************************************************************/ +#define MEI_SPACE_ACCESS 0xB0100C00 +#define MEI_DATA_XFR (0x0000 + MEI_SPACE_ACCESS) +#define MEI_VERSION (0x0200 + MEI_SPACE_ACCESS) +#define ARC_GP_STAT (0x0204 + MEI_SPACE_ACCESS) +#define MEI_XFR_ADDR (0x020C + MEI_SPACE_ACCESS) +#define MEI_TO_ARC_INT (0x021C + MEI_SPACE_ACCESS) +#define ARC_TO_MEI_INT (0x0220 + MEI_SPACE_ACCESS) +#define ARC_TO_MEI_INT_MASK (0x0224 + MEI_SPACE_ACCESS) +#define MEI_DEBUG_WAD (0x0228 + MEI_SPACE_ACCESS) +#define MEI_DEBUG_RAD (0x022C + MEI_SPACE_ACCESS) +#define MEI_DEBUG_DATA (0x0230 + MEI_SPACE_ACCESS) +#define MEI_DEBUG_DEC (0x0234 + MEI_SPACE_ACCESS) +#define MEI_CONTROL (0x0238 + MEI_SPACE_ACCESS) +#define AT_CELLRDY_BC0 (0x023C + MEI_SPACE_ACCESS) +#define AT_CELLRDY_BC1 (0x0240 + MEI_SPACE_ACCESS) +#define AR_CELLRDY_BC0 (0x0244 + MEI_SPACE_ACCESS) +#define AR_CELLRDY_BC1 (0x0248 + MEI_SPACE_ACCESS) +#define AAI_ACCESS (0x024C + MEI_SPACE_ACCESS) +#define AAITXCB0 (0x0300 + MEI_SPACE_ACCESS) +#define AAITXCB1 (0x0304 + MEI_SPACE_ACCESS) +#define AAIRXCB0 (0x0308 + MEI_SPACE_ACCESS) +#define AAIRXCB1 (0x030C + MEI_SPACE_ACCESS) + + +/***********************************************************************/ +/* Module : WDT register address and bits */ +/***********************************************************************/ +#define DANUBE_BIU_WDT_BASE (0xBf8803F0) +#define DANUBE_BIU_WDT_CR (0x0000 + DANUBE_BIU_WDT_BASE) +#define DANUBE_BIU_WDT_SR (0x0008 + DANUBE_BIU_WDT_BASE) + + +/***********************************************************************/ +/* Module : PMU register address and bits */ +/***********************************************************************/ +#define DANUBE_PMU_BASE_ADDR (KSEG1+0x1F102000) + +/***PM Control Register***/ +#define DANUBE_PMU_CR ((volatile u32*)(0x001C + DANUBE_PMU_BASE_ADDR)) +#define DANUBE_PMU_PWDCR DANUBE_PMU_CR +#define DANUBE_PMU_SR ((volatile u32*)(0x0020 + DANUBE_PMU_BASE_ADDR)) + +#define DANUBE_PMU_DMA_SHIFT 5 +#define DANUBE_PMU_PPE_SHIFT 13 +#define DANUBE_PMU_ETOP_SHIFT 22 +#define DANUBE_PMU_ENET0_SHIFT 24 +#define DANUBE_PMU_ENET1_SHIFT 25 + + +#define DANUBE_PMU DANUBE_PMU_BASE_ADDR +/***PM Global Enable Register***/ +#define DANUBE_PMU_PM_GEN ((volatile u32*)(DANUBE_PMU+ 0x0000)) +#define DANUBE_PMU_PM_GEN_EN16 (1 << 16) +#define DANUBE_PMU_PM_GEN_EN15 (1 << 15) +#define DANUBE_PMU_PM_GEN_EN14 (1 << 14) +#define DANUBE_PMU_PM_GEN_EN13 (1 << 13) +#define DANUBE_PMU_PM_GEN_EN12 (1 << 12) +#define DANUBE_PMU_PM_GEN_EN11 (1 << 11) +#define DANUBE_PMU_PM_GEN_EN10 (1 << 10) +#define DANUBE_PMU_PM_GEN_EN9 (1 << 9) +#define DANUBE_PMU_PM_GEN_EN8 (1 << 8) +#define DANUBE_PMU_PM_GEN_EN7 (1 << 7) +#define DANUBE_PMU_PM_GEN_EN6 (1 << 6) +#define DANUBE_PMU_PM_GEN_EN5 (1 << 5) +#define DANUBE_PMU_PM_GEN_EN4 (1 << 4) +#define DANUBE_PMU_PM_GEN_EN3 (1 << 3) +#define DANUBE_PMU_PM_GEN_EN2 (1 << 2) +#define DANUBE_PMU_PM_GEN_EN0 (1 << 0) + +/***PM Power Down Enable Register***/ +#define DANUBE_PMU_PM_PDEN ((volatile u32*)(DANUBE_PMU+ 0x0008)) +#define DANUBE_PMU_PM_PDEN_EN16 (1 << 16) +#define DANUBE_PMU_PM_PDEN_EN15 (1 << 15) +#define DANUBE_PMU_PM_PDEN_EN14 (1 << 14) +#define DANUBE_PMU_PM_PDEN_EN13 (1 << 13) +#define DANUBE_PMU_PM_PDEN_EN12 (1 << 12) +#define DANUBE_PMU_PM_PDEN_EN11 (1 << 11) +#define DANUBE_PMU_PM_PDEN_EN10 (1 << 10) +#define DANUBE_PMU_PM_PDEN_EN9 (1 << 9) +#define DANUBE_PMU_PM_PDEN_EN8 (1 << 8) +#define DANUBE_PMU_PM_PDEN_EN7 (1 << 7) +#define DANUBE_PMU_PM_PDEN_EN5 (1 << 5) +#define DANUBE_PMU_PM_PDEN_EN4 (1 << 4) +#define DANUBE_PMU_PM_PDEN_EN3 (1 << 3) +#define DANUBE_PMU_PM_PDEN_EN2 (1 << 2) +#define DANUBE_PMU_PM_PDEN_EN0 (1 << 0) + +/***PM Wake-Up from Power Down Register***/ +#define DANUBE_PMU_PM_WUP ((volatile u32*)(DANUBE_PMU+ 0x0010)) +#define DANUBE_PMU_PM_WUP_WUP16 (1 << 16) +#define DANUBE_PMU_PM_WUP_WUP15 (1 << 15) +#define DANUBE_PMU_PM_WUP_WUP14 (1 << 14) +#define DANUBE_PMU_PM_WUP_WUP13 (1 << 13) +#define DANUBE_PMU_PM_WUP_WUP12 (1 << 12) +#define DANUBE_PMU_PM_WUP_WUP11 (1 << 11) +#define DANUBE_PMU_PM_WUP_WUP10 (1 << 10) +#define DANUBE_PMU_PM_WUP_WUP9 (1 << 9) +#define DANUBE_PMU_PM_WUP_WUP8 (1 << 8) +#define DANUBE_PMU_PM_PDEN_EN7 (1 << 7) +#define DANUBE_PMU_PM_PDEN_EN5 (1 << 5) +#define DANUBE_PMU_PM_PDEN_EN4 (1 << 4) +#define DANUBE_PMU_PM_PDEN_EN3 (1 << 3) +#define DANUBE_PMU_PM_PDEN_EN2 (1 << 2) +#define DANUBE_PMU_PM_PDEN_EN0 (1 << 0) + +/***PM Wake-Up from Power Down Register***/ +#define DANUBE_PMU_PM_WUP ((volatile u32*)(DANUBE_PMU+ 0x0010)) +#define DANUBE_PMU_PM_WUP_WUP16 (1 << 16) +#define DANUBE_PMU_PM_WUP_WUP15 (1 << 15) +#define DANUBE_PMU_PM_WUP_WUP14 (1 << 14) +#define DANUBE_PMU_PM_WUP_WUP13 (1 << 13) +#define DANUBE_PMU_PM_WUP_WUP12 (1 << 12) +#define DANUBE_PMU_PM_WUP_WUP11 (1 << 11) +#define DANUBE_PMU_PM_WUP_WUP10 (1 << 10) +#define DANUBE_PMU_PM_WUP_WUP9 (1 << 9) +#define DANUBE_PMU_PM_WUP_WUP8 (1 << 8) +#define DANUBE_PMU_PM_WUP_WUP7 (1 << 7) +#define DANUBE_PMU_PM_WUP_WUP5 (1 << 5) +#define DANUBE_PMU_PM_WUP_WUP4 (1 << 4) +#define DANUBE_PMU_PM_WUP_WUP3 (1 << 3) +#define DANUBE_PMU_PM_WUP_WUP2 (1 << 2) +#define DANUBE_PMU_PM_WUP_WUP0 (1 << 0) + +/***PM Control Register***/ +#define DANUBE_PMU_PM_CR ((volatile u32*)(DANUBE_PMU+ 0x0014)) +#define DANUBE_PMU_PM_CR_AWEN (1 << 31) +#define DANUBE_PMU_PM_CR_SWRST (1 << 30) +#define DANUBE_PMU_PM_CR_SWCR (1 << 2) +#define DANUBE_PMU_PM_CR_CRD (value) (((( 1 << 2) - 1) & (value)) << 0) + +/***********************************************************************/ +/* Module : RCU register address and bits */ +/***********************************************************************/ +#define DANUBE_RCU_BASE_ADDR (0xBF203000) + +#define DANUBE_RCU_REQ (0x0010 + DANUBE_RCU_BASE_ADDR) +#define DANUBE_RCU_RST_REQ ((volatile u32*)(DANUBE_RCU_REQ)) +#define DANUBE_RCU_STAT (0x0014 + DANUBE_RCU_BASE_ADDR) +#define DANUBE_RCU_RST_SR ( (volatile u32 *)(DANUBE_RCU_STAT)) +#define DANUBE_RCU_PCI_RDY ( (volatile u32 *)(DANUBE_RCU_BASE_ADDR+0x28)) +#define DANUBE_RCU_MON (0x0030 + DANUBE_RCU_BASE_ADDR) + + +/***********************************************************************/ +/* Module : BCU register address and bits */ +/***********************************************************************/ +#define DANUBE_BCU_BASE_ADDR (0xB0100000) +/***BCU Control Register (0010H)***/ +#define DANUBE_BCU_CON (0x0010 + DANUBE_BCU_BASE_ADDR) +#define DANUBE_BCU_BCU_CON_SPC (value) (((( 1 << 8) - 1) & (value)) << 24) +#define DANUBE_BCU_BCU_CON_SPE (1 << 19) +#define DANUBE_BCU_BCU_CON_PSE (1 << 18) +#define DANUBE_BCU_BCU_CON_DBG (1 << 16) +#define DANUBE_BCU_BCU_CON_TOUT (value) (((( 1 << 16) - 1) & (value)) << 0) + + +/***BCU Error Control Capture Register (0020H)***/ +#define DANUBE_BCU_ECON (0x0020 + DANUBE_BCU_BASE_ADDR) +#define DANUBE_BCU_BCU_ECON_TAG (value) (((( 1 << 4) - 1) & (value)) << 24) +#define DANUBE_BCU_BCU_ECON_RDN (1 << 23) +#define DANUBE_BCU_BCU_ECON_WRN (1 << 22) +#define DANUBE_BCU_BCU_ECON_SVM (1 << 21) +#define DANUBE_BCU_BCU_ECON_ACK (value) (((( 1 << 2) - 1) & (value)) << 19) +#define DANUBE_BCU_BCU_ECON_ABT (1 << 18) +#define DANUBE_BCU_BCU_ECON_RDY (1 << 17) +#define DANUBE_BCU_BCU_ECON_TOUT (1 << 16) +#define DANUBE_BCU_BCU_ECON_ERRCNT (value) (((( 1 << 16) - 1) & (value)) << 0) +#define DANUBE_BCU_BCU_ECON_OPC (value) (((( 1 << 4) - 1) & (value)) << 28) + +/***BCU Error Address Capture Register (0024 H)***/ +#define DANUBE_BCU_EADD (0x0024 + DANUBE_BCU_BASE_ADDR) + +/***BCU Error Data Capture Register (0028H)***/ +#define DANUBE_BCU_EDAT (0x0028 + DANUBE_BCU_BASE_ADDR) + +#define DANUBE_BCU_IRNEN (0x00F4 + DANUBE_BCU_BASE_ADDR) +#define DANUBE_BCU_IRNICR (0x00F8 + DANUBE_BCU_BASE_ADDR) +#define DANUBE_BCU_IRNCR (0x00FC + DANUBE_BCU_BASE_ADDR) + + +/***********************************************************************/ +/* Module : MBC register address and bits */ +/***********************************************************************/ + +#define DANUBE_MBC (0xBF103000) +/***********************************************************************/ + + +/***Mailbox CPU Configuration Register***/ +#define DANUBE_MBC_MBC_CFG ((volatile u32*)(DANUBE_MBC+ 0x0080)) +#define DANUBE_MBC_MBC_CFG_SWAP (value) (((( 1 << 2) - 1) & (value)) << 6) +#define DANUBE_MBC_MBC_CFG_RES (1 << 5) +#define DANUBE_MBC_MBC_CFG_FWID (value) (((( 1 << 4) - 1) & (value)) << 1) +#define DANUBE_MBC_MBC_CFG_SIZE (1 << 0) + +/***Mailbox CPU Interrupt Status Register***/ +#define DANUBE_MBC_MBC_ISR ((volatile u32*)(DANUBE_MBC+ 0x0084)) +#define DANUBE_MBC_MBC_ISR_B3DA (1 << 31) +#define DANUBE_MBC_MBC_ISR_B2DA (1 << 30) +#define DANUBE_MBC_MBC_ISR_B1E (1 << 29) +#define DANUBE_MBC_MBC_ISR_B0E (1 << 28) +#define DANUBE_MBC_MBC_ISR_WDT (1 << 27) +#define DANUBE_MBC_MBC_ISR_DS260 (value) (((( 1 << 27) - 1) & (value)) << 0) + +/***Mailbox CPU Mask Register***/ +#define DANUBE_MBC_MBC_MSK ((volatile u32*)(DANUBE_MBC+ 0x0088)) +#define DANUBE_MBC_MBC_MSK_B3DA (1 << 31) +#define DANUBE_MBC_MBC_MSK_B2DA (1 << 30) +#define DANUBE_MBC_MBC_MSK_B1E (1 << 29) +#define DANUBE_MBC_MBC_MSK_B0E (1 << 28) +#define DANUBE_MBC_MBC_MSK_WDT (1 << 27) +#define DANUBE_MBC_MBC_MSK_DS260 (value) (((( 1 << 27) - 1) & (value)) << 0) + +/***Mailbox CPU Mask 01 Register***/ +#define DANUBE_MBC_MBC_MSK01 ((volatile u32*)(DANUBE_MBC+ 0x008C)) +#define DANUBE_MBC_MBC_MSK01_B3DA (1 << 31) +#define DANUBE_MBC_MBC_MSK01_B2DA (1 << 30) +#define DANUBE_MBC_MBC_MSK01_B1E (1 << 29) +#define DANUBE_MBC_MBC_MSK01_B0E (1 << 28) +#define DANUBE_MBC_MBC_MSK01_WDT (1 << 27) +#define DANUBE_MBC_MBC_MSK01_DS260 (value) (((( 1 << 27) - 1) & (value)) << 0) + +/***Mailbox CPU Mask 10 Register***/ +#define DANUBE_MBC_MBC_MSK10 ((volatile u32*)(DANUBE_MBC+ 0x0090)) +#define DANUBE_MBC_MBC_MSK10_B3DA (1 << 31) +#define DANUBE_MBC_MBC_MSK10_B2DA (1 << 30) +#define DANUBE_MBC_MBC_MSK10_B1E (1 << 29) +#define DANUBE_MBC_MBC_MSK10_B0E (1 << 28) +#define DANUBE_MBC_MBC_MSK10_WDT (1 << 27) +#define DANUBE_MBC_MBC_MSK10_DS260 (value) (((( 1 << 27) - 1) & (value)) << 0) + +/***Mailbox CPU Short Command Register***/ +#define DANUBE_MBC_MBC_CMD ((volatile u32*)(DANUBE_MBC+ 0x0094)) +#define DANUBE_MBC_MBC_CMD_CS270 (value) (((( 1 << 28) - 1) & (value)) << 0) + +/***Mailbox CPU Input Data of Buffer 0***/ +#define DANUBE_MBC_MBC_ID0 ((volatile u32*)(DANUBE_MBC+ 0x0000)) +#define DANUBE_MBC_MBC_ID0_INDATA + +/***Mailbox CPU Input Data of Buffer 1***/ +#define DANUBE_MBC_MBC_ID1 ((volatile u32*)(DANUBE_MBC+ 0x0020)) +#define DANUBE_MBC_MBC_ID1_INDATA + +/***Mailbox CPU Output Data of Buffer 2***/ +#define DANUBE_MBC_MBC_OD2 ((volatile u32*)(DANUBE_MBC+ 0x0040)) +#define DANUBE_MBC_MBC_OD2_OUTDATA + +/***Mailbox CPU Output Data of Buffer 3***/ +#define DANUBE_MBC_MBC_OD3 ((volatile u32*)(DANUBE_MBC+ 0x0060)) +#define DANUBE_MBC_MBC_OD3_OUTDATA + +/***Mailbox CPU Control Register of Buffer 0***/ +#define DANUBE_MBC_MBC_CR0 ((volatile u32*)(DANUBE_MBC+ 0x0004)) +#define DANUBE_MBC_MBC_CR0_RDYABTFLS (value) (((( 1 << 3) - 1) & (value)) << 0) + +/***Mailbox CPU Control Register of Buffer 1***/ +#define DANUBE_MBC_MBC_CR1 ((volatile u32*)(DANUBE_MBC+ 0x0024)) +#define DANUBE_MBC_MBC_CR1_RDYABTFLS (value) (((( 1 << 3) - 1) & (value)) << 0) + +/***Mailbox CPU Control Register of Buffer 2***/ +#define DANUBE_MBC_MBC_CR2 ((volatile u32*)(DANUBE_MBC+ 0x0044)) +#define DANUBE_MBC_MBC_CR2_RDYABTFLS (value) (((( 1 << 3) - 1) & (value)) << 0) + +/***Mailbox CPU Control Register of Buffer 3***/ +#define DANUBE_MBC_MBC_CR3 ((volatile u32*)(DANUBE_MBC+ 0x0064)) +#define DANUBE_MBC_MBC_CR3_RDYABTFLS (value) (((( 1 << 3) - 1) & (value)) << 0) + +/***Mailbox CPU Free Space of Buffer 0***/ +#define DANUBE_MBC_MBC_FS0 ((volatile u32*)(DANUBE_MBC+ 0x0008)) +#define DANUBE_MBC_MBC_FS0_FS + +/***Mailbox CPU Free Space of Buffer 1***/ +#define DANUBE_MBC_MBC_FS1 ((volatile u32*)(DANUBE_MBC+ 0x0028)) +#define DANUBE_MBC_MBC_FS1_FS + +/***Mailbox CPU Free Space of Buffer 2***/ +#define DANUBE_MBC_MBC_FS2 ((volatile u32*)(DANUBE_MBC+ 0x0048)) +#define DANUBE_MBC_MBC_FS2_FS + +/***Mailbox CPU Free Space of Buffer 3***/ +#define DANUBE_MBC_MBC_FS3 ((volatile u32*)(DANUBE_MBC+ 0x0068)) +#define DANUBE_MBC_MBC_FS3_FS + +/***Mailbox CPU Data Available in Buffer 0***/ +#define DANUBE_MBC_MBC_DA0 ((volatile u32*)(DANUBE_MBC+ 0x000C)) +#define DANUBE_MBC_MBC_DA0_DA + +/***Mailbox CPU Data Available in Buffer 1***/ +#define DANUBE_MBC_MBC_DA1 ((volatile u32*)(DANUBE_MBC+ 0x002C)) +#define DANUBE_MBC_MBC_DA1_DA + +/***Mailbox CPU Data Available in Buffer 2***/ +#define DANUBE_MBC_MBC_DA2 ((volatile u32*)(DANUBE_MBC+ 0x004C)) +#define DANUBE_MBC_MBC_DA2_DA + +/***Mailbox CPU Data Available in Buffer 3***/ +#define DANUBE_MBC_MBC_DA3 ((volatile u32*)(DANUBE_MBC+ 0x006C)) +#define DANUBE_MBC_MBC_DA3_DA + +/***Mailbox CPU Input Absolute Pointer of Buffer 0***/ +#define DANUBE_MBC_MBC_IABS0 ((volatile u32*)(DANUBE_MBC+ 0x0010)) +#define DANUBE_MBC_MBC_IABS0_IABS + +/***Mailbox CPU Input Absolute Pointer of Buffer 1***/ +#define DANUBE_MBC_MBC_IABS1 ((volatile u32*)(DANUBE_MBC+ 0x0030)) +#define DANUBE_MBC_MBC_IABS1_IABS + +/***Mailbox CPU Input Absolute Pointer of Buffer 2***/ +#define DANUBE_MBC_MBC_IABS2 ((volatile u32*)(DANUBE_MBC+ 0x0050)) +#define DANUBE_MBC_MBC_IABS2_IABS + +/***Mailbox CPU Input Absolute Pointer of Buffer 3***/ +#define DANUBE_MBC_MBC_IABS3 ((volatile u32*)(DANUBE_MBC+ 0x0070)) +#define DANUBE_MBC_MBC_IABS3_IABS + +/***Mailbox CPU Input Temporary Pointer of Buffer 0***/ +#define DANUBE_MBC_MBC_ITMP0 ((volatile u32*)(DANUBE_MBC+ 0x0014)) +#define DANUBE_MBC_MBC_ITMP0_ITMP + +/***Mailbox CPU Input Temporary Pointer of Buffer 1***/ +#define DANUBE_MBC_MBC_ITMP1 ((volatile u32*)(DANUBE_MBC+ 0x0034)) +#define DANUBE_MBC_MBC_ITMP1_ITMP + +/***Mailbox CPU Input Temporary Pointer of Buffer 2***/ +#define DANUBE_MBC_MBC_ITMP2 ((volatile u32*)(DANUBE_MBC+ 0x0054)) +#define DANUBE_MBC_MBC_ITMP2_ITMP + +/***Mailbox CPU Input Temporary Pointer of Buffer 3***/ +#define DANUBE_MBC_MBC_ITMP3 ((volatile u32*)(DANUBE_MBC+ 0x0074)) +#define DANUBE_MBC_MBC_ITMP3_ITMP + +/***Mailbox CPU Output Absolute Pointer of Buffer 0***/ +#define DANUBE_MBC_MBC_OABS0 ((volatile u32*)(DANUBE_MBC+ 0x0018)) +#define DANUBE_MBC_MBC_OABS0_OABS + +/***Mailbox CPU Output Absolute Pointer of Buffer 1***/ +#define DANUBE_MBC_MBC_OABS1 ((volatile u32*)(DANUBE_MBC+ 0x0038)) +#define DANUBE_MBC_MBC_OABS1_OABS + +/***Mailbox CPU Output Absolute Pointer of Buffer 2***/ +#define DANUBE_MBC_MBC_OABS2 ((volatile u32*)(DANUBE_MBC+ 0x0058)) +#define DANUBE_MBC_MBC_OABS2_OABS + +/***Mailbox CPU Output Absolute Pointer of Buffer 3***/ +#define DANUBE_MBC_MBC_OABS3 ((volatile u32*)(DANUBE_MBC+ 0x0078)) +#define DANUBE_MBC_MBC_OABS3_OABS + +/***Mailbox CPU Output Temporary Pointer of Buffer 0***/ +#define DANUBE_MBC_MBC_OTMP0 ((volatile u32*)(DANUBE_MBC+ 0x001C)) +#define DANUBE_MBC_MBC_OTMP0_OTMP + +/***Mailbox CPU Output Temporary Pointer of Buffer 1***/ +#define DANUBE_MBC_MBC_OTMP1 ((volatile u32*)(DANUBE_MBC+ 0x003C)) +#define DANUBE_MBC_MBC_OTMP1_OTMP + +/***Mailbox CPU Output Temporary Pointer of Buffer 2***/ +#define DANUBE_MBC_MBC_OTMP2 ((volatile u32*)(DANUBE_MBC+ 0x005C)) +#define DANUBE_MBC_MBC_OTMP2_OTMP + +/***Mailbox CPU Output Temporary Pointer of Buffer 3***/ +#define DANUBE_MBC_MBC_OTMP3 ((volatile u32*)(DANUBE_MBC+ 0x007C)) +#define DANUBE_MBC_MBC_OTMP3_OTMP + +/***DSP Control Register***/ +#define DANUBE_MBC_DCTRL ((volatile u32*)(DANUBE_MBC+ 0x00A0)) +#define DANUBE_MBC_DCTRL_BA (1 << 0) +#define DANUBE_MBC_DCTRL_BMOD (value) (((( 1 << 3) - 1) & (value)) << 1) +#define DANUBE_MBC_DCTRL_IDL (1 << 4) +#define DANUBE_MBC_DCTRL_RES (1 << 15) + +/***DSP Status Register***/ +#define DANUBE_MBC_DSTA ((volatile u32*)(DANUBE_MBC+ 0x00A4)) +#define DANUBE_MBC_DSTA_IDLE (1 << 0) +#define DANUBE_MBC_DSTA_PD (1 << 1) + +/***DSP Test 1 Register***/ +#define DANUBE_MBC_DTST1 ((volatile u32*)(DANUBE_MBC+ 0x00A8)) +#define DANUBE_MBC_DTST1_ABORT (1 << 0) +#define DANUBE_MBC_DTST1_HWF32 (1 << 1) +#define DANUBE_MBC_DTST1_HWF4M (1 << 2) +#define DANUBE_MBC_DTST1_HWFOP (1 << 3) + + +/***********************************************************************/ +/* Module : SSC1 register address and bits */ +/***********************************************************************/ +#define DANUBE_SSC1 (KSEG1+0x1e100800) +/***********************************************************************/ +/***SSC Clock Control Register***/ +#define DANUBE_SSC_CLC (0x0000) +#define DANUBE_SSC_CLC_RMC(value) (((( 1 << 8) - 1) & (value)) << 8) +#define DANUBE_SSC_CLC_DISS (1 << 1) +#define DANUBE_SSC_CLC_DISR (1 << 0) +/***SSC Port Input Selection Register***/ +#define DANUBE_SSC_PISEL (0x0004) +/***SSC Identification Register***/ +#define DANUBE_SSC_ID (0x0008) +/***Control Register (Programming Mode)***/ +#define DANUBE_SSC_CON (0x0010) +#define DANUBE_SSC_CON_RUEN (1 << 12) +#define DANUBE_SSC_CON_TUEN (1 << 11) +#define DANUBE_SSC_CON_AEN (1 << 10) +#define DANUBE_SSC_CON_REN (1 << 9) +#define DANUBE_SSC_CON_TEN (1 << 8) +#define DANUBE_SSC_CON_LB (1 << 7) +#define DANUBE_SSC_CON_PO (1 << 6) +#define DANUBE_SSC_CON_PH (1 << 5) +#define DANUBE_SSC_CON_HB (1 << 4) +#define DANUBE_SSC_CON_BM(value) (((( 1 << 5) - 1) & (value)) << 16) +#define DANUBE_SSC_CON_RX_OFF (1 << 1) +#define DANUBE_SSC_CON_TX_OFF (1 << 0) +/***SCC Status Register***/ +#define DANUBE_SSC_STATE (0x0014) +#define DANUBE_SSC_STATE_EN (1 << 0) +#define DANUBE_SSC_STATE_MS (1 << 1) +#define DANUBE_SSC_STATE_BSY (1 << 13) +#define DANUBE_SSC_STATE_RUE (1 << 12) +#define DANUBE_SSC_STATE_TUE (1 << 11) +#define DANUBE_SSC_STATE_AE (1 << 10) +#define DANUBE_SSC_STATE_RE (1 << 9) +#define DANUBE_SSC_STATE_TE (1 << 8) +#define DANUBE_SSC_STATE_BC(value) (((( 1 << 5) - 1) & (value)) << 16) +/***SSC Write Hardware Modified Control Register***/ +#define DANUBE_SSC_WHBSTATE ( 0x0018) +#define DANUBE_SSC_WHBSTATE_SETBE (1 << 15) +#define DANUBE_SSC_WHBSTATE_SETPE (1 << 14) +#define DANUBE_SSC_WHBSTATE_SETRE (1 << 13) +#define DANUBE_SSC_WHBSTATE_SETTE (1 << 12) +#define DANUBE_SSC_WHBSTATE_CLRBE (1 << 11) +#define DANUBE_SSC_WHBSTATE_CLRPE (1 << 10) +#define DANUBE_SSC_WHBSTATE_CLRRE (1 << 9) +#define DANUBE_SSC_WHBSTATE_CLRTE (1 << 8) +/***SSC Transmitter Buffer Register***/ +#define DANUBE_SSC_TB (0x0020) +#define DANUBE_SSC_TB_TB_VALUE(value) (((( 1 << 16) - 1) & (value)) << 0) +/***SSC Receiver Buffer Register***/ +#define DANUBE_SSC_RB (0x0024) +#define DANUBE_SSC_RB_RB_VALUE(value) (((( 1 << 16) - 1) & (value)) << 0) +/***SSC Receive FIFO Control Register***/ +#define DANUBE_SSC_RXFCON (0x0030) +#define DANUBE_SSC_RXFCON_RXFITL(value) (((( 1 << 6) - 1) & (value)) << 8) +#define DANUBE_SSC_RXFCON_RXTMEN (1 << 2) +#define DANUBE_SSC_RXFCON_RXFLU (1 << 1) +#define DANUBE_SSC_RXFCON_RXFEN (1 << 0) +/***SSC Transmit FIFO Control Register***/ +#define DANUBE_SSC_TXFCON ( 0x0034) +#define DANUBE_SSC_TXFCON_RXFITL(value) (((( 1 << 6) - 1) & (value)) << 8) +#define DANUBE_SSC_TXFCON_TXTMEN (1 << 2) +#define DANUBE_SSC_TXFCON_TXFLU (1 << 1) +#define DANUBE_SSC_TXFCON_TXFEN (1 << 0) +/***SSC FIFO Status Register***/ +#define DANUBE_SSC_FSTAT (0x0038) +#define DANUBE_SSC_FSTAT_TXFFL(value) (((( 1 << 6) - 1) & (value)) << 8) +#define DANUBE_SSC_FSTAT_RXFFL(value) (((( 1 << 6) - 1) & (value)) << 0) +/***SSC Baudrate Timer Reload Register***/ +#define DANUBE_SSC_BR (0x0040) +#define DANUBE_SSC_BR_BR_VALUE(value) (((( 1 << 16) - 1) & (value)) << 0) +#define DANUBE_SSC_BRSTAT (0x0044) +#define DANUBE_SSC_SFCON (0x0060) +#define DANUBE_SSC_SFSTAT (0x0064) +#define DANUBE_SSC_GPOCON (0x0070) +#define DANUBE_SSC_GPOSTAT (0x0074) +#define DANUBE_SSC_WHBGPOSTAT (0x0078) +#define DANUBE_SSC_RXREQ (0x0080) +#define DANUBE_SSC_RXCNT (0x0084) +/*DMA Registers in Bus Clock Domain*/ +#define DANUBE_SSC_DMA_CON (0x00EC) +/*interrupt Node Registers in Bus Clock Domain*/ +#define DANUBE_SSC_IRNEN (0x00F4) +#define DANUBE_SSC_IRNCR (0x00F8) +#define DANUBE_SSC_IRNICR (0x00FC) +#define DANUBE_SSC_IRN_FIR 0x8 +#define DANUBE_SSC_IRN_EIR 0x4 +#define DANUBE_SSC_IRN_RIR 0x2 +#define DANUBE_SSC_IRN_TIR 0x1 + + +#define DANUBE_SSC1_CLC ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_CLC)) +#define DANUBE_SSC1_ID ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_ID)) +#define DANUBE_SSC1_CON ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_CON)) +#define DANUBE_SSC1_STATE ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_STATE)) +#define DANUBE_SSC1_WHBSTATE ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_WHBSTATE)) +#define DANUBE_SSC1_TB ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_TB)) +#define DANUBE_SSC1_RB ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_RB)) +#define DANUBE_SSC1_FSTAT ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_FSTAT)) +#define DANUBE_SSC1_PISEL ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_PISEL)) +#define DANUBE_SSC1_RXFCON ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_RXFCON)) +#define DANUBE_SSC1_TXFCON ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_TXFCON)) +#define DANUBE_SSC1_BR ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_BR)) +#define DANUBE_SSC1_BRSTAT ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_BRSTAT)) +#define DANUBE_SSC1_SFCON ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_SFCON)) +#define DANUBE_SSC1_SFSTAT ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_SFSTAT)) +#define DANUBE_SSC1_GPOCON ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_GPOCON)) +#define DANUBE_SSC1_GPOSTAT ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_GPOSTAT)) +#define DANUBE_SSC1_WHBGPOSTAT ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_WHBGPOSTAT)) +#define DANUBE_SSC1_RXREQ ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_RXREQ)) +#define DANUBE_SSC1_RXCNT ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_RXCNT)) +#define DANUBE_SSC1_DMA_CON ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_DMA_CON)) +#define DANUBE_SSC1_IRNEN ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_IRNEN)) +#define DANUBE_SSC1_IRNICR ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_IRNICR)) +#define DANUBE_SSC1_IRNCR ((volatile u32*)(DANUBE_SSC1+DANUBE_SSC_IRNCR)) + +/***********************************************************************/ +/* Module : GPIO register address and bits */ +/***********************************************************************/ +#define DANUBE_GPIO (0xBE100B00) +/***Port 0 Data Output Register (0010H)***/ +#define DANUBE_GPIO_P0_OUT ((volatile u32 *)(DANUBE_GPIO+ 0x0010)) +/***Port 1 Data Output Register (0040H)***/ +#define DANUBE_GPIO_P1_OUT ((volatile u32 *)(DANUBE_GPIO+ 0x0040)) +/***Port 0 Data Input Register (0014H)***/ +#define DANUBE_GPIO_P0_IN ((volatile u32 *)(DANUBE_GPIO+ 0x0014)) +/***Port 1 Data Input Register (0044H)***/ +#define DANUBE_GPIO_P1_IN ((volatile u32 *)(DANUBE_GPIO+ 0x0044)) +/***Port 0 Direction Register (0018H)***/ +#define DANUBE_GPIO_P0_DIR ((volatile u32 *)(DANUBE_GPIO+ 0x0018)) +/***Port 1 Direction Register (0048H)***/ +#define DANUBE_GPIO_P1_DIR ((volatile u32 *)(DANUBE_GPIO+ 0x0048)) +/***Port 0 Alternate Function Select Register 0 (001C H) ***/ +#define DANUBE_GPIO_P0_ALTSEL0 ((volatile u32 *)(DANUBE_GPIO+ 0x001C)) +/***Port 1 Alternate Function Select Register 0 (004C H) ***/ +#define DANUBE_GPIO_P1_ALTSEL0 ((volatile u32 *)(DANUBE_GPIO+ 0x004C)) +/***Port 0 Alternate Function Select Register 1 (0020 H) ***/ +#define DANUBE_GPIO_P0_ALTSEL1 ((volatile u32 *)(DANUBE_GPIO+ 0x0020)) +/***Port 1 Alternate Function Select Register 0 (0050 H) ***/ +#define DANUBE_GPIO_P1_ALTSEL1 ((volatile u32 *)(DANUBE_GPIO+ 0x0050)) +/***Port 0 Open Drain Control Register (0024H)***/ +#define DANUBE_GPIO_P0_OD ((volatile u32 *)(DANUBE_GPIO+ 0x0024)) +/***Port 1 Open Drain Control Register (0054H)***/ +#define DANUBE_GPIO_P1_OD ((volatile u32 *)(DANUBE_GPIO+ 0x0054)) +/***Port 0 Input Schmitt-Trigger Off Register (0028 H) ***/ +#define DANUBE_GPIO_P0_STOFF ((volatile u32 *)(DANUBE_GPIO+ 0x0028)) +/***Port 1 Input Schmitt-Trigger Off Register (0058 H) ***/ +#define DANUBE_GPIO_P1_STOFF ((volatile u32 *)(DANUBE_GPIO+ 0x0058)) +/***Port 0 Pull Up/Pull Down Select Register (002C H)***/ +#define DANUBE_GPIO_P0_PUDSEL ((volatile u32 *)(DANUBE_GPIO+ 0x002C)) +/***Port 1 Pull Up/Pull Down Select Register (005C H)***/ +#define DANUBE_GPIO_P1_PUDSEL ((volatile u32 *)(DANUBE_GPIO+ 0x005C)) +/***Port 0 Pull Up Device Enable Register (0030 H)***/ +#define DANUBE_GPIO_P0_PUDEN ((volatile u32 *)(DANUBE_GPIO+ 0x0030)) +/***Port 1 Pull Up Device Enable Register (0060 H)***/ +#define DANUBE_GPIO_P1_PUDEN ((volatile u32 *)(DANUBE_GPIO+ 0x0060)) +/***********************************************************************/ +/* Module : CGU register address and bits */ +/***********************************************************************/ + +#define DANUBE_CGU (0xBF103000) +/***********************************************************************/ + +/***CGU Clock PLL0 ***/ +#define DANUBE_CGU_PLL0_CFG ((volatile u32*)(DANUBE_CGU+ 0x0004)) +/***CGU Clock PLL1 ***/ +#define DANUBE_CGU_PLL1_CFG ((volatile u32*)(DANUBE_CGU+ 0x0008)) +/***CGU Clock SYS Mux Register***/ +#define DANUBE_CGU_SYS ((volatile u32*)(DANUBE_CGU+ 0x0010)) +/***CGU Interface Clock Control Register***/ +#define DANUBE_CGU_IFCCR ((volatile u32*)(DANUBE_CGU+ 0x0018)) +/***CGU PCI Clock Control Register**/ +#define DANUBE_CGU_PCICR ((volatile u32*)(DANUBE_CGU+ 0x0034)) + + +/***********************************************************************/ +/* Module : PCI register address and bits */ +/***********************************************************************/ +#define PCI_CR_PR_OFFSET 0xBE105400 +#define PCI_CR_CLK_CTRL_REG (PCI_CR_PR_OFFSET + 0x0000) + +#define PCI_CR_PCI_ID_REG (PCI_CR_PR_OFFSET + 0x0004) +#define PCI_CR_SFT_RST_REG (PCI_CR_PR_OFFSET + 0x0010) +#define PCI_CR_PCI_FPI_ERR_ADDR_REG (PCI_CR_PR_OFFSET + 0x0014) +#define PCI_CR_FCI_PCI_ERR_ADDR_REG (PCI_CR_PR_OFFSET + 0x0018) +#define PCI_CR_FPI_ERR_TAG_REG (PCI_CR_PR_OFFSET + 0x001C) +#define PCI_CR_PCI_IRR_REG (PCI_CR_PR_OFFSET + 0x0020) +#define PCI_CR_PCI_IRA_REG (PCI_CR_PR_OFFSET + 0x0024) +#define PCI_CR_PCI_IRM_REG (PCI_CR_PR_OFFSET + 0x0028) +#define PCI_CR_PCI_EOI_REG (PCI_CR_PR_OFFSET + 0x002C) +#define PCI_CR_PCI_MOD_REG (PCI_CR_PR_OFFSET + 0x0030) +#define PCI_CR_DV_ID_REG (PCI_CR_PR_OFFSET + 0x0034) +#define PCI_CR_SUBSYS_ID_REG (PCI_CR_PR_OFFSET + 0x0038) +#define PCI_CR_PCI_PM_REG (PCI_CR_PR_OFFSET + 0x003C) +#define PCI_CR_CLASS_CODE1_REG (PCI_CR_PR_OFFSET + 0x0040) +#define PCI_CR_BAR11MASK_REG (PCI_CR_PR_OFFSET + 0x0044) +#define PCI_CR_BAR12MASK_REG (PCI_CR_PR_OFFSET + 0x0048) +#define PCI_CR_BAR13MASK_REG (PCI_CR_PR_OFFSET + 0x004C) +#define PCI_CR_BAR14MASK_REG (PCI_CR_PR_OFFSET + 0x0050) +#define PCI_CR_BAR15MASK_REG (PCI_CR_PR_OFFSET + 0x0054) +#define PCI_CR_BAR16MASK_REG (PCI_CR_PR_OFFSET + 0x0058) +#define PCI_CR_CIS_PT1_REG (PCI_CR_PR_OFFSET + 0x005C) +#define PCI_CR_SUBSYS_ID1_REG (PCI_CR_PR_OFFSET + 0x0060) +#define PCI_CR_PCI_ADDR_MAP11_REG (PCI_CR_PR_OFFSET + 0x0064) +#define PCI_CR_PCI_ADDR_MAP12_REG (PCI_CR_PR_OFFSET + 0x0068) +#define PCI_CR_PCI_ADDR_MAP13_REG (PCI_CR_PR_OFFSET + 0x006C) +#define PCI_CR_PCI_ADDR_MAP14_REG (PCI_CR_PR_OFFSET + 0x0070) +#define PCI_CR_PCI_ADDR_MAP15_REG (PCI_CR_PR_OFFSET + 0x0074) +#define PCI_CR_PCI_ADDR_MAP16_REG (PCI_CR_PR_OFFSET + 0x0078) +#define PCI_CR_FPI_SEG_EN_REG (PCI_CR_PR_OFFSET + 0x007C) +#define PCI_CR_PC_ARB_REG (PCI_CR_PR_OFFSET + 0x0080) +#define PCI_CR_BAR21MASK_REG (PCI_CR_PR_OFFSET + 0x0084) +#define PCI_CR_BAR22MASK_REG (PCI_CR_PR_OFFSET + 0x0088) +#define PCI_CR_BAR23MASK_REG (PCI_CR_PR_OFFSET + 0x008C) +#define PCI_CR_BAR24MASK_REG (PCI_CR_PR_OFFSET + 0x0090) +#define PCI_CR_BAR25MASK_REG (PCI_CR_PR_OFFSET + 0x0094) +#define PCI_CR_BAR26MASK_REG (PCI_CR_PR_OFFSET + 0x0098) +#define PCI_CR_CIS_PT2_REG (PCI_CR_PR_OFFSET + 0x009C) +#define PCI_CR_SUBSYS_ID2_REG (PCI_CR_PR_OFFSET + 0x00A0) +#define PCI_CR_PCI_ADDR_MAP21_REG (PCI_CR_PR_OFFSET + 0x00A4) +#define PCI_CR_PCI_ADDR_MAP22_REG (PCI_CR_PR_OFFSET + 0x00A8) +#define PCI_CR_PCI_ADDR_MAP23_REG (PCI_CR_PR_OFFSET + 0x00AC) + + +/***********************************************************************/ +/* Module : MCD register address and bits */ +/***********************************************************************/ +#define DANUBE_MCD (KSEG1+0x1F106000) + +/***Manufacturer Identification Register***/ +#define DANUBE_MCD_MANID ((volatile u32*)(DANUBE_MCD+ 0x0024)) +#define DANUBE_MCD_MANID_MANUF(value) (((( 1 << 11) - 1) & (value)) << 5) + +/***Chip Identification Register***/ +#define DANUBE_MCD_CHIPID ((volatile u32*)(DANUBE_MCD+ 0x0028)) +#define DANUBE_MCD_CHIPID_VERSION_GET(value) (((value) >> 28) & ((1 << 4) - 1)) +#define DANUBE_MCD_CHIPID_VERSION_SET(value) (((( 1 << 4) - 1) & (value)) << 28) +#define DANUBE_MCD_CHIPID_PART_NUMBER_GET(value) (((value) >> 12) & ((1 << 16) - 1)) +#define DANUBE_MCD_CHIPID_PART_NUMBER_SET(value) (((( 1 << 16) - 1) & (value)) << 12) +#define DANUBE_MCD_CHIPID_MANID_GET(value) (((value) >> 1) & ((1 << 11) - 1)) +#define DANUBE_MCD_CHIPID_MANID_SET(value) (((( 1 << 11) - 1) & (value)) << 1) + +#define DANUBE_CHIPID_STANDARD 0x00EB +#define DANUBE_CHIPID_YANGTSE 0x00ED + +/***Redesign Tracing Identification Register***/ +#define DANUBE_MCD_RTID ((volatile u32*)(DANUBE_MCD+ 0x002C)) +#define DANUBE_MCD_RTID_LC (1 << 15) +#define DANUBE_MCD_RTID_RIX(value) (((( 1 << 3) - 1) & (value)) << 0) + + +/***********************************************************************/ +/* Module : EBU register address and bits */ +/***********************************************************************/ + +#define DANUBE_EBU (0xBE105300) +#define EBU_NAND_CON (volatile u32*)(DANUBE_EBU + 0xB0) +#define EBU_NAND_WAIT (volatile u32*)(DANUBE_EBU + 0xB4) +#define EBU_NAND_ECC0 (volatile u32*)(DANUBE_EBU + 0xB8) +#define EBU_NAND_ECC_AC (volatile u32*)(DANUBE_EBU + 0xBC) + +/***********************************************************************/ + + +/***EBU Clock Control Register***/ +#define DANUBE_EBU_CLC ((volatile u32*)(DANUBE_EBU+ 0x0000)) +#define DANUBE_EBU_CLC_DISS (1 << 1) +#define DANUBE_EBU_CLC_DISR (1 << 0) + +/***EBU Global Control Register***/ +#define DANUBE_EBU_CON ((volatile u32*)(DANUBE_EBU+ 0x0010)) +#define DANUBE_EBU_CON_DTACS (value) (((( 1 << 3) - 1) & (value)) << 20) +#define DANUBE_EBU_CON_DTARW (value) (((( 1 << 3) - 1) & (value)) << 16) +#define DANUBE_EBU_CON_TOUTC (value) (((( 1 << 8) - 1) & (value)) << 8) +#define DANUBE_EBU_CON_ARBMODE (value) (((( 1 << 2) - 1) & (value)) << 6) +#define DANUBE_EBU_CON_ARBSYNC (1 << 5) +#define DANUBE_EBU_CON_1 (1 << 3) + +/***EBU Address Select Register 0***/ +#define DANUBE_EBU_ADDSEL0 ((volatile u32*)(DANUBE_EBU+ 0x0020)) +#define DANUBE_EBU_ADDSEL0_BASE (value) (((( 1 << 20) - 1) & (value)) << 12) +#define DANUBE_EBU_ADDSEL0_MASK (value) (((( 1 << 4) - 1) & (value)) << 4) +#define DANUBE_EBU_ADDSEL0_MIRRORE (1 << 1) +#define DANUBE_EBU_ADDSEL0_REGEN (1 << 0) + +/***EBU Address Select Register 1***/ +#define DANUBE_EBU_ADDSEL1 ((volatile u32*)(DANUBE_EBU+ 0x0024)) +#define DANUBE_EBU_ADDSEL1_BASE (value) (((( 1 << 20) - 1) & (value)) << 12) +#define DANUBE_EBU_ADDSEL1_MASK (value) (((( 1 << 4) - 1) & (value)) << 4) +#define DANUBE_EBU_ADDSEL1_MIRRORE (1 << 1) +#define DANUBE_EBU_ADDSEL1_REGEN (1 << 0) + +/***EBU Address Select Register 2***/ +#define DANUBE_EBU_ADDSEL2 ((volatile u32*)(DANUBE_EBU+ 0x0028)) +#define DANUBE_EBU_ADDSEL2_BASE (value) (((( 1 << 20) - 1) & (value)) << 12) +#define DANUBE_EBU_ADDSEL2_MASK (value) (((( 1 << 4) - 1) & (value)) << 4) +#define DANUBE_EBU_ADDSEL2_MIRRORE (1 << 1) +#define DANUBE_EBU_ADDSEL2_REGEN (1 << 0) + +/***EBU Address Select Register 3***/ +#define DANUBE_EBU_ADDSEL3 ((volatile u32*)(DANUBE_EBU+ 0x002C)) +#define DANUBE_EBU_ADDSEL3_BASE (value) (((( 1 << 20) - 1) & (value)) << 12) +#define DANUBE_EBU_ADDSEL3_MASK (value) (((( 1 << 4) - 1) & (value)) << 4) +#define DANUBE_EBU_ADDSEL3_MIRRORE (1 << 1) +#define DANUBE_EBU_ADDSEL3_REGEN (1 << 0) + +/***EBU Bus Configuration Register 0***/ +#define DANUBE_EBU_BUSCON0 ((volatile u32*)(DANUBE_EBU+ 0x0060)) +#define DANUBE_EBU_BUSCON0_WRDIS (1 << 31) +#define DANUBE_EBU_BUSCON0_ALEC (value) (((( 1 << 2) - 1) & (value)) << 29) +#define DANUBE_EBU_BUSCON0_BCGEN (value) (((( 1 << 2) - 1) & (value)) << 27) +#define DANUBE_EBU_BUSCON0_AGEN (value) (((( 1 << 2) - 1) & (value)) << 24) +#define DANUBE_EBU_BUSCON0_CMULTR (value) (((( 1 << 2) - 1) & (value)) << 22) +#define DANUBE_EBU_BUSCON0_WAIT (value) (((( 1 << 2) - 1) & (value)) << 20) +#define DANUBE_EBU_BUSCON0_WAITINV (1 << 19) +#define DANUBE_EBU_BUSCON0_SETUP (1 << 18) +#define DANUBE_EBU_BUSCON0_PORTW (value) (((( 1 << 2) - 1) & (value)) << 16) +#define DANUBE_EBU_BUSCON0_WAITRDC (value) (((( 1 << 7) - 1) & (value)) << 9) +#define DANUBE_EBU_BUSCON0_WAITWRC (value) (((( 1 << 3) - 1) & (value)) << 6) +#define DANUBE_EBU_BUSCON0_HOLDC (value) (((( 1 << 2) - 1) & (value)) << 4) +#define DANUBE_EBU_BUSCON0_RECOVC (value) (((( 1 << 2) - 1) & (value)) << 2) +#define DANUBE_EBU_BUSCON0_CMULT (value) (((( 1 << 2) - 1) & (value)) << 0) + +/***EBU Bus Configuration Register 1***/ +#define DANUBE_EBU_BUSCON1 ((volatile u32*)(DANUBE_EBU+ 0x0064)) +#define DANUBE_EBU_BUSCON1_WRDIS (1 << 31) +#define DANUBE_EBU_BUSCON1_ALEC (value) (((( 1 << 2) - 1) & (value)) << 29) +#define DANUBE_EBU_BUSCON1_BCGEN (value) (((( 1 << 2) - 1) & (value)) << 27) +#define DANUBE_EBU_BUSCON1_AGEN (value) (((( 1 << 2) - 1) & (value)) << 24) +#define DANUBE_EBU_BUSCON1_CMULTR (value) (((( 1 << 2) - 1) & (value)) << 22) +#define DANUBE_EBU_BUSCON1_WAIT (value) (((( 1 << 2) - 1) & (value)) << 20) +#define DANUBE_EBU_BUSCON1_WAITINV (1 << 19) +#define DANUBE_EBU_BUSCON1_SETUP (1 << 18) +#define DANUBE_EBU_BUSCON1_PORTW (value) (((( 1 << 2) - 1) & (value)) << 16) +#define DANUBE_EBU_BUSCON1_WAITRDC (value) (((( 1 << 7) - 1) & (value)) << 9) +#define DANUBE_EBU_BUSCON1_WAITWRC (value) (((( 1 << 3) - 1) & (value)) << 6) +#define DANUBE_EBU_BUSCON1_HOLDC (value) (((( 1 << 2) - 1) & (value)) << 4) +#define DANUBE_EBU_BUSCON1_RECOVC (value) (((( 1 << 2) - 1) & (value)) << 2) +#define DANUBE_EBU_BUSCON1_CMULT (value) (((( 1 << 2) - 1) & (value)) << 0) + +/***EBU Bus Configuration Register 2***/ +#define DANUBE_EBU_BUSCON2 ((volatile u32*)(DANUBE_EBU+ 0x0068)) +#define DANUBE_EBU_BUSCON2_WRDIS (1 << 31) +#define DANUBE_EBU_BUSCON2_ALEC (value) (((( 1 << 2) - 1) & (value)) << 29) +#define DANUBE_EBU_BUSCON2_BCGEN (value) (((( 1 << 2) - 1) & (value)) << 27) +#define DANUBE_EBU_BUSCON2_AGEN (value) (((( 1 << 2) - 1) & (value)) << 24) +#define DANUBE_EBU_BUSCON2_CMULTR (value) (((( 1 << 2) - 1) & (value)) << 22) +#define DANUBE_EBU_BUSCON2_WAIT (value) (((( 1 << 2) - 1) & (value)) << 20) +#define DANUBE_EBU_BUSCON2_WAITINV (1 << 19) +#define DANUBE_EBU_BUSCON2_SETUP (1 << 18) +#define DANUBE_EBU_BUSCON2_PORTW (value) (((( 1 << 2) - 1) & (value)) << 16) +#define DANUBE_EBU_BUSCON2_WAITRDC (value) (((( 1 << 7) - 1) & (value)) << 9) +#define DANUBE_EBU_BUSCON2_WAITWRC (value) (((( 1 << 3) - 1) & (value)) << 6) +#define DANUBE_EBU_BUSCON2_HOLDC (value) (((( 1 << 2) - 1) & (value)) << 4) +#define DANUBE_EBU_BUSCON2_RECOVC (value) (((( 1 << 2) - 1) & (value)) << 2) +#define DANUBE_EBU_BUSCON2_CMULT (value) (((( 1 << 2) - 1) & (value)) << 0) + +/***********************************************************************/ +/* Module : SDRAM register address and bits */ +/***********************************************************************/ + +#define DANUBE_SDRAM (0xBF800000) +/***********************************************************************/ + + +/***MC Access Error Cause Register***/ +#define DANUBE_SDRAM_MC_ERRCAUSE ((volatile u32*)(DANUBE_SDRAM+ 0x0100)) +#define DANUBE_SDRAM_MC_ERRCAUSE_ERR (1 << 31) +#define DANUBE_SDRAM_MC_ERRCAUSE_PORT (value) (((( 1 << 4) - 1) & (value)) << 16) +#define DANUBE_SDRAM_MC_ERRCAUSE_CAUSE (value) (((( 1 << 2) - 1) & (value)) << 0) +#define DANUBE_SDRAM_MC_ERRCAUSE_Res (value) (((( 1 << NaN) - 1) & (value)) << NaN) + +/***MC Access Error Address Register***/ +#define DANUBE_SDRAM_MC_ERRADDR ((volatile u32*)(DANUBE_SDRAM+ 0x0108)) +#define DANUBE_SDRAM_MC_ERRADDR_ADDR + +/***MC I/O General Purpose Register***/ +#define DANUBE_SDRAM_MC_IOGP ((volatile u32*)(DANUBE_SDRAM+ 0x0800)) +#define DANUBE_SDRAM_MC_IOGP_GPR6 (value) (((( 1 << 4) - 1) & (value)) << 28) +#define DANUBE_SDRAM_MC_IOGP_GPR5 (value) (((( 1 << 4) - 1) & (value)) << 24) +#define DANUBE_SDRAM_MC_IOGP_GPR4 (value) (((( 1 << 4) - 1) & (value)) << 20) +#define DANUBE_SDRAM_MC_IOGP_GPR3 (value) (((( 1 << 4) - 1) & (value)) << 16) +#define DANUBE_SDRAM_MC_IOGP_GPR2 (value) (((( 1 << 4) - 1) & (value)) << 12) +#define DANUBE_SDRAM_MC_IOGP_CPS (1 << 11) +#define DANUBE_SDRAM_MC_IOGP_CLKDELAY (value) (((( 1 << 3) - 1) & (value)) << 8) +#define DANUBE_SDRAM_MC_IOGP_CLKRAT (value) (((( 1 << 4) - 1) & (value)) << 4) +#define DANUBE_SDRAM_MC_IOGP_RDDEL (value) (((( 1 << 4) - 1) & (value)) << 0) + +/***MC Self Refresh Register***/ +#define DANUBE_SDRAM_MC_SELFRFSH ((volatile u32*)(DANUBE_SDRAM+ 0x0A00)) +#define DANUBE_SDRAM_MC_SELFRFSH_PWDS (1 << 1) +#define DANUBE_SDRAM_MC_SELFRFSH_PWD (1 << 0) +#define DANUBE_SDRAM_MC_SELFRFSH_Res (value) (((( 1 << 30) - 1) & (value)) << 2) + +/***MC Enable Register***/ +#define DANUBE_SDRAM_MC_CTRLENA ((volatile u32*)(DANUBE_SDRAM+ 0x1000)) +#define DANUBE_SDRAM_MC_CTRLENA_ENA (1 << 0) +#define DANUBE_SDRAM_MC_CTRLENA_Res (value) (((( 1 << 31) - 1) & (value)) << 1) + +/***MC Mode Register Setup Code***/ +#define DANUBE_SDRAM_MC_MRSCODE ((volatile u32*)(DANUBE_SDRAM+ 0x1008)) +#define DANUBE_SDRAM_MC_MRSCODE_UMC (value) (((( 1 << 5) - 1) & (value)) << 7) +#define DANUBE_SDRAM_MC_MRSCODE_CL (value) (((( 1 << 3) - 1) & (value)) << 4) +#define DANUBE_SDRAM_MC_MRSCODE_WT (1 << 3) +#define DANUBE_SDRAM_MC_MRSCODE_BL (value) (((( 1 << 3) - 1) & (value)) << 0) + +/***MC Configuration Data-word Width Register***/ +#define DANUBE_SDRAM_MC_CFGDW ((volatile u32*)(DANUBE_SDRAM+ 0x1010)) +#define DANUBE_SDRAM_MC_CFGDW_DW (value) (((( 1 << 4) - 1) & (value)) << 0) +#define DANUBE_SDRAM_MC_CFGDW_Res (value) (((( 1 << 28) - 1) & (value)) << 4) + +/***MC Configuration Physical Bank 0 Register***/ +#define DANUBE_SDRAM_MC_CFGPB0 ((volatile u32*)(DANUBE_SDRAM+ 0x1018)) +#define DANUBE_SDRAM_MC_CFGPB0_MCSEN0 (value) (((( 1 << 4) - 1) & (value)) << 12) +#define DANUBE_SDRAM_MC_CFGPB0_BANKN0 (value) (((( 1 << 4) - 1) & (value)) << 8) +#define DANUBE_SDRAM_MC_CFGPB0_ROWW0 (value) (((( 1 << 4) - 1) & (value)) << 4) +#define DANUBE_SDRAM_MC_CFGPB0_COLW0 (value) (((( 1 << 4) - 1) & (value)) << 0) +#define DANUBE_SDRAM_MC_CFGPB0_Res (value) (((( 1 << 16) - 1) & (value)) << 16) + +/***MC Latency Register***/ +#define DANUBE_SDRAM_MC_LATENCY ((volatile u32*)(DANUBE_SDRAM+ 0x1038)) +#define DANUBE_SDRAM_MC_LATENCY_TRP (value) (((( 1 << 4) - 1) & (value)) << 16) +#define DANUBE_SDRAM_MC_LATENCY_TRAS (value) (((( 1 << 4) - 1) & (value)) << 12) +#define DANUBE_SDRAM_MC_LATENCY_TRCD (value) (((( 1 << 4) - 1) & (value)) << 8) +#define DANUBE_SDRAM_MC_LATENCY_TDPL (value) (((( 1 << 4) - 1) & (value)) << 4) +#define DANUBE_SDRAM_MC_LATENCY_TDAL (value) (((( 1 << 4) - 1) & (value)) << 0) +#define DANUBE_SDRAM_MC_LATENCY_Res (value) (((( 1 << 12) - 1) & (value)) << 20) + +/***MC Refresh Cycle Time Register***/ +#define DANUBE_SDRAM_MC_TREFRESH ((volatile u32*)(DANUBE_SDRAM+ 0x1040)) +#define DANUBE_SDRAM_MC_TREFRESH_TREF (value) (((( 1 << 13) - 1) & (value)) << 0) +#define DANUBE_SDRAM_MC_TREFRESH_Res (value) (((( 1 << 19) - 1) & (value)) << 13) + + +/***********************************************************************/ +/* Module : GPTU register address and bits */ +/***********************************************************************/ + +#define DANUBE_GPTU (0xB8000300) +/***********************************************************************/ + + +/***GPT Clock Control Register***/ +#define DANUBE_GPTU_GPT_CLC ((volatile u32*)(DANUBE_GPTU+ 0x0000)) +#define DANUBE_GPTU_GPT_CLC_RMC (value) (((( 1 << 8) - 1) & (value)) << 8) +#define DANUBE_GPTU_GPT_CLC_DISS (1 << 1) +#define DANUBE_GPTU_GPT_CLC_DISR (1 << 0) + +/***GPT Timer 3 Control Register***/ +#define DANUBE_GPTU_GPT_T3CON ((volatile u32*)(DANUBE_GPTU+ 0x0014)) +#define DANUBE_GPTU_GPT_T3CON_T3RDIR (1 << 15) +#define DANUBE_GPTU_GPT_T3CON_T3CHDIR (1 << 14) +#define DANUBE_GPTU_GPT_T3CON_T3EDGE (1 << 13) +#define DANUBE_GPTU_GPT_T3CON_BPS1 (value) (((( 1 << 2) - 1) & (value)) << 11) +#define DANUBE_GPTU_GPT_T3CON_T3OTL (1 << 10) +#define DANUBE_GPTU_GPT_T3CON_T3UD (1 << 7) +#define DANUBE_GPTU_GPT_T3CON_T3R (1 << 6) +#define DANUBE_GPTU_GPT_T3CON_T3M (value) (((( 1 << 3) - 1) & (value)) << 3) +#define DANUBE_GPTU_GPT_T3CON_T3I (value) (((( 1 << 3) - 1) & (value)) << 0) + +/***GPT Write Hardware Modified Timer 3 Control Register +If set and clear bit are written concurrently with 1, the associated bit is not changed.***/ +#define DANUBE_GPTU_GPT_WHBT3CON ((volatile u32*)(DANUBE_GPTU+ 0x004C)) +#define DANUBE_GPTU_GPT_WHBT3CON_SETT3CHDIR (1 << 15) +#define DANUBE_GPTU_GPT_WHBT3CON_CLRT3CHDIR (1 << 14) +#define DANUBE_GPTU_GPT_WHBT3CON_SETT3EDGE (1 << 13) +#define DANUBE_GPTU_GPT_WHBT3CON_CLRT3EDGE (1 << 12) +#define DANUBE_GPTU_GPT_WHBT3CON_SETT3OTL (1 << 11) +#define DANUBE_GPTU_GPT_WHBT3CON_CLRT3OTL (1 << 10) + +/***GPT Timer 2 Control Register***/ +#define DANUBE_GPTU_GPT_T2CON ((volatile u32*)(DANUBE_GPTU+ 0x0010)) +#define DANUBE_GPTU_GPT_T2CON_TxRDIR (1 << 15) +#define DANUBE_GPTU_GPT_T2CON_TxCHDIR (1 << 14) +#define DANUBE_GPTU_GPT_T2CON_TxEDGE (1 << 13) +#define DANUBE_GPTU_GPT_T2CON_TxIRDIS (1 << 12) +#define DANUBE_GPTU_GPT_T2CON_TxRC (1 << 9) +#define DANUBE_GPTU_GPT_T2CON_TxUD (1 << 7) +#define DANUBE_GPTU_GPT_T2CON_TxR (1 << 6) +#define DANUBE_GPTU_GPT_T2CON_TxM (value) (((( 1 << 3) - 1) & (value)) << 3) +#define DANUBE_GPTU_GPT_T2CON_TxI (value) (((( 1 << 3) - 1) & (value)) << 0) + +/***GPT Timer 4 Control Register***/ +#define DANUBE_GPTU_GPT_T4CON ((volatile u32*)(DANUBE_GPTU+ 0x0018)) +#define DANUBE_GPTU_GPT_T4CON_TxRDIR (1 << 15) +#define DANUBE_GPTU_GPT_T4CON_TxCHDIR (1 << 14) +#define DANUBE_GPTU_GPT_T4CON_TxEDGE (1 << 13) +#define DANUBE_GPTU_GPT_T4CON_TxIRDIS (1 << 12) +#define DANUBE_GPTU_GPT_T4CON_TxRC (1 << 9) +#define DANUBE_GPTU_GPT_T4CON_TxUD (1 << 7) +#define DANUBE_GPTU_GPT_T4CON_TxR (1 << 6) +#define DANUBE_GPTU_GPT_T4CON_TxM (value) (((( 1 << 3) - 1) & (value)) << 3) +#define DANUBE_GPTU_GPT_T4CON_TxI (value) (((( 1 << 3) - 1) & (value)) << 0) + +/***GPT Write HW Modified Timer 2 Control Register If set + and clear bit are written concurrently with 1, the associated bit is not changed.***/ +#define DANUBE_GPTU_GPT_WHBT2CON ((volatile u32*)(DANUBE_GPTU+ 0x0048)) +#define DANUBE_GPTU_GPT_WHBT2CON_SETTxCHDIR (1 << 15) +#define DANUBE_GPTU_GPT_WHBT2CON_CLRTxCHDIR (1 << 14) +#define DANUBE_GPTU_GPT_WHBT2CON_SETTxEDGE (1 << 13) +#define DANUBE_GPTU_GPT_WHBT2CON_CLRTxEDGE (1 << 12) + +/***GPT Write HW Modified Timer 4 Control Register If set + and clear bit are written concurrently with 1, the associated bit is not changed.***/ +#define DANUBE_GPTU_GPT_WHBT4CON ((volatile u32*)(DANUBE_GPTU+ 0x0050)) +#define DANUBE_GPTU_GPT_WHBT4CON_SETTxCHDIR (1 << 15) +#define DANUBE_GPTU_GPT_WHBT4CON_CLRTxCHDIR (1 << 14) +#define DANUBE_GPTU_GPT_WHBT4CON_SETTxEDGE (1 << 13) +#define DANUBE_GPTU_GPT_WHBT4CON_CLRTxEDGE (1 << 12) + +/***GPT Capture Reload Register***/ +#define DANUBE_GPTU_GPT_CAPREL ((volatile u32*)(DANUBE_GPTU+ 0x0030)) +#define DANUBE_GPTU_GPT_CAPREL_CAPREL (value) (((( 1 << 16) - 1) & (value)) << 0) + +/***GPT Timer 2 Register***/ +#define DANUBE_GPTU_GPT_T2 ((volatile u32*)(DANUBE_GPTU+ 0x0034)) +#define DANUBE_GPTU_GPT_T2_TVAL (value) (((( 1 << 16) - 1) & (value)) << 0) + +/***GPT Timer 3 Register***/ +#define DANUBE_GPTU_GPT_T3 ((volatile u32*)(DANUBE_GPTU+ 0x0038)) +#define DANUBE_GPTU_GPT_T3_TVAL (value) (((( 1 << 16) - 1) & (value)) << 0) + +/***GPT Timer 4 Register***/ +#define DANUBE_GPTU_GPT_T4 ((volatile u32*)(DANUBE_GPTU+ 0x003C)) +#define DANUBE_GPTU_GPT_T4_TVAL (value) (((( 1 << 16) - 1) & (value)) << 0) + +/***GPT Timer 5 Register***/ +#define DANUBE_GPTU_GPT_T5 ((volatile u32*)(DANUBE_GPTU+ 0x0040)) +#define DANUBE_GPTU_GPT_T5_TVAL (value) (((( 1 << 16) - 1) & (value)) << 0) + +/***GPT Timer 6 Register***/ +#define DANUBE_GPTU_GPT_T6 ((volatile u32*)(DANUBE_GPTU+ 0x0044)) +#define DANUBE_GPTU_GPT_T6_TVAL (value) (((( 1 << 16) - 1) & (value)) << 0) + +/***GPT Timer 6 Control Register***/ +#define DANUBE_GPTU_GPT_T6CON ((volatile u32*)(DANUBE_GPTU+ 0x0020)) +#define DANUBE_GPTU_GPT_T6CON_T6SR (1 << 15) +#define DANUBE_GPTU_GPT_T6CON_T6CLR (1 << 14) +#define DANUBE_GPTU_GPT_T6CON_BPS2 (value) (((( 1 << 2) - 1) & (value)) << 11) +#define DANUBE_GPTU_GPT_T6CON_T6OTL (1 << 10) +#define DANUBE_GPTU_GPT_T6CON_T6UD (1 << 7) +#define DANUBE_GPTU_GPT_T6CON_T6R (1 << 6) +#define DANUBE_GPTU_GPT_T6CON_T6M (value) (((( 1 << 3) - 1) & (value)) << 3) +#define DANUBE_GPTU_GPT_T6CON_T6I (value) (((( 1 << 3) - 1) & (value)) << 0) + +/***GPT Write HW Modified Timer 6 Control Register If set + and clear bit are written concurrently with 1, the associated bit is not changed.***/ +#define DANUBE_GPTU_GPT_WHBT6CON ((volatile u32*)(DANUBE_GPTU+ 0x0054)) +#define DANUBE_GPTU_GPT_WHBT6CON_SETT6OTL (1 << 11) +#define DANUBE_GPTU_GPT_WHBT6CON_CLRT6OTL (1 << 10) + +/***GPT Timer 5 Control Register***/ +#define DANUBE_GPTU_GPT_T5CON ((volatile u32*)(DANUBE_GPTU+ 0x001C)) +#define DANUBE_GPTU_GPT_T5CON_T5SC (1 << 15) +#define DANUBE_GPTU_GPT_T5CON_T5CLR (1 << 14) +#define DANUBE_GPTU_GPT_T5CON_CI (value) (((( 1 << 2) - 1) & (value)) << 12) +#define DANUBE_GPTU_GPT_T5CON_T5CC (1 << 11) +#define DANUBE_GPTU_GPT_T5CON_CT3 (1 << 10) +#define DANUBE_GPTU_GPT_T5CON_T5RC (1 << 9) +#define DANUBE_GPTU_GPT_T5CON_T5UDE (1 << 8) +#define DANUBE_GPTU_GPT_T5CON_T5UD (1 << 7) +#define DANUBE_GPTU_GPT_T5CON_T5R (1 << 6) +#define DANUBE_GPTU_GPT_T5CON_T5M (value) (((( 1 << 3) - 1) & (value)) << 3) +#define DANUBE_GPTU_GPT_T5CON_T5I (value) (((( 1 << 3) - 1) & (value)) << 0) + + +/***********************************************************************/ +/* Module : IOM register address and bits */ +/***********************************************************************/ + +#define DANUBE_IOM (0xBF105000) +/***********************************************************************/ + + +/***Receive FIFO***/ +#define DANUBE_IOM_RFIFO ((volatile u32*)(DANUBE_IOM+ 0x0000)) +#define DANUBE_IOM_RFIFO_RXD (value) (((( 1 << 8) - 1) & (value)) << 0) + +/***Transmit FIFO***/ +#define DANUBE_IOM_XFIFO ((volatile u32*)(DANUBE_IOM+ 0x0000)) +#define DANUBE_IOM_XFIFO_TXD (value) (((( 1 << 8) - 1) & (value)) << 0) + +/***Interrupt Status Register HDLC***/ +#define DANUBE_IOM_ISTAH ((volatile u32*)(DANUBE_IOM+ 0x0080)) +#define DANUBE_IOM_ISTAH_RME (1 << 7) +#define DANUBE_IOM_ISTAH_RPF (1 << 6) +#define DANUBE_IOM_ISTAH_RFO (1 << 5) +#define DANUBE_IOM_ISTAH_XPR (1 << 4) +#define DANUBE_IOM_ISTAH_XMR (1 << 3) +#define DANUBE_IOM_ISTAH_XDU (1 << 2) + +/***Interrupt Mask Register HDLC***/ +#define DANUBE_IOM_MASKH ((volatile u32*)(DANUBE_IOM+ 0x0080)) +#define DANUBE_IOM_MASKH_RME (1 << 7) +#define DANUBE_IOM_MASKH_RPF (1 << 6) +#define DANUBE_IOM_MASKH_RFO (1 << 5) +#define DANUBE_IOM_MASKH_XPR (1 << 4) +#define DANUBE_IOM_MASKH_XMR (1 << 3) +#define DANUBE_IOM_MASKH_XDU (1 << 2) + +/***Status Register***/ +#define DANUBE_IOM_STAR ((volatile u32*)(DANUBE_IOM+ 0x0084)) +#define DANUBE_IOM_STAR_XDOV (1 << 7) +#define DANUBE_IOM_STAR_XFW (1 << 6) +#define DANUBE_IOM_STAR_RACI (1 << 3) +#define DANUBE_IOM_STAR_XACI (1 << 1) + +/***Command Register***/ +#define DANUBE_IOM_CMDR ((volatile u32*)(DANUBE_IOM+ 0x0084)) +#define DANUBE_IOM_CMDR_RMC (1 << 7) +#define DANUBE_IOM_CMDR_RRES (1 << 6) +#define DANUBE_IOM_CMDR_XTF (1 << 3) +#define DANUBE_IOM_CMDR_XME (1 << 1) +#define DANUBE_IOM_CMDR_XRES (1 << 0) + +/***Mode Register***/ +#define DANUBE_IOM_MODEH ((volatile u32*)(DANUBE_IOM+ 0x0088)) +#define DANUBE_IOM_MODEH_MDS2 (1 << 7) +#define DANUBE_IOM_MODEH_MDS1 (1 << 6) +#define DANUBE_IOM_MODEH_MDS0 (1 << 5) +#define DANUBE_IOM_MODEH_RAC (1 << 3) +#define DANUBE_IOM_MODEH_DIM2 (1 << 2) +#define DANUBE_IOM_MODEH_DIM1 (1 << 1) +#define DANUBE_IOM_MODEH_DIM0 (1 << 0) + +/***Extended Mode Register***/ +#define DANUBE_IOM_EXMR ((volatile u32*)(DANUBE_IOM+ 0x008C)) +#define DANUBE_IOM_EXMR_XFBS (1 << 7) +#define DANUBE_IOM_EXMR_RFBS (value) (((( 1 << 2) - 1) & (value)) << 5) +#define DANUBE_IOM_EXMR_SRA (1 << 4) +#define DANUBE_IOM_EXMR_XCRC (1 << 3) +#define DANUBE_IOM_EXMR_RCRC (1 << 2) +#define DANUBE_IOM_EXMR_ITF (1 << 0) + +/***SAPI1 Register***/ +#define DANUBE_IOM_SAP1 ((volatile u32*)(DANUBE_IOM+ 0x0094)) +#define DANUBE_IOM_SAP1_SAPI1 (value) (((( 1 << 6) - 1) & (value)) << 2) +#define DANUBE_IOM_SAP1_MHA (1 << 0) + +/***Receive Frame Byte Count Low***/ +#define DANUBE_IOM_RBCL ((volatile u32*)(DANUBE_IOM+ 0x0098)) +#define DANUBE_IOM_RBCL_RBC(value) (1 << value) + + +/***SAPI2 Register***/ +#define DANUBE_IOM_SAP2 ((volatile u32*)(DANUBE_IOM+ 0x0098)) +#define DANUBE_IOM_SAP2_SAPI2 (value) (((( 1 << 6) - 1) & (value)) << 2) +#define DANUBE_IOM_SAP2_MLA (1 << 0) + +/***Receive Frame Byte Count High***/ +#define DANUBE_IOM_RBCH ((volatile u32*)(DANUBE_IOM+ 0x009C)) +#define DANUBE_IOM_RBCH_OV (1 << 4) +#define DANUBE_IOM_RBCH_RBC11 (1 << 3) +#define DANUBE_IOM_RBCH_RBC10 (1 << 2) +#define DANUBE_IOM_RBCH_RBC9 (1 << 1) +#define DANUBE_IOM_RBCH_RBC8 (1 << 0) + +/***TEI1 Register 1***/ +#define DANUBE_IOM_TEI1 ((volatile u32*)(DANUBE_IOM+ 0x009C)) +#define DANUBE_IOM_TEI1_TEI1 (value) (((( 1 << 7) - 1) & (value)) << 1) +#define DANUBE_IOM_TEI1_EA (1 << 0) + +/***Receive Status Register***/ +#define DANUBE_IOM_RSTA ((volatile u32*)(DANUBE_IOM+ 0x00A0)) +#define DANUBE_IOM_RSTA_VFR (1 << 7) +#define DANUBE_IOM_RSTA_RDO (1 << 6) +#define DANUBE_IOM_RSTA_CRC (1 << 5) +#define DANUBE_IOM_RSTA_RAB (1 << 4) +#define DANUBE_IOM_RSTA_SA1 (1 << 3) +#define DANUBE_IOM_RSTA_SA0 (1 << 2) +#define DANUBE_IOM_RSTA_TA (1 << 0) +#define DANUBE_IOM_RSTA_CR (1 << 1) + +/***TEI2 Register***/ +#define DANUBE_IOM_TEI2 ((volatile u32*)(DANUBE_IOM+ 0x00A0)) +#define DANUBE_IOM_TEI2_TEI2 (value) (((( 1 << 7) - 1) & (value)) << 1) +#define DANUBE_IOM_TEI2_EA (1 << 0) + +/***Test Mode Register HDLC***/ +#define DANUBE_IOM_TMH ((volatile u32*)(DANUBE_IOM+ 0x00A4)) +#define DANUBE_IOM_TMH_TLP (1 << 0) + +/***Command/Indication Receive 0***/ +#define DANUBE_IOM_CIR0 ((volatile u32*)(DANUBE_IOM+ 0x00B8)) +#define DANUBE_IOM_CIR0_CODR0 (value) (((( 1 << 4) - 1) & (value)) << 4) +#define DANUBE_IOM_CIR0_CIC0 (1 << 3) +#define DANUBE_IOM_CIR0_CIC1 (1 << 2) +#define DANUBE_IOM_CIR0_SG (1 << 1) +#define DANUBE_IOM_CIR0_BAS (1 << 0) + +/***Command/Indication Transmit 0***/ +#define DANUBE_IOM_CIX0 ((volatile u32*)(DANUBE_IOM+ 0x00B8)) +#define DANUBE_IOM_CIX0_CODX0 (value) (((( 1 << 4) - 1) & (value)) << 4) +#define DANUBE_IOM_CIX0_TBA2 (1 << 3) +#define DANUBE_IOM_CIX0_TBA1 (1 << 2) +#define DANUBE_IOM_CIX0_TBA0 (1 << 1) +#define DANUBE_IOM_CIX0_BAC (1 << 0) + +/***Command/Indication Receive 1***/ +#define DANUBE_IOM_CIR1 ((volatile u32*)(DANUBE_IOM+ 0x00BC)) +#define DANUBE_IOM_CIR1_CODR1 (value) (((( 1 << 6) - 1) & (value)) << 2) + +/***Command/Indication Transmit 1***/ +#define DANUBE_IOM_CIX1 ((volatile u32*)(DANUBE_IOM+ 0x00BC)) +#define DANUBE_IOM_CIX1_CODX1 (value) (((( 1 << 6) - 1) & (value)) << 2) +#define DANUBE_IOM_CIX1_CICW (1 << 1) +#define DANUBE_IOM_CIX1_CI1E (1 << 0) + +/***Controller Data Access Reg. (CH10)***/ +#define DANUBE_IOM_CDA10 ((volatile u32*)(DANUBE_IOM+ 0x0100)) +#define DANUBE_IOM_CDA10_CDA (value) (((( 1 << 8) - 1) & (value)) << 0) + +/***Controller Data Access Reg. (CH11)***/ +#define DANUBE_IOM_CDA11 ((volatile u32*)(DANUBE_IOM+ 0x0104)) +#define DANUBE_IOM_CDA11_CDA (value) (((( 1 << 8) - 1) & (value)) << 0) + +/***Controller Data Access Reg. (CH20)***/ +#define DANUBE_IOM_CDA20 ((volatile u32*)(DANUBE_IOM+ 0x0108)) +#define DANUBE_IOM_CDA20_CDA (value) (((( 1 << 8) - 1) & (value)) << 0) + +/***Controller Data Access Reg. (CH21)***/ +#define DANUBE_IOM_CDA21 ((volatile u32*)(DANUBE_IOM+ 0x010C)) +#define DANUBE_IOM_CDA21_CDA (value) (((( 1 << 8) - 1) & (value)) << 0) + +/***Time Slot and Data Port Sel. (CH10)***/ +#define DANUBE_IOM_CDA_TSDP10 ((volatile u32*)(DANUBE_IOM+ 0x0110)) +#define DANUBE_IOM_CDA_TSDP10_DPS (1 << 7) +#define DANUBE_IOM_CDA_TSDP10_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) + +/***Time Slot and Data Port Sel. (CH11)***/ +#define DANUBE_IOM_CDA_TSDP11 ((volatile u32*)(DANUBE_IOM+ 0x0114)) +#define DANUBE_IOM_CDA_TSDP11_DPS (1 << 7) +#define DANUBE_IOM_CDA_TSDP11_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) + +/***Time Slot and Data Port Sel. (CH20)***/ +#define DANUBE_IOM_CDA_TSDP20 ((volatile u32*)(DANUBE_IOM+ 0x0118)) +#define DANUBE_IOM_CDA_TSDP20_DPS (1 << 7) +#define DANUBE_IOM_CDA_TSDP20_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) + +/***Time Slot and Data Port Sel. (CH21)***/ +#define DANUBE_IOM_CDA_TSDP21 ((volatile u32*)(DANUBE_IOM+ 0x011C)) +#define DANUBE_IOM_CDA_TSDP21_DPS (1 << 7) +#define DANUBE_IOM_CDA_TSDP21_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) + +/***Time Slot and Data Port Sel. (CH10)***/ +#define DANUBE_IOM_CO_TSDP10 ((volatile u32*)(DANUBE_IOM+ 0x0120)) +#define DANUBE_IOM_CO_TSDP10_DPS (1 << 7) +#define DANUBE_IOM_CO_TSDP10_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) + +/***Time Slot and Data Port Sel. (CH11)***/ +#define DANUBE_IOM_CO_TSDP11 ((volatile u32*)(DANUBE_IOM+ 0x0124)) +#define DANUBE_IOM_CO_TSDP11_DPS (1 << 7) +#define DANUBE_IOM_CO_TSDP11_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) + +/***Time Slot and Data Port Sel. (CH20)***/ +#define DANUBE_IOM_CO_TSDP20 ((volatile u32*)(DANUBE_IOM+ 0x0128)) +#define DANUBE_IOM_CO_TSDP20_DPS (1 << 7) +#define DANUBE_IOM_CO_TSDP20_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) + +/***Time Slot and Data Port Sel. (CH21)***/ +#define DANUBE_IOM_CO_TSDP21 ((volatile u32*)(DANUBE_IOM+ 0x012C)) +#define DANUBE_IOM_CO_TSDP21_DPS (1 << 7) +#define DANUBE_IOM_CO_TSDP21_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) + +/***Ctrl. Reg. Contr. Data Access CH1x***/ +#define DANUBE_IOM_CDA1_CR ((volatile u32*)(DANUBE_IOM+ 0x0138)) +#define DANUBE_IOM_CDA1_CR_EN_TBM (1 << 5) +#define DANUBE_IOM_CDA1_CR_EN_I1 (1 << 4) +#define DANUBE_IOM_CDA1_CR_EN_I0 (1 << 3) +#define DANUBE_IOM_CDA1_CR_EN_O1 (1 << 2) +#define DANUBE_IOM_CDA1_CR_EN_O0 (1 << 1) +#define DANUBE_IOM_CDA1_CR_SWAP (1 << 0) + +/***Ctrl. Reg. Contr. Data Access CH1x***/ +#define DANUBE_IOM_CDA2_CR ((volatile u32*)(DANUBE_IOM+ 0x013C)) +#define DANUBE_IOM_CDA2_CR_EN_TBM (1 << 5) +#define DANUBE_IOM_CDA2_CR_EN_I1 (1 << 4) +#define DANUBE_IOM_CDA2_CR_EN_I0 (1 << 3) +#define DANUBE_IOM_CDA2_CR_EN_O1 (1 << 2) +#define DANUBE_IOM_CDA2_CR_EN_O0 (1 << 1) +#define DANUBE_IOM_CDA2_CR_SWAP (1 << 0) + +/***Control Register B-Channel Data***/ +#define DANUBE_IOM_BCHA_CR ((volatile u32*)(DANUBE_IOM+ 0x0144)) +#define DANUBE_IOM_BCHA_CR_EN_BC2 (1 << 4) +#define DANUBE_IOM_BCHA_CR_EN_BC1 (1 << 3) + +/***Control Register B-Channel Data***/ +#define DANUBE_IOM_BCHB_CR ((volatile u32*)(DANUBE_IOM+ 0x0148)) +#define DANUBE_IOM_BCHB_CR_EN_BC2 (1 << 4) +#define DANUBE_IOM_BCHB_CR_EN_BC1 (1 << 3) + +/***Control Reg. for HDLC and CI1 Data***/ +#define DANUBE_IOM_DCI_CR ((volatile u32*)(DANUBE_IOM+ 0x014C)) +#define DANUBE_IOM_DCI_CR_DPS_CI1 (1 << 7) +#define DANUBE_IOM_DCI_CR_EN_CI1 (1 << 6) +#define DANUBE_IOM_DCI_CR_EN_D (1 << 5) + +/***Control Reg. for HDLC and CI1 Data***/ +#define DANUBE_IOM_DCIC_CR ((volatile u32*)(DANUBE_IOM+ 0x014C)) +#define DANUBE_IOM_DCIC_CR_DPS_CI0 (1 << 7) +#define DANUBE_IOM_DCIC_CR_EN_CI0 (1 << 6) +#define DANUBE_IOM_DCIC_CR_DPS_D (1 << 5) + +/***Control Reg. Serial Data Strobe x***/ +#define DANUBE_IOM_SDS_CR ((volatile u32*)(DANUBE_IOM+ 0x0154)) +#define DANUBE_IOM_SDS_CR_ENS_TSS (1 << 7) +#define DANUBE_IOM_SDS_CR_ENS_TSS_1 (1 << 6) +#define DANUBE_IOM_SDS_CR_ENS_TSS_3 (1 << 5) +#define DANUBE_IOM_SDS_CR_TSS (value) (((( 1 << 4) - 1) & (value)) << 0) + +/***Control Register IOM Data***/ +#define DANUBE_IOM_IOM_CR ((volatile u32*)(DANUBE_IOM+ 0x015C)) +#define DANUBE_IOM_IOM_CR_SPU (1 << 7) +#define DANUBE_IOM_IOM_CR_CI_CS (1 << 5) +#define DANUBE_IOM_IOM_CR_TIC_DIS (1 << 4) +#define DANUBE_IOM_IOM_CR_EN_BCL (1 << 3) +#define DANUBE_IOM_IOM_CR_CLKM (1 << 2) +#define DANUBE_IOM_IOM_CR_Res (1 << 1) +#define DANUBE_IOM_IOM_CR_DIS_IOM (1 << 0) + +/***Synchronous Transfer Interrupt***/ +#define DANUBE_IOM_STI ((volatile u32*)(DANUBE_IOM+ 0x0160)) +#define DANUBE_IOM_STI_STOV21 (1 << 7) +#define DANUBE_IOM_STI_STOV20 (1 << 6) +#define DANUBE_IOM_STI_STOV11 (1 << 5) +#define DANUBE_IOM_STI_STOV10 (1 << 4) +#define DANUBE_IOM_STI_STI21 (1 << 3) +#define DANUBE_IOM_STI_STI20 (1 << 2) +#define DANUBE_IOM_STI_STI11 (1 << 1) +#define DANUBE_IOM_STI_STI10 (1 << 0) + +/***Acknowledge Synchronous Transfer Interrupt***/ +#define DANUBE_IOM_ASTI ((volatile u32*)(DANUBE_IOM+ 0x0160)) +#define DANUBE_IOM_ASTI_ACK21 (1 << 3) +#define DANUBE_IOM_ASTI_ACK20 (1 << 2) +#define DANUBE_IOM_ASTI_ACK11 (1 << 1) +#define DANUBE_IOM_ASTI_ACK10 (1 << 0) + +/***Mask Synchronous Transfer Interrupt***/ +#define DANUBE_IOM_MSTI ((volatile u32*)(DANUBE_IOM+ 0x0164)) +#define DANUBE_IOM_MSTI_STOV21 (1 << 7) +#define DANUBE_IOM_MSTI_STOV20 (1 << 6) +#define DANUBE_IOM_MSTI_STOV11 (1 << 5) +#define DANUBE_IOM_MSTI_STOV10 (1 << 4) +#define DANUBE_IOM_MSTI_STI21 (1 << 3) +#define DANUBE_IOM_MSTI_STI20 (1 << 2) +#define DANUBE_IOM_MSTI_STI11 (1 << 1) +#define DANUBE_IOM_MSTI_STI10 (1 << 0) + +/***Configuration Register for Serial Data Strobes***/ +#define DANUBE_IOM_SDS_CONF ((volatile u32*)(DANUBE_IOM+ 0x0168)) +#define DANUBE_IOM_SDS_CONF_SDS_BCL (1 << 0) + +/***Monitoring CDA Bits***/ +#define DANUBE_IOM_MCDA ((volatile u32*)(DANUBE_IOM+ 0x016C)) +#define DANUBE_IOM_MCDA_MCDA21 (value) (((( 1 << 2) - 1) & (value)) << 6) +#define DANUBE_IOM_MCDA_MCDA20 (value) (((( 1 << 2) - 1) & (value)) << 4) +#define DANUBE_IOM_MCDA_MCDA11 (value) (((( 1 << 2) - 1) & (value)) << 2) +#define DANUBE_IOM_MCDA_MCDA10 (value) (((( 1 << 2) - 1) & (value)) << 0) + +/***********************************************************************/ +/* Module : ASC0 register address and bits */ +/***********************************************************************/ +#define DANUBE_ASC0 (KSEG1+0x1E100400) +/***********************************************************************/ +#define DANUBE_ASC0_TBUF ((volatile u32*)(DANUBE_ASC0 + 0x0020)) +#define DANUBE_ASC0_RBUF ((volatile u32*)(DANUBE_ASC0 + 0x0024)) +#define DANUBE_ASC0_FSTAT ((volatile u32*)(DANUBE_ASC0 + 0x0048)) +#define DANUBE_ASC0_FSTAT_TXFREE_GET(value) (((value) >> 24) & ((1 << 6) - 1)) +#define DANUBE_ASC0_FSTAT_TXFREE_SET(value) (((( 1 << 6) - 1) & (value)) << 24) +#define DANUBE_ASC0_FSTAT_RXFREE_GET(value) (((value) >> 16) & ((1 << 6) - 1)) +#define DANUBE_ASC0_FSTAT_RXFREE_SET(value) (((( 1 << 6) - 1) & (value)) << 16) +#define DANUBE_ASC0_FSTAT_TXFFL_GET(value) (((value) >> 8) & ((1 << 6) - 1)) +#define DANUBE_ASC0_FSTAT_TXFFL_SET(value) (((( 1 << 6) - 1) & (value)) << 8) +#define DANUBE_ASC0_FSTAT_RXFFL_GET(value) (((value) >> 0) & ((1 << 6) - 1)) +#define DANUBE_ASC0_FSTAT_RXFFL_SET(value) (((( 1 << 6) - 1) & (value)) << 0) + + +/***********************************************************************/ +/* Module : ASC1 register address and bits */ +/***********************************************************************/ + +#define DANUBE_ASC1 (KSEG1+0x1E100C00) + /***********************************************************************/ + +#define DANUBE_ASC1_TBUF ((volatile u32*)(DANUBE_ASC1 + 0x0020)) +#define DANUBE_ASC1_RBUF ((volatile u32*)(DANUBE_ASC1 + 0x0024)) +#define DANUBE_ASC1_FSTAT ((volatile u32*)(DANUBE_ASC1 + 0x0048)) +#define DANUBE_ASC1_FSTAT_TXFREE_GET(value) (((value) >> 24) & ((1 << 6) - 1)) +#define DANUBE_ASC1_FSTAT_TXFREE_SET(value) (((( 1 << 6) - 1) & (value)) << 24) +#define DANUBE_ASC1_FSTAT_RXFREE_GET(value) (((value) >> 16) & ((1 << 6) - 1)) +#define DANUBE_ASC1_FSTAT_RXFREE_SET(value) (((( 1 << 6) - 1) & (value)) << 16) +#define DANUBE_ASC1_FSTAT_TXFFL_GET(value) (((value) >> 8) & ((1 << 6) - 1)) +#define DANUBE_ASC1_FSTAT_TXFFL_SET(value) (((( 1 << 6) - 1) & (value)) << 8) +#define DANUBE_ASC1_FSTAT_RXFFL_GET(value) (((value) >> 0) & ((1 << 6) - 1)) +#define DANUBE_ASC1_FSTAT_RXFFL_SET(value) (((( 1 << 6) - 1) & (value)) << 0) + +/***********************************************************************/ +/* Module : DMA register address and bits */ +/***********************************************************************/ + +#define DANUBE_DMA (0xBE104100) +/***********************************************************************/ + +#define DANUBE_DMA_BASE DANUBE_DMA +#define DANUBE_DMA_CLC (volatile u32*)DANUBE_DMA_BASE +#define DANUBE_DMA_ID (volatile u32*)(DANUBE_DMA_BASE+0x08) +#define DANUBE_DMA_CTRL (volatile u32*)(DANUBE_DMA_BASE+0x10) +#define DANUBE_DMA_CPOLL (volatile u32*)(DANUBE_DMA_BASE+0x14) +#define DANUBE_DMA_CS (volatile u32*)(DANUBE_DMA_BASE+0x18) +#define DANUBE_DMA_CCTRL (volatile u32*)(DANUBE_DMA_BASE+0x1C) +#define DANUBE_DMA_CDBA (volatile u32*)(DANUBE_DMA_BASE+0x20) +#define DANUBE_DMA_CDLEN (volatile u32*)(DANUBE_DMA_BASE+0x24) +#define DANUBE_DMA_CIS (volatile u32*)(DANUBE_DMA_BASE+0x28) +#define DANUBE_DMA_CIE (volatile u32*)(DANUBE_DMA_BASE+0x2C) + +#define DANUBE_DMA_PS (volatile u32*)(DANUBE_DMA_BASE+0x40) +#define DANUBE_DMA_PCTRL (volatile u32*)(DANUBE_DMA_BASE+0x44) + +#define DANUBE_DMA_IRNEN (volatile u32*)(DANUBE_DMA_BASE+0xf4) +#define DANUBE_DMA_IRNCR (volatile u32*)(DANUBE_DMA_BASE+0xf8) +#define DANUBE_DMA_IRNICR (volatile u32*)(DANUBE_DMA_BASE+0xfc) +/***********************************************************************/ +/* Module : Debug register address and bits */ +/***********************************************************************/ + +#define DANUBE_Debug (0xBF106000) +/***********************************************************************/ + + +/***MCD Break Bus Switch Register***/ +#define DANUBE_Debug_MCD_BBS ((volatile u32*)(DANUBE_Debug+ 0x0000)) +#define DANUBE_Debug_MCD_BBS_BTP1 (1 << 19) +#define DANUBE_Debug_MCD_BBS_BTP0 (1 << 18) +#define DANUBE_Debug_MCD_BBS_BSP1 (1 << 17) +#define DANUBE_Debug_MCD_BBS_BSP0 (1 << 16) +#define DANUBE_Debug_MCD_BBS_BT5EN (1 << 15) +#define DANUBE_Debug_MCD_BBS_BT4EN (1 << 14) +#define DANUBE_Debug_MCD_BBS_BT5 (1 << 13) +#define DANUBE_Debug_MCD_BBS_BT4 (1 << 12) +#define DANUBE_Debug_MCD_BBS_BS5EN (1 << 7) +#define DANUBE_Debug_MCD_BBS_BS4EN (1 << 6) +#define DANUBE_Debug_MCD_BBS_BS5 (1 << 5) +#define DANUBE_Debug_MCD_BBS_BS4 (1 << 4) + +/***MCD Multiplexer Control Register***/ +#define DANUBE_Debug_MCD_MCR ((volatile u32*)(DANUBE_Debug+ 0x0008)) +#define DANUBE_Debug_MCD_MCR_MUX5 (1 << 4) +#define DANUBE_Debug_MCD_MCR_MUX4 (1 << 3) +#define DANUBE_Debug_MCD_MCR_MUX1 (1 << 0) + + +/***********************************************************************/ +/* Module : SRAM register address and bits */ +/***********************************************************************/ + +#define DANUBE_SRAM (0xBF980000) +/***********************************************************************/ + + +/***SRAM Size Register***/ +#define DANUBE_SRAM_SRAM_SIZE ((volatile u32*)(DANUBE_SRAM+ 0x0800)) +#define DANUBE_SRAM_SRAM_SIZE_SIZE (value) (((( 1 << 23) - 1) & (value)) << 0) + +/***********************************************************************/ +/* Module : BIU register address and bits */ +/***********************************************************************/ + +#define DANUBE_BIU (0xBFA80000) +/***********************************************************************/ + + +/***BIU Identification Register***/ +#define DANUBE_BIU_BIU_ID ((volatile u32*)(DANUBE_BIU+ 0x0000)) +#define DANUBE_BIU_BIU_ID_ARCH (1 << 16) +#define DANUBE_BIU_BIU_ID_ID (value) (((( 1 << 8) - 1) & (value)) << 8) +#define DANUBE_BIU_BIU_ID_REV (value) (((( 1 << 8) - 1) & (value)) << 0) + +/***BIU Access Error Cause Register***/ +#define DANUBE_BIU_BIU_ERRCAUSE ((volatile u32*)(DANUBE_BIU+ 0x0100)) +#define DANUBE_BIU_BIU_ERRCAUSE_ERR (1 << 31) +#define DANUBE_BIU_BIU_ERRCAUSE_PORT (value) (((( 1 << 4) - 1) & (value)) << 16) +#define DANUBE_BIU_BIU_ERRCAUSE_CAUSE (value) (((( 1 << 2) - 1) & (value)) << 0) + +/***BIU Access Error Address Register***/ +#define DANUBE_BIU_BIU_ERRADDR ((volatile u32*)(DANUBE_BIU+ 0x0108)) +#define DANUBE_BIU_BIU_ERRADDR_ADDR + + +/***********************************************************************/ +/* Module : ICU register address and bits */ +/***********************************************************************/ + +#define DANUBE_ICU (0xBF880200) +#define DANUBE_ICU (0xBF880200) +#define DANUBE_ICU_EXI (0xBF101000) +/***********************************************************************/ + + +/***IM0 Interrupt Status Register***/ +#define DANUBE_ICU_IM0_ISR ((volatile u32*)(DANUBE_ICU+ 0x0000)) +#define DANUBE_ICU_IM0_ISR_IR(value) (1 << (value)) + + +/***IM1 Interrupt Status Register***/ +#define DANUBE_ICU_IM1_ISR ((volatile u32*)(DANUBE_ICU+ 0x0020)) +#define DANUBE_ICU_IM1_ISR_IR(value) (1 << (value)) + + +/***IM2 Interrupt Status Register***/ +#define DANUBE_ICU_IM2_ISR ((volatile u32*)(DANUBE_ICU+ 0x0040)) +#define DANUBE_ICU_IM2_ISR_IR(value) (1 << (value)) + +/***IM3 Interrupt Status Register***/ +#define DANUBE_ICU_IM3_ISR ((volatile u32*)(DANUBE_ICU+ 0x0060)) +#define DANUBE_ICU_IM3_ISR_IR(value) (1 << (value)) + +/***IM4 Interrupt Status Register***/ +#define DANUBE_ICU_IM4_ISR ((volatile u32*)(DANUBE_ICU+ 0x0080)) +#define DANUBE_ICU_IM4_ISR_IR(value) (1 << (value)) + + +/***IM0 Interrupt Enable Register***/ +#define DANUBE_ICU_IM0_IER ((volatile u32*)(DANUBE_ICU+ 0x0008)) +#define DANUBE_ICU_IM0_IER_IR(value) (1 << (value)) + + +/***IM1 Interrupt Enable Register***/ +#define DANUBE_ICU_IM1_IER ((volatile u32*)(DANUBE_ICU+ 0x0028)) +#define DANUBE_ICU_IM1_IER_IR(value) (1 << (value)) + + +/***IM2 Interrupt Enable Register***/ +#define DANUBE_ICU_IM2_IER ((volatile u32*)(DANUBE_ICU+ 0x0048)) +#define DANUBE_ICU_IM2_IER_IR(value) (1 << (value)8 + +/***IM3 Interrupt Enable Register***/ +#define DANUBE_ICU_IM3_IER ((volatile u32*)(DANUBE_ICU+ 0x0068)) +#define DANUBE_ICU_IM3_IER_IR(value) (1 << (value)) + +/***IM4 Interrupt Enable Register***/ +#define DANUBE_ICU_IM4_IER ((volatile u32*)(DANUBE_ICU+ 0x0088)) +#define DANUBE_ICU_IM4_IER_IR(value) (1 << (value)) + + +/***IM0 Interrupt Output Status Register***/ +#define DANUBE_ICU_IM0_IOSR ((volatile u32*)(DANUBE_ICU+ 0x0010)) +#define DANUBE_ICU_IM0_IOSR_IR(value) (1 << (value)) + + +/***IM1 Interrupt Output Status Register***/ +#define DANUBE_ICU_IM1_IOSR ((volatile u32*)(DANUBE_ICU+ 0x0030)) +#define DANUBE_ICU_IM1_IOSR_IR(value) (1 << (value)) + + +/***IM2 Interrupt Output Status Register***/ +#define DANUBE_ICU_IM2_IOSR ((volatile u32*)(DANUBE_ICU+ 0x0050)) +#define DANUBE_ICU_IM2_IOSR_IR(value) (1 << (value)) + +/***IM3 Interrupt Output Status Register***/ +#define DANUBE_ICU_IM3_IOSR ((volatile u32*)(DANUBE_ICU+ 0x0070)) +#define DANUBE_ICU_IM3_IOSR_IR(value) (1 << (value)) + +/***IM4 Interrupt Output Status Register***/ +#define DANUBE_ICU_IM4_IOSR ((volatile u32*)(DANUBE_ICU+ 0x0090)) +#define DANUBE_ICU_IM4_IOSR_IR(value) (1 << (value)) + + +/***IM0 Interrupt Request Set Register***/ +#define DANUBE_ICU_IM0_IRSR ((volatile u32*)(DANUBE_ICU+ 0x0018)) +#define DANUBE_ICU_IM0_IRSR_IR(value) (1 << (value)) + + +/***IM1 Interrupt Request Set Register***/ +#define DANUBE_ICU_IM1_IRSR ((volatile u32*)(DANUBE_ICU+ 0x0038)) +#define DANUBE_ICU_IM1_IRSR_IR(value) (1 << (value)) + + +/***IM2 Interrupt Request Set Register***/ +#define DANUBE_ICU_IM2_IRSR ((volatile u32*)(DANUBE_ICU+ 0x0058)) +#define DANUBE_ICU_IM2_IRSR_IR(value) (1 << (value)) + +/***IM3 Interrupt Request Set Register***/ +#define DANUBE_ICU_IM3_IRSR ((volatile u32*)(DANUBE_ICU+ 0x0078)) +#define DANUBE_ICU_IM3_IRSR_IR(value) (1 << (value)) + +/***IM4 Interrupt Request Set Register***/ +#define DANUBE_ICU_IM4_IRSR ((volatile u32*)(DANUBE_ICU+ 0x0098)) +#define DANUBE_ICU_IM4_IRSR_IR(value) (1 << (value)) + +/***Interrupt Vector Value Register***/ +#define DANUBE_ICU_IM_VEC ((volatile u32*)(DANUBE_ICU+ 0x0060)) + +/***Interrupt Vector Value Mask***/ +#define DANUBE_ICU_IM0_VEC_MASK 0x0000001f +#define DANUBE_ICU_IM1_VEC_MASK 0x000003e0 +#define DANUBE_ICU_IM2_VEC_MASK 0x00007c00 +#define DANUBE_ICU_IM3_VEC_MASK 0x000f8000 +#define DANUBE_ICU_IM4_VEC_MASK 0x01f00000 + +/***DMA Interrupt Mask Value***/ +#define DANUBE_DMA_H_MASK 0x00000fff + +/***External Interrupt Control Register***/ +#define DANUBE_ICU_EXTINTCR ((volatile u32*)(DANUBE_ICU_EXI+ 0x0000)) +#define DANUBE_ICU_IRNICR ((volatile u32*)(DANUBE_ICU_EXI+ 0x0004)) +#define DANUBE_ICU_IRNCR ((volatile u32*)(DANUBE_ICU_EXI+ 0x0008)) +#define DANUBE_ICU_IRNEN ((volatile u32*)(DANUBE_ICU_EXI+ 0x000c)) +#define DANUBE_ICU_NMI_CR ((volatile u32*)(DANUBE_ICU_EXI+ 0x00f0)) +#define DANUBE_ICU_NMI_SR ((volatile u32*)(DANUBE_ICU_EXI+ 0x00f4)) + +/***********************************************************************/ +/* Module : MPS register address and bits */ +/***********************************************************************/ + +#define DANUBE_MPS (KSEG1+0x1F107000) +/***********************************************************************/ + +#define DANUBE_MPS_CHIPID ((volatile u32*)(DANUBE_MPS + 0x0344)) +#define DANUBE_MPS_CHIPID_VERSION_GET(value) (((value) >> 28) & ((1 << 4) - 1)) +#define DANUBE_MPS_CHIPID_VERSION_SET(value) (((( 1 << 4) - 1) & (value)) << 28) +#define DANUBE_MPS_CHIPID_PARTNUM_GET(value) (((value) >> 12) & ((1 << 16) - 1)) +#define DANUBE_MPS_CHIPID_PARTNUM_SET(value) (((( 1 << 16) - 1) & (value)) << 12) +#define DANUBE_MPS_CHIPID_MANID_GET(value) (((value) >> 1) & ((1 << 10) - 1)) +#define DANUBE_MPS_CHIPID_MANID_SET(value) (((( 1 << 10) - 1) & (value)) << 1) + + +/* voice channel 0 ... 3 interrupt enable register */ +#define DANUBE_MPS_VC0ENR ((volatile u32*)(DANUBE_MPS + 0x0000)) +#define DANUBE_MPS_VC1ENR ((volatile u32*)(DANUBE_MPS + 0x0004)) +#define DANUBE_MPS_VC2ENR ((volatile u32*)(DANUBE_MPS + 0x0008)) +#define DANUBE_MPS_VC3ENR ((volatile u32*)(DANUBE_MPS + 0x000C)) +/* voice channel 0 ... 3 interrupt status read register */ +#define DANUBE_MPS_RVC0SR ((volatile u32*)(DANUBE_MPS + 0x0010)) +#define DANUBE_MPS_RVC1SR ((volatile u32*)(DANUBE_MPS + 0x0014)) +#define DANUBE_MPS_RVC2SR ((volatile u32*)(DANUBE_MPS + 0x0018)) +#define DANUBE_MPS_RVC3SR ((volatile u32*)(DANUBE_MPS + 0x001C)) +/* voice channel 0 ... 3 interrupt status set register */ +#define DANUBE_MPS_SVC0SR ((volatile u32*)(DANUBE_MPS + 0x0020)) +#define DANUBE_MPS_SVC1SR ((volatile u32*)(DANUBE_MPS + 0x0024)) +#define DANUBE_MPS_SVC2SR ((volatile u32*)(DANUBE_MPS + 0x0028)) +#define DANUBE_MPS_SVC3SR ((volatile u32*)(DANUBE_MPS + 0x002C)) +/* voice channel 0 ... 3 interrupt status clear register */ +#define DANUBE_MPS_CVC0SR ((volatile u32*)(DANUBE_MPS + 0x0030)) +#define DANUBE_MPS_CVC1SR ((volatile u32*)(DANUBE_MPS + 0x0034)) +#define DANUBE_MPS_CVC2SR ((volatile u32*)(DANUBE_MPS + 0x0038)) +#define DANUBE_MPS_CVC3SR ((volatile u32*)(DANUBE_MPS + 0x003C)) +/* common status 0 and 1 read register */ +#define DANUBE_MPS_RAD0SR ((volatile u32*)(DANUBE_MPS + 0x0040)) +#define DANUBE_MPS_RAD1SR ((volatile u32*)(DANUBE_MPS + 0x0044)) +/* common status 0 and 1 set register */ +#define DANUBE_MPS_SAD0SR ((volatile u32*)(DANUBE_MPS + 0x0048)) +#define DANUBE_MPS_SAD1SR ((volatile u32*)(DANUBE_MPS + 0x004C)) +/* common status 0 and 1 clear register */ +#define DANUBE_MPS_CAD0SR ((volatile u32*)(DANUBE_MPS + 0x0050)) +#define DANUBE_MPS_CAD1SR ((volatile u32*)(DANUBE_MPS + 0x0054)) +/* common status 0 and 1 enable register */ +#define DANUBE_MPS_AD0ENR ((volatile u32*)(DANUBE_MPS + 0x0058)) +#define DANUBE_MPS_AD1ENR ((volatile u32*)(DANUBE_MPS + 0x005C)) +/* notification enable register */ +#define DANUBE_MPS_CPU0_NFER ((volatile u32*)(DANUBE_MPS + 0x0060)) +#define DANUBE_MPS_CPU1_NFER ((volatile u32*)(DANUBE_MPS + 0x0064)) +/* CPU to CPU interrup request register */ +#define DANUBE_MPS_CPU0_2_CPU1_IRR ((volatile u32*)(DANUBE_MPS + 0x0070)) +#define DANUBE_MPS_CPU0_2_CPU1_IER ((volatile u32*)(DANUBE_MPS + 0x0074)) +/* Global interrupt request and request enable register */ +#define DANUBE_MPS_GIRR ((volatile u32*)(DANUBE_MPS + 0x0078)) +#define DANUBE_MPS_GIER ((volatile u32*)(DANUBE_MPS + 0x007C)) + + +#define DANUBE_MPS_CPU0_SMP0 ((volatile u32*)(DANUBE_MPS + 0x00100)) + +#define DANUBE_MPS_CPU1_SMP0 ((volatile u32*)(DANUBE_MPS + 0x00200)) + +/************************************************************************/ +/* Module : DEU register address and bits */ +/************************************************************************/ +#define DANUBE_DEU_BASE_ADDR (0xBE102000) +/* DEU Control Register */ +#define DANUBE_DEU_CLK ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0000)) +#define DANUBE_DEU_ID ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0008)) + +/* DEU control register */ +#define DANUBE_DEU_CON ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0010)) +#define DANUBE_DEU_IHR ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0014)) +#define DANUBE_DEU_ILR ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0018)) +#define DANUBE_DEU_K1HR ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x001C)) +#define DANUBE_DEU_K1LR ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0020)) +#define DANUBE_DEU_K3HR ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0024)) +#define DANUBE_DEU_K3LR ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0028)) +#define DANUBE_DEU_IVHR ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x002C)) +#define DANUBE_DEU_IVLR ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0030)) +#define DANUBE_DEU_OHR ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0040)) +#define DANUBE_DEU_OLR ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0050)) + +/* AES DEU register */ +#define DANUBE_AES_CON ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0050)) +#define DANUBE_AES_ID3R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0054)) +#define DANUBE_AES_ID2R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0058)) +#define DANUBE_AES_ID1R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x005C)) +#define DANUBE_AES_ID0R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0060)) + +/* AES Key register */ +#define DANUBE_AES_K7R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0064)) +#define DANUBE_AES_K6R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0068)) +#define DANUBE_AES_K5R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x006C)) +#define DANUBE_AES_K4R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0070)) +#define DANUBE_AES_K3R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0074)) +#define DANUBE_AES_K2R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0078)) +#define DANUBE_AES_K1R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x007C)) +#define DANUBE_AES_K0R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0080)) + +/* AES vector register */ +#define DANUBE_AES_IV3R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0084)) +#define DANUBE_AES_IV2R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0088)) +#define DANUBE_AES_IV1R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x008C)) +#define DANUBE_AES_IV0R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0090)) +#define DANUBE_AES_0D3R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0094)) +#define DANUBE_AES_0D2R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x0098)) +#define DANUBE_AES_OD1R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x009C)) +#define DANUBE_AES_OD0R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x00A0)) + +/* hash control registe */ +#define DANUBE_HASH_CON ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x00B0)) +#define DANUBE_HASH_MR ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x00B4)) +#define DANUBE_HASH_D1R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x00B8 )) +#define DANUBE_HASH_D2R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x00BC )) +#define DANUBE_HASH_D3R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x00C0 )) +#define DANUBE_HASH_D4R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x00C4)) +#define DANUBE_HASH_D5R ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x00C8)) + +#define DANUBE_CON ((volatile u32 *)(DANUBE_DEU_BASE_ADDR + 0x00EC)) + + + + +/************************************************************************/ +/* Module : PPE register address and bits */ +/************************************************************************/ +#define DANUBE_PPE_BASE_ADDR (KSEG1 + 0x1E180000) +#define DANUBE_PPE_PP32_DEBUG_REG_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x0000) << 2))) +#define DANUBE_PPE_PPM_INT_REG_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x0030) << 2))) +#define DANUBE_PPE_PP32_INTERNAL_RES_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x0040) << 2))) +#define DANUBE_PPE_PPE_CLOCK_CONTROL_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x0100) << 2))) +#define DANUBE_PPE_CDM_CODE_MEMORY_RAM0_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x1000) << 2))) +#define DANUBE_PPE_CDM_CODE_MEMORY_RAM1_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x2000) << 2))) +#define DANUBE_PPE_REG_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x4000) << 2))) +#define DANUBE_PPE_PP32_DATA_MEMORY_RAM1_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x5000) << 2))) +#define DANUBE_PPE_PPM_INT_UNIT_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x6000) << 2))) +#define DANUBE_PPE_PPM_TIMER0_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x6100) << 2))) +#define DANUBE_PPE_PPM_TASK_IND_REG_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x6200) << 2))) +#define DANUBE_PPE_PPS_BRK_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x6300) << 2))) +#define DANUBE_PPE_PPM_TIMER1_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x6400) << 2))) +#define DANUBE_PPE_SB_RAM0_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x8000) << 2))) +#define DANUBE_PPE_SB_RAM1_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x8400) << 2))) +#define DANUBE_PPE_SB_RAM2_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x8C00) << 2))) +#define DANUBE_PPE_SB_RAM3_ADDR(x) ((volatile u32*)(DANUBE_PPE_BASE_ADDR + (((x) + 0x9600) << 2))) + +#define DANUBE_PPE_PP32_SLEEP DANUBE_PPE_REG_ADDR(0x0010) /* PP32 Power Saving Register */ +#define DANUBE_PPE_CDM_CFG DANUBE_PPE_REG_ADDR(0x0100) /* Code/Data Memory (CDM) Register */ + +/* Mailbox Registers */ +#define DANUBE_PPE_MBOX_IGU0_ISRS DANUBE_PPE_REG_ADDR(0x0200) +#define DANUBE_PPE_MBOX_IGU0_ISRC DANUBE_PPE_REG_ADDR(0x0201) +#define DANUBE_PPE_MBOX_IGU0_ISR DANUBE_PPE_REG_ADDR(0x0202) +#define DANUBE_PPE_MBOX_IGU0_IER DANUBE_PPE_REG_ADDR(0x0203) +#define DANUBE_PPE_MBOX_IGU1_ISRS0 DANUBE_PPE_REG_ADDR(0x0204) +#define DANUBE_PPE_MBOX_IGU1_ISRC0 DANUBE_PPE_REG_ADDR(0x0205) +#define DANUBE_PPE_MBOX_IGU1_ISR0 DANUBE_PPE_REG_ADDR(0x0206) +#define DANUBE_PPE_MBOX_IGU1_IER0 DANUBE_PPE_REG_ADDR(0x0207) +#define DANUBE_PPE_MBOX_IGU1_ISRS1 DANUBE_PPE_REG_ADDR(0x0208) +#define DANUBE_PPE_MBOX_IGU1_ISRC1 DANUBE_PPE_REG_ADDR(0x0209) +#define DANUBE_PPE_MBOX_IGU1_ISR1 DANUBE_PPE_REG_ADDR(0x020A) +#define DANUBE_PPE_MBOX_IGU1_IER1 DANUBE_PPE_REG_ADDR(0x020B) +#define DANUBE_PPE_MBOX_IGU1_ISRS2 DANUBE_PPE_REG_ADDR(0x020C) +#define DANUBE_PPE_MBOX_IGU1_ISRC2 DANUBE_PPE_REG_ADDR(0x020D) +#define DANUBE_PPE_MBOX_IGU1_ISR2 DANUBE_PPE_REG_ADDR(0x020E) +#define DANUBE_PPE_MBOX_IGU1_IER2 DANUBE_PPE_REG_ADDR(0x020F) +#define DANUBE_PPE_MBOX_IGU2_ISRS DANUBE_PPE_REG_ADDR(0x0210) +#define DANUBE_PPE_MBOX_IGU2_ISRC DANUBE_PPE_REG_ADDR(0x0211) +#define DANUBE_PPE_MBOX_IGU2_ISR DANUBE_PPE_REG_ADDR(0x0212) +#define DANUBE_PPE_MBOX_IGU2_IER DANUBE_PPE_REG_ADDR(0x0213) +#define DANUBE_PPE_MBOX_IGU3_ISRS DANUBE_PPE_REG_ADDR(0x0214) +#define DANUBE_PPE_MBOX_IGU3_ISRC DANUBE_PPE_REG_ADDR(0x0215) +#define DANUBE_PPE_MBOX_IGU3_ISR DANUBE_PPE_REG_ADDR(0x0216) +#define DANUBE_PPE_MBOX_IGU3_IER DANUBE_PPE_REG_ADDR(0x0217) +#define DANUBE_PPE_MBOX_IGU4_ISRS DANUBE_PPE_REG_ADDR(0x0218) +#define DANUBE_PPE_MBOX_IGU4_ISRC DANUBE_PPE_REG_ADDR(0x0219) +#define DANUBE_PPE_MBOX_IGU4_ISR DANUBE_PPE_REG_ADDR(0x021A) +#define DANUBE_PPE_MBOX_IGU4_IER DANUBE_PPE_REG_ADDR(0x021B) +/* + * Shared Buffer (SB) Registers + */ +#define DANUBE_PPE_SB_MST_PRI0 DANUBE_PPE_REG_ADDR(0x0300) +#define DANUBE_PPE_SB_MST_PRI1 DANUBE_PPE_REG_ADDR(0x0301) +#define DANUBE_PPE_SB_MST_PRI2 DANUBE_PPE_REG_ADDR(0x0302) +#define DANUBE_PPE_SB_MST_PRI3 DANUBE_PPE_REG_ADDR(0x0303) +#define DANUBE_PPE_SB_MST_PRI4 DANUBE_PPE_REG_ADDR(0x0304) +#define DANUBE_PPE_SB_MST_SEL DANUBE_PPE_REG_ADDR(0x0305) +/* + * RTHA Registers + */ +#define DANUBE_PPE_RFBI_CFG DANUBE_PPE_REG_ADDR(0x0400) +#define DANUBE_PPE_RBA_CFG0 DANUBE_PPE_REG_ADDR(0x0404) +#define DANUBE_PPE_RBA_CFG1 DANUBE_PPE_REG_ADDR(0x0405) +#define DANUBE_PPE_RCA_CFG0 DANUBE_PPE_REG_ADDR(0x0408) +#define DANUBE_PPE_RCA_CFG1 DANUBE_PPE_REG_ADDR(0x0409) +#define DANUBE_PPE_RDES_CFG0 DANUBE_PPE_REG_ADDR(0x040C) +#define DANUBE_PPE_RDES_CFG1 DANUBE_PPE_REG_ADDR(0x040D) +#define DANUBE_PPE_SFSM_STATE0 DANUBE_PPE_REG_ADDR(0x0410) +#define DANUBE_PPE_SFSM_STATE1 DANUBE_PPE_REG_ADDR(0x0411) +#define DANUBE_PPE_SFSM_DBA0 DANUBE_PPE_REG_ADDR(0x0412) +#define DANUBE_PPE_SFSM_DBA1 DANUBE_PPE_REG_ADDR(0x0413) +#define DANUBE_PPE_SFSM_CBA0 DANUBE_PPE_REG_ADDR(0x0414) +#define DANUBE_PPE_SFSM_CBA1 DANUBE_PPE_REG_ADDR(0x0415) +#define DANUBE_PPE_SFSM_CFG0 DANUBE_PPE_REG_ADDR(0x0416) +#define DANUBE_PPE_SFSM_CFG1 DANUBE_PPE_REG_ADDR(0x0417) +#define DANUBE_PPE_SFSM_PGCNT0 DANUBE_PPE_REG_ADDR(0x041C) +#define DANUBE_PPE_SFSM_PGCNT1 DANUBE_PPE_REG_ADDR(0x041D) +/* + * TTHA Registers + */ +#define DANUBE_PPE_FFSM_DBA0 DANUBE_PPE_REG_ADDR(0x0508) +#define DANUBE_PPE_FFSM_DBA1 DANUBE_PPE_REG_ADDR(0x0509) +#define DANUBE_PPE_FFSM_CFG0 DANUBE_PPE_REG_ADDR(0x050A) +#define DANUBE_PPE_FFSM_CFG1 DANUBE_PPE_REG_ADDR(0x050B) +#define DANUBE_PPE_FFSM_IDLE_HEAD_BC0 DANUBE_PPE_REG_ADDR(0x050E) +#define DANUBE_PPE_FFSM_IDLE_HEAD_BC1 DANUBE_PPE_REG_ADDR(0x050F) +#define DANUBE_PPE_FFSM_PGCNT0 DANUBE_PPE_REG_ADDR(0x0514) +#define DANUBE_PPE_FFSM_PGCNT1 DANUBE_PPE_REG_ADDR(0x0515) +/* + * ETOP MDIO Registers + */ +#define DANUBE_PPE_ETOP_MDIO_CFG DANUBE_PPE_REG_ADDR(0x0600) +#define DANUBE_PPE_ETOP_MDIO_ACC DANUBE_PPE_REG_ADDR(0x0601) +#define DANUBE_PPE_ETOP_CFG DANUBE_PPE_REG_ADDR(0x0602) +#define DANUBE_PPE_ETOP_IG_VLAN_COS DANUBE_PPE_REG_ADDR(0x0603) +#define DANUBE_PPE_ETOP_IG_DSCP_COS3 DANUBE_PPE_REG_ADDR(0x0604) +#define DANUBE_PPE_ETOP_IG_DSCP_COS2 DANUBE_PPE_REG_ADDR(0x0605) +#define DANUBE_PPE_ETOP_IG_DSCP_COS1 DANUBE_PPE_REG_ADDR(0x0606) +#define DANUBE_PPE_ETOP_IG_DSCP_COS0 DANUBE_PPE_REG_ADDR(0x0607) +#define DANUBE_PPE_ETOP_IG_PLEN_CTRL0 DANUBE_PPE_REG_ADDR(0x0608) +#define DANUBE_PPE_ETOP_IG_PLEN_CTRL1 DANUBE_PPE_REG_ADDR(0x0609) +#define DANUBE_PPE_ETOP_ISR DANUBE_PPE_REG_ADDR(0x060A) +#define DANUBE_PPE_ETOP_IER DANUBE_PPE_REG_ADDR(0x060B) +#define DANUBE_PPE_ETOP_VPID DANUBE_PPE_REG_ADDR(0x060C) +#define DANUBE_PPE_ENET_MAC_CFG DANUBE_PPE_REG_ADDR(0x0610) +#define DANUBE_PPE_ENETS_DBA DANUBE_PPE_REG_ADDR(0x0612) +#define DANUBE_PPE_ENETS_CBA DANUBE_PPE_REG_ADDR(0x0613) +#define DANUBE_PPE_ENETS_CFG DANUBE_PPE_REG_ADDR(0x0614) +#define DANUBE_PPE_ENETS_PGCNT DANUBE_PPE_REG_ADDR(0x0615) +#define DANUBE_PPE_ENETS_PGCNT_DSRC_PP32 (0x00020000) +#define DANUBE_PPE_ENETS_PGCNT_DVAL_SHIFT (9) +#define DANUBE_PPE_ENETS_PGCNT_DCMD (0x00000100) +#define DANUBE_PPE_ENETS_PKTCNT DANUBE_PPE_REG_ADDR(0x0616) +#define DANUBE_PPE_ENETS_PKTCNT_DSRC_PP32 (0x00000200) +#define DANUBE_PPE_ENETS_PKTCNT_DCMD (0x00000100) +#define DANUBE_PPE_ENETS_PKTCNT_UPKT (0x000000FF) +#define DANUBE_PPE_ENETS_BUF_CTRL DANUBE_PPE_REG_ADDR(0x0617) +#define DANUBE_PPE_ENETS_COS_CFG DANUBE_PPE_REG_ADDR(0x0618) +#define DANUBE_PPE_ENETS_IGDROP DANUBE_PPE_REG_ADDR(0x0619) +#define DANUBE_PPE_ENETF_DBA DANUBE_PPE_REG_ADDR(0x0630) +#define DANUBE_PPE_ENETF_CBA DANUBE_PPE_REG_ADDR(0x0631) +#define DANUBE_PPE_ENETF_CFG DANUBE_PPE_REG_ADDR(0x0632) +#define DANUBE_PPE_ENETF_PGCNT DANUBE_PPE_REG_ADDR(0x0633) +#define DANUBE_PPE_ENETF_PGCNT_ISRC_PP32 (0x00020000) +#define DANUBE_PPE_ENETF_PGCNT_IVAL_SHIFT (9) +#define DANUBE_PPE_ENETF_PGCNT_ICMD (0x00000100) +#define DANUBE_PPE_ENETF_PKTCNT DANUBE_PPE_REG_ADDR(0x0634) +#define DANUBE_PPE_ENETF_PKTCNT_ISRC_PP32 (0x00000200) +#define DANUBE_PPE_ENETF_PKTCNT_ICMD (0x00000100) +#define DANUBE_PPE_ENETF_PKTCNT_VPKT (0x000000FF) +#define DANUBE_PPE_ENETF_HFCTRL DANUBE_PPE_REG_ADDR(0x0635) +#define DANUBE_PPE_ENETF_TXCTRL DANUBE_PPE_REG_ADDR(0x0636) +#define DANUBE_PPE_ENETF_VLCOS0 DANUBE_PPE_REG_ADDR(0x0638) +#define DANUBE_PPE_ENETF_VLCOS1 DANUBE_PPE_REG_ADDR(0x0639) +#define DANUBE_PPE_ENETF_VLCOS2 DANUBE_PPE_REG_ADDR(0x063A) +#define DANUBE_PPE_ENETF_VLCOS3 DANUBE_PPE_REG_ADDR(0x063B) +#define DANUBE_PPE_ENETF_EGERR DANUBE_PPE_REG_ADDR(0x063C) +#define DANUBE_PPE_ENETF_EGDROP DANUBE_PPE_REG_ADDR(0x063D) +/* + * DPLUS Registers + */ +#define DANUBE_PPE_DPLUS_TXDB DANUBE_PPE_REG_ADDR(0x0700) +#define DANUBE_PPE_DPLUS_TXCB DANUBE_PPE_REG_ADDR(0x0701) +#define DANUBE_PPE_DPLUS_TXCFG DANUBE_PPE_REG_ADDR(0x0702) +#define DANUBE_PPE_DPLUS_TXPGCNT DANUBE_PPE_REG_ADDR(0x0703) +#define DANUBE_PPE_DPLUS_RXDB DANUBE_PPE_REG_ADDR(0x0710) +#define DANUBE_PPE_DPLUS_RXCB DANUBE_PPE_REG_ADDR(0x0711) +#define DANUBE_PPE_DPLUS_RXCFG DANUBE_PPE_REG_ADDR(0x0712) +#define DANUBE_PPE_DPLUS_RXPGCNT DANUBE_PPE_REG_ADDR(0x0713) +/* + * BMC Registers + */ +#define DANUBE_PPE_BMC_CMD3 DANUBE_PPE_REG_ADDR(0x0800) +#define DANUBE_PPE_BMC_CMD2 DANUBE_PPE_REG_ADDR(0x0801) +#define DANUBE_PPE_BMC_CMD1 DANUBE_PPE_REG_ADDR(0x0802) +#define DANUBE_PPE_BMC_CMD0 DANUBE_PPE_REG_ADDR(0x0803) +#define DANUBE_PPE_BMC_CFG0 DANUBE_PPE_REG_ADDR(0x0804) +#define DANUBE_PPE_BMC_CFG1 DANUBE_PPE_REG_ADDR(0x0805) +#define DANUBE_PPE_BMC_POLY0 DANUBE_PPE_REG_ADDR(0x0806) +#define DANUBE_PPE_BMC_POLY1 DANUBE_PPE_REG_ADDR(0x0807) +#define DANUBE_PPE_BMC_CRC0 DANUBE_PPE_REG_ADDR(0x0808) +#define DANUBE_PPE_BMC_CRC1 DANUBE_PPE_REG_ADDR(0x0809) +/* + * SLL Registers + */ +#define DANUBE_PPE_SLL_CMD1 DANUBE_PPE_REG_ADDR(0x0900) +#define DANUBE_PPE_SLL_CMD0 DANUBE_PPE_REG_ADDR(0x0901) +#define DANUBE_PPE_SLL_KEY0 DANUBE_PPE_REG_ADDR(0x0910) +#define DANUBE_PPE_SLL_KEY1 DANUBE_PPE_REG_ADDR(0x0911) +#define DANUBE_PPE_SLL_KEY2 DANUBE_PPE_REG_ADDR(0x0912) +#define DANUBE_PPE_SLL_KEY3 DANUBE_PPE_REG_ADDR(0x0913) +#define DANUBE_PPE_SLL_KEY4 DANUBE_PPE_REG_ADDR(0x0914) +#define DANUBE_PPE_SLL_KEY5 DANUBE_PPE_REG_ADDR(0x0915) +#define DANUBE_PPE_SLL_RESULT DANUBE_PPE_REG_ADDR(0x0920) +/* + * EMA Registers + */ +#define DANUBE_PPE_EMA_CMD2 DANUBE_PPE_REG_ADDR(0x0A00) +#define DANUBE_PPE_EMA_CMD1 DANUBE_PPE_REG_ADDR(0x0A01) +#define DANUBE_PPE_EMA_CMD0 DANUBE_PPE_REG_ADDR(0x0A02) +#define DANUBE_PPE_EMA_ISR DANUBE_PPE_REG_ADDR(0x0A04) +#define DANUBE_PPE_EMA_IER DANUBE_PPE_REG_ADDR(0x0A05) +#define DANUBE_PPE_EMA_CFG DANUBE_PPE_REG_ADDR(0x0A06) +/* + * UTPS Registers + */ +#define DANUBE_PPE_UTP_TXCA0 DANUBE_PPE_REG_ADDR(0x0B00) +#define DANUBE_PPE_UTP_TXNA0 DANUBE_PPE_REG_ADDR(0x0B01) +#define DANUBE_PPE_UTP_TXCA1 DANUBE_PPE_REG_ADDR(0x0B02) +#define DANUBE_PPE_UTP_TXNA1 DANUBE_PPE_REG_ADDR(0x0B03) +#define DANUBE_PPE_UTP_RXCA0 DANUBE_PPE_REG_ADDR(0x0B10) +#define DANUBE_PPE_UTP_RXNA0 DANUBE_PPE_REG_ADDR(0x0B11) +#define DANUBE_PPE_UTP_RXCA1 DANUBE_PPE_REG_ADDR(0x0B12) +#define DANUBE_PPE_UTP_RXNA1 DANUBE_PPE_REG_ADDR(0x0B13) +#define DANUBE_PPE_UTP_CFG DANUBE_PPE_REG_ADDR(0x0B20) +#define DANUBE_PPE_UTP_ISR DANUBE_PPE_REG_ADDR(0x0B30) +#define DANUBE_PPE_UTP_IER DANUBE_PPE_REG_ADDR(0x0B31) +/* + * QSB Registers + */ +#define DANUBE_PPE_QSB_RELOG DANUBE_PPE_REG_ADDR(0x0C00) +#define DANUBE_PPE_QSB_EMIT0 DANUBE_PPE_REG_ADDR(0x0C01) +#define DANUBE_PPE_QSB_EMIT1 DANUBE_PPE_REG_ADDR(0x0C02) +#define DANUBE_PPE_QSB_ICDV DANUBE_PPE_REG_ADDR(0x0C07) +#define DANUBE_PPE_QSB_SBL DANUBE_PPE_REG_ADDR(0x0C09) +#define DANUBE_PPE_QSB_CFG DANUBE_PPE_REG_ADDR(0x0C0A) +#define DANUBE_PPE_QSB_RTM DANUBE_PPE_REG_ADDR(0x0C0B) +#define DANUBE_PPE_QSB_RTD DANUBE_PPE_REG_ADDR(0x0C0C) +#define DANUBE_PPE_QSB_RAMAC DANUBE_PPE_REG_ADDR(0x0C0D) +#define DANUBE_PPE_QSB_ISTAT DANUBE_PPE_REG_ADDR(0x0C0E) +#define DANUBE_PPE_QSB_IMR DANUBE_PPE_REG_ADDR(0x0C0F) +#define DANUBE_PPE_QSB_SRC DANUBE_PPE_REG_ADDR(0x0C10) +/* + * DSP User Registers + */ +#define DANUBE_PPE_DREG_A_VERSION DANUBE_PPE_REG_ADDR(0x0D00) +#define DANUBE_PPE_DREG_A_CFG DANUBE_PPE_REG_ADDR(0x0D01) +#define DANUBE_PPE_DREG_AT_CTRL DANUBE_PPE_REG_ADDR(0x0D02) +#define DANUBE_PPE_DREG_AR_CTRL DANUBE_PPE_REG_ADDR(0x0D08) +#define DANUBE_PPE_DREG_A_UTPCFG DANUBE_PPE_REG_ADDR(0x0D0E) +#define DANUBE_PPE_DREG_A_STATUS DANUBE_PPE_REG_ADDR(0x0D0F) +#define DANUBE_PPE_DREG_AT_CFG0 DANUBE_PPE_REG_ADDR(0x0D20) +#define DANUBE_PPE_DREG_AT_CFG1 DANUBE_PPE_REG_ADDR(0x0D21) +#define DANUBE_PPE_DREG_FB_SIZE0 DANUBE_PPE_REG_ADDR(0x0D22) +#define DANUBE_PPE_DREG_FB_SIZE1 DANUBE_PPE_REG_ADDR(0x0D23) +#define DANUBE_PPE_DREG_AT_CELL0 DANUBE_PPE_REG_ADDR(0x0D24) +#define DANUBE_PPE_DREG_AT_CELL1 DANUBE_PPE_REG_ADDR(0x0D25) +#define DANUBE_PPE_DREG_AT_IDLE_CNT0 DANUBE_PPE_REG_ADDR(0x0D26) +#define DANUBE_PPE_DREG_AT_IDLE_CNT1 DANUBE_PPE_REG_ADDR(0x0D27) +#define DANUBE_PPE_DREG_AT_IDLE0 DANUBE_PPE_REG_ADDR(0x0D28) +#define DANUBE_PPE_DREG_AT_IDLE1 DANUBE_PPE_REG_ADDR(0x0D29) +#define DANUBE_PPE_DREG_AR_CFG0 DANUBE_PPE_REG_ADDR(0x0D60) +#define DANUBE_PPE_DREG_AR_CFG1 DANUBE_PPE_REG_ADDR(0x0D61) +#define DANUBE_PPE_DREG_AR_FB_START0 DANUBE_PPE_REG_ADDR(0x0D62) +#define DANUBE_PPE_DREG_AR_FB_START1 DANUBE_PPE_REG_ADDR(0x0D63) +#define DANUBE_PPE_DREG_AR_FB_END0 DANUBE_PPE_REG_ADDR(0x0D64) +#define DANUBE_PPE_DREG_AR_FB_END1 DANUBE_PPE_REG_ADDR(0x0D65) +#define DANUBE_PPE_DREG_AR_ATM_STAT0 DANUBE_PPE_REG_ADDR(0x0D66) +#define DANUBE_PPE_DREG_AR_ATM_STAT1 DANUBE_PPE_REG_ADDR(0x0D67) +#define DANUBE_PPE_DREG_AR_CELL0 DANUBE_PPE_REG_ADDR(0x0D68) +#define DANUBE_PPE_DREG_AR_CELL1 DANUBE_PPE_REG_ADDR(0x0D69) +#define DANUBE_PPE_DREG_AR_IDLE_CNT0 DANUBE_PPE_REG_ADDR(0x0D6A) +#define DANUBE_PPE_DREG_AR_IDLE_CNT1 DANUBE_PPE_REG_ADDR(0x0D6B) +#define DANUBE_PPE_DREG_AR_AIIDLE_CNT0 DANUBE_PPE_REG_ADDR(0x0D6C) +#define DANUBE_PPE_DREG_AR_AIIDLE_CNT1 DANUBE_PPE_REG_ADDR(0x0D6D) +#define DANUBE_PPE_DREG_AR_BE_CNT0 DANUBE_PPE_REG_ADDR(0x0D6E) +#define DANUBE_PPE_DREG_AR_BE_CNT1 DANUBE_PPE_REG_ADDR(0x0D6F) +#define DANUBE_PPE_DREG_AR_HEC_CNT0 DANUBE_PPE_REG_ADDR(0x0D70) +#define DANUBE_PPE_DREG_AR_HEC_CNT1 DANUBE_PPE_REG_ADDR(0x0D71) +#define DANUBE_PPE_DREG_AR_CD_CNT0 DANUBE_PPE_REG_ADDR(0x0D72) +#define DANUBE_PPE_DREG_AR_CD_CNT1 DANUBE_PPE_REG_ADDR(0x0D73) +#define DANUBE_PPE_DREG_AR_IDLE0 DANUBE_PPE_REG_ADDR(0x0D74) +#define DANUBE_PPE_DREG_AR_IDLE1 DANUBE_PPE_REG_ADDR(0x0D75) +#define DANUBE_PPE_DREG_AR_DELIN0 DANUBE_PPE_REG_ADDR(0x0D76) +#define DANUBE_PPE_DREG_AR_DELIN1 DANUBE_PPE_REG_ADDR(0x0D77) +#define DANUBE_PPE_DREG_RESV0 DANUBE_PPE_REG_ADDR(0x0D78) +#define DANUBE_PPE_DREG_RESV1 DANUBE_PPE_REG_ADDR(0x0D79) +#define DANUBE_PPE_DREG_RX_MIB_CMD0 DANUBE_PPE_REG_ADDR(0x0D80) +#define DANUBE_PPE_DREG_RX_MIB_CMD1 DANUBE_PPE_REG_ADDR(0x0D81) +#define DANUBE_PPE_DREG_AR_OVDROP_CNT0 DANUBE_PPE_REG_ADDR(0x0D98) +#define DANUBE_PPE_DREG_AR_OVDROP_CNT1 DANUBE_PPE_REG_ADDR(0x0D99) + + +/************************************************************************/ +/* Module : PPE register address and bits */ +/************************************************************************/ +#define DANUBE_PPE32_BASE 0xBE180000 +#define DANUBE_PPE32_DEBUG_BREAK_TRACE_REG (DANUBE_PPE32_BASE + (0x0000 * 4)) +#define DANUBE_PPE32_INT_MASK_STATUS_REG (DANUBE_PPE32_BASE + (0x0030 * 4)) +#define DANUBE_PPE32_INT_RESOURCE_REG (DANUBE_PPE32_BASE + (0x0040 * 4)) +#define DANUBE_PPE32_CDM_CODE_MEM_B0 (DANUBE_PPE32_BASE + (0x1000 * 4)) +#define DANUBE_PPE32_CDM_CODE_MEM_B1 (DANUBE_PPE32_BASE + (0x2000 * 4)) +#define DANUBE_PPE32_DATA_MEM_MAP_REG_BASE (DANUBE_PPE32_BASE + (0x4000 * 4)) + +/* + * ETOP MDIO Registers + */ +#define ETOP_MDIO_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0600 * 4))) +#define ETOP_MDIO_ACC ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0601 * 4))) +#define ETOP_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0602 * 4))) +#define ETOP_IG_VLAN_COS ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0603 * 4))) +#define ETOP_IG_DSCP_COS3 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0604 * 4))) +#define ETOP_IG_DSCP_COS2 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0605 * 4))) +#define ETOP_IG_DSCP_COS1 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0606 * 4))) +#define ETOP_IG_DSCP_COS0 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0607 * 4))) +#define ETOP_IG_PLEN_CTRL ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0608 * 4))) +#define ETOP_ISR ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x060A * 4))) +#define ETOP_IER ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x060B * 4))) +#define ETOP_VPID ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x060C * 4))) +#define ENET_MAC_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0610 * 4))) +#define ENETS_DBA ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0612 * 4))) +#define ENETS_CBA ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0613 * 4))) +#define ENETS_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0614 * 4))) +#define ENETS_PGCNT ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0615 * 4))) +#define ENETS_PKTCNT ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0616 * 4))) +#define ENETS_BUF_CTRL ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0617 * 4))) +#define ENETS_COS_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0618 * 4))) +#define ENETS_IGDROP ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0619 * 4))) +#define ENETS_IGERR ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x061A * 4))) +#define ENET_MAC_DA0 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x061B * 4))) +#define ENET_MAC_DA1 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x061C * 4))) + +#define ENETF_DBA ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0630 * 4))) +#define ENETF_CBA ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0631 * 4))) +#define ENETF_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0632 * 4))) +#define ENETF_PGCNT ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0633 * 4))) +#define ENETF_PKTCNT ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0634 * 4))) +#define ENETF_HFCTRL ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0635 * 4))) +#define ENETF_TXCTRL ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0636 * 4))) + +#define ENETF_VLCOS0 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0638 * 4))) +#define ENETF_VLCOS1 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0639 * 4))) +#define ENETF_VLCOS2 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x063A * 4))) +#define ENETF_VLCOS3 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x063B * 4))) +#define ENETF_EGERR ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x063C * 4))) +#define ENETF_EGDROP ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x063D * 4))) + + +/* + * ETOP MDIO Registers + */ +#define DANUBE_PPE32_ETOP_MDIO_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0600 * 4))) +#define DANUBE_PPE32_ETOP_MDIO_ACC ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0601 * 4))) +#define DANUBE_PPE32_ETOP_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0602 * 4))) +#define DANUBE_PPE32_ETOP_IG_VLAN_COS ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0603 * 4))) +#define DANUBE_PPE32_ETOP_IG_DSCP_COS3 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0604 * 4))) +#define DANUBE_PPE32_ETOP_IG_DSCP_COS2 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0605 * 4))) +#define DANUBE_PPE32_ETOP_IG_DSCP_COS1 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0606 * 4))) +#define DANUBE_PPE32_ETOP_IG_DSCP_COS0 ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0607 * 4))) +#define DANUBE_PPE32_ETOP_IG_PLEN_CTRL ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0608 * 4))) +#define DANUBE_PPE32_ETOP_ISR ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x060A * 4))) +#define DANUBE_PPE32_ETOP_IER ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x060B * 4))) +#define DANUBE_PPE32_ETOP_VPID ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x060C * 4))) + + +/* ENET Register */ +#define DANUBE_PPE32_ENET_MAC_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0610 * 4))) +#define DANUBE_PPE32_ENET_IG_PKTDROP ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0619 * 4))) +#define DANUBE_PPE32_ENET_CoS_CFG ((volatile u32 *)(DANUBE_PPE32_DATA_MEM_MAP_REG_BASE + (0x0618 * 4))) + +/*********LED register definition****************/ + +#define DANUBE_LED 0xBE100BB0 +#define DANUBE_LED_CON0 ((volatile u32*)(DANUBE_LED + 0x0000)) +#define DANUBE_LED_CON1 ((volatile u32*)(DANUBE_LED + 0x0004)) +#define DANUBE_LED_CPU0 ((volatile u32*)(DANUBE_LED + 0x0008)) +#define DANUBE_LED_CPU1 ((volatile u32*)(DANUBE_LED + 0x000C)) +#define DANUBE_LED_AR ((volatile u32*)(DANUBE_LED + 0x0010)) + + + + +/***********************************************************************/ +#define DANUBE_REG32(addr) *((volatile u32 *)(addr)) +/***********************************************************************/ +#endif //DANUBE_H diff --git a/package/uboot-lantiq/files/include/configs/easy50712.h b/package/uboot-lantiq/files/include/configs/easy50712.h new file mode 100644 index 000000000..e061b831d --- /dev/null +++ b/package/uboot-lantiq/files/include/configs/easy50712.h @@ -0,0 +1,115 @@ +/* + * (C) Copyright 2003-2005 + * Wolfgang Denk, DENX Software Engineering, wd@denx.de. + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +/* + * This file contains the configuration parameters for the Danube reference board. + */ + +#ifndef __CONFIG_H +#define __CONFIG_H + +/* #define DEBUG */ + +#define CONFIG_MIPS32 1 /* MIPS32 CPU compatible */ +#define CONFIG_MIPS24KEC 1 /* MIPS 24KEc CPU core */ +#define CONFIG_DANUBE 1 /* in a Danube/Twinpass Chip */ +#define CONFIG_EASY50712 1 /* on the Danube Reference Board */ + +#define CONFIG_SYS_MIPS_MULTI_CPU 1 /* This is a multi cpu system */ + +#define CONFIG_SYS_MAX_RAM 32*1024*1024 + +#define CONFIG_FLASH_CFI_DRIVER 1 + +#define CONFIG_SYS_INIT_RAM_LOCK_MIPS +#ifdef CONFIG_SYS_RAMBOOT + //#warning CONFIG_SYS_RAMBOOT + #define CONFIG_SKIP_LOWLEVEL_INIT +#else /* CONFIG_SYS_RAMBOOT */ + + #define CONFIG_SYS_EBU_BOOT + + #ifdef CONFIG_USE_DDR_RAM + /* FIXME: should not need these workarounds */ + #define DANUBE_DDR_RAM_SIZE 32 /* 32M DDR-DRAM for reference board */ + #endif + + #define INFINEON_EBU_BOOTCFG 0x688C688C /* CMULT = 8 for 150 MHz */ + +#endif /* CONFIG_SYS_RAMBOOT */ + +#if 1 +#ifndef CPU_CLOCK_RATE +#define CPU_CLOCK_RATE (ifx_get_cpuclk()) +#endif +#endif + +#define CONFIG_SYS_PROMPT "DANUBE => " /* Monitor Command Prompt */ + +#undef CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ + +/* + * Include common defines/options for all Infineon boards + */ +#include "ifx-common.h" + +/* + * Cache Configuration (cpu/chip specific, Danube) + */ +#define CONFIG_SYS_DCACHE_SIZE 16384 +#define CONFIG_SYS_ICACHE_SIZE 16384 +#define CONFIG_SYS_CACHELINE_SIZE 32 +#define CONFIG_SYS_MIPS_CACHE_OPER_MODE CONF_CM_CACHABLE_NO_WA + +#define CONFIG_NET_MULTI +#if 0 +#define CONFIG_M4530_ETH +#define CONFIG_M4530_FPGA +#endif + +#define CONFIG_IFX_ETOP +#define CLK_OUT2_25MHZ +#define CONFIG_EXTRA_SWITCH + +#define CONFIG_RMII /* use interface in RMII mode */ + +#define CONFIG_MII +#define CONFIG_CMD_MII + +#define CONFIG_IFX_ASC + +#ifdef CONFIG_USE_ASC0 +#define CONFIG_SYS_IFX_ASC_BASE 0x1E100400 +#else +#define CONFIG_SYS_IFX_ASC_BASE 0x1E100C00 +#endif + +#ifdef CONFIG_SYS_RAMBOOT +/* Configuration of EBU: */ +/* starting address from 0xb0000000 */ +/* make the flash available from RAM boot */ +# define CONFIG_EBU_ADDSEL0 0x10000031 +# define CONFIG_EBU_BUSCON0 0x0001D7FF +#endif + +#endif /* __CONFIG_H */ diff --git a/package/uboot-lantiq/files/include/configs/ifx-common.h b/package/uboot-lantiq/files/include/configs/ifx-common.h new file mode 100644 index 000000000..88569ada9 --- /dev/null +++ b/package/uboot-lantiq/files/include/configs/ifx-common.h @@ -0,0 +1,192 @@ +/* + * (C) Copyright 2008 + * Stefan Roese, DENX Software Engineering, sr@denx.de. + * + * Common configuration options for all AMCC boards + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __IFX_COMMON_H +#define __IFX_COMMON_H + +#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */ + +#define CONFIG_BAUDRATE 115200 + +/* valid baudrates */ +#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 } + +#define CONFIG_TIMESTAMP /* Print image info with timestamp */ + +#define CONFIG_PREBOOT "echo;" \ + "echo Type \\\"run flash_nfs\\\" to mount root filesystem over NFS;" \ + "echo" + +#undef CONFIG_BOOTARGS +#define CONFIG_EXTRA_ENV_SETTINGS \ + "ram_addr=0x80500000\0" \ + "kernel_addr=0xb0050000\0" \ + "mtdparts=mtdparts=ifx-nor:256k(uboot)ro,64k(uboot_env)ro,64k(kernel),-(rootfs)\0" \ + "flashargs=setenv bootargs rootfstype=squashfs,jffs2\0" \ + "nfsargs=setenv bootargs root=/dev/nfs rw " \ + "nfsroot=${serverip}:${rootpath} \0" \ + "addip=setenv bootargs ${bootargs} " \ + "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ + ":${hostname}:${netdev}:off\0" \ + "addmisc=setenv bootargs ${bootargs} init=/etc/preinit " \ + "console=ttyS1,115200 ethaddr=${ethaddr} ${mtdparts}" \ + "${mtdparts}\0" \ + "flash_flash=run flashargs addip addmisc;" \ + "bootm ${kernel_addr}\0" \ + "flash_nfs=run nfsargs addip addmisc;bootm ${kernel_addr}\0" \ + "net_flash=run load_kernel flashargs addip addmisc;" \ + "bootm ${ram_addr}\0" \ + "net_nfs=run load_kernel nfsargs addip addmisc;" \ + "bootm ${ram_addr}\0" \ + "load_kernel=tftp ${ram_addr} " \ + "${tftppath}openwrt-ifxmips-uImage\0" \ + "update_uboot=tftp 0x80500000 ${tftppath}u-boot.bin;era 0xb0000000 +${filesize};" \ + "cp.b 0x80500000 0xb0000000 ${filesize}\0" \ + "update_openwrt=tftp ${ram_addr} " \ + "${tftppath}openwrt-ifxmips-squashfs.image;" \ + "era ${kernel_addr} +${filesize};" \ + "cp.b ${ram_addr} ${kernel_addr} ${filesize}\0" + +#define CONFIG_BOOTCOMMAND "run flash_flash" + +/* + * TFTP is using fragmented packets +*/ +#define CONFIG_IP_DEFRAG + +/* + * BOOTP options + */ +#define CONFIG_BOOTP_BOOTFILESIZE +#define CONFIG_BOOTP_BOOTPATH +#define CONFIG_BOOTP_GATEWAY +#define CONFIG_BOOTP_HOSTNAME + + +/* + * Command line configuration. + */ +#include + +#undef CONFIG_CMD_CONSOLE +#undef CONFIG_CMD_FPGA +#undef CONFIG_CMD_IMLS +#undef CONFIG_CMD_LOADB +#undef CONFIG_CMD_LOADS +#undef CONFIG_CMD_NFS +#undef CONFIG_CMD_XIMG + +//#define CONFIG_CMD_ASKENV +//#define CONFIG_CMD_DHCP +//#define CONFIG_CMD_ELF +#define CONFIG_CMD_PING +//#define CONFIG_CMD_JFFS2 +//#define CONFIG_CMD_SNTP + + +/* + * Miscellaneous configurable options + */ + +#define CONFIG_LZMA + +#define CONFIG_SYS_LONGHELP /* undef to save memory */ +#ifndef CONFIG_SYS_PROMPT +#define CONFIG_SYS_PROMPT "=> " /* Monitor Command Prompt */ +#endif +#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ +#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */ +#define CONFIG_SYS_MAXARGS 16 /* max number of command args */ + +#define CONFIG_SYS_MALLOC_LEN 1024*1024 +#define CONFIG_SYS_BOOTPARAMS_LEN 128*1024 + +#define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE/2) +#define CONFIG_SYS_HZ 1000 + +#define CONFIG_SYS_SDRAM_BASE 0x80000000 +#define CONFIG_SYS_LOAD_ADDR 0x80100000 /* default load address */ +#define CONFIG_SYS_MEMTEST_START 0x80100000 +#define CONFIG_SYS_MEMTEST_END 0x80800000 + +#define CONFIG_CMDLINE_EDITING /* add command line history */ +#define CONFIG_AUTO_COMPLETE /* add autocompletion support */ + +#define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */ +#define CONFIG_VERSION_VARIABLE /* include version env variable */ +#define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/ + +#ifdef CONFIG_SYS_HUSH_PARSER +#define CONFIG_SYS_PROMPT_HUSH_PS2 "> " +#endif + +#define CONFIG_LOADS_ECHO /* echo on for serial download */ +#define CONFIG_SYS_LOADS_BAUD_CHANGE /* allow baudrate change */ + +/*----------------------------------------------------------------------- + * FLASH and environment organization + */ + +#define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1 + +#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ +#define CONFIG_SYS_MAX_FLASH_SECT (140) /* max number of sectors on one chip */ + +#define PHYS_FLASH_1 0xB0000000 /* Flash Bank #1 */ +#define PHYS_FLASH_2 0xB0800000 /* Flash Bank #2 */ + +/* The following #defines are needed to get flash environment right */ +#define CONFIG_SYS_MONITOR_BASE TEXT_BASE +#define CONFIG_SYS_MONITOR_LEN (192 << 10) + +#define CONFIG_SYS_INIT_SP_OFFSET 0x400000 + +#define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1 + +#define CONFIG_ENV_OVERWRITE 1 +#define CONFIG_ENV_IS_IN_FLASH 1 + +/* Address and size of Primary Environment Sector */ +#define CONFIG_ENV_ADDR 0xB0040000 +#define CONFIG_ENV_SIZE 0x10000 + +#ifdef CONFIG_FLASH_CFI_DRIVER +#define CONFIG_SYS_FLASH_CFI +#define CONFIG_SYS_FLASH_SWAP_ADDR +#define CONFIG_FLASH_SHOW_PROGRESS 45 + +#define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT + +#define FLASH_FIXUP_ADDR_8(addr) ((void*)((ulong)(addr)^2)) +#define FLASH_FIXUP_ADDR_16(addr) ((void*)((ulong)(addr)^2)) + +#endif + +#define CONFIG_NR_DRAM_BANKS 1 + +#ifdef CONFIG_SYS_EBU_BOOT +#ifndef INFINEON_EBU_BOOTCFG +#error Please define INFINEON_EBU_BOOTCFG +#endif +#endif + +#endif /* __IFX_COMMON_H */ diff --git a/package/uboot-lantiq/gct b/package/uboot-lantiq/gct new file mode 100755 index 000000000..4054c15f5 --- /dev/null +++ b/package/uboot-lantiq/gct @@ -0,0 +1,165 @@ +#!/usr/bin/perl + +#use strict; +#use Cwd; +#use Env; + +my $aline; +my $lineid; +my $length; +my $address; +my @bytes; +my $addstr; +my $chsum=0; +my $count=0; +my $firstime=1; +my $i; +my $currentaddr; +my $tmp; +my $holder=""; +my $loadaddr; + +if(@ARGV < 2){ + die("\n Syntax: ./program_SDRAM input1(memory setup) input2(*\.srec) output\n"); +} + +open(INFILE1, "<$ARGV[0]") || die("\ninput1 open fail\n"); +open(INFILE2, "<$ARGV[1]") || die("\ninput2 open fail\n"); +open(OUTFILE, ">$ARGV[2]") || die("\nOutput file open fail\n"); + +$i=0; +while ($line = ){ + if($line=~/\w/){ + if($line!~/[;#\*]/){ + if($i eq 0){ + printf OUTFILE ("33333333"); + } + chomp($line); + $line=~s/\t//; + @array=split(/ +/,$line); + $j=0; + while(@array[$j]!~/\w/){ + $j=$j+1; + } + $addr=@array[$j]; + $regval=@array[$j+1]; + $addr=~s/0x//; + $regval=~s/0x//; + printf OUTFILE ("%08x%08x",hex($addr),hex($regval)); + $i=$i+1; + if($i eq 8){ + $i=0; + printf OUTFILE ("\n"); + } + } + } +} + +while($i lt 8 && $i gt 0){ + printf OUTFILE "00"x8; + $i=$i+1; +} + +if($i eq 8){ + printf OUTFILE ("\n"); +} + +while($aline=){ + $aline=uc($aline); + chomp($aline); + next if(($aline=~/^S0/) || ($aline=~/^S7/)); + ($lineid, $length, $address, @bytes) = unpack"A2A2A8"."A2"x300, $aline; + $length = hex($length); + $address = hex($address); + $length -=5; + $i=0; + + while($length>0){ + if($firstime==1){ + $addstr = sprintf("%x", $address); + $addstr = "0"x(8-length($addstr)).$addstr; + print OUTFILE $addstr; + addchsum($addstr); + $firstime=0; + $currentaddr=$address; + $loadaddr = $addstr; + } + else{ + if($count==64){ + $addstr = sprintf("%x", $currentaddr); + $addstr = "0"x(8-length($addstr)).$addstr; + print OUTFILE $addstr; + addchsum($addstr); + $count=0; + } + #printf("*** %x != %x\n", $address, $currentaddr) if $address != $currentaddr; + } + if($currentaddr < $address) { + print OUTFILE "00"; + addchsum("00"); + $count++; + $currentaddr++; + } + else { + while($count<64){ + $bytes[$i]=~tr/ABCDEF/abcdef/; + print OUTFILE "$bytes[$i]"; + addchsum($bytes[$i]); + $i++; + $count++; + $currentaddr++; + $length--; + last if($length==0); + } + } + if($count==64){ + print OUTFILE "\n"; + #print OUTFILE "\r"; + } + } +} +if($count != 64){ + $tmp = "00"; + for($i=0;$i<(64-$count);$i++){ + print OUTFILE "00"; + addchsum($tmp); + } + print OUTFILE "\n"; + #print OUTFILE "\r"; +} + + +print OUTFILE "11"x4; +use integer; +$chsum=$chsum & 0xffffffff; +$chsum = sprintf("%X", $chsum); +$chsum = "0"x(8-length($chsum)).$chsum; +$chsum =~tr/ABCDEF/abcdef/; +print OUTFILE $chsum; +print OUTFILE "00"x60; +print OUTFILE "\n"; +#print OUTFILE "\r"; + +print OUTFILE "99"x4; +print OUTFILE $loadaddr; +print OUTFILE "00"x60; +print OUTFILE "\n"; +#print OUTFILE "\r"; + + +close OUTFILE; +#END of Program + + + +sub addchsum{ + my $cc=$_[0]; + $holder=$holder.$cc; + if(length($holder)==8){ + $holder = hex($holder); + $chsum+=$holder; + $holder=""; + } +} +#END + diff --git a/package/uboot-lantiq/patches/000-build-infos.patch b/package/uboot-lantiq/patches/000-build-infos.patch new file mode 100644 index 000000000..2afcc4c12 --- /dev/null +++ b/package/uboot-lantiq/patches/000-build-infos.patch @@ -0,0 +1,54 @@ +Add output like in linux kernel for current compiled file +Used normaly in combination with make option -s + +Like in following example: + +$ make -s V=1 +[CC] tools/img2srec.c +[CC] tools/bmp_logo.c +[CC] examples/hello_world.c +--- a/config.mk ++++ b/config.mk +@@ -206,17 +206,42 @@ export TEXT_BASE PLATFORM_CPPFLAGS PLATF + + ######################################################################### + ++ifndef KBUILD_VERBOSE ++ KBUILD_VERBOSE:=0 ++endif ++ifeq ("$(origin V)", "command line") ++ KBUILD_VERBOSE:=$(V) ++endif ++ifeq (,$(findstring s,$(MAKEFLAGS))) ++ KBUILD_VERBOSE:=0 ++endif ++ ++ifneq ($(KBUILD_VERBOSE),0) ++ define MESSAGE ++ @printf " %s %s/%s\n" $(1) $(2) $(3) ++ endef ++else ++ define MESSAGE ++ endef ++endif ++ + # Allow boards to use custom optimize flags on a per dir/file basis + BCURDIR := $(notdir $(CURDIR)) ++ + $(obj)%.s: %.S ++ $(call MESSAGE, [CPP],$(subst $(SRCTREE)/,,$(CURDIR)),$<) + $(CPP) $(AFLAGS) $(AFLAGS_$(@F)) $(AFLAGS_$(BCURDIR)) -o $@ $< + $(obj)%.o: %.S ++ $(call MESSAGE, [AS], $(subst $(SRCTREE)/,,$(CURDIR)),$<) + $(CC) $(AFLAGS) $(AFLAGS_$(@F)) $(AFLAGS_$(BCURDIR)) -o $@ $< -c + $(obj)%.o: %.c ++ $(call MESSAGE, [CC], $(subst $(SRCTREE)/,,$(CURDIR)),$<) + $(CC) $(CFLAGS) $(CFLAGS_$(@F)) $(CFLAGS_$(BCURDIR)) -o $@ $< -c + $(obj)%.i: %.c ++ $(call MESSAGE, [CPP],$(subst $(SRCTREE)/,,$(CURDIR)),$<) + $(CPP) $(CFLAGS) $(CFLAGS_$(@F)) $(CFLAGS_$(BCURDIR)) -o $@ $< -c + $(obj)%.s: %.c ++ $(call MESSAGE, [CC], $(subst $(SRCTREE)/,,$(CURDIR)),$<) + $(CC) $(CFLAGS) $(CFLAGS_$(@F)) $(CFLAGS_$(BCURDIR)) -o $@ $< -c -S + + ######################################################################### diff --git a/package/uboot-lantiq/patches/010-fix-mips-flags.patch b/package/uboot-lantiq/patches/010-fix-mips-flags.patch new file mode 100644 index 000000000..4c706a784 --- /dev/null +++ b/package/uboot-lantiq/patches/010-fix-mips-flags.patch @@ -0,0 +1,23 @@ +--- a/cpu/mips/config.mk ++++ b/cpu/mips/config.mk +@@ -23,16 +23,18 @@ + v=$(shell $(AS) --version | grep 'GNU assembler' | egrep -o '2\.[0-9\.]+' | cut -d. -f2) + MIPSFLAGS:=$(shell \ + if [ "$v" -lt "14" ]; then \ +- echo "-mcpu=4kc"; \ ++ echo "-mcpu=mips32"; \ + else \ +- echo "-march=4kc -mtune=4kc"; \ ++ echo "-mips32 -march=mips32 -mtune=mips32"; \ + fi) + ++ifndef ENDIANNESS + ifneq (,$(findstring 4KCle,$(CROSS_COMPILE))) + ENDIANNESS = -EL + else + ENDIANNESS = -EB + endif ++endif + + MIPSFLAGS += $(ENDIANNESS) + diff --git a/package/uboot-lantiq/patches/050-mips-enhancements.patch b/package/uboot-lantiq/patches/050-mips-enhancements.patch new file mode 100644 index 000000000..d05646770 --- /dev/null +++ b/package/uboot-lantiq/patches/050-mips-enhancements.patch @@ -0,0 +1,124 @@ +--- a/cpu/mips/start.S ++++ b/cpu/mips/start.S +@@ -69,6 +69,9 @@ _start: + #elif defined(CONFIG_PURPLE) + .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */ + .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */ ++#elif defined(CONFIG_SYS_EBU_BOOT) ++ .word INFINEON_EBU_BOOTCFG /* EBU init code, fetched during booting */ ++ .word 0x00000000 /* phase of the flash */ + #else + RVECENT(romReserved,2) + #endif +@@ -202,7 +205,25 @@ _start: + * 128 * 8 == 1024 == 0x400 + * so this is address R_VEC+0x400 == 0xbfc00400 + */ +-#ifdef CONFIG_PURPLE ++#ifndef CONFIG_PURPLE ++ XVECENT(romExcHandle,0x400); /* bfc00400: Int, CauseIV=1 */ ++ RVECENT(romReserved,129); ++ RVECENT(romReserved,130); ++ RVECENT(romReserved,131); ++ RVECENT(romReserved,132); ++ RVECENT(romReserved,133); ++ RVECENT(romReserved,134); ++ RVECENT(romReserved,135); ++ RVECENT(romReserved,136); ++ RVECENT(romReserved,137); ++ RVECENT(romReserved,138); ++ RVECENT(romReserved,139); ++ RVECENT(romReserved,140); ++ RVECENT(romReserved,141); ++ RVECENT(romReserved,142); ++ RVECENT(romReserved,143); ++ XVECENT(romExcHandle,0x480); /* bfc00480: EJTAG debug exception */ ++#else /* CONFIG_PURPLE */ + /* 0xbfc00400 */ + .word 0xdc870000 + .word 0xfca70000 +@@ -228,6 +249,12 @@ _start: + #endif /* CONFIG_PURPLE */ + .align 4 + reset: ++#ifdef CONFIG_SYS_MIPS_MULTI_CPU ++ mfc0 k0, CP0_EBASE ++ and k0, EBASEF_CPUNUM ++ bne k0, zero, ifx_mips_handler_cpux ++ nop ++#endif + + /* Clear watch registers. + */ +@@ -239,6 +266,16 @@ reset: + + setup_c0_status_reset + ++#if defined(CONFIG_MIPS24KEC) || defined(CONFIG_MIPS34KC) ++ /* CONFIG7 register */ ++ /* Erratum "RPS May Cause Incorrect Instruction Execution" ++ * for 24KEC and 34KC */ ++ mfc0 k0, CP0_CONFIG, 7 ++ li k1, MIPS_CONF7_RPS ++ or k0, k1 ++ mtc0 k0, CP0_CONFIG, 7 ++#endif ++ + /* Init Timer */ + mtc0 zero, CP0_COUNT + mtc0 zero, CP0_COMPARE +@@ -270,9 +307,12 @@ reset: + jalr t9 + nop + ++#ifndef CONFIG_SYS_MIPS_CACHE_OPER_MODE ++#define CONFIG_SYS_MIPS_CACHE_OPER_MODE CONF_CM_CACHABLE_NONCOHERENT ++#endif + /* ... and enable them. + */ +- li t0, CONF_CM_CACHABLE_NONCOHERENT ++ li t0, CONFIG_SYS_MIPS_CACHE_OPER_MODE + mtc0 t0, CP0_CONFIG + #endif /* !CONFIG_SKIP_LOWLEVEL_INIT */ + +@@ -419,3 +459,15 @@ romReserved: + + romExcHandle: + b romExcHandle ++ ++ /* Additional handlers. ++ */ ++#ifdef CONFIG_SYS_MIPS_MULTI_CPU ++/* ++ * Stop Slave CPUs ++ */ ++ifx_mips_handler_cpux: ++ wait; ++ b ifx_mips_handler_cpux; ++ nop; ++#endif +--- a/include/asm-mips/mipsregs.h ++++ b/include/asm-mips/mipsregs.h +@@ -57,6 +57,7 @@ + #define CP0_CAUSE $13 + #define CP0_EPC $14 + #define CP0_PRID $15 ++#define CP0_EBASE $15,1 + #define CP0_CONFIG $16 + #define CP0_LLADDR $17 + #define CP0_WATCHLO $18 +@@ -395,6 +396,14 @@ + #define CAUSEF_BD (_ULCAST_(1) << 31) + + /* ++ * Bits in the coprocessor 0 EBase register ++ */ ++#define EBASEB_CPUNUM 0 ++#define EBASEF_CPUNUM (0x3ff << EBASEB_CPUNUM) ++#define EBASEB_EXPBASE 12 ++#define EBASEF_EXPBASE (0x3ffff << EBASEB_EXPBASE) ++ ++/* + * Bits in the coprocessor 0 config register. + */ + /* Generic bits. */ diff --git a/package/uboot-lantiq/patches/062-cfi-addr-fixup.patch b/package/uboot-lantiq/patches/062-cfi-addr-fixup.patch new file mode 100644 index 000000000..8f95da1f7 --- /dev/null +++ b/package/uboot-lantiq/patches/062-cfi-addr-fixup.patch @@ -0,0 +1,225 @@ +--- a/drivers/mtd/cfi_flash.c ++++ b/drivers/mtd/cfi_flash.c +@@ -85,6 +85,22 @@ flash_info_t flash_info[CFI_MAX_FLASH_BA + #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_8BIT + #endif + ++/* ++ * Check if address fixup macros are defined, define defaults otherwise ++ */ ++#ifndef FLASH_FIXUP_ADDR_8 ++#define FLASH_FIXUP_ADDR_8(addr) (addr) ++#endif ++#ifndef FLASH_FIXUP_ADDR_16 ++#define FLASH_FIXUP_ADDR_16(addr) (addr) ++#endif ++#ifndef FLASH_FIXUP_ADDR_32 ++#define FLASH_FIXUP_ADDR_32(addr) (addr) ++#endif ++#ifndef FLASH_FIXUP_ADDR_64 ++#define FLASH_FIXUP_ADDR_64(addr) (addr) ++#endif ++ + static void __flash_write8(u8 value, void *addr) + { + __raw_writeb(value, addr); +@@ -264,9 +280,9 @@ static inline uchar flash_read_uchar (fl + + cp = flash_map (info, 0, offset); + #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) +- retval = flash_read8(cp); ++ retval = flash_read8(FLASH_FIXUP_ADDR_8(cp)); + #else +- retval = flash_read8(cp + info->portwidth - 1); ++ retval = flash_read8(FLASH_FIXUP_ADDR_8(cp) + info->portwidth - 1); + #endif + flash_unmap (info, 0, offset, cp); + return retval; +@@ -280,7 +296,7 @@ static inline ushort flash_read_word (fl + ushort *addr, retval; + + addr = flash_map (info, 0, offset); +- retval = flash_read16 (addr); ++ retval = flash_read16 (FLASH_FIXUP_ADDR_16(addr)); + flash_unmap (info, 0, offset, addr); + return retval; + } +@@ -305,19 +321,28 @@ static ulong flash_read_long (flash_info + debug ("long addr is at %p info->portwidth = %d\n", addr, + info->portwidth); + for (x = 0; x < 4 * info->portwidth; x++) { +- debug ("addr[%x] = 0x%x\n", x, flash_read8(addr + x)); ++ debug ("addr[%x] = 0x%x\n", x, ++ flash_read8(FLASH_FIXUP_ADDR_32(addr) + x)); + } + #endif + #if defined(__LITTLE_ENDIAN) || defined(CONFIG_SYS_WRITE_SWAPPED_DATA) +- retval = ((flash_read8(addr) << 16) | +- (flash_read8(addr + info->portwidth) << 24) | +- (flash_read8(addr + 2 * info->portwidth)) | +- (flash_read8(addr + 3 * info->portwidth) << 8)); ++ retval = ((flash_read8(FLASH_FIXUP_ADDR_8 ++ (addr) << 16) | ++ (flash_read8(FLASH_FIXUP_ADDR_8 ++ (addr + info->portwidth)) << 24) | ++ (flash_read8(FLASH_FIXUP_ADDR_8 ++ (addr + 2 * info->portwidth))) | ++ (flash_read8(FLASH_FIXUP_ADDR_8 ++ (addr + 3 * info->portwidth)) << 8)); + #else +- retval = ((flash_read8(addr + 2 * info->portwidth - 1) << 24) | +- (flash_read8(addr + info->portwidth - 1) << 16) | +- (flash_read8(addr + 4 * info->portwidth - 1) << 8) | +- (flash_read8(addr + 3 * info->portwidth - 1))); ++ retval = ((flash_read8(FLASH_FIXUP_ADDR_8 ++ (addr + 2 * info->portwidth - 1)) << 24) | ++ (flash_read8(FLASH_FIXUP_ADDR_8 ++ (addr + info->portwidth - 1)) << 16) | ++ (flash_read8(FLASH_FIXUP_ADDR_8 ++ (addr + 4 * info->portwidth - 1)) << 8) | ++ (flash_read8(FLASH_FIXUP_ADDR_8 ++ (addr + 3 * info->portwidth - 1)))); + #endif + flash_unmap(info, sect, offset, addr); + +@@ -338,21 +363,22 @@ void flash_write_cmd (flash_info_t * inf + flash_make_cmd (info, cmd, &cword); + switch (info->portwidth) { + case FLASH_CFI_8BIT: +- debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr, cmd, +- cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH); +- flash_write8(cword.c, addr); ++ debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", ++ FLASH_FIXUP_ADDR_8(addr), cmd, cword.c, ++ info->chipwidth << CFI_FLASH_SHIFT_WIDTH); ++ flash_write8(cword.c, FLASH_FIXUP_ADDR_8(addr)); + break; + case FLASH_CFI_16BIT: +- debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr, +- cmd, cword.w, ++ debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", ++ FLASH_FIXUP_ADDR_16(addr), cmd, cword.w, + info->chipwidth << CFI_FLASH_SHIFT_WIDTH); +- flash_write16(cword.w, addr); ++ flash_write16(cword.w, FLASH_FIXUP_ADDR_16(addr)); + break; + case FLASH_CFI_32BIT: +- debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr, +- cmd, cword.l, ++ debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", ++ FLASH_FIXUP_ADDR_32(addr), cmd, cword.l, + info->chipwidth << CFI_FLASH_SHIFT_WIDTH); +- flash_write32(cword.l, addr); ++ flash_write32(cword.l, FLASH_FIXUP_ADDR_32(addr)); + break; + case FLASH_CFI_64BIT: + #ifdef DEBUG +@@ -362,11 +388,11 @@ void flash_write_cmd (flash_info_t * inf + print_longlong (str, cword.ll); + + debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n", +- addr, cmd, str, ++ FLASH_FIXUP_ADDR_64(addr), cmd, str, + info->chipwidth << CFI_FLASH_SHIFT_WIDTH); + } + #endif +- flash_write64(cword.ll, addr); ++ flash_write64(cword.ll, FLASH_FIXUP_ADDR_64(addr)); + break; + } + +@@ -397,16 +423,19 @@ static int flash_isequal (flash_info_t * + debug ("is= cmd %x(%c) addr %p ", cmd, cmd, addr); + switch (info->portwidth) { + case FLASH_CFI_8BIT: +- debug ("is= %x %x\n", flash_read8(addr), cword.c); +- retval = (flash_read8(addr) == cword.c); ++ debug ("is= %x %x\n", ++ flash_read8(FLASH_FIXUP_ADDR_8(addr)), cword.c); ++ retval = (flash_read8(FLASH_FIXUP_ADDR_8(addr)) == cword.c); + break; + case FLASH_CFI_16BIT: +- debug ("is= %4.4x %4.4x\n", flash_read16(addr), cword.w); +- retval = (flash_read16(addr) == cword.w); ++ debug ("is= %4.4x %4.4x\n", ++ flash_read16(FLASH_FIXUP_ADDR_16(addr)), cword.w); ++ retval = (flash_read16(FLASH_FIXUP_ADDR_16(addr)) == cword.w); + break; + case FLASH_CFI_32BIT: +- debug ("is= %8.8x %8.8lx\n", flash_read32(addr), cword.l); +- retval = (flash_read32(addr) == cword.l); ++ debug ("is= %8.8x %8.8lx\n", ++ flash_read32(FLASH_FIXUP_ADDR_32(addr)), cword.l); ++ retval = (flash_read32(FLASH_FIXUP_ADDR_32(addr)) == cword.l); + break; + case FLASH_CFI_64BIT: + #ifdef DEBUG +@@ -414,12 +443,13 @@ static int flash_isequal (flash_info_t * + char str1[20]; + char str2[20]; + +- print_longlong (str1, flash_read64(addr)); ++ print_longlong (str1, flash_read64(FLASH_FIXUP_ADDR_64 ++ (addr))); + print_longlong (str2, cword.ll); + debug ("is= %s %s\n", str1, str2); + } + #endif +- retval = (flash_read64(addr) == cword.ll); ++ retval = (flash_read64(FLASH_FIXUP_ADDR_64(addr)) == cword.ll); + break; + default: + retval = 0; +@@ -443,16 +473,20 @@ static int flash_isset (flash_info_t * i + flash_make_cmd (info, cmd, &cword); + switch (info->portwidth) { + case FLASH_CFI_8BIT: +- retval = ((flash_read8(addr) & cword.c) == cword.c); ++ retval = ((flash_read8(FLASH_FIXUP_ADDR_8(addr)) ++ & cword.c) == cword.c); + break; + case FLASH_CFI_16BIT: +- retval = ((flash_read16(addr) & cword.w) == cword.w); ++ retval = ((flash_read16(FLASH_FIXUP_ADDR_16(addr)) ++ & cword.w) == cword.w); + break; + case FLASH_CFI_32BIT: +- retval = ((flash_read32(addr) & cword.l) == cword.l); ++ retval = ((flash_read32(FLASH_FIXUP_ADDR_32(addr)) ++ & cword.l) == cword.l); + break; + case FLASH_CFI_64BIT: +- retval = ((flash_read64(addr) & cword.ll) == cword.ll); ++ retval = ((flash_read64(FLASH_FIXUP_ADDR_64(addr)) ++ & cword.ll) == cword.ll); + break; + default: + retval = 0; +@@ -476,17 +510,22 @@ static int flash_toggle (flash_info_t * + flash_make_cmd (info, cmd, &cword); + switch (info->portwidth) { + case FLASH_CFI_8BIT: +- retval = flash_read8(addr) != flash_read8(addr); ++ retval = flash_read8(FLASH_FIXUP_ADDR_8(addr)) != ++ flash_read8(FLASH_FIXUP_ADDR_8(addr)); + break; + case FLASH_CFI_16BIT: +- retval = flash_read16(addr) != flash_read16(addr); ++ retval = flash_read16(FLASH_FIXUP_ADDR_16(addr)) != ++ flash_read16(FLASH_FIXUP_ADDR_16(addr)); + break; + case FLASH_CFI_32BIT: +- retval = flash_read32(addr) != flash_read32(addr); ++ retval = flash_read32(FLASH_FIXUP_ADDR_32(addr)) != ++ flash_read32(FLASH_FIXUP_ADDR_32(addr)); + break; + case FLASH_CFI_64BIT: +- retval = ( (flash_read32( addr ) != flash_read32( addr )) || +- (flash_read32(addr+4) != flash_read32(addr+4)) ); ++ retval = ( (flash_read32(FLASH_FIXUP_ADDR_64( addr )) != ++ flash_read32(FLASH_FIXUP_ADDR_64( addr ))) || ++ (flash_read32(FLASH_FIXUP_ADDR_64(addr+4)) != ++ flash_read32(FLASH_FIXUP_ADDR_64(addr+4))) ); + break; + default: + retval = 0; diff --git a/package/uboot-lantiq/patches/100-ifx_targets.patch b/package/uboot-lantiq/patches/100-ifx_targets.patch new file mode 100644 index 000000000..9c313e0a4 --- /dev/null +++ b/package/uboot-lantiq/patches/100-ifx_targets.patch @@ -0,0 +1,112 @@ +--- a/MAKEALL ++++ b/MAKEALL +@@ -709,6 +709,12 @@ LIST_arm=" \ + ## MIPS Systems (default = big endian) + ######################################################################### + ++LIST_ifxcpe=" \ ++ easy50712 \ ++ easy50712_DDR166M \ ++ easy50712_DDR166M_ramboot \ ++" ++ + LIST_mips4kc=" \ + incaip \ + qemu_mips \ +@@ -740,6 +746,7 @@ LIST_au1xx0=" \ + " + + LIST_mips=" \ ++ ${LIST_ifxcpe} \ + ${LIST_mips4kc} \ + ${LIST_mips5kc} \ + ${LIST_au1xx0} \ +--- a/Makefile ++++ b/Makefile +@@ -474,7 +475,7 @@ $(obj)include/autoconf.mk: $(obj)include + set -e ; \ + : Extract the config macros ; \ + $(CPP) $(CFLAGS) -DDO_DEPS_ONLY -dM include/common.h | \ +- sed -n -f tools/scripts/define2mk.sed > $@.tmp && \ ++ sed -n -f tools/scripts/define2mk.sed |sort > $@.tmp && \ + mv $@.tmp $@ + + ######################################################################### +@@ -3354,7 +3355,7 @@ incaip_config: unconfig + { echo "#define CPU_CLOCK_RATE 150000000" >>$(obj)include/config.h ; \ + $(XECHO) "... with 150MHz system clock" ; \ + } +- @$(MKCONFIG) -a $(call xtract_incaip,$@) mips mips incaip ++ @$(MKCONFIG) -a $(call xtract_incaip,$@) mips mips incaip infineon + + tb0229_config: unconfig + @$(MKCONFIG) $(@:_config=) mips mips tb0229 +@@ -3395,6 +3396,30 @@ vct_platinumavc_onenand_small_config: un + @$(MKCONFIG) -a vct mips mips vct micronas + + ######################################################################### ++## MIPS32 ifxcpe ++######################################################################### ++ ++easy50712%config : unconfig ++ @mkdir -p $(obj)include ++ @mkdir -p $(obj)board/infineon/easy50712 ++ @[ -z "$(findstring ramboot,$@)" ] || \ ++ { echo "TEXT_BASE = 0xA0400000" >$(obj)board/infineon/easy50712/config.tmp ; \ ++ echo "#define CONFIG_SYS_RAMBOOT" >>$(obj)include/config.h ; \ ++ $(XECHO) "... with ramboot configuration" ; \ ++ } ++ @if [ "$(findstring _DDR,$@)" ] ; then \ ++ echo "#define CONFIG_USE_DDR_RAM" >>$(obj)include/config.h ; \ ++ DDR=$(subst DDR,,$(filter DDR%,$(subst _, ,$@))); \ ++ case "$${DDR}" in \ ++ 111M|166M|e111M|e166M|promos400|samsung166|psc166) \ ++ $(XECHO) "... with DDR RAM config $${DDR}" ; \ ++ echo "#define CONFIG_USE_DDR_RAM_CFG_$${DDR}" >>$(obj)include/config.h ;; \ ++ *) $(XECHO) "... DDR RAM config \\\"$${DDR}\\\" unknown, use default"; \ ++ esac; \ ++ fi ++ @$(MKCONFIG) -a $(word 1,$(subst _, ,$@)) mips mips easy50712 infineon danube ++ ++######################################################################### + ## MIPS32 AU1X00 + ######################################################################### + +--- a/drivers/serial/Makefile ++++ b/drivers/serial/Makefile +@@ -28,6 +28,7 @@ LIB := $(obj)libserial.a + COBJS-$(CONFIG_ARM_DCC) += arm_dcc.o + COBJS-$(CONFIG_AT91RM9200_USART) += at91rm9200_usart.o + COBJS-$(CONFIG_ATMEL_USART) += atmel_usart.o ++COBJS-$(CONFIG_IFX_ASC) += ifx_asc.o + COBJS-$(CONFIG_MCFUART) += mcfuart.o + COBJS-$(CONFIG_NS9750_UART) += ns9750_serial.o + COBJS-$(CONFIG_SYS_NS16550) += ns16550.o +--- a/drivers/net/Makefile ++++ b/drivers/net/Makefile +@@ -41,6 +41,7 @@ COBJS-$(CONFIG_FEC_MXC) += fec_mxc.o + COBJS-$(CONFIG_FSLDMAFEC) += fsl_mcdmafec.o mcfmii.o + COBJS-$(CONFIG_FTMAC100) += ftmac100.o + COBJS-$(CONFIG_GRETH) += greth.o ++COBJS-$(CONFIG_IFX_ETOP) += ifx_etop.o + COBJS-$(CONFIG_INCA_IP_SWITCH) += inca-ip_sw.o + COBJS-$(CONFIG_KIRKWOOD_EGIGA) += kirkwood_egiga.o + COBJS-$(CONFIG_DRIVER_KS8695ETH) += ks8695eth.o +--- a/include/netdev.h ++++ b/include/netdev.h +@@ -55,6 +55,7 @@ int fecmxc_initialize (bd_t *bis); + int ftmac100_initialize(bd_t *bits); + int greth_initialize(bd_t *bis); + void gt6426x_eth_initialize(bd_t *bis); ++int ifx_etop_initialize(bd_t *bis); + int inca_switch_initialize(bd_t *bis); + int kirkwood_egiga_initialize(bd_t *bis); + int macb_eth_initialize(int id, void *regs, unsigned int phy_addr); +@@ -82,6 +83,7 @@ int uec_standard_init(bd_t *bis); + int uli526x_initialize(bd_t *bis); + int sh_eth_initialize(bd_t *bis); + int dm9000_initialize(bd_t *bis); ++int lq_eth_initialize(bd_t * bis); + + /* Boards with PCI network controllers can call this from their board_eth_init() + * function to initialize whatever's on board. diff --git a/package/uboot-lantiq/patches/200-portability.patch b/package/uboot-lantiq/patches/200-portability.patch new file mode 100644 index 000000000..ae38ad68e --- /dev/null +++ b/package/uboot-lantiq/patches/200-portability.patch @@ -0,0 +1,31 @@ +--- a/tools/kwbimage.c ++++ b/tools/kwbimage.c +@@ -206,6 +206,28 @@ INVL_DATA: + exit (EXIT_FAILURE); + } + ++#ifndef __GLIBC__ ++static ssize_t ++getline(char **line, size_t *len, FILE *fd) ++{ ++ char *tmp; ++ int tmplen; ++ ++ tmp = fgetln(fd, &tmplen); ++ if (!tmp) ++ return -1; ++ ++ if (!*line || tmplen > *len) { ++ *len = tmplen + 1; ++ *line = realloc(*line, *len); ++ } ++ ++ strncpy(*line, tmp, tmplen); ++ line[tmplen] = 0; ++ return tmplen; ++} ++#endif ++ + /* + * this function sets the kwbimage header by- + * 1. Abstracting input command line arguments data diff --git a/package/uboot-lantiq/patches/210-compile.patch b/package/uboot-lantiq/patches/210-compile.patch new file mode 100644 index 000000000..e34d7fd3e --- /dev/null +++ b/package/uboot-lantiq/patches/210-compile.patch @@ -0,0 +1,24 @@ +Index: u-boot-2009.11.1/common/env_common.c +=================================================================== +--- u-boot-2009.11.1.orig/common/env_common.c 2010-01-25 09:35:12.000000000 +0100 ++++ u-boot-2009.11.1/common/env_common.c 2010-03-29 13:20:50.000000000 +0200 +@@ -26,6 +26,7 @@ + + #include + #include ++#include + #include + #include + #include +Index: u-boot-2009.11.1/common/env_embedded.c +=================================================================== +--- u-boot-2009.11.1.orig/common/env_embedded.c 2010-03-29 13:22:19.000000000 +0200 ++++ u-boot-2009.11.1/common/env_embedded.c 2010-03-29 13:22:29.000000000 +0200 +@@ -27,6 +27,7 @@ + #define __ASM_STUB_PROCESSOR_H__ /* don't include asm/processor. */ + #include + #undef __ASSEMBLY__ ++#include + #include + + /* diff --git a/package/uci/Makefile b/package/uci/Makefile index b86a4fea1..3ce9e9ee3 100644 --- a/package/uci/Makefile +++ b/package/uci/Makefile @@ -7,16 +7,19 @@ include $(TOPDIR)/rules.mk -UCI_VERSION=0.7 +UCI_VERSION=12012009 UCI_RELEASE=5 PKG_NAME:=uci PKG_VERSION:=$(UCI_VERSION)$(if $(UCI_RELEASE),.$(UCI_RELEASE)) PKG_RELEASE:=1 +PKG_REV:=aa3ab8012bfbf793d2884c08ea924545a04e9544 PKG_SOURCE:=$(PKG_NAME)-$(PKG_VERSION).tar.gz -PKG_SOURCE_URL:=http://downloads.openwrt.org/sources -PKG_MD5SUM:=ed34c5ef606a90da4aba03ce6d22eeb9 +PKG_SOURCE_URL:=git://nbd.name/uci.git +PKG_SOURCE_SUBDIR:=uci-$(PKG_VERSION) +PKG_SOURCE_VERSION:=$(PKG_REV) +PKG_SOURCE_PROTO:=git include $(INCLUDE_DIR)/package.mk @@ -105,7 +108,6 @@ define Build/InstallDev $(INSTALL_DIR) $(1)/usr/lib $(CP) $(PKG_BUILD_DIR)/libuci.so* $(1)/usr/lib $(CP) $(PKG_BUILD_DIR)/libuci.a $(1)/usr/lib - $(CP) $(PKG_BUILD_DIR)/libucimap.a $(1)/usr/lib endef $(eval $(call BuildPackage,uci)) diff --git a/package/uci/patches/100-gcc_warning.patch b/package/uci/patches/100-gcc_warning.patch deleted file mode 100644 index 9ac51448b..000000000 --- a/package/uci/patches/100-gcc_warning.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/cli.c -+++ b/cli.c -@@ -462,7 +462,7 @@ - - static int uci_batch_cmd(void) - { -- char *argv[MAX_ARGS]; -+ char *argv[MAX_ARGS + 2]; - char *str = NULL; - int ret = 0; - int i, j; diff --git a/package/uci/patches/110-plugin_support.patch b/package/uci/patches/110-plugin_support.patch deleted file mode 100644 index bdf85aa27..000000000 --- a/package/uci/patches/110-plugin_support.patch +++ /dev/null @@ -1,423 +0,0 @@ ---- a/Makefile -+++ b/Makefile -@@ -7,7 +7,7 @@ DEBUG_TYPECAST=0 - - include Makefile.inc - --LIBS=-lc -+LIBS=-lc -ldl - SHLIB_FILE=libuci.$(SHLIB_EXT).$(VERSION) - - define add_feature -@@ -23,6 +23,7 @@ ucimap.o: ucimap.c uci.h uci_config.h uc - - uci_config.h: FORCE - @rm -f "$@.tmp" -+ @echo "#define UCI_PREFIX \"$(prefix)\"" > "$@.tmp" - $(call add_feature,PLUGIN_SUPPORT) - $(call add_feature,DEBUG) - $(call add_feature,DEBUG_TYPECAST) -@@ -33,10 +34,10 @@ uci_config.h: FORCE - fi - - uci: cli.o libuci.$(SHLIB_EXT) -- $(CC) -o $@ $< -L. -luci -+ $(CC) -o $@ $< -L. -luci $(LIBS) - - uci-static: cli.o libuci.a -- $(CC) $(CFLAGS) -o $@ $^ -+ $(CC) $(CFLAGS) -o $@ $^ $(LIBS) - - libuci-static.o: libuci.c $(LIBUCI_DEPS) - $(CC) $(CFLAGS) -c -o $@ $< ---- a/cli.c -+++ b/cli.c -@@ -27,6 +27,7 @@ static enum { - CLI_FLAG_NOCOMMIT = (1 << 2), - CLI_FLAG_BATCH = (1 << 3), - CLI_FLAG_SHOW_EXT = (1 << 4), -+ CLI_FLAG_NOPLUGINS= (1 << 5), - } flags; - - static FILE *input; -@@ -136,6 +137,7 @@ static void uci_usage(void) - "\t-c set the search path for config files (default: /etc/config)\n" - "\t-d set the delimiter for list values in uci show\n" - "\t-f use as input instead of stdin\n" -+ "\t-L do not load any plugins\n" - "\t-m when importing, merge data into an existing package\n" - "\t-n name unnamed sections on export (default)\n" - "\t-N don't name unnamed sections\n" -@@ -603,7 +605,7 @@ int main(int argc, char **argv) - return 1; - } - -- while((c = getopt(argc, argv, "c:d:f:mnNp:P:sSqX")) != -1) { -+ while((c = getopt(argc, argv, "c:d:f:LmnNp:P:sSqX")) != -1) { - switch(c) { - case 'c': - uci_set_confdir(ctx, optarg); -@@ -618,6 +620,9 @@ int main(int argc, char **argv) - return 1; - } - break; -+ case 'L': -+ flags |= CLI_FLAG_NOPLUGINS; -+ break; - case 'm': - flags |= CLI_FLAG_MERGE; - break; -@@ -662,6 +667,10 @@ int main(int argc, char **argv) - uci_usage(); - return 0; - } -+ -+ if (!(flags & CLI_FLAG_NOPLUGINS)) -+ uci_load_plugins(ctx, NULL); -+ - ret = uci_cmd(argc - 1, argv + 1); - if (input != stdin) - fclose(input); ---- a/history.c -+++ b/history.c -@@ -406,6 +406,17 @@ int uci_save(struct uci_context *ctx, st - if ((asprintf(&filename, "%s/%s", ctx->savedir, p->e.name) < 0) || !filename) - UCI_THROW(ctx, UCI_ERR_MEM); - -+ uci_foreach_element(&ctx->hooks, tmp) { -+ struct uci_hook *hook = uci_to_hook(tmp); -+ -+ if (!hook->ops->set) -+ continue; -+ -+ uci_foreach_element(&p->history, e) { -+ hook->ops->set(hook->ops, p, uci_to_history(e)); -+ } -+ } -+ - ctx->err = 0; - UCI_TRAP_SAVE(ctx, done); - f = uci_open_stream(ctx, filename, SEEK_END, true, true); ---- a/libuci.c -+++ b/libuci.c -@@ -22,6 +22,8 @@ - #include - #include - #include -+#include -+#include - #include "uci.h" - - static const char *uci_confdir = UCI_CONFDIR; -@@ -39,6 +41,7 @@ static const char *uci_errstr[] = { - }; - - static void uci_cleanup(struct uci_context *ctx); -+static void uci_unload_plugin(struct uci_context *ctx, struct uci_plugin *p); - - #include "uci_internal.h" - #include "util.c" -@@ -56,6 +59,8 @@ struct uci_context *uci_alloc_context(vo - uci_list_init(&ctx->root); - uci_list_init(&ctx->history_path); - uci_list_init(&ctx->backends); -+ uci_list_init(&ctx->hooks); -+ uci_list_init(&ctx->plugins); - ctx->flags = UCI_FLAG_STRICT | UCI_FLAG_SAVED_HISTORY; - - ctx->confdir = (char *) uci_confdir; -@@ -86,6 +91,9 @@ void uci_free_context(struct uci_context - uci_free_element(e); - } - UCI_TRAP_RESTORE(ctx); -+ uci_foreach_element_safe(&ctx->root, tmp, e) { -+ uci_unload_plugin(ctx, uci_to_plugin(e)); -+ } - free(ctx); - - ignore: -@@ -209,9 +217,16 @@ int uci_commit(struct uci_context *ctx, - int uci_load(struct uci_context *ctx, const char *name, struct uci_package **package) - { - struct uci_package *p; -+ struct uci_element *e; -+ - UCI_HANDLE_ERR(ctx); - UCI_ASSERT(ctx, ctx->backend && ctx->backend->load); - p = ctx->backend->load(ctx, name); -+ uci_foreach_element(&ctx->hooks, e) { -+ struct uci_hook *h = uci_to_hook(e); -+ if (h->ops->load) -+ h->ops->load(h->ops, p); -+ } - if (package) - *package = p; - -@@ -280,3 +295,94 @@ int uci_set_backend(struct uci_context * - ctx->backend = uci_to_backend(e); - return 0; - } -+ -+int uci_add_hook(struct uci_context *ctx, const struct uci_hook_ops *ops) -+{ -+ struct uci_element *e; -+ struct uci_hook *h; -+ -+ UCI_HANDLE_ERR(ctx); -+ -+ /* check for duplicate elements */ -+ uci_foreach_element(&ctx->hooks, e) { -+ h = uci_to_hook(e); -+ if (h->ops == ops) -+ return UCI_ERR_INVAL; -+ } -+ -+ h = uci_alloc_element(ctx, hook, "", 0); -+ h->ops = ops; -+ uci_list_init(&h->e.list); -+ uci_list_add(&ctx->hooks, &h->e.list); -+ -+ return 0; -+} -+ -+int uci_remove_hook(struct uci_context *ctx, const struct uci_hook_ops *ops) -+{ -+ struct uci_element *e; -+ -+ uci_foreach_element(&ctx->hooks, e) { -+ struct uci_hook *h = uci_to_hook(e); -+ if (h->ops == ops) { -+ uci_list_del(&e->list); -+ return 0; -+ } -+ } -+ return UCI_ERR_NOTFOUND; -+} -+ -+int uci_load_plugin(struct uci_context *ctx, const char *filename) -+{ -+ struct uci_plugin *p; -+ const struct uci_plugin_ops *ops; -+ void *dlh; -+ -+ UCI_HANDLE_ERR(ctx); -+ dlh = dlopen(filename, RTLD_GLOBAL|RTLD_NOW); -+ if (!dlh) -+ UCI_THROW(ctx, UCI_ERR_NOTFOUND); -+ -+ ops = dlsym(dlh, "uci_plugin"); -+ if (!ops || !ops->attach || (ops->attach(ctx) != 0)) { -+ if (!ops) -+ fprintf(stderr, "No ops\n"); -+ else if (!ops->attach) -+ fprintf(stderr, "No attach\n"); -+ else -+ fprintf(stderr, "Other weirdness\n"); -+ dlclose(dlh); -+ UCI_THROW(ctx, UCI_ERR_INVAL); -+ } -+ -+ p = uci_alloc_element(ctx, plugin, filename, 0); -+ p->dlh = dlh; -+ p->ops = ops; -+ uci_list_add(&ctx->plugins, &p->e.list); -+ -+ return 0; -+} -+ -+static void uci_unload_plugin(struct uci_context *ctx, struct uci_plugin *p) -+{ -+ if (p->ops->detach) -+ p->ops->detach(ctx); -+ dlclose(p->dlh); -+ uci_free_element(&p->e); -+} -+ -+int uci_load_plugins(struct uci_context *ctx, const char *pattern) -+{ -+ glob_t gl; -+ int i; -+ -+ if (!pattern) -+ pattern = UCI_PREFIX "/lib/uci_*.so"; -+ -+ memset(&gl, 0, sizeof(gl)); -+ glob(pattern, 0, NULL, &gl); -+ for (i = 0; i < gl.gl_pathc; i++) -+ uci_load_plugin(ctx, gl.gl_pathv[i]); -+ -+ return 0; -+} ---- a/uci.h -+++ b/uci.h -@@ -56,6 +56,8 @@ struct uci_list - }; - - struct uci_ptr; -+struct uci_plugin; -+struct uci_hook_ops; - struct uci_element; - struct uci_package; - struct uci_section; -@@ -275,6 +277,43 @@ extern int uci_set_backend(struct uci_co - */ - extern bool uci_validate_text(const char *str); - -+ -+/** -+ * uci_add_hook: add a uci hook -+ * @ctx: uci context -+ * @ops: uci hook ops -+ * -+ * NB: allocated and freed by the caller -+ */ -+extern int uci_add_hook(struct uci_context *ctx, const struct uci_hook_ops *ops); -+ -+/** -+ * uci_remove_hook: remove a uci hook -+ * @ctx: uci context -+ * @ops: uci hook ops -+ */ -+extern int uci_remove_hook(struct uci_context *ctx, const struct uci_hook_ops *ops); -+ -+/** -+ * uci_load_plugin: load an uci plugin -+ * @ctx: uci context -+ * @filename: path to the uci plugin -+ * -+ * NB: plugin will be unloaded automatically when the context is freed -+ */ -+int uci_load_plugin(struct uci_context *ctx, const char *filename); -+ -+/** -+ * uci_load_plugins: load all uci plugins from a directory -+ * @ctx: uci context -+ * @pattern: pattern of uci plugin files (optional) -+ * -+ * if pattern is NULL, then uci_load_plugins will call uci_load_plugin -+ * for uci_*.so in /lib/ -+ */ -+int uci_load_plugins(struct uci_context *ctx, const char *pattern); -+ -+ - /* UCI data structures */ - enum uci_type { - UCI_TYPE_UNSPEC = 0, -@@ -285,6 +324,8 @@ enum uci_type { - UCI_TYPE_PATH = 5, - UCI_TYPE_BACKEND = 6, - UCI_TYPE_ITEM = 7, -+ UCI_TYPE_HOOK = 8, -+ UCI_TYPE_PLUGIN = 9, - }; - - enum uci_option_type { -@@ -346,6 +387,9 @@ struct uci_context - bool internal, nested; - char *buf; - int bufsz; -+ -+ struct uci_list hooks; -+ struct uci_list plugins; - }; - - struct uci_package -@@ -420,6 +464,31 @@ struct uci_ptr - const char *value; - }; - -+struct uci_hook_ops -+{ -+ void (*load)(const struct uci_hook_ops *ops, struct uci_package *p); -+ void (*set)(const struct uci_hook_ops *ops, struct uci_package *p, struct uci_history *e); -+}; -+ -+struct uci_hook -+{ -+ struct uci_element e; -+ const struct uci_hook_ops *ops; -+}; -+ -+struct uci_plugin_ops -+{ -+ int (*attach)(struct uci_context *ctx); -+ void (*detach)(struct uci_context *ctx); -+}; -+ -+struct uci_plugin -+{ -+ struct uci_element e; -+ const struct uci_plugin_ops *ops; -+ void *dlh; -+}; -+ - - /* linked list handling */ - #ifndef offsetof -@@ -490,6 +559,8 @@ struct uci_ptr - #define uci_type_package UCI_TYPE_PACKAGE - #define uci_type_section UCI_TYPE_SECTION - #define uci_type_option UCI_TYPE_OPTION -+#define uci_type_hook UCI_TYPE_HOOK -+#define uci_type_plugin UCI_TYPE_PLUGIN - - /* element typecasting */ - #ifdef UCI_DEBUG_TYPECAST -@@ -499,6 +570,8 @@ static const char *uci_typestr[] = { - [uci_type_package] = "package", - [uci_type_section] = "section", - [uci_type_option] = "option", -+ [uci_type_hook] = "hook", -+ [uci_type_plugin] = "plugin", - }; - - static void uci_typecast_error(int from, int to) -@@ -520,6 +593,8 @@ BUILD_CAST(history) - BUILD_CAST(package) - BUILD_CAST(section) - BUILD_CAST(option) -+BUILD_CAST(hook) -+BUILD_CAST(plugin) - - #else - #define uci_to_backend(ptr) container_of(ptr, struct uci_backend, e) -@@ -527,6 +602,8 @@ BUILD_CAST(option) - #define uci_to_package(ptr) container_of(ptr, struct uci_package, e) - #define uci_to_section(ptr) container_of(ptr, struct uci_section, e) - #define uci_to_option(ptr) container_of(ptr, struct uci_option, e) -+#define uci_to_hook(ptr) container_of(ptr, struct uci_hook, e) -+#define uci_to_plugin(ptr) container_of(ptr, struct uci_plugin, e) - #endif - - /** ---- a/lua/uci.c -+++ b/lua/uci.c -@@ -765,6 +765,20 @@ uci_lua_add_history(lua_State *L) - } - - static int -+uci_lua_load_plugins(lua_State *L) -+{ -+ struct uci_context *ctx; -+ int ret, offset = 0; -+ const char *str = NULL; -+ -+ ctx = find_context(L, &offset); -+ if (lua_isstring(L, -1)) -+ str = lua_tostring(L, -1); -+ ret = uci_load_plugins(ctx, str); -+ return uci_push_status(L, ctx, false); -+} -+ -+static int - uci_lua_set_savedir(lua_State *L) - { - struct uci_context *ctx; -@@ -831,6 +845,7 @@ static const luaL_Reg uci[] = { - { "changes", uci_lua_changes }, - { "foreach", uci_lua_foreach }, - { "add_history", uci_lua_add_history }, -+ { "load_plugins", uci_lua_load_plugins }, - { "get_confdir", uci_lua_get_confdir }, - { "set_confdir", uci_lua_set_confdir }, - { "get_savedir", uci_lua_get_savedir }, diff --git a/package/udevtrigger/patches/001-no_debug.patch b/package/udevtrigger/patches/001-no_debug.patch index 626181e47..9f3ddd08d 100644 --- a/package/udevtrigger/patches/001-no_debug.patch +++ b/package/udevtrigger/patches/001-no_debug.patch @@ -1,8 +1,6 @@ -Index: udev-106/Makefile -=================================================================== ---- udev-106.orig/Makefile 2007-06-04 13:22:17.765154568 +0200 -+++ udev-106/Makefile 2007-06-04 13:22:17.831144536 +0200 -@@ -113,7 +113,7 @@ +--- a/Makefile ++++ b/Makefile +@@ -113,7 +113,7 @@ LD = $(CROSS_COMPILE)gcc AR = $(CROSS_COMPILE)ar RANLIB = $(CROSS_COMPILE)ranlib @@ -11,7 +9,7 @@ Index: udev-106/Makefile WARNINGS = -Wstrict-prototypes -Wsign-compare -Wshadow \ -Wchar-subscripts -Wmissing-declarations -Wnested-externs \ -Wpointer-arith -Wcast-align -Wsign-compare -Wmissing-prototypes -@@ -130,7 +130,7 @@ +@@ -130,7 +130,7 @@ endif # if DEBUG is enabled, then we do not strip ifeq ($(strip $(DEBUG)),true) diff --git a/package/udevtrigger/patches/002-udevtrigger_no_config.patch b/package/udevtrigger/patches/002-udevtrigger_no_config.patch index db68ebf76..f5d6a1c4f 100644 --- a/package/udevtrigger/patches/002-udevtrigger_no_config.patch +++ b/package/udevtrigger/patches/002-udevtrigger_no_config.patch @@ -1,8 +1,6 @@ -Index: udev-106/udevtrigger.c -=================================================================== ---- udev-106.orig/udevtrigger.c 2007-06-04 13:22:17.745157608 +0200 -+++ udev-106/udevtrigger.c 2007-06-04 13:22:18.022115504 +0200 -@@ -446,7 +446,6 @@ +--- a/udevtrigger.c ++++ b/udevtrigger.c +@@ -446,7 +446,6 @@ int main(int argc, char *argv[], char *e }; logging_init("udevtrigger"); diff --git a/package/uhttpd/Makefile b/package/uhttpd/Makefile new file mode 100644 index 000000000..180e2284c --- /dev/null +++ b/package/uhttpd/Makefile @@ -0,0 +1,93 @@ +# +# Copyright (C) 2010 Jo-Philipp Wich +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +include $(TOPDIR)/rules.mk + +PKG_NAME:=uhttpd +PKG_RELEASE:=6 + +PKG_BUILD_DIR := $(BUILD_DIR)/$(PKG_NAME) + +include $(INCLUDE_DIR)/package.mk + +define Package/uhttpd/default + SECTION:=net + CATEGORY:=Network + TITLE:=uHTTPd - tiny, single threaded HTTP server +endef + +define Package/uhttpd + $(Package/uhttpd/default) + MENU:=1 +endef + +define Package/uhttpd/description + uHTTPd is a tiny single threaded HTTP server with TLS, CGI and Lua + support. It is intended as a drop-in replacement for the Busybox + HTTP daemon. +endef + + +define Package/uhttpd-mod-tls + $(Package/uhttpd/default) + TITLE+= (TLS plugin) + DEPENDS:=uhttpd +libcyassl +endef + +define Package/uhttpd-mod-tls/description + The TLS plugin adds HTTPS support to uHTTPd. +endef + + +define Package/uhttpd-mod-lua + $(Package/uhttpd/default) + TITLE+= (Lua plugin) + DEPENDS:=uhttpd +liblua +endef + +define Package/uhttpd-mod-lua/description + The Lua plugin adds a CGI-like Lua runtime interface to uHTTPd. +endef + + +# hack to use CyASSL headers +TARGET_CFLAGS += -I$(firstword $(wildcard $(BUILD_DIR)/cyassl-*/include)) +TARGET_LDFLAGS += -lm +MAKE_VARS += FPIC="$(FPIC)" + +define Build/Prepare + mkdir -p $(PKG_BUILD_DIR) + $(CP) ./src/* $(PKG_BUILD_DIR)/ +endef + +define Package/uhttpd/conffiles +/etc/config/uhttpd +endef + +define Package/uhttpd/install + $(INSTALL_DIR) $(1)/etc/init.d + $(INSTALL_BIN) ./files/uhttpd.init $(1)/etc/init.d/uhttpd + $(INSTALL_DIR) $(1)/etc/config + $(INSTALL_CONF) ./files/uhttpd.config $(1)/etc/config/uhttpd + $(INSTALL_DIR) $(1)/usr/sbin + $(INSTALL_BIN) $(PKG_BUILD_DIR)/uhttpd $(1)/usr/sbin/uhttpd +endef + +define Package/uhttpd-mod-tls/install + $(INSTALL_DIR) $(1)/usr/lib + $(INSTALL_BIN) $(PKG_BUILD_DIR)/uhttpd_tls.so $(1)/usr/lib/ +endef + +define Package/uhttpd-mod-lua/install + $(INSTALL_DIR) $(1)/usr/lib + $(INSTALL_BIN) $(PKG_BUILD_DIR)/uhttpd_lua.so $(1)/usr/lib/ +endef + + +$(eval $(call BuildPackage,uhttpd)) +$(eval $(call BuildPackage,uhttpd-mod-tls)) +$(eval $(call BuildPackage,uhttpd-mod-lua)) diff --git a/package/uhttpd/files/uhttpd.config b/package/uhttpd/files/uhttpd.config new file mode 100644 index 000000000..79b018cf8 --- /dev/null +++ b/package/uhttpd/files/uhttpd.config @@ -0,0 +1,59 @@ +# Server configuration +config uhttpd main + + # HTTP listen addresses, multiple allowed + list listen_http 0.0.0.0:80 +# list listen_http [::]:80 + + # HTTPS listen addresses, multiple allowed + list listen_https 0.0.0.0:443 +# list listen_https [::]:443 + + # Server document root + option home /www + + # Certificate and private key for HTTPS. + # If no listen_https addresses are given, + # the key options are ignored. + option cert /etc/uhttpd.crt + option key /etc/uhttpd.key + + # CGI url prefix, will be searched in docroot. + # Default is /cgi-bin + option cgi_prefix /cgi-bin + + # Lua url prefix and handler script. + # Lua support is disabled if no prefix given. +# option lua_prefix /luci +# option lua_handler /usr/lib/lua/luci/sgi/uhttpd.lua + + # CGI/Lua timeout, if the called script does not + # write data within the given amount of seconds, + # the server will temrinate the request with + # 504 Gateway Timeout response. + option script_timeout 60 + + # Basic auth realm, defaults to local hostname +# option realm OpenWrt + + # Configuration file in busybox httpd format +# option config /etc/httpd.conf + + +# Certificate defaults for px5g key generator +config cert px5g + + # Validity time + option days 730 + + # RSA key size + option bits 1024 + + # Location + option country DE + option state Berlin + option location Berlin + + # Common name + option commonname OpenWrt + diff --git a/package/uhttpd/files/uhttpd.init b/package/uhttpd/files/uhttpd.init new file mode 100755 index 000000000..ba7dd49fb --- /dev/null +++ b/package/uhttpd/files/uhttpd.init @@ -0,0 +1,116 @@ +#!/bin/sh /etc/rc.common +# Copyright (C) 2010 Jo-Philipp Wich + +START=50 +UHTTPD_BIN="/usr/sbin/uhttpd" +PX5G_BIN="/usr/sbin/px5g" + + +append_listen_http() { + append UHTTPD_ARGS "-p $1" +} + +append_listen_https() { + append UHTTPD_ARGS "-s $1" +} + +append_arg() { + local cfg="$1" + local var="$2" + local opt="$3" + local def="$4" + local val + + config_get val "$cfg" "$var" + [ -n "$val" -o -n "$def" ] && append UHTTPD_ARGS "$opt ${val:-$def}" +} + +generate_keys() { + local cfg="$1" + local key="$2" + local crt="$3" + local days bits country state location commonname + + config_get days "$cfg" days + config_get bits "$cfg" bits + config_get country "$cfg" country + config_get state "$cfg" state + config_get location "$cfg" location + config_get commonname "$cfg" commonname + + [ -x "$PX5G_BIN" ] && { + $PX5G_BIN selfsigned -der \ + -days ${days:-730} -newkey rsa:${bits:-1024} -keyout "$UHTTPD_KEY" -out "$UHTTPD_CERT" \ + -subj /C=${country:-DE}/ST=${state:-Saxony}/L=${location:-Leipzig}/CN=${commonname:-OpenWrt} + } || { + echo "WARNING: the specified certificate and key" \ + "files do not exist and the px5g generator" \ + "is not available, skipping SSL setup." + } +} + +start_instance() +{ + UHTTPD_ARGS="" + UHTTPD_CERT="" + UHTTPD_KEY="" + + local cfg="$1" + local realm="$(uci get system.@system[0].hostname 2>/dev/null)" + local ssl + + append_arg "$cfg" home "-h" + append_arg "$cfg" realm "-r" "${realm:-OpenWrt}" + append_arg "$cfg" config "-c" + append_arg "$cfg" cgi_prefix "-x" + append_arg "$cfg" lua_prefix "-l" + append_arg "$cfg" lua_handler "-L" + append_arg "$cfg" script_timeout "-t" + + config_list_foreach "$cfg" listen_http \ + append_listen_http + + config_get ssl "$cfg" listen_https + config_get UHTTPD_KEY "$cfg" key /etc/uhttpd.key + config_get UHTTPD_CERT "$cfg" cert /etc/uhttpd.crt + + [ -n "$ssl" ] && { + [ -f "$UHTTPD_CERT" -a -f "$UHTTPD_KEY" ] || { + config_foreach generate_keys cert + } + + [ -f "$UHTTPD_CERT" -a -f "$UHTTPD_KEY" ] && { + append_arg "$cfg" cert "-C" + append_arg "$cfg" key "-K" + + config_list_foreach "$cfg" listen_https \ + append_listen_https + } + } + + start-stop-daemon -S -x $UHTTPD_BIN \ + -p /var/run/uhttpd_${cfg}.pid \ + -m -b -- -f $UHTTPD_ARGS +} + +stop_instance() +{ + local cfg="$1" + + [ -f /var/run/uhttpd_${cfg}.pid ] && { + start-stop-daemon -K -q -n ${UHTTPD_BIN##*/} \ + -p /var/run/uhttpd_${cfg}.pid -s TERM + + rm -f /var/run/uhttpd_${cfg}.pid + } +} + +start() { + config_load uhttpd + config_foreach start_instance uhttpd +} + +stop() { + config_load uhttpd + config_foreach stop_instance uhttpd +} diff --git a/package/uhttpd/src/Makefile b/package/uhttpd/src/Makefile new file mode 100644 index 000000000..06d61bdef --- /dev/null +++ b/package/uhttpd/src/Makefile @@ -0,0 +1,52 @@ +CGI_SUPPORT ?= 1 +LUA_SUPPORT ?= 1 +TLS_SUPPORT ?= 1 + +CFLAGS ?= -I./lua-5.1.4/src -I./cyassl-1.4.0/include -O0 -ggdb3 +LDFLAGS ?= -L./lua-5.1.4/src -L./cyassl-1.4.0/src/.libs + +CFLAGS += -Wall --std=gnu99 + +OBJ = uhttpd.o uhttpd-file.o uhttpd-utils.o +LIB = -Wl,--export-dynamic -lcrypt -ldl + +TLSLIB = +LUALIB = + + +world: compile + +ifeq ($(CGI_SUPPORT),1) + OBJ += uhttpd-cgi.o + CFLAGS += -DHAVE_CGI +endif + +ifeq ($(LUA_SUPPORT),1) + CFLAGS += -DHAVE_LUA + LUALIB = uhttpd_lua.so + + $(LUALIB): uhttpd-lua.c + $(CC) $(CFLAGS) $(LDFLAGS) $(FPIC) \ + -shared -lm -llua -ldl \ + -o $(LUALIB) uhttpd-lua.c +endif + +ifeq ($(TLS_SUPPORT),1) + CFLAGS += -DHAVE_TLS + TLSLIB = uhttpd_tls.so + + $(TLSLIB): uhttpd-tls.c + $(CC) $(CFLAGS) $(LDFLAGS) $(FPIC) \ + -shared -lcyassl \ + -o $(TLSLIB) uhttpd-tls.c +endif + +%.o: %.c + $(CC) $(CFLAGS) -c -o $@ $< + +compile: $(OBJ) $(TLSLIB) $(LUALIB) + $(CC) -o uhttpd $(LDFLAGS) $(LIB) $(OBJ) + +clean: + rm -f *.o *.so uhttpd + diff --git a/package/uhttpd/src/uhttpd-cgi.c b/package/uhttpd/src/uhttpd-cgi.c new file mode 100644 index 000000000..1a6c6ad4f --- /dev/null +++ b/package/uhttpd/src/uhttpd-cgi.c @@ -0,0 +1,573 @@ +/* + * uhttpd - Tiny single-threaded httpd - CGI handler + * + * Copyright (C) 2010 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "uhttpd.h" +#include "uhttpd-utils.h" +#include "uhttpd-cgi.h" + +static struct http_response * uh_cgi_header_parse(char *buf, int len, int *off) +{ + char *bufptr = NULL; + char *hdrname = NULL; + int hdrcount = 0; + int pos = 0; + + static struct http_response res; + + + if( ((bufptr = strfind(buf, len, "\r\n\r\n", 4)) != NULL) || + ((bufptr = strfind(buf, len, "\n\n", 2)) != NULL) + ) { + *off = (int)(bufptr - buf) + ((bufptr[0] == '\r') ? 4 : 2); + + memset(&res, 0, sizeof(res)); + + res.statuscode = 200; + res.statusmsg = "OK"; + + bufptr = &buf[0]; + + for( pos = 0; pos < len; pos++ ) + { + if( !hdrname && (buf[pos] == ':') ) + { + buf[pos++] = 0; + + if( (pos < len) && (buf[pos] == ' ') ) + pos++; + + if( pos < len ) + { + hdrname = bufptr; + bufptr = &buf[pos]; + } + } + + else if( (buf[pos] == '\r') || (buf[pos] == '\n') ) + { + buf[pos++] = 0; + + if( ! hdrname ) + break; + + if( (pos < len) && (buf[pos] == '\n') ) + pos++; + + if( pos < len ) + { + if( (hdrcount + 1) < array_size(res.headers) ) + { + if( ! strcasecmp(hdrname, "Status") ) + { + res.statuscode = atoi(bufptr); + + if( res.statuscode < 100 ) + res.statuscode = 200; + + if( ((bufptr = strchr(bufptr, ' ')) != NULL) && (&bufptr[1] != 0) ) + res.statusmsg = &bufptr[1]; + } + else + { + res.headers[hdrcount++] = hdrname; + res.headers[hdrcount++] = bufptr; + } + + bufptr = &buf[pos]; + hdrname = NULL; + } + else + { + return NULL; + } + } + } + } + + return &res; + } + + return NULL; +} + +static char * uh_cgi_header_lookup(struct http_response *res, const char *hdrname) +{ + int i; + + foreach_header(i, res->headers) + { + if( ! strcasecmp(res->headers[i], hdrname) ) + return res->headers[i+1]; + } + + return NULL; +} + +static int uh_cgi_error_500(struct client *cl, struct http_request *req, const char *message) +{ + if( uh_http_sendf(cl, NULL, + "HTTP/%.1f 500 Internal Server Error\r\n" + "Content-Type: text/plain\r\n%s\r\n", + req->version, + (req->version > 1.0) + ? "Transfer-Encoding: chunked\r\n" : "" + ) >= 0 + ) { + return uh_http_send(cl, req, message, -1); + } + + return -1; +} + + +void uh_cgi_request(struct client *cl, struct http_request *req, struct path_info *pi) +{ + int i, hdroff, bufoff; + int hdrlen = 0; + int buflen = 0; + int fd_max = 0; + int content_length = 0; + int header_sent = 0; + + int rfd[2] = { 0, 0 }; + int wfd[2] = { 0, 0 }; + + char buf[UH_LIMIT_MSGHEAD]; + char hdr[UH_LIMIT_MSGHEAD]; + + pid_t child; + + fd_set reader; + fd_set writer; + + struct sigaction sa; + struct timeval timeout; + struct http_response *res; + + + /* spawn pipes for me->child, child->me */ + if( (pipe(rfd) < 0) || (pipe(wfd) < 0) ) + { + uh_http_sendhf(cl, 500, "Internal Server Error", + "Failed to create pipe: %s", strerror(errno)); + + if( rfd[0] > 0 ) close(rfd[0]); + if( rfd[1] > 0 ) close(rfd[1]); + if( wfd[0] > 0 ) close(wfd[0]); + if( wfd[1] > 0 ) close(wfd[1]); + + return; + } + + /* fork off child process */ + switch( (child = fork()) ) + { + /* oops */ + case -1: + uh_http_sendhf(cl, 500, "Internal Server Error", + "Failed to fork child: %s", strerror(errno)); + return; + + /* exec child */ + case 0: + /* restore SIGTERM */ + sa.sa_flags = 0; + sa.sa_handler = SIG_DFL; + sigemptyset(&sa.sa_mask); + sigaction(SIGTERM, &sa, NULL); + + /* close loose pipe ends */ + close(rfd[0]); + close(wfd[1]); + + /* patch stdout and stdin to pipes */ + dup2(rfd[1], 1); + dup2(wfd[0], 0); + + /* check for regular, world-executable file */ + if( (pi->stat.st_mode & S_IFREG) && + (pi->stat.st_mode & S_IXOTH) + ) { + /* build environment */ + clearenv(); + + /* common information */ + setenv("GATEWAY_INTERFACE", "CGI/1.1", 1); + setenv("SERVER_SOFTWARE", "uHTTPd", 1); + setenv("PATH", "/sbin:/usr/sbin:/bin:/usr/bin", 1); + +#ifdef HAVE_TLS + /* https? */ + if( cl->tls ) + setenv("HTTPS", "on", 1); +#endif + + /* addresses */ + setenv("SERVER_NAME", sa_straddr(&cl->servaddr), 1); + setenv("SERVER_ADDR", sa_straddr(&cl->servaddr), 1); + setenv("SERVER_PORT", sa_strport(&cl->servaddr), 1); + setenv("REMOTE_HOST", sa_straddr(&cl->peeraddr), 1); + setenv("REMOTE_ADDR", sa_straddr(&cl->peeraddr), 1); + setenv("REMOTE_PORT", sa_strport(&cl->peeraddr), 1); + + /* path information */ + setenv("SCRIPT_NAME", pi->name, 1); + setenv("SCRIPT_FILENAME", pi->phys, 1); + setenv("DOCUMENT_ROOT", pi->root, 1); + setenv("QUERY_STRING", pi->query ? pi->query : "", 1); + + if( pi->info ) + setenv("PATH_INFO", pi->info, 1); + + + /* http version */ + if( req->version > 1.0 ) + setenv("SERVER_PROTOCOL", "HTTP/1.1", 1); + else + setenv("SERVER_PROTOCOL", "HTTP/1.0", 1); + + /* request method */ + switch( req->method ) + { + case UH_HTTP_MSG_GET: + setenv("REQUEST_METHOD", "GET", 1); + break; + + case UH_HTTP_MSG_HEAD: + setenv("REQUEST_METHOD", "HEAD", 1); + break; + + case UH_HTTP_MSG_POST: + setenv("REQUEST_METHOD", "POST", 1); + break; + } + + /* request url */ + setenv("REQUEST_URI", req->url, 1); + + /* remote user */ + if( req->realm ) + setenv("REMOTE_USER", req->realm->user, 1); + + /* request message headers */ + foreach_header(i, req->headers) + { + if( ! strcasecmp(req->headers[i], "Accept") ) + setenv("HTTP_ACCEPT", req->headers[i+1], 1); + + else if( ! strcasecmp(req->headers[i], "Accept-Charset") ) + setenv("HTTP_ACCEPT_CHARSET", req->headers[i+1], 1); + + else if( ! strcasecmp(req->headers[i], "Accept-Encoding") ) + setenv("HTTP_ACCEPT_ENCODING", req->headers[i+1], 1); + + else if( ! strcasecmp(req->headers[i], "Accept-Language") ) + setenv("HTTP_ACCEPT_LANGUAGE", req->headers[i+1], 1); + + else if( ! strcasecmp(req->headers[i], "Authorization") ) + setenv("HTTP_AUTHORIZATION", req->headers[i+1], 1); + + else if( ! strcasecmp(req->headers[i], "Connection") ) + setenv("HTTP_CONNECTION", req->headers[i+1], 1); + + else if( ! strcasecmp(req->headers[i], "Cookie") ) + setenv("HTTP_COOKIE", req->headers[i+1], 1); + + else if( ! strcasecmp(req->headers[i], "Host") ) + setenv("HTTP_HOST", req->headers[i+1], 1); + + else if( ! strcasecmp(req->headers[i], "Referer") ) + setenv("HTTP_REFERER", req->headers[i+1], 1); + + else if( ! strcasecmp(req->headers[i], "User-Agent") ) + setenv("HTTP_USER_AGENT", req->headers[i+1], 1); + + else if( ! strcasecmp(req->headers[i], "Content-Type") ) + setenv("CONTENT_TYPE", req->headers[i+1], 1); + + else if( ! strcasecmp(req->headers[i], "Content-Length") ) + setenv("CONTENT_LENGTH", req->headers[i+1], 1); + } + + + /* execute child code ... */ + if( chdir(pi->root) ) + perror("chdir()"); + + execl(pi->phys, pi->phys, NULL); + + /* in case it fails ... */ + printf( + "Status: 500 Internal Server Error\r\n\r\n" + "Unable to launch the requested CGI program:\n" + " %s: %s\n", + pi->phys, strerror(errno) + ); + } + + /* 403 */ + else + { + printf( + "Status: 403 Forbidden\r\n\r\n" + "Access to this resource is forbidden\n" + ); + } + + close(wfd[0]); + close(rfd[1]); + exit(0); + + break; + + /* parent; handle I/O relaying */ + default: + /* close unneeded pipe ends */ + close(rfd[1]); + close(wfd[0]); + + /* max watch fd */ + fd_max = max(rfd[0], wfd[1]) + 1; + + /* find content length */ + if( req->method == UH_HTTP_MSG_POST ) + { + foreach_header(i, req->headers) + { + if( ! strcasecmp(req->headers[i], "Content-Length") ) + { + content_length = atoi(req->headers[i+1]); + break; + } + } + } + + + memset(hdr, 0, sizeof(hdr)); + + timeout.tv_sec = cl->server->conf->script_timeout; + timeout.tv_usec = 0; + +#define ensure(x) \ + do { if( x < 0 ) goto out; } while(0) + + /* I/O loop, watch our pipe ends and dispatch child reads/writes from/to socket */ + while( 1 ) + { + FD_ZERO(&reader); + FD_ZERO(&writer); + + FD_SET(rfd[0], &reader); + FD_SET(wfd[1], &writer); + + /* wait until we can read or write or both */ + if( select_intr(fd_max, &reader, + (content_length > -1) ? &writer : NULL, NULL, + (header_sent < 1) ? &timeout : NULL) > 0 + ) { + /* ready to write to cgi program */ + if( FD_ISSET(wfd[1], &writer) ) + { + /* there is unread post data waiting */ + if( content_length > 0 ) + { + /* read it from socket ... */ + if( (buflen = uh_tcp_recv(cl, buf, min(content_length, sizeof(buf)))) > 0 ) + { + /* ... and write it to child's stdin */ + if( write(wfd[1], buf, buflen) < 0 ) + perror("write()"); + + content_length -= buflen; + } + + /* unexpected eof! */ + else + { + if( write(wfd[1], "", 0) < 0 ) + perror("write()"); + + content_length = 0; + } + } + + /* there is no more post data, close pipe to child's stdin */ + else if( content_length > -1 ) + { + close(wfd[1]); + content_length = -1; + } + } + + /* ready to read from cgi program */ + if( FD_ISSET(rfd[0], &reader) ) + { + /* read data from child ... */ + if( (buflen = read(rfd[0], buf, sizeof(buf))) > 0 ) + { + /* we have not pushed out headers yet, parse input */ + if( ! header_sent ) + { + /* head buffer not full and no end yet */ + if( hdrlen < sizeof(hdr) ) + { + bufoff = min(buflen, sizeof(hdr) - hdrlen); + memcpy(&hdr[hdrlen], buf, bufoff); + hdrlen += bufoff; + } + else + { + bufoff = 0; + } + + + /* try to parse header ... */ + if( (res = uh_cgi_header_parse(hdr, hdrlen, &hdroff)) != NULL ) + { + /* write status */ + ensure(uh_http_sendf(cl, NULL, + "HTTP/%.1f %03d %s\r\n" + "Connection: close\r\n", + req->version, res->statuscode, + res->statusmsg)); + + /* add Content-Type if no Location or Content-Type */ + if( !uh_cgi_header_lookup(res, "Location") && + !uh_cgi_header_lookup(res, "Content-Type") + ) { + ensure(uh_http_send(cl, NULL, + "Content-Type: text/plain\r\n", -1)); + } + + /* if request was HTTP 1.1 we'll respond chunked */ + if( (req->version > 1.0) && + !uh_cgi_header_lookup(res, "Transfer-Encoding") + ) { + ensure(uh_http_send(cl, NULL, + "Transfer-Encoding: chunked\r\n", -1)); + } + + /* write headers from CGI program */ + foreach_header(i, res->headers) + { + ensure(uh_http_sendf(cl, NULL, "%s: %s\r\n", + res->headers[i], res->headers[i+1])); + } + + /* terminate header */ + ensure(uh_http_send(cl, NULL, "\r\n", -1)); + + /* push out remaining head buffer */ + if( hdroff < hdrlen ) + ensure(uh_http_send(cl, req, &hdr[hdroff], hdrlen - hdroff)); + } + + /* ... failed and head buffer exceeded */ + else if( hdrlen >= sizeof(hdr) ) + { + ensure(uh_cgi_error_500(cl, req, + "The CGI program generated an invalid response:\n\n")); + + ensure(uh_http_send(cl, req, hdr, hdrlen)); + } + + /* ... failed but free buffer space, try again */ + else + { + continue; + } + + /* push out remaining read buffer */ + if( bufoff < buflen ) + ensure(uh_http_send(cl, req, &buf[bufoff], buflen - bufoff)); + + header_sent = 1; + continue; + } + + + /* headers complete, pass through buffer to socket */ + ensure(uh_http_send(cl, req, buf, buflen)); + } + + /* looks like eof from child */ + else + { + /* cgi script did not output useful stuff at all */ + if( ! header_sent ) + { + /* I would do this ... + * + * uh_cgi_error_500(cl, req, + * "The CGI program generated an " + * "invalid response:\n\n"); + * + * ... but in order to stay as compatible as possible, + * treat whatever we got as text/plain response and + * build the required headers here. + */ + + ensure(uh_http_sendf(cl, NULL, + "HTTP/%.1f 200 OK\r\n" + "Content-Type: text/plain\r\n" + "%s\r\n", + req->version, (req->version > 1.0) + ? "Transfer-Encoding: chunked\r\n" : "" + )); + + ensure(uh_http_send(cl, req, hdr, hdrlen)); + } + + /* send final chunk if we're in chunked transfer mode */ + ensure(uh_http_send(cl, req, "", 0)); + break; + } + } + } + + /* timeout exceeded or interrupted by SIGCHLD */ + else + { + if( (errno != EINTR) && ! header_sent ) + { + ensure(uh_http_sendhf(cl, 504, "Gateway Timeout", + "The CGI script took too long to produce " + "a response")); + } + + /* send final chunk if we're in chunked transfer mode */ + ensure(uh_http_send(cl, req, "", 0)); + + break; + } + } + + out: + close(rfd[0]); + close(wfd[1]); + + if( !kill(child, 0) ) + { + kill(child, SIGTERM); + waitpid(child, NULL, 0); + } + + break; + } +} + diff --git a/package/uhttpd/src/uhttpd-cgi.h b/package/uhttpd/src/uhttpd-cgi.h new file mode 100644 index 000000000..c90557d8f --- /dev/null +++ b/package/uhttpd/src/uhttpd-cgi.h @@ -0,0 +1,31 @@ +/* + * uhttpd - Tiny single-threaded httpd - CGI header + * + * Copyright (C) 2010 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _UHTTPD_CGI_ + +#include +#include +#include +#include +#include + +void uh_cgi_request( + struct client *cl, struct http_request *req, struct path_info *pi +); + +#endif diff --git a/package/uhttpd/src/uhttpd-file.c b/package/uhttpd/src/uhttpd-file.c new file mode 100644 index 000000000..2a06f8520 --- /dev/null +++ b/package/uhttpd/src/uhttpd-file.c @@ -0,0 +1,395 @@ +/* + * uhttpd - Tiny single-threaded httpd - Static file handler + * + * Copyright (C) 2010 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define _XOPEN_SOURCE 500 /* strptime() */ +#define _BSD_SOURCE /* scandir(), timegm() */ + +#include "uhttpd.h" +#include "uhttpd-utils.h" +#include "uhttpd-file.h" + +#include "uhttpd-mimetypes.h" + + +static const char * uh_file_mime_lookup(const char *path) +{ + struct mimetype *m = &uh_mime_types[0]; + char *p, *pd, *ps; + + ps = strrchr(path, '/'); + pd = strrchr(path, '.'); + + /* use either slash or dot as separator, whatever comes last */ + p = (ps && pd && (ps > pd)) ? ps : pd; + + if( (p != NULL) && (*(++p) != 0) ) + { + while( m->extn ) + { + if( ! strcasecmp(p, m->extn) ) + return m->mime; + + m++; + } + } + + return "application/octet-stream"; +} + +static const char * uh_file_mktag(struct stat *s) +{ + static char tag[128]; + + snprintf(tag, sizeof(tag), "\"%x-%x-%x\"", + (unsigned int) s->st_ino, + (unsigned int) s->st_size, + (unsigned int) s->st_mtime + ); + + return tag; +} + +static time_t uh_file_date2unix(const char *date) +{ + struct tm t; + + memset(&t, 0, sizeof(t)); + + if( strptime(date, "%a, %d %b %Y %H:%M:%S %Z", &t) != NULL ) + return timegm(&t); + + return 0; +} + +static char * uh_file_unix2date(time_t ts) +{ + static char str[128]; + struct tm *t = gmtime(&ts); + + strftime(str, sizeof(str), "%a, %d %b %Y %H:%M:%S GMT", t); + + return str; +} + +static char * uh_file_header_lookup(struct http_request *req, const char *name) +{ + int i; + + foreach_header(i, req->headers) + { + if( ! strcasecmp(req->headers[i], name) ) + return req->headers[i+1]; + } + + return NULL; +} + +static void uh_file_response_ok_hdrs(struct client *cl, struct http_request *req, struct stat *s) +{ + uh_http_sendf(cl, NULL, "Connection: close\r\n"); + + if( s ) + { + uh_http_sendf(cl, NULL, "ETag: %s\r\n", uh_file_mktag(s)); + uh_http_sendf(cl, NULL, "Last-Modified: %s\r\n", uh_file_unix2date(s->st_mtime)); + } + + uh_http_sendf(cl, NULL, "Date: %s\r\n", uh_file_unix2date(time(NULL))); +} + +static void uh_file_response_200(struct client *cl, struct http_request *req, struct stat *s) +{ + uh_http_sendf(cl, NULL, "HTTP/%.1f 200 OK\r\n", req->version); + uh_file_response_ok_hdrs(cl, req, s); +} + +static void uh_file_response_304(struct client *cl, struct http_request *req, struct stat *s) +{ + uh_http_sendf(cl, NULL, "HTTP/%.1f 304 Not Modified\r\n", req->version); + uh_file_response_ok_hdrs(cl, req, s); +} + +static void uh_file_response_412(struct client *cl, struct http_request *req) +{ + uh_http_sendf(cl, NULL, + "HTTP/%.1f 412 Precondition Failed\r\n" + "Connection: close\r\n", req->version); +} + +static int uh_file_if_match(struct client *cl, struct http_request *req, struct stat *s) +{ + const char *tag = uh_file_mktag(s); + char *hdr = uh_file_header_lookup(req, "If-Match"); + char *p; + int i; + + if( hdr ) + { + p = &hdr[0]; + + for( i = 0; i < strlen(hdr); i++ ) + { + if( (hdr[i] == ' ') || (hdr[i] == ',') ) + { + hdr[i++] = 0; + p = &hdr[i]; + } + else if( !strcmp(p, "*") || !strcmp(p, tag) ) + { + return 1; + } + } + + uh_file_response_412(cl, req); + return 0; + } + + return 1; +} + +static int uh_file_if_modified_since(struct client *cl, struct http_request *req, struct stat *s) +{ + char *hdr = uh_file_header_lookup(req, "If-Modified-Since"); + + if( hdr ) + { + if( uh_file_date2unix(hdr) < s->st_mtime ) + { + return 1; + } + else + { + uh_file_response_304(cl, req, s); + return 0; + } + } + + return 1; +} + +static int uh_file_if_none_match(struct client *cl, struct http_request *req, struct stat *s) +{ + const char *tag = uh_file_mktag(s); + char *hdr = uh_file_header_lookup(req, "If-None-Match"); + char *p; + int i; + + if( hdr ) + { + p = &hdr[0]; + + for( i = 0; i < strlen(hdr); i++ ) + { + if( (hdr[i] == ' ') || (hdr[i] == ',') ) + { + hdr[i++] = 0; + p = &hdr[i]; + } + else if( !strcmp(p, "*") || !strcmp(p, tag) ) + { + if( (req->method == UH_HTTP_MSG_GET) || + (req->method == UH_HTTP_MSG_HEAD) ) + uh_file_response_304(cl, req, s); + else + uh_file_response_412(cl, req); + + return 0; + } + } + } + + return 1; +} + +static int uh_file_if_range(struct client *cl, struct http_request *req, struct stat *s) +{ + char *hdr = uh_file_header_lookup(req, "If-Range"); + + if( hdr ) + { + uh_file_response_412(cl, req); + return 0; + } + + return 1; +} + +static int uh_file_if_unmodified_since(struct client *cl, struct http_request *req, struct stat *s) +{ + char *hdr = uh_file_header_lookup(req, "If-Unmodified-Since"); + + if( hdr ) + { + if( uh_file_date2unix(hdr) <= s->st_mtime ) + { + uh_file_response_412(cl, req); + return 0; + } + } + + return 1; +} + + +static int uh_file_scandir_filter_dir(const struct dirent *e) +{ + return strcmp(e->d_name, ".") ? 1 : 0; +} + +static void uh_file_dirlist(struct client *cl, struct http_request *req, struct path_info *pi) +{ + int i, count; + char filename[PATH_MAX]; + char *pathptr; + struct dirent **files = NULL; + struct stat s; + + uh_http_sendf(cl, req, + "Index of %s" + "

Index of %s

    ", + pi->name, pi->name + ); + + if( (count = scandir(pi->phys, &files, uh_file_scandir_filter_dir, alphasort)) > 0 ) + { + memset(filename, 0, sizeof(filename)); + memcpy(filename, pi->phys, sizeof(filename)); + pathptr = &filename[strlen(filename)]; + + /* list subdirs */ + for( i = 0; i < count; i++ ) + { + strncat(filename, files[i]->d_name, + sizeof(filename) - strlen(files[i]->d_name)); + + if( !stat(filename, &s) && (s.st_mode & S_IFDIR) ) + uh_http_sendf(cl, req, + "
  1. %s/
    " + "modified: %s
    directory - %.02f kbyte" + "

    2. ", + pi->name, files[i]->d_name, files[i]->d_name, + uh_file_unix2date(s.st_mtime), s.st_size / 1024.0 + ); + + *pathptr = 0; + } + + /* list files */ + for( i = 0; i < count; i++ ) + { + strncat(filename, files[i]->d_name, + sizeof(filename) - strlen(files[i]->d_name)); + + if( !stat(filename, &s) && !(s.st_mode & S_IFDIR) ) + uh_http_sendf(cl, req, + "
  2. %s
    " + "modified: %s
    %s - %.02f kbyte
    " + "
    3. ", + pi->name, files[i]->d_name, files[i]->d_name, + uh_file_unix2date(s.st_mtime), + uh_file_mime_lookup(filename), s.st_size / 1024.0 + ); + + *pathptr = 0; + free(files[i]); + } + } + + free(files); + + uh_http_sendf(cl, req, "
"); + uh_http_sendf(cl, req, ""); +} + + +void uh_file_request(struct client *cl, struct http_request *req, struct path_info *pi) +{ + int fd, rlen; + char buf[UH_LIMIT_MSGHEAD]; + + /* we have a file */ + if( (pi->stat.st_mode & S_IFREG) && ((fd = open(pi->phys, O_RDONLY)) > 0) ) + { + /* test preconditions */ + if( + uh_file_if_modified_since(cl, req, &pi->stat) && + uh_file_if_match(cl, req, &pi->stat) && + uh_file_if_range(cl, req, &pi->stat) && + uh_file_if_unmodified_since(cl, req, &pi->stat) && + uh_file_if_none_match(cl, req, &pi->stat) + ) { + /* write status */ + uh_file_response_200(cl, req, &pi->stat); + + uh_http_sendf(cl, NULL, "Content-Type: %s\r\n", uh_file_mime_lookup(pi->name)); + uh_http_sendf(cl, NULL, "Content-Length: %i\r\n", pi->stat.st_size); + + /* if request was HTTP 1.1 we'll respond chunked */ + if( (req->version > 1.0) && (req->method != UH_HTTP_MSG_HEAD) ) + uh_http_send(cl, NULL, "Transfer-Encoding: chunked\r\n", -1); + + /* close header */ + uh_http_send(cl, NULL, "\r\n", -1); + + /* send body */ + if( req->method != UH_HTTP_MSG_HEAD ) + { + /* pump file data */ + while( (rlen = read(fd, buf, sizeof(buf))) > 0 ) + { + if( uh_http_send(cl, req, buf, rlen) < 0 ) + break; + } + + /* send trailer in chunked mode */ + uh_http_send(cl, req, "", 0); + } + } + + /* one of the preconditions failed, terminate opened header and exit */ + else + { + uh_http_send(cl, NULL, "\r\n", -1); + } + + close(fd); + } + + /* directory */ + else if( pi->stat.st_mode & S_IFDIR ) + { + /* write status */ + uh_file_response_200(cl, req, NULL); + + if( req->version > 1.0 ) + uh_http_send(cl, NULL, "Transfer-Encoding: chunked\r\n", -1); + + uh_http_send(cl, NULL, "Content-Type: text/html\r\n\r\n", -1); + + /* content */ + uh_file_dirlist(cl, req, pi); + } + + /* 403 */ + else + { + uh_http_sendhf(cl, 403, "Forbidden", + "Access to this resource is forbidden"); + } +} + diff --git a/package/uhttpd/src/uhttpd-file.h b/package/uhttpd/src/uhttpd-file.h new file mode 100644 index 000000000..3d4681516 --- /dev/null +++ b/package/uhttpd/src/uhttpd-file.h @@ -0,0 +1,38 @@ +/* + * uhttpd - Tiny single-threaded httpd - Static file header + * + * Copyright (C) 2010 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _UHTTPD_FILE_ + +#include +#include +#include +#include +#include +#include +#include + +struct mimetype { + const char *extn; + const char *mime; +}; + +void uh_file_request( + struct client *cl, struct http_request *req, struct path_info *pi +); + +#endif diff --git a/package/uhttpd/src/uhttpd-lua.c b/package/uhttpd/src/uhttpd-lua.c new file mode 100644 index 000000000..c2efe3384 --- /dev/null +++ b/package/uhttpd/src/uhttpd-lua.c @@ -0,0 +1,548 @@ +/* + * uhttpd - Tiny single-threaded httpd - Lua handler + * + * Copyright (C) 2010 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "uhttpd.h" +#include "uhttpd-utils.h" +#include "uhttpd-lua.h" + + +static int uh_lua_recv(lua_State *L) +{ + size_t length; + char buffer[UH_LIMIT_MSGHEAD]; + ssize_t rlen = 0; + fd_set reader; + struct timeval timeout; + + length = luaL_checknumber(L, 1); + + if( (length > 0) && (length <= sizeof(buffer)) ) + { + FD_ZERO(&reader); + FD_SET(fileno(stdin), &reader); + + /* fail after 0.1s */ + timeout.tv_sec = 0; + timeout.tv_usec = 100000; + + /* check whether fd is readable */ + if( select(fileno(stdin) + 1, &reader, NULL, NULL, &timeout) > 0 ) + { + /* receive data */ + rlen = read(fileno(stdin), buffer, length); + lua_pushnumber(L, rlen); + + if( rlen > 0 ) + { + lua_pushlstring(L, buffer, rlen); + return 2; + } + + return 1; + } + + /* no, timeout and actually no data */ + lua_pushnumber(L, -2); + return 1; + } + + /* parameter error */ + lua_pushnumber(L, -3); + return 1; +} + +static int uh_lua_send_common(lua_State *L, int chunked) +{ + size_t length; + const char *buffer; + char chunk[16]; + ssize_t slen = 0; + + buffer = luaL_checklstring(L, 1, &length); + + if( chunked ) + { + if( length > 0 ) + { + snprintf(chunk, sizeof(chunk), "%X\r\n", length); + slen = write(fileno(stdout), chunk, strlen(chunk)); + slen += write(fileno(stdout), buffer, length); + slen += write(fileno(stdout), "\r\n", 2); + } + else + { + slen = write(fileno(stdout), "0\r\n\r\n", 5); + } + } + else + { + slen = write(fileno(stdout), buffer, length); + } + + lua_pushnumber(L, slen); + return 1; +} + +static int uh_lua_send(lua_State *L) +{ + return uh_lua_send_common(L, 0); +} + +static int uh_lua_sendc(lua_State *L) +{ + return uh_lua_send_common(L, 1); +} + +static int uh_lua_urldecode(lua_State *L) +{ + size_t inlen, outlen; + const char *inbuf; + char outbuf[UH_LIMIT_MSGHEAD]; + + inbuf = luaL_checklstring(L, 1, &inlen); + outlen = uh_urldecode(outbuf, sizeof(outbuf), inbuf, inlen); + + lua_pushlstring(L, outbuf, outlen); + return 1; +} + + +lua_State * uh_lua_init(const char *handler) +{ + lua_State *L = lua_open(); + const char *err_str = NULL; + + /* Load standard libaries */ + luaL_openlibs(L); + + /* build uhttpd api table */ + lua_newtable(L); + + /* register global send and receive functions */ + lua_pushcfunction(L, uh_lua_recv); + lua_setfield(L, -2, "recv"); + + lua_pushcfunction(L, uh_lua_send); + lua_setfield(L, -2, "send"); + + lua_pushcfunction(L, uh_lua_sendc); + lua_setfield(L, -2, "sendc"); + + lua_pushcfunction(L, uh_lua_urldecode); + lua_setfield(L, -2, "urldecode"); + + /* _G.uhttpd = { ... } */ + lua_setfield(L, LUA_GLOBALSINDEX, "uhttpd"); + + + /* load Lua handler */ + switch( luaL_loadfile(L, handler) ) + { + case LUA_ERRSYNTAX: + fprintf(stderr, + "Lua handler contains syntax errors, unable to continue\n"); + exit(1); + + case LUA_ERRMEM: + fprintf(stderr, + "Lua handler ran out of memory, unable to continue\n"); + exit(1); + + case LUA_ERRFILE: + fprintf(stderr, + "Lua cannot open the handler script, unable to continue\n"); + exit(1); + + default: + /* compile Lua handler */ + switch( lua_pcall(L, 0, 0, 0) ) + { + case LUA_ERRRUN: + err_str = luaL_checkstring(L, -1); + fprintf(stderr, + "Lua handler had runtime error, unable to continue\n" + "Error: %s\n", err_str + ); + exit(1); + + case LUA_ERRMEM: + err_str = luaL_checkstring(L, -1); + fprintf(stderr, + "Lua handler ran out of memory, unable to continue\n" + "Error: %s\n", err_str + ); + exit(1); + + default: + /* test handler function */ + lua_getglobal(L, UH_LUA_CALLBACK); + + if( ! lua_isfunction(L, -1) ) + { + fprintf(stderr, + "Lua handler provides no " UH_LUA_CALLBACK "(), unable to continue\n"); + exit(1); + } + + lua_pop(L, 1); + break; + } + + break; + } + + return L; +} + +void uh_lua_request(struct client *cl, struct http_request *req, lua_State *L) +{ + int i, data_sent; + int content_length = 0; + int buflen = 0; + int fd_max = 0; + char *query_string; + const char *prefix = cl->server->conf->lua_prefix; + const char *err_str = NULL; + + int rfd[2] = { 0, 0 }; + int wfd[2] = { 0, 0 }; + + char buf[UH_LIMIT_MSGHEAD]; + + pid_t child; + + fd_set reader; + fd_set writer; + + struct sigaction sa; + struct timeval timeout; + + + /* spawn pipes for me->child, child->me */ + if( (pipe(rfd) < 0) || (pipe(wfd) < 0) ) + { + uh_http_sendhf(cl, 500, "Internal Server Error", + "Failed to create pipe: %s", strerror(errno)); + + if( rfd[0] > 0 ) close(rfd[0]); + if( rfd[1] > 0 ) close(rfd[1]); + if( wfd[0] > 0 ) close(wfd[0]); + if( wfd[1] > 0 ) close(wfd[1]); + + return; + } + + + switch( (child = fork()) ) + { + case -1: + uh_http_sendhf(cl, 500, "Internal Server Error", + "Failed to fork child: %s", strerror(errno)); + break; + + case 0: + /* restore SIGTERM */ + sa.sa_flags = 0; + sa.sa_handler = SIG_DFL; + sigemptyset(&sa.sa_mask); + sigaction(SIGTERM, &sa, NULL); + + /* close loose pipe ends */ + close(rfd[0]); + close(wfd[1]); + + /* patch stdout and stdin to pipes */ + dup2(rfd[1], 1); + dup2(wfd[0], 0); + + /* put handler callback on stack */ + lua_getglobal(L, UH_LUA_CALLBACK); + + /* build env table */ + lua_newtable(L); + + /* request method */ + switch(req->method) + { + case UH_HTTP_MSG_GET: + lua_pushstring(L, "GET"); + break; + + case UH_HTTP_MSG_HEAD: + lua_pushstring(L, "HEAD"); + break; + + case UH_HTTP_MSG_POST: + lua_pushstring(L, "POST"); + break; + } + + lua_setfield(L, -2, "REQUEST_METHOD"); + + /* request url */ + lua_pushstring(L, req->url); + lua_setfield(L, -2, "REQUEST_URI"); + + /* script name */ + lua_pushstring(L, cl->server->conf->lua_prefix); + lua_setfield(L, -2, "SCRIPT_NAME"); + + /* query string, path info */ + if( (query_string = strchr(req->url, '?')) != NULL ) + { + lua_pushstring(L, query_string + 1); + lua_setfield(L, -2, "QUERY_STRING"); + + if( (int)(query_string - req->url) > strlen(prefix) ) + { + lua_pushlstring(L, + &req->url[strlen(prefix)], + (int)(query_string - req->url) - strlen(prefix) + ); + + lua_setfield(L, -2, "PATH_INFO"); + } + } + else if( strlen(req->url) > strlen(prefix) ) + { + lua_pushstring(L, &req->url[strlen(prefix)]); + lua_setfield(L, -2, "PATH_INFO"); + } + + /* http protcol version */ + lua_pushnumber(L, floor(req->version * 10) / 10); + lua_setfield(L, -2, "HTTP_VERSION"); + + if( req->version > 1.0 ) + lua_pushstring(L, "HTTP/1.1"); + else + lua_pushstring(L, "HTTP/1.0"); + + lua_setfield(L, -2, "SERVER_PROTOCOL"); + + + /* address information */ + lua_pushstring(L, sa_straddr(&cl->peeraddr)); + lua_setfield(L, -2, "REMOTE_ADDR"); + + lua_pushinteger(L, sa_port(&cl->peeraddr)); + lua_setfield(L, -2, "REMOTE_PORT"); + + lua_pushstring(L, sa_straddr(&cl->servaddr)); + lua_setfield(L, -2, "SERVER_ADDR"); + + lua_pushinteger(L, sa_port(&cl->servaddr)); + lua_setfield(L, -2, "SERVER_PORT"); + + /* essential env vars */ + foreach_header(i, req->headers) + { + if( !strcasecmp(req->headers[i], "Content-Length") ) + { + lua_pushnumber(L, atoi(req->headers[i+1])); + lua_setfield(L, -2, "CONTENT_LENGTH"); + } + else if( !strcasecmp(req->headers[i], "Content-Type") ) + { + lua_pushstring(L, req->headers[i+1]); + lua_setfield(L, -2, "CONTENT_TYPE"); + } + } + + /* misc. headers */ + lua_newtable(L); + + foreach_header(i, req->headers) + { + if( strcasecmp(req->headers[i], "Content-Length") && + strcasecmp(req->headers[i], "Content-Type") + ) { + lua_pushstring(L, req->headers[i+1]); + lua_setfield(L, -2, req->headers[i]); + } + } + + lua_setfield(L, -2, "headers"); + + + /* call */ + switch( lua_pcall(L, 1, 0, 0) ) + { + case LUA_ERRMEM: + case LUA_ERRRUN: + err_str = luaL_checkstring(L, -1); + + if( ! err_str ) + err_str = "Unknown error"; + + printf( + "HTTP/%.1f 500 Internal Server Error\r\n" + "Connection: close\r\n" + "Content-Type: text/plain\r\n" + "Content-Length: %i\r\n\r\n" + "Lua raised a runtime error:\n %s\n", + req->version, 31 + strlen(err_str), err_str + ); + + break; + + default: + break; + } + + close(wfd[0]); + close(rfd[1]); + exit(0); + + break; + + /* parent; handle I/O relaying */ + default: + /* close unneeded pipe ends */ + close(rfd[1]); + close(wfd[0]); + + /* max watch fd */ + fd_max = max(rfd[0], wfd[1]) + 1; + + /* find content length */ + if( req->method == UH_HTTP_MSG_POST ) + { + foreach_header(i, req->headers) + { + if( ! strcasecmp(req->headers[i], "Content-Length") ) + { + content_length = atoi(req->headers[i+1]); + break; + } + } + } + + +#define ensure(x) \ + do { if( x < 0 ) goto out; } while(0) + + data_sent = 0; + + timeout.tv_sec = cl->server->conf->script_timeout; + timeout.tv_usec = 0; + + /* I/O loop, watch our pipe ends and dispatch child reads/writes from/to socket */ + while( 1 ) + { + FD_ZERO(&reader); + FD_ZERO(&writer); + + FD_SET(rfd[0], &reader); + FD_SET(wfd[1], &writer); + + /* wait until we can read or write or both */ + if( select_intr(fd_max, &reader, + (content_length > -1) ? &writer : NULL, NULL, + (data_sent < 1) ? &timeout : NULL) > 0 + ) { + /* ready to write to Lua child */ + if( FD_ISSET(wfd[1], &writer) ) + { + /* there is unread post data waiting */ + if( content_length > 0 ) + { + /* read it from socket ... */ + if( (buflen = uh_tcp_recv(cl, buf, min(content_length, sizeof(buf)))) > 0 ) + { + /* ... and write it to child's stdin */ + if( write(wfd[1], buf, buflen) < 0 ) + perror("write()"); + + content_length -= buflen; + } + + /* unexpected eof! */ + else + { + if( write(wfd[1], "", 0) < 0 ) + perror("write()"); + + content_length = 0; + } + } + + /* there is no more post data, close pipe to child's stdin */ + else if( content_length > -1 ) + { + close(wfd[1]); + content_length = -1; + } + } + + /* ready to read from Lua child */ + if( FD_ISSET(rfd[0], &reader) ) + { + /* read data from child ... */ + if( (buflen = read(rfd[0], buf, sizeof(buf))) > 0 ) + { + /* pass through buffer to socket */ + ensure(uh_tcp_send(cl, buf, buflen)); + data_sent = 1; + } + + /* looks like eof from child */ + else + { + /* error? */ + if( ! data_sent ) + uh_http_sendhf(cl, 500, "Internal Server Error", + "The Lua child did not produce any response"); + + break; + } + } + } + + /* timeout exceeded or interrupted by SIGCHLD */ + else + { + if( (errno != EINTR) && ! data_sent ) + { + ensure(uh_http_sendhf(cl, 504, "Gateway Timeout", + "The Lua script took too long to produce " + "a response")); + } + + break; + } + } + + out: + close(rfd[0]); + close(wfd[1]); + + if( !kill(child, 0) ) + { + kill(child, SIGTERM); + waitpid(child, NULL, 0); + } + + break; + } +} + +void uh_lua_close(lua_State *L) +{ + lua_close(L); +} diff --git a/package/uhttpd/src/uhttpd-lua.h b/package/uhttpd/src/uhttpd-lua.h new file mode 100644 index 000000000..730466500 --- /dev/null +++ b/package/uhttpd/src/uhttpd-lua.h @@ -0,0 +1,43 @@ +/* + * uhttpd - Tiny single-threaded httpd - Lua header + * + * Copyright (C) 2010 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _UHTTPD_LUA_ + +#include /* floor() */ +#include + +#include +#include +#include + +#define UH_LUA_CALLBACK "handle_request" + +#define UH_LUA_ERR_TIMEOUT -1 +#define UH_LUA_ERR_TOOBIG -2 +#define UH_LUA_ERR_PARAM -3 + + +lua_State * uh_lua_init(); + +void uh_lua_request( + struct client *cl, struct http_request *req, lua_State *L +); + +void uh_lua_close(lua_State *L); + +#endif diff --git a/package/uhttpd/src/uhttpd-mimetypes.h b/package/uhttpd/src/uhttpd-mimetypes.h new file mode 100644 index 000000000..1c93f3113 --- /dev/null +++ b/package/uhttpd/src/uhttpd-mimetypes.h @@ -0,0 +1,80 @@ +/* + * uhttpd - Tiny single-threaded httpd - MIME type definitions + * + * Copyright (C) 2010 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _UHTTPD_MIMETYPES_ + +static struct mimetype uh_mime_types[] = { + + { "txt", "text/plain" }, + { "log", "text/plain" }, + { "js", "text/javascript" }, + { "css", "text/css" }, + { "htm", "text/html" }, + { "html", "text/html" }, + { "diff", "text/x-patch" }, + { "patch", "text/x-patch" }, + { "c", "text/x-csrc" }, + { "h", "text/x-chdr" }, + { "o", "text/x-object" }, + { "ko", "text/x-object" }, + + { "bmp", "image/bmp" }, + { "gif", "image/gif" }, + { "png", "image/png" }, + { "jpg", "image/jpeg" }, + { "jpeg", "image/jpeg" }, + { "svg", "image/svg+xml" }, + + { "zip", "application/zip" }, + { "pdf", "application/pdf" }, + { "xml", "application/xml" }, + { "xsl", "application/xml" }, + { "doc", "application/msword" }, + { "ppt", "application/vnd.ms-powerpoint" }, + { "xls", "application/vnd.ms-excel" }, + { "odt", "application/vnd.oasis.opendocument.text" }, + { "odp", "application/vnd.oasis.opendocument.presentation" }, + { "pl", "application/x-perl" }, + { "sh", "application/x-shellscript" }, + { "php", "application/x-php" }, + { "deb", "application/x-deb" }, + { "iso", "application/x-cd-image" }, + { "tgz", "application/x-compressed-tar" }, + { "gz", "application/x-gzip" }, + { "bz2", "application/x-bzip" }, + { "tar", "application/x-tar" }, + { "rar", "application/x-rar-compressed" }, + + { "mp3", "audio/mpeg" }, + { "ogg", "audio/x-vorbis+ogg" }, + { "wav", "audio/x-wav" }, + + { "mpg", "video/mpeg" }, + { "mpeg", "video/mpeg" }, + { "avi", "video/x-msvideo" }, + + { "README", "text/plain" }, + { "log", "text/plain" }, + { "cfg", "text/plain" }, + { "conf", "text/plain" }, + + { NULL, NULL } +}; + +#endif + diff --git a/package/uhttpd/src/uhttpd-tls.c b/package/uhttpd/src/uhttpd-tls.c new file mode 100644 index 000000000..cb5061638 --- /dev/null +++ b/package/uhttpd/src/uhttpd-tls.c @@ -0,0 +1,82 @@ +/* + * uhttpd - Tiny single-threaded httpd - TLS helper + * + * Copyright (C) 2010 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "uhttpd.h" +#include "uhttpd-tls.h" +#include "uhttpd-utils.h" + + +SSL_CTX * uh_tls_ctx_init() +{ + SSL_CTX *c = NULL; + SSL_load_error_strings(); + SSL_library_init(); + + if( (c = SSL_CTX_new(TLSv1_server_method())) != NULL ) + SSL_CTX_set_verify(c, SSL_VERIFY_NONE, NULL); + + return c; +} + +int uh_tls_ctx_cert(SSL_CTX *c, const char *file) +{ + return SSL_CTX_use_certificate_file(c, file, SSL_FILETYPE_ASN1); +} + +int uh_tls_ctx_key(SSL_CTX *c, const char *file) +{ + return SSL_CTX_use_PrivateKey_file(c, file, SSL_FILETYPE_ASN1); +} + +void uh_tls_ctx_free(struct listener *l) +{ + SSL_CTX_free(l->tls); +} + + +void uh_tls_client_accept(struct client *c) +{ + if( c->server && c->server->tls ) + { + c->tls = SSL_new(c->server->tls); + SSL_set_fd(c->tls, c->socket); + } +} + +int uh_tls_client_recv(struct client *c, void *buf, int len) +{ + return SSL_read(c->tls, buf, len); +} + +int uh_tls_client_send(struct client *c, void *buf, int len) +{ + return SSL_write(c->tls, buf, len); +} + +void uh_tls_client_close(struct client *c) +{ + if( c->tls ) + { + SSL_shutdown(c->tls); + SSL_free(c->tls); + + c->tls = NULL; + } +} + + diff --git a/package/uhttpd/src/uhttpd-tls.h b/package/uhttpd/src/uhttpd-tls.h new file mode 100644 index 000000000..4a98b78c6 --- /dev/null +++ b/package/uhttpd/src/uhttpd-tls.h @@ -0,0 +1,35 @@ +/* + * uhttpd - Tiny single-threaded httpd - TLS header + * + * Copyright (C) 2010 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _UHTTPD_TLS_ + +#include + + +SSL_CTX * uh_tls_ctx_init(); +int uh_tls_ctx_cert(SSL_CTX *c, const char *file); +int uh_tls_ctx_key(SSL_CTX *c, const char *file); +void uh_tls_ctx_free(struct listener *l); + +void uh_tls_client_accept(struct client *c); +int uh_tls_client_recv(struct client *c, void *buf, int len); +int uh_tls_client_send(struct client *c, void *buf, int len); +void uh_tls_client_close(struct client *c); + +#endif + diff --git a/package/uhttpd/src/uhttpd-utils.c b/package/uhttpd/src/uhttpd-utils.c new file mode 100644 index 000000000..55b2c410e --- /dev/null +++ b/package/uhttpd/src/uhttpd-utils.c @@ -0,0 +1,768 @@ +/* + * uhttpd - Tiny single-threaded httpd - Utility functions + * + * Copyright (C) 2010 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define _XOPEN_SOURCE 500 /* crypt() */ +#define _BSD_SOURCE /* strcasecmp(), strncasecmp() */ + +#include "uhttpd.h" +#include "uhttpd-utils.h" + +#ifdef HAVE_TLS +#include "uhttpd-tls.h" +#endif + + +static char *uh_index_files[] = { + "index.html", + "index.htm", + "default.html", + "default.htm" +}; + + +const char * sa_straddr(void *sa) +{ + static char str[INET6_ADDRSTRLEN]; + struct sockaddr_in *v4 = (struct sockaddr_in *)sa; + struct sockaddr_in6 *v6 = (struct sockaddr_in6 *)sa; + + if( v4->sin_family == AF_INET ) + return inet_ntop(AF_INET, &(v4->sin_addr), str, sizeof(str)); + else + return inet_ntop(AF_INET6, &(v6->sin6_addr), str, sizeof(str)); +} + +const char * sa_strport(void *sa) +{ + static char str[6]; + snprintf(str, sizeof(str), "%i", sa_port(sa)); + return str; +} + +int sa_port(void *sa) +{ + return ntohs(((struct sockaddr_in6 *)sa)->sin6_port); +} + +/* Simple strstr() like function that takes len arguments for both haystack and needle. */ +char *strfind(char *haystack, int hslen, const char *needle, int ndlen) +{ + int match = 0; + int i, j; + + for( i = 0; i < hslen; i++ ) + { + if( haystack[i] == needle[0] ) + { + match = ((ndlen == 1) || ((i + ndlen) <= hslen)); + + for( j = 1; (j < ndlen) && ((i + j) < hslen); j++ ) + { + if( haystack[i+j] != needle[j] ) + { + match = 0; + break; + } + } + + if( match ) + return &haystack[i]; + } + } + + return NULL; +} + +/* interruptable select() */ +int select_intr(int n, fd_set *r, fd_set *w, fd_set *e, struct timeval *t) +{ + int rv; + sigset_t ssn, sso; + + /* unblock SIGCHLD */ + sigemptyset(&ssn); + sigaddset(&ssn, SIGCHLD); + sigprocmask(SIG_UNBLOCK, &ssn, &sso); + + rv = select(n, r, w, e, t); + + /* restore signal mask */ + sigprocmask(SIG_SETMASK, &sso, NULL); + + return rv; +} + + +int uh_tcp_send(struct client *cl, const char *buf, int len) +{ + fd_set writer; + struct timeval timeout; + + FD_ZERO(&writer); + FD_SET(cl->socket, &writer); + + timeout.tv_sec = 0; + timeout.tv_usec = 500000; + + if( select(cl->socket + 1, NULL, &writer, NULL, &timeout) > 0 ) + { +#ifdef HAVE_TLS + if( cl->tls ) + return cl->server->conf->tls_send(cl, (void *)buf, len); + else +#endif + return send(cl->socket, buf, len, 0); + } + + return -1; +} + +int uh_tcp_peek(struct client *cl, char *buf, int len) +{ + int sz = uh_tcp_recv(cl, buf, len); + + /* store received data in peek buffer */ + if( sz > 0 ) + { + cl->peeklen = sz; + memcpy(cl->peekbuf, buf, sz); + } + + return sz; +} + +int uh_tcp_recv(struct client *cl, char *buf, int len) +{ + int sz = 0; + int rsz = 0; + + /* first serve data from peek buffer */ + if( cl->peeklen > 0 ) + { + sz = min(cl->peeklen, len); + len -= sz; cl->peeklen -= sz; + + memcpy(buf, cl->peekbuf, sz); + memmove(cl->peekbuf, &cl->peekbuf[sz], cl->peeklen); + } + + /* caller wants more */ + if( len > 0 ) + { +#ifdef HAVE_TLS + if( cl->tls ) + rsz = cl->server->conf->tls_recv(cl, (void *)&buf[sz], len); + else +#endif + rsz = recv(cl->socket, (void *)&buf[sz], len, 0); + + if( (sz == 0) || (rsz > 0) ) + sz += rsz; + } + + return sz; +} + +#define ensure(x) \ + do { if( x < 0 ) return -1; } while(0) + +int uh_http_sendhf(struct client *cl, int code, const char *summary, const char *fmt, ...) +{ + va_list ap; + + char buffer[UH_LIMIT_MSGHEAD]; + int len; + + len = snprintf(buffer, sizeof(buffer), + "HTTP/1.1 %03i %s\r\n" + "Connection: close\r\n" + "Content-Type: text/plain\r\n" + "Transfer-Encoding: chunked\r\n\r\n", + code, summary + ); + + ensure(uh_tcp_send(cl, buffer, len)); + + va_start(ap, fmt); + len = vsnprintf(buffer, sizeof(buffer), fmt, ap); + va_end(ap); + + ensure(uh_http_sendc(cl, buffer, len)); + ensure(uh_http_sendc(cl, NULL, 0)); + + return 0; +} + + +int uh_http_sendc(struct client *cl, const char *data, int len) +{ + char chunk[8]; + int clen; + + if( len == -1 ) + len = strlen(data); + + if( len > 0 ) + { + clen = snprintf(chunk, sizeof(chunk), "%X\r\n", len); + ensure(uh_tcp_send(cl, chunk, clen)); + ensure(uh_tcp_send(cl, data, len)); + ensure(uh_tcp_send(cl, "\r\n", 2)); + } + else + { + ensure(uh_tcp_send(cl, "0\r\n\r\n", 5)); + } + + return 0; +} + +int uh_http_sendf( + struct client *cl, struct http_request *req, const char *fmt, ... +) { + va_list ap; + char buffer[UH_LIMIT_MSGHEAD]; + int len; + + va_start(ap, fmt); + len = vsnprintf(buffer, sizeof(buffer), fmt, ap); + va_end(ap); + + if( (req != NULL) && (req->version > 1.0) ) + ensure(uh_http_sendc(cl, buffer, len)); + else if( len > 0 ) + ensure(uh_tcp_send(cl, buffer, len)); + + return 0; +} + +int uh_http_send( + struct client *cl, struct http_request *req, const char *buf, int len +) { + if( len < 0 ) + len = strlen(buf); + + if( (req != NULL) && (req->version > 1.0) ) + ensure(uh_http_sendc(cl, buf, len)); + else if( len > 0 ) + ensure(uh_tcp_send(cl, buf, len)); + + return 0; +} + + +int uh_urldecode(char *buf, int blen, const char *src, int slen) +{ + int i; + int len = 0; + +#define hex(x) \ + (((x) <= '9') ? ((x) - '0') : \ + (((x) <= 'F') ? ((x) - 'A' + 10) : \ + ((x) - 'a' + 10))) + + for( i = 0; (i <= slen) && (i <= blen); i++ ) + { + if( src[i] == '%' ) + { + if( ((i+2) <= slen) && isxdigit(src[i+1]) && isxdigit(src[i+2]) ) + { + buf[len++] = (char)(16 * hex(src[i+1]) + hex(src[i+2])); + i += 2; + } + else + { + buf[len++] = '%'; + } + } + else + { + buf[len++] = src[i]; + } + } + + return len; +} + +int uh_urlencode(char *buf, int blen, const char *src, int slen) +{ + int i; + int len = 0; + const char hex[] = "0123456789abcdef"; + + for( i = 0; (i <= slen) && (i <= blen); i++ ) + { + if( isalnum(src[i]) || (src[i] == '-') || (src[i] == '_') || + (src[i] == '.') || (src[i] == '~') ) + { + buf[len++] = src[i]; + } + else if( (len+3) <= blen ) + { + buf[len++] = '%'; + buf[len++] = hex[(src[i] >> 4) & 15]; + buf[len++] = hex[(src[i] & 15) & 15]; + } + else + { + break; + } + } + + return len; +} + +int uh_b64decode(char *buf, int blen, const unsigned char *src, int slen) +{ + int i = 0; + int len = 0; + + unsigned int cin = 0; + unsigned int cout = 0; + + + for( i = 0; (i <= slen) && (src[i] != 0); i++ ) + { + cin = src[i]; + + if( (cin >= '0') && (cin <= '9') ) + cin = cin - '0' + 52; + else if( (cin >= 'A') && (cin <= 'Z') ) + cin = cin - 'A'; + else if( (cin >= 'a') && (cin <= 'z') ) + cin = cin - 'a' + 26; + else if( cin == '+' ) + cin = 62; + else if( cin == '/' ) + cin = 63; + else if( cin == '=' ) + cin = 0; + else + continue; + + cout = (cout << 6) | cin; + + if( (i % 4) == 3 ) + { + if( (len + 3) < blen ) + { + buf[len++] = (char)(cout >> 16); + buf[len++] = (char)(cout >> 8); + buf[len++] = (char)(cout); + } + else + { + break; + } + } + } + + buf[len++] = 0; + return len; +} + + +struct path_info * uh_path_lookup(struct client *cl, const char *url) +{ + static char path_phys[PATH_MAX]; + static char path_info[PATH_MAX]; + static struct path_info p; + + char buffer[UH_LIMIT_MSGHEAD]; + char *docroot = cl->server->conf->docroot; + char *pathptr = NULL; + + int i = 0; + struct stat s; + + + memset(path_phys, 0, sizeof(path_phys)); + memset(path_info, 0, sizeof(path_info)); + memset(buffer, 0, sizeof(buffer)); + memset(&p, 0, sizeof(p)); + + /* copy docroot */ + memcpy(buffer, docroot, + min(strlen(docroot), sizeof(buffer) - 1)); + + /* separate query string from url */ + if( (pathptr = strchr(url, '?')) != NULL ) + { + p.query = pathptr[1] ? pathptr + 1 : NULL; + + /* urldecode component w/o query */ + if( pathptr > url ) + uh_urldecode( + &buffer[strlen(docroot)], + sizeof(buffer) - strlen(docroot) - 1, + url, (int)(pathptr - url) - 1 + ); + } + + /* no query string, decode all of url */ + else + { + uh_urldecode( + &buffer[strlen(docroot)], + sizeof(buffer) - strlen(docroot) - 1, + url, strlen(url) + ); + } + + /* create canon path */ + for( i = strlen(buffer); i >= 0; i-- ) + { + if( (buffer[i] == 0) || (buffer[i] == '/') ) + { + memset(path_info, 0, sizeof(path_info)); + memcpy(path_info, buffer, min(i + 1, sizeof(path_info) - 1)); + + if( realpath(path_info, path_phys) ) + { + memset(path_info, 0, sizeof(path_info)); + memcpy(path_info, &buffer[i], + min(strlen(buffer) - i, sizeof(path_info) - 1)); + + break; + } + } + } + + /* check whether found path is within docroot */ + if( strncmp(path_phys, docroot, strlen(docroot)) || + ((path_phys[strlen(docroot)] != 0) && + (path_phys[strlen(docroot)] != '/')) + ) { + return NULL; + } + + /* test current path */ + if( ! stat(path_phys, &p.stat) ) + { + /* is a regular file */ + if( p.stat.st_mode & S_IFREG ) + { + p.root = docroot; + p.phys = path_phys; + p.name = &path_phys[strlen(docroot)]; + p.info = path_info[0] ? path_info : NULL; + } + + /* is a directory */ + else if( (p.stat.st_mode & S_IFDIR) && !strlen(path_info) ) + { + /* ensure trailing slash */ + if( path_phys[strlen(path_phys)-1] != '/' ) + path_phys[strlen(path_phys)] = '/'; + + /* try to locate index file */ + memset(buffer, 0, sizeof(buffer)); + memcpy(buffer, path_phys, sizeof(buffer)); + pathptr = &buffer[strlen(buffer)]; + + for( i = 0; i < array_size(uh_index_files); i++ ) + { + strncat(buffer, uh_index_files[i], sizeof(buffer)); + + if( !stat(buffer, &s) && (s.st_mode & S_IFREG) ) + { + memcpy(path_phys, buffer, sizeof(path_phys)); + memcpy(&p.stat, &s, sizeof(p.stat)); + break; + } + + *pathptr = 0; + } + + p.root = docroot; + p.phys = path_phys; + p.name = &path_phys[strlen(docroot)]; + } + } + + return p.phys ? &p : NULL; +} + + +static char uh_realms[UH_LIMIT_AUTHREALMS * sizeof(struct auth_realm)] = { 0 }; +static int uh_realm_count = 0; + +struct auth_realm * uh_auth_add(char *path, char *user, char *pass) +{ + struct auth_realm *new = NULL; + struct passwd *pwd; + struct spwd *spwd; + + if( uh_realm_count < UH_LIMIT_AUTHREALMS ) + { + new = (struct auth_realm *) + &uh_realms[uh_realm_count * sizeof(struct auth_realm)]; + + memset(new, 0, sizeof(struct auth_realm)); + + memcpy(new->path, path, + min(strlen(path), sizeof(new->path) - 1)); + + memcpy(new->user, user, + min(strlen(user), sizeof(new->user) - 1)); + + /* given password refers to a passwd entry */ + if( (strlen(pass) > 3) && !strncmp(pass, "$p$", 3) ) + { + /* try to resolve shadow entry */ + if( ((spwd = getspnam(&pass[3])) != NULL) && spwd->sp_pwdp ) + { + memcpy(new->pass, spwd->sp_pwdp, + min(strlen(spwd->sp_pwdp), sizeof(new->pass) - 1)); + } + + /* try to resolve passwd entry */ + else if( ((pwd = getpwnam(&pass[3])) != NULL) && pwd->pw_passwd && + (pwd->pw_passwd[0] != '!') && (pwd->pw_passwd[0] != 0) + ) { + memcpy(new->pass, pwd->pw_passwd, + min(strlen(pwd->pw_passwd), sizeof(new->pass) - 1)); + } + } + + /* ordinary pwd */ + else + { + memcpy(new->pass, pass, + min(strlen(pass), sizeof(new->pass) - 1)); + } + + uh_realm_count++; + } + + return new; +} + +int uh_auth_check( + struct client *cl, struct http_request *req, struct path_info *pi +) { + int i, plen, rlen, protected; + char buffer[UH_LIMIT_MSGHEAD]; + char *user = NULL; + char *pass = NULL; + + struct auth_realm *realm = NULL; + + plen = strlen(pi->name); + protected = 0; + + /* check whether at least one realm covers the requested url */ + for( i = 0; i < uh_realm_count; i++ ) + { + realm = (struct auth_realm *) + &uh_realms[i * sizeof(struct auth_realm)]; + + rlen = strlen(realm->path); + + if( (plen >= rlen) && !strncasecmp(pi->name, realm->path, rlen) ) + { + req->realm = realm; + protected = 1; + break; + } + } + + /* requested resource is covered by a realm */ + if( protected ) + { + /* try to get client auth info */ + foreach_header(i, req->headers) + { + if( !strcasecmp(req->headers[i], "Authorization") && + (strlen(req->headers[i+1]) > 6) && + !strncasecmp(req->headers[i+1], "Basic ", 6) + ) { + memset(buffer, 0, sizeof(buffer)); + uh_b64decode(buffer, sizeof(buffer) - 1, + (unsigned char *) &req->headers[i+1][6], + strlen(req->headers[i+1]) - 6); + + if( (pass = strchr(buffer, ':')) != NULL ) + { + user = buffer; + *pass++ = 0; + } + + break; + } + } + + /* have client auth */ + if( user && pass ) + { + /* find matching realm */ + for( i = 0, realm = NULL; i < uh_realm_count; i++ ) + { + realm = (struct auth_realm *) + &uh_realms[i * sizeof(struct auth_realm)]; + + rlen = strlen(realm->path); + + if( (plen >= rlen) && + !strncasecmp(pi->name, realm->path, rlen) && + !strcmp(user, realm->user) + ) { + req->realm = realm; + break; + } + + realm = NULL; + } + + /* found a realm matching the username */ + if( realm ) + { + /* is a crypt passwd */ + if( realm->pass[0] == '$' ) + pass = crypt(pass, realm->pass); + + /* check user pass */ + if( !strcmp(pass, realm->pass) ) + return 1; + } + } + + /* 401 */ + uh_http_sendf(cl, NULL, + "HTTP/%.1f 401 Authorization Required\r\n" + "WWW-Authenticate: Basic realm=\"%s\"\r\n" + "Content-Type: text/plain\r\n" + "Content-Length: 23\r\n\r\n" + "Authorization Required\n", + req->version, cl->server->conf->realm + ); + + return 0; + } + + return 1; +} + + +static char uh_listeners[UH_LIMIT_LISTENERS * sizeof(struct listener)] = { 0 }; +static char uh_clients[UH_LIMIT_CLIENTS * sizeof(struct client)] = { 0 }; + +static int uh_listener_count = 0; +static int uh_client_count = 0; + + +struct listener * uh_listener_add(int sock, struct config *conf) +{ + struct listener *new = NULL; + socklen_t sl; + + if( uh_listener_count < UH_LIMIT_LISTENERS ) + { + new = (struct listener *) + &uh_listeners[uh_listener_count * sizeof(struct listener)]; + + new->socket = sock; + new->conf = conf; + + /* get local endpoint addr */ + sl = sizeof(struct sockaddr_in6); + memset(&(new->addr), 0, sl); + getsockname(sock, (struct sockaddr *) &(new->addr), &sl); + + uh_listener_count++; + } + + return new; +} + +struct listener * uh_listener_lookup(int sock) +{ + struct listener *cur = NULL; + int i; + + for( i = 0; i < uh_listener_count; i++ ) + { + cur = (struct listener *) &uh_listeners[i * sizeof(struct listener)]; + + if( cur->socket == sock ) + return cur; + } + + return NULL; +} + + +struct client * uh_client_add(int sock, struct listener *serv) +{ + struct client *new = NULL; + socklen_t sl; + + if( uh_client_count < UH_LIMIT_CLIENTS ) + { + new = (struct client *) + &uh_clients[uh_client_count * sizeof(struct client)]; + + new->socket = sock; + new->server = serv; + + /* get remote endpoint addr */ + sl = sizeof(struct sockaddr_in6); + memset(&(new->peeraddr), 0, sl); + getpeername(sock, (struct sockaddr *) &(new->peeraddr), &sl); + + /* get local endpoint addr */ + sl = sizeof(struct sockaddr_in6); + memset(&(new->servaddr), 0, sl); + getsockname(sock, (struct sockaddr *) &(new->servaddr), &sl); + + uh_client_count++; + } + + return new; +} + +struct client * uh_client_lookup(int sock) +{ + struct client *cur = NULL; + int i; + + for( i = 0; i < uh_client_count; i++ ) + { + cur = (struct client *) &uh_clients[i * sizeof(struct client)]; + + if( cur->socket == sock ) + return cur; + } + + return NULL; +} + +void uh_client_remove(int sock) +{ + struct client *del = uh_client_lookup(sock); + + if( del ) + { + memmove(del, del + 1, + sizeof(uh_clients) - (int)((char *)del - uh_clients) - sizeof(struct client)); + + uh_client_count--; + } +} + + diff --git a/package/uhttpd/src/uhttpd-utils.h b/package/uhttpd/src/uhttpd-utils.h new file mode 100644 index 000000000..a6448b63b --- /dev/null +++ b/package/uhttpd/src/uhttpd-utils.h @@ -0,0 +1,103 @@ +/* + * uhttpd - Tiny single-threaded httpd - Utility header + * + * Copyright (C) 2010 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _UHTTPD_UTILS_ + +#include +#include +#include +#include +#include + +#define min(x, y) (((x) < (y)) ? (x) : (y)) +#define max(x, y) (((x) > (y)) ? (x) : (y)) + +#define array_size(x) \ + (sizeof(x) / sizeof(x[0])) + +#define foreach_header(i, h) \ + for( i = 0; (i + 1) < (sizeof(h) / sizeof(h[0])) && h[i]; i += 2 ) + +#define fd_cloexec(fd) \ + fcntl(fd, F_SETFD, fcntl(fd, F_GETFD) | FD_CLOEXEC) + +struct path_info { + char *root; + char *phys; + char *name; + char *info; + char *query; + struct stat stat; +}; + + +const char * sa_straddr(void *sa); +const char * sa_strport(void *sa); +int sa_port(void *sa); + +char *strfind(char *haystack, int hslen, const char *needle, int ndlen); + +int select_intr(int n, fd_set *r, fd_set *w, fd_set *e, struct timeval *t); + +int uh_tcp_send(struct client *cl, const char *buf, int len); +int uh_tcp_peek(struct client *cl, char *buf, int len); +int uh_tcp_recv(struct client *cl, char *buf, int len); + +int uh_http_sendhf( + struct client *cl, int code, const char *summary, + const char *fmt, ... +); + +#define uh_http_response(cl, code, message) \ + uh_http_sendhf(cl, code, message, message) + +int uh_http_sendc(struct client *cl, const char *data, int len); + +int uh_http_sendf( + struct client *cl, struct http_request *req, + const char *fmt, ... +); + +int uh_http_send( + struct client *cl, struct http_request *req, + const char *buf, int len +); + + +int uh_urldecode(char *buf, int blen, const char *src, int slen); +int uh_urlencode(char *buf, int blen, const char *src, int slen); +int uh_b64decode(char *buf, int blen, const unsigned char *src, int slen); + + +struct auth_realm * uh_auth_add(char *path, char *user, char *pass); + +int uh_auth_check( + struct client *cl, struct http_request *req, struct path_info *pi +); + + +struct path_info * uh_path_lookup(struct client *cl, const char *url); + +struct listener * uh_listener_add(int sock, struct config *conf); +struct listener * uh_listener_lookup(int sock); + +struct client * uh_client_add(int sock, struct listener *serv); +struct client * uh_client_lookup(int sock); +void uh_client_remove(int sock); + +#endif diff --git a/package/uhttpd/src/uhttpd.c b/package/uhttpd/src/uhttpd.c new file mode 100644 index 000000000..c6a8b6c27 --- /dev/null +++ b/package/uhttpd/src/uhttpd.c @@ -0,0 +1,932 @@ +/* + * uhttpd - Tiny single-threaded httpd - Main component + * + * Copyright (C) 2010 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#define _XOPEN_SOURCE 500 /* crypt() */ + +#include "uhttpd.h" +#include "uhttpd-utils.h" +#include "uhttpd-file.h" + +#ifdef HAVE_CGI +#include "uhttpd-cgi.h" +#endif + +#ifdef HAVE_LUA +#include "uhttpd-lua.h" +#endif + +#ifdef HAVE_TLS +#include "uhttpd-tls.h" +#endif + + +static int run = 1; + +static void uh_sigterm(int sig) +{ + run = 0; +} + +static void uh_sigchld(int sig) +{ + while( waitpid(-1, NULL, WNOHANG) > 0 ) { } +} + +static void uh_config_parse(const char *path) +{ + FILE *c; + char line[512]; + char *user = NULL; + char *pass = NULL; + char *eol = NULL; + + if( (c = fopen(path ? path : "/etc/httpd.conf", "r")) != NULL ) + { + memset(line, 0, sizeof(line)); + + while( fgets(line, sizeof(line) - 1, c) ) + { + if( (line[0] == '/') && (strchr(line, ':') != NULL) ) + { + if( !(user = strchr(line, ':')) || (*user++ = 0) || + !(pass = strchr(user, ':')) || (*pass++ = 0) || + !(eol = strchr(pass, '\n')) || (*eol++ = 0) ) + continue; + + if( !uh_auth_add(line, user, pass) ) + { + fprintf(stderr, + "Can not manage more than %i basic auth realms, " + "will skip the rest\n", UH_LIMIT_AUTHREALMS + ); + + break; + } + } + } + + fclose(c); + } +} + +static int uh_socket_bind( + fd_set *serv_fds, int *max_fd, const char *host, const char *port, + struct addrinfo *hints, int do_tls, struct config *conf +) { + int sock = -1; + int yes = 1; + int status; + int bound = 0; + + struct listener *l = NULL; + struct addrinfo *addrs = NULL, *p = NULL; + + if( (status = getaddrinfo(host, port, hints, &addrs)) != 0 ) + { + fprintf(stderr, "getaddrinfo(): %s\n", gai_strerror(status)); + } + + /* try to bind a new socket to each found address */ + for( p = addrs; p; p = p->ai_next ) + { + /* get the socket */ + if( (sock = socket(p->ai_family, p->ai_socktype, p->ai_protocol)) == -1 ) + { + perror("socket()"); + goto error; + } + + /* "address already in use" */ + if( setsockopt(sock, SOL_SOCKET, SO_REUSEADDR, &yes, sizeof(yes)) == -1 ) + { + perror("setsockopt()"); + goto error; + } + + /* required to get parallel v4 + v6 working */ + if( p->ai_family == AF_INET6 ) + { + if( setsockopt(sock, IPPROTO_IPV6, IPV6_V6ONLY, &yes, sizeof(yes)) == -1 ) + { + perror("setsockopt()"); + goto error; + } + } + + /* bind */ + if( bind(sock, p->ai_addr, p->ai_addrlen) == -1 ) + { + perror("bind()"); + goto error; + } + + /* listen */ + if( listen(sock, UH_LIMIT_CLIENTS) == -1 ) + { + perror("listen()"); + goto error; + } + + /* add listener to global list */ + if( ! (l = uh_listener_add(sock, conf)) ) + { + fprintf(stderr, + "uh_listener_add(): Can not create more than " + "%i listen sockets\n", UH_LIMIT_LISTENERS + ); + + goto error; + } + +#ifdef HAVE_TLS + /* init TLS */ + l->tls = do_tls ? conf->tls : NULL; +#endif + + /* add socket to server fd set */ + FD_SET(sock, serv_fds); + fd_cloexec(sock); + *max_fd = max(*max_fd, sock); + + bound++; + continue; + + error: + if( sock > 0 ) + close(sock); + } + + freeaddrinfo(addrs); + + return bound; +} + +static struct http_request * uh_http_header_parse(struct client *cl, char *buffer, int buflen) +{ + char *method = &buffer[0]; + char *path = NULL; + char *version = NULL; + + char *headers = NULL; + char *hdrname = NULL; + char *hdrdata = NULL; + + int i; + int hdrcount = 0; + + static struct http_request req; + + memset(&req, 0, sizeof(req)); + + + /* terminate initial header line */ + if( (headers = strfind(buffer, buflen, "\r\n", 2)) != NULL ) + { + buffer[buflen-1] = 0; + + *headers++ = 0; + *headers++ = 0; + + /* find request path */ + if( (path = strchr(buffer, ' ')) != NULL ) + *path++ = 0; + + /* find http version */ + if( (path != NULL) && ((version = strchr(path, ' ')) != NULL) ) + *version++ = 0; + + + /* check method */ + if( strcmp(method, "GET") && strcmp(method, "HEAD") && strcmp(method, "POST") ) + { + /* invalid method */ + uh_http_response(cl, 405, "Method Not Allowed"); + return NULL; + } + else + { + switch(method[0]) + { + case 'G': + req.method = UH_HTTP_MSG_GET; + break; + + case 'H': + req.method = UH_HTTP_MSG_HEAD; + break; + + case 'P': + req.method = UH_HTTP_MSG_POST; + break; + } + } + + /* check path */ + if( !path || !strlen(path) ) + { + /* malformed request */ + uh_http_response(cl, 400, "Bad Request"); + return NULL; + } + else + { + req.url = path; + } + + /* check version */ + if( strcmp(version, "HTTP/0.9") && strcmp(version, "HTTP/1.0") && strcmp(version, "HTTP/1.1") ) + { + /* unsupported version */ + uh_http_response(cl, 400, "Bad Request"); + return NULL; + } + else + { + req.version = strtof(&version[5], NULL); + } + + + /* process header fields */ + for( i = (int)(headers - buffer); i < buflen; i++ ) + { + /* found eol and have name + value, push out header tuple */ + if( hdrname && hdrdata && (buffer[i] == '\r' || buffer[i] == '\n') ) + { + buffer[i] = 0; + + /* store */ + if( (hdrcount + 1) < array_size(req.headers) ) + { + req.headers[hdrcount++] = hdrname; + req.headers[hdrcount++] = hdrdata; + + hdrname = hdrdata = NULL; + } + + /* too large */ + else + { + uh_http_response(cl, 413, "Request Entity Too Large"); + return NULL; + } + } + + /* have name but no value and found a colon, start of value */ + else if( hdrname && !hdrdata && ((i+2) < buflen) && + (buffer[i] == ':') && (buffer[i+1] == ' ') + ) { + buffer[i] = 0; + hdrdata = &buffer[i+2]; + } + + /* have no name and found [A-Z], start of name */ + else if( !hdrname && isalpha(buffer[i]) && isupper(buffer[i]) ) + { + hdrname = &buffer[i]; + } + } + + /* valid enough */ + return &req; + } + + /* Malformed request */ + uh_http_response(cl, 400, "Bad Request"); + return NULL; +} + + +static struct http_request * uh_http_header_recv(struct client *cl) +{ + static char buffer[UH_LIMIT_MSGHEAD]; + char *bufptr = &buffer[0]; + char *idxptr = NULL; + + struct timeval timeout; + + fd_set reader; + + ssize_t blen = sizeof(buffer)-1; + ssize_t rlen = 0; + + + memset(buffer, 0, sizeof(buffer)); + + while( blen > 0 ) + { + FD_ZERO(&reader); + FD_SET(cl->socket, &reader); + + /* fail after 0.1s */ + timeout.tv_sec = 0; + timeout.tv_usec = 100000; + + /* check whether fd is readable */ + if( select(cl->socket + 1, &reader, NULL, NULL, &timeout) > 0 ) + { + /* receive data */ + rlen = uh_tcp_peek(cl, bufptr, blen); + + if( rlen > 0 ) + { + if( (idxptr = strfind(buffer, sizeof(buffer), "\r\n\r\n", 4)) ) + { + blen -= uh_tcp_recv(cl, bufptr, (int)(idxptr - bufptr) + 4); + + /* header read complete ... */ + return uh_http_header_parse(cl, buffer, sizeof(buffer) - blen - 1); + } + else + { + rlen = uh_tcp_recv(cl, bufptr, rlen); + blen -= rlen; + bufptr += rlen; + } + } + else + { + /* invalid request (unexpected eof/timeout) */ + uh_http_response(cl, 408, "Request Timeout"); + return NULL; + } + } + else + { + /* invalid request (unexpected eof/timeout) */ + uh_http_response(cl, 408, "Request Timeout"); + return NULL; + } + } + + /* request entity too large */ + uh_http_response(cl, 413, "Request Entity Too Large"); + return NULL; +} + +static int uh_path_match(const char *prefix, const char *url) +{ + if( (strstr(url, prefix) == url) && + ((prefix[strlen(prefix)-1] == '/') || + (strlen(url) == strlen(prefix)) || + (url[strlen(prefix)] == '/')) + ) { + return 1; + } + + return 0; +} + + +int main (int argc, char **argv) +{ +#ifdef HAVE_LUA + /* Lua runtime */ + lua_State *L = NULL; +#endif + + /* master file descriptor list */ + fd_set used_fds, serv_fds, read_fds; + + /* working structs */ + struct addrinfo hints; + struct http_request *req; + struct path_info *pin; + struct client *cl; + struct sigaction sa; + struct config conf; + + /* signal mask */ + sigset_t ss; + + /* maximum file descriptor number */ + int new_fd, cur_fd, max_fd = 0; + + int tls = 0; + int keys = 0; + int bound = 0; + int nofork = 0; + + /* args */ + int opt; + char bind[128]; + char *port = NULL; + + /* library handles */ + void *tls_lib; + void *lua_lib; + + /* clear the master and temp sets */ + FD_ZERO(&used_fds); + FD_ZERO(&serv_fds); + FD_ZERO(&read_fds); + + /* handle SIGPIPE, SIGINT, SIGTERM, SIGCHLD */ + sa.sa_flags = 0; + sigemptyset(&sa.sa_mask); + + sa.sa_handler = SIG_IGN; + sigaction(SIGPIPE, &sa, NULL); + + sa.sa_handler = uh_sigchld; + sigaction(SIGCHLD, &sa, NULL); + + sa.sa_handler = uh_sigterm; + sigaction(SIGINT, &sa, NULL); + sigaction(SIGTERM, &sa, NULL); + + /* defer SIGCHLD */ + sigemptyset(&ss); + sigaddset(&ss, SIGCHLD); + sigprocmask(SIG_BLOCK, &ss, NULL); + + /* prepare addrinfo hints */ + memset(&hints, 0, sizeof(hints)); + hints.ai_family = AF_UNSPEC; + hints.ai_socktype = SOCK_STREAM; + hints.ai_flags = AI_PASSIVE; + + /* parse args */ + memset(&conf, 0, sizeof(conf)); + memset(bind, 0, sizeof(bind)); + +#ifdef HAVE_TLS + /* load TLS plugin */ + if( ! (tls_lib = dlopen("uhttpd_tls.so", RTLD_LAZY | RTLD_GLOBAL)) ) + { + fprintf(stderr, + "Notice: Unable to load TLS plugin - disabling SSL support! " + "(Reason: %s)\n", dlerror() + ); + } + else + { + /* resolve functions */ + if( !(conf.tls_init = dlsym(tls_lib, "uh_tls_ctx_init")) || + !(conf.tls_cert = dlsym(tls_lib, "uh_tls_ctx_cert")) || + !(conf.tls_key = dlsym(tls_lib, "uh_tls_ctx_key")) || + !(conf.tls_free = dlsym(tls_lib, "uh_tls_ctx_free")) || + !(conf.tls_accept = dlsym(tls_lib, "uh_tls_client_accept")) || + !(conf.tls_close = dlsym(tls_lib, "uh_tls_client_close")) || + !(conf.tls_recv = dlsym(tls_lib, "uh_tls_client_recv")) || + !(conf.tls_send = dlsym(tls_lib, "uh_tls_client_send")) + ) { + fprintf(stderr, + "Error: Failed to lookup required symbols " + "in TLS plugin: %s\n", dlerror() + ); + exit(1); + } + + /* init SSL context */ + if( ! (conf.tls = conf.tls_init()) ) + { + fprintf(stderr, "Error: Failed to initalize SSL context\n"); + exit(1); + } + } +#endif + + while( (opt = getopt(argc, argv, "fC:K:p:s:h:c:l:L:d:r:m:x:t:")) > 0 ) + { + switch(opt) + { + /* [addr:]port */ + case 'p': + case 's': + if( (port = strrchr(optarg, ':')) != NULL ) + { + if( (optarg[0] == '[') && (port > optarg) && (port[-1] == ']') ) + memcpy(bind, optarg + 1, + min(sizeof(bind), (int)(port - optarg) - 2)); + else + memcpy(bind, optarg, + min(sizeof(bind), (int)(port - optarg))); + + port++; + } + else + { + port = optarg; + } + + if( opt == 's' ) + { + if( !conf.tls ) + { + fprintf(stderr, + "Notice: TLS support is disabled, " + "ignoring '-s %s'\n", optarg + ); + continue; + } + + tls = 1; + } + + /* bind sockets */ + bound += uh_socket_bind( + &serv_fds, &max_fd, bind[0] ? bind : NULL, port, + &hints, (opt == 's'), &conf + ); + + break; + +#ifdef HAVE_TLS + /* certificate */ + case 'C': + if( conf.tls ) + { + if( conf.tls_cert(conf.tls, optarg) < 1 ) + { + fprintf(stderr, + "Error: Invalid certificate file given\n"); + exit(1); + } + + keys++; + } + + break; + + /* key */ + case 'K': + if( conf.tls ) + { + if( conf.tls_key(conf.tls, optarg) < 1 ) + { + fprintf(stderr, + "Error: Invalid private key file given\n"); + exit(1); + } + + keys++; + } + + break; +#endif + + /* docroot */ + case 'h': + if( ! realpath(optarg, conf.docroot) ) + { + fprintf(stderr, "Error: Invalid directory %s: %s\n", + optarg, strerror(errno)); + exit(1); + } + break; + +#ifdef HAVE_CGI + /* cgi prefix */ + case 'x': + conf.cgi_prefix = optarg; + break; +#endif + +#ifdef HAVE_LUA + /* lua prefix */ + case 'l': + conf.lua_prefix = optarg; + break; + + /* lua handler */ + case 'L': + conf.lua_handler = optarg; + break; +#endif + +#if defined(HAVE_CGI) || defined(HAVE_LUA) + /* script timeout */ + case 't': + conf.script_timeout = atoi(optarg); + break; +#endif + + /* no fork */ + case 'f': + nofork = 1; + break; + + /* urldecode */ + case 'd': + if( (port = malloc(strlen(optarg)+1)) != NULL ) + { + memset(port, 0, strlen(optarg)+1); + uh_urldecode(port, strlen(optarg), optarg, strlen(optarg)); + printf("%s", port); + free(port); + exit(0); + } + break; + + /* basic auth realm */ + case 'r': + conf.realm = optarg; + break; + + /* md5 crypt */ + case 'm': + printf("%s\n", crypt(optarg, "$1$")); + exit(0); + break; + + /* config file */ + case 'c': + conf.file = optarg; + break; + + default: + fprintf(stderr, + "Usage: %s -p [addr:]port [-h docroot]\n" + " -f Do not fork to background\n" + " -c file Configuration file, default is '/etc/httpd.conf'\n" + " -p [addr:]port Bind to specified address and port, multiple allowed\n" +#ifdef HAVE_TLS + " -s [addr:]port Like -p but provide HTTPS on this port\n" + " -C file ASN.1 server certificate file\n" + " -K file ASN.1 server private key file\n" +#endif + " -h directory Specify the document root, default is '.'\n" +#ifdef HAVE_LUA + " -l string URL prefix for Lua handler, default is '/lua'\n" + " -L file Lua handler script, omit to disable Lua\n" +#endif +#ifdef HAVE_CGI + " -x string URL prefix for CGI handler, default is '/cgi-bin'\n" +#endif +#if defined(HAVE_CGI) || defined(HAVE_LUA) + " -t seconds CGI and Lua script timeout in seconds, default is 60\n" +#endif + " -d string URL decode given string\n" + " -r string Specify basic auth realm\n" + " -m string MD5 crypt given string\n" + "\n", argv[0] + ); + + exit(1); + } + } + +#ifdef HAVE_TLS + if( (tls == 1) && (keys < 2) ) + { + fprintf(stderr, "Error: Missing private key or certificate file\n"); + exit(1); + } +#endif + + if( bound < 1 ) + { + fprintf(stderr, "Error: No sockets bound, unable to continue\n"); + exit(1); + } + + /* default docroot */ + if( !conf.docroot[0] && !realpath(".", conf.docroot) ) + { + fprintf(stderr, "Error: Can not determine default document root: %s\n", + strerror(errno)); + exit(1); + } + + /* default realm */ + if( ! conf.realm ) + conf.realm = "Protected Area"; + + /* config file */ + uh_config_parse(conf.file); + +#if defined(HAVE_CGI) || defined(HAVE_LUA) + /* default script timeout */ + if( conf.script_timeout <= 0 ) + conf.script_timeout = 60; +#endif + +#ifdef HAVE_CGI + /* default cgi prefix */ + if( ! conf.cgi_prefix ) + conf.cgi_prefix = "/cgi-bin"; +#endif + +#ifdef HAVE_LUA + /* load Lua plugin */ + if( ! (lua_lib = dlopen("uhttpd_lua.so", RTLD_LAZY | RTLD_GLOBAL)) ) + { + fprintf(stderr, + "Notice: Unable to load Lua plugin - disabling Lua support! " + "(Reason: %s)\n", dlerror() + ); + } + else + { + /* resolve functions */ + if( !(conf.lua_init = dlsym(lua_lib, "uh_lua_init")) || + !(conf.lua_close = dlsym(lua_lib, "uh_lua_close")) || + !(conf.lua_request = dlsym(lua_lib, "uh_lua_request")) + ) { + fprintf(stderr, + "Error: Failed to lookup required symbols " + "in Lua plugin: %s\n", dlerror() + ); + exit(1); + } + + /* init Lua runtime if handler is specified */ + if( conf.lua_handler ) + { + /* default lua prefix */ + if( ! conf.lua_prefix ) + conf.lua_prefix = "/lua"; + + L = conf.lua_init(conf.lua_handler); + } + } +#endif + + /* fork (if not disabled) */ + if( ! nofork ) + { + switch( fork() ) + { + case -1: + perror("fork()"); + exit(1); + + case 0: + /* daemon setup */ + if( chdir("/") ) + perror("chdir()"); + + if( (cur_fd = open("/dev/null", O_WRONLY)) > -1 ) + dup2(cur_fd, 0); + + if( (cur_fd = open("/dev/null", O_RDONLY)) > -1 ) + dup2(cur_fd, 1); + + if( (cur_fd = open("/dev/null", O_RDONLY)) > -1 ) + dup2(cur_fd, 2); + + break; + + default: + exit(0); + } + } + + /* backup server descriptor set */ + used_fds = serv_fds; + + /* loop */ + while(run) + { + /* create a working copy of the used fd set */ + read_fds = used_fds; + + /* sleep until socket activity */ + if( select(max_fd + 1, &read_fds, NULL, NULL, NULL) == -1 ) + { + perror("select()"); + exit(1); + } + + /* run through the existing connections looking for data to be read */ + for( cur_fd = 0; cur_fd <= max_fd; cur_fd++ ) + { + /* is a socket managed by us */ + if( FD_ISSET(cur_fd, &read_fds) ) + { + /* is one of our listen sockets */ + if( FD_ISSET(cur_fd, &serv_fds) ) + { + /* handle new connections */ + if( (new_fd = accept(cur_fd, NULL, 0)) != -1 ) + { + /* add to global client list */ + if( (cl = uh_client_add(new_fd, uh_listener_lookup(cur_fd))) != NULL ) + { +#ifdef HAVE_TLS + /* setup client tls context */ + if( conf.tls ) + conf.tls_accept(cl); +#endif + + /* add client socket to global fdset */ + FD_SET(new_fd, &used_fds); + fd_cloexec(new_fd); + max_fd = max(max_fd, new_fd); + } + + /* insufficient resources */ + else + { + fprintf(stderr, + "uh_client_add(): Can not manage more than " + "%i client sockets, connection dropped\n", + UH_LIMIT_CLIENTS + ); + + close(new_fd); + } + } + } + + /* is a client socket */ + else + { + if( ! (cl = uh_client_lookup(cur_fd)) ) + { + /* this should not happen! */ + fprintf(stderr, + "uh_client_lookup(): No entry for fd %i!\n", + cur_fd); + + goto cleanup; + } + + /* parse message header */ + if( (req = uh_http_header_recv(cl)) != NULL ) + { +#ifdef HAVE_LUA + /* Lua request? */ + if( L && uh_path_match(conf.lua_prefix, req->url) ) + { + conf.lua_request(cl, req, L); + } + else +#endif + /* dispatch request */ + if( (pin = uh_path_lookup(cl, req->url)) != NULL ) + { + /* auth ok? */ + if( uh_auth_check(cl, req, pin) ) + { +#ifdef HAVE_CGI + if( uh_path_match(conf.cgi_prefix, pin->name) ) + { + uh_cgi_request(cl, req, pin); + } + else +#endif + { + uh_file_request(cl, req, pin); + } + } + } + + /* 404 */ + else + { + uh_http_sendhf(cl, 404, "Not Found", + "No such file or directory"); + } + } + + /* 400 */ + else + { + uh_http_sendhf(cl, 400, "Bad Request", + "Malformed request received"); + } + +#ifdef HAVE_TLS + /* free client tls context */ + if( conf.tls ) + conf.tls_close(cl); +#endif + + cleanup: + + /* close client socket */ + close(cur_fd); + FD_CLR(cur_fd, &used_fds); + + /* remove from global client list */ + uh_client_remove(cur_fd); + } + } + } + } + +#ifdef HAVE_LUA + /* destroy the Lua state */ + if( L != NULL ) + conf.lua_close(L); +#endif + + return 0; +} + diff --git a/package/uhttpd/src/uhttpd.h b/package/uhttpd/src/uhttpd.h new file mode 100644 index 000000000..0e9f1ee88 --- /dev/null +++ b/package/uhttpd/src/uhttpd.h @@ -0,0 +1,137 @@ +/* + * uhttpd - Tiny single-threaded httpd - Main header + * + * Copyright (C) 2010 Jo-Philipp Wich + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef _UHTTPD_ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include + + +#ifdef HAVE_LUA +#include +#endif + +#ifdef HAVE_TLS +#include +#endif + + +#define UH_LIMIT_MSGHEAD 4096 +#define UH_LIMIT_HEADERS 64 + +#define UH_LIMIT_LISTENERS 16 +#define UH_LIMIT_CLIENTS 64 +#define UH_LIMIT_AUTHREALMS 8 + +#define UH_HTTP_MSG_GET 0 +#define UH_HTTP_MSG_HEAD 1 +#define UH_HTTP_MSG_POST 2 + +struct listener; +struct client; +struct http_request; + +struct config { + char docroot[PATH_MAX]; + char *realm; + char *file; +#ifdef HAVE_CGI + char *cgi_prefix; +#endif +#ifdef HAVE_LUA + char *lua_prefix; + char *lua_handler; + lua_State * (*lua_init) (const char *handler); + void (*lua_close) (lua_State *L); + void (*lua_request) (struct client *cl, struct http_request *req, lua_State *L); +#endif +#if defined(HAVE_CGI) || defined(HAVE_LUA) + int script_timeout; +#endif +#ifdef HAVE_TLS + char *cert; + char *key; + SSL_CTX *tls; + SSL_CTX * (*tls_init) (void); + int (*tls_cert) (SSL_CTX *c, const char *file); + int (*tls_key) (SSL_CTX *c, const char *file); + void (*tls_free) (struct listener *l); + void (*tls_accept) (struct client *c); + void (*tls_close) (struct client *c); + int (*tls_recv) (struct client *c, void *buf, int len); + int (*tls_send) (struct client *c, void *buf, int len); +#endif +}; + +struct listener { + int socket; + struct sockaddr_in6 addr; + struct config *conf; +#ifdef HAVE_TLS + SSL_CTX *tls; +#endif +}; + +struct client { + int socket; + int peeklen; + char peekbuf[UH_LIMIT_MSGHEAD]; + struct listener *server; + struct sockaddr_in6 servaddr; + struct sockaddr_in6 peeraddr; +#ifdef HAVE_TLS + SSL *tls; +#endif +}; + +struct auth_realm { + char path[PATH_MAX]; + char user[32]; + char pass[128]; +}; + +struct http_request { + int method; + float version; + char *url; + char *headers[UH_LIMIT_HEADERS]; + struct auth_realm *realm; +}; + +struct http_response { + int statuscode; + char *statusmsg; + char *headers[UH_LIMIT_HEADERS]; +}; + +#endif + diff --git a/package/util-linux-ng/patches/001-cris_avr32_label.patch b/package/util-linux-ng/patches/001-cris_avr32_label.patch index b006d2ce2..5b600623c 100644 --- a/package/util-linux-ng/patches/001-cris_avr32_label.patch +++ b/package/util-linux-ng/patches/001-cris_avr32_label.patch @@ -1,5 +1,5 @@ ---- util-linux-2.12r.orig/fdisk/fdiskbsdlabel.h 2007-06-12 21:32:25.000000000 +0200 -+++ util-linux-2.12r/fdisk/fdiskbsdlabel.h 2007-06-12 21:33:20.000000000 +0200 +--- a/fdisk/fdiskbsdlabel.h ++++ b/fdisk/fdiskbsdlabel.h @@ -46,7 +46,7 @@ #define BSD_LINUX_BOOTDIR "/usr/ucb/mdec" diff --git a/package/yamonenv/patches/001-yamonenv_mtd_partition.patch b/package/yamonenv/patches/001-yamonenv_mtd_partition.patch index 59a126a2a..e1def28af 100644 --- a/package/yamonenv/patches/001-yamonenv_mtd_partition.patch +++ b/package/yamonenv/patches/001-yamonenv_mtd_partition.patch @@ -1,7 +1,5 @@ -Index: yamonenv/src/yamonenv.c -=================================================================== ---- yamonenv.orig/src/yamonenv.c 2007-06-04 13:24:02.640211136 +0200 -+++ yamonenv/src/yamonenv.c 2007-06-04 13:24:02.710200496 +0200 +--- a/src/yamonenv.c ++++ b/src/yamonenv.c @@ -12,7 +12,7 @@ #include #include diff --git a/package/zlib/patches/100-cross_compile.patch b/package/zlib/patches/100-cross_compile.patch index ff1c27f40..805a1a8e6 100644 --- a/package/zlib/patches/100-cross_compile.patch +++ b/package/zlib/patches/100-cross_compile.patch @@ -1,8 +1,6 @@ -Index: zlib-1.2.3/Makefile.in -=================================================================== ---- zlib-1.2.3.orig/Makefile.in 2005-07-18 04:25:21.000000000 +0200 -+++ zlib-1.2.3/Makefile.in 2008-07-27 14:57:32.000000000 +0200 -@@ -25,20 +25,23 @@ +--- a/Makefile.in ++++ b/Makefile.in +@@ -25,20 +25,23 @@ CFLAGS=-O # -Wstrict-prototypes -Wmissing-prototypes LDFLAGS=libz.a @@ -29,7 +27,7 @@ Index: zlib-1.2.3/Makefile.in prefix = /usr/local exec_prefix = ${prefix} libdir = ${exec_prefix}/lib -@@ -67,8 +70,8 @@ +@@ -67,8 +70,8 @@ test: all echo ' *** zlib test FAILED ***'; \ fi @@ -40,7 +38,7 @@ Index: zlib-1.2.3/Makefile.in -@ ($(RANLIB) $@ || true) >/dev/null 2>&1 match.o: match.S -@@ -77,8 +80,10 @@ +@@ -77,8 +80,10 @@ match.o: match.S mv _match.o match.o rm -f _match.s @@ -52,7 +50,7 @@ Index: zlib-1.2.3/Makefile.in rm -f $(SHAREDLIB) $(SHAREDLIBM) ln -s $@ $(SHAREDLIB) ln -s $@ $(SHAREDLIBM) -@@ -90,23 +95,22 @@ +@@ -90,23 +95,22 @@ minigzip$(EXE): minigzip.o $(LIBS) $(CC) $(CFLAGS) -o $@ minigzip.o $(LDFLAGS) install: $(LIBS) @@ -87,12 +85,10 @@ Index: zlib-1.2.3/Makefile.in + chmod 644 $(DESTDIR)$(man3dir)/zlib.3 # The ranlib in install is needed on NeXTSTEP which checks file times # ldconfig is for Linux - -Index: zlib-1.2.3/configure -=================================================================== ---- zlib-1.2.3.orig/configure 2005-07-11 22:11:57.000000000 +0200 -+++ zlib-1.2.3/configure 2008-07-27 14:57:24.000000000 +0200 -@@ -23,7 +23,7 @@ + +--- a/configure ++++ b/configure +@@ -23,7 +23,7 @@ LDFLAGS="-L. ${LIBS}" VER=`sed -n -e '/VERSION "/s/.*"\(.*\)".*/\1/p' < zlib.h` VER2=`sed -n -e '/VERSION "/s/.*"\([0-9]*\\.[0-9]*\)\\..*/\1/p' < zlib.h` VER1=`sed -n -e '/VERSION "/s/.*"\([0-9]*\)\\..*/\1/p' < zlib.h` @@ -101,7 +97,7 @@ Index: zlib-1.2.3/configure RANLIB=${RANLIB-"ranlib"} prefix=${prefix-/usr/local} exec_prefix=${exec_prefix-'${prefix}'} -@@ -73,32 +73,9 @@ +@@ -73,32 +73,9 @@ esac if test "$gcc" -eq 1 && ($cc -c $cflags $test.c) 2>/dev/null; then CC="$cc" @@ -136,7 +132,7 @@ Index: zlib-1.2.3/configure else # find system name and corresponding cc options CC=${CC-cc} -@@ -424,6 +401,29 @@ +@@ -424,6 +401,29 @@ else echo Checking for mmap support... No. fi @@ -166,7 +162,7 @@ Index: zlib-1.2.3/configure CPP=${CPP-"$CC -E"} case $CFLAGS in *ASMV*) -@@ -440,20 +440,21 @@ +@@ -440,20 +440,21 @@ rm -f $test.[co] $test $test$shared_ext # udpate Makefile sed < Makefile.in " /^CC *=/s#=.*#=$CC# @@ -204,10 +200,8 @@ Index: zlib-1.2.3/configure +/^mandir *=/s%=.*%= $mandir% +/^LDFLAGS *=/s%=.*%= $LDFLAGS% " > Makefile -Index: zlib-1.2.3/contrib/minizip/Makefile -=================================================================== ---- zlib-1.2.3.orig/contrib/minizip/Makefile 2005-07-12 20:08:40.000000000 +0200 -+++ zlib-1.2.3/contrib/minizip/Makefile 2008-07-27 14:57:24.000000000 +0200 +--- a/contrib/minizip/Makefile ++++ b/contrib/minizip/Makefile @@ -1,8 +1,8 @@ CC=cc -CFLAGS=-O -I../.. @@ -220,7 +214,7 @@ Index: zlib-1.2.3/contrib/minizip/Makefile .c.o: $(CC) -c $(CFLAGS) $*.c -@@ -10,10 +10,10 @@ +@@ -10,10 +10,10 @@ ZIP_OBJS = minizip.o zip.o ioapi.o ../ all: miniunz minizip miniunz: $(UNZ_OBJS) diff --git a/rules.mk b/rules.mk index c1ff95c0a..f913d9856 100644 --- a/rules.mk +++ b/rules.mk @@ -172,7 +172,7 @@ ifneq ($(CONFIG_CCACHE),) TARGET_CC:= ccache $(TARGET_CC) endif -TARGET_CONFIGURE_OPTS:= \ +TARGET_CONFIGURE_OPTS = \ AR=$(TARGET_CROSS)ar \ AS="$(TARGET_CC) -c $(TARGET_CFLAGS)" \ LD=$(TARGET_CROSS)ld \ diff --git a/target/linux/adm5120/patches-2.6.30/001-adm5120.patch b/target/linux/adm5120/patches-2.6.30/001-adm5120.patch deleted file mode 100644 index 55472340b..000000000 --- a/target/linux/adm5120/patches-2.6.30/001-adm5120.patch +++ /dev/null @@ -1,57 +0,0 @@ ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -19,6 +19,21 @@ choice - prompt "System type" - default SGI_IP22 - -+config ADM5120 -+ bool "Infineon/ADMtek ADM5120 SoC based machines" -+ select CEVT_R4K -+ select CSRC_R4K -+ select SYS_HAS_CPU_MIPS32_R1 -+ select SYS_HAS_EARLY_PRINTK -+ select DMA_NONCOHERENT -+ select IRQ_CPU -+ select SYS_SUPPORTS_LITTLE_ENDIAN -+ select SYS_SUPPORTS_BIG_ENDIAN -+ select SYS_SUPPORTS_32BIT_KERNEL -+ select ARCH_REQUIRE_GPIOLIB -+ select SWAP_IO_SPACE if CPU_BIG_ENDIAN -+ select MIPS_MACHINE -+ - config MACH_ALCHEMY - bool "Alchemy processor based machines" - -@@ -633,6 +648,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD - - endchoice - -+source "arch/mips/adm5120/Kconfig" - source "arch/mips/alchemy/Kconfig" - source "arch/mips/basler/excite/Kconfig" - source "arch/mips/jazz/Kconfig" ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -181,6 +181,22 @@ cflags-$(CONFIG_MACH_JAZZ) += -I$(srctre - load-$(CONFIG_MACH_JAZZ) += 0xffffffff80080000 - - # -+# Infineon/ADMtek ADM5120 -+# -+libs-$(CONFIG_ADM5120) += arch/mips/adm5120/prom/ -+core-$(CONFIG_ADM5120) += arch/mips/adm5120/common/ -+core-$(CONFIG_ADM5120_OEM_CELLVISION) += arch/mips/adm5120/cellvision/ -+core-$(CONFIG_ADM5120_OEM_COMPEX) += arch/mips/adm5120/compex/ -+core-$(CONFIG_ADM5120_OEM_EDIMAX) += arch/mips/adm5120/edimax/ -+core-$(CONFIG_ADM5120_OEM_INFINEON) += arch/mips/adm5120/infineon/ -+core-$(CONFIG_ADM5120_OEM_MIKROTIK) += arch/mips/adm5120/mikrotik/ -+core-$(CONFIG_ADM5120_OEM_MOTOROLA) += arch/mips/adm5120/motorola/ -+core-$(CONFIG_ADM5120_OEM_OSBRIDGE) += arch/mips/adm5120/osbridge/ -+core-$(CONFIG_ADM5120_OEM_ZYXEL) += arch/mips/adm5120/zyxel/ -+cflags-$(CONFIG_ADM5120) += -I$(srctree)/arch/mips/include/asm/mach-adm5120 -+load-$(CONFIG_ADM5120) += 0xffffffff80001000 -+ -+# - # Common Alchemy Au1x00 stuff - # - core-$(CONFIG_SOC_AU1X00) += arch/mips/alchemy/common/ diff --git a/target/linux/adm5120/patches-2.6.30/002-adm5120_flash.patch b/target/linux/adm5120/patches-2.6.30/002-adm5120_flash.patch deleted file mode 100644 index 97f5b96cc..000000000 --- a/target/linux/adm5120/patches-2.6.30/002-adm5120_flash.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/drivers/mtd/maps/Kconfig -+++ b/drivers/mtd/maps/Kconfig -@@ -562,4 +562,8 @@ config MTD_VMU - To build this as a module select M here, the module will be called - vmu-flash. - -+config MTD_ADM5120 -+ tristate "Map driver for ADM5120 based boards" -+ depends on ADM5120 -+ - endmenu ---- a/drivers/mtd/maps/Makefile -+++ b/drivers/mtd/maps/Makefile -@@ -42,6 +42,7 @@ obj-$(CONFIG_MTD_DBOX2) += dbox2-flash. - obj-$(CONFIG_MTD_SOLUTIONENGINE)+= solutionengine.o - obj-$(CONFIG_MTD_PCI) += pci.o - obj-$(CONFIG_MTD_ALCHEMY) += alchemy-flash.o -+obj-$(CONFIG_MTD_ADM5120) += adm5120-flash.o - obj-$(CONFIG_MTD_AUTCPU12) += autcpu12-nvram.o - obj-$(CONFIG_MTD_EDB7312) += edb7312.o - obj-$(CONFIG_MTD_IMPA7) += impa7.o diff --git a/target/linux/adm5120/patches-2.6.30/003-adm5120_switch.patch b/target/linux/adm5120/patches-2.6.30/003-adm5120_switch.patch deleted file mode 100644 index 771dd5f80..000000000 --- a/target/linux/adm5120/patches-2.6.30/003-adm5120_switch.patch +++ /dev/null @@ -1,23 +0,0 @@ ---- a/drivers/net/Kconfig -+++ b/drivers/net/Kconfig -@@ -612,6 +612,10 @@ config MIPS_AU1X00_ENET - If you have an Alchemy Semi AU1X00 based system - say Y. Otherwise, say N. - -+config ADM5120_ENET -+ tristate "ADM5120 Ethernet switch support" -+ depends on ADM5120 -+ - config SGI_IOC3_ETH - bool "SGI IOC3 Ethernet" - depends on PCI && SGI_IP27 ---- a/drivers/net/Makefile -+++ b/drivers/net/Makefile -@@ -195,6 +195,7 @@ obj-$(CONFIG_SC92031) += sc92031.o - # This is also a 82596 and should probably be merged - obj-$(CONFIG_LP486E) += lp486e.o - -+obj-$(CONFIG_ADM5120_ENET) += adm5120sw.o - obj-$(CONFIG_ETH16I) += eth16i.o - obj-$(CONFIG_ZORRO8390) += zorro8390.o 8390.o - obj-$(CONFIG_HPLANCE) += hplance.o 7990.o diff --git a/target/linux/adm5120/patches-2.6.30/005-adm5120_usb.patch b/target/linux/adm5120/patches-2.6.30/005-adm5120_usb.patch deleted file mode 100644 index ca81a92cd..000000000 --- a/target/linux/adm5120/patches-2.6.30/005-adm5120_usb.patch +++ /dev/null @@ -1,33 +0,0 @@ ---- a/drivers/usb/Makefile -+++ b/drivers/usb/Makefile -@@ -9,6 +9,7 @@ obj-$(CONFIG_USB) += core/ - obj-$(CONFIG_USB_MON) += mon/ - - obj-$(CONFIG_PCI) += host/ -+obj-$(CONFIG_USB_ADM5120_HCD) += host/ - obj-$(CONFIG_USB_EHCI_HCD) += host/ - obj-$(CONFIG_USB_ISP116X_HCD) += host/ - obj-$(CONFIG_USB_OHCI_HCD) += host/ ---- a/drivers/usb/host/Kconfig -+++ b/drivers/usb/host/Kconfig -@@ -4,6 +4,10 @@ - comment "USB Host Controller Drivers" - depends on USB - -+config USB_ADM5120_HCD -+ tristate "ADM5120 HCD support (EXPERIMENTAL)" -+ depends on USB && ADM5120 && EXPERIMENTAL -+ - config USB_C67X00_HCD - tristate "Cypress C67x00 HCD support" - depends on USB ---- a/drivers/usb/host/Makefile -+++ b/drivers/usb/host/Makefile -@@ -17,6 +17,7 @@ obj-$(CONFIG_USB_WHCI_HCD) += whci/ - - obj-$(CONFIG_PCI) += pci-quirks.o - -+obj-$(CONFIG_USB_ADM5120_HCD) += adm5120-hcd.o - obj-$(CONFIG_USB_EHCI_HCD) += ehci-hcd.o - obj-$(CONFIG_USB_OXU210HP_HCD) += oxu210hp-hcd.o - obj-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o diff --git a/target/linux/adm5120/patches-2.6.30/007-adm5120_pci.patch b/target/linux/adm5120/patches-2.6.30/007-adm5120_pci.patch deleted file mode 100644 index 7869c9782..000000000 --- a/target/linux/adm5120/patches-2.6.30/007-adm5120_pci.patch +++ /dev/null @@ -1,19 +0,0 @@ ---- a/arch/mips/pci/Makefile -+++ b/arch/mips/pci/Makefile -@@ -52,3 +52,4 @@ obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc - obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o - obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o - obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32434.o ops-rc32434.o fixup-rc32434.o -+obj-$(CONFIG_ADM5120) += pci-adm5120.o ---- a/include/linux/pci_ids.h -+++ b/include/linux/pci_ids.h -@@ -1764,6 +1764,9 @@ - #define PCI_VENDOR_ID_ESDGMBH 0x12fe - #define PCI_DEVICE_ID_ESDGMBH_CPCIASIO4 0x0111 - -+#define PCI_VENDOR_ID_ADMTEK 0x1317 -+#define PCI_DEVICE_ID_ADMTEK_ADM5120 0x5120 -+ - #define PCI_VENDOR_ID_SIIG 0x131f - #define PCI_SUBVENDOR_ID_SIIG 0x131f - #define PCI_DEVICE_ID_SIIG_1S_10x_550 0x1000 diff --git a/target/linux/adm5120/patches-2.6.30/009-adm5120_leds_switch_trigger.patch b/target/linux/adm5120/patches-2.6.30/009-adm5120_leds_switch_trigger.patch deleted file mode 100644 index 4778deac0..000000000 --- a/target/linux/adm5120/patches-2.6.30/009-adm5120_leds_switch_trigger.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/drivers/leds/Kconfig -+++ b/drivers/leds/Kconfig -@@ -306,4 +306,12 @@ config LEDS_TRIGGER_NETDEV - This allows LEDs to be controlled by network device activity. - If unsure, say Y. - -+config LEDS_TRIGGER_ADM5120_SWITCH -+ tristate "LED ADM5120 Switch Port Status Trigger" -+ depends on LEDS_TRIGGERS && ADM5120 -+ help -+ This allows LEDs to be controlled by the port states of -+ the ADM5120 built-in Ethernet Switch -+ If unsure, say N. -+ - endif # NEW_LEDS ---- a/drivers/leds/Makefile -+++ b/drivers/leds/Makefile -@@ -40,3 +40,4 @@ obj-$(CONFIG_LEDS_TRIGGER_GPIO) += ledt - obj-$(CONFIG_LEDS_TRIGGER_DEFAULT_ON) += ledtrig-default-on.o - obj-$(CONFIG_LEDS_TRIGGER_MORSE) += ledtrig-morse.o - obj-$(CONFIG_LEDS_TRIGGER_NETDEV) += ledtrig-netdev.o -+obj-$(CONFIG_LEDS_TRIGGER_ADM5120_SWITCH) += ledtrig-adm5120-switch.o diff --git a/target/linux/adm5120/patches-2.6.30/101-cfi_fixup_macronix_bootloc.patch b/target/linux/adm5120/patches-2.6.30/101-cfi_fixup_macronix_bootloc.patch deleted file mode 100644 index 60c3ab91e..000000000 --- a/target/linux/adm5120/patches-2.6.30/101-cfi_fixup_macronix_bootloc.patch +++ /dev/null @@ -1,84 +0,0 @@ ---- a/drivers/mtd/chips/cfi_cmdset_0002.c -+++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -53,6 +53,12 @@ - #define AT49BV6416 0x00d6 - #define MANUFACTURER_SAMSUNG 0x00ec - -+/* Macronix */ -+#define MX29LV160B 0x2249 /* MX29LV160 Bottom-boot chip */ -+#define MX29LV160T 0x22C4 /* MX29LV160 Top-boot chip */ -+#define MX29LV320B 0x22A8 /* MX29LV320 Bottom-boot chip */ -+#define MX29LV320T 0x22A7 /* MX29LV320 Top-boot chip */ -+ - static int cfi_amdstd_read (struct mtd_info *, loff_t, size_t, size_t *, u_char *); - static int cfi_amdstd_write_words(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); - static int cfi_amdstd_write_buffers(struct mtd_info *, loff_t, size_t, size_t *, const u_char *); -@@ -293,6 +299,41 @@ static void fixup_M29W128G_write_buffer( - } - } - -+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC -+/* -+ * Some Macronix chips has no/bad bootblock information in the CFI table -+ */ -+static void fixup_macronix_bootloc(struct mtd_info *mtd, void* param) -+{ -+ struct map_info *map = mtd->priv; -+ struct cfi_private *cfi = map->fldrv_priv; -+ struct cfi_pri_amdstd *extp = cfi->cmdset_priv; -+ __u8 t; -+ -+ switch (cfi->id) { -+ /* TODO: put affected chip ids here */ -+ case MX29LV160B: -+ case MX29LV320B: -+ t = 2; /* Bottom boot */ -+ break; -+ case MX29LV160T: -+ case MX29LV320T: -+ t = 3; /* Top boot */ -+ break; -+ default: -+ return; -+ } -+ -+ if (extp->TopBottom == t) -+ /* boot location detected by the CFI layer is correct */ -+ return; -+ -+ extp->TopBottom = t; -+ printk("%s: Macronix chip detected, id:0x%04X, boot location forced " -+ "to %s\n", map->name, cfi->id, (t == 2) ? "bottom" : "top"); -+} -+#endif /* CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC */ -+ - static struct cfi_fixup cfi_fixup_table[] = { - { CFI_MFR_ATMEL, CFI_ID_ANY, fixup_convert_atmel_pri, NULL }, - #ifdef AMD_BOOTLOC_BUG -@@ -330,6 +371,9 @@ static struct cfi_fixup fixup_table[] = - */ - { CFI_MFR_ANY, CFI_ID_ANY, fixup_use_erase_chip, NULL }, - { CFI_MFR_ATMEL, AT49BV6416, fixup_use_atmel_lock, NULL }, -+#ifdef CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC -+ { MANUFACTURER_MACRONIX, CFI_ID_ANY, fixup_macronix_bootloc, NULL, }, -+#endif - { 0, 0, NULL, NULL } - }; - ---- a/drivers/mtd/chips/Kconfig -+++ b/drivers/mtd/chips/Kconfig -@@ -198,6 +198,14 @@ config MTD_CFI_AMDSTD - provides support for one of those command sets, used on chips - including the AMD Am29LV320. - -+config MTD_CFI_FIXUP_MACRONIX_BOOTLOC -+ bool "Fix boot-block location for Macronix flash chips" -+ depends on MTD_CFI_AMDSTD -+ help -+ Some Macronix flash chips have no/wrong boot-block location in the -+ CFI table, and the driver may detect the type incorrectly. Select -+ this if your board has such chip. -+ - config MTD_CFI_STAA - tristate "Support for ST (Advanced Architecture) flash chips" - depends on MTD_GEN_PROBE diff --git a/target/linux/adm5120/patches-2.6.30/102-jedec_pmc_39lvxxx_chips.patch b/target/linux/adm5120/patches-2.6.30/102-jedec_pmc_39lvxxx_chips.patch deleted file mode 100644 index 55a201d41..000000000 --- a/target/linux/adm5120/patches-2.6.30/102-jedec_pmc_39lvxxx_chips.patch +++ /dev/null @@ -1,68 +0,0 @@ ---- a/drivers/mtd/chips/jedec_probe.c -+++ b/drivers/mtd/chips/jedec_probe.c -@@ -128,6 +128,10 @@ - #define UPD29F064115 0x221C - - /* PMC */ -+#define PM39LV512 0x001B -+#define PM39LV010 0x001C -+#define PM39LV020 0x003D -+#define PM39LV040 0x003E - #define PM49FL002 0x006D - #define PM49FL004 0x006E - #define PM49FL008 0x006A -@@ -1249,6 +1253,54 @@ static const struct amd_flash_info jedec - ERASEINFO(0x02000,2), - ERASEINFO(0x04000,1), - } -+ }, { -+ .mfr_id = MANUFACTURER_PMC, -+ .dev_id = PM39LV512, -+ .name = "PMC Pm39LV512", -+ .devtypes = CFI_DEVICETYPE_X8, -+ .uaddr = MTD_UADDR_0x0555_0x02AA, -+ .dev_size = SIZE_64KiB, -+ .cmd_set = P_ID_AMD_STD, -+ .nr_regions = 1, -+ .regions = { -+ ERASEINFO(0x01000,16), -+ } -+ }, { -+ .mfr_id = MANUFACTURER_PMC, -+ .dev_id = PM39LV010, -+ .name = "PMC Pm39LV010", -+ .devtypes = CFI_DEVICETYPE_X8, -+ .uaddr = MTD_UADDR_0x0555_0x02AA, -+ .dev_size = SIZE_128KiB, -+ .cmd_set = P_ID_AMD_STD, -+ .nr_regions = 1, -+ .regions = { -+ ERASEINFO(0x01000,32), -+ } -+ }, { -+ .mfr_id = MANUFACTURER_PMC, -+ .dev_id = PM39LV020, -+ .name = "PMC Pm39LV020", -+ .devtypes = CFI_DEVICETYPE_X8, -+ .uaddr = MTD_UADDR_0x0555_0x02AA, -+ .dev_size = SIZE_256KiB, -+ .cmd_set = P_ID_AMD_STD, -+ .nr_regions = 1, -+ .regions = { -+ ERASEINFO(0x01000,64), -+ } -+ }, { -+ .mfr_id = MANUFACTURER_PMC, -+ .dev_id = PM39LV040, -+ .name = "PMC Pm39LV040", -+ .devtypes = CFI_DEVICETYPE_X8, -+ .uaddr = MTD_UADDR_0x0555_0x02AA, -+ .dev_size = SIZE_512KiB, -+ .cmd_set = P_ID_AMD_STD, -+ .nr_regions = 1, -+ .regions = { -+ ERASEINFO(0x01000,128), -+ } - }, { - .mfr_id = MANUFACTURER_PMC, - .dev_id = PM49FL002, diff --git a/target/linux/adm5120/patches-2.6.30/103-mtd_trxsplit.patch b/target/linux/adm5120/patches-2.6.30/103-mtd_trxsplit.patch deleted file mode 100644 index 69f103550..000000000 --- a/target/linux/adm5120/patches-2.6.30/103-mtd_trxsplit.patch +++ /dev/null @@ -1,24 +0,0 @@ ---- a/drivers/mtd/Kconfig -+++ b/drivers/mtd/Kconfig -@@ -63,6 +63,11 @@ config MTD_ROOTFS_SPLIT - depends on MTD_PARTITIONS - default y - -+config MTD_TRXSPLIT -+ bool "Automatically find and split TRX partitions" -+ depends on MTD_PARTITIONS -+ default n -+ - config MTD_REDBOOT_PARTS - tristate "RedBoot partition table parsing" - depends on MTD_PARTITIONS ---- a/drivers/mtd/Makefile -+++ b/drivers/mtd/Makefile -@@ -8,6 +8,7 @@ mtd-y := mtdcore.o mtdsuper.o mtdbdi. - mtd-$(CONFIG_MTD_PARTITIONS) += mtdpart.o - - obj-$(CONFIG_MTD_CONCAT) += mtdconcat.o -+obj-$(CONFIG_MTD_TRXSPLIT) += trxsplit.o - obj-$(CONFIG_MTD_REDBOOT_PARTS) += redboot.o - obj-$(CONFIG_MTD_CMDLINE_PARTS) += cmdlinepart.o - obj-$(CONFIG_MTD_AFS_PARTS) += afs.o diff --git a/target/linux/adm5120/patches-2.6.30/120-rb153_cf_driver.patch b/target/linux/adm5120/patches-2.6.30/120-rb153_cf_driver.patch deleted file mode 100644 index 3d9bbdd51..000000000 --- a/target/linux/adm5120/patches-2.6.30/120-rb153_cf_driver.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/drivers/ata/Makefile -+++ b/drivers/ata/Makefile -@@ -73,6 +73,7 @@ obj-$(CONFIG_PATA_OCTEON_CF) += pata_oct - obj-$(CONFIG_PATA_PLATFORM) += pata_platform.o - obj-$(CONFIG_PATA_OF_PLATFORM) += pata_of_platform.o - obj-$(CONFIG_PATA_ICSIDE) += pata_icside.o -+obj-$(CONFIG_PATA_RB153_CF) += pata_rb153_cf.o - # Should be last but two libata driver - obj-$(CONFIG_PATA_ACPI) += pata_acpi.o - # Should be last but one libata driver ---- a/drivers/ata/Kconfig -+++ b/drivers/ata/Kconfig -@@ -568,6 +568,15 @@ config PATA_RADISYS - - If unsure, say N. - -+config PATA_RB153_CF -+ tristate "RouterBOARD 153 Compact Flash support" -+ depends on ADM5120_MACH_RB_153 -+ help -+ This option enables support for a Compact Flash connected on -+ the RouterBOARD 153. -+ -+ If unsure, say N. -+ - config PATA_RB532 - tristate "RouterBoard 532 PATA CompactFlash support" - depends on MIKROTIK_RB532 diff --git a/target/linux/adm5120/patches-2.6.30/200-amba_pl010_hacks.patch b/target/linux/adm5120/patches-2.6.30/200-amba_pl010_hacks.patch deleted file mode 100644 index 285764411..000000000 --- a/target/linux/adm5120/patches-2.6.30/200-amba_pl010_hacks.patch +++ /dev/null @@ -1,378 +0,0 @@ ---- a/drivers/serial/amba-pl010.c -+++ b/drivers/serial/amba-pl010.c -@@ -50,11 +50,10 @@ - - #include - --#define UART_NR 8 -- - #define SERIAL_AMBA_MAJOR 204 - #define SERIAL_AMBA_MINOR 16 --#define SERIAL_AMBA_NR UART_NR -+#define SERIAL_AMBA_NR CONFIG_SERIAL_AMBA_PL010_NUMPORTS -+#define SERIAL_AMBA_NAME CONFIG_SERIAL_AMBA_PL010_PORTNAME - - #define AMBA_ISR_PASS_LIMIT 256 - -@@ -80,9 +79,9 @@ static void pl010_stop_tx(struct uart_po - struct uart_amba_port *uap = (struct uart_amba_port *)port; - unsigned int cr; - -- cr = readb(uap->port.membase + UART010_CR); -+ cr = __raw_readl(uap->port.membase + UART010_CR); - cr &= ~UART010_CR_TIE; -- writel(cr, uap->port.membase + UART010_CR); -+ __raw_writel(cr, uap->port.membase + UART010_CR); - } - - static void pl010_start_tx(struct uart_port *port) -@@ -90,9 +89,9 @@ static void pl010_start_tx(struct uart_p - struct uart_amba_port *uap = (struct uart_amba_port *)port; - unsigned int cr; - -- cr = readb(uap->port.membase + UART010_CR); -+ cr = __raw_readl(uap->port.membase + UART010_CR); - cr |= UART010_CR_TIE; -- writel(cr, uap->port.membase + UART010_CR); -+ __raw_writel(cr, uap->port.membase + UART010_CR); - } - - static void pl010_stop_rx(struct uart_port *port) -@@ -100,9 +99,9 @@ static void pl010_stop_rx(struct uart_po - struct uart_amba_port *uap = (struct uart_amba_port *)port; - unsigned int cr; - -- cr = readb(uap->port.membase + UART010_CR); -+ cr = __raw_readl(uap->port.membase + UART010_CR); - cr &= ~(UART010_CR_RIE | UART010_CR_RTIE); -- writel(cr, uap->port.membase + UART010_CR); -+ __raw_writel(cr, uap->port.membase + UART010_CR); - } - - static void pl010_enable_ms(struct uart_port *port) -@@ -110,9 +109,9 @@ static void pl010_enable_ms(struct uart_ - struct uart_amba_port *uap = (struct uart_amba_port *)port; - unsigned int cr; - -- cr = readb(uap->port.membase + UART010_CR); -+ cr = __raw_readl(uap->port.membase + UART010_CR); - cr |= UART010_CR_MSIE; -- writel(cr, uap->port.membase + UART010_CR); -+ __raw_writel(cr, uap->port.membase + UART010_CR); - } - - static void pl010_rx_chars(struct uart_amba_port *uap) -@@ -120,9 +119,9 @@ static void pl010_rx_chars(struct uart_a - struct tty_struct *tty = uap->port.info->port.tty; - unsigned int status, ch, flag, rsr, max_count = 256; - -- status = readb(uap->port.membase + UART01x_FR); -+ status = __raw_readl(uap->port.membase + UART01x_FR); - while (UART_RX_DATA(status) && max_count--) { -- ch = readb(uap->port.membase + UART01x_DR); -+ ch = __raw_readl(uap->port.membase + UART01x_DR); - flag = TTY_NORMAL; - - uap->port.icount.rx++; -@@ -131,9 +130,9 @@ static void pl010_rx_chars(struct uart_a - * Note that the error handling code is - * out of the main execution path - */ -- rsr = readb(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX; -+ rsr = __raw_readl(uap->port.membase + UART01x_RSR) | UART_DUMMY_RSR_RX; - if (unlikely(rsr & UART01x_RSR_ANY)) { -- writel(0, uap->port.membase + UART01x_ECR); -+ __raw_writel(0, uap->port.membase + UART01x_ECR); - - if (rsr & UART01x_RSR_BE) { - rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE); -@@ -163,7 +162,7 @@ static void pl010_rx_chars(struct uart_a - uart_insert_char(&uap->port, rsr, UART01x_RSR_OE, ch, flag); - - ignore_char: -- status = readb(uap->port.membase + UART01x_FR); -+ status = __raw_readl(uap->port.membase + UART01x_FR); - } - spin_unlock(&uap->port.lock); - tty_flip_buffer_push(tty); -@@ -176,7 +175,7 @@ static void pl010_tx_chars(struct uart_a - int count; - - if (uap->port.x_char) { -- writel(uap->port.x_char, uap->port.membase + UART01x_DR); -+ __raw_writel(uap->port.x_char, uap->port.membase + UART01x_DR); - uap->port.icount.tx++; - uap->port.x_char = 0; - return; -@@ -188,7 +187,7 @@ static void pl010_tx_chars(struct uart_a - - count = uap->port.fifosize >> 1; - do { -- writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR); -+ __raw_writel(xmit->buf[xmit->tail], uap->port.membase + UART01x_DR); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - uap->port.icount.tx++; - if (uart_circ_empty(xmit)) -@@ -206,9 +205,9 @@ static void pl010_modem_status(struct ua - { - unsigned int status, delta; - -- writel(0, uap->port.membase + UART010_ICR); -+ __raw_writel(0, uap->port.membase + UART010_ICR); - -- status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; -+ status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; - - delta = status ^ uap->old_status; - uap->old_status = status; -@@ -236,7 +235,7 @@ static irqreturn_t pl010_int(int irq, vo - - spin_lock(&uap->port.lock); - -- status = readb(uap->port.membase + UART010_IIR); -+ status = __raw_readl(uap->port.membase + UART010_IIR); - if (status) { - do { - if (status & (UART010_IIR_RTIS | UART010_IIR_RIS)) -@@ -249,7 +248,7 @@ static irqreturn_t pl010_int(int irq, vo - if (pass_counter-- == 0) - break; - -- status = readb(uap->port.membase + UART010_IIR); -+ status = __raw_readl(uap->port.membase + UART010_IIR); - } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS | - UART010_IIR_TIS)); - handled = 1; -@@ -263,7 +262,7 @@ static irqreturn_t pl010_int(int irq, vo - static unsigned int pl010_tx_empty(struct uart_port *port) - { - struct uart_amba_port *uap = (struct uart_amba_port *)port; -- unsigned int status = readb(uap->port.membase + UART01x_FR); -+ unsigned int status = __raw_readl(uap->port.membase + UART01x_FR); - return status & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT; - } - -@@ -273,7 +272,7 @@ static unsigned int pl010_get_mctrl(stru - unsigned int result = 0; - unsigned int status; - -- status = readb(uap->port.membase + UART01x_FR); -+ status = __raw_readl(uap->port.membase + UART01x_FR); - if (status & UART01x_FR_DCD) - result |= TIOCM_CAR; - if (status & UART01x_FR_DSR) -@@ -299,12 +298,12 @@ static void pl010_break_ctl(struct uart_ - unsigned int lcr_h; - - spin_lock_irqsave(&uap->port.lock, flags); -- lcr_h = readb(uap->port.membase + UART010_LCRH); -+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH); - if (break_state == -1) - lcr_h |= UART01x_LCRH_BRK; - else - lcr_h &= ~UART01x_LCRH_BRK; -- writel(lcr_h, uap->port.membase + UART010_LCRH); -+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH); - spin_unlock_irqrestore(&uap->port.lock, flags); - } - -@@ -332,12 +331,12 @@ static int pl010_startup(struct uart_por - /* - * initialise the old status of the modem signals - */ -- uap->old_status = readb(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; -+ uap->old_status = __raw_readl(uap->port.membase + UART01x_FR) & UART01x_FR_MODEM_ANY; - - /* - * Finally, enable interrupts - */ -- writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE, -+ __raw_writel(UART01x_CR_UARTEN | UART010_CR_RIE | UART010_CR_RTIE, - uap->port.membase + UART010_CR); - - return 0; -@@ -360,10 +359,10 @@ static void pl010_shutdown(struct uart_p - /* - * disable all interrupts, disable the port - */ -- writel(0, uap->port.membase + UART010_CR); -+ __raw_writel(0, uap->port.membase + UART010_CR); - - /* disable break condition and fifos */ -- writel(readb(uap->port.membase + UART010_LCRH) & -+ __raw_writel(__raw_readl(uap->port.membase + UART010_LCRH) & - ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN), - uap->port.membase + UART010_LCRH); - -@@ -385,7 +384,7 @@ pl010_set_termios(struct uart_port *port - /* - * Ask the core to calculate the divisor for us. - */ -- baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16); -+ baud = uart_get_baud_rate(port, termios, old, 0, uap->port.uartclk/16); - quot = uart_get_divisor(port, baud); - - switch (termios->c_cflag & CSIZE) { -@@ -448,25 +447,25 @@ pl010_set_termios(struct uart_port *port - uap->port.ignore_status_mask |= UART_DUMMY_RSR_RX; - - /* first, disable everything */ -- old_cr = readb(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE; -+ old_cr = __raw_readl(uap->port.membase + UART010_CR) & ~UART010_CR_MSIE; - - if (UART_ENABLE_MS(port, termios->c_cflag)) - old_cr |= UART010_CR_MSIE; - -- writel(0, uap->port.membase + UART010_CR); -+ __raw_writel(0, uap->port.membase + UART010_CR); - - /* Set baud rate */ - quot -= 1; -- writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM); -- writel(quot & 0xff, uap->port.membase + UART010_LCRL); -+ __raw_writel((quot & 0xf00) >> 8, uap->port.membase + UART010_LCRM); -+ __raw_writel(quot & 0xff, uap->port.membase + UART010_LCRL); - - /* - * ----------v----------v----------v----------v----- - * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L - * ----------^----------^----------^----------^----- - */ -- writel(lcr_h, uap->port.membase + UART010_LCRH); -- writel(old_cr, uap->port.membase + UART010_CR); -+ __raw_writel(lcr_h, uap->port.membase + UART010_LCRH); -+ __raw_writel(old_cr, uap->port.membase + UART010_CR); - - spin_unlock_irqrestore(&uap->port.lock, flags); - } -@@ -538,7 +537,7 @@ static struct uart_ops amba_pl010_pops = - .verify_port = pl010_verify_port, - }; - --static struct uart_amba_port *amba_ports[UART_NR]; -+static struct uart_amba_port *amba_ports[SERIAL_AMBA_NR]; - - #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE - -@@ -548,10 +547,10 @@ static void pl010_console_putchar(struct - unsigned int status; - - do { -- status = readb(uap->port.membase + UART01x_FR); -+ status = __raw_readl(uap->port.membase + UART01x_FR); - barrier(); - } while (!UART_TX_READY(status)); -- writel(ch, uap->port.membase + UART01x_DR); -+ __raw_writel(ch, uap->port.membase + UART01x_DR); - } - - static void -@@ -565,8 +564,8 @@ pl010_console_write(struct console *co, - /* - * First save the CR then disable the interrupts - */ -- old_cr = readb(uap->port.membase + UART010_CR); -- writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR); -+ old_cr = __raw_readl(uap->port.membase + UART010_CR); -+ __raw_writel(UART01x_CR_UARTEN, uap->port.membase + UART010_CR); - - uart_console_write(&uap->port, s, count, pl010_console_putchar); - -@@ -575,10 +574,10 @@ pl010_console_write(struct console *co, - * and restore the TCR - */ - do { -- status = readb(uap->port.membase + UART01x_FR); -+ status = __raw_readl(uap->port.membase + UART01x_FR); - barrier(); - } while (status & UART01x_FR_BUSY); -- writel(old_cr, uap->port.membase + UART010_CR); -+ __raw_writel(old_cr, uap->port.membase + UART010_CR); - - clk_disable(uap->clk); - } -@@ -587,9 +586,9 @@ static void __init - pl010_console_get_options(struct uart_amba_port *uap, int *baud, - int *parity, int *bits) - { -- if (readb(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) { -+ if (__raw_readl(uap->port.membase + UART010_CR) & UART01x_CR_UARTEN) { - unsigned int lcr_h, quot; -- lcr_h = readb(uap->port.membase + UART010_LCRH); -+ lcr_h = __raw_readl(uap->port.membase + UART010_LCRH); - - *parity = 'n'; - if (lcr_h & UART01x_LCRH_PEN) { -@@ -604,8 +603,8 @@ pl010_console_get_options(struct uart_am - else - *bits = 8; - -- quot = readb(uap->port.membase + UART010_LCRL) | -- readb(uap->port.membase + UART010_LCRM) << 8; -+ quot = __raw_readl(uap->port.membase + UART010_LCRL) | -+ __raw_readl(uap->port.membase + UART010_LCRM) << 8; - *baud = uap->port.uartclk / (16 * (quot + 1)); - } - } -@@ -623,7 +622,7 @@ static int __init pl010_console_setup(st - * if so, search for the first available port that does have - * console support. - */ -- if (co->index >= UART_NR) -+ if (co->index >= SERIAL_AMBA_NR) - co->index = 0; - uap = amba_ports[co->index]; - if (!uap) -@@ -641,7 +640,7 @@ static int __init pl010_console_setup(st - - static struct uart_driver amba_reg; - static struct console amba_console = { -- .name = "ttyAM", -+ .name = SERIAL_AMBA_NAME, - .write = pl010_console_write, - .device = uart_console_device, - .setup = pl010_console_setup, -@@ -657,11 +656,11 @@ static struct console amba_console = { - - static struct uart_driver amba_reg = { - .owner = THIS_MODULE, -- .driver_name = "ttyAM", -- .dev_name = "ttyAM", -+ .driver_name = SERIAL_AMBA_NAME, -+ .dev_name = SERIAL_AMBA_NAME, - .major = SERIAL_AMBA_MAJOR, - .minor = SERIAL_AMBA_MINOR, -- .nr = UART_NR, -+ .nr = SERIAL_AMBA_NR, - .cons = AMBA_CONSOLE, - }; - ---- a/drivers/serial/Kconfig -+++ b/drivers/serial/Kconfig -@@ -284,10 +284,25 @@ config SERIAL_AMBA_PL010 - help - This selects the ARM(R) AMBA(R) PrimeCell PL010 UART. If you have - an Integrator/AP or Integrator/PP2 platform, or if you have a -- Cirrus Logic EP93xx CPU, say Y or M here. -+ Cirrus Logic EP93xx CPU or an Infineon ADM5120 SOC, say Y or M here. - - If unsure, say N. - -+config SERIAL_AMBA_PL010_NUMPORTS -+ int "Maximum number of AMBA PL010 serial ports" -+ depends on SERIAL_AMBA_PL010 -+ default "8" -+ ---help--- -+ Set this to the number of serial ports you want the AMBA PL010 driver -+ to support. -+ -+config SERIAL_AMBA_PL010_PORTNAME -+ string "Name of the AMBA PL010 serial ports" -+ depends on SERIAL_AMBA_PL010 -+ default "ttyAM" -+ ---help--- -+ ::: To be written ::: -+ - config SERIAL_AMBA_PL010_CONSOLE - bool "Support for console on AMBA serial port" - depends on SERIAL_AMBA_PL010=y diff --git a/target/linux/adm5120/patches-2.6.30/201-amba_bus_hacks.patch b/target/linux/adm5120/patches-2.6.30/201-amba_bus_hacks.patch deleted file mode 100644 index 9db3e55ad..000000000 --- a/target/linux/adm5120/patches-2.6.30/201-amba_bus_hacks.patch +++ /dev/null @@ -1,13 +0,0 @@ ---- a/drivers/amba/bus.c -+++ b/drivers/amba/bus.c -@@ -18,6 +18,10 @@ - #include - #include - -+#ifndef NO_IRQ -+#define NO_IRQ (-1) -+#endif -+ - #define to_amba_device(d) container_of(d, struct amba_device, dev) - #define to_amba_driver(d) container_of(d, struct amba_driver, drv) - diff --git a/target/linux/adm5120/patches-2.6.30/203-gpio_leds_brightness.patch b/target/linux/adm5120/patches-2.6.30/203-gpio_leds_brightness.patch deleted file mode 100644 index 8bccf395c..000000000 --- a/target/linux/adm5120/patches-2.6.30/203-gpio_leds_brightness.patch +++ /dev/null @@ -1,27 +0,0 @@ ---- a/drivers/leds/leds-gpio.c -+++ b/drivers/leds/leds-gpio.c -@@ -44,13 +44,17 @@ static void gpio_led_set(struct led_clas - container_of(led_cdev, struct gpio_led_data, cdev); - int level; - -- if (value == LED_OFF) -- level = 0; -- else -- level = 1; -- -- if (led_dat->active_low) -- level = !level; -+ switch (value) { -+ case LED_OFF: -+ level = led_dat->active_low ? 1 : 0; -+ break; -+ case LED_FULL: -+ level = led_dat->active_low ? 0 : 1; -+ break; -+ default: -+ level = value; -+ break; -+ } - - /* Setting GPIOs with I2C/etc requires a task context, and we don't - * seem to have a reliable way to know if we're already in one; so diff --git a/target/linux/adm5120/patches-2.6.30/310-adm5120_wdt.patch b/target/linux/adm5120/patches-2.6.30/310-adm5120_wdt.patch deleted file mode 100644 index bb5e613d9..000000000 --- a/target/linux/adm5120/patches-2.6.30/310-adm5120_wdt.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- a/drivers/watchdog/Kconfig -+++ b/drivers/watchdog/Kconfig -@@ -713,6 +713,18 @@ config RC32434_WDT - To compile this driver as a module, choose M here: the - module will be called rc32434_wdt. - -+config ADM5120_WDT -+ tristate "Infineon ADM5120 SoC hardware watchdog" -+ depends on WATCHDOG && ADM5120 -+ help -+ This is a driver for hardware watchdog integrated in Infineon -+ ADM5120 SoC. This watchdog simply watches your kernel to make sure -+ it doesn't freeze, and if it does, it reboots your computer after a -+ certain amount of time. -+ -+ To compile this driver as a module, choose M here: the module will be -+ called adm5120_wdt. -+ - config INDYDOG - tristate "Indy/I2 Hardware Watchdog" - depends on SGI_HAS_INDYDOG ---- a/drivers/watchdog/Makefile -+++ b/drivers/watchdog/Makefile -@@ -105,6 +105,7 @@ obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o - obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o - obj-$(CONFIG_AR7_WDT) += ar7_wdt.o - obj-$(CONFIG_TXX9_WDT) += txx9wdt.o -+obj-$(CONFIG_ADM5120_WDT) += adm5120_wdt.o - - # PARISC Architecture - diff --git a/target/linux/adm5120/router_be/config-2.6.30 b/target/linux/adm5120/router_be/config-2.6.30 deleted file mode 100644 index cde882d2e..000000000 --- a/target/linux/adm5120/router_be/config-2.6.30 +++ /dev/null @@ -1,205 +0,0 @@ -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_ADM5120=y -CONFIG_ADM5120_ENET=y -CONFIG_ADM5120_MACH_5GXI=y -CONFIG_ADM5120_MACH_P_334WT=y -CONFIG_ADM5120_MACH_P_335=y -# CONFIG_ADM5120_OEM_CELLVISION is not set -# CONFIG_ADM5120_OEM_COMPEX is not set -# CONFIG_ADM5120_OEM_EDIMAX is not set -# CONFIG_ADM5120_OEM_INFINEON is not set -# CONFIG_ADM5120_OEM_MIKROTIK is not set -# CONFIG_ADM5120_OEM_MOTOROLA is not set -CONFIG_ADM5120_OEM_OSBRIDGE=y -CONFIG_ADM5120_OEM_ZYXEL=y -CONFIG_ADM5120_SOC_BGA=y -CONFIG_ADM5120_WDT=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_POPULATES_NODE_MAP=y -CONFIG_ARCH_REQUIRE_GPIOLIB=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARM_AMBA=y -# CONFIG_BCM47XX is not set -# CONFIG_BINARY_PRINTF is not set -CONFIG_BINFMT_MISC=m -CONFIG_BITREVERSE=y -# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set -# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_CEVT_R4K=y -CONFIG_CEVT_R4K_LIB=y -CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,jffs2" -CONFIG_CPU_BIG_ENDIAN=y -# CONFIG_CPU_CAVIUM_OCTEON is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -# CONFIG_CPU_LITTLE_ENDIAN is not set -# CONFIG_CPU_LOONGSON2 is not set -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5500 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -CONFIG_CSRC_R4K=y -CONFIG_CSRC_R4K_LIB=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DEVPORT=y -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_EARLY_PRINTK=y -CONFIG_ELF_CORE=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_FS_POSIX_ACL=y -CONFIG_GENERIC_ACL=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_SYSFS=y -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_HAVE_IDE=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HID=m -CONFIG_HID_SUPPORT=y -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -CONFIG_HZ=250 -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_INPUT=m -# CONFIG_INPUT_GPIO_BUTTONS is not set -# CONFIG_INPUT_YEALINK is not set -CONFIG_IRQ_CPU=y -CONFIG_LEDS_GPIO=m -CONFIG_LEDS_TRIGGER_ADM5120_SWITCH=m -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_LEMOTE_FULONG is not set -# CONFIG_MACH_ALCHEMY is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MACH_VR41XX is not set -CONFIG_MII=m -# CONFIG_MIKROTIK_RB532 is not set -CONFIG_MIPS=y -# CONFIG_MIPS_COBALT is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -CONFIG_MIPS_MACHINE=y -# CONFIG_MIPS_MALTA is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_SIM is not set -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MTD_ADM5120=y -CONFIG_MTD_BLOCK2MTD=y -CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y -# CONFIG_MTD_CFI_INTELEXT is not set -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_TRXSPLIT=y -# CONFIG_NET_PCI is not set -# CONFIG_NO_IOPORT is not set -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set -CONFIG_PAGEFLAGS_EXTENDED=y -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_PCI=y -CONFIG_PCI_DISABLE_COMMON_QUIRKS=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PMC_MSP is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_PROBE_INITRD_HEADER is not set -CONFIG_SCHED_OMIT_FRAME_POINTER=y -# CONFIG_SCSI_DMA is not set -# CONFIG_SERIAL_8250 is not set -CONFIG_SERIAL_AMBA_PL010=y -CONFIG_SERIAL_AMBA_PL010_CONSOLE=y -CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2 -CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS" -# CONFIG_SERIAL_AMBA_PL011 is not set -CONFIG_SERIO=y -# CONFIG_SERIO_AMBAKMI is not set -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_RAW is not set -CONFIG_SERIO_SERPORT=y -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SLAB is not set -# CONFIG_SLOW_WORK is not set -CONFIG_SLUB=y -CONFIG_SOFT_WATCHDOG=m -CONFIG_SWAP_IO_SPACE=y -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TRACING_SUPPORT=y -CONFIG_TRAD_SIGNALS=y -CONFIG_USB=m -CONFIG_USB_ADM5120_HCD=m -CONFIG_USB_DEBUG=y -CONFIG_USB_EHCI_HCD=m -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_HCD=m -CONFIG_USB_SUPPORT=y -# CONFIG_USB_UHCI_HCD is not set -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/adm5120/router_le/config-2.6.30 b/target/linux/adm5120/router_le/config-2.6.30 deleted file mode 100644 index ead803f93..000000000 --- a/target/linux/adm5120/router_le/config-2.6.30 +++ /dev/null @@ -1,260 +0,0 @@ -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_ADM5120=y -CONFIG_ADM5120_ENET=y -CONFIG_ADM5120_MACH_5GXI=y -CONFIG_ADM5120_MACH_BR_6104K=y -CONFIG_ADM5120_MACH_BR_6104KP=y -CONFIG_ADM5120_MACH_BR_61X4WG=y -CONFIG_ADM5120_MACH_CAS_771=y -CONFIG_ADM5120_MACH_EASY5120P_ATA=y -CONFIG_ADM5120_MACH_EASY5120_RT=y -CONFIG_ADM5120_MACH_EASY5120_WVOIP=y -CONFIG_ADM5120_MACH_EASY83000=y -CONFIG_ADM5120_MACH_NFS_101=y -CONFIG_ADM5120_MACH_NP27G=y -CONFIG_ADM5120_MACH_NP28G=y -CONFIG_ADM5120_MACH_PMUGW=y -CONFIG_ADM5120_MACH_RB_11X=y -CONFIG_ADM5120_MACH_RB_133=y -CONFIG_ADM5120_MACH_RB_133C=y -CONFIG_ADM5120_MACH_RB_150=y -CONFIG_ADM5120_MACH_RB_153=y -CONFIG_ADM5120_MACH_RB_192=y -CONFIG_ADM5120_MACH_WP54=y -CONFIG_ADM5120_OEM_CELLVISION=y -CONFIG_ADM5120_OEM_COMPEX=y -CONFIG_ADM5120_OEM_EDIMAX=y -CONFIG_ADM5120_OEM_INFINEON=y -CONFIG_ADM5120_OEM_MIKROTIK=y -CONFIG_ADM5120_OEM_MOTOROLA=y -CONFIG_ADM5120_OEM_OSBRIDGE=y -# CONFIG_ADM5120_OEM_ZYXEL is not set -CONFIG_ADM5120_SOC_BGA=y -CONFIG_ADM5120_WDT=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_POPULATES_NODE_MAP=y -CONFIG_ARCH_REQUIRE_GPIOLIB=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARM_AMBA=y -CONFIG_ATA=m -# CONFIG_BCM47XX is not set -# CONFIG_BINARY_PRINTF is not set -CONFIG_BITREVERSE=y -# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set -# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_CEVT_R4K=y -CONFIG_CEVT_R4K_LIB=y -CONFIG_CMDLINE="console=ttyS0,115200 rootfstype=squashfs,yaffs2,jffs2" -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_CAVIUM_OCTEON is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_LITTLE_ENDIAN=y -# CONFIG_CPU_LOONGSON2 is not set -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5500 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_AES=m -CONFIG_CRYPTO_ARC4=m -CONFIG_CRYPTO_BLKCIPHER=m -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_ECB=m -CONFIG_CRYPTO_HASH=m -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_MANAGER=m -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CSRC_R4K=y -CONFIG_CSRC_R4K_LIB=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DEVPORT=y -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_EARLY_PRINTK=y -CONFIG_ELF_CORE=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_FS_POSIX_ACL=y -CONFIG_GENERIC_ACL=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_SYSFS=y -# CONFIG_HAMRADIO is not set -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_HAVE_IDE=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HID=m -CONFIG_HID_SUPPORT=y -CONFIG_HOSTAP=m -CONFIG_HOSTAP_FIRMWARE=y -# CONFIG_HOSTAP_FIRMWARE_NVRAM is not set -CONFIG_HOSTAP_PCI=m -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -CONFIG_HZ=250 -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -CONFIG_IMAGE_CMDLINE_HACK=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INOTIFY=y -CONFIG_INOTIFY_USER=y -CONFIG_INPUT=m -# CONFIG_INPUT_GPIO_BUTTONS is not set -# CONFIG_INPUT_YEALINK is not set -CONFIG_IRQ_CPU=y -CONFIG_KEXEC=y -CONFIG_LEDS_GPIO=m -CONFIG_LEDS_TRIGGER_ADM5120_SWITCH=m -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_LEMOTE_FULONG is not set -CONFIG_LIB80211=m -CONFIG_LIB80211_CRYPT_CCMP=m -CONFIG_LIB80211_CRYPT_TKIP=m -CONFIG_LIB80211_CRYPT_WEP=m -# CONFIG_MACH_ALCHEMY is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MACH_VR41XX is not set -CONFIG_MII=m -# CONFIG_MIKROTIK_RB532 is not set -CONFIG_MIPS=y -# CONFIG_MIPS_COBALT is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -CONFIG_MIPS_MACHINE=y -# CONFIG_MIPS_MALTA is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_SIM is not set -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MTD_ADM5120=y -CONFIG_MTD_CFI_FIXUP_MACRONIX_BOOTLOC=y -# CONFIG_MTD_CFI_INTELEXT is not set -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_MYLOADER_PARTS=y -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_PLATFORM=y -CONFIG_MTD_TRXSPLIT=y -CONFIG_NO_HZ=y -# CONFIG_NO_IOPORT is not set -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set -CONFIG_PAGEFLAGS_EXTENDED=y -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_PCI=y -CONFIG_PATA_RB153_CF=m -CONFIG_PCI_DISABLE_COMMON_QUIRKS=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PMC_MSP is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_PROBE_INITRD_HEADER is not set -CONFIG_SCHED_OMIT_FRAME_POINTER=y -CONFIG_SCSI=m -# CONFIG_SERIAL_8250 is not set -CONFIG_SERIAL_AMBA_PL010=y -CONFIG_SERIAL_AMBA_PL010_CONSOLE=y -CONFIG_SERIAL_AMBA_PL010_NUMPORTS=2 -CONFIG_SERIAL_AMBA_PL010_PORTNAME="ttyS" -# CONFIG_SERIAL_AMBA_PL011 is not set -CONFIG_SERIO=y -# CONFIG_SERIO_AMBAKMI is not set -# CONFIG_SERIO_I8042 is not set -# CONFIG_SERIO_LIBPS2 is not set -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_RAW is not set -CONFIG_SERIO_SERPORT=y -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SLAB is not set -# CONFIG_SLOW_WORK is not set -CONFIG_SLUB=y -CONFIG_SOFT_WATCHDOG=m -# CONFIG_SWAP is not set -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -# CONFIG_TC35815 is not set -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TRACING_SUPPORT=y -CONFIG_TRAD_SIGNALS=y -CONFIG_USB=m -CONFIG_USB_ADM5120_HCD=m -CONFIG_USB_EHCI_HCD=m -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_HCD=m -CONFIG_USB_SUPPORT=y -# CONFIG_USB_UHCI_HCD is not set -CONFIG_VLAN_8021Q=m -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_YAFFS_9BYTE_TAGS=y -# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set -CONFIG_YAFFS_AUTO_YAFFS2=y -# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set -# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set -CONFIG_YAFFS_FS=y -CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y -CONFIG_YAFFS_YAFFS1=y -CONFIG_YAFFS_YAFFS2=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/ar7/Makefile b/target/linux/ar7/Makefile index 0e6fa95d8..38efd9278 100644 --- a/target/linux/ar7/Makefile +++ b/target/linux/ar7/Makefile @@ -11,7 +11,7 @@ BOARD:=ar7 BOARDNAME:=TI AR7 FEATURES:=squashfs jffs2 atm -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/ar7/config-2.6.30 b/target/linux/ar7/config-2.6.30 deleted file mode 100644 index 4f1eee44f..000000000 --- a/target/linux/ar7/config-2.6.30 +++ /dev/null @@ -1,140 +0,0 @@ - -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_AR7_GPIO=y -CONFIG_AR7_WDT=y -CONFIG_AR7=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_POPULATES_NODE_MAP=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# CONFIG_BCM47XX is not set -# CONFIG_BINARY_PRINTF is not set -CONFIG_BITREVERSE=y -CONFIG_BOOT_ELF32=y -# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set -# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set -CONFIG_CEVT_R4K_LIB=y -CONFIG_CEVT_R4K=y -CONFIG_CMDLINE="rootfstype=squashfs,jffs2" -CONFIG_CPMAC=y -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_CAVIUM_OCTEON is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_LITTLE_ENDIAN=y -# CONFIG_CPU_LOONGSON2 is not set -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5500 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -CONFIG_CSRC_R4K_LIB=y -CONFIG_CSRC_R4K=y -CONFIG_DECOMPRESS_LZMA=y -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_EARLY_PRINTK=y -CONFIG_FIXED_PHY=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_HAVE_IDE=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HW_RANDOM=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQ_CPU=y -CONFIG_KALLSYMS=y -CONFIG_LEDS_GPIO=y -# CONFIG_LEMOTE_FULONG is not set -# CONFIG_MACH_ALCHEMY is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_MIKROTIK_RB532 is not set -# CONFIG_MIPS_COBALT is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_MACHINE is not set -# CONFIG_MIPS_MALTA is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_SIM is not set -CONFIG_MIPS=y -CONFIG_MTD_AR7_PARTS=y -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_PHYSMAP=y -CONFIG_NO_EXCEPT_FILL=y -# CONFIG_NO_IOPORT is not set -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PHYLIB=y -# CONFIG_PMC_MSP is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_PROBE_INITRD_HEADER is not set -CONFIG_SCHED_OMIT_FRAME_POINTER=y -# CONFIG_SCSI_DMA is not set -# CONFIG_SERIAL_8250_EXTENDED is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SLOW_WORK is not set -CONFIG_SWAP_IO_SPACE=y -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -CONFIG_TRACING_SUPPORT=y -CONFIG_TRAD_SIGNALS=y -CONFIG_VLYNQ=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/ar7/files-2.6.30/arch/mips/ar7/Makefile b/target/linux/ar7/files-2.6.30/arch/mips/ar7/Makefile deleted file mode 100644 index 7435e44b3..000000000 --- a/target/linux/ar7/files-2.6.30/arch/mips/ar7/Makefile +++ /dev/null @@ -1,10 +0,0 @@ - -obj-y := \ - prom.o \ - setup.o \ - memory.o \ - irq.o \ - time.o \ - platform.o \ - gpio.o \ - clock.o diff --git a/target/linux/ar7/files-2.6.30/arch/mips/ar7/clock.c b/target/linux/ar7/files-2.6.30/arch/mips/ar7/clock.c deleted file mode 100644 index 25e6b7326..000000000 --- a/target/linux/ar7/files-2.6.30/arch/mips/ar7/clock.c +++ /dev/null @@ -1,483 +0,0 @@ -/* - * Copyright (C) 2007 Felix Fietkau - * Copyright (C) 2007 Eugene Konev - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include -#include - -#define BOOT_PLL_SOURCE_MASK 0x3 -#define CPU_PLL_SOURCE_SHIFT 16 -#define BUS_PLL_SOURCE_SHIFT 14 -#define USB_PLL_SOURCE_SHIFT 18 -#define DSP_PLL_SOURCE_SHIFT 22 -#define BOOT_PLL_SOURCE_AFE 0 -#define BOOT_PLL_SOURCE_BUS 0 -#define BOOT_PLL_SOURCE_REF 1 -#define BOOT_PLL_SOURCE_XTAL 2 -#define BOOT_PLL_SOURCE_CPU 3 -#define BOOT_PLL_BYPASS 0x00000020 -#define BOOT_PLL_ASYNC_MODE 0x02000000 -#define BOOT_PLL_2TO1_MODE 0x00008000 - -#define TNETD7200_CLOCK_ID_CPU 0 -#define TNETD7200_CLOCK_ID_DSP 1 -#define TNETD7200_CLOCK_ID_USB 2 - -#define TNETD7200_DEF_CPU_CLK 211000000 -#define TNETD7200_DEF_DSP_CLK 125000000 -#define TNETD7200_DEF_USB_CLK 48000000 - -struct tnetd7300_clock { - u32 ctrl; -#define PREDIV_MASK 0x001f0000 -#define PREDIV_SHIFT 16 -#define POSTDIV_MASK 0x0000001f - u32 unused1[3]; - u32 pll; -#define MUL_MASK 0x0000f000 -#define MUL_SHIFT 12 -#define PLL_MODE_MASK 0x00000001 -#define PLL_NDIV 0x00000800 -#define PLL_DIV 0x00000002 -#define PLL_STATUS 0x00000001 - u32 unused2[3]; -}; - -struct tnetd7300_clocks { - struct tnetd7300_clock bus; - struct tnetd7300_clock cpu; - struct tnetd7300_clock usb; - struct tnetd7300_clock dsp; -}; - -struct tnetd7200_clock { - u32 ctrl; - u32 unused1[3]; -#define DIVISOR_ENABLE_MASK 0x00008000 - u32 mul; - u32 prediv; - u32 postdiv; - u32 postdiv2; - u32 unused2[6]; - u32 cmd; - u32 status; - u32 cmden; - u32 padding[15]; -}; - -struct tnetd7200_clocks { - struct tnetd7200_clock cpu; - struct tnetd7200_clock dsp; - struct tnetd7200_clock usb; -}; - -int ar7_cpu_clock = 150000000; -EXPORT_SYMBOL(ar7_cpu_clock); -int ar7_bus_clock = 125000000; -EXPORT_SYMBOL(ar7_bus_clock); -int ar7_dsp_clock; -EXPORT_SYMBOL(ar7_dsp_clock); - -static int gcd(int a, int b) -{ - int c; - - if (a < b) { - c = a; - a = b; - b = c; - } - while ((c = (a % b))) { - a = b; - b = c; - } - return b; -} - -static void approximate(int base, int target, int *prediv, - int *postdiv, int *mul) -{ - int i, j, k, freq, res = target; - for (i = 1; i <= 16; i++) - for (j = 1; j <= 32; j++) - for (k = 1; k <= 32; k++) { - freq = abs(base / j * i / k - target); - if (freq < res) { - res = freq; - *mul = i; - *prediv = j; - *postdiv = k; - } - } -} - -static void calculate(int base, int target, int *prediv, int *postdiv, - int *mul) -{ - int tmp_gcd, tmp_base, tmp_freq; - - for (*prediv = 1; *prediv <= 32; (*prediv)++) { - tmp_base = base / *prediv; - tmp_gcd = gcd(target, tmp_base); - *mul = target / tmp_gcd; - *postdiv = tmp_base / tmp_gcd; - if ((*mul < 1) || (*mul >= 16)) - continue; - if ((*postdiv > 0) & (*postdiv <= 32)) - break; - } - - if (base / (*prediv) * (*mul) / (*postdiv) != target) { - approximate(base, target, prediv, postdiv, mul); - tmp_freq = base / (*prediv) * (*mul) / (*postdiv); - printk(KERN_WARNING - "Adjusted requested frequency %d to %d\n", - target, tmp_freq); - } - - printk(KERN_DEBUG "Clocks: prediv: %d, postdiv: %d, mul: %d\n", - *prediv, *postdiv, *mul); -} - -static int tnetd7300_dsp_clock(void) -{ - u32 didr1, didr2; - u8 rev = ar7_chip_rev(); - didr1 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x18)); - didr2 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x1c)); - if (didr2 & (1 << 23)) - return 0; - if ((rev >= 0x23) && (rev != 0x57)) - return 250000000; - if ((((didr2 & 0x1fff) << 10) | ((didr1 & 0xffc00000) >> 22)) - > 4208000) - return 250000000; - return 0; -} - -static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock, - u32 *bootcr, u32 bus_clock) -{ - int product; - int base_clock = AR7_REF_CLOCK; - u32 ctrl = readl(&clock->ctrl); - u32 pll = readl(&clock->pll); - int prediv = ((ctrl & PREDIV_MASK) >> PREDIV_SHIFT) + 1; - int postdiv = (ctrl & POSTDIV_MASK) + 1; - int divisor = prediv * postdiv; - int mul = ((pll & MUL_MASK) >> MUL_SHIFT) + 1; - - switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { - case BOOT_PLL_SOURCE_BUS: - base_clock = bus_clock; - break; - case BOOT_PLL_SOURCE_REF: - base_clock = AR7_REF_CLOCK; - break; - case BOOT_PLL_SOURCE_XTAL: - base_clock = AR7_XTAL_CLOCK; - break; - case BOOT_PLL_SOURCE_CPU: - base_clock = ar7_cpu_clock; - break; - } - - if (*bootcr & BOOT_PLL_BYPASS) - return base_clock / divisor; - - if ((pll & PLL_MODE_MASK) == 0) - return (base_clock >> (mul / 16 + 1)) / divisor; - - if ((pll & (PLL_NDIV | PLL_DIV)) == (PLL_NDIV | PLL_DIV)) { - product = (mul & 1) ? - (base_clock * mul) >> 1 : - (base_clock * (mul - 1)) >> 2; - return product / divisor; - } - - if (mul == 16) - return base_clock / divisor; - - return base_clock * mul / divisor; -} - -static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock, - u32 *bootcr, u32 frequency) -{ - int prediv, postdiv, mul; - int base_clock = ar7_bus_clock; - - switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { - case BOOT_PLL_SOURCE_BUS: - base_clock = ar7_bus_clock; - break; - case BOOT_PLL_SOURCE_REF: - base_clock = AR7_REF_CLOCK; - break; - case BOOT_PLL_SOURCE_XTAL: - base_clock = AR7_XTAL_CLOCK; - break; - case BOOT_PLL_SOURCE_CPU: - base_clock = ar7_cpu_clock; - break; - } - - calculate(base_clock, frequency, &prediv, &postdiv, &mul); - - writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl); - mdelay(1); - writel(4, &clock->pll); - while (readl(&clock->pll) & PLL_STATUS); - writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll); - mdelay(75); -} - -static void __init tnetd7300_init_clocks(void) -{ - u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); - struct tnetd7300_clocks *clocks = - (struct tnetd7300_clocks *) - ioremap_nocache(AR7_REGS_POWER + 0x20, - sizeof(struct tnetd7300_clocks)); - - ar7_bus_clock = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, - &clocks->bus, bootcr, AR7_AFE_CLOCK); - - if (*bootcr & BOOT_PLL_ASYNC_MODE) - ar7_cpu_clock = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT, - &clocks->cpu, bootcr, AR7_AFE_CLOCK); - else - ar7_cpu_clock = ar7_bus_clock; -/* - tnetd7300_set_clock(USB_PLL_SOURCE_SHIFT, &clocks->usb, - bootcr, 48000000); -*/ - if (ar7_dsp_clock == 250000000) - tnetd7300_set_clock(DSP_PLL_SOURCE_SHIFT, &clocks->dsp, - bootcr, ar7_dsp_clock); - - iounmap(clocks); - iounmap(bootcr); -} - -static int tnetd7200_get_clock(int base, struct tnetd7200_clock *clock, - u32 *bootcr, u32 bus_clock) -{ - int divisor = ((readl(&clock->prediv) & 0x1f) + 1) * - ((readl(&clock->postdiv) & 0x1f) + 1); - - if (*bootcr & BOOT_PLL_BYPASS) - return base / divisor; - - return base * ((readl(&clock->mul) & 0xf) + 1) / divisor; -} - - -static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock, - int prediv, int postdiv, int postdiv2, int mul, u32 frequency) -{ - printk(KERN_INFO - "Clocks: base = %d, frequency = %u, prediv = %d, " - "postdiv = %d, postdiv2 = %d, mul = %d\n", - base, frequency, prediv, postdiv, postdiv2, mul); - - writel(0, &clock->ctrl); - writel(DIVISOR_ENABLE_MASK | ((prediv - 1) & 0x1F), &clock->prediv); - writel((mul - 1) & 0xF, &clock->mul); - - for (mul = 0; mul < 2000; mul++) /* nop */; - - while (readl(&clock->status) & 0x1) /* nop */; - - writel(DIVISOR_ENABLE_MASK | ((postdiv - 1) & 0x1F), &clock->postdiv); - - writel(readl(&clock->cmden) | 1, &clock->cmden); - writel(readl(&clock->cmd) | 1, &clock->cmd); - - while (readl(&clock->status) & 0x1) /* nop */; - - writel(DIVISOR_ENABLE_MASK | ((postdiv2 - 1) & 0x1F), &clock->postdiv2); - - writel(readl(&clock->cmden) | 1, &clock->cmden); - writel(readl(&clock->cmd) | 1, &clock->cmd); - - while (readl(&clock->status) & 0x1) /* nop */; - - writel(readl(&clock->ctrl) | 1, &clock->ctrl); -} - -static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr) -{ - if (*bootcr & BOOT_PLL_ASYNC_MODE) - /* Async */ - switch (clock_id) { - case TNETD7200_CLOCK_ID_DSP: - return AR7_REF_CLOCK; - default: - return AR7_AFE_CLOCK; - } - else - /* Sync */ - if (*bootcr & BOOT_PLL_2TO1_MODE) - /* 2:1 */ - switch (clock_id) { - case TNETD7200_CLOCK_ID_DSP: - return AR7_REF_CLOCK; - default: - return AR7_AFE_CLOCK; - } - else - /* 1:1 */ - return AR7_REF_CLOCK; -} - - -static void __init tnetd7200_init_clocks(void) -{ - u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); - struct tnetd7200_clocks *clocks = - (struct tnetd7200_clocks *) - ioremap_nocache(AR7_REGS_POWER + 0x80, - sizeof(struct tnetd7200_clocks)); - int cpu_base, cpu_mul, cpu_prediv, cpu_postdiv; - int dsp_base, dsp_mul, dsp_prediv, dsp_postdiv; - int usb_base, usb_mul, usb_prediv, usb_postdiv; - -/* - Log from Fritz!Box 7170 Annex B: - - CPU revision is: 00018448 - Clocks: Async mode - Clocks: Setting DSP clock - Clocks: prediv: 1, postdiv: 1, mul: 5 - Clocks: base = 25000000, frequency = 125000000, prediv = 1, - postdiv = 2, postdiv2 = 1, mul = 10 - Clocks: Setting CPU clock - Adjusted requested frequency 211000000 to 211968000 - Clocks: prediv: 1, postdiv: 1, mul: 6 - Clocks: base = 35328000, frequency = 211968000, prediv = 1, - postdiv = 1, postdiv2 = -1, mul = 6 - Clocks: Setting USB clock - Adjusted requested frequency 48000000 to 48076920 - Clocks: prediv: 13, postdiv: 1, mul: 5 - Clocks: base = 125000000, frequency = 48000000, prediv = 13, - postdiv = 1, postdiv2 = -1, mul = 5 - - DSL didn't work if you didn't set the postdiv 2:1 postdiv2 combination, - driver hung on startup. - Haven't tested this on a synchronous board, - neither do i know what to do with ar7_dsp_clock -*/ - - cpu_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_CPU, bootcr); - dsp_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_DSP, bootcr); - - if (*bootcr & BOOT_PLL_ASYNC_MODE) { - printk(KERN_INFO "Clocks: Async mode\n"); - - printk(KERN_INFO "Clocks: Setting DSP clock\n"); - calculate(dsp_base, TNETD7200_DEF_DSP_CLK, - &dsp_prediv, &dsp_postdiv, &dsp_mul); - ar7_bus_clock = - ((dsp_base / dsp_prediv) * dsp_mul) / dsp_postdiv; - tnetd7200_set_clock(dsp_base, &clocks->dsp, - dsp_prediv, dsp_postdiv * 2, dsp_postdiv, dsp_mul * 2, - ar7_bus_clock); - - printk(KERN_INFO "Clocks: Setting CPU clock\n"); - calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, - &cpu_postdiv, &cpu_mul); - ar7_cpu_clock = - ((cpu_base / cpu_prediv) * cpu_mul) / cpu_postdiv; - tnetd7200_set_clock(cpu_base, &clocks->cpu, - cpu_prediv, cpu_postdiv, -1, cpu_mul, - ar7_cpu_clock); - - } else - if (*bootcr & BOOT_PLL_2TO1_MODE) { - printk(KERN_INFO "Clocks: Sync 2:1 mode\n"); - - printk(KERN_INFO "Clocks: Setting CPU clock\n"); - calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, - &cpu_postdiv, &cpu_mul); - ar7_cpu_clock = ((cpu_base / cpu_prediv) * cpu_mul) - / cpu_postdiv; - tnetd7200_set_clock(cpu_base, &clocks->cpu, - cpu_prediv, cpu_postdiv, -1, cpu_mul, - ar7_cpu_clock); - - printk(KERN_INFO "Clocks: Setting DSP clock\n"); - calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, - &dsp_postdiv, &dsp_mul); - ar7_bus_clock = ar7_cpu_clock / 2; - tnetd7200_set_clock(dsp_base, &clocks->dsp, - dsp_prediv, dsp_postdiv * 2, dsp_postdiv, - dsp_mul * 2, ar7_bus_clock); - } else { - printk(KERN_INFO "Clocks: Sync 1:1 mode\n"); - - printk(KERN_INFO "Clocks: Setting DSP clock\n"); - calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, - &dsp_postdiv, &dsp_mul); - ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul) - / dsp_postdiv; - tnetd7200_set_clock(dsp_base, &clocks->dsp, - dsp_prediv, dsp_postdiv * 2, dsp_postdiv, - dsp_mul * 2, ar7_bus_clock); - - ar7_cpu_clock = ar7_bus_clock; - } - - printk(KERN_INFO "Clocks: Setting USB clock\n"); - usb_base = ar7_bus_clock; - calculate(usb_base, TNETD7200_DEF_USB_CLK, &usb_prediv, - &usb_postdiv, &usb_mul); - tnetd7200_set_clock(usb_base, &clocks->usb, - usb_prediv, usb_postdiv, -1, usb_mul, - TNETD7200_DEF_USB_CLK); - - #warning FIXME - ar7_dsp_clock = ar7_cpu_clock; - - iounmap(clocks); - iounmap(bootcr); -} - -void __init ar7_init_clocks(void) -{ - switch (ar7_chip_id()) { - case AR7_CHIP_7100: -#warning FIXME: Check if the new 7200 clock init works for 7100 - tnetd7200_init_clocks(); - break; - case AR7_CHIP_7200: - tnetd7200_init_clocks(); - break; - case AR7_CHIP_7300: - ar7_dsp_clock = tnetd7300_dsp_clock(); - tnetd7300_init_clocks(); - break; - default: - break; - } -} diff --git a/target/linux/ar7/files-2.6.30/arch/mips/ar7/gpio.c b/target/linux/ar7/files-2.6.30/arch/mips/ar7/gpio.c deleted file mode 100644 index 56860f46d..000000000 --- a/target/linux/ar7/files-2.6.30/arch/mips/ar7/gpio.c +++ /dev/null @@ -1,49 +0,0 @@ -/* - * Copyright (C) 2007 Felix Fietkau - * Copyright (C) 2007 Eugene Konev - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include - -#include - -static const char *ar7_gpio_list[TITAN_GPIO_MAX]; - -int gpio_request(unsigned gpio, const char *label) -{ - if (gpio >= (ar7_is_titan() ? TITAN_GPIO_MAX : AR7_GPIO_MAX)) - return -EINVAL; - - if (ar7_gpio_list[gpio]) - return -EBUSY; - - if (label) { - ar7_gpio_list[gpio] = label; - } else { - ar7_gpio_list[gpio] = "busy"; - } - - return 0; -} -EXPORT_SYMBOL(gpio_request); - -void gpio_free(unsigned gpio) -{ - BUG_ON(!ar7_gpio_list[gpio]); - ar7_gpio_list[gpio] = NULL; -} -EXPORT_SYMBOL(gpio_free); diff --git a/target/linux/ar7/files-2.6.30/arch/mips/ar7/irq.c b/target/linux/ar7/files-2.6.30/arch/mips/ar7/irq.c deleted file mode 100644 index 6bb183641..000000000 --- a/target/linux/ar7/files-2.6.30/arch/mips/ar7/irq.c +++ /dev/null @@ -1,183 +0,0 @@ -/* - * Copyright (C) 2006,2007 Felix Fietkau - * Copyright (C) 2006,2007 Eugene Konev - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include - -#include -#include -#include - -#define EXCEPT_OFFSET 0x80 -#define PACE_OFFSET 0xA0 -#define CHNLS_OFFSET 0x200 - -#define REG_OFFSET(irq, reg) ((irq) / 32 * 0x4 + reg * 0x10) -#define SEC_REG_OFFSET(reg) (EXCEPT_OFFSET + reg * 0x8) -#define SEC_SR_OFFSET (SEC_REG_OFFSET(0)) /* 0x80 */ -#define CR_OFFSET(irq) (REG_OFFSET(irq, 1)) /* 0x10 */ -#define SEC_CR_OFFSET (SEC_REG_OFFSET(1)) /* 0x88 */ -#define ESR_OFFSET(irq) (REG_OFFSET(irq, 2)) /* 0x20 */ -#define SEC_ESR_OFFSET (SEC_REG_OFFSET(2)) /* 0x90 */ -#define ECR_OFFSET(irq) (REG_OFFSET(irq, 3)) /* 0x30 */ -#define SEC_ECR_OFFSET (SEC_REG_OFFSET(3)) /* 0x98 */ -#define PIR_OFFSET (0x40) -#define MSR_OFFSET (0x44) -#define PM_OFFSET(irq) (REG_OFFSET(irq, 5)) /* 0x50 */ -#define TM_OFFSET(irq) (REG_OFFSET(irq, 6)) /* 0x60 */ - -#define REG(addr) ((u32 *)(KSEG1ADDR(AR7_REGS_IRQ) + addr)) - -#define CHNL_OFFSET(chnl) (CHNLS_OFFSET + (chnl * 4)) - -static void ar7_unmask_irq(unsigned int irq_nr); -static void ar7_mask_irq(unsigned int irq_nr); -static void ar7_ack_irq(unsigned int irq_nr); -static void ar7_unmask_sec_irq(unsigned int irq_nr); -static void ar7_mask_sec_irq(unsigned int irq_nr); -static void ar7_ack_sec_irq(unsigned int irq_nr); -static void ar7_cascade(void); -static void ar7_irq_init(int base); -static int ar7_irq_base; - -static struct irq_chip ar7_irq_type = { - .name = "AR7", - .unmask = ar7_unmask_irq, - .mask = ar7_mask_irq, - .ack = ar7_ack_irq -}; - -static struct irq_chip ar7_sec_irq_type = { - .name = "AR7", - .unmask = ar7_unmask_sec_irq, - .mask = ar7_mask_sec_irq, - .ack = ar7_ack_sec_irq, -}; - -static struct irqaction ar7_cascade_action = { - .handler = no_action, - .name = "AR7 cascade interrupt" -}; - -static void ar7_unmask_irq(unsigned int irq) -{ - writel(1 << ((irq - ar7_irq_base) % 32), - REG(ESR_OFFSET(irq - ar7_irq_base))); -} - -static void ar7_mask_irq(unsigned int irq) -{ - writel(1 << ((irq - ar7_irq_base) % 32), - REG(ECR_OFFSET(irq - ar7_irq_base))); -} - -static void ar7_ack_irq(unsigned int irq) -{ - writel(1 << ((irq - ar7_irq_base) % 32), - REG(CR_OFFSET(irq - ar7_irq_base))); -} - -static void ar7_unmask_sec_irq(unsigned int irq) -{ - writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ESR_OFFSET)); -} - -static void ar7_mask_sec_irq(unsigned int irq) -{ - writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ECR_OFFSET)); -} - -static void ar7_ack_sec_irq(unsigned int irq) -{ - writel(1 << (irq - ar7_irq_base - 40), REG(SEC_CR_OFFSET)); -} - -void __init arch_init_irq(void) { - mips_cpu_irq_init(); - ar7_irq_init(8); -} - -static void __init ar7_irq_init(int base) -{ - int i; - /* - * Disable interrupts and clear pending - */ - writel(0xffffffff, REG(ECR_OFFSET(0))); - writel(0xff, REG(ECR_OFFSET(32))); - writel(0xffffffff, REG(SEC_ECR_OFFSET)); - writel(0xffffffff, REG(CR_OFFSET(0))); - writel(0xff, REG(CR_OFFSET(32))); - writel(0xffffffff, REG(SEC_CR_OFFSET)); - - ar7_irq_base = base; - - for (i = 0; i < 40; i++) { - writel(i, REG(CHNL_OFFSET(i))); - /* Primary IRQ's */ - set_irq_chip_and_handler(base + i, &ar7_irq_type, - handle_level_irq); - /* Secondary IRQ's */ - if (i < 32) - set_irq_chip_and_handler(base + i + 40, - &ar7_sec_irq_type, - handle_level_irq); - } - - setup_irq(2, &ar7_cascade_action); - setup_irq(ar7_irq_base, &ar7_cascade_action); - set_c0_status(IE_IRQ0); -} - -static void ar7_cascade(void) -{ - u32 status; - int i, irq; - - /* Primary IRQ's */ - irq = readl(REG(PIR_OFFSET)) & 0x3f; - if (irq) { - do_IRQ(ar7_irq_base + irq); - return; - } - - /* Secondary IRQ's are cascaded through primary '0' */ - writel(1, REG(CR_OFFSET(irq))); - status = readl(REG(SEC_SR_OFFSET)); - for (i = 0; i < 32; i++) { - if (status & 1) { - do_IRQ(ar7_irq_base + i + 40); - return; - } - status >>= 1; - } - - spurious_interrupt(); -} - -asmlinkage void plat_irq_dispatch(void) -{ - unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; - if (pending & STATUSF_IP7) /* cpu timer */ - do_IRQ(7); - else if (pending & STATUSF_IP2) /* int0 hardware line */ - ar7_cascade(); - else - spurious_interrupt(); -} diff --git a/target/linux/ar7/files-2.6.30/arch/mips/ar7/memory.c b/target/linux/ar7/files-2.6.30/arch/mips/ar7/memory.c deleted file mode 100644 index e8522a174..000000000 --- a/target/linux/ar7/files-2.6.30/arch/mips/ar7/memory.c +++ /dev/null @@ -1,74 +0,0 @@ -/* - * Based on arch/mips/mm/init.c - * Copyright (C) 1994 - 2000 Ralf Baechle - * Copyright (C) 1999, 2000 Silicon Graphics, Inc. - * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com - * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#include - -static int __init memsize(void) -{ - u32 size = (64 << 20); - u32 *addr = (u32 *)KSEG1ADDR(0x14000000 + size - 4); - u32 *kernel_end = (u32 *)KSEG1ADDR(CPHYSADDR((u32)&_end)); - u32 *tmpaddr = addr; - - while (tmpaddr > kernel_end) { - *tmpaddr = (u32)tmpaddr; - size >>= 1; - tmpaddr -= size >> 2; - } - - do { - tmpaddr += size >> 2; - if (*tmpaddr != (u32)tmpaddr) - break; - size <<= 1; - } while (size < (64 << 20)); - - writel(tmpaddr, &addr); - - return size; -} - -void __init prom_meminit(void) -{ - unsigned long pages; - - pages = memsize() >> PAGE_SHIFT; - add_memory_region(PHYS_OFFSET, pages << PAGE_SHIFT, - BOOT_MEM_RAM); -} - -void __init prom_free_prom_memory(void) -{ - return; -} diff --git a/target/linux/ar7/files-2.6.30/arch/mips/ar7/platform.c b/target/linux/ar7/files-2.6.30/arch/mips/ar7/platform.c deleted file mode 100644 index b636216a3..000000000 --- a/target/linux/ar7/files-2.6.30/arch/mips/ar7/platform.c +++ /dev/null @@ -1,535 +0,0 @@ -/* - * Copyright (C) 2006,2007 Felix Fietkau - * Copyright (C) 2006,2007 Eugene Konev - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -struct plat_vlynq_data { - struct plat_vlynq_ops ops; - int gpio_bit; - int reset_bit; -}; - - -static int vlynq_on(struct vlynq_device *dev) -{ - int result; - struct plat_vlynq_data *pdata = dev->dev.platform_data; - - if ((result = gpio_request(pdata->gpio_bit, "vlynq"))) - goto out; - - ar7_device_reset(pdata->reset_bit); - - if ((result = ar7_gpio_disable(pdata->gpio_bit))) - goto out_enabled; - - if ((result = ar7_gpio_enable(pdata->gpio_bit))) - goto out_enabled; - - if ((result = gpio_direction_output(pdata->gpio_bit, 0))) - goto out_gpio_enabled; - - mdelay(50); - - gpio_set_value(pdata->gpio_bit, 1); - mdelay(50); - - return 0; - -out_gpio_enabled: - ar7_gpio_disable(pdata->gpio_bit); -out_enabled: - ar7_device_disable(pdata->reset_bit); - gpio_free(pdata->gpio_bit); -out: - return result; -} - -static void vlynq_off(struct vlynq_device *dev) -{ - struct plat_vlynq_data *pdata = dev->dev.platform_data; - ar7_gpio_disable(pdata->gpio_bit); - gpio_free(pdata->gpio_bit); - ar7_device_disable(pdata->reset_bit); -} - -static struct resource physmap_flash_resource = { - .name = "mem", - .flags = IORESOURCE_MEM, - .start = 0x10000000, - .end = 0x107fffff, -}; - -static struct resource cpmac_low_res[] = { - { - .name = "regs", - .flags = IORESOURCE_MEM, - .start = AR7_REGS_MAC0, - .end = AR7_REGS_MAC0 + 0x7ff, - }, - { - .name = "irq", - .flags = IORESOURCE_IRQ, - .start = 27, - .end = 27, - }, -}; - -static struct resource cpmac_high_res[] = { - { - .name = "regs", - .flags = IORESOURCE_MEM, - .start = AR7_REGS_MAC1, - .end = AR7_REGS_MAC1 + 0x7ff, - }, - { - .name = "irq", - .flags = IORESOURCE_IRQ, - .start = 41, - .end = 41, - }, -}; - -static struct resource vlynq_low_res[] = { - { - .name = "regs", - .flags = IORESOURCE_MEM, - .start = AR7_REGS_VLYNQ0, - .end = AR7_REGS_VLYNQ0 + 0xff, - }, - { - .name = "irq", - .flags = IORESOURCE_IRQ, - .start = 29, - .end = 29, - }, - { - .name = "mem", - .flags = IORESOURCE_MEM, - .start = 0x04000000, - .end = 0x04ffffff, - }, - { - .name = "devirq", - .flags = IORESOURCE_IRQ, - .start = 80, - .end = 111, - }, -}; - -static struct resource vlynq_high_res[] = { - { - .name = "regs", - .flags = IORESOURCE_MEM, - .start = AR7_REGS_VLYNQ1, - .end = AR7_REGS_VLYNQ1 + 0xff, - }, - { - .name = "irq", - .flags = IORESOURCE_IRQ, - .start = 33, - .end = 33, - }, - { - .name = "mem", - .flags = IORESOURCE_MEM, - .start = 0x0c000000, - .end = 0x0cffffff, - }, - { - .name = "devirq", - .flags = IORESOURCE_IRQ, - .start = 112, - .end = 143, - }, -}; - -static struct resource usb_res[] = { - { - .name = "regs", - .flags = IORESOURCE_MEM, - .start = AR7_REGS_USB, - .end = AR7_REGS_USB + 0xff, - }, - { - .name = "irq", - .flags = IORESOURCE_IRQ, - .start = 32, - .end = 32, - }, - { - .name = "mem", - .flags = IORESOURCE_MEM, - .start = 0x03400000, - .end = 0x034001fff, - }, -}; - -static struct physmap_flash_data physmap_flash_data = { - .width = 2, -}; - -static struct plat_cpmac_data cpmac_low_data = { - .reset_bit = 17, - .power_bit = 20, - .phy_mask = 0x80000000, -}; - -static struct plat_cpmac_data cpmac_high_data = { - .reset_bit = 21, - .power_bit = 22, - .phy_mask = 0x7fffffff, -}; - -static struct plat_vlynq_data vlynq_low_data = { - .ops.on = vlynq_on, - .ops.off = vlynq_off, - .reset_bit = 20, - .gpio_bit = 18, -}; - -static struct plat_vlynq_data vlynq_high_data = { - .ops.on = vlynq_on, - .ops.off = vlynq_off, - .reset_bit = 16, - .gpio_bit = 19, -}; - -static struct platform_device physmap_flash = { - .id = 0, - .name = "physmap-flash", - .dev.platform_data = &physmap_flash_data, - .resource = &physmap_flash_resource, - .num_resources = 1, -}; - -static u64 cpmac_dma_mask = DMA_32BIT_MASK; -static struct platform_device cpmac_low = { - .id = 0, - .name = "cpmac", - .dev = { - .dma_mask = &cpmac_dma_mask, - .coherent_dma_mask = DMA_32BIT_MASK, - .platform_data = &cpmac_low_data, - }, - .resource = cpmac_low_res, - .num_resources = ARRAY_SIZE(cpmac_low_res), -}; - -static struct platform_device cpmac_high = { - .id = 1, - .name = "cpmac", - .dev = { - .dma_mask = &cpmac_dma_mask, - .coherent_dma_mask = DMA_32BIT_MASK, - .platform_data = &cpmac_high_data, - }, - .resource = cpmac_high_res, - .num_resources = ARRAY_SIZE(cpmac_high_res), -}; - -static struct platform_device vlynq_low = { - .id = 0, - .name = "vlynq", - .dev.platform_data = &vlynq_low_data, - .resource = vlynq_low_res, - .num_resources = ARRAY_SIZE(vlynq_low_res), -}; - -static struct platform_device vlynq_high = { - .id = 1, - .name = "vlynq", - .dev.platform_data = &vlynq_high_data, - .resource = vlynq_high_res, - .num_resources = ARRAY_SIZE(vlynq_high_res), -}; - - -/* This is proper way to define uart ports, but they are then detected - * as xscale and, obviously, don't work... - */ -#if !defined(CONFIG_SERIAL_8250) - -static struct plat_serial8250_port uart0_data = { - .mapbase = AR7_REGS_UART0, - .irq = AR7_IRQ_UART0, - .regshift = 2, - .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, -}; - -static struct plat_serial8250_port uart1_data = { - .mapbase = UR8_REGS_UART1, - .irq = AR7_IRQ_UART1, - .regshift = 2, - .iotype = UPIO_MEM, - .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, -}; - -static struct plat_serial8250_port uart_data[] = { - uart0_data, - uart1_data, - { .flags = 0 } -}; - -static struct plat_serial8250_port uart_data_single[] = { - uart0_data, - { .flags = 0 } -}; - -static struct platform_device uart = { - .id = 0, - .name = "serial8250", - .dev.platform_data = uart_data_single -}; -#endif - -static struct gpio_led default_leds[] = { - { .name = "status", .gpio = 8, .active_low = 1, }, -}; - -static struct gpio_led dsl502t_leds[] = { - { .name = "status", .gpio = 9, .active_low = 1, }, - { .name = "ethernet", .gpio = 7, .active_low = 1, }, - { .name = "usb", .gpio = 12, .active_low = 1, }, -}; - -static struct gpio_led dg834g_leds[] = { - { .name = "ppp", .gpio = 6, .active_low = 1, }, - { .name = "status", .gpio = 7, .active_low = 1, }, - { .name = "adsl", .gpio = 8, .active_low = 1, }, - { .name = "wifi", .gpio = 12, .active_low = 1, }, - { .name = "power", .gpio = 14, .active_low = 1, .default_trigger = "default-on", }, -}; - -static struct gpio_led fb_sl_leds[] = { - { .name = "1", .gpio = 7, }, - { .name = "2", .gpio = 13, .active_low = 1, }, - { .name = "3", .gpio = 10, .active_low = 1, }, - { .name = "4", .gpio = 12, .active_low = 1, }, - { .name = "5", .gpio = 9, .active_low = 1, }, -}; - -static struct gpio_led fb_fon_leds[] = { - { .name = "1", .gpio = 8, }, - { .name = "2", .gpio = 3, .active_low = 1, }, - { .name = "3", .gpio = 5, }, - { .name = "4", .gpio = 4, .active_low = 1, }, - { .name = "5", .gpio = 11, .active_low = 1, }, -}; - -static struct gpio_led_platform_data ar7_led_data; - -static struct platform_device ar7_gpio_leds = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &ar7_led_data, - } -}; - -static struct platform_device ar7_udc = { - .id = -1, - .name = "ar7_udc", - .resource = usb_res, - .num_resources = ARRAY_SIZE(usb_res), -}; - -static inline unsigned char char2hex(char h) -{ - switch (h) { - case '0': case '1': case '2': case '3': case '4': - case '5': case '6': case '7': case '8': case '9': - return h - '0'; - case 'A': case 'B': case 'C': case 'D': case 'E': case 'F': - return h - 'A' + 10; - case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': - return h - 'a' + 10; - default: - return 0; - } -} - -static void cpmac_get_mac(int instance, unsigned char *dev_addr) -{ - int i; - char name[5], default_mac[] = "00:00:00:12:34:56", *mac; - - mac = NULL; - sprintf(name, "mac%c", 'a' + instance); - mac = prom_getenv(name); - if (!mac) { - sprintf(name, "mac%c", 'a'); - mac = prom_getenv(name); - } - if (!mac) - mac = default_mac; - for (i = 0; i < 6; i++) - dev_addr[i] = (char2hex(mac[i * 3]) << 4) + - char2hex(mac[i * 3 + 1]); -} - -static void __init detect_leds(void) -{ - char *prId, *usb_prod; - - /* Default LEDs */ - ar7_led_data.num_leds = ARRAY_SIZE(default_leds); - ar7_led_data.leds = default_leds; - - /* FIXME: the whole thing is unreliable */ - prId = prom_getenv("ProductID"); - usb_prod = prom_getenv("usb_prod"); - - /* If we can't get the product id from PROM, use the default LEDs */ - if (!prId) - return; - - if (strstr(prId, "Fritz_Box_FON")) { - ar7_led_data.num_leds = ARRAY_SIZE(fb_fon_leds); - ar7_led_data.leds = fb_fon_leds; - } else if (strstr(prId, "Fritz_Box_")) { - ar7_led_data.num_leds = ARRAY_SIZE(fb_sl_leds); - ar7_led_data.leds = fb_sl_leds; - } else if ((!strcmp(prId, "AR7RD") || !strcmp(prId, "AR7DB")) && usb_prod != NULL && strstr(usb_prod, "DSL-502T")) { - ar7_led_data.num_leds = ARRAY_SIZE(dsl502t_leds); - ar7_led_data.leds = dsl502t_leds; - } else if (strstr(prId, "DG834")) { - ar7_led_data.num_leds = ARRAY_SIZE(dg834g_leds); - ar7_led_data.leds = dg834g_leds; - } -} - -static int __init ar7_register_devices(void) -{ - int res; - -#ifdef CONFIG_SERIAL_8250 - - static struct uart_port uart_port[2]; - - memset(uart_port, 0, sizeof(struct uart_port) * 2); - - uart_port[0].type = PORT_AR7; - uart_port[0].line = 0; - uart_port[0].irq = AR7_IRQ_UART0; - uart_port[0].uartclk = ar7_bus_freq() / 2; - uart_port[0].iotype = UPIO_MEM; - uart_port[0].mapbase = AR7_REGS_UART0; - uart_port[0].membase = ioremap(uart_port[0].mapbase, 256); - uart_port[0].regshift = 2; - uart_port[0].flags = UPF_IOREMAP; - res = early_serial_setup(&uart_port[0]); - if (res) - return res; - - - /* Only TNETD73xx have a second serial port */ - if (ar7_has_second_uart()) { - uart_port[1].type = PORT_AR7; - uart_port[1].line = 1; - uart_port[1].irq = AR7_IRQ_UART1; - uart_port[1].uartclk = ar7_bus_freq() / 2; - uart_port[1].iotype = UPIO_MEM; - uart_port[1].mapbase = UR8_REGS_UART1; - uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); - uart_port[1].regshift = 2; - uart_port[1].flags = UPF_IOREMAP; - res = early_serial_setup(&uart_port[1]); - if (res) - return res; - } - -#else /* !CONFIG_SERIAL_8250 */ - - uart_data[0].uartclk = ar7_bus_freq() / 2; - uart_data[1].uartclk = uart_data[0].uartclk; - - /* Only TNETD73xx have a second serial port */ - if (ar7_has_second_uart()) - uart.dev.platform_data = uart_data; - - res = platform_device_register(&uart); - if (res) - return res; - -#endif /* CONFIG_SERIAL_8250 */ - - res = platform_device_register(&physmap_flash); - if (res) - return res; - - ar7_device_disable(vlynq_low_data.reset_bit); - res = platform_device_register(&vlynq_low); - if (res) - return res; - - if (ar7_has_high_vlynq()) { - ar7_device_disable(vlynq_high_data.reset_bit); - res = platform_device_register(&vlynq_high); - if (res) - return res; - } - - if (ar7_has_high_cpmac()) { - cpmac_get_mac(1, cpmac_high_data.dev_addr); - res = platform_device_register(&cpmac_high); - if (res) - return res; - } else { - cpmac_low_data.phy_mask = 0xffffffff; - } - - cpmac_get_mac(0, cpmac_low_data.dev_addr); - res = platform_device_register(&cpmac_low); - if (res) - return res; - - detect_leds(); - res = platform_device_register(&ar7_gpio_leds); - if (res) - return res; - - res = platform_device_register(&ar7_udc); - - return res; -} - - -arch_initcall(ar7_register_devices); diff --git a/target/linux/ar7/files-2.6.30/arch/mips/ar7/prom.c b/target/linux/ar7/files-2.6.30/arch/mips/ar7/prom.c deleted file mode 100644 index a72f2c955..000000000 --- a/target/linux/ar7/files-2.6.30/arch/mips/ar7/prom.c +++ /dev/null @@ -1,321 +0,0 @@ -/* - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - * - * Putting things on the screen/serial line using YAMONs facilities. - */ -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#define MAX_ENTRY 80 - -struct env_var { - char *name; - char *value; -}; - -static struct env_var adam2_env[MAX_ENTRY] = { { 0, }, }; - -char *prom_getenv(const char *name) -{ - int i; - for (i = 0; (i < MAX_ENTRY) && adam2_env[i].name; i++) - if (!strcmp(name, adam2_env[i].name)) - return adam2_env[i].value; - - return NULL; -} -EXPORT_SYMBOL(prom_getenv); - -char * __init prom_getcmdline(void) -{ - return &(arcs_cmdline[0]); -} - -static void __init ar7_init_cmdline(int argc, char *argv[]) -{ - char *cp; - int actr; - - actr = 1; /* Always ignore argv[0] */ - - cp = &(arcs_cmdline[0]); - while (actr < argc) { - strcpy(cp, argv[actr]); - cp += strlen(argv[actr]); - *cp++ = ' '; - actr++; - } - if (cp != &(arcs_cmdline[0])) { - /* get rid of trailing space */ - --cp; - *cp = '\0'; - } -} - -struct psbl_rec { - u32 psbl_size; - u32 env_base; - u32 env_size; - u32 ffs_base; - u32 ffs_size; -}; - -static __initdata char psp_env_version[] = "TIENV0.8"; - -struct psp_env_chunk { - u8 num; - u8 ctrl; - u16 csum; - u8 len; - char data[11]; -} __attribute__ ((packed)); - -struct psp_var_map_entry { - u8 num; - char *value; -}; - -static struct psp_var_map_entry psp_var_map[] = { - { 1, "cpufrequency" }, - { 2, "memsize" }, - { 3, "flashsize" }, - { 4, "modetty0" }, - { 5, "modetty1" }, - { 8, "maca" }, - { 9, "macb" }, - { 28, "sysfrequency" }, - { 38, "mipsfrequency" }, -}; - -/* - -Well-known variable (num is looked up in table above for matching variable name) -Example: cpufrequency=211968000 -+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- -| 01 |CTRL|CHECKSUM | 01 | _2 | _1 | _1 | _9 | _6 | _8 | _0 | _0 | _0 | \0 | FF -+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- - -Name=Value pair in a single chunk -Example: NAME=VALUE -+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- -| 00 |CTRL|CHECKSUM | 01 | _N | _A | _M | _E | _0 | _V | _A | _L | _U | _E | \0 -+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- - -Name=Value pair in 2 chunks (len is the number of chunks) -Example: bootloaderVersion=1.3.7.15 -+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- -| 00 |CTRL|CHECKSUM | 02 | _b | _o | _o | _t | _l | _o | _a | _d | _e | _r | _V -+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- -| _e | _r | _s | _i | _o | _n | \0 | _1 | _. | _3 | _. | _7 | _. | _1 | _5 | \0 -+----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- - -Data is padded with 0xFF - -*/ - -#define PSP_ENV_SIZE 4096 - -static char psp_env_data[PSP_ENV_SIZE] = { 0, }; - -static char * __init lookup_psp_var_map(u8 num) -{ - int i; - - for (i = 0; i < sizeof(psp_var_map); i++) - if (psp_var_map[i].num == num) - return psp_var_map[i].value; - - return NULL; -} - -static void __init add_adam2_var(char *name, char *value) -{ - int i; - for (i = 0; i < MAX_ENTRY; i++) { - if (!adam2_env[i].name) { - adam2_env[i].name = name; - adam2_env[i].value = value; - return; - } else if (!strcmp(adam2_env[i].name, name)) { - adam2_env[i].value = value; - return; - } - } -} - -static int __init parse_psp_env(void *psp_env_base) -{ - int i, n; - char *name, *value; - struct psp_env_chunk *chunks = (struct psp_env_chunk *)psp_env_data; - - memcpy_fromio(chunks, psp_env_base, PSP_ENV_SIZE); - - i = 1; - n = PSP_ENV_SIZE / sizeof(struct psp_env_chunk); - while (i < n) { - if ((chunks[i].num == 0xff) || ((i + chunks[i].len) > n)) - break; - value = chunks[i].data; - if (chunks[i].num) { - name = lookup_psp_var_map(chunks[i].num); - } else { - name = value; - value += strlen(name) + 1; - } - if (name) - add_adam2_var(name, value); - i += chunks[i].len; - } - return 0; -} - -static void __init ar7_init_env(struct env_var *env) -{ - int i; - struct psbl_rec *psbl = (struct psbl_rec *)(KSEG1ADDR(0x14000300)); - void *psp_env = (void *)KSEG1ADDR(psbl->env_base); - - if (strcmp(psp_env, psp_env_version) == 0) { - parse_psp_env(psp_env); - } else { - for (i = 0; i < MAX_ENTRY; i++, env++) - if (env->name) - add_adam2_var(env->name, env->value); - } -} - -static void __init console_config(void) -{ -#ifdef CONFIG_SERIAL_8250_CONSOLE - char console_string[40]; - int baud = 0; - char parity = '\0', bits = '\0', flow = '\0'; - char *s, *p; - - if (strstr(prom_getcmdline(), "console=")) - return; - -#ifdef CONFIG_KGDB - if (!strstr(prom_getcmdline(), "nokgdb")) { - strcat(prom_getcmdline(), " console=kgdb"); - kgdb_enabled = 1; - return; - } -#endif - - if ((s = prom_getenv("modetty0"))) { - baud = simple_strtoul(s, &p, 10); - s = p; - if (*s == ',') s++; - if (*s) parity = *s++; - if (*s == ',') s++; - if (*s) bits = *s++; - if (*s == ',') s++; - if (*s == 'h') flow = 'r'; - } - - if (baud == 0) - baud = 38400; - if (parity != 'n' && parity != 'o' && parity != 'e') - parity = 'n'; - if (bits != '7' && bits != '8') - bits = '8'; - - if (flow == 'r') - sprintf(console_string, " console=ttyS0,%d%c%c%c", baud, - parity, bits, flow); - else - sprintf(console_string, " console=ttyS0,%d%c%c", baud, parity, - bits); - strcat(prom_getcmdline(), console_string); -#endif -} - -void __init prom_init(void) -{ - ar7_init_cmdline(fw_arg0, (char **)fw_arg1); - ar7_init_env((struct env_var *)fw_arg2); - console_config(); -} - -#define PORT(offset) (KSEG1ADDR(AR7_REGS_UART0 + (offset * 4))) -static inline unsigned int serial_in(int offset) -{ - return readb((void *)PORT(offset)); -} - -static inline void serial_out(int offset, int value) -{ - writeb(value, (void *)PORT(offset)); -} - -char prom_getchar(void) -{ - while (!(serial_in(UART_LSR) & UART_LSR_DR)); - return serial_in(UART_RX); -} - -int prom_putchar(char c) -{ - while ((serial_in(UART_LSR) & UART_LSR_TEMT) == 0); - serial_out(UART_TX, c); - return 1; -} - -/* from adm5120/prom.c */ -void prom_printf(const char *fmt, ...) -{ - va_list args; - int l; - char *p, *buf_end; - char buf[1024]; - - va_start(args, fmt); - l = vsprintf(buf, fmt, args); /* hopefully i < sizeof(buf) */ - va_end(args); - - buf_end = buf + l; - - for (p = buf; p < buf_end; p++) { - /* Crude cr/nl handling is better than none */ - if (*p == '\n') - prom_putchar('\r'); - prom_putchar(*p); - } -} - -#ifdef CONFIG_KGDB -int putDebugChar(char c) -{ - return prom_putchar(c); -} - -char getDebugChar(void) -{ - return prom_getchar(); -} -#endif diff --git a/target/linux/ar7/files-2.6.30/arch/mips/ar7/setup.c b/target/linux/ar7/files-2.6.30/arch/mips/ar7/setup.c deleted file mode 100644 index 35b7b8d77..000000000 --- a/target/linux/ar7/files-2.6.30/arch/mips/ar7/setup.c +++ /dev/null @@ -1,119 +0,0 @@ -/* - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - */ -#include -#include -#include -#include - -#include -#include -#include -#include -#include - -static int titan_variant; /*hold the results of the gpio_init_titan_variant() so that it is only called once*/ -static void ar7_machine_restart(char *command); -static void ar7_machine_halt(void); -static void ar7_machine_power_off(void); - -static void ar7_machine_restart(char *command) -{ - u32 *softres_reg = (u32 *)ioremap(AR7_REGS_RESET + - AR7_RESET_SOFTWARE, 1); - writel(1, softres_reg); -} - -static void ar7_machine_halt(void) -{ - while (1); -} - -static void ar7_machine_power_off(void) -{ - u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1); - u32 power_state = readl(power_reg) | (3 << 30); - writel(power_state, power_reg); - ar7_machine_halt(); -} - -const char *get_system_type(void) -{ - u16 chip_id = ar7_chip_id(); - switch (chip_id) { - case AR7_CHIP_7300: - return "TI AR7 (TNETD7300)"; - case AR7_CHIP_7100: - return "TI AR7 (TNETD7100)"; - case AR7_CHIP_7200: - return "TI AR7 (TNETD7200)"; - case AR7_CHIP_TITAN: - titan_variant = ar7_init_titan_variant(); - switch (titan_variant /*(gpio_get_value_titan(1) >> 12) & 0xf*/) { - case TITAN_CHIP_1050: - return "TI AR7 (TNETV1050)"; - case TITAN_CHIP_1055: - return "TI AR7 (TNETV1055)"; - case TITAN_CHIP_1056: - return "TI AR7 (TNETV1056)"; - case TITAN_CHIP_1060: - return "TI AR7 (TNETV1060)"; - } - default: - return "TI AR7 (Unknown)"; - } -} - -static int __init ar7_init_console(void) -{ - return 0; -} - -/* - * Initializes basic routines and structures pointers, memory size (as - * given by the bios and saves the command line. - */ - -extern void ar7_init_clocks(void); - -void __init plat_mem_setup(void) -{ - unsigned long io_base; - - _machine_restart = ar7_machine_restart; - _machine_halt = ar7_machine_halt; - pm_power_off = ar7_machine_power_off; - panic_timeout = 3; - - io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000); - if (!io_base) panic("Can't remap IO base!\n"); - set_io_port_base(io_base); - - prom_meminit(); - ar7_init_clocks(); - - ioport_resource.start = 0; - ioport_resource.end = ~0; - iomem_resource.start = 0; - iomem_resource.end = ~0; - - printk(KERN_INFO "%s, ID: 0x%04x, Revision: 0x%02x\n", - get_system_type(), - ar7_chip_id(), ar7_chip_rev()); -} - -console_initcall(ar7_init_console); diff --git a/target/linux/ar7/files-2.6.30/arch/mips/ar7/time.c b/target/linux/ar7/files-2.6.30/arch/mips/ar7/time.c deleted file mode 100644 index 2188d9a85..000000000 --- a/target/linux/ar7/files-2.6.30/arch/mips/ar7/time.c +++ /dev/null @@ -1,28 +0,0 @@ -/* - * Carsten Langgaard, carstenl@mips.com - * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. - * - * This program is free software; you can distribute it and/or modify it - * under the terms of the GNU General Public License (Version 2) as - * published by the Free Software Foundation. - * - * This program is distributed in the hope it will be useful, but WITHOUT - * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or - * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License - * for more details. - * - * You should have received a copy of the GNU General Public License along - * with this program; if not, write to the Free Software Foundation, Inc., - * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. - * - * Setting up the clock on the MIPS boards. - */ - -#include -#include -#include - -void __init plat_time_init(void) -{ - mips_hpt_frequency = ar7_cpu_freq() / 2; -} diff --git a/target/linux/ar7/files-2.6.30/arch/mips/include/asm/ar7 b/target/linux/ar7/files-2.6.30/arch/mips/include/asm/ar7 deleted file mode 120000 index 4de8fbc8b..000000000 --- a/target/linux/ar7/files-2.6.30/arch/mips/include/asm/ar7 +++ /dev/null @@ -1 +0,0 @@ -../../../../include/asm-mips/ar7 \ No newline at end of file diff --git a/target/linux/ar7/files-2.6.30/drivers/char/ar7_gpio.c b/target/linux/ar7/files-2.6.30/drivers/char/ar7_gpio.c deleted file mode 100644 index 6b38bbd89..000000000 --- a/target/linux/ar7/files-2.6.30/drivers/char/ar7_gpio.c +++ /dev/null @@ -1,158 +0,0 @@ -/* - * Copyright (C) 2007 Nicolas Thill - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define DRVNAME "ar7_gpio" -#define LONGNAME "TI AR7 GPIOs Driver" - -MODULE_AUTHOR("Nicolas Thill "); -MODULE_DESCRIPTION(LONGNAME); -MODULE_LICENSE("GPL"); - -static int ar7_gpio_major; - -static ssize_t ar7_gpio_write(struct file *file, const char __user *buf, - size_t len, loff_t *ppos) -{ - int pin = iminor(file->f_dentry->d_inode); - size_t i; - - for (i = 0; i < len; ++i) { - char c; - if (get_user(c, buf + i)) - return -EFAULT; - switch (c) { - case '0': - gpio_set_value(pin, 0); - break; - case '1': - gpio_set_value(pin, 1); - break; - case 'd': - case 'D': - ar7_gpio_disable(pin); - break; - case 'e': - case 'E': - ar7_gpio_enable(pin); - break; - case 'i': - case 'I': - case '<': - gpio_direction_input(pin); - break; - case 'o': - case 'O': - case '>': - gpio_direction_output(pin, 0); - break; - default: - return -EINVAL; - } - } - - return len; -} - -static ssize_t ar7_gpio_read(struct file *file, char __user *buf, - size_t len, loff_t *ppos) -{ - int pin = iminor(file->f_dentry->d_inode); - int value; - - value = gpio_get_value(pin); - if (put_user(value ? '1' : '0', buf)) - return -EFAULT; - - return 1; -} - -static int ar7_gpio_open(struct inode *inode, struct file *file) -{ - int m = iminor(inode); - - if (m >= (ar7_is_titan() ? TITAN_GPIO_MAX : AR7_GPIO_MAX)) - return -EINVAL; - - return nonseekable_open(inode, file); -} - -static int ar7_gpio_release(struct inode *inode, struct file *file) -{ - return 0; -} - -static const struct file_operations ar7_gpio_fops = { - .owner = THIS_MODULE, - .write = ar7_gpio_write, - .read = ar7_gpio_read, - .open = ar7_gpio_open, - .release = ar7_gpio_release, - .llseek = no_llseek, -}; - -static struct platform_device *ar7_gpio_device; - -static int __init ar7_gpio_init(void) -{ - int rc; - - ar7_gpio_device = platform_device_alloc(DRVNAME, -1); - if (!ar7_gpio_device) - return -ENOMEM; - - rc = platform_device_add(ar7_gpio_device); - if (rc < 0) - goto out_put; - - rc = register_chrdev(ar7_gpio_major, DRVNAME, &ar7_gpio_fops); - if (rc < 0) - goto out_put; - - ar7_gpio_major = rc; - - rc = 0; - - goto out; - -out_put: - platform_device_put(ar7_gpio_device); -out: - return rc; -} - -static void __exit ar7_gpio_exit(void) -{ - unregister_chrdev(ar7_gpio_major, DRVNAME); - platform_device_unregister(ar7_gpio_device); -} - -module_init(ar7_gpio_init); -module_exit(ar7_gpio_exit); diff --git a/target/linux/ar7/files-2.6.30/drivers/char/watchdog/ar7_wdt.c b/target/linux/ar7/files-2.6.30/drivers/char/watchdog/ar7_wdt.c deleted file mode 100644 index 97cd8105a..000000000 --- a/target/linux/ar7/files-2.6.30/drivers/char/watchdog/ar7_wdt.c +++ /dev/null @@ -1,349 +0,0 @@ -/* - * drivers/watchdog/ar7_wdt.c - * - * Copyright (C) 2007 Nicolas Thill - * Copyright (c) 2005 Enrik Berkhan - * - * Some code taken from: - * National Semiconductor SCx200 Watchdog support - * Copyright (c) 2001,2002 Christer Weinigel - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#define DRVNAME "ar7_wdt" -#define LONGNAME "TI AR7 Watchdog Timer" - -MODULE_AUTHOR("Nicolas Thill "); -MODULE_DESCRIPTION(LONGNAME); -MODULE_LICENSE("GPL"); -MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); - -static int margin = 60; -module_param(margin, int, 0); -MODULE_PARM_DESC(margin, "Watchdog margin in seconds"); - -static int nowayout = WATCHDOG_NOWAYOUT; -module_param(nowayout, int, 0); -MODULE_PARM_DESC(nowayout, "Disable watchdog shutdown on close"); - -#define READ_REG(x) readl((void __iomem *)&(x)) -#define WRITE_REG(x, v) writel((v), (void __iomem *)&(x)) - -struct ar7_wdt { - u32 kick_lock; - u32 kick; - u32 change_lock; - u32 change; - u32 disable_lock; - u32 disable; - u32 prescale_lock; - u32 prescale; -}; - -static struct semaphore open_semaphore; -static unsigned expect_close; - -/* XXX currently fixed, allows max margin ~68.72 secs */ -#define prescale_value 0xffff - -/* Offset of the WDT registers */ -static unsigned long ar7_regs_wdt; -/* Pointer to the remapped WDT IO space */ -static struct ar7_wdt *ar7_wdt; -static void ar7_wdt_get_regs(void) -{ - u16 chip_id = ar7_chip_id(); - switch (chip_id) { - case AR7_CHIP_7100: - case AR7_CHIP_7200: - ar7_regs_wdt = AR7_REGS_WDT; - break; - default: - ar7_regs_wdt = UR8_REGS_WDT; - break; - } -} - - -static void ar7_wdt_kick(u32 value) -{ - WRITE_REG(ar7_wdt->kick_lock, 0x5555); - if ((READ_REG(ar7_wdt->kick_lock) & 3) == 1) { - WRITE_REG(ar7_wdt->kick_lock, 0xaaaa); - if ((READ_REG(ar7_wdt->kick_lock) & 3) == 3) { - WRITE_REG(ar7_wdt->kick, value); - return; - } - } - printk(KERN_ERR DRVNAME ": failed to unlock WDT kick reg\n"); -} - -static void ar7_wdt_prescale(u32 value) -{ - WRITE_REG(ar7_wdt->prescale_lock, 0x5a5a); - if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 1) { - WRITE_REG(ar7_wdt->prescale_lock, 0xa5a5); - if ((READ_REG(ar7_wdt->prescale_lock) & 3) == 3) { - WRITE_REG(ar7_wdt->prescale, value); - return; - } - } - printk(KERN_ERR DRVNAME ": failed to unlock WDT prescale reg\n"); -} - -static void ar7_wdt_change(u32 value) -{ - WRITE_REG(ar7_wdt->change_lock, 0x6666); - if ((READ_REG(ar7_wdt->change_lock) & 3) == 1) { - WRITE_REG(ar7_wdt->change_lock, 0xbbbb); - if ((READ_REG(ar7_wdt->change_lock) & 3) == 3) { - WRITE_REG(ar7_wdt->change, value); - return; - } - } - printk(KERN_ERR DRVNAME ": failed to unlock WDT change reg\n"); -} - -static void ar7_wdt_disable(u32 value) -{ - WRITE_REG(ar7_wdt->disable_lock, 0x7777); - if ((READ_REG(ar7_wdt->disable_lock) & 3) == 1) { - WRITE_REG(ar7_wdt->disable_lock, 0xcccc); - if ((READ_REG(ar7_wdt->disable_lock) & 3) == 2) { - WRITE_REG(ar7_wdt->disable_lock, 0xdddd); - if ((READ_REG(ar7_wdt->disable_lock) & 3) == 3) { - WRITE_REG(ar7_wdt->disable, value); - return; - } - } - } - printk(KERN_ERR DRVNAME ": failed to unlock WDT disable reg\n"); -} - -static void ar7_wdt_update_margin(int new_margin) -{ - u32 change; - - change = new_margin * (ar7_vbus_freq() / prescale_value); - if (change < 1) change = 1; - if (change > 0xffff) change = 0xffff; - ar7_wdt_change(change); - margin = change * prescale_value / ar7_vbus_freq(); - printk(KERN_INFO DRVNAME - ": timer margin %d seconds (prescale %d, change %d, freq %d)\n", - margin, prescale_value, change, ar7_vbus_freq()); -} - -static void ar7_wdt_enable_wdt(void) -{ - printk(KERN_DEBUG DRVNAME ": enabling watchdog timer\n"); - ar7_wdt_disable(1); - ar7_wdt_kick(1); -} - -static void ar7_wdt_disable_wdt(void) -{ - printk(KERN_DEBUG DRVNAME ": disabling watchdog timer\n"); - ar7_wdt_disable(0); -} - -static int ar7_wdt_open(struct inode *inode, struct file *file) -{ - /* only allow one at a time */ - if (down_trylock(&open_semaphore)) - return -EBUSY; - ar7_wdt_enable_wdt(); - expect_close = 0; - - return nonseekable_open(inode, file); -} - -static int ar7_wdt_release(struct inode *inode, struct file *file) -{ - if (!expect_close) - printk(KERN_WARNING DRVNAME - ": watchdog device closed unexpectedly," - "will not disable the watchdog timer\n"); - else if (!nowayout) - ar7_wdt_disable_wdt(); - - up(&open_semaphore); - - return 0; -} - -static int ar7_wdt_notify_sys(struct notifier_block *this, - unsigned long code, void *unused) -{ - if (code == SYS_HALT || code == SYS_POWER_OFF) - if (!nowayout) - ar7_wdt_disable_wdt(); - - return NOTIFY_DONE; -} - -static struct notifier_block ar7_wdt_notifier = { - .notifier_call = ar7_wdt_notify_sys -}; - -static ssize_t ar7_wdt_write(struct file *file, const char *data, - size_t len, loff_t *ppos) -{ - /* check for a magic close character */ - if (len) { - size_t i; - - ar7_wdt_kick(1); - - expect_close = 0; - for (i = 0; i < len; ++i) { - char c; - if (get_user(c, data+i)) - return -EFAULT; - if (c == 'V') - expect_close = 1; - } - - } - return len; -} - -static int ar7_wdt_ioctl(struct inode *inode, struct file *file, - unsigned int cmd, unsigned long arg) -{ - static struct watchdog_info ident = { - .identity = LONGNAME, - .firmware_version = 1, - .options = (WDIOF_SETTIMEOUT | WDIOF_MAGICCLOSE | WDIOF_KEEPALIVEPING), - }; - int new_margin; - - switch (cmd) { - default: - return -ENOTTY; - case WDIOC_GETSUPPORT: - if (copy_to_user((struct watchdog_info *)arg, &ident, - sizeof(ident))) - return -EFAULT; - return 0; - case WDIOC_GETSTATUS: - case WDIOC_GETBOOTSTATUS: - if (put_user(0, (int *)arg)) - return -EFAULT; - return 0; - case WDIOC_KEEPALIVE: - ar7_wdt_kick(1); - return 0; - case WDIOC_SETTIMEOUT: - if (get_user(new_margin, (int *)arg)) - return -EFAULT; - if (new_margin < 1) - return -EINVAL; - - ar7_wdt_update_margin(new_margin); - ar7_wdt_kick(1); - - case WDIOC_GETTIMEOUT: - if (put_user(margin, (int *)arg)) - return -EFAULT; - return 0; - } -} - -static struct file_operations ar7_wdt_fops = { - .owner = THIS_MODULE, - .write = ar7_wdt_write, - .ioctl = ar7_wdt_ioctl, - .open = ar7_wdt_open, - .release = ar7_wdt_release, -}; - -static struct miscdevice ar7_wdt_miscdev = { - .minor = WATCHDOG_MINOR, - .name = "watchdog", - .fops = &ar7_wdt_fops, -}; - -static int __init ar7_wdt_init(void) -{ - int rc; - - ar7_wdt_get_regs(); - - if (!request_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt), - LONGNAME)) { - printk(KERN_WARNING DRVNAME ": watchdog I/O region busy\n"); - return -EBUSY; - } - - ar7_wdt = (struct ar7_wdt *) - ioremap(ar7_regs_wdt, sizeof(struct ar7_wdt)); - - ar7_wdt_disable_wdt(); - ar7_wdt_prescale(prescale_value); - ar7_wdt_update_margin(margin); - - sema_init(&open_semaphore, 1); - - rc = register_reboot_notifier(&ar7_wdt_notifier); - if (rc) { - printk(KERN_ERR DRVNAME - ": unable to register reboot notifier\n"); - goto out_alloc; - } - - rc = misc_register(&ar7_wdt_miscdev); - if (rc) { - printk(KERN_ERR DRVNAME ": unable to register misc device\n"); - goto out_register; - } - goto out; - -out_register: - unregister_reboot_notifier(&ar7_wdt_notifier); -out_alloc: - iounmap(ar7_wdt); - release_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt)); -out: - return rc; -} - -static void __exit ar7_wdt_cleanup(void) -{ - misc_deregister(&ar7_wdt_miscdev); - unregister_reboot_notifier(&ar7_wdt_notifier); - iounmap(ar7_wdt); - release_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt)); -} - -module_init(ar7_wdt_init); -module_exit(ar7_wdt_cleanup); diff --git a/target/linux/ar7/files-2.6.30/drivers/vlynq/Kconfig b/target/linux/ar7/files-2.6.30/drivers/vlynq/Kconfig deleted file mode 100644 index 2c8ffe0d1..000000000 --- a/target/linux/ar7/files-2.6.30/drivers/vlynq/Kconfig +++ /dev/null @@ -1,13 +0,0 @@ -menu "TI VLYNQ" - -config VLYNQ - bool "TI VLYNQ bus support" - depends on AR7 && EXPERIMENTAL - help - Support for the TI VLYNQ bus - - The module will be called vlynq - - If unsure, say N - -endmenu diff --git a/target/linux/ar7/files-2.6.30/drivers/vlynq/Makefile b/target/linux/ar7/files-2.6.30/drivers/vlynq/Makefile deleted file mode 100644 index b3f61149b..000000000 --- a/target/linux/ar7/files-2.6.30/drivers/vlynq/Makefile +++ /dev/null @@ -1,5 +0,0 @@ -# -# Makefile for kernel vlynq drivers -# - -obj-$(CONFIG_VLYNQ) += vlynq.o diff --git a/target/linux/ar7/files-2.6.30/drivers/vlynq/vlynq.c b/target/linux/ar7/files-2.6.30/drivers/vlynq/vlynq.c deleted file mode 100644 index f4b7b0f98..000000000 --- a/target/linux/ar7/files-2.6.30/drivers/vlynq/vlynq.c +++ /dev/null @@ -1,783 +0,0 @@ -/* - * Copyright (C) 2006, 2007 Eugene Konev - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#define VLYNQ_CTRL_PM_ENABLE 0x80000000 -#define VLYNQ_CTRL_CLOCK_INT 0x00008000 -#define VLYNQ_CTRL_CLOCK_DIV(x) (((x) & 7) << 16) -#define VLYNQ_CTRL_INT_LOCAL 0x00004000 -#define VLYNQ_CTRL_INT_ENABLE 0x00002000 -#define VLYNQ_CTRL_INT_VECTOR(x) (((x) & 0x1f) << 8) -#define VLYNQ_CTRL_INT2CFG 0x00000080 -#define VLYNQ_CTRL_RESET 0x00000001 - -#define VLYNQ_CTRL_CLOCK_MASK (0x7 << 16) - -#define VLYNQ_INT_OFFSET 0x00000014 -#define VLYNQ_REMOTE_OFFSET 0x00000080 - -#define VLYNQ_STATUS_LINK 0x00000001 -#define VLYNQ_STATUS_LERROR 0x00000080 -#define VLYNQ_STATUS_RERROR 0x00000100 - -#define VINT_ENABLE 0x00000100 -#define VINT_TYPE_EDGE 0x00000080 -#define VINT_LEVEL_LOW 0x00000040 -#define VINT_VECTOR(x) ((x) & 0x1f) -#define VINT_OFFSET(irq) (8 * ((irq) % 4)) - -#define VLYNQ_AUTONEGO_V2 0x00010000 - -struct vlynq_regs { - u32 revision; - u32 control; - u32 status; - u32 int_prio; - u32 int_status; - u32 int_pending; - u32 int_ptr; - u32 tx_offset; - struct vlynq_mapping rx_mapping[4]; - u32 chip; - u32 autonego; - u32 unused[6]; - u32 int_device[8]; -}; - -#define vlynq_reg_read(reg) readl(&(reg)) -#define vlynq_reg_write(reg, val) writel(val, &(reg)) - -static int __vlynq_enable_device(struct vlynq_device *dev); - -#ifdef VLYNQ_DEBUG -static void vlynq_dump_regs(struct vlynq_device *dev) -{ - int i; - printk(KERN_DEBUG "VLYNQ local=%p remote=%p\n", - dev->local, dev->remote); - for (i = 0; i < 32; i++) { - printk(KERN_DEBUG "VLYNQ: local %d: %08x\n", - i + 1, ((u32 *)dev->local)[i]); - printk(KERN_DEBUG "VLYNQ: remote %d: %08x\n", - i + 1, ((u32 *)dev->remote)[i]); - } -} - -static void vlynq_dump_mem(u32 *base, int count) -{ - int i; - for (i = 0; i < (count + 3) / 4; i++) { - if (i % 4 == 0) printk(KERN_DEBUG "\nMEM[0x%04x]:", i * 4); - printk(KERN_DEBUG " 0x%08x", *(base + i)); - } - printk(KERN_DEBUG "\n"); -} -#endif - -int vlynq_linked(struct vlynq_device *dev) -{ - int i; - - for (i = 0; i < 100; i++) - if (vlynq_reg_read(dev->local->status) & VLYNQ_STATUS_LINK) - return 1; - else - cpu_relax(); - - return 0; -} - -static void vlynq_reset(struct vlynq_device *dev) -{ - vlynq_reg_write(dev->local->control, - vlynq_reg_read(dev->local->control) | - VLYNQ_CTRL_RESET); - - /* Wait for the devices to finish resetting */ - msleep(5); - - /* Remove reset bit */ - vlynq_reg_write(dev->local->control, - vlynq_reg_read(dev->local->control) & - ~VLYNQ_CTRL_RESET); - - /* Give some time for the devices to settle */ - msleep(5); -} - -static void vlynq_irq_unmask(unsigned int irq) -{ - u32 val; - struct vlynq_device *dev = get_irq_chip_data(irq); - int virq; - - BUG_ON(!dev); - virq = irq - dev->irq_start; - val = vlynq_reg_read(dev->remote->int_device[virq >> 2]); - val |= (VINT_ENABLE | virq) << VINT_OFFSET(virq); - vlynq_reg_write(dev->remote->int_device[virq >> 2], val); -} - -static void vlynq_irq_mask(unsigned int irq) -{ - u32 val; - struct vlynq_device *dev = get_irq_chip_data(irq); - int virq; - - BUG_ON(!dev); - virq = irq - dev->irq_start; - val = vlynq_reg_read(dev->remote->int_device[virq >> 2]); - val &= ~(VINT_ENABLE << VINT_OFFSET(virq)); - vlynq_reg_write(dev->remote->int_device[virq >> 2], val); -} - -static int vlynq_irq_type(unsigned int irq, unsigned int flow_type) -{ - u32 val; - struct vlynq_device *dev = get_irq_chip_data(irq); - int virq; - - BUG_ON(!dev); - virq = irq - dev->irq_start; - val = vlynq_reg_read(dev->remote->int_device[virq >> 2]); - switch (flow_type & IRQ_TYPE_SENSE_MASK) { - case IRQ_TYPE_EDGE_RISING: - case IRQ_TYPE_EDGE_FALLING: - case IRQ_TYPE_EDGE_BOTH: - val |= VINT_TYPE_EDGE << VINT_OFFSET(virq); - val &= ~(VINT_LEVEL_LOW << VINT_OFFSET(virq)); - break; - case IRQ_TYPE_LEVEL_HIGH: - val &= ~(VINT_TYPE_EDGE << VINT_OFFSET(virq)); - val &= ~(VINT_LEVEL_LOW << VINT_OFFSET(virq)); - break; - case IRQ_TYPE_LEVEL_LOW: - val &= ~(VINT_TYPE_EDGE << VINT_OFFSET(virq)); - val |= VINT_LEVEL_LOW << VINT_OFFSET(virq); - break; - default: - return -EINVAL; - } - vlynq_reg_write(dev->remote->int_device[virq >> 2], val); - return 0; -} - -static void vlynq_local_ack(unsigned int irq) -{ - struct vlynq_device *dev = get_irq_chip_data(irq); - u32 status = vlynq_reg_read(dev->local->status); - if (printk_ratelimit()) - printk(KERN_DEBUG "%s: local status: 0x%08x\n", - dev->dev.bus_id, status); - vlynq_reg_write(dev->local->status, status); -} - -static void vlynq_remote_ack(unsigned int irq) -{ - struct vlynq_device *dev = get_irq_chip_data(irq); - u32 status = vlynq_reg_read(dev->remote->status); - if (printk_ratelimit()) - printk(KERN_DEBUG "%s: remote status: 0x%08x\n", - dev->dev.bus_id, status); - vlynq_reg_write(dev->remote->status, status); -} - -static irqreturn_t vlynq_irq(int irq, void *dev_id) -{ - struct vlynq_device *dev = dev_id; - u32 status; - int virq = 0; - - status = vlynq_reg_read(dev->local->int_status); - vlynq_reg_write(dev->local->int_status, status); - - if (unlikely(!status)) - spurious_interrupt(); - - while (status) { - if (status & 1) - do_IRQ(dev->irq_start + virq); - status >>= 1; - virq++; - } - - return IRQ_HANDLED; -} - -static struct irq_chip vlynq_irq_chip = { - .name = "vlynq", - .unmask = vlynq_irq_unmask, - .mask = vlynq_irq_mask, - .set_type = vlynq_irq_type, -}; - -static struct irq_chip vlynq_local_chip = { - .name = "vlynq local error", - .unmask = vlynq_irq_unmask, - .mask = vlynq_irq_mask, - .ack = vlynq_local_ack, -}; - -static struct irq_chip vlynq_remote_chip = { - .name = "vlynq local error", - .unmask = vlynq_irq_unmask, - .mask = vlynq_irq_mask, - .ack = vlynq_remote_ack, -}; - -static int vlynq_setup_irq(struct vlynq_device *dev) -{ - u32 val; - int i, virq; - - if (dev->local_irq == dev->remote_irq) { - printk(KERN_ERR - "%s: local vlynq irq should be different from remote\n", - dev->dev.bus_id); - return -EINVAL; - } - - /* Clear local and remote error bits */ - vlynq_reg_write(dev->local->status, vlynq_reg_read(dev->local->status)); - vlynq_reg_write(dev->remote->status, - vlynq_reg_read(dev->remote->status)); - - /* Now setup interrupts */ - val = VLYNQ_CTRL_INT_VECTOR(dev->local_irq); - val |= VLYNQ_CTRL_INT_ENABLE | VLYNQ_CTRL_INT_LOCAL | - VLYNQ_CTRL_INT2CFG; - val |= vlynq_reg_read(dev->local->control); - vlynq_reg_write(dev->local->int_ptr, VLYNQ_INT_OFFSET); - vlynq_reg_write(dev->local->control, val); - - val = VLYNQ_CTRL_INT_VECTOR(dev->remote_irq); - val |= VLYNQ_CTRL_INT_ENABLE; - val |= vlynq_reg_read(dev->remote->control); - vlynq_reg_write(dev->remote->int_ptr, VLYNQ_INT_OFFSET); - vlynq_reg_write(dev->remote->control, val); - - for (i = dev->irq_start; i <= dev->irq_end; i++) { - virq = i - dev->irq_start; - if (virq == dev->local_irq) { - set_irq_chip_and_handler(i, &vlynq_local_chip, - handle_level_irq); - set_irq_chip_data(i, dev); - } else if (virq == dev->remote_irq) { - set_irq_chip_and_handler(i, &vlynq_remote_chip, - handle_level_irq); - set_irq_chip_data(i, dev); - } else { - set_irq_chip_and_handler(i, &vlynq_irq_chip, - handle_simple_irq); - set_irq_chip_data(i, dev); - vlynq_reg_write(dev->remote->int_device[virq >> 2], 0); - } - } - - if (request_irq(dev->irq, vlynq_irq, IRQF_SHARED, "vlynq", dev)) { - printk(KERN_ERR "%s: request_irq failed\n", dev->dev.bus_id); - return -EAGAIN; - } - - return 0; -} - -static void vlynq_device_release(struct device *dev) -{ - struct vlynq_device *vdev = to_vlynq_device(dev); - kfree(vdev); -} - -static int vlynq_device_match(struct device *dev, - struct device_driver *drv) -{ - struct vlynq_device *vdev = to_vlynq_device(dev); - struct vlynq_driver *vdrv = to_vlynq_driver(drv); - struct vlynq_device_id *ids = vdrv->id_table; - - while (ids->id) { - if (ids->id == vdev->dev_id) { - vdev->divisor = ids->divisor; - vlynq_set_drvdata(vdev, ids); - printk(KERN_INFO "Driver found for VLYNQ " \ - "device: %08x\n", vdev->dev_id); - return 1; - } - printk(KERN_DEBUG "Not using the %08x VLYNQ device's driver" \ - " for VLYNQ device: %08x\n", ids->id, vdev->dev_id); - ids++; - } - return 0; -} - -static int vlynq_device_probe(struct device *dev) -{ - struct vlynq_device *vdev = to_vlynq_device(dev); - struct vlynq_driver *drv = to_vlynq_driver(dev->driver); - struct vlynq_device_id *id = vlynq_get_drvdata(vdev); - int result = -ENODEV; - - get_device(dev); - if (drv && drv->probe) - result = drv->probe(vdev, id); - if (result) - put_device(dev); - return result; -} - -static int vlynq_device_remove(struct device *dev) -{ - struct vlynq_driver *drv = to_vlynq_driver(dev->driver); - if (drv && drv->remove) - drv->remove(to_vlynq_device(dev)); - put_device(dev); - return 0; -} - -int __vlynq_register_driver(struct vlynq_driver *driver, struct module *owner) -{ - driver->driver.name = driver->name; - driver->driver.bus = &vlynq_bus_type; - return driver_register(&driver->driver); -} -EXPORT_SYMBOL(__vlynq_register_driver); - -void vlynq_unregister_driver(struct vlynq_driver *driver) -{ - driver_unregister(&driver->driver); -} -EXPORT_SYMBOL(vlynq_unregister_driver); - -static int __vlynq_try_remote(struct vlynq_device *dev) -{ - int i; - - vlynq_reset(dev); - for (i = dev->dev_id ? vlynq_rdiv2 : vlynq_rdiv8; dev->dev_id ? - i <= vlynq_rdiv8 : i >= vlynq_rdiv2; - dev->dev_id ? i++ : i--) { - - if (!vlynq_linked(dev)) - break; - - vlynq_reg_write(dev->remote->control, - (vlynq_reg_read(dev->remote->control) & - ~VLYNQ_CTRL_CLOCK_MASK) | - VLYNQ_CTRL_CLOCK_INT | - VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1)); - vlynq_reg_write(dev->local->control, - ((vlynq_reg_read(dev->local->control) - & ~(VLYNQ_CTRL_CLOCK_INT | - VLYNQ_CTRL_CLOCK_MASK)) | - VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1))); - - if (vlynq_linked(dev)) { - printk(KERN_DEBUG - "%s: using remote clock divisor %d\n", - dev->dev.bus_id, i - vlynq_rdiv1 + 1); - dev->divisor = i; - return 0; - } else { - vlynq_reset(dev); - } - } - - return -ENODEV; -} - -static int __vlynq_try_local(struct vlynq_device *dev) -{ - int i; - - vlynq_reset(dev); - - for (i = dev->dev_id ? vlynq_ldiv2 : vlynq_ldiv8; dev->dev_id ? - i <= vlynq_ldiv8 : i >= vlynq_ldiv2; - dev->dev_id ? i++ : i--) { - - vlynq_reg_write(dev->local->control, - (vlynq_reg_read(dev->local->control) & - ~VLYNQ_CTRL_CLOCK_MASK) | - VLYNQ_CTRL_CLOCK_INT | - VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1)); - - if (vlynq_linked(dev)) { - printk(KERN_DEBUG - "%s: using local clock divisor %d\n", - dev->dev.bus_id, i - vlynq_ldiv1 + 1); - dev->divisor = i; - return 0; - } else { - vlynq_reset(dev); - } - } - - return -ENODEV; -} - -static int __vlynq_try_external(struct vlynq_device *dev) -{ - vlynq_reset(dev); - if (!vlynq_linked(dev)) - return -ENODEV; - - vlynq_reg_write(dev->remote->control, - (vlynq_reg_read(dev->remote->control) & - ~VLYNQ_CTRL_CLOCK_INT)); - - vlynq_reg_write(dev->local->control, - (vlynq_reg_read(dev->local->control) & - ~VLYNQ_CTRL_CLOCK_INT)); - - if (vlynq_linked(dev)) { - printk(KERN_DEBUG "%s: using external clock\n", - dev->dev.bus_id); - dev->divisor = vlynq_div_external; - return 0; - } - - return -ENODEV; -} - -static int __vlynq_enable_device(struct vlynq_device *dev) -{ - int result; - struct plat_vlynq_ops *ops = dev->dev.platform_data; - - result = ops->on(dev); - if (result) - return result; - - switch (dev->divisor) { - case vlynq_div_external: - case vlynq_div_auto: - /* When the device is brought from reset it should have clock - generation negotiated by hardware. - Check which device is generating clocks and perform setup - accordingly */ - if (vlynq_linked(dev) && vlynq_reg_read(dev->remote->control) & - VLYNQ_CTRL_CLOCK_INT) { - if (!__vlynq_try_remote(dev) || - !__vlynq_try_local(dev) || - !__vlynq_try_external(dev)) - return 0; - } else { - if (!__vlynq_try_external(dev) || - !__vlynq_try_local(dev) || - !__vlynq_try_remote(dev)) - return 0; - } - break; - case vlynq_ldiv1: case vlynq_ldiv2: case vlynq_ldiv3: case vlynq_ldiv4: - case vlynq_ldiv5: case vlynq_ldiv6: case vlynq_ldiv7: case vlynq_ldiv8: - vlynq_reg_write(dev->local->control, - VLYNQ_CTRL_CLOCK_INT | - VLYNQ_CTRL_CLOCK_DIV(dev->divisor - - vlynq_ldiv1)); - vlynq_reg_write(dev->remote->control, 0); - if (vlynq_linked(dev)) { - printk(KERN_DEBUG - "%s: using local clock divisor %d\n", - dev->dev.bus_id, dev->divisor - vlynq_ldiv1 + 1); - return 0; - } - break; - case vlynq_rdiv1: case vlynq_rdiv2: case vlynq_rdiv3: case vlynq_rdiv4: - case vlynq_rdiv5: case vlynq_rdiv6: case vlynq_rdiv7: case vlynq_rdiv8: - vlynq_reg_write(dev->local->control, 0); - vlynq_reg_write(dev->remote->control, - VLYNQ_CTRL_CLOCK_INT | - VLYNQ_CTRL_CLOCK_DIV(dev->divisor - - vlynq_rdiv1)); - if (vlynq_linked(dev)) { - printk(KERN_DEBUG - "%s: using remote clock divisor %d\n", - dev->dev.bus_id, dev->divisor - vlynq_rdiv1 + 1); - return 0; - } - break; - } - - ops->off(dev); - return -ENODEV; -} - -int vlynq_enable_device(struct vlynq_device *dev) -{ - struct plat_vlynq_ops *ops = dev->dev.platform_data; - int result = -ENODEV; - - result = __vlynq_enable_device(dev); - if (result) - return result; - - result = vlynq_setup_irq(dev); - if (result) - ops->off(dev); - - dev->enabled = !result; - return result; -} -EXPORT_SYMBOL(vlynq_enable_device); - - -void vlynq_disable_device(struct vlynq_device *dev) -{ - struct plat_vlynq_ops *ops = dev->dev.platform_data; - - dev->enabled = 0; - free_irq(dev->irq, dev); - ops->off(dev); -} -EXPORT_SYMBOL(vlynq_disable_device); - -int vlynq_set_local_mapping(struct vlynq_device *dev, u32 tx_offset, - struct vlynq_mapping *mapping) -{ - int i; - - if (!dev->enabled) - return -ENXIO; - - vlynq_reg_write(dev->local->tx_offset, tx_offset); - for (i = 0; i < 4; i++) { - vlynq_reg_write(dev->local->rx_mapping[i].offset, - mapping[i].offset); - vlynq_reg_write(dev->local->rx_mapping[i].size, - mapping[i].size); - } - return 0; -} -EXPORT_SYMBOL(vlynq_set_local_mapping); - -int vlynq_set_remote_mapping(struct vlynq_device *dev, u32 tx_offset, - struct vlynq_mapping *mapping) -{ - int i; - - if (!dev->enabled) - return -ENXIO; - - vlynq_reg_write(dev->remote->tx_offset, tx_offset); - for (i = 0; i < 4; i++) { - vlynq_reg_write(dev->remote->rx_mapping[i].offset, - mapping[i].offset); - vlynq_reg_write(dev->remote->rx_mapping[i].size, - mapping[i].size); - } - return 0; -} -EXPORT_SYMBOL(vlynq_set_remote_mapping); - -int vlynq_set_local_irq(struct vlynq_device *dev, int virq) -{ - int irq = dev->irq_start + virq; - if (dev->enabled) - return -EBUSY; - - if ((irq < dev->irq_start) || (irq > dev->irq_end)) - return -EINVAL; - - if (virq == dev->remote_irq) - return -EINVAL; - - dev->local_irq = virq; - - return 0; -} -EXPORT_SYMBOL(vlynq_set_local_irq); - -int vlynq_set_remote_irq(struct vlynq_device *dev, int virq) -{ - int irq = dev->irq_start + virq; - if (dev->enabled) - return -EBUSY; - - if ((irq < dev->irq_start) || (irq > dev->irq_end)) - return -EINVAL; - - if (virq == dev->local_irq) - return -EINVAL; - - dev->remote_irq = virq; - - return 0; -} -EXPORT_SYMBOL(vlynq_set_remote_irq); - -static int vlynq_probe(struct platform_device *pdev) -{ - struct vlynq_device *dev; - struct resource *regs_res, *mem_res, *irq_res; - int len, result; - - regs_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "regs"); - if (!regs_res) - return -ENODEV; - - mem_res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mem"); - if (!mem_res) - return -ENODEV; - - irq_res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "devirq"); - if (!irq_res) - return -ENODEV; - - dev = kzalloc(sizeof(*dev), GFP_KERNEL); - if (!dev) { - printk(KERN_ERR - "vlynq: failed to allocate device structure\n"); - return -ENOMEM; - } - - dev->id = pdev->id; - dev->dev.bus = &vlynq_bus_type; - dev->dev.parent = &pdev->dev; - snprintf(dev->dev.bus_id, BUS_ID_SIZE, "vlynq%d", dev->id); - dev->dev.bus_id[BUS_ID_SIZE - 1] = 0; - dev->dev.platform_data = pdev->dev.platform_data; - dev->dev.release = vlynq_device_release; - - dev->regs_start = regs_res->start; - dev->regs_end = regs_res->end; - dev->mem_start = mem_res->start; - dev->mem_end = mem_res->end; - - len = regs_res->end - regs_res->start; - if (!request_mem_region(regs_res->start, len, dev->dev.bus_id)) { - printk(KERN_ERR "%s: Can't request vlynq registers\n", - dev->dev.bus_id); - result = -ENXIO; - goto fail_request; - } - - dev->local = ioremap(regs_res->start, len); - if (!dev->local) { - printk(KERN_ERR "%s: Can't remap vlynq registers\n", - dev->dev.bus_id); - result = -ENXIO; - goto fail_remap; - } - - dev->remote = (struct vlynq_regs *)((void *)dev->local + - VLYNQ_REMOTE_OFFSET); - - dev->irq = platform_get_irq_byname(pdev, "irq"); - dev->irq_start = irq_res->start; - dev->irq_end = irq_res->end; - dev->local_irq = dev->irq_end - dev->irq_start; - dev->remote_irq = dev->local_irq - 1; - - if (device_register(&dev->dev)) - goto fail_register; - platform_set_drvdata(pdev, dev); - - printk(KERN_INFO "%s: regs 0x%p, irq %d, mem 0x%p\n", - dev->dev.bus_id, (void *)dev->regs_start, dev->irq, - (void *)dev->mem_start); - - dev->dev_id = 0; - dev->divisor = vlynq_div_auto; - result = __vlynq_enable_device(dev); - if (result == 0) { - dev->dev_id = vlynq_reg_read(dev->remote->chip); - ((struct plat_vlynq_ops *)(dev->dev.platform_data))->off(dev); - } - if (dev->dev_id) - printk(KERN_INFO "Found a VLYNQ device: %08x\n", dev->dev_id); - - return 0; - -fail_register: - iounmap(dev->local); -fail_remap: -fail_request: - release_mem_region(regs_res->start, len); - kfree(dev); - return result; -} - -static int vlynq_remove(struct platform_device *pdev) -{ - struct vlynq_device *dev = platform_get_drvdata(pdev); - - device_unregister(&dev->dev); - iounmap(dev->local); - release_mem_region(dev->regs_start, dev->regs_end - dev->regs_start); - - kfree(dev); - - return 0; -} - -static struct platform_driver vlynq_platform_driver = { - .driver.name = "vlynq", - .probe = vlynq_probe, - .remove = __devexit_p(vlynq_remove), -}; - -struct bus_type vlynq_bus_type = { - .name = "vlynq", - .match = vlynq_device_match, - .probe = vlynq_device_probe, - .remove = vlynq_device_remove, -}; -EXPORT_SYMBOL(vlynq_bus_type); - -static int __devinit vlynq_init(void) -{ - int res = 0; - - res = bus_register(&vlynq_bus_type); - if (res) - goto fail_bus; - - res = platform_driver_register(&vlynq_platform_driver); - if (res) - goto fail_platform; - - return 0; - -fail_platform: - bus_unregister(&vlynq_bus_type); -fail_bus: - return res; -} - -static void __devexit vlynq_exit(void) -{ - platform_driver_unregister(&vlynq_platform_driver); - bus_unregister(&vlynq_bus_type); -} - -module_init(vlynq_init); -module_exit(vlynq_exit); diff --git a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/ar7.h b/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/ar7.h deleted file mode 100644 index f37e82f5c..000000000 --- a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/ar7.h +++ /dev/null @@ -1,200 +0,0 @@ -/* - * Copyright (C) 2006,2007 Felix Fietkau - * Copyright (C) 2006,2007 Eugene Konev - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __AR7_H__ -#define __AR7_H__ - -#include -#include -#include - -#define AR7_REGS_BASE 0x08610000 - -#define AR7_REGS_MAC0 (AR7_REGS_BASE + 0x0000) -#define AR7_REGS_GPIO (AR7_REGS_BASE + 0x0900) -/* 0x08610A00 - 0x08610BFF (512 bytes, 128 bytes / clock) */ -#define AR7_REGS_POWER (AR7_REGS_BASE + 0x0a00) -#define AR7_REGS_UART0 (AR7_REGS_BASE + 0x0e00) -#define AR7_REGS_USB (AR7_REGS_BASE + 0x1200) -#define AR7_REGS_RESET (AR7_REGS_BASE + 0x1600) -#define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800) -#define AR7_REGS_DCL (AR7_REGS_BASE + 0x1a00) -#define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1c00) -#define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1e00) -#define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400) -#define AR7_REGS_MAC1 (AR7_REGS_BASE + 0x2800) - -#define AR7_REGS_WDT (AR7_REGS_BASE + 0x1f00) -#define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00) -#define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00) - -#define TITAN_REGS_ESWITCH_BASE (0x08640000) -#define TITAN_REGS_MAC0 (TITAN_REGS_ESWITCH_BASE + 0) -#define TITAN_REGS_MAC1 (TITAN_REGS_ESWITCH_BASE + 0x0800) -#define TITAN_REGS_MDIO (TITAN_REGS_ESWITCH_BASE + 0x02000) -#define TITAN_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1c00) -#define TITAN_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1300) - -#define AR7_RESET_PEREPHERIAL 0x0 -#define AR7_RESET_SOFTWARE 0x4 -#define AR7_RESET_STATUS 0x8 - -#define AR7_RESET_BIT_CPMAC_LO 17 -#define AR7_RESET_BIT_CPMAC_HI 21 -#define AR7_RESET_BIT_MDIO 22 -#define AR7_RESET_BIT_EPHY 26 - -#define TITAN_RESET_BIT_EPHY1 28 - -/* GPIO control registers */ -#define AR7_GPIO_INPUT 0x0 -#define AR7_GPIO_OUTPUT 0x4 -#define AR7_GPIO_DIR 0x8 -#define AR7_GPIO_ENABLE 0xc -#define TITAN_GPIO_INPUT_0 0x0 -#define TITAN_GPIO_INPUT_1 0x4 -#define TITAN_GPIO_OUTPUT_0 0x8 -#define TITAN_GPIO_OUTPUT_1 0xc -#define TITAN_GPIO_DIR_0 0x10 -#define TITAN_GPIO_DIR_1 0x14 -#define TITAN_GPIO_ENBL_0 0x18 -#define TITAN_GPIO_ENBL_1 0x1c - -#define AR7_CHIP_7100 0x18 -#define AR7_CHIP_7200 0x2b -#define AR7_CHIP_7300 0x05 -#define AR7_CHIP_TITAN 0x07 -#define TITAN_CHIP_1050 0x0f -#define TITAN_CHIP_1055 0x0e -#define TITAN_CHIP_1056 0x0d -#define TITAN_CHIP_1060 0x07 - -/* Interrupts */ -#define AR7_IRQ_UART0 15 -#define AR7_IRQ_UART1 16 - -/* Clocks */ -#define AR7_AFE_CLOCK 35328000 -#define AR7_REF_CLOCK 25000000 -#define AR7_XTAL_CLOCK 24000000 - -struct plat_cpmac_data { - int reset_bit; - int power_bit; - u32 phy_mask; - char dev_addr[6]; -}; - -struct plat_dsl_data { - int reset_bit_dsl; - int reset_bit_sar; -}; - -extern int ar7_cpu_clock, ar7_bus_clock, ar7_dsp_clock; - -static inline int ar7_is_titan(void) -{ - return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x24)) & 0xffff) == - AR7_CHIP_TITAN; -} - -static inline u16 ar7_chip_id(void) -{ - return ar7_is_titan() ? AR7_CHIP_TITAN : (readl((void *) - KSEG1ADDR(AR7_REGS_GPIO + 0x14)) & 0xffff); -} - -static inline u8 ar7_chip_rev(void) -{ - return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + (ar7_is_titan() ? 0x24 : - 0x14))) >> 16) & 0xff; -} - -static inline int ar7_cpu_freq(void) -{ - return ar7_cpu_clock; -} - -static inline int ar7_bus_freq(void) -{ - return ar7_bus_clock; -} - -static inline int ar7_vbus_freq(void) -{ - return ar7_bus_clock / 2; -} -#define ar7_cpmac_freq ar7_vbus_freq - -static inline int ar7_dsp_freq(void) -{ - return ar7_dsp_clock; -} - -static inline int ar7_has_high_cpmac(void) -{ - u16 chip_id = ar7_chip_id(); - switch (chip_id) { - case AR7_CHIP_7100: - case AR7_CHIP_7200: - return 0; - default: - return 1; - } -} -#define ar7_has_high_vlynq ar7_has_high_cpmac -#define ar7_has_second_uart ar7_has_high_cpmac - -static inline void ar7_device_enable(u32 bit) -{ - void *reset_reg = - (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL); - writel(readl(reset_reg) | (1 << bit), reset_reg); - mdelay(20); -} - -static inline void ar7_device_disable(u32 bit) -{ - void *reset_reg = - (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL); - writel(readl(reset_reg) & ~(1 << bit), reset_reg); - mdelay(20); -} - -static inline void ar7_device_reset(u32 bit) -{ - ar7_device_disable(bit); - ar7_device_enable(bit); -} - -static inline void ar7_device_on(u32 bit) -{ - void *power_reg = (void *)KSEG1ADDR(AR7_REGS_POWER); - writel(readl(power_reg) | (1 << bit), power_reg); - mdelay(20); -} - -static inline void ar7_device_off(u32 bit) -{ - void *power_reg = (void *)KSEG1ADDR(AR7_REGS_POWER); - writel(readl(power_reg) & ~(1 << bit), power_reg); - mdelay(20); -} - -#endif /* __AR7_H__ */ diff --git a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/gpio.h b/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/gpio.h deleted file mode 100644 index fde93bc7c..000000000 --- a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/gpio.h +++ /dev/null @@ -1,269 +0,0 @@ -/* - * Copyright (C) 2007 Florian Fainelli - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __AR7_GPIO_H__ -#define __AR7_GPIO_H__ -#include -#ifndef __AR7_TITAN_H__ -#include -#endif - -#define AR7_GPIO_MAX 32 -#define TITAN_GPIO_MAX 51 - -extern int gpio_request(unsigned gpio, const char *label); -extern void gpio_free(unsigned gpio); - -/* Common GPIO layer */ -static inline int gpio_get_value_ar7(unsigned gpio) -{ - void __iomem *gpio_in = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_INPUT); - - return readl(gpio_in) & (1 << gpio); -} - -static inline int gpio_get_value_titan(unsigned gpio) -{ - void __iomem *gpio_in0 = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_0); - void __iomem *gpio_in1 = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_1); - - return readl(gpio >> 5 ? gpio_in1 : gpio_in0) & (1 << (gpio & 0x1f)); -} - -static inline int gpio_get_value(unsigned gpio) -{ - return ar7_is_titan() ? gpio_get_value_titan(gpio) : - gpio_get_value_ar7(gpio); -} - -static inline void gpio_set_value_ar7(unsigned gpio, int value) -{ - void __iomem *gpio_out = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_OUTPUT); - unsigned tmp; - - tmp = readl(gpio_out) & ~(1 << gpio); - if (value) - tmp |= 1 << gpio; - writel(tmp, gpio_out); -} - -static inline void gpio_set_value_titan(unsigned gpio, int value) -{ - void __iomem *gpio_out0 = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_OUTPUT_0); - void __iomem *gpio_out1 = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_OUTPUT_1); - unsigned tmp; - - tmp = readl(gpio >> 5 ? gpio_out1 : gpio_out0) & ~(1 << (gpio & 0x1f)); - if (value) - tmp |= 1 << (gpio & 0x1f); - writel(tmp, gpio >> 5 ? gpio_out1 : gpio_out0); -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - if (ar7_is_titan()) - gpio_set_value_titan(gpio, value); - else - gpio_set_value_ar7(gpio, value); -} - -static inline int gpio_direction_input_ar7(unsigned gpio) -{ - void __iomem *gpio_dir = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR); - - if (gpio >= AR7_GPIO_MAX) - return -EINVAL; - - writel(readl(gpio_dir) | (1 << gpio), gpio_dir); - - return 0; -} - -static inline int gpio_direction_input_titan(unsigned gpio) -{ - void __iomem *gpio_dir0 = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_0); - void __iomem *gpio_dir1 = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_1); - - if (gpio >= TITAN_GPIO_MAX) - return -EINVAL; - - writel(readl(gpio >> 5 ? gpio_dir1 : gpio_dir0) | (1 << (gpio & 0x1f)), - gpio >> 5 ? gpio_dir1 : gpio_dir0); - - return 0; -} - -static inline int gpio_direction_input(unsigned gpio) -{ - return ar7_is_titan() ? gpio_direction_input_titan(gpio) : - gpio_direction_input_ar7(gpio); -} - -static inline int gpio_direction_output_ar7(unsigned gpio, int value) -{ - void __iomem *gpio_dir = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR); - - if (gpio >= AR7_GPIO_MAX) - return -EINVAL; - - gpio_set_value(gpio, value); - writel(readl(gpio_dir) & ~(1 << gpio), gpio_dir); - - return 0; -} - -static inline int gpio_direction_output_titan(unsigned gpio, int value) -{ - void __iomem *gpio_dir0 = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_0); - void __iomem *gpio_dir1 = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_DIR_1); - - if (gpio >= TITAN_GPIO_MAX) - return -EINVAL; - - gpio_set_value_titan(gpio, value); - writel(readl(gpio >> 5 ? gpio_dir1 : gpio_dir0) & ~(1 << - (gpio & 0x1f)), gpio >> 5 ? gpio_dir1 : gpio_dir0); - - return 0; -} - -static inline int gpio_direction_output(unsigned gpio, int value) -{ - return ar7_is_titan() ? gpio_direction_output_titan(gpio, value) : - gpio_direction_output_ar7(gpio, value); -} - -static inline int gpio_to_irq(unsigned gpio) -{ - return -EINVAL; -} - -static inline int irq_to_gpio(unsigned irq) -{ - return -EINVAL; -} - -/* Board specific GPIO functions */ -static inline int ar7_gpio_enable_ar7(unsigned gpio) -{ - void __iomem *gpio_en = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE); - - writel(readl(gpio_en) | (1 << gpio), gpio_en); - - return 0; -} - -static inline int ar7_gpio_enable_titan(unsigned gpio) -{ - void __iomem *gpio_en0 = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENBL_0); - void __iomem *gpio_en1 = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENBL_1); - - writel(readl(gpio >> 5 ? gpio_en1 : gpio_en0) | (1 << (gpio & 0x1f)), - gpio >> 5 ? gpio_en1 : gpio_en0); - - return 0; -} - -static inline int ar7_gpio_enable(unsigned gpio) -{ - return ar7_is_titan() ? ar7_gpio_enable_titan(gpio) : - ar7_gpio_enable_ar7(gpio); -} - -static inline int ar7_gpio_disable_ar7(unsigned gpio) -{ - void __iomem *gpio_en = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE); - - writel(readl(gpio_en) & ~(1 << gpio), gpio_en); - - return 0; -} - -static inline int ar7_gpio_disable_titan(unsigned gpio) -{ - void __iomem *gpio_en0 = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENBL_0); - void __iomem *gpio_en1 = - (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_ENBL_1); - - writel(readl(gpio >> 5 ? gpio_en1 : gpio_en0) & ~(1 << (gpio & 0x1f)), - gpio >> 5 ? gpio_en1 : gpio_en0); - - return 0; -} - -static inline int ar7_gpio_disable(unsigned gpio) -{ - return ar7_is_titan() ? ar7_gpio_disable_titan(gpio) : - ar7_gpio_disable_ar7(gpio); -} - -static inline int ar7_init_titan_variant( void ) -{ - /*UINT32 new_val;*/ - unsigned new_val; - - /* set GPIO 44 - 47 as input */ - /*PAL_sysGpioCtrl(const int, GPIO_PIN, GPIO_INPUT_PIN); */ - /*define titan_gpio_ctrl in titan.h*/ - titan_gpio_ctrl(44, GPIO_PIN, GPIO_INPUT_PIN); - titan_gpio_ctrl(45, GPIO_PIN, GPIO_INPUT_PIN); - titan_gpio_ctrl(46, GPIO_PIN, GPIO_INPUT_PIN); - titan_gpio_ctrl(47, GPIO_PIN, GPIO_INPUT_PIN); - - /* read GPIO to get Titan variant type */ - /*fix this*/ - titan_sysGpioInValue( &new_val, 1 ); - - new_val >>= 12; - new_val &= 0x0f; - - switch ( new_val ) - { - case TITAN_CHIP_1050: - case TITAN_CHIP_1055: - case TITAN_CHIP_1056: - case TITAN_CHIP_1060: - return new_val; - - default: - break; - } - /* In case we get an invalid value, return the default Titan chip */ - return TITAN_CHIP_1050; -} - -#include - -#endif diff --git a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/irq.h b/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/irq.h deleted file mode 100644 index 39e9757e3..000000000 --- a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/irq.h +++ /dev/null @@ -1,16 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Shamelessly copied from asm-mips/mach-emma2rh/ - * Copyright (C) 2003 by Ralf Baechle - */ -#ifndef __ASM_AR7_IRQ_H -#define __ASM_AR7_IRQ_H - -#define NR_IRQS 256 - -#include_next - -#endif /* __ASM_AR7_IRQ_H */ diff --git a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/prom.h b/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/prom.h deleted file mode 100644 index 55f5939db..000000000 --- a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/prom.h +++ /dev/null @@ -1,26 +0,0 @@ -/* - * Copyright (C) 2006, 2007 Florian Fainelli - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __PROM_H__ -#define __PROM_H__ - -extern char *prom_getenv(const char *name); -extern void prom_printf(const char *fmt, ...) __attribute__((format(printf, 1, 2))); -extern void prom_meminit(void); - -#endif /* __PROM_H__ */ diff --git a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/spaces.h b/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/spaces.h deleted file mode 100644 index f4d123792..000000000 --- a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/spaces.h +++ /dev/null @@ -1,32 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle - * Copyright (C) 2000, 2002 Maciej W. Rozycki - * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc. - */ -#ifndef _ASM_AR7_SPACES_H -#define _ASM_AR7_SPACES_H - -#define CAC_BASE 0x80000000 -#define IO_BASE 0xa0000000 -#define UNCAC_BASE 0xa0000000 -#define MAP_BASE 0xc0000000 - -/* - * This handles the memory map. - * We handle pages at KSEG0 for kernels with 32 bit address space. - */ -#define PAGE_OFFSET 0x94000000UL -#define PHYS_OFFSET 0x14000000UL - -/* - * Memory above this physical address will be considered highmem. - */ -#ifndef HIGHMEM_START -#define HIGHMEM_START 0x40000000UL -#endif - -#endif /* __ASM_AR7_SPACES_H */ diff --git a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/titan.h b/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/titan.h deleted file mode 100644 index 0c2a51fde..000000000 --- a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/titan.h +++ /dev/null @@ -1,178 +0,0 @@ -/* - * Copyright (C) 2008 Stanley Pinchak - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ -#ifndef __AR7_TITAN_H__ -#define __AR7_TITAN_H__ - -#ifndef __AR7_GPIO_H__ -#include -#endif - -typedef enum TITAN_GPIO_PIN_MODE_tag -{ - FUNCTIONAL_PIN = 0, - GPIO_PIN = 1 -} TITAN_GPIO_PIN_MODE_T; - -typedef enum TITAN_GPIO_PIN_DIRECTION_tag -{ - GPIO_OUTPUT_PIN = 0, - GPIO_INPUT_PIN = 1 -} TITAN_GPIO_PIN_DIRECTION_T; - -/********************************************************************** - * GPIO Control - **********************************************************************/ - -typedef struct -{ - int pinSelReg; - int shift; - int func; - -} GPIO_CFG; - -static GPIO_CFG gptable[]= { - /* PIN_SEL_REG, START_BIT, GPIO_CFG_MUX_VALUE */ - {4,24,1}, - {4,26,1}, - {4,28,1}, - {4,30,1}, - {5,6,1}, - {5,8,1}, - {5,10,1}, - {5,12,1}, - {7,14,3}, - {7,16,3}, - {7,18,3}, - {7,20,3}, - {7,22,3}, - {7,26,3}, - {7,28,3}, - {7,30,3}, - {8,0,3}, - {8,2,3}, - {8,4,3}, - {8,10,3}, - {8,14,3}, - {8,16,3}, - {8,18,3}, - {8,20,3}, - {9,8,3}, - {9,10,3}, - {9,12,3}, - {9,14,3}, - {9,18,3}, - {9,20,3}, - {9,24,3}, - {9,26,3}, - {9,28,3}, - {9,30,3}, - {10,0,3}, - {10,2,3}, - {10,8,3}, - {10,10,3}, - {10,12,3}, - {10,14,3}, - {13,12,3}, - {13,14,3}, - {13,16,3}, - {13,18,3}, - {13,24,3}, - {13,26,3}, - {13,28,3}, - {13,30,3}, - {14,2,3}, - {14,6,3}, - {14,8,3}, - {14,12,3} -}; - -typedef struct -{ - volatile unsigned int reg[21]; -} -PIN_SEL_REG_ARRAY_T; - -typedef struct -{ - unsigned int data_in [2]; - unsigned int data_out[2]; - unsigned int dir[2]; - unsigned int enable[2]; - -} TITAN_GPIO_CONTROL_T; - -#define AVALANCHE_PIN_SEL_BASE 0xA861160C /*replace with KSEG1ADDR()*/ - -static inline int titan_gpio_ctrl(unsigned int gpio_pin, TITAN_GPIO_PIN_MODE_T pin_mode, - TITAN_GPIO_PIN_DIRECTION_T pin_direction) -{ - int reg_index = 0; - int mux_status; - GPIO_CFG gpio_cfg; - volatile PIN_SEL_REG_ARRAY_T *pin_sel_array = (PIN_SEL_REG_ARRAY_T*) AVALANCHE_PIN_SEL_BASE; - volatile TITAN_GPIO_CONTROL_T *gpio_cntl = (TITAN_GPIO_CONTROL_T*) KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_0); - - if (gpio_pin > 51 ) - return(-1); - - gpio_cfg = gptable[gpio_pin]; - mux_status = (pin_sel_array->reg[gpio_cfg.pinSelReg - 1] >> gpio_cfg.shift) & 0x3; - if(!((mux_status == 0 /* tri-stated */ ) || (mux_status == gpio_cfg.func /*GPIO functionality*/))) - { - return(-1); /* Pin have been configured for non GPIO funcs. */ - } - - /* Set the pin to be used as GPIO. */ - pin_sel_array->reg[gpio_cfg.pinSelReg - 1] |= ((gpio_cfg.func & 0x3) << gpio_cfg.shift); - - /* Check whether gpio refers to the first GPIO reg or second. */ - if(gpio_pin > 31) - { - reg_index = 1; - gpio_pin -= 32; - } - - if(pin_mode) - gpio_cntl->enable[reg_index] |= (1 << gpio_pin); /* Enable */ - else - gpio_cntl->enable[reg_index] &= ~(1 << gpio_pin); - - if(pin_direction) - gpio_cntl->dir[reg_index] |= (1 << gpio_pin); /* Input */ - else - gpio_cntl->dir[reg_index] &= ~(1 << gpio_pin); - - return(0); - -}/* end of function titan_gpio_ctrl */ - -static inline int titan_sysGpioInValue(unsigned int *in_val, unsigned int reg_index) -{ - volatile TITAN_GPIO_CONTROL_T *gpio_cntl = (TITAN_GPIO_CONTROL_T*) KSEG1ADDR(AR7_REGS_GPIO + TITAN_GPIO_INPUT_0); - - if(reg_index > 1) - return (-1); - - *in_val = gpio_cntl->data_in[reg_index]; - - return (0); -} - - -#endif diff --git a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/war.h b/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/war.h deleted file mode 100644 index 4a2b7986b..000000000 --- a/target/linux/ar7/files-2.6.30/include/asm-mips/ar7/war.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2002, 2004, 2007 by Ralf Baechle - */ -#ifndef __ASM_MIPS_MACH_BCM947XX_WAR_H -#define __ASM_MIPS_MACH_BCM947XX_WAR_H - -#define R4600_V1_INDEX_ICACHEOP_WAR 0 -#define R4600_V1_HIT_CACHEOP_WAR 0 -#define R4600_V2_HIT_CACHEOP_WAR 0 -#define R5432_CP0_INTERRUPT_WAR 0 -#define BCM1250_M3_WAR 0 -#define SIBYTE_1956_WAR 0 -#define MIPS4K_ICACHE_REFILL_WAR 0 -#define MIPS_CACHE_SYNC_WAR 0 -#define TX49XX_ICACHE_INDEX_INV_WAR 0 -#define RM9000_CDEX_SMP_WAR 0 -#define ICACHE_REFILLS_WORKAROUND_WAR 0 -#define R10000_LLSC_WAR 0 -#define MIPS34K_MISSED_ITLB_WAR 0 - -#endif /* __ASM_MIPS_MACH_BCM947XX_WAR_H */ diff --git a/target/linux/ar7/files-2.6.30/include/linux/vlynq.h b/target/linux/ar7/files-2.6.30/include/linux/vlynq.h deleted file mode 100644 index 8f6a95882..000000000 --- a/target/linux/ar7/files-2.6.30/include/linux/vlynq.h +++ /dev/null @@ -1,161 +0,0 @@ -/* - * Copyright (C) 2006, 2007 Eugene Konev - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#ifndef __VLYNQ_H__ -#define __VLYNQ_H__ - -#include -#include -#include - -#define VLYNQ_NUM_IRQS 32 - -struct vlynq_mapping { - u32 size; - u32 offset; -}; - -enum vlynq_divisor { - vlynq_div_auto = 0, - vlynq_ldiv1, - vlynq_ldiv2, - vlynq_ldiv3, - vlynq_ldiv4, - vlynq_ldiv5, - vlynq_ldiv6, - vlynq_ldiv7, - vlynq_ldiv8, - vlynq_rdiv1, - vlynq_rdiv2, - vlynq_rdiv3, - vlynq_rdiv4, - vlynq_rdiv5, - vlynq_rdiv6, - vlynq_rdiv7, - vlynq_rdiv8, - vlynq_div_external -}; - -struct vlynq_device_id { - u32 id; - enum vlynq_divisor divisor; - unsigned long driver_data; -}; - -struct vlynq_regs; -struct vlynq_device { - u32 id, dev_id; - int local_irq; - int remote_irq; - enum vlynq_divisor divisor; - u32 regs_start, regs_end; - u32 mem_start, mem_end; - u32 irq_start, irq_end; - int irq; - int enabled; - struct vlynq_regs *local; - struct vlynq_regs *remote; - struct device dev; -}; - -struct vlynq_driver { - char *name; - struct vlynq_device_id *id_table; - int (*probe)(struct vlynq_device *dev, struct vlynq_device_id *id); - void (*remove)(struct vlynq_device *dev); - struct device_driver driver; -}; - -struct plat_vlynq_ops { - int (*on)(struct vlynq_device *dev); - void (*off)(struct vlynq_device *dev); -}; - -static inline struct vlynq_driver *to_vlynq_driver(struct device_driver *drv) -{ - return container_of(drv, struct vlynq_driver, driver); -} - -static inline struct vlynq_device *to_vlynq_device(struct device *device) -{ - return container_of(device, struct vlynq_device, dev); -} - -extern struct bus_type vlynq_bus_type; - -extern int __vlynq_register_driver(struct vlynq_driver *driver, - struct module *owner); - -static inline int vlynq_register_driver(struct vlynq_driver *driver) -{ - return __vlynq_register_driver(driver, THIS_MODULE); -} - -static inline void *vlynq_get_drvdata(struct vlynq_device *dev) -{ - return dev_get_drvdata(&dev->dev); -} - -static inline void vlynq_set_drvdata(struct vlynq_device *dev, void *data) -{ - dev_set_drvdata(&dev->dev, data); -} - -static inline u32 vlynq_mem_start(struct vlynq_device *dev) -{ - return dev->mem_start; -} - -static inline u32 vlynq_mem_end(struct vlynq_device *dev) -{ - return dev->mem_end; -} - -static inline u32 vlynq_mem_len(struct vlynq_device *dev) -{ - return dev->mem_end - dev->mem_start + 1; -} - -static inline int vlynq_virq_to_irq(struct vlynq_device *dev, int virq) -{ - int irq = dev->irq_start + virq; - if ((irq < dev->irq_start) || (irq > dev->irq_end)) - return -EINVAL; - - return irq; -} - -static inline int vlynq_irq_to_virq(struct vlynq_device *dev, int irq) -{ - if ((irq < dev->irq_start) || (irq > dev->irq_end)) - return -EINVAL; - - return irq - dev->irq_start; -} - -extern void vlynq_unregister_driver(struct vlynq_driver *driver); -extern int vlynq_enable_device(struct vlynq_device *dev); -extern void vlynq_disable_device(struct vlynq_device *dev); -extern int vlynq_set_local_mapping(struct vlynq_device *dev, u32 tx_offset, - struct vlynq_mapping *mapping); -extern int vlynq_set_remote_mapping(struct vlynq_device *dev, u32 tx_offset, - struct vlynq_mapping *mapping); -extern int vlynq_set_local_irq(struct vlynq_device *dev, int virq); -extern int vlynq_set_remote_irq(struct vlynq_device *dev, int virq); - -#endif /* __VLYNQ_H__ */ diff --git a/target/linux/ar7/image/Makefile b/target/linux/ar7/image/Makefile index 90f0d847b..3ec42626b 100644 --- a/target/linux/ar7/image/Makefile +++ b/target/linux/ar7/image/Makefile @@ -80,6 +80,7 @@ define Image/Build cat $(KDIR)/root.$(1) >> $(BIN_DIR)/openwrt-$(BOARD)-$(1).bin $(call prepare_generic_squashfs,$(BIN_DIR)/openwrt-$(BOARD)-$(1).bin) $(call Image/Build/CyberTAN,$(1),AG1B,AG1B,$(1)) + $(call Image/Build/CyberTAN,$(1),AG1A,AG1A,$(1)) $(call Image/Build/CyberTAN,$(1),WA21,WA21,$(1)) $(call Image/Build/CyberTAN,$(1),WA22,WA22,$(1)) $(call Image/Build/CyberTAN,$(1),WAG2,WAG2,$(1)) diff --git a/target/linux/ar7/patches-2.6.30/100-board_support.patch b/target/linux/ar7/patches-2.6.30/100-board_support.patch deleted file mode 100644 index 079f9c0a8..000000000 --- a/target/linux/ar7/patches-2.6.30/100-board_support.patch +++ /dev/null @@ -1,86 +0,0 @@ ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -19,6 +19,24 @@ choice - prompt "System type" - default SGI_IP22 - -+config AR7 -+ bool "Texas Instruments AR7" -+ select BOOT_ELF32 -+ select DMA_NONCOHERENT -+ select CEVT_R4K -+ select CSRC_R4K -+ select IRQ_CPU -+ select NO_EXCEPT_FILL -+ select SWAP_IO_SPACE -+ select SYS_HAS_CPU_MIPS32_R1 -+ select SYS_HAS_EARLY_PRINTK -+ select SYS_SUPPORTS_32BIT_KERNEL -+ select SYS_SUPPORTS_KGDB -+ select SYS_SUPPORTS_LITTLE_ENDIAN -+ select SYS_SUPPORTS_BIG_ENDIAN -+ select GENERIC_GPIO -+ select GENERIC_HARDIRQS_NO__DO_IRQ -+ - config MACH_ALCHEMY - bool "Alchemy processor based machines" - ---- a/arch/mips/kernel/traps.c -+++ b/arch/mips/kernel/traps.c -@@ -1256,9 +1256,22 @@ void *set_except_vector(int n, void *add - - exception_handlers[n] = handler; - if (n == 0 && cpu_has_divec) { -- *(u32 *)(ebase + 0x200) = 0x08000000 | -- (0x03ffffff & (handler >> 2)); -- local_flush_icache_range(ebase + 0x200, ebase + 0x204); -+ if ((handler ^ (ebase + 4)) & 0xfc000000) { -+ /* lui k0, 0x0000 */ -+ *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16); -+ /* ori k0, 0x0000 */ -+ *(u32 *)(ebase + 0x204) = -+ 0x375a0000 | (handler & 0xffff); -+ /* jr k0 */ -+ *(u32 *)(ebase + 0x208) = 0x03400008; -+ /* nop */ -+ *(u32 *)(ebase + 0x20C) = 0x00000000; -+ flush_icache_range(ebase + 0x200, ebase + 0x210); -+ } else { -+ *(u32 *)(ebase + 0x200) = -+ 0x08000000 | (0x03ffffff & (handler >> 2)); -+ flush_icache_range(ebase + 0x200, ebase + 0x204); -+ } - } - return (void *)old_handler; - } ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -174,6 +174,13 @@ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/s - # - - # -+# Texas Instruments AR7 -+# -+core-$(CONFIG_AR7) += arch/mips/ar7/ -+cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7 -+load-$(CONFIG_AR7) += 0xffffffff94100000 -+ -+# - # Acer PICA 61, Mips Magnum 4000 and Olivetti M700. - # - core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/ ---- a/arch/mips/include/asm/page.h -+++ b/arch/mips/include/asm/page.h -@@ -185,8 +185,10 @@ typedef struct { unsigned long pgprot; } - #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - --#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE) --#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) -+#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \ -+ PHYS_OFFSET) -+#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \ -+ PHYS_OFFSET) - - #include - #include diff --git a/target/linux/ar7/patches-2.6.30/110-flash.patch b/target/linux/ar7/patches-2.6.30/110-flash.patch deleted file mode 100644 index 7311a6734..000000000 --- a/target/linux/ar7/patches-2.6.30/110-flash.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/drivers/mtd/maps/physmap.c -+++ b/drivers/mtd/maps/physmap.c -@@ -80,7 +80,7 @@ static const char *rom_probe_types[] = { - "map_rom", - NULL }; - #ifdef CONFIG_MTD_PARTITIONS --static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL }; -+static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "ar7part", NULL }; - #endif - - static int physmap_flash_probe(struct platform_device *dev) diff --git a/target/linux/ar7/patches-2.6.30/120-gpio_chrdev.patch b/target/linux/ar7/patches-2.6.30/120-gpio_chrdev.patch deleted file mode 100644 index fa61e5ccf..000000000 --- a/target/linux/ar7/patches-2.6.30/120-gpio_chrdev.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/drivers/char/Kconfig -+++ b/drivers/char/Kconfig -@@ -974,6 +974,15 @@ config MWAVE - To compile this driver as a module, choose M here: the - module will be called mwave. - -+config AR7_GPIO -+ tristate "TI AR7 GPIO Support" -+ depends on AR7 -+ help -+ Give userspace access to the GPIO pins on the Texas Instruments AR7 -+ processors. -+ -+ If compiled as a module, it will be called ar7_gpio. -+ - config SCx200_GPIO - tristate "NatSemi SCx200 GPIO Support" - depends on SCx200 ---- a/drivers/char/Makefile -+++ b/drivers/char/Makefile -@@ -90,6 +90,7 @@ obj-$(CONFIG_HW_RANDOM) += hw_random/ - obj-$(CONFIG_PPDEV) += ppdev.o - obj-$(CONFIG_NWBUTTON) += nwbutton.o - obj-$(CONFIG_NWFLASH) += nwflash.o -+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o - obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o - obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o - obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o diff --git a/target/linux/ar7/patches-2.6.30/130-vlynq.patch b/target/linux/ar7/patches-2.6.30/130-vlynq.patch deleted file mode 100644 index 12eb53846..000000000 --- a/target/linux/ar7/patches-2.6.30/130-vlynq.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/drivers/Kconfig -+++ b/drivers/Kconfig -@@ -104,6 +104,8 @@ source "drivers/auxdisplay/Kconfig" - - source "drivers/uio/Kconfig" - -+source "drivers/vlynq/Kconfig" -+ - source "drivers/xen/Kconfig" - - source "drivers/staging/Kconfig" ---- a/drivers/Makefile -+++ b/drivers/Makefile -@@ -103,6 +103,7 @@ obj-$(CONFIG_DCA) += dca/ - obj-$(CONFIG_HID) += hid/ - obj-$(CONFIG_PPC_PS3) += ps3/ - obj-$(CONFIG_OF) += of/ -+obj-$(CONFIG_VLYNQ) += vlynq/ - obj-$(CONFIG_SSB) += ssb/ - obj-$(CONFIG_VIRTIO) += virtio/ - obj-$(CONFIG_STAGING) += staging/ diff --git a/target/linux/ar7/patches-2.6.30/131-vlynq_fixes.patch b/target/linux/ar7/patches-2.6.30/131-vlynq_fixes.patch deleted file mode 100644 index 1f11627d6..000000000 --- a/target/linux/ar7/patches-2.6.30/131-vlynq_fixes.patch +++ /dev/null @@ -1,548 +0,0 @@ ---- a/drivers/vlynq/vlynq.c -+++ b/drivers/vlynq/vlynq.c -@@ -14,6 +14,9 @@ - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA -+ * -+ * Parts of the VLYNQ specification can be found here: -+ * http://www.ti.com/litv/pdf/sprue36a - */ - - #include -@@ -25,7 +28,6 @@ - #include - #include - #include --#include - #include - #include - -@@ -73,15 +75,11 @@ struct vlynq_regs { - u32 int_device[8]; - }; - --#define vlynq_reg_read(reg) readl(&(reg)) --#define vlynq_reg_write(reg, val) writel(val, &(reg)) -- --static int __vlynq_enable_device(struct vlynq_device *dev); -- --#ifdef VLYNQ_DEBUG -+#ifdef CONFIG_VLYNQ_DEBUG - static void vlynq_dump_regs(struct vlynq_device *dev) - { - int i; -+ - printk(KERN_DEBUG "VLYNQ local=%p remote=%p\n", - dev->local, dev->remote); - for (i = 0; i < 32; i++) { -@@ -95,20 +93,23 @@ static void vlynq_dump_regs(struct vlynq - static void vlynq_dump_mem(u32 *base, int count) - { - int i; -+ - for (i = 0; i < (count + 3) / 4; i++) { -- if (i % 4 == 0) printk(KERN_DEBUG "\nMEM[0x%04x]:", i * 4); -+ if (i % 4 == 0) -+ printk(KERN_DEBUG "\nMEM[0x%04x]:", i * 4); - printk(KERN_DEBUG " 0x%08x", *(base + i)); - } - printk(KERN_DEBUG "\n"); - } - #endif - --int vlynq_linked(struct vlynq_device *dev) -+/* Check the VLYNQ link status with a given device */ -+static int vlynq_linked(struct vlynq_device *dev) - { - int i; - - for (i = 0; i < 100; i++) -- if (vlynq_reg_read(dev->local->status) & VLYNQ_STATUS_LINK) -+ if (readl(&dev->local->status) & VLYNQ_STATUS_LINK) - return 1; - else - cpu_relax(); -@@ -118,17 +119,15 @@ int vlynq_linked(struct vlynq_device *de - - static void vlynq_reset(struct vlynq_device *dev) - { -- vlynq_reg_write(dev->local->control, -- vlynq_reg_read(dev->local->control) | -- VLYNQ_CTRL_RESET); -+ writel(readl(&dev->local->control) | VLYNQ_CTRL_RESET, -+ &dev->local->control); - - /* Wait for the devices to finish resetting */ - msleep(5); - - /* Remove reset bit */ -- vlynq_reg_write(dev->local->control, -- vlynq_reg_read(dev->local->control) & -- ~VLYNQ_CTRL_RESET); -+ writel(readl(&dev->local->control) & ~VLYNQ_CTRL_RESET, -+ &dev->local->control); - - /* Give some time for the devices to settle */ - msleep(5); -@@ -142,9 +141,9 @@ static void vlynq_irq_unmask(unsigned in - - BUG_ON(!dev); - virq = irq - dev->irq_start; -- val = vlynq_reg_read(dev->remote->int_device[virq >> 2]); -+ val = readl(&dev->remote->int_device[virq >> 2]); - val |= (VINT_ENABLE | virq) << VINT_OFFSET(virq); -- vlynq_reg_write(dev->remote->int_device[virq >> 2], val); -+ writel(val, &dev->remote->int_device[virq >> 2]); - } - - static void vlynq_irq_mask(unsigned int irq) -@@ -155,9 +154,9 @@ static void vlynq_irq_mask(unsigned int - - BUG_ON(!dev); - virq = irq - dev->irq_start; -- val = vlynq_reg_read(dev->remote->int_device[virq >> 2]); -+ val = readl(&dev->remote->int_device[virq >> 2]); - val &= ~(VINT_ENABLE << VINT_OFFSET(virq)); -- vlynq_reg_write(dev->remote->int_device[virq >> 2], val); -+ writel(val, &dev->remote->int_device[virq >> 2]); - } - - static int vlynq_irq_type(unsigned int irq, unsigned int flow_type) -@@ -168,7 +167,7 @@ static int vlynq_irq_type(unsigned int i - - BUG_ON(!dev); - virq = irq - dev->irq_start; -- val = vlynq_reg_read(dev->remote->int_device[virq >> 2]); -+ val = readl(&dev->remote->int_device[virq >> 2]); - switch (flow_type & IRQ_TYPE_SENSE_MASK) { - case IRQ_TYPE_EDGE_RISING: - case IRQ_TYPE_EDGE_FALLING: -@@ -187,28 +186,30 @@ static int vlynq_irq_type(unsigned int i - default: - return -EINVAL; - } -- vlynq_reg_write(dev->remote->int_device[virq >> 2], val); -+ writel(val, &dev->remote->int_device[virq >> 2]); - return 0; - } - - static void vlynq_local_ack(unsigned int irq) - { - struct vlynq_device *dev = get_irq_chip_data(irq); -- u32 status = vlynq_reg_read(dev->local->status); -- if (printk_ratelimit()) -- printk(KERN_DEBUG "%s: local status: 0x%08x\n", -- dev->dev.bus_id, status); -- vlynq_reg_write(dev->local->status, status); -+ -+ u32 status = readl(&dev->local->status); -+ -+ pr_debug("%s: local status: 0x%08x\n", -+ dev_name(&dev->dev), status); -+ writel(status, &dev->local->status); - } - - static void vlynq_remote_ack(unsigned int irq) - { - struct vlynq_device *dev = get_irq_chip_data(irq); -- u32 status = vlynq_reg_read(dev->remote->status); -- if (printk_ratelimit()) -- printk(KERN_DEBUG "%s: remote status: 0x%08x\n", -- dev->dev.bus_id, status); -- vlynq_reg_write(dev->remote->status, status); -+ -+ u32 status = readl(&dev->remote->status); -+ -+ pr_debug("%s: remote status: 0x%08x\n", -+ dev_name(&dev->dev), status); -+ writel(status, &dev->remote->status); - } - - static irqreturn_t vlynq_irq(int irq, void *dev_id) -@@ -217,8 +218,8 @@ static irqreturn_t vlynq_irq(int irq, vo - u32 status; - int virq = 0; - -- status = vlynq_reg_read(dev->local->int_status); -- vlynq_reg_write(dev->local->int_status, status); -+ status = readl(&dev->local->int_status); -+ writel(status, &dev->local->int_status); - - if (unlikely(!status)) - spurious_interrupt(); -@@ -262,28 +263,28 @@ static int vlynq_setup_irq(struct vlynq_ - if (dev->local_irq == dev->remote_irq) { - printk(KERN_ERR - "%s: local vlynq irq should be different from remote\n", -- dev->dev.bus_id); -+ dev_name(&dev->dev)); - return -EINVAL; - } - - /* Clear local and remote error bits */ -- vlynq_reg_write(dev->local->status, vlynq_reg_read(dev->local->status)); -- vlynq_reg_write(dev->remote->status, -- vlynq_reg_read(dev->remote->status)); -+ writel(readl(&dev->local->status), &dev->local->status); -+ writel(readl(&dev->remote->status), &dev->remote->status); - - /* Now setup interrupts */ - val = VLYNQ_CTRL_INT_VECTOR(dev->local_irq); - val |= VLYNQ_CTRL_INT_ENABLE | VLYNQ_CTRL_INT_LOCAL | - VLYNQ_CTRL_INT2CFG; -- val |= vlynq_reg_read(dev->local->control); -- vlynq_reg_write(dev->local->int_ptr, VLYNQ_INT_OFFSET); -- vlynq_reg_write(dev->local->control, val); -+ val |= readl(&dev->local->control); -+ writel(VLYNQ_INT_OFFSET, &dev->local->int_ptr); -+ writel(val, &dev->local->control); - - val = VLYNQ_CTRL_INT_VECTOR(dev->remote_irq); - val |= VLYNQ_CTRL_INT_ENABLE; -- val |= vlynq_reg_read(dev->remote->control); -- vlynq_reg_write(dev->remote->int_ptr, VLYNQ_INT_OFFSET); -- vlynq_reg_write(dev->remote->control, val); -+ val |= readl(&dev->remote->control); -+ writel(VLYNQ_INT_OFFSET, &dev->remote->int_ptr); -+ writel(val, &dev->remote->int_ptr); -+ writel(val, &dev->remote->control); - - for (i = dev->irq_start; i <= dev->irq_end; i++) { - virq = i - dev->irq_start; -@@ -299,12 +300,13 @@ static int vlynq_setup_irq(struct vlynq_ - set_irq_chip_and_handler(i, &vlynq_irq_chip, - handle_simple_irq); - set_irq_chip_data(i, dev); -- vlynq_reg_write(dev->remote->int_device[virq >> 2], 0); -+ writel(0, &dev->remote->int_device[virq >> 2]); - } - } - - if (request_irq(dev->irq, vlynq_irq, IRQF_SHARED, "vlynq", dev)) { -- printk(KERN_ERR "%s: request_irq failed\n", dev->dev.bus_id); -+ printk(KERN_ERR "%s: request_irq failed\n", -+ dev_name(&dev->dev)); - return -EAGAIN; - } - -@@ -328,11 +330,11 @@ static int vlynq_device_match(struct dev - if (ids->id == vdev->dev_id) { - vdev->divisor = ids->divisor; - vlynq_set_drvdata(vdev, ids); -- printk(KERN_INFO "Driver found for VLYNQ " \ -+ printk(KERN_INFO "Driver found for VLYNQ " - "device: %08x\n", vdev->dev_id); - return 1; - } -- printk(KERN_DEBUG "Not using the %08x VLYNQ device's driver" \ -+ printk(KERN_DEBUG "Not using the %08x VLYNQ device's driver" - " for VLYNQ device: %08x\n", ids->id, vdev->dev_id); - ids++; - } -@@ -346,8 +348,7 @@ static int vlynq_device_probe(struct dev - struct vlynq_device_id *id = vlynq_get_drvdata(vdev); - int result = -ENODEV; - -- get_device(dev); -- if (drv && drv->probe) -+ if (drv->probe) - result = drv->probe(vdev, id); - if (result) - put_device(dev); -@@ -357,9 +358,10 @@ static int vlynq_device_probe(struct dev - static int vlynq_device_remove(struct device *dev) - { - struct vlynq_driver *drv = to_vlynq_driver(dev->driver); -- if (drv && drv->remove) -+ -+ if (drv->remove) - drv->remove(to_vlynq_device(dev)); -- put_device(dev); -+ - return 0; - } - -@@ -377,6 +379,14 @@ void vlynq_unregister_driver(struct vlyn - } - EXPORT_SYMBOL(vlynq_unregister_driver); - -+/* -+ * A VLYNQ remote device can clock the VLYNQ bus master -+ * using a dedicated clock line. In that case, both the -+ * remove device and the bus master should have the same -+ * serial clock dividers configured. Iterate through the -+ * 8 possible dividers until we actually link with the -+ * device. -+ */ - static int __vlynq_try_remote(struct vlynq_device *dev) - { - int i; -@@ -389,21 +399,21 @@ static int __vlynq_try_remote(struct vly - if (!vlynq_linked(dev)) - break; - -- vlynq_reg_write(dev->remote->control, -- (vlynq_reg_read(dev->remote->control) & -+ writel((readl(&dev->remote->control) & - ~VLYNQ_CTRL_CLOCK_MASK) | - VLYNQ_CTRL_CLOCK_INT | -- VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1)); -- vlynq_reg_write(dev->local->control, -- ((vlynq_reg_read(dev->local->control) -+ VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1), -+ &dev->remote->control); -+ writel((readl(&dev->local->control) - & ~(VLYNQ_CTRL_CLOCK_INT | - VLYNQ_CTRL_CLOCK_MASK)) | -- VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1))); -+ VLYNQ_CTRL_CLOCK_DIV(i - vlynq_rdiv1), -+ &dev->local->control); - - if (vlynq_linked(dev)) { - printk(KERN_DEBUG - "%s: using remote clock divisor %d\n", -- dev->dev.bus_id, i - vlynq_rdiv1 + 1); -+ dev_name(&dev->dev), i - vlynq_rdiv1 + 1); - dev->divisor = i; - return 0; - } else { -@@ -414,26 +424,33 @@ static int __vlynq_try_remote(struct vly - return -ENODEV; - } - -+/* -+ * A VLYNQ remote device can be clocked by the VLYNQ bus -+ * master using a dedicated clock line. In that case, only -+ * the bus master configures the serial clock divider. -+ * Iterate through the 8 possible dividers until we -+ * actually get a link with the device. -+ */ - static int __vlynq_try_local(struct vlynq_device *dev) - { - int i; -- -+ - vlynq_reset(dev); - - for (i = dev->dev_id ? vlynq_ldiv2 : vlynq_ldiv8; dev->dev_id ? - i <= vlynq_ldiv8 : i >= vlynq_ldiv2; - dev->dev_id ? i++ : i--) { - -- vlynq_reg_write(dev->local->control, -- (vlynq_reg_read(dev->local->control) & -+ writel((readl(&dev->local->control) & - ~VLYNQ_CTRL_CLOCK_MASK) | - VLYNQ_CTRL_CLOCK_INT | -- VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1)); -+ VLYNQ_CTRL_CLOCK_DIV(i - vlynq_ldiv1), -+ &dev->local->control); - - if (vlynq_linked(dev)) { - printk(KERN_DEBUG - "%s: using local clock divisor %d\n", -- dev->dev.bus_id, i - vlynq_ldiv1 + 1); -+ dev_name(&dev->dev), i - vlynq_ldiv1 + 1); - dev->divisor = i; - return 0; - } else { -@@ -444,27 +461,33 @@ static int __vlynq_try_local(struct vlyn - return -ENODEV; - } - -+/* -+ * When using external clocking method, serial clock -+ * is supplied by an external oscillator, therefore we -+ * should mask the local clock bit in the clock control -+ * register for both the bus master and the remote device. -+ */ - static int __vlynq_try_external(struct vlynq_device *dev) - { - vlynq_reset(dev); - if (!vlynq_linked(dev)) - return -ENODEV; - -- vlynq_reg_write(dev->remote->control, -- (vlynq_reg_read(dev->remote->control) & -- ~VLYNQ_CTRL_CLOCK_INT)); -- -- vlynq_reg_write(dev->local->control, -- (vlynq_reg_read(dev->local->control) & -- ~VLYNQ_CTRL_CLOCK_INT)); -+ writel((readl(&dev->remote->control) & -+ ~VLYNQ_CTRL_CLOCK_INT), -+ &dev->remote->control); -+ -+ writel((readl(&dev->local->control) & -+ ~VLYNQ_CTRL_CLOCK_INT), -+ &dev->local->control); - - if (vlynq_linked(dev)) { - printk(KERN_DEBUG "%s: using external clock\n", -- dev->dev.bus_id); -+ dev_name(&dev->dev)); - dev->divisor = vlynq_div_external; - return 0; - } -- -+ - return -ENODEV; - } - -@@ -481,10 +504,10 @@ static int __vlynq_enable_device(struct - case vlynq_div_external: - case vlynq_div_auto: - /* When the device is brought from reset it should have clock -- generation negotiated by hardware. -- Check which device is generating clocks and perform setup -- accordingly */ -- if (vlynq_linked(dev) && vlynq_reg_read(dev->remote->control) & -+ * generation negotiated by hardware. -+ * Check which device is generating clocks and perform setup -+ * accordingly */ -+ if (vlynq_linked(dev) && readl(&dev->remote->control) & - VLYNQ_CTRL_CLOCK_INT) { - if (!__vlynq_try_remote(dev) || - !__vlynq_try_local(dev) || -@@ -497,31 +520,43 @@ static int __vlynq_enable_device(struct - return 0; - } - break; -- case vlynq_ldiv1: case vlynq_ldiv2: case vlynq_ldiv3: case vlynq_ldiv4: -- case vlynq_ldiv5: case vlynq_ldiv6: case vlynq_ldiv7: case vlynq_ldiv8: -- vlynq_reg_write(dev->local->control, -- VLYNQ_CTRL_CLOCK_INT | -- VLYNQ_CTRL_CLOCK_DIV(dev->divisor - -- vlynq_ldiv1)); -- vlynq_reg_write(dev->remote->control, 0); -+ case vlynq_ldiv1: -+ case vlynq_ldiv2: -+ case vlynq_ldiv3: -+ case vlynq_ldiv4: -+ case vlynq_ldiv5: -+ case vlynq_ldiv6: -+ case vlynq_ldiv7: -+ case vlynq_ldiv8: -+ writel(VLYNQ_CTRL_CLOCK_INT | -+ VLYNQ_CTRL_CLOCK_DIV(dev->divisor - -+ vlynq_ldiv1), &dev->local->control); -+ writel(0, &dev->remote->control); - if (vlynq_linked(dev)) { - printk(KERN_DEBUG -- "%s: using local clock divisor %d\n", -- dev->dev.bus_id, dev->divisor - vlynq_ldiv1 + 1); -+ "%s: using local clock divisor %d\n", -+ dev_name(&dev->dev), -+ dev->divisor - vlynq_ldiv1 + 1); - return 0; - } - break; -- case vlynq_rdiv1: case vlynq_rdiv2: case vlynq_rdiv3: case vlynq_rdiv4: -- case vlynq_rdiv5: case vlynq_rdiv6: case vlynq_rdiv7: case vlynq_rdiv8: -- vlynq_reg_write(dev->local->control, 0); -- vlynq_reg_write(dev->remote->control, -- VLYNQ_CTRL_CLOCK_INT | -- VLYNQ_CTRL_CLOCK_DIV(dev->divisor - -- vlynq_rdiv1)); -+ case vlynq_rdiv1: -+ case vlynq_rdiv2: -+ case vlynq_rdiv3: -+ case vlynq_rdiv4: -+ case vlynq_rdiv5: -+ case vlynq_rdiv6: -+ case vlynq_rdiv7: -+ case vlynq_rdiv8: -+ writel(0, &dev->local->control); -+ writel(VLYNQ_CTRL_CLOCK_INT | -+ VLYNQ_CTRL_CLOCK_DIV(dev->divisor - -+ vlynq_rdiv1), &dev->remote->control); - if (vlynq_linked(dev)) { - printk(KERN_DEBUG -- "%s: using remote clock divisor %d\n", -- dev->dev.bus_id, dev->divisor - vlynq_rdiv1 + 1); -+ "%s: using remote clock divisor %d\n", -+ dev_name(&dev->dev), -+ dev->divisor - vlynq_rdiv1 + 1); - return 0; - } - break; -@@ -568,12 +603,10 @@ int vlynq_set_local_mapping(struct vlynq - if (!dev->enabled) - return -ENXIO; - -- vlynq_reg_write(dev->local->tx_offset, tx_offset); -+ writel(tx_offset, &dev->local->tx_offset); - for (i = 0; i < 4; i++) { -- vlynq_reg_write(dev->local->rx_mapping[i].offset, -- mapping[i].offset); -- vlynq_reg_write(dev->local->rx_mapping[i].size, -- mapping[i].size); -+ writel(mapping[i].offset, &dev->local->rx_mapping[i].offset); -+ writel(mapping[i].size, &dev->local->rx_mapping[i].size); - } - return 0; - } -@@ -587,12 +620,10 @@ int vlynq_set_remote_mapping(struct vlyn - if (!dev->enabled) - return -ENXIO; - -- vlynq_reg_write(dev->remote->tx_offset, tx_offset); -+ writel(tx_offset, &dev->remote->tx_offset); - for (i = 0; i < 4; i++) { -- vlynq_reg_write(dev->remote->rx_mapping[i].offset, -- mapping[i].offset); -- vlynq_reg_write(dev->remote->rx_mapping[i].size, -- mapping[i].size); -+ writel(mapping[i].offset, &dev->remote->rx_mapping[i].offset); -+ writel(mapping[i].size, &dev->remote->rx_mapping[i].size); - } - return 0; - } -@@ -662,8 +693,7 @@ static int vlynq_probe(struct platform_d - dev->id = pdev->id; - dev->dev.bus = &vlynq_bus_type; - dev->dev.parent = &pdev->dev; -- snprintf(dev->dev.bus_id, BUS_ID_SIZE, "vlynq%d", dev->id); -- dev->dev.bus_id[BUS_ID_SIZE - 1] = 0; -+ dev_set_name(&dev->dev, "vlynq%d", dev->id); - dev->dev.platform_data = pdev->dev.platform_data; - dev->dev.release = vlynq_device_release; - -@@ -673,9 +703,9 @@ static int vlynq_probe(struct platform_d - dev->mem_end = mem_res->end; - - len = regs_res->end - regs_res->start; -- if (!request_mem_region(regs_res->start, len, dev->dev.bus_id)) { -+ if (!request_mem_region(regs_res->start, len, dev_name(&dev->dev))) { - printk(KERN_ERR "%s: Can't request vlynq registers\n", -- dev->dev.bus_id); -+ dev_name(&dev->dev)); - result = -ENXIO; - goto fail_request; - } -@@ -683,7 +713,7 @@ static int vlynq_probe(struct platform_d - dev->local = ioremap(regs_res->start, len); - if (!dev->local) { - printk(KERN_ERR "%s: Can't remap vlynq registers\n", -- dev->dev.bus_id); -+ dev_name(&dev->dev)); - result = -ENXIO; - goto fail_remap; - } -@@ -702,14 +732,14 @@ static int vlynq_probe(struct platform_d - platform_set_drvdata(pdev, dev); - - printk(KERN_INFO "%s: regs 0x%p, irq %d, mem 0x%p\n", -- dev->dev.bus_id, (void *)dev->regs_start, dev->irq, -+ dev_name(&dev->dev), (void *)dev->regs_start, dev->irq, - (void *)dev->mem_start); - - dev->dev_id = 0; - dev->divisor = vlynq_div_auto; - result = __vlynq_enable_device(dev); - if (result == 0) { -- dev->dev_id = vlynq_reg_read(dev->remote->chip); -+ dev->dev_id = readl(&dev->remote->chip); - ((struct plat_vlynq_ops *)(dev->dev.platform_data))->off(dev); - } - if (dev->dev_id) diff --git a/target/linux/ar7/patches-2.6.30/140-watchdog_bootcr.patch b/target/linux/ar7/patches-2.6.30/140-watchdog_bootcr.patch deleted file mode 100644 index 21c95a765..000000000 --- a/target/linux/ar7/patches-2.6.30/140-watchdog_bootcr.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- a/drivers/watchdog/ar7_wdt.c -+++ b/drivers/watchdog/ar7_wdt.c -@@ -298,14 +298,28 @@ static struct miscdevice ar7_wdt_miscdev - .fops = &ar7_wdt_fops, - }; - -+#define AR7_WDT_HARDWARE_ENABLE 0x10 -+ - static int __init ar7_wdt_init(void) - { - int rc; -+ u32 *bootcr; -+ u32 bootcr_value; - - spin_lock_init(&wdt_lock); - - ar7_wdt_get_regs(); - -+ /* arch/mips/ar7/clocks.c is the only other thing that reads this */ -+ bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); -+ bootcr_value = *bootcr; -+ iounmap(bootcr); -+ -+ if (!(bootcr_value & AR7_WDT_HARDWARE_ENABLE)) { -+ printk(KERN_INFO DRVNAME ": watchdog disabled in hardware (bootcr=%#x)\n", bootcr_value); -+ return -ENODEV; -+ } -+ - if (!request_mem_region(ar7_regs_wdt, sizeof(struct ar7_wdt), - LONGNAME)) { - printk(KERN_WARNING DRVNAME ": watchdog I/O region busy\n"); diff --git a/target/linux/ar7/patches-2.6.30/150-cpmac_not_broken.patch b/target/linux/ar7/patches-2.6.30/150-cpmac_not_broken.patch deleted file mode 100644 index 0c8a20d45..000000000 --- a/target/linux/ar7/patches-2.6.30/150-cpmac_not_broken.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/drivers/net/Kconfig -+++ b/drivers/net/Kconfig -@@ -1883,7 +1883,7 @@ config SC92031 - - config CPMAC - tristate "TI AR7 CPMAC Ethernet support (EXPERIMENTAL)" -- depends on NET_ETHERNET && EXPERIMENTAL && AR7 && BROKEN -+ depends on NET_ETHERNET && EXPERIMENTAL && AR7 - select PHYLIB - help - TI AR7 CPMAC Ethernet support diff --git a/target/linux/ar7/patches-2.6.30/160-cpmac_up_and_running.patch b/target/linux/ar7/patches-2.6.30/160-cpmac_up_and_running.patch deleted file mode 100644 index 8a37e3ace..000000000 --- a/target/linux/ar7/patches-2.6.30/160-cpmac_up_and_running.patch +++ /dev/null @@ -1,47 +0,0 @@ ---- a/arch/mips/ar7/platform.c -+++ b/arch/mips/ar7/platform.c -@@ -33,6 +33,8 @@ - #include - #include - #include -+#include -+#include - - #include - #include -@@ -205,6 +207,13 @@ static struct physmap_flash_data physmap - .width = 2, - }; - -+/* lets assume this is suitable for both high and low cpmacs links */ -+static struct fixed_phy_status fixed_phy_status __initdata = { -+ .link = 1, -+ .speed = 100, -+ .duplex = 1, -+}; -+ - static struct plat_cpmac_data cpmac_low_data = { - .reset_bit = 17, - .power_bit = 20, -@@ -506,6 +515,10 @@ static int __init ar7_register_devices(v - } - - if (ar7_has_high_cpmac()) { -+ res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status); -+ if (res && res != -ENODEV) -+ return res; -+ - cpmac_get_mac(1, cpmac_high_data.dev_addr); - res = platform_device_register(&cpmac_high); - if (res) -@@ -514,6 +527,10 @@ static int __init ar7_register_devices(v - cpmac_low_data.phy_mask = 0xffffffff; - } - -+ res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status); -+ if (res && res != -ENODEV) -+ return res; -+ - cpmac_get_mac(0, cpmac_low_data.dev_addr); - res = platform_device_register(&cpmac_low); - if (res) diff --git a/target/linux/ar7/patches-2.6.30/500-serial_kludge.patch b/target/linux/ar7/patches-2.6.30/500-serial_kludge.patch deleted file mode 100644 index d4b02bc91..000000000 --- a/target/linux/ar7/patches-2.6.30/500-serial_kludge.patch +++ /dev/null @@ -1,38 +0,0 @@ ---- a/drivers/serial/8250.c -+++ b/drivers/serial/8250.c -@@ -287,6 +287,13 @@ static const struct serial8250_config ua - .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, - .flags = UART_CAP_FIFO, - }, -+ [PORT_AR7] = { -+ .name = "TI-AR7", -+ .fifo_size = 16, -+ .tx_loadsz = 16, -+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00, -+ .flags = UART_CAP_FIFO | UART_CAP_AFE, -+ }, - }; - - #if defined (CONFIG_SERIAL_8250_AU1X00) -@@ -2702,7 +2709,11 @@ static void serial8250_console_putchar(s - { - struct uart_8250_port *up = (struct uart_8250_port *)port; - -+#ifdef CONFIG_AR7 -+ wait_for_xmitr(up, BOTH_EMPTY); -+#else - wait_for_xmitr(up, UART_LSR_THRE); -+#endif - serial_out(up, UART_TX, ch); - } - ---- a/include/linux/serial_core.h -+++ b/include/linux/serial_core.h -@@ -41,6 +41,7 @@ - #define PORT_XSCALE 15 - #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ - #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ -+#define PORT_AR7 18 /* TI AR7 internal UART */ - #define PORT_MAX_8250 17 /* max port ID */ - - /* diff --git a/target/linux/ar7/patches-2.6.30/900-cpmac_multiqueue.patch b/target/linux/ar7/patches-2.6.30/900-cpmac_multiqueue.patch deleted file mode 100644 index 3df3d6832..000000000 --- a/target/linux/ar7/patches-2.6.30/900-cpmac_multiqueue.patch +++ /dev/null @@ -1,70 +0,0 @@ -This patch fixes the network driver cpmac.c for compilation with -configuration option CONFIG_NETDEVICES_MULTIQUEUE. - -These compiler warnings are fixed by the patch: -drivers/net/cpmac.c: In function 'cpmac_end_xmit': -drivers/net/cpmac.c:630: warning: passing argument 2 of 'netif_subqueue_stopped' makes pointer from integer without a cast -drivers/net/cpmac.c:641: warning: passing argument 2 of 'netif_subqueue_stopped' makes pointer from integer without a cast -drivers/net/cpmac.c: In function 'cpmac_probe': -drivers/net/cpmac.c:1128: warning: unused variable 'i' - -During runtime, the unpatched driver raises a fatal runtime exception. -This is fixed by calling __netif_subqueue_stopped instead -of netif_subqueue_stopped, too. - -Two additional code parts were modified for CONFIG_NETDEVICES_MULTIQUEUE -because other drivers do it in the same way. - - Signed-off-by: Stefan Weil - ---- a/drivers/net/cpmac.c -+++ b/drivers/net/cpmac.c -@@ -615,13 +615,13 @@ static void cpmac_end_xmit(struct net_de - - dev_kfree_skb_irq(desc->skb); - desc->skb = NULL; -- if (netif_subqueue_stopped(dev, queue)) -+ if (__netif_subqueue_stopped(dev, queue)) - netif_wake_subqueue(dev, queue); - } else { - if (netif_msg_tx_err(priv) && net_ratelimit()) - printk(KERN_WARNING - "%s: end_xmit: spurious interrupt\n", dev->name); -- if (netif_subqueue_stopped(dev, queue)) -+ if (__netif_subqueue_stopped(dev, queue)) - netif_wake_subqueue(dev, queue); - } - } -@@ -731,7 +731,6 @@ static void cpmac_clear_tx(struct net_de - - static void cpmac_hw_error(struct work_struct *work) - { -- int i; - struct cpmac_priv *priv = - container_of(work, struct cpmac_priv, reset_work); - -@@ -818,7 +817,6 @@ static irqreturn_t cpmac_irq(int irq, vo - - static void cpmac_tx_timeout(struct net_device *dev) - { -- int i; - struct cpmac_priv *priv = netdev_priv(dev); - - spin_lock(&priv->lock); -@@ -1097,7 +1095,7 @@ static int external_switch; - - static int __devinit cpmac_probe(struct platform_device *pdev) - { -- int rc, phy_id, i; -+ int rc, phy_id; - char *mdio_bus_id = "0"; - struct resource *mem; - struct cpmac_priv *priv; -@@ -1125,6 +1123,7 @@ static int __devinit cpmac_probe(struct - } - - dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES); -+ //~ dev = alloc_etherdev(sizeof(*priv)); - - if (!dev) { - printk(KERN_ERR "cpmac: Unable to allocate net_device\n"); diff --git a/target/linux/ar7/patches-2.6.30/910-cpmac_fixed_phy.patch b/target/linux/ar7/patches-2.6.30/910-cpmac_fixed_phy.patch deleted file mode 100644 index bd7345abf..000000000 --- a/target/linux/ar7/patches-2.6.30/910-cpmac_fixed_phy.patch +++ /dev/null @@ -1,90 +0,0 @@ -This is a hack to make cpmac work with the external switch on a DG834 v3; it -should also work on other similar routers. It has not been tested on hardware -with multiple cpmac devices or with no external switch. It may be safer to -move external_switch to pdata rather than trying to detect it, and to set -phy_mask correctly rather than moving the phy search loop. - ---- a/drivers/net/cpmac.c -+++ b/drivers/net/cpmac.c -@@ -1096,7 +1096,7 @@ static int external_switch; - static int __devinit cpmac_probe(struct platform_device *pdev) - { - int rc, phy_id; -- char *mdio_bus_id = "0"; -+ char mdio_bus_id[BUS_ID_SIZE]; - struct resource *mem; - struct cpmac_priv *priv; - struct net_device *dev; -@@ -1104,22 +1104,23 @@ static int __devinit cpmac_probe(struct - - pdata = pdev->dev.platform_data; - -- for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) { -- if (!(pdata->phy_mask & (1 << phy_id))) -- continue; -- if (!cpmac_mii->phy_map[phy_id]) -- continue; -- break; -+ if (external_switch || dumb_switch) { -+ strncpy(mdio_bus_id, "0", BUS_ID_SIZE); /* fixed phys bus */ -+ phy_id = pdev->id; -+ } else { -+ for (phy_id = 0; phy_id < PHY_MAX_ADDR; phy_id++) { -+ if (!(pdata->phy_mask & (1 << phy_id))) -+ continue; -+ if (!cpmac_mii->phy_map[phy_id]) -+ continue; -+ strncpy(mdio_bus_id, cpmac_mii->id, BUS_ID_SIZE); -+ break; -+ } - } - - if (phy_id == PHY_MAX_ADDR) { -- if (external_switch || dumb_switch) { -- mdio_bus_id = 0; /* fixed phys bus */ -- phy_id = pdev->id; -- } else { -- dev_err(&pdev->dev, "no PHY present\n"); -- return -ENODEV; -- } -+ dev_err(&pdev->dev, "no PHY present\n"); -+ return -ENODEV; - } - - dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES); -@@ -1160,8 +1161,10 @@ static int __devinit cpmac_probe(struct - priv->msg_enable = netif_msg_init(debug_level, 0xff); - memcpy(dev->dev_addr, pdata->dev_addr, sizeof(dev->dev_addr)); - -- priv->phy = phy_connect(dev, dev_name(&cpmac_mii->phy_map[phy_id]->dev), -- &cpmac_adjust_link, 0, PHY_INTERFACE_MODE_MII); -+ snprintf(priv->phy_name, BUS_ID_SIZE, PHY_ID_FMT, mdio_bus_id, phy_id); -+ -+ priv->phy = phy_connect(dev, priv->phy_name, &cpmac_adjust_link, 0, -+ PHY_INTERFACE_MODE_MII); - if (IS_ERR(priv->phy)) { - if (netif_msg_drv(priv)) - printk(KERN_ERR "%s: Could not attach to PHY\n", -@@ -1235,11 +1238,11 @@ int __devinit cpmac_init(void) - - cpmac_mii->reset(cpmac_mii); - -- for (i = 0; i < 300000; i++) -+ for (i = 0; i < 300; i++) - if ((mask = cpmac_read(cpmac_mii->priv, CPMAC_MDIO_ALIVE))) - break; - else -- cpu_relax(); -+ msleep(10); - - mask &= 0x7fffffff; - if (mask & (mask - 1)) { -@@ -1248,7 +1251,7 @@ int __devinit cpmac_init(void) - } - - cpmac_mii->phy_mask = ~(mask | 0x80000000); -- snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "0"); -+ snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1"); - - res = mdiobus_register(cpmac_mii); - if (res) diff --git a/target/linux/ar7/patches-2.6.30/930-titan-platform.patch b/target/linux/ar7/patches-2.6.30/930-titan-platform.patch deleted file mode 100644 index 80f7eb8ad..000000000 --- a/target/linux/ar7/patches-2.6.30/930-titan-platform.patch +++ /dev/null @@ -1,248 +0,0 @@ ---- a/arch/mips/ar7/platform.c 2009-11-18 14:57:44.000000000 +0800 -+++ b/arch/mips/ar7/platform.c 2009-11-18 15:43:04.000000000 +0800 -@@ -128,6 +128,36 @@ - }, - }; - -+static struct resource cpmac_low_res_titan[] = { -+ { -+ .name = "regs", -+ .flags = IORESOURCE_MEM, -+ .start = TITAN_REGS_MAC0, -+ .end = TITAN_REGS_MAC0 + 0x7ff, -+ }, -+ { -+ .name = "irq", -+ .flags = IORESOURCE_IRQ, -+ .start = 27, -+ .end = 27, -+ }, -+}; -+ -+static struct resource cpmac_high_res_titan[] = { -+ { -+ .name = "regs", -+ .flags = IORESOURCE_MEM, -+ .start = TITAN_REGS_MAC1, -+ .end = TITAN_REGS_MAC1 + 0x7ff, -+ }, -+ { -+ .name = "irq", -+ .flags = IORESOURCE_IRQ, -+ .start = 41, -+ .end = 41, -+ }, -+}; -+ - static struct resource vlynq_low_res[] = { - { - .name = "regs", -@@ -182,6 +212,60 @@ - }, - }; - -+static struct resource vlynq_low_res_titan[] = { -+ { -+ .name = "regs", -+ .flags = IORESOURCE_MEM, -+ .start = TITAN_REGS_VLYNQ0, -+ .end = TITAN_REGS_VLYNQ0 + 0xff, -+ }, -+ { -+ .name = "irq", -+ .flags = IORESOURCE_IRQ, -+ .start = 33, -+ .end = 33, -+ }, -+ { -+ .name = "mem", -+ .flags = IORESOURCE_MEM, -+ .start = 0x0c000000, -+ .end = 0x0fffffff, -+ }, -+ { -+ .name = "devirq", -+ .flags = IORESOURCE_IRQ, -+ .start = 80, -+ .end = 111, -+ }, -+}; -+ -+static struct resource vlynq_high_res_titan[] = { -+ { -+ .name = "regs", -+ .flags = IORESOURCE_MEM, -+ .start = TITAN_REGS_VLYNQ1, -+ .end = TITAN_REGS_VLYNQ1 + 0xff, -+ }, -+ { -+ .name = "irq", -+ .flags = IORESOURCE_IRQ, -+ .start = 34, -+ .end = 34, -+ }, -+ { -+ .name = "mem", -+ .flags = IORESOURCE_MEM, -+ .start = 0x40000000, -+ .end = 0x43ffffff, -+ }, -+ { -+ .name = "devirq", -+ .flags = IORESOURCE_IRQ, -+ .start = 112, -+ .end = 143, -+ }, -+}; -+ - static struct resource usb_res[] = { - { - .name = "regs", -@@ -226,6 +310,18 @@ - .phy_mask = 0x7fffffff, - }; - -+static struct plat_cpmac_data cpmac_low_data_titan = { -+ .reset_bit = 17, -+ .power_bit = 20, -+ .phy_mask = 0x40000000, -+}; -+ -+static struct plat_cpmac_data cpmac_high_data_titan = { -+ .reset_bit = 21, -+ .power_bit = 22, -+ .phy_mask = 0x80000000, -+}; -+ - static struct plat_vlynq_data vlynq_low_data = { - .ops.on = vlynq_on, - .ops.off = vlynq_off, -@@ -240,6 +336,20 @@ - .gpio_bit = 19, - }; - -+static struct plat_vlynq_data vlynq_low_data_titan = { -+ .ops.on = vlynq_on, -+ .ops.off = vlynq_off, -+ .reset_bit = 15, -+ .gpio_bit = 14, -+}; -+ -+static struct plat_vlynq_data vlynq_high_data_titan = { -+ .ops.on = vlynq_on, -+ .ops.off = vlynq_off, -+ .reset_bit = 16, -+ .gpio_bit = 7, -+}; -+ - static struct platform_device physmap_flash = { - .id = 0, - .name = "physmap-flash", -@@ -273,6 +383,30 @@ - .num_resources = ARRAY_SIZE(cpmac_high_res), - }; - -+static struct platform_device cpmac_low_titan = { -+ .id = 0, -+ .name = "cpmac", -+ .dev = { -+ .dma_mask = &cpmac_dma_mask, -+ .coherent_dma_mask = DMA_32BIT_MASK, -+ .platform_data = &cpmac_low_data_titan, -+ }, -+ .resource = cpmac_low_res_titan, -+ .num_resources = ARRAY_SIZE(cpmac_low_res_titan), -+}; -+ -+static struct platform_device cpmac_high_titan = { -+ .id = 1, -+ .name = "cpmac", -+ .dev = { -+ .dma_mask = &cpmac_dma_mask, -+ .coherent_dma_mask = DMA_32BIT_MASK, -+ .platform_data = &cpmac_high_data_titan, -+ }, -+ .resource = cpmac_high_res_titan, -+ .num_resources = ARRAY_SIZE(cpmac_high_res_titan), -+}; -+ - static struct platform_device vlynq_low = { - .id = 0, - .name = "vlynq", -@@ -289,6 +423,22 @@ - .num_resources = ARRAY_SIZE(vlynq_high_res), - }; - -+static struct platform_device vlynq_low_titan = { -+ .id = 0, -+ .name = "vlynq", -+ .dev.platform_data = &vlynq_low_data_titan, -+ .resource = vlynq_low_res_titan, -+ .num_resources = ARRAY_SIZE(vlynq_low_res_titan), -+}; -+ -+static struct platform_device vlynq_high_titan = { -+ .id = 1, -+ .name = "vlynq", -+ .dev.platform_data = &vlynq_high_data_titan, -+ .resource = vlynq_high_res_titan, -+ .num_resources = ARRAY_SIZE(vlynq_high_res_titan), -+}; -+ - - /* This is proper way to define uart ports, but they are then detected - * as xscale and, obviously, don't work... -@@ -333,6 +483,11 @@ - { .name = "status", .gpio = 8, .active_low = 1, }, - }; - -+static struct gpio_led titan_leds[] = { -+ { .name = "status", .gpio = 8, .active_low = 1, }, -+ { .name = "wifi", .gpio = 13, .active_low = 1, }, -+}; -+ - static struct gpio_led dsl502t_leds[] = { - { .name = "status", .gpio = 9, .active_low = 1, }, - { .name = "ethernet", .gpio = 7, .active_low = 1, }, -@@ -425,7 +580,7 @@ - /* FIXME: the whole thing is unreliable */ - prId = prom_getenv("ProductID"); - usb_prod = prom_getenv("usb_prod"); -- -+ - /* If we can't get the product id from PROM, use the default LEDs */ - if (!prId) - return; -@@ -442,6 +597,9 @@ - } else if (strstr(prId, "DG834")) { - ar7_led_data.num_leds = ARRAY_SIZE(dg834g_leds); - ar7_led_data.leds = dg834g_leds; -+ } else if (strstr(prId, "CYWM")) { -+ ar7_led_data.num_leds = ARRAY_SIZE(titan_leds); -+ ar7_led_data.leds = titan_leds; - } - } - -@@ -502,14 +660,18 @@ - if (res) - return res; - -- ar7_device_disable(vlynq_low_data.reset_bit); -- res = platform_device_register(&vlynq_low); -+ ar7_device_disable(ar7_is_titan() ? vlynq_low_data_titan.reset_bit : -+ vlynq_low_data.reset_bit); -+ res = platform_device_register(ar7_is_titan() ? &vlynq_low_titan : -+ &vlynq_low); - if (res) - return res; - - if (ar7_has_high_vlynq()) { -- ar7_device_disable(vlynq_high_data.reset_bit); -- res = platform_device_register(&vlynq_high); -+ ar7_device_disable(ar7_is_titan() ? vlynq_high_data_titan.reset_bit : -+ vlynq_high_data.reset_bit); -+ res = platform_device_register(ar7_is_titan() ? &vlynq_high_titan : -+ &vlynq_high); - if (res) - return res; - } diff --git a/target/linux/ar7/patches-2.6.30/940-cpmac-titan.patch b/target/linux/ar7/patches-2.6.30/940-cpmac-titan.patch deleted file mode 100644 index 6aa59c5d0..000000000 --- a/target/linux/ar7/patches-2.6.30/940-cpmac-titan.patch +++ /dev/null @@ -1,76 +0,0 @@ ---- a/arch/mips/ar7/platform.c 2010-01-25 16:11:24.000000000 +0800 -+++ b/arch/mips/ar7/platform.c 2010-01-13 14:46:16.000000000 +0800 -@@ -677,24 +677,32 @@ - } - - if (ar7_has_high_cpmac()) { -- res = fixed_phy_add(PHY_POLL, cpmac_high.id, &fixed_phy_status); -+ res = fixed_phy_add(PHY_POLL, ar7_is_titan()?cpmac_high_titan.id: cpmac_high.id, &fixed_phy_status); - if (res && res != -ENODEV) - return res; - -- cpmac_get_mac(1, cpmac_high_data.dev_addr); -- res = platform_device_register(&cpmac_high); -+ cpmac_get_mac(1, ar7_is_titan() ? cpmac_high_data_titan.dev_addr: -+ cpmac_high_data.dev_addr); -+ res = platform_device_register(ar7_is_titan() ? &cpmac_high_titan : -+ &cpmac_high); - if (res) - return res; - } else { -- cpmac_low_data.phy_mask = 0xffffffff; -- } -+ if (ar7_is_titan()) -+ cpmac_low_data_titan.phy_mask = 0xffffffff; -+ else -+ cpmac_low_data.phy_mask = 0xffffffff; -+ } - -- res = fixed_phy_add(PHY_POLL, cpmac_low.id, &fixed_phy_status); -+ res = fixed_phy_add(PHY_POLL, ar7_is_titan()?cpmac_low_titan.id: -+ cpmac_low.id, &fixed_phy_status); - if (res && res != -ENODEV) - return res; - -- cpmac_get_mac(0, cpmac_low_data.dev_addr); -- res = platform_device_register(&cpmac_low); -+ cpmac_get_mac(0, ar7_is_titan() ? cpmac_low_data_titan.dev_addr : -+ cpmac_low_data.dev_addr); -+ res = platform_device_register(ar7_is_titan() ? &cpmac_low_titan : -+ &cpmac_low); - if (res) - return res; - ---- a/drivers/net/cpmac.c 2010-01-25 16:11:24.000000000 +0800 -+++ b/drivers/net/cpmac.c 2010-01-25 16:48:02.000000000 +0800 -@@ -1141,6 +1141,8 @@ - goto fail; - } - -+ ar7_device_reset(pdata->reset_bit); -+ - dev->irq = platform_get_irq_byname(pdev, "irq"); - - dev->open = cpmac_open; -@@ -1221,7 +1223,7 @@ - cpmac_mii->reset = cpmac_mdio_reset; - cpmac_mii->irq = mii_irqs; - -- cpmac_mii->priv = ioremap(AR7_REGS_MDIO, 256); -+ cpmac_mii->priv = ioremap(ar7_is_titan()?TITAN_REGS_MDIO:AR7_REGS_MDIO, 256); - - if (!cpmac_mii->priv) { - printk(KERN_ERR "Can't ioremap mdio registers\n"); -@@ -1232,9 +1234,10 @@ - #warning FIXME: unhardcode gpio&reset bits - ar7_gpio_disable(26); - ar7_gpio_disable(27); -- ar7_device_reset(AR7_RESET_BIT_CPMAC_LO); -- ar7_device_reset(AR7_RESET_BIT_CPMAC_HI); - ar7_device_reset(AR7_RESET_BIT_EPHY); -+ if (ar7_is_titan()) { -+ ar7_device_reset(TITAN_RESET_BIT_EPHY1); -+ } - - cpmac_mii->reset(cpmac_mii); - diff --git a/target/linux/ar7/patches-2.6.30/950-cpmac_allow_vlan.patch b/target/linux/ar7/patches-2.6.30/950-cpmac_allow_vlan.patch deleted file mode 100644 index 022da4fab..000000000 --- a/target/linux/ar7/patches-2.6.30/950-cpmac_allow_vlan.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/drivers/net/cpmac.c 2010-02-11 23:52:19.000000000 +0000 -+++ b/drivers/net/cpmac.c 2010-02-20 20:32:58.000000000 +0000 -@@ -57,7 +57,7 @@ - - #define CPMAC_VERSION "0.5.0" - /* frame size + 802.1q tag */ --#define CPMAC_SKB_SIZE (ETH_FRAME_LEN + 4) -+#define CPMAC_SKB_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN + 4) - #define CPMAC_QUEUES 8 - - /* Ethernet registers */ diff --git a/target/linux/ar7/patches-2.6.32/100-board_support.patch b/target/linux/ar7/patches-2.6.32/100-board_support.patch index 0738354d8..8be4276ef 100644 --- a/target/linux/ar7/patches-2.6.32/100-board_support.patch +++ b/target/linux/ar7/patches-2.6.32/100-board_support.patch @@ -1,6 +1,6 @@ --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c -@@ -1256,9 +1256,22 @@ void *set_except_vector(int n, void *add +@@ -1255,9 +1255,22 @@ void *set_except_vector(int n, void *add exception_handlers[n] = handler; if (n == 0 && cpu_has_divec) { @@ -28,7 +28,7 @@ } --- a/arch/mips/include/asm/page.h +++ b/arch/mips/include/asm/page.h -@@ -185,8 +185,10 @@ typedef struct { unsigned long pgprot; } +@@ -200,8 +200,10 @@ typedef struct { unsigned long pgprot; } #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) @@ -40,4 +40,4 @@ + PHYS_OFFSET) #include - #include + #include diff --git a/target/linux/ar7/patches-2.6.32/500-serial_kludge.patch b/target/linux/ar7/patches-2.6.32/500-serial_kludge.patch index 4d9bcb931..fed6e715d 100644 --- a/target/linux/ar7/patches-2.6.32/500-serial_kludge.patch +++ b/target/linux/ar7/patches-2.6.32/500-serial_kludge.patch @@ -1,6 +1,6 @@ --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c -@@ -296,6 +296,13 @@ static const struct serial8250_config ua +@@ -299,6 +299,13 @@ static const struct serial8250_config ua .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00, .flags = UART_CAP_FIFO | UART_CAP_AFE, }, @@ -14,7 +14,7 @@ }; #if defined (CONFIG_SERIAL_8250_AU1X00) -@@ -2712,7 +2719,11 @@ static void serial8250_console_putchar(s +@@ -2713,7 +2720,11 @@ static void serial8250_console_putchar(s { struct uart_8250_port *up = (struct uart_8250_port *)port; diff --git a/target/linux/ar7/patches-2.6.32/940-cpmac-titan.patch b/target/linux/ar7/patches-2.6.32/940-cpmac-titan.patch index e81c9bedb..884d46d48 100644 --- a/target/linux/ar7/patches-2.6.32/940-cpmac-titan.patch +++ b/target/linux/ar7/patches-2.6.32/940-cpmac-titan.patch @@ -1,8 +1,6 @@ -Index: linux-2.6.32.9/arch/mips/ar7/platform.c -=================================================================== ---- linux-2.6.32.9.orig/arch/mips/ar7/platform.c 2010-03-07 13:09:00.000000000 +0100 -+++ linux-2.6.32.9/arch/mips/ar7/platform.c 2010-03-07 13:09:00.000000000 +0100 -@@ -716,23 +716,35 @@ +--- a/arch/mips/ar7/platform.c ++++ b/arch/mips/ar7/platform.c +@@ -716,23 +716,35 @@ static int __init ar7_register_devices(v } if (ar7_has_high_cpmac()) { @@ -45,11 +43,9 @@ Index: linux-2.6.32.9/arch/mips/ar7/platform.c if (res) return res; -Index: linux-2.6.32.9/drivers/net/cpmac.c -=================================================================== ---- linux-2.6.32.9.orig/drivers/net/cpmac.c 2010-02-23 16:38:51.000000000 +0100 -+++ linux-2.6.32.9/drivers/net/cpmac.c 2010-03-07 13:24:56.000000000 +0100 -@@ -1153,6 +1153,8 @@ +--- a/drivers/net/cpmac.c ++++ b/drivers/net/cpmac.c +@@ -1153,6 +1153,8 @@ static int __devinit cpmac_probe(struct goto fail; } @@ -58,7 +54,7 @@ Index: linux-2.6.32.9/drivers/net/cpmac.c dev->irq = platform_get_irq_byname(pdev, "irq"); dev->netdev_ops = &cpmac_netdev_ops; -@@ -1228,7 +1230,7 @@ +@@ -1228,7 +1230,7 @@ int __devinit cpmac_init(void) cpmac_mii->reset = cpmac_mdio_reset; cpmac_mii->irq = mii_irqs; @@ -67,7 +63,7 @@ Index: linux-2.6.32.9/drivers/net/cpmac.c if (!cpmac_mii->priv) { printk(KERN_ERR "Can't ioremap mdio registers\n"); -@@ -1239,10 +1241,17 @@ +@@ -1239,10 +1241,17 @@ int __devinit cpmac_init(void) #warning FIXME: unhardcode gpio&reset bits ar7_gpio_disable(26); ar7_gpio_disable(27); @@ -87,7 +83,7 @@ Index: linux-2.6.32.9/drivers/net/cpmac.c cpmac_mii->reset(cpmac_mii); for (i = 0; i < 300; i++) -@@ -1257,7 +1266,8 @@ +@@ -1257,7 +1266,8 @@ int __devinit cpmac_init(void) mask = 0; } @@ -97,11 +93,9 @@ Index: linux-2.6.32.9/drivers/net/cpmac.c snprintf(cpmac_mii->id, MII_BUS_ID_SIZE, "1"); res = mdiobus_register(cpmac_mii); -Index: a/arch/mips/include/asm/mach-ar7/ar7.h -=================================================================== ---- a/arch/mips/include/asm/mach-ar7/ar7.h (revision 19112) -+++ b/arch/mips/include/asm/mach-ar7/ar7.h (working copy) -@@ -44,8 +44,10 @@ +--- a/arch/mips/include/asm/mach-ar7/ar7.h ++++ b/arch/mips/include/asm/mach-ar7/ar7.h +@@ -50,8 +50,10 @@ #define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00) #define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00) diff --git a/target/linux/ar7/patches-2.6.32/950-cpmac_fallback_switch.patch b/target/linux/ar7/patches-2.6.32/950-cpmac_fallback_switch.patch index b5ba86155..102b82974 100644 --- a/target/linux/ar7/patches-2.6.32/950-cpmac_fallback_switch.patch +++ b/target/linux/ar7/patches-2.6.32/950-cpmac_fallback_switch.patch @@ -1,8 +1,6 @@ -Index: linux-2.6.32.9/drivers/net/cpmac.c -=================================================================== ---- linux-2.6.32.9.orig/drivers/net/cpmac.c 2010-03-06 23:12:46.000000000 +0100 -+++ linux-2.6.32.9/drivers/net/cpmac.c 2010-03-06 23:13:14.000000000 +0100 -@@ -1132,8 +1132,9 @@ +--- a/drivers/net/cpmac.c ++++ b/drivers/net/cpmac.c +@@ -1132,8 +1132,9 @@ static int __devinit cpmac_probe(struct } if (phy_id == PHY_MAX_ADDR) { diff --git a/target/linux/ar7/patches-2.6.32/960-cpmac_allow_vlan.patch b/target/linux/ar7/patches-2.6.32/960-cpmac_allow_vlan.patch index 022da4fab..a0d5ec3c7 100644 --- a/target/linux/ar7/patches-2.6.32/960-cpmac_allow_vlan.patch +++ b/target/linux/ar7/patches-2.6.32/960-cpmac_allow_vlan.patch @@ -1,8 +1,8 @@ ---- a/drivers/net/cpmac.c 2010-02-11 23:52:19.000000000 +0000 -+++ b/drivers/net/cpmac.c 2010-02-20 20:32:58.000000000 +0000 -@@ -57,7 +57,7 @@ +--- a/drivers/net/cpmac.c ++++ b/drivers/net/cpmac.c +@@ -56,7 +56,7 @@ MODULE_PARM_DESC(dumb_switch, "Assume sw - #define CPMAC_VERSION "0.5.0" + #define CPMAC_VERSION "0.5.1" /* frame size + 802.1q tag */ -#define CPMAC_SKB_SIZE (ETH_FRAME_LEN + 4) +#define CPMAC_SKB_SIZE (ETH_FRAME_LEN + ETH_FCS_LEN + 4) diff --git a/target/linux/ar7/patches/100-board_support.patch b/target/linux/ar7/patches/100-board_support.patch deleted file mode 100644 index 01fe965cd..000000000 --- a/target/linux/ar7/patches/100-board_support.patch +++ /dev/null @@ -1,86 +0,0 @@ ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -19,6 +19,24 @@ choice - prompt "System type" - default SGI_IP22 - -+config AR7 -+ bool "Texas Instruments AR7" -+ select BOOT_ELF32 -+ select DMA_NONCOHERENT -+ select CEVT_R4K -+ select CSRC_R4K -+ select IRQ_CPU -+ select NO_EXCEPT_FILL -+ select SWAP_IO_SPACE -+ select SYS_HAS_CPU_MIPS32_R1 -+ select SYS_HAS_EARLY_PRINTK -+ select SYS_SUPPORTS_32BIT_KERNEL -+ select SYS_SUPPORTS_KGDB -+ select SYS_SUPPORTS_LITTLE_ENDIAN -+ select SYS_SUPPORTS_BIG_ENDIAN -+ select GENERIC_GPIO -+ select GENERIC_HARDIRQS_NO__DO_IRQ -+ - config MACH_ALCHEMY - bool "Alchemy processor based machines" - ---- a/arch/mips/kernel/traps.c -+++ b/arch/mips/kernel/traps.c -@@ -1256,9 +1256,22 @@ void *set_except_vector(int n, void *add - - exception_handlers[n] = handler; - if (n == 0 && cpu_has_divec) { -- *(u32 *)(ebase + 0x200) = 0x08000000 | -- (0x03ffffff & (handler >> 2)); -- local_flush_icache_range(ebase + 0x200, ebase + 0x204); -+ if ((handler ^ (ebase + 4)) & 0xfc000000) { -+ /* lui k0, 0x0000 */ -+ *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16); -+ /* ori k0, 0x0000 */ -+ *(u32 *)(ebase + 0x204) = -+ 0x375a0000 | (handler & 0xffff); -+ /* jr k0 */ -+ *(u32 *)(ebase + 0x208) = 0x03400008; -+ /* nop */ -+ *(u32 *)(ebase + 0x20C) = 0x00000000; -+ flush_icache_range(ebase + 0x200, ebase + 0x210); -+ } else { -+ *(u32 *)(ebase + 0x200) = -+ 0x08000000 | (0x03ffffff & (handler >> 2)); -+ flush_icache_range(ebase + 0x200, ebase + 0x204); -+ } - } - return (void *)old_handler; - } ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -181,6 +181,13 @@ libs-$(CONFIG_SIBYTE_CFE) += arch/mips/s - # - - # -+# Texas Instruments AR7 -+# -+core-$(CONFIG_AR7) += arch/mips/ar7/ -+cflags-$(CONFIG_AR7) += -Iinclude/asm-mips/ar7 -+load-$(CONFIG_AR7) += 0xffffffff94100000 -+ -+# - # Acer PICA 61, Mips Magnum 4000 and Olivetti M700. - # - core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/ ---- a/arch/mips/include/asm/page.h -+++ b/arch/mips/include/asm/page.h -@@ -185,8 +185,10 @@ typedef struct { unsigned long pgprot; } - #define VM_DATA_DEFAULT_FLAGS (VM_READ | VM_WRITE | VM_EXEC | \ - VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC) - --#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE) --#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET) -+#define UNCAC_ADDR(addr) ((addr) - PAGE_OFFSET + UNCAC_BASE + \ -+ PHYS_OFFSET) -+#define CAC_ADDR(addr) ((addr) - UNCAC_BASE + PAGE_OFFSET - \ -+ PHYS_OFFSET) - - #include - #include diff --git a/target/linux/ar7/patches/110-flash.patch b/target/linux/ar7/patches/110-flash.patch deleted file mode 100644 index 975eb8368..000000000 --- a/target/linux/ar7/patches/110-flash.patch +++ /dev/null @@ -1,26 +0,0 @@ ---- a/drivers/mtd/Kconfig -+++ b/drivers/mtd/Kconfig -@@ -196,6 +196,12 @@ config MTD_MYLOADER_PARTS - You will still need the parsing functions to be called by the driver - for your particular device. It won't happen automatically. - -+config MTD_AR7_PARTS -+ tristate "TI AR7 partitioning support" -+ depends on MTD_PARTITIONS -+ ---help--- -+ TI AR7 partitioning support -+ - comment "User Modules And Translation Layers" - - config MTD_CHAR ---- a/drivers/mtd/maps/physmap.c -+++ b/drivers/mtd/maps/physmap.c -@@ -80,7 +80,7 @@ static const char *rom_probe_types[] = { - "map_rom", - NULL }; - #ifdef CONFIG_MTD_PARTITIONS --static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", NULL }; -+static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "ar7part", NULL }; - #endif - - static int physmap_flash_probe(struct platform_device *dev) diff --git a/target/linux/ar7/patches/120-gpio_chrdev.patch b/target/linux/ar7/patches/120-gpio_chrdev.patch deleted file mode 100644 index fa61e5ccf..000000000 --- a/target/linux/ar7/patches/120-gpio_chrdev.patch +++ /dev/null @@ -1,28 +0,0 @@ ---- a/drivers/char/Kconfig -+++ b/drivers/char/Kconfig -@@ -974,6 +974,15 @@ config MWAVE - To compile this driver as a module, choose M here: the - module will be called mwave. - -+config AR7_GPIO -+ tristate "TI AR7 GPIO Support" -+ depends on AR7 -+ help -+ Give userspace access to the GPIO pins on the Texas Instruments AR7 -+ processors. -+ -+ If compiled as a module, it will be called ar7_gpio. -+ - config SCx200_GPIO - tristate "NatSemi SCx200 GPIO Support" - depends on SCx200 ---- a/drivers/char/Makefile -+++ b/drivers/char/Makefile -@@ -90,6 +90,7 @@ obj-$(CONFIG_HW_RANDOM) += hw_random/ - obj-$(CONFIG_PPDEV) += ppdev.o - obj-$(CONFIG_NWBUTTON) += nwbutton.o - obj-$(CONFIG_NWFLASH) += nwflash.o -+obj-$(CONFIG_AR7_GPIO) += ar7_gpio.o - obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o - obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o - obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o diff --git a/target/linux/ar7/patches/130-vlynq.patch b/target/linux/ar7/patches/130-vlynq.patch deleted file mode 100644 index 12eb53846..000000000 --- a/target/linux/ar7/patches/130-vlynq.patch +++ /dev/null @@ -1,21 +0,0 @@ ---- a/drivers/Kconfig -+++ b/drivers/Kconfig -@@ -104,6 +104,8 @@ source "drivers/auxdisplay/Kconfig" - - source "drivers/uio/Kconfig" - -+source "drivers/vlynq/Kconfig" -+ - source "drivers/xen/Kconfig" - - source "drivers/staging/Kconfig" ---- a/drivers/Makefile -+++ b/drivers/Makefile -@@ -103,6 +103,7 @@ obj-$(CONFIG_DCA) += dca/ - obj-$(CONFIG_HID) += hid/ - obj-$(CONFIG_PPC_PS3) += ps3/ - obj-$(CONFIG_OF) += of/ -+obj-$(CONFIG_VLYNQ) += vlynq/ - obj-$(CONFIG_SSB) += ssb/ - obj-$(CONFIG_VIRTIO) += virtio/ - obj-$(CONFIG_STAGING) += staging/ diff --git a/target/linux/ar7/patches/150-cpmac_not_broken.patch b/target/linux/ar7/patches/150-cpmac_not_broken.patch deleted file mode 100644 index 0c8a20d45..000000000 --- a/target/linux/ar7/patches/150-cpmac_not_broken.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/drivers/net/Kconfig -+++ b/drivers/net/Kconfig -@@ -1883,7 +1883,7 @@ config SC92031 - - config CPMAC - tristate "TI AR7 CPMAC Ethernet support (EXPERIMENTAL)" -- depends on NET_ETHERNET && EXPERIMENTAL && AR7 && BROKEN -+ depends on NET_ETHERNET && EXPERIMENTAL && AR7 - select PHYLIB - help - TI AR7 CPMAC Ethernet support diff --git a/target/linux/ar7/patches/160-vlynq-bus_id_removal.patch b/target/linux/ar7/patches/160-vlynq-bus_id_removal.patch deleted file mode 100644 index c40837030..000000000 --- a/target/linux/ar7/patches/160-vlynq-bus_id_removal.patch +++ /dev/null @@ -1,148 +0,0 @@ ---- a/drivers/vlynq/vlynq.c 2009-05-31 20:41:57.000000000 +0200 -+++ b/drivers/vlynq/vlynq.c 2009-05-31 22:06:36.000000000 +0200 -@@ -82,6 +82,7 @@ - static void vlynq_dump_regs(struct vlynq_device *dev) - { - int i; -+ - printk(KERN_DEBUG "VLYNQ local=%p remote=%p\n", - dev->local, dev->remote); - for (i = 0; i < 32; i++) { -@@ -95,6 +96,7 @@ - static void vlynq_dump_mem(u32 *base, int count) - { - int i; -+ - for (i = 0; i < (count + 3) / 4; i++) { - if (i % 4 == 0) printk(KERN_DEBUG "\nMEM[0x%04x]:", i * 4); - printk(KERN_DEBUG " 0x%08x", *(base + i)); -@@ -194,20 +196,24 @@ - static void vlynq_local_ack(unsigned int irq) - { - struct vlynq_device *dev = get_irq_chip_data(irq); -+ - u32 status = vlynq_reg_read(dev->local->status); -+ - if (printk_ratelimit()) - printk(KERN_DEBUG "%s: local status: 0x%08x\n", -- dev->dev.bus_id, status); -+ dev_name(&dev->dev), status); - vlynq_reg_write(dev->local->status, status); - } - - static void vlynq_remote_ack(unsigned int irq) - { - struct vlynq_device *dev = get_irq_chip_data(irq); -+ - u32 status = vlynq_reg_read(dev->remote->status); -+ - if (printk_ratelimit()) - printk(KERN_DEBUG "%s: remote status: 0x%08x\n", -- dev->dev.bus_id, status); -+ dev_name(&dev->dev), status); - vlynq_reg_write(dev->remote->status, status); - } - -@@ -262,7 +268,7 @@ - if (dev->local_irq == dev->remote_irq) { - printk(KERN_ERR - "%s: local vlynq irq should be different from remote\n", -- dev->dev.bus_id); -+ dev_name(&dev->dev)); - return -EINVAL; - } - -@@ -304,7 +310,7 @@ - } - - if (request_irq(dev->irq, vlynq_irq, IRQF_SHARED, "vlynq", dev)) { -- printk(KERN_ERR "%s: request_irq failed\n", dev->dev.bus_id); -+ printk(KERN_ERR "%s: request_irq failed\n", dev_name(&dev->dev)); - return -EAGAIN; - } - -@@ -403,7 +409,7 @@ - if (vlynq_linked(dev)) { - printk(KERN_DEBUG - "%s: using remote clock divisor %d\n", -- dev->dev.bus_id, i - vlynq_rdiv1 + 1); -+ dev_name(&dev->dev), i - vlynq_rdiv1 + 1); - dev->divisor = i; - return 0; - } else { -@@ -433,7 +439,7 @@ - if (vlynq_linked(dev)) { - printk(KERN_DEBUG - "%s: using local clock divisor %d\n", -- dev->dev.bus_id, i - vlynq_ldiv1 + 1); -+ dev_name(&dev->dev), i - vlynq_ldiv1 + 1); - dev->divisor = i; - return 0; - } else { -@@ -460,7 +466,7 @@ - - if (vlynq_linked(dev)) { - printk(KERN_DEBUG "%s: using external clock\n", -- dev->dev.bus_id); -+ dev_name(&dev->dev)); - dev->divisor = vlynq_div_external; - return 0; - } -@@ -507,7 +513,7 @@ - if (vlynq_linked(dev)) { - printk(KERN_DEBUG - "%s: using local clock divisor %d\n", -- dev->dev.bus_id, dev->divisor - vlynq_ldiv1 + 1); -+ dev_name(&dev->dev), dev->divisor - vlynq_ldiv1 + 1); - return 0; - } - break; -@@ -521,7 +527,7 @@ - if (vlynq_linked(dev)) { - printk(KERN_DEBUG - "%s: using remote clock divisor %d\n", -- dev->dev.bus_id, dev->divisor - vlynq_rdiv1 + 1); -+ dev_name(&dev->dev), dev->divisor - vlynq_rdiv1 + 1); - return 0; - } - break; -@@ -662,8 +668,7 @@ - dev->id = pdev->id; - dev->dev.bus = &vlynq_bus_type; - dev->dev.parent = &pdev->dev; -- snprintf(dev->dev.bus_id, BUS_ID_SIZE, "vlynq%d", dev->id); -- dev->dev.bus_id[BUS_ID_SIZE - 1] = 0; -+ dev_set_name(&dev->dev, "vlynq%d", dev->id); - dev->dev.platform_data = pdev->dev.platform_data; - dev->dev.release = vlynq_device_release; - -@@ -673,9 +678,9 @@ - dev->mem_end = mem_res->end; - - len = regs_res->end - regs_res->start; -- if (!request_mem_region(regs_res->start, len, dev->dev.bus_id)) { -+ if (!request_mem_region(regs_res->start, len, dev_name(&dev->dev))) { - printk(KERN_ERR "%s: Can't request vlynq registers\n", -- dev->dev.bus_id); -+ dev_name(&dev->dev)); - result = -ENXIO; - goto fail_request; - } -@@ -683,7 +688,7 @@ - dev->local = ioremap(regs_res->start, len); - if (!dev->local) { - printk(KERN_ERR "%s: Can't remap vlynq registers\n", -- dev->dev.bus_id); -+ dev_name(&dev->dev)); - result = -ENXIO; - goto fail_remap; - } -@@ -702,7 +707,7 @@ - platform_set_drvdata(pdev, dev); - - printk(KERN_INFO "%s: regs 0x%p, irq %d, mem 0x%p\n", -- dev->dev.bus_id, (void *)dev->regs_start, dev->irq, -+ dev_name(&dev->dev), (void *)dev->regs_start, dev->irq, - (void *)dev->mem_start); - - dev->dev_id = 0; diff --git a/target/linux/ar7/patches/500-serial_kludge.patch b/target/linux/ar7/patches/500-serial_kludge.patch deleted file mode 100644 index cc4e424ec..000000000 --- a/target/linux/ar7/patches/500-serial_kludge.patch +++ /dev/null @@ -1,40 +0,0 @@ ---- a/drivers/serial/8250.c -+++ b/drivers/serial/8250.c -@@ -286,6 +286,13 @@ static const struct serial8250_config ua - .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10, - .flags = UART_CAP_FIFO, - }, -+ [PORT_AR7] = { -+ .name = "TI-AR7", -+ .fifo_size = 16, -+ .tx_loadsz = 16, -+ .fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_00, -+ .flags = UART_CAP_FIFO | UART_CAP_AFE, -+ }, - }; - - #if defined (CONFIG_SERIAL_8250_AU1X00) -@@ -2687,7 +2694,11 @@ static void serial8250_console_putchar(s - { - struct uart_8250_port *up = (struct uart_8250_port *)port; - -+#ifdef CONFIG_AR7 -+ wait_for_xmitr(up, BOTH_EMPTY); -+#else - wait_for_xmitr(up, UART_LSR_THRE); -+#endif - serial_out(up, UART_TX, ch); - } - ---- a/include/linux/serial_core.h -+++ b/include/linux/serial_core.h -@@ -41,7 +41,8 @@ - #define PORT_XSCALE 15 - #define PORT_RM9000 16 /* PMC-Sierra RM9xxx internal UART */ - #define PORT_OCTEON 17 /* Cavium OCTEON internal UART */ --#define PORT_MAX_8250 17 /* max port ID */ -+#define PORT_AR7 18 /* TI AR7 internal UART */ -+#define PORT_MAX_8250 18 /* max port ID */ - - /* - * ARM specific type numbers. These are not currently guaranteed diff --git a/target/linux/ar7/patches/900-cpmac_multiqueue.patch b/target/linux/ar7/patches/900-cpmac_multiqueue.patch deleted file mode 100644 index 3df3d6832..000000000 --- a/target/linux/ar7/patches/900-cpmac_multiqueue.patch +++ /dev/null @@ -1,70 +0,0 @@ -This patch fixes the network driver cpmac.c for compilation with -configuration option CONFIG_NETDEVICES_MULTIQUEUE. - -These compiler warnings are fixed by the patch: -drivers/net/cpmac.c: In function 'cpmac_end_xmit': -drivers/net/cpmac.c:630: warning: passing argument 2 of 'netif_subqueue_stopped' makes pointer from integer without a cast -drivers/net/cpmac.c:641: warning: passing argument 2 of 'netif_subqueue_stopped' makes pointer from integer without a cast -drivers/net/cpmac.c: In function 'cpmac_probe': -drivers/net/cpmac.c:1128: warning: unused variable 'i' - -During runtime, the unpatched driver raises a fatal runtime exception. -This is fixed by calling __netif_subqueue_stopped instead -of netif_subqueue_stopped, too. - -Two additional code parts were modified for CONFIG_NETDEVICES_MULTIQUEUE -because other drivers do it in the same way. - - Signed-off-by: Stefan Weil - ---- a/drivers/net/cpmac.c -+++ b/drivers/net/cpmac.c -@@ -615,13 +615,13 @@ static void cpmac_end_xmit(struct net_de - - dev_kfree_skb_irq(desc->skb); - desc->skb = NULL; -- if (netif_subqueue_stopped(dev, queue)) -+ if (__netif_subqueue_stopped(dev, queue)) - netif_wake_subqueue(dev, queue); - } else { - if (netif_msg_tx_err(priv) && net_ratelimit()) - printk(KERN_WARNING - "%s: end_xmit: spurious interrupt\n", dev->name); -- if (netif_subqueue_stopped(dev, queue)) -+ if (__netif_subqueue_stopped(dev, queue)) - netif_wake_subqueue(dev, queue); - } - } -@@ -731,7 +731,6 @@ static void cpmac_clear_tx(struct net_de - - static void cpmac_hw_error(struct work_struct *work) - { -- int i; - struct cpmac_priv *priv = - container_of(work, struct cpmac_priv, reset_work); - -@@ -818,7 +817,6 @@ static irqreturn_t cpmac_irq(int irq, vo - - static void cpmac_tx_timeout(struct net_device *dev) - { -- int i; - struct cpmac_priv *priv = netdev_priv(dev); - - spin_lock(&priv->lock); -@@ -1097,7 +1095,7 @@ static int external_switch; - - static int __devinit cpmac_probe(struct platform_device *pdev) - { -- int rc, phy_id, i; -+ int rc, phy_id; - char *mdio_bus_id = "0"; - struct resource *mem; - struct cpmac_priv *priv; -@@ -1125,6 +1123,7 @@ static int __devinit cpmac_probe(struct - } - - dev = alloc_etherdev_mq(sizeof(*priv), CPMAC_QUEUES); -+ //~ dev = alloc_etherdev(sizeof(*priv)); - - if (!dev) { - printk(KERN_ERR "cpmac: Unable to allocate net_device\n"); diff --git a/target/linux/ar71xx/Makefile b/target/linux/ar71xx/Makefile index ab1dab582..74f409478 100644 --- a/target/linux/ar71xx/Makefile +++ b/target/linux/ar71xx/Makefile @@ -12,7 +12,7 @@ BOARDNAME:=Atheros AR71xx/AR7240/AR913x FEATURES:=squashfs jffs2 tgz CFLAGS:=-Os -pipe -mips32r2 -mtune=mips32r2 -funit-at-a-time -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/ar71xx/base-files/etc/uci-defaults/tl-wr1043nd b/target/linux/ar71xx/base-files/etc/uci-defaults/tl-wr1043nd new file mode 100644 index 000000000..1ff8cb44d --- /dev/null +++ b/target/linux/ar71xx/base-files/etc/uci-defaults/tl-wr1043nd @@ -0,0 +1,22 @@ +#!/bin/sh +# +# Copyright (C) 2010 OpenWrt.org +# + +. /lib/ar71xx.sh + +board=$(ar71xx_board_name) + +tlwr1043nd_set_wlan_led() { + uci batch < + * Copyright (C) 2008-2009 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * Parts of this file are based on Atheros' 2.6.15 BSP + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include + +#include +#include + +#include "dev-pb9x-pci.h" + +static struct ar71xx_pci_irq pb9x_pci_irqs[] __initdata = { + { + .slot = 0, + .pin = 1, + .irq = AR71XX_PCI_IRQ_DEV0, + } +}; + +void __init pb9x_pci_init(void) +{ + ar71xx_pci_init(ARRAY_SIZE(pb9x_pci_irqs), pb9x_pci_irqs); +} diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb9x-pci.h b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb9x-pci.h new file mode 100644 index 000000000..be53f0a66 --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-pb9x-pci.h @@ -0,0 +1,22 @@ +/* + * Atheros PB9x reference board PCI initialization + * + * Copyright (C) 2010 Felix Fietkau + * Copyright (C) 2008-2009 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#ifndef _AR71XX_DEV_PB9X_PCI_H +#define _AR71XX_DEV_PB9X_PCI_H + +#if defined(CONFIG_AR71XX_DEV_PB9X_PCI) +void pb9x_pci_init(void) __init; +#else +static inline void pb9x_pci_init(void) { } +#endif + +#endif /* _AR71XX_DEV_PB9X_PCI_H */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-usb.c b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-usb.c index 514ab3d7b..fb006c705 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/dev-usb.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/dev-usb.c @@ -128,10 +128,16 @@ static void __init ar7240_usb_setup(void) /* WAR for HW bug. Here it adjusts the duration between two SOFS */ ar71xx_usb_ctrl_wr(USB_CTRL_REG_FLADJ, 0x3); - ar71xx_ohci_device.resource = ar7240_ohci_resources; - ar71xx_ohci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources); - - platform_device_register(&ar71xx_ohci_device); + if (ar71xx_soc == AR71XX_SOC_AR7241 || ar71xx_soc == AR71XX_SOC_AR7242) { + ar71xx_ehci_data.is_ar91xx = 1; + ar71xx_ehci_device.resource = ar7240_ohci_resources; + ar71xx_ehci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources); + platform_device_register(&ar71xx_ehci_device); + } else { + ar71xx_ohci_device.resource = ar7240_ohci_resources; + ar71xx_ohci_device.num_resources = ARRAY_SIZE(ar7240_ohci_resources); + platform_device_register(&ar71xx_ohci_device); + } } static void __init ar91xx_usb_setup(void) @@ -153,6 +159,8 @@ void __init ar71xx_add_device_usb(void) { switch (ar71xx_soc) { case AR71XX_SOC_AR7240: + case AR71XX_SOC_AR7241: + case AR71XX_SOC_AR7242: ar7240_usb_setup(); break; diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c index 6aee4dc5c..f809deae5 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/devices.c @@ -84,8 +84,15 @@ struct platform_device ar71xx_mdio_device = { void __init ar71xx_add_device_mdio(u32 phy_mask) { - if (ar71xx_soc == AR71XX_SOC_AR7240) + switch (ar71xx_soc) { + case AR71XX_SOC_AR7240: + case AR71XX_SOC_AR7241: + case AR71XX_SOC_AR7242: ar71xx_mdio_data.is_ar7240 = 1; + break; + default: + break; + } ar71xx_mdio_data.phy_mask = phy_mask; @@ -333,6 +340,8 @@ static void __init ar71xx_init_eth_pll_data(unsigned int id) break; case AR71XX_SOC_AR7240: + case AR71XX_SOC_AR7241: + case AR71XX_SOC_AR7242: pll_10 = AR724X_PLL_VAL_10; pll_100 = AR724X_PLL_VAL_100; pll_1000 = AR724X_PLL_VAL_1000; @@ -427,6 +436,11 @@ void __init ar71xx_add_device_eth(unsigned int id) pdata->has_gbit = 1; break; + case AR71XX_SOC_AR7241: + case AR71XX_SOC_AR7242: + ar71xx_eth0_data.reset_bit |= AR724X_RESET_GE0_MDIO; + ar71xx_eth1_data.reset_bit |= AR724X_RESET_GE1_MDIO; + /* fall through */ case AR71XX_SOC_AR7240: pdata->ddr_flush = id ? ar724x_ddr_flush_ge1 : ar724x_ddr_flush_ge0; diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c index dd5b9bb8d..cdb614bbe 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/gpio.c @@ -162,6 +162,8 @@ void __init ar71xx_gpio_init(void) break; case AR71XX_SOC_AR7240: + case AR71XX_SOC_AR7241: + case AR71XX_SOC_AR7242: ar71xx_gpio_chip.ngpio = AR724X_GPIO_COUNT; break; diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c index 352548c4e..eecdd9f71 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/irq.c @@ -209,10 +209,16 @@ static void __init ar71xx_misc_irq_init(void) __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_ENABLE); __raw_writel(0, base + AR71XX_RESET_REG_MISC_INT_STATUS); - if (ar71xx_soc == AR71XX_SOC_AR7240) + switch (ar71xx_soc) { + case AR71XX_SOC_AR7240: + case AR71XX_SOC_AR7241: + case AR71XX_SOC_AR7242: ar71xx_misc_irq_chip.ack = ar724x_misc_irq_ack; - else + break; + default: ar71xx_misc_irq_chip.mask_ack = ar71xx_misc_irq_mask; + break; + } for (i = AR71XX_MISC_IRQ_BASE; i < AR71XX_MISC_IRQ_BASE + AR71XX_MISC_IRQ_COUNT; i++) { diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c new file mode 100644 index 000000000..b422c3ebf --- /dev/null +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-pb92.c @@ -0,0 +1,109 @@ +/* + * Atheros PB92 board support + * + * Copyright (C) 2010 Felix Fietkau + * Copyright (C) 2008-2009 Gabor Juhos + * Copyright (C) 2008 Imre Kaloz + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License version 2 as published + * by the Free Software Foundation. + */ + +#include +#include +#include + +#include "machtype.h" +#include "devices.h" +#include "dev-m25p80.h" +#include "dev-gpio-buttons.h" +#include "dev-pb9x-pci.h" +#include "dev-usb.h" + +#ifdef CONFIG_MTD_PARTITIONS +static struct mtd_partition pb92_partitions[] = { + { + .name = "u-boot", + .offset = 0, + .size = 0x040000, + .mask_flags = MTD_WRITEABLE, + } , { + .name = "u-boot-env", + .offset = 0x040000, + .size = 0x010000, + } , { + .name = "rootfs", + .offset = 0x050000, + .size = 0x2b0000, + } , { + .name = "uImage", + .offset = 0x300000, + .size = 0x0e0000, + } , { + .name = "ART", + .offset = 0x3e0000, + .size = 0x020000, + .mask_flags = MTD_WRITEABLE, + } +}; +#endif /* CONFIG_MTD_PARTITIONS */ + +static struct flash_platform_data pb92_flash_data = { +#ifdef CONFIG_MTD_PARTITIONS + .parts = pb92_partitions, + .nr_parts = ARRAY_SIZE(pb92_partitions), +#endif +}; + + +#define PB92_BUTTONS_POLL_INTERVAL 20 + +#define PB92_GPIO_BTN_SW4 8 +#define PB92_GPIO_BTN_SW5 3 + +static struct gpio_button pb92_gpio_buttons[] __initdata = { + { + .desc = "sw4", + .type = EV_KEY, + .code = BTN_0, + .threshold = 3, + .gpio = PB92_GPIO_BTN_SW4, + .active_low = 1, + } , { + .desc = "sw5", + .type = EV_KEY, + .code = BTN_1, + .threshold = 3, + .gpio = PB92_GPIO_BTN_SW5, + .active_low = 1, + } +}; + +static void __init pb92_init(void) +{ + u8 *mac = (u8 *) KSEG1ADDR(0x1fff0000); + + ar71xx_set_mac_base(mac); + ar71xx_add_device_m25p80(&pb92_flash_data); + + ar71xx_add_device_mdio(~0); + ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ar71xx_eth0_data.speed = SPEED_100; + ar71xx_eth0_data.duplex = DUPLEX_FULL; + + ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; + ar71xx_eth1_data.speed = SPEED_1000; + ar71xx_eth1_data.duplex = DUPLEX_FULL; + + ar71xx_add_device_eth(0); + ar71xx_add_device_eth(1); + + ar71xx_add_device_gpio_buttons(-1, PB92_BUTTONS_POLL_INTERVAL, + ARRAY_SIZE(pb92_gpio_buttons), + pb92_gpio_buttons); + + pb9x_pci_init(); +} + +MIPS_MACHINE(AR71XX_MACH_PB92, "PB92", "Atheros PB92", pb92_init); diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wrt400n.c b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wrt400n.c index 886f94728..5ed0b6058 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wrt400n.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/mach-wrt400n.c @@ -145,7 +145,6 @@ static void __init wrt400n_setup(void) ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ar71xx_eth0_data.speed = SPEED_100; ar71xx_eth0_data.duplex = DUPLEX_FULL; - ar71xx_eth0_data.has_ar8216 = 1; ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII; ar71xx_eth1_data.phy_mask = 0x10; diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/machtype.h b/target/linux/ar71xx/files/arch/mips/ar71xx/machtype.h index 419cbd412..a8679d97c 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/machtype.h +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/machtype.h @@ -32,6 +32,7 @@ enum ar71xx_mach_type { AR71XX_MACH_RB_750, /* MikroTik RouterBOARD 750 */ AR71XX_MACH_PB42, /* Atheros PB42 */ AR71XX_MACH_PB44, /* Atheros PB44 */ + AR71XX_MACH_PB92, /* Atheros PB92 */ AR71XX_MACH_MZK_W04NU, /* Planex MZK-W04NU */ AR71XX_MACH_MZK_W300NH, /* Planex MZK-W300NH */ AR71XX_MACH_TEW_632BRP, /* TRENDnet TEW-632BRP */ diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/pci.c b/target/linux/ar71xx/files/arch/mips/ar71xx/pci.c index 6a07697f0..3e1e8dbde 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/pci.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/pci.c @@ -52,6 +52,8 @@ int __init pcibios_map_irq(const struct pci_dev *dev, uint8_t slot, uint8_t pin) break; case AR71XX_SOC_AR7240: + case AR71XX_SOC_AR7241: + case AR71XX_SOC_AR7242: ret = ar724x_pcibios_map_irq(dev, slot, pin); break; @@ -75,6 +77,8 @@ int __init ar71xx_pci_init(unsigned nr_irqs, struct ar71xx_pci_irq *map) break; case AR71XX_SOC_AR7240: + case AR71XX_SOC_AR7241: + case AR71XX_SOC_AR7242: ret = ar724x_pcibios_init(); break; diff --git a/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c b/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c index 10e45af73..d89505f1b 100644 --- a/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c +++ b/target/linux/ar71xx/files/arch/mips/ar71xx/setup.c @@ -106,12 +106,24 @@ static void __init ar71xx_detect_sys_type(void) } break; - case REV_ID_MAJOR_AR724X: + case REV_ID_MAJOR_AR7240: ar71xx_soc = AR71XX_SOC_AR7240; chip = "7240"; rev = (id & AR724X_REV_ID_REVISION_MASK); break; + case REV_ID_MAJOR_AR7241: + ar71xx_soc = AR71XX_SOC_AR7241; + chip = "7241"; + rev = (id & AR724X_REV_ID_REVISION_MASK); + break; + + case REV_ID_MAJOR_AR7242: + ar71xx_soc = AR71XX_SOC_AR7242; + chip = "7242"; + rev = (id & AR724X_REV_ID_REVISION_MASK); + break; + case REV_ID_MAJOR_AR913X: minor = id & AR91XX_REV_ID_MINOR_MASK; rev = id >> AR91XX_REV_ID_REVISION_SHIFT; @@ -210,6 +222,8 @@ static void __init detect_sys_frequency(void) break; case AR71XX_SOC_AR7240: + case AR71XX_SOC_AR7241: + case AR71XX_SOC_AR7242: ar724x_detect_sys_frequency(); break; diff --git a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h index 31d2fd8e4..c6a5a4099 100644 --- a/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h +++ b/target/linux/ar71xx/files/arch/mips/include/asm/mach-ar71xx/ar71xx.h @@ -112,6 +112,8 @@ enum ar71xx_soc_type { AR71XX_SOC_AR7141, AR71XX_SOC_AR7161, AR71XX_SOC_AR7240, + AR71XX_SOC_AR7241, + AR71XX_SOC_AR7242, AR71XX_SOC_AR9130, AR71XX_SOC_AR9132 }; @@ -353,6 +355,7 @@ void ar71xx_ddr_flush(u32 reg); #define AR724X_PCI_REG_INT_MASK 0x50 #define AR724X_PCI_APP_LTSSM_ENABLE BIT(0) +#define AR724X_PCI_RESET_LINK_UP BIT(0) #define AR724X_PCI_INT_DEV0 BIT(14) @@ -424,14 +427,18 @@ void ar71xx_ddr_flush(u32 reg); #define RESET_MODULE_PCI_BUS BIT(1) #define RESET_MODULE_PCI_CORE BIT(0) +#define AR724X_RESET_GE1_MDIO BIT(23) +#define AR724X_RESET_GE0_MDIO BIT(22) #define AR724X_RESET_PCIE_PHY_SERIAL BIT(10) #define AR724X_RESET_PCIE_PHY BIT(7) #define AR724X_RESET_PCIE BIT(6) -#define REV_ID_MAJOR_MASK 0xf0 -#define REV_ID_MAJOR_AR71XX 0xa0 -#define REV_ID_MAJOR_AR913X 0xb0 -#define REV_ID_MAJOR_AR724X 0xc0 +#define REV_ID_MAJOR_MASK 0xfff0 +#define REV_ID_MAJOR_AR71XX 0x00a0 +#define REV_ID_MAJOR_AR913X 0x00b0 +#define REV_ID_MAJOR_AR7240 0x00c0 +#define REV_ID_MAJOR_AR7241 0x0100 +#define REV_ID_MAJOR_AR7242 0x1100 #define AR71XX_REV_ID_MINOR_MASK 0x3 #define AR71XX_REV_ID_MINOR_AR7130 0x0 diff --git a/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c b/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c index fd5221607..b63980619 100644 --- a/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c +++ b/target/linux/ar71xx/files/arch/mips/pci/pci-ar724x.c @@ -110,8 +110,12 @@ static int ar724x_pci_read_config(struct pci_bus *bus, unsigned int devfn, * WAR for BAR issue - We are unable to access the PCI device space * if we set the BAR with proper base address */ - if ((where == 0x10) && (size == 4)) - ar724x_pci_write(ar724x_pci_devcfg_base, where, size, 0xffff); + if ((where == 0x10) && (size == 4)) { + if (ar71xx_soc == AR71XX_SOC_AR7240) + ar724x_pci_write(ar724x_pci_devcfg_base, where, size, 0xffff); + else + ar724x_pci_write(ar724x_pci_devcfg_base, where, size, 0x1000ffff); + } return PCIBIOS_SUCCESSFUL; } @@ -237,17 +241,27 @@ static int __init ar724x_pci_setup(void) udelay(100000); } - __raw_writel(AR724X_PCI_APP_LTSSM_ENABLE, base + AR724X_PCI_REG_APP); + if (ar71xx_soc == AR71XX_SOC_AR7240) + t = AR724X_PCI_APP_LTSSM_ENABLE; + else + t = 0x1ffc1; + __raw_writel(t, base + AR724X_PCI_REG_APP); /* flush write */ (void) __raw_readl(base + AR724X_PCI_REG_APP); udelay(1000); - t = __raw_readl(base + AR724X_PCI_REG_APP); - if ((t & AR724X_PCI_APP_LTSSM_ENABLE) == 0x0) { + t = __raw_readl(base + AR724X_PCI_REG_RESET); + if ((t & AR724X_PCI_RESET_LINK_UP) == 0x0) { printk(KERN_WARNING "PCI: no PCIe module found\n"); return -ENODEV; } + if (ar71xx_soc == AR71XX_SOC_AR7241 || ar71xx_soc == AR71XX_SOC_AR7242) { + t = __raw_readl(base + AR724X_PCI_REG_APP); + t |= BIT(16); + __raw_writel(t, base + AR724X_PCI_REG_APP); + } + return 0; } diff --git a/target/linux/ar71xx/files/drivers/mtd/wrt160nl_part.c b/target/linux/ar71xx/files/drivers/mtd/wrt160nl_part.c index da54e0ff4..e42b3d401 100644 --- a/target/linux/ar71xx/files/drivers/mtd/wrt160nl_part.c +++ b/target/linux/ar71xx/files/drivers/mtd/wrt160nl_part.c @@ -123,12 +123,7 @@ static int wrt160nl_parse_partitions(struct mtd_info *master, goto free_hdr; } - kernel_len = uheader->ih_size / master->erasesize; - if (uheader->ih_size % master->erasesize) - kernel_len++; - - kernel_len++; - kernel_len *= master->erasesize; + kernel_len = le32_to_cpu(theader->offsets[1]) + sizeof(struct cybertan_header); trx_parts[0].name = "u-boot"; trx_parts[0].offset = 0; diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/Kconfig b/target/linux/ar71xx/files/drivers/net/ag71xx/Kconfig index 59bc6fffd..7db779e38 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/Kconfig +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/Kconfig @@ -25,7 +25,7 @@ config AG71XX_DEBUG_FS config AG71XX_AR8216_SUPPORT bool "special support for the Atheros AR8216 switch" default n - default y if AR71XX_MACH_WNR2000 || AR71XX_MACH_MZK_W04NU || AR71XX_MACH_WRT400N + default y if AR71XX_MACH_WNR2000 || AR71XX_MACH_MZK_W04NU help Say 'y' here if you want to enable special support for the Atheros AR8216 switch found on some boards. diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h index 5be89987b..c3137203f 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx.h @@ -456,6 +456,10 @@ static void inline ag71xx_mii_ctrl_set_speed(struct ag71xx *ag, #ifdef CONFIG_AG71XX_AR8216_SUPPORT void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb); int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb); +static inline int ag71xx_has_ar8216(struct ag71xx *ag) +{ + return ag71xx_get_pdata(ag)->has_ar8216; +} #else static inline void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb) @@ -467,6 +471,10 @@ static inline int ag71xx_remove_ar8216_header(struct ag71xx *ag, { return 0; } +static inline int ag71xx_has_ar8216(struct ag71xx *ag) +{ + return 0; +} #endif #ifdef CONFIG_AG71XX_DEBUG_FS diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar8216.c b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar8216.c index 5b3722651..564fae7eb 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar8216.c +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_ar8216.c @@ -20,27 +20,17 @@ void ag71xx_add_ar8216_header(struct ag71xx *ag, struct sk_buff *skb) { - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); - - if (!pdata->has_ar8216) - return; - - skb_push(skb, AR8216_HEADER_LEN); - skb->data[0] = 0x10; - skb->data[1] = 0x80; + skb_push(skb, AR8216_HEADER_LEN); + skb->data[0] = 0x10; + skb->data[1] = 0x80; } int ag71xx_remove_ar8216_header(struct ag71xx *ag, struct sk_buff *skb) { - struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag); u8 type; - if (!pdata->has_ar8216) - return 0; - type = skb->data[1] & AR8216_PACKET_TYPE_MASK; - switch (type) { case AR8216_PACKET_TYPE_NORMAL: skb_pull(skb, AR8216_HEADER_LEN); diff --git a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c index 4519ec8dc..989ed0e8a 100644 --- a/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c +++ b/target/linux/ar71xx/files/drivers/net/ag71xx/ag71xx_main.c @@ -614,7 +614,8 @@ static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb, if (!ag71xx_desc_empty(desc)) goto err_drop; - ag71xx_add_ar8216_header(ag, skb); + if (ag71xx_has_ar8216(ag)) + ag71xx_add_ar8216_header(ag, skb); if (skb->len <= 0) { DBG("%s: packet len is too small\n", ag->dev->name); @@ -758,6 +759,23 @@ static int ag71xx_tx_packets(struct ag71xx *ag) return sent; } +static int ag71xx_rx_copy_skb(struct ag71xx *ag, struct sk_buff **pskb, + int pktlen) +{ + struct sk_buff *copy_skb; + + copy_skb = netdev_alloc_skb(ag->dev, pktlen + NET_IP_ALIGN); + if (!copy_skb) + return -ENOMEM; + + skb_reserve(copy_skb, NET_IP_ALIGN); + skb_copy_from_linear_data(*pskb, copy_skb->data, pktlen); + dev_kfree_skb_any(*pskb); + *pskb = copy_skb; + + return 0; +} + static int ag71xx_rx_packets(struct ag71xx *ag, int limit) { struct net_device *dev = ag->dev; @@ -772,6 +790,7 @@ static int ag71xx_rx_packets(struct ag71xx *ag, int limit) struct ag71xx_desc *desc = ring->buf[i].desc; struct sk_buff *skb; int pktlen; + int err = 0; if (ag71xx_desc_empty(desc)) break; @@ -790,19 +809,23 @@ static int ag71xx_rx_packets(struct ag71xx *ag, int limit) dma_unmap_single(&dev->dev, ring->buf[i].dma_addr, AG71XX_RX_PKT_SIZE, DMA_FROM_DEVICE); - skb_put(skb, pktlen); - - skb->dev = dev; - skb->ip_summed = CHECKSUM_NONE; - dev->last_rx = jiffies; dev->stats.rx_packets++; dev->stats.rx_bytes += pktlen; - if (ag71xx_remove_ar8216_header(ag, skb) != 0) { + if (ag71xx_has_ar8216(ag)) + err = ag71xx_remove_ar8216_header(ag, skb); + else + err = ag71xx_rx_copy_skb(ag, &skb, pktlen); + + if (err) { dev->stats.rx_dropped++; kfree_skb(skb); } else { + skb_put(skb, pktlen); + + skb->dev = dev; + skb->ip_summed = CHECKSUM_NONE; skb->protocol = eth_type_trans(skb, dev); netif_receive_skb(skb); } @@ -926,6 +949,20 @@ static void ag71xx_set_multicast_list(struct net_device *dev) /* TODO */ } +#ifdef CONFIG_NET_POLL_CONTROLLER +/* + * Polling 'interrupt' - used by things like netconsole to send skbs + * without having to re-enable interrupts. It's not called while + * the interrupt routine is executing. + */ +static void ag71xx_netpoll(struct net_device *dev) +{ + disable_irq(dev->irq); + ag71xx_interrupt(dev->irq, dev); + enable_irq(dev->irq); +} +#endif + static const struct net_device_ops ag71xx_netdev_ops = { .ndo_open = ag71xx_open, .ndo_stop = ag71xx_stop, @@ -936,6 +973,9 @@ static const struct net_device_ops ag71xx_netdev_ops = { .ndo_change_mtu = eth_change_mtu, .ndo_set_mac_address = eth_mac_addr, .ndo_validate_addr = eth_validate_addr, +#ifdef CONFIG_NET_POLL_CONTROLLER + .ndo_poll_controller = ag71xx_netpoll, +#endif }; static int __init ag71xx_probe(struct platform_device *pdev) diff --git a/target/linux/ar71xx/image/Makefile b/target/linux/ar71xx/image/Makefile index c5d79935b..00580fd8a 100644 --- a/target/linux/ar71xx/image/Makefile +++ b/target/linux/ar71xx/image/Makefile @@ -200,6 +200,27 @@ define Image/Build/AP83 fi; fi endef +define Image/Build/PB92 + $(call PatchKernelGzip,$(2),$(3)) + if [ `stat -c%s $(KDIR)/root.$(1)` -gt 2818048 ]; then \ + echo "Warning: $(KDIR)/root.$(1) is too big"; \ + else \ + mkimage -A mips -O linux -T kernel -a 0x80060000 -C gzip -e \ + 0x80060000 \ + -n 'MIPS OpenWrt Linux-$(LINUX_VERSION)' \ + -d $(KDIR)/vmlinux-$(2).bin.gz \ + $(KDIR)/vmlinux-$(2).uImage; \ + dd if=$(KDIR)/vmlinux-$(2).uImage \ + of=$(call imgname,kernel,$(2)).bin bs=64k conv=sync; \ + dd if=$(KDIR)/root.$(1) \ + of=$(call imgname,$(1),$(2)-rootfs).bin bs=128k conv=sync; \ + ( \ + dd if=$(KDIR)/vmlinux-$(2).uImage bs=896k conv=sync; \ + dd if=$(KDIR)/root.$(1); \ + ) > $(call imgname,$(1),$(2))-sysupgrade.bin; \ + fi +endef + define Image/Build/PB4X $(call PatchKernelLzma,$(2),$(3)) dd if=$(KDIR)/vmlinux-$(2).bin.lzma \ @@ -289,7 +310,7 @@ endef define Image/Build/TPLINK/initramfs $(call PatchKernelGzip,$(2),$(3)) -$(STAGING_DIR_HOST)/bin/mktplinkfw -c \ - -B $(4) -N OpenWrt -V $(REVISION)\ + -B $(4) -N OpenWrt -V $(REVISION) -s \ -k $(KDIR)/vmlinux-$(2).bin.gz \ -o $(call imgname,$(1),$(2))-uImage.bin endef @@ -297,16 +318,12 @@ endef define Image/Build/CyberTAN $(call PatchKernelGzip,$(2),$(3)) $(call MkImageGzip,$(KDIR)/vmlinux-$(2).bin.gz,$(KDIR)/vmlinux-$(2).uImage) - ( \ - dd if=$(KDIR)/vmlinux-$(2).uImage bs=64k conv=sync; \ - dd if=/dev/zero bs=1 count=65476; \ - dd if=$(KDIR)/root.$(1) bs=64k; \ - ) > $(KDIR)/vmlinux-$(2).image - $(STAGING_DIR_HOST)/bin/trx -o $(KDIR)/vmlinux-$(2).trx \ - -f $(KDIR)/vmlinux-$(2).image - -$(STAGING_DIR_HOST)/bin/addpattern -B $(2) -v v$(4) -g \ - -i $(KDIR)/vmlinux-$(2).trx \ + $(STAGING_DIR_HOST)/bin/trx -o $(KDIR)/image.tmp -f $(KDIR)/vmlinux-$(2).uImage \ + -x 32 -a 0x10000 -x -32 -f $(KDIR)/root.$(1) + -$(STAGING_DIR_HOST)/bin/addpattern -B $(2) -v v$(4) \ + -i $(KDIR)/image.tmp \ -o $(call imgname,$(1),$(2)).bin + rm $(KDIR)/image.tmp endef wndr3700_mtdlayout=mtdparts=spi0.0:320k(u-boot)ro,128k(u-boot-env)ro,1024k(kernel),6656k(rootfs),64k(art)ro,7680k@0x70000(firmware) @@ -404,6 +421,10 @@ define Image/Build/Profile/PB44 $(call Image/Build/Template/$(fs_64k)/$(1),PB4X,pb44,board=PB44) endef +define Image/Build/Profile/PB92 + $(call Image/Build/Template/$(fs_64k)/$(1),PB92,pb92,board=PB92) +endef + define Image/Build/Profile/WP543 $(call Image/Build/Template/$(fs_64k)/$(1),MyLoader,wp543,0x200000,2M) $(call Image/Build/Template/$(fs_64k)/$(1),MyLoader,wp543,0x400000,4M) @@ -536,6 +557,7 @@ define Image/Build/Profile/Default $(call Image/Build/Profile/MZKW300NH,$(1)) $(call Image/Build/Profile/PB42,$(1)) $(call Image/Build/Profile/PB44,$(1)) + $(call Image/Build/Profile/PB92,$(1)) $(call Image/Build/Profile/TEW632BRP,$(1)) $(call Image/Build/Profile/TEW652BRP,$(1)) $(call Image/Build/Profile/TLWR741NDV1,$(1)) diff --git a/target/linux/atheros/config-2.6.31 b/target/linux/atheros/config-2.6.31 deleted file mode 100644 index 6307a550f..000000000 --- a/target/linux/atheros/config-2.6.31 +++ /dev/null @@ -1,154 +0,0 @@ -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_ADM6996_PHY=y -# CONFIG_ALCHEMY_GPIO_INDIRECT is not set -CONFIG_AR231X_ETHERNET=y -# CONFIG_AR7 is not set -CONFIG_AR8216_PHY=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_POPULATES_NODE_MAP=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ATHEROS_AR2315=y -CONFIG_ATHEROS_AR2315_PCI=y -CONFIG_ATHEROS_AR231X=y -CONFIG_ATHEROS_AR5312=y -CONFIG_ATHEROS_WDT=y -# CONFIG_BCM47XX is not set -CONFIG_BITREVERSE=y -# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set -# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set -CONFIG_CEVT_R4K=y -CONFIG_CEVT_R4K_LIB=y -CONFIG_CMDLINE="console=ttyS0,9600 rootfstype=squashfs,jffs2" -CONFIG_CPU_BIG_ENDIAN=y -# CONFIG_CPU_CAVIUM_OCTEON is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -# CONFIG_CPU_LITTLE_ENDIAN is not set -# CONFIG_CPU_LOONGSON2 is not set -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5500 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -CONFIG_CSRC_R4K=y -CONFIG_CSRC_R4K_LIB=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DEVPORT=y -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_EARLY_PRINTK=y -# CONFIG_FSNOTIFY is not set -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_GPIO_DEVICE=y -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_HAVE_IDE=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IP175C_PHY=y -CONFIG_IRQ_CPU=y -# CONFIG_LEDS_GPIO is not set -# CONFIG_LEMOTE_FULONG is not set -CONFIG_MAC80211_DEFAULT_PS_VALUE=0 -# CONFIG_MACH_ALCHEMY is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_MIKROTIK_RB532 is not set -CONFIG_MIPS=y -# CONFIG_MIPS_COBALT is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_MACHINE is not set -# CONFIG_MIPS_MALTA is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_SIM is not set -CONFIG_MTD_AR2315=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -# CONFIG_MTD_CFI_GEOMETRY is not set -# CONFIG_MTD_CFI_INTELEXT is not set -CONFIG_MTD_MYLOADER_PARTS=y -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-3 -CONFIG_MTD_REDBOOT_PARTS=y -CONFIG_MVSWITCH_PHY=y -# CONFIG_NET_PCI is not set -# CONFIG_NO_IOPORT is not set -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PHYLIB=y -# CONFIG_PMC_MSP is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_PROBE_INITRD_HEADER is not set -CONFIG_SCHED_OMIT_FRAME_POINTER=y -# CONFIG_SCSI_DMA is not set -# CONFIG_SERIAL_8250_EXTENDED is not set -CONFIG_SERIAL_8250_NR_UARTS=1 -CONFIG_SERIAL_8250_RUNTIME_UARTS=1 -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -CONFIG_SWCONFIG=y -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_TRAD_SIGNALS=y -CONFIG_USB_SUPPORT=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/atheros/patches-2.6.31/001-get_c0_compare_int_fix.patch b/target/linux/atheros/patches-2.6.31/001-get_c0_compare_int_fix.patch deleted file mode 100644 index 43da96c3f..000000000 --- a/target/linux/atheros/patches-2.6.31/001-get_c0_compare_int_fix.patch +++ /dev/null @@ -1,39 +0,0 @@ -Fix the usage of get_c0_compare_int: override cp0_compare_irq if the returned -value is in the MIPS CPU IRQ range to ensure that c0_compare_int_usable() -still works. - -Signed-off-by: Felix Fietkau - ---- a/arch/mips/kernel/cevt-r4k.c -+++ b/arch/mips/kernel/cevt-r4k.c -@@ -168,20 +168,23 @@ int __cpuinit r4k_clockevent_init(void) - struct clock_event_device *cd; - unsigned int irq; - -- if (!cpu_has_counter || !mips_hpt_frequency) -- return -ENXIO; -- -- if (!c0_compare_int_usable()) -- return -ENXIO; -- - /* - * With vectored interrupts things are getting platform specific. - * get_c0_compare_int is a hook to allow a platform to return the - * interrupt number of it's liking. - */ - irq = MIPS_CPU_IRQ_BASE + cp0_compare_irq; -- if (get_c0_compare_int) -+ if (get_c0_compare_int) { - irq = get_c0_compare_int(); -+ if ((irq >= MIPS_CPU_IRQ_BASE) && (irq < MIPS_CPU_IRQ_BASE + 8)) -+ cp0_compare_irq = irq - MIPS_CPU_IRQ_BASE; -+ } -+ -+ if (!cpu_has_counter || !mips_hpt_frequency) -+ return -ENXIO; -+ -+ if (!c0_compare_int_usable()) -+ return -ENXIO; - - cd = &per_cpu(mips_clockevent_device, cpu); - diff --git a/target/linux/atheros/patches-2.6.31/002-mips_clocksource_init_war.patch b/target/linux/atheros/patches-2.6.31/002-mips_clocksource_init_war.patch deleted file mode 100644 index 894eed1e5..000000000 --- a/target/linux/atheros/patches-2.6.31/002-mips_clocksource_init_war.patch +++ /dev/null @@ -1,56 +0,0 @@ ---- a/arch/mips/kernel/cevt-r4k.c -+++ b/arch/mips/kernel/cevt-r4k.c -@@ -16,6 +16,22 @@ - #include - - /* -+ * Compare interrupt can be routed and latched outside the core, -+ * so a single execution hazard barrier may not be enough to give -+ * it time to clear as seen in the Cause register. 4 time the -+ * pipeline depth seems reasonably conservative, and empirically -+ * works better in configurations with high CPU/bus clock ratios. -+ */ -+ -+#define compare_change_hazard() \ -+ do { \ -+ irq_disable_hazard(); \ -+ irq_disable_hazard(); \ -+ irq_disable_hazard(); \ -+ irq_disable_hazard(); \ -+ } while (0) -+ -+/* - * The SMTC Kernel for the 34K, 1004K, et. al. replaces several - * of these routines with SMTC-specific variants. - */ -@@ -31,6 +47,7 @@ static int mips_next_event(unsigned long - cnt = read_c0_count(); - cnt += delta; - write_c0_compare(cnt); -+ compare_change_hazard(); - res = ((int)(read_c0_count() - cnt) > 0) ? -ETIME : 0; - return res; - } -@@ -100,22 +117,6 @@ static int c0_compare_int_pending(void) - return (read_c0_cause() >> cp0_compare_irq) & 0x100; - } - --/* -- * Compare interrupt can be routed and latched outside the core, -- * so a single execution hazard barrier may not be enough to give -- * it time to clear as seen in the Cause register. 4 time the -- * pipeline depth seems reasonably conservative, and empirically -- * works better in configurations with high CPU/bus clock ratios. -- */ -- --#define compare_change_hazard() \ -- do { \ -- irq_disable_hazard(); \ -- irq_disable_hazard(); \ -- irq_disable_hazard(); \ -- irq_disable_hazard(); \ -- } while (0) -- - int c0_compare_int_usable(void) - { - unsigned int delta; diff --git a/target/linux/atheros/patches-2.6.31/100-board.patch b/target/linux/atheros/patches-2.6.31/100-board.patch deleted file mode 100644 index e54a47032..000000000 --- a/target/linux/atheros/patches-2.6.31/100-board.patch +++ /dev/null @@ -1,3124 +0,0 @@ ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -80,6 +80,19 @@ config BCM47XX - help - Support for BCM47XX based boards - -+config ATHEROS_AR231X -+ bool "Atheros 231x/531x SoC support" -+ select CEVT_R4K -+ select CSRC_R4K -+ select DMA_NONCOHERENT -+ select IRQ_CPU -+ select SYS_HAS_CPU_MIPS32_R1 -+ select SYS_SUPPORTS_BIG_ENDIAN -+ select SYS_SUPPORTS_32BIT_KERNEL -+ select GENERIC_GPIO -+ help -+ Support for AR231x and AR531x based boards -+ - config MIPS_COBALT - bool "Cobalt Server" - select CEVT_R4K -@@ -658,6 +671,7 @@ config CAVIUM_OCTEON_REFERENCE_BOARD - - endchoice - -+source "arch/mips/ar231x/Kconfig" - source "arch/mips/alchemy/Kconfig" - source "arch/mips/basler/excite/Kconfig" - source "arch/mips/jazz/Kconfig" ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -292,6 +292,13 @@ cflags-$(CONFIG_SOC_AU1X00) += -I$(srctr - - - # -+# Atheros AR5312/AR2312 WiSoC -+# -+core-$(CONFIG_ATHEROS_AR231X) += arch/mips/ar231x/ -+cflags-$(CONFIG_ATHEROS_AR231X) += -I$(srctree)/arch/mips/include/asm/mach-ar231x -+load-$(CONFIG_ATHEROS_AR231X) += 0xffffffff80041000 -+ -+# - # Cobalt Server - # - core-$(CONFIG_MIPS_COBALT) += arch/mips/cobalt/ ---- /dev/null -+++ b/arch/mips/ar231x/Kconfig -@@ -0,0 +1,17 @@ -+config ATHEROS_AR5312 -+ bool "Atheros 5312/2312+ support" -+ depends on ATHEROS_AR231X -+ default y -+ -+config ATHEROS_AR2315 -+ bool "Atheros 2315+ support" -+ depends on ATHEROS_AR231X -+ select DMA_NONCOHERENT -+ select CEVT_R4K -+ select CSRC_R4K -+ select IRQ_CPU -+ select SYS_HAS_CPU_MIPS32_R1 -+ select SYS_SUPPORTS_32BIT_KERNEL -+ select SYS_SUPPORTS_BIG_ENDIAN -+ select GENERIC_GPIO -+ default y ---- /dev/null -+++ b/arch/mips/ar231x/Makefile -@@ -0,0 +1,13 @@ -+# -+# This file is subject to the terms and conditions of the GNU General Public -+# License. See the file "COPYING" in the main directory of this archive -+# for more details. -+# -+# Copyright (C) 2006 FON Technology, SL. -+# Copyright (C) 2006 Imre Kaloz -+# Copyright (C) 2006-2009 Felix Fietkau -+# -+ -+obj-y += board.o prom.o devices.o -+obj-$(CONFIG_ATHEROS_AR5312) += ar5312.o -+obj-$(CONFIG_ATHEROS_AR2315) += ar2315.o ---- /dev/null -+++ b/arch/mips/ar231x/board.c -@@ -0,0 +1,251 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved. -+ * Copyright (C) 2006 FON Technology, SL. -+ * Copyright (C) 2006 Imre Kaloz -+ * Copyright (C) 2006-2009 Felix Fietkau -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include "devices.h" -+#include "ar5312.h" -+#include "ar2315.h" -+ -+void (*ar231x_irq_dispatch)(void); -+ -+static inline bool -+check_radio_magic(u8 *addr) -+{ -+ addr += 0x7a; /* offset for flash magic */ -+ if ((addr[0] == 0x5a) && (addr[1] == 0xa5)) { -+ return 1; -+ } -+ return 0; -+} -+ -+static inline bool -+check_board_data(u8 *flash_limit, u8 *addr, bool broken) -+{ -+ /* config magic found */ -+ if (*((u32 *)addr) == AR531X_BD_MAGIC) -+ return 1; -+ -+ if (!broken) -+ return 0; -+ -+ if (check_radio_magic(addr + 0xf8)) -+ ar231x_board.radio = addr + 0xf8; -+ if ((addr < flash_limit + 0x10000) && -+ check_radio_magic(addr + 0x10000)) -+ ar231x_board.radio = addr + 0x10000; -+ -+ if (ar231x_board.radio) { -+ /* broken board data detected, use radio data to find the offset, -+ * user will fix this */ -+ return 1; -+ } -+ return 0; -+} -+ -+static u8 * -+find_board_config(u8 *flash_limit, bool broken) -+{ -+ u8 *addr; -+ int found = 0; -+ -+ for (addr = flash_limit - 0x1000; -+ addr >= flash_limit - 0x30000; -+ addr -= 0x1000) { -+ -+ if (check_board_data(flash_limit, addr, broken)) { -+ found = 1; -+ break; -+ } -+ } -+ -+ if (!found) -+ addr = NULL; -+ -+ return addr; -+} -+ -+static u8 * -+find_radio_config(u8 *flash_limit, u8 *board_config) -+{ -+ int found; -+ u8 *radio_config; -+ -+ /* -+ * Now find the start of Radio Configuration data, using heuristics: -+ * Search forward from Board Configuration data by 0x1000 bytes -+ * at a time until we find non-0xffffffff. -+ */ -+ found = 0; -+ for (radio_config = board_config + 0x1000; -+ (radio_config < flash_limit); -+ radio_config += 0x1000) { -+ if ((*(u32 *)radio_config != 0xffffffff) && -+ check_radio_magic(radio_config)) { -+ found = 1; -+ break; -+ } -+ } -+ -+ /* AR2316 relocates radio config to new location */ -+ if (!found) { -+ for (radio_config = board_config + 0xf8; -+ (radio_config < flash_limit - 0x1000 + 0xf8); -+ radio_config += 0x1000) { -+ if ((*(u32 *)radio_config != 0xffffffff) && -+ check_radio_magic(radio_config)) { -+ found = 1; -+ break; -+ } -+ } -+ } -+ -+ if (!found) { -+ printk("Could not find Radio Configuration data\n"); -+ radio_config = 0; -+ } -+ -+ return (u8 *) radio_config; -+} -+ -+int __init -+ar231x_find_config(u8 *flash_limit) -+{ -+ struct ar231x_boarddata *config; -+ unsigned int rcfg_size; -+ int broken_boarddata = 0; -+ u8 *bcfg, *rcfg; -+ u8 *board_data; -+ u8 *radio_data; -+ u32 offset; -+ -+ ar231x_board.config = NULL; -+ ar231x_board.radio = NULL; -+ /* Copy the board and radio data to RAM, because accessing the mapped -+ * memory of the flash directly after booting is not safe */ -+ -+ /* Try to find valid board and radio data */ -+ bcfg = find_board_config(flash_limit, false); -+ -+ /* If that fails, try to at least find valid radio data */ -+ if (!bcfg) { -+ bcfg = find_board_config(flash_limit, true); -+ broken_boarddata = 1; -+ } -+ -+ if (!bcfg) { -+ printk(KERN_WARNING "WARNING: No board configuration data found!\n"); -+ return -ENODEV; -+ } -+ -+ board_data = kzalloc(BOARD_CONFIG_BUFSZ, GFP_KERNEL); -+ ar231x_board.config = (struct ar231x_boarddata *) board_data; -+ memcpy(board_data, bcfg, 0x100); -+ if (broken_boarddata) { -+ printk(KERN_WARNING "WARNING: broken board data detected\n"); -+ config = ar231x_board.config; -+ if (!memcmp(config->enet0_mac, "\x00\x00\x00\x00\x00\x00", 6)) { -+ printk(KERN_INFO "Fixing up empty mac addresses\n"); -+ config->resetConfigGpio = 0xffff; -+ config->sysLedGpio = 0xffff; -+ random_ether_addr(config->wlan0_mac); -+ config->wlan0_mac[0] &= ~0x06; -+ random_ether_addr(config->enet0_mac); -+ random_ether_addr(config->enet1_mac); -+ } -+ } -+ -+ -+ /* Radio config starts 0x100 bytes after board config, regardless -+ * of what the physical layout on the flash chip looks like */ -+ -+ if (ar231x_board.radio) -+ rcfg = (u8 *) ar231x_board.radio; -+ else -+ rcfg = find_radio_config(flash_limit, bcfg); -+ -+ if (!rcfg) -+ return -ENODEV; -+ -+ radio_data = board_data + 0x100 + ((rcfg - bcfg) & 0xfff); -+ ar231x_board.radio = radio_data; -+ offset = radio_data - board_data; -+ printk(KERN_INFO "Radio config found at offset 0x%x(0x%x)\n", rcfg - bcfg, offset); -+ rcfg_size = BOARD_CONFIG_BUFSZ - offset; -+ memcpy(radio_data, rcfg, rcfg_size); -+ -+ return 0; -+} -+ -+static void -+ar231x_halt(void) -+{ -+ local_irq_disable(); -+ while (1); -+} -+ -+void __init -+plat_mem_setup(void) -+{ -+ _machine_halt = ar231x_halt; -+ pm_power_off = ar231x_halt; -+ -+ ar5312_plat_setup(); -+ ar2315_plat_setup(); -+ -+ /* Disable data watchpoints */ -+ write_c0_watchlo0(0); -+} -+ -+ -+asmlinkage void -+plat_irq_dispatch(void) -+{ -+ ar231x_irq_dispatch(); -+} -+ -+void __init -+plat_time_init(void) -+{ -+ ar5312_time_init(); -+ ar2315_time_init(); -+} -+ -+unsigned int __cpuinit -+get_c0_compare_int(void) -+{ -+ return CP0_LEGACY_COMPARE_IRQ; -+} -+ -+void __init -+arch_init_irq(void) -+{ -+ clear_c0_status(ST0_IM); -+ mips_cpu_irq_init(); -+ -+ /* Initialize interrupt controllers */ -+ ar5312_irq_init(); -+ ar2315_irq_init(); -+} -+ -+ ---- /dev/null -+++ b/arch/mips/ar231x/prom.c -@@ -0,0 +1,37 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright MontaVista Software Inc -+ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved. -+ * Copyright (C) 2006 FON Technology, SL. -+ * Copyright (C) 2006 Imre Kaloz -+ * Copyright (C) 2006 Felix Fietkau -+ */ -+ -+/* -+ * Prom setup file for ar531x -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include "ar5312.h" -+#include "ar2315.h" -+ -+void __init prom_init(void) -+{ -+ ar5312_prom_init(); -+ ar2315_prom_init(); -+} -+ -+void __init prom_free_prom_memory(void) -+{ -+} ---- /dev/null -+++ b/arch/mips/include/asm/mach-ar231x/ar231x_platform.h -@@ -0,0 +1,83 @@ -+#ifndef __AR531X_PLATFORM_H -+#define __AR531X_PLATFORM_H -+ -+/* -+ * This is board-specific data that is stored in a "fixed" location in flash. -+ * It is shared across operating systems, so it should not be changed lightly. -+ * The main reason we need it is in order to extract the ethernet MAC -+ * address(es). -+ */ -+struct ar231x_boarddata { -+ u32 magic; /* board data is valid */ -+#define AR531X_BD_MAGIC 0x35333131 /* "5311", for all 531x platforms */ -+ u16 cksum; /* checksum (starting with BD_REV 2) */ -+ u16 rev; /* revision of this struct */ -+#define BD_REV 4 -+ char boardName[64]; /* Name of board */ -+ u16 major; /* Board major number */ -+ u16 minor; /* Board minor number */ -+ u32 flags; /* Board configuration */ -+#define BD_ENET0 0x00000001 /* ENET0 is stuffed */ -+#define BD_ENET1 0x00000002 /* ENET1 is stuffed */ -+#define BD_UART1 0x00000004 /* UART1 is stuffed */ -+#define BD_UART0 0x00000008 /* UART0 is stuffed (dma) */ -+#define BD_RSTFACTORY 0x00000010 /* Reset factory defaults stuffed */ -+#define BD_SYSLED 0x00000020 /* System LED stuffed */ -+#define BD_EXTUARTCLK 0x00000040 /* External UART clock */ -+#define BD_CPUFREQ 0x00000080 /* cpu freq is valid in nvram */ -+#define BD_SYSFREQ 0x00000100 /* sys freq is set in nvram */ -+#define BD_WLAN0 0x00000200 /* Enable WLAN0 */ -+#define BD_MEMCAP 0x00000400 /* CAP SDRAM @ memCap for testing */ -+#define BD_DISWATCHDOG 0x00000800 /* disable system watchdog */ -+#define BD_WLAN1 0x00001000 /* Enable WLAN1 (ar5212) */ -+#define BD_ISCASPER 0x00002000 /* FLAG for AR2312 */ -+#define BD_WLAN0_2G_EN 0x00004000 /* FLAG for radio0_2G */ -+#define BD_WLAN0_5G_EN 0x00008000 /* FLAG for radio0_2G */ -+#define BD_WLAN1_2G_EN 0x00020000 /* FLAG for radio0_2G */ -+#define BD_WLAN1_5G_EN 0x00040000 /* FLAG for radio0_2G */ -+ u16 resetConfigGpio; /* Reset factory GPIO pin */ -+ u16 sysLedGpio; /* System LED GPIO pin */ -+ -+ u32 cpuFreq; /* CPU core frequency in Hz */ -+ u32 sysFreq; /* System frequency in Hz */ -+ u32 cntFreq; /* Calculated C0_COUNT frequency */ -+ -+ u8 wlan0_mac[6]; -+ u8 enet0_mac[6]; -+ u8 enet1_mac[6]; -+ -+ u16 pciId; /* Pseudo PCIID for common code */ -+ u16 memCap; /* cap bank1 in MB */ -+ -+ /* version 3 */ -+ u8 wlan1_mac[6]; /* (ar5212) */ -+}; -+ -+#define BOARD_CONFIG_BUFSZ 0x1000 -+ -+/* -+ * Platform device information for the Wireless MAC -+ */ -+struct ar231x_board_config { -+ u16 devid; -+ -+ /* board config data */ -+ struct ar231x_boarddata *config; -+ -+ /* radio calibration data */ -+ const char *radio; -+}; -+ -+/* -+ * Platform device information for the Ethernet MAC -+ */ -+struct ar231x_eth { -+ u32 reset_base; -+ u32 reset_mac; -+ u32 reset_phy; -+ u32 phy_base; -+ struct ar231x_board_config *config; -+ char *macaddr; -+}; -+ -+#endif /* __AR531X_PLATFORM_H */ ---- /dev/null -+++ b/arch/mips/include/asm/mach-ar231x/cpu-feature-overrides.h -@@ -0,0 +1,84 @@ -+/* -+ * Atheros SoC specific CPU feature overrides -+ * -+ * Copyright (C) 2008 Gabor Juhos -+ * -+ * This file was derived from: include/asm-mips/cpu-features.h -+ * Copyright (C) 2003, 2004 Ralf Baechle -+ * Copyright (C) 2004 Maciej W. Rozycki -+ * -+ * This program is free software; you can redistribute it and/or modify it -+ * under the terms of the GNU General Public License version 2 as published -+ * by the Free Software Foundation. -+ * -+ */ -+#ifndef __ASM_MACH_ATHEROS_CPU_FEATURE_OVERRIDES_H -+#define __ASM_MACH_ATHEROS_CPU_FEATURE_OVERRIDES_H -+ -+/* -+ * The ATHEROS SoCs have MIPS 4Kc/4KEc core. -+ */ -+#define cpu_has_tlb 1 -+#define cpu_has_4kex 1 -+#define cpu_has_3k_cache 0 -+#define cpu_has_4k_cache 1 -+#define cpu_has_tx39_cache 0 -+#define cpu_has_sb1_cache 0 -+#define cpu_has_fpu 0 -+#define cpu_has_32fpr 0 -+#define cpu_has_counter 1 -+/* #define cpu_has_watch ? */ -+/* #define cpu_has_divec ? */ -+/* #define cpu_has_vce ? */ -+/* #define cpu_has_cache_cdex_p ? */ -+/* #define cpu_has_cache_cdex_s ? */ -+/* #define cpu_has_prefetch ? */ -+/* #define cpu_has_mcheck ? */ -+#define cpu_has_ejtag 1 -+ -+#if !defined(CONFIG_ATHEROS_AR5312) -+# define cpu_has_llsc 1 -+#else -+/* -+ * The MIPS 4Kc V0.9 core in the AR5312/AR2312 have problems with the -+ * ll/sc instructions. -+ */ -+# define cpu_has_llsc 0 -+#endif -+ -+#define cpu_has_mips16 0 -+#define cpu_has_mdmx 0 -+#define cpu_has_mips3d 0 -+#define cpu_has_smartmips 0 -+ -+/* #define cpu_has_vtag_icache ? */ -+/* #define cpu_has_dc_aliases ? */ -+/* #define cpu_has_ic_fills_f_dc ? */ -+/* #define cpu_has_pindexed_dcache ? */ -+ -+/* #define cpu_icache_snoops_remote_store ? */ -+ -+#define cpu_has_mips32r1 1 -+ -+#if !defined(CONFIG_ATHEROS_AR5312) -+# define cpu_has_mips32r2 1 -+#endif -+ -+#define cpu_has_mips64r1 0 -+#define cpu_has_mips64r2 0 -+ -+#define cpu_has_dsp 0 -+#define cpu_has_mipsmt 0 -+ -+/* #define cpu_has_nofpuex ? */ -+#define cpu_has_64bits 0 -+#define cpu_has_64bit_zero_reg 0 -+#define cpu_has_64bit_gp_regs 0 -+#define cpu_has_64bit_addresses 0 -+ -+/* #define cpu_has_inclusive_pcaches ? */ -+ -+/* #define cpu_dcache_line_size() ? */ -+/* #define cpu_icache_line_size() ? */ -+ -+#endif /* __ASM_MACH_ATHEROS_CPU_FEATURE_OVERRIDES_H */ ---- /dev/null -+++ b/arch/mips/include/asm/mach-ar231x/dma-coherence.h -@@ -0,0 +1,64 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2006 Ralf Baechle -+ * Copyright (C) 2007 Felix Fietkau -+ * -+ */ -+#ifndef __ASM_MACH_GENERIC_DMA_COHERENCE_H -+#define __ASM_MACH_GENERIC_DMA_COHERENCE_H -+ -+#define PCI_DMA_OFFSET 0x20000000 -+ -+struct device; -+ -+static dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, size_t size) -+{ -+ return virt_to_phys(addr) + (dev != NULL ? PCI_DMA_OFFSET : 0); -+} -+ -+static dma_addr_t plat_map_dma_mem_page(struct device *dev, struct page *page) -+{ -+ return page_to_phys(page) + (dev != NULL ? PCI_DMA_OFFSET : 0); -+} -+ -+static inline unsigned long plat_dma_addr_to_phys(struct device *dev, -+ dma_addr_t dma_addr) -+{ -+ return (dma_addr > PCI_DMA_OFFSET ? dma_addr - PCI_DMA_OFFSET : dma_addr); -+} -+ -+static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr, -+ size_t size, enum dma_data_direction direction) -+{ -+} -+ -+static inline int plat_dma_supported(struct device *dev, u64 mask) -+{ -+ return 1; -+} -+ -+static inline void plat_extra_sync_for_device(struct device *dev) -+{ -+ return; -+} -+ -+static inline int plat_dma_mapping_error(struct device *dev, -+ dma_addr_t dma_addr) -+{ -+ return 0; -+} -+ -+static inline int plat_device_is_coherent(struct device *dev) -+{ -+#ifdef CONFIG_DMA_COHERENT -+ return 1; -+#endif -+#ifdef CONFIG_DMA_NONCOHERENT -+ return 0; -+#endif -+} -+ -+#endif /* __ASM_MACH_GENERIC_DMA_COHERENCE_H */ ---- /dev/null -+++ b/arch/mips/include/asm/mach-ar231x/gpio.h -@@ -0,0 +1,79 @@ -+#ifndef _ATHEROS_GPIO_H_ -+#define _ATHEROS_GPIO_H_ -+ -+#include -+ -+struct ar231x_gpiodev { -+ u32 valid_mask; -+ u32 (*get_output)(void); -+ u32 (*set_output)(u32 mask, u32 val); -+ u32 (*get)(void); -+ u32 (*set)(u32 mask, u32 val); -+}; -+ -+extern const struct ar231x_gpiodev *ar231x_gpiodev; -+ -+/* -+ * Wrappers for the generic GPIO layer -+ */ -+ -+static inline int gpio_direction_input(unsigned gpio) { -+ u32 mask = 1 << gpio; -+ -+ if (!(ar231x_gpiodev->valid_mask & mask)) -+ return -ENXIO; -+ -+ ar231x_gpiodev->set_output(mask, 0); -+ return 0; -+} -+ -+static inline void gpio_set_value(unsigned gpio, int value) { -+ u32 mask = 1 << gpio; -+ -+ if (!(ar231x_gpiodev->valid_mask & mask)) -+ return; -+ -+ ar231x_gpiodev->set(mask, (!!value) * mask); -+} -+ -+static inline int gpio_direction_output(unsigned gpio, int value) { -+ u32 mask = 1 << gpio; -+ -+ if (!(ar231x_gpiodev->valid_mask & mask)) -+ return -ENXIO; -+ -+ ar231x_gpiodev->set_output(mask, mask); -+ ar231x_gpiodev->set(mask, (!!value) * mask); -+ return 0; -+} -+ -+/* Reads the gpio pin. Unchecked function */ -+static inline int gpio_get_value(unsigned gpio) { -+ u32 mask = 1 << gpio; -+ -+ if (!(ar231x_gpiodev->valid_mask & mask)) -+ return 0; -+ -+ return !!(ar231x_gpiodev->get() & mask); -+} -+ -+static inline int gpio_request(unsigned gpio, const char *label) { -+ return 0; -+} -+ -+static inline void gpio_free(unsigned gpio) { -+} -+ -+/* Returns IRQ to attach for gpio. Unchecked function */ -+static inline int gpio_to_irq(unsigned gpio) { -+ return AR531X_GPIO_IRQ(gpio); -+} -+ -+/* Returns gpio for IRQ attached. Unchecked function */ -+static inline int irq_to_gpio(unsigned irq) { -+ return (irq - (AR531X_GPIO_IRQ(0))); -+} -+ -+#include /* cansleep wrappers */ -+ -+#endif ---- /dev/null -+++ b/arch/mips/include/asm/mach-ar231x/reset.h -@@ -0,0 +1,6 @@ -+#ifndef __AR531X_RESET_H -+#define __AR531X_RESET_H -+ -+void ar531x_disable_reset_button(void); -+ -+#endif /* __AR531X_RESET_H */ ---- /dev/null -+++ b/arch/mips/include/asm/mach-ar231x/war.h -@@ -0,0 +1,25 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2008 Felix Fietkau -+ */ -+#ifndef __ASM_MIPS_MACH_ATHEROS_WAR_H -+#define __ASM_MIPS_MACH_ATHEROS_WAR_H -+ -+#define R4600_V1_INDEX_ICACHEOP_WAR 0 -+#define R4600_V1_HIT_CACHEOP_WAR 0 -+#define R4600_V2_HIT_CACHEOP_WAR 0 -+#define R5432_CP0_INTERRUPT_WAR 0 -+#define BCM1250_M3_WAR 0 -+#define SIBYTE_1956_WAR 0 -+#define MIPS4K_ICACHE_REFILL_WAR 0 -+#define MIPS_CACHE_SYNC_WAR 0 -+#define TX49XX_ICACHE_INDEX_INV_WAR 0 -+#define RM9000_CDEX_SMP_WAR 0 -+#define ICACHE_REFILLS_WORKAROUND_WAR 0 -+#define R10000_LLSC_WAR 0 -+#define MIPS34K_MISSED_ITLB_WAR 0 -+ -+#endif /* __ASM_MIPS_MACH_ATHEROS_WAR_H */ ---- /dev/null -+++ b/arch/mips/include/asm/mach-ar231x/ar2315_regs.h -@@ -0,0 +1,580 @@ -+/* -+ * Register definitions for AR2315+ -+ * -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved. -+ * Copyright (C) 2006 FON Technology, SL. -+ * Copyright (C) 2006 Imre Kaloz -+ * Copyright (C) 2006-2008 Felix Fietkau -+ */ -+ -+#ifndef __AR2315_REG_H -+#define __AR2315_REG_H -+ -+/* -+ * IRQs -+ */ -+#define AR2315_IRQ_MISC_INTRS MIPS_CPU_IRQ_BASE+2 /* C0_CAUSE: 0x0400 */ -+#define AR2315_IRQ_WLAN0_INTRS MIPS_CPU_IRQ_BASE+3 /* C0_CAUSE: 0x0800 */ -+#define AR2315_IRQ_ENET0_INTRS MIPS_CPU_IRQ_BASE+4 /* C0_CAUSE: 0x1000 */ -+#define AR2315_IRQ_LCBUS_PCI MIPS_CPU_IRQ_BASE+5 /* C0_CAUSE: 0x2000 */ -+#define AR2315_IRQ_WLAN0_POLL MIPS_CPU_IRQ_BASE+6 /* C0_CAUSE: 0x4000 */ -+ -+/* -+ * Address map -+ */ -+#define AR2315_SPI_READ 0x08000000 /* SPI FLASH */ -+#define AR2315_WLAN0 0xB0000000 /* Wireless MMR */ -+#define AR2315_PCI 0xB0100000 /* PCI MMR */ -+#define AR2315_SDRAMCTL 0xB0300000 /* SDRAM MMR */ -+#define AR2315_LOCAL 0xB0400000 /* LOCAL BUS MMR */ -+#define AR2315_ENET0 0xB0500000 /* ETHERNET MMR */ -+#define AR2315_DSLBASE 0xB1000000 /* RESET CONTROL MMR */ -+#define AR2315_UART0 0xB1100003 /* UART MMR */ -+#define AR2315_SPI 0xB1300000 /* SPI FLASH MMR */ -+#define AR2315_PCIEXT 0x80000000 /* pci external */ -+ -+/* -+ * Reset Register -+ */ -+#define AR2315_COLD_RESET (AR2315_DSLBASE + 0x0000) -+ -+#define AR2315_RESET_COLD_AHB 0x00000001 -+#define AR2315_RESET_COLD_APB 0x00000002 -+#define AR2315_RESET_COLD_CPU 0x00000004 -+#define AR2315_RESET_COLD_CPUWARM 0x00000008 -+#define AR2315_RESET_SYSTEM (RESET_COLD_CPU | RESET_COLD_APB | RESET_COLD_AHB) /* full system */ -+#define AR2317_RESET_SYSTEM 0x00000010 -+ -+ -+#define AR2315_RESET (AR2315_DSLBASE + 0x0004) -+ -+#define AR2315_RESET_WARM_WLAN0_MAC 0x00000001 /* warm reset WLAN0 MAC */ -+#define AR2315_RESET_WARM_WLAN0_BB 0x00000002 /* warm reset WLAN0 BaseBand */ -+#define AR2315_RESET_MPEGTS_RSVD 0x00000004 /* warm reset MPEG-TS */ -+#define AR2315_RESET_PCIDMA 0x00000008 /* warm reset PCI ahb/dma */ -+#define AR2315_RESET_MEMCTL 0x00000010 /* warm reset memory controller */ -+#define AR2315_RESET_LOCAL 0x00000020 /* warm reset local bus */ -+#define AR2315_RESET_I2C_RSVD 0x00000040 /* warm reset I2C bus */ -+#define AR2315_RESET_SPI 0x00000080 /* warm reset SPI interface */ -+#define AR2315_RESET_UART0 0x00000100 /* warm reset UART0 */ -+#define AR2315_RESET_IR_RSVD 0x00000200 /* warm reset IR interface */ -+#define AR2315_RESET_EPHY0 0x00000400 /* cold reset ENET0 phy */ -+#define AR2315_RESET_ENET0 0x00000800 /* cold reset ENET0 mac */ -+ -+/* -+ * AHB master arbitration control -+ */ -+#define AR2315_AHB_ARB_CTL (AR2315_DSLBASE + 0x0008) -+ -+#define AR2315_ARB_CPU 0x00000001 /* CPU, default */ -+#define AR2315_ARB_WLAN 0x00000002 /* WLAN */ -+#define AR2315_ARB_MPEGTS_RSVD 0x00000004 /* MPEG-TS */ -+#define AR2315_ARB_LOCAL 0x00000008 /* LOCAL */ -+#define AR2315_ARB_PCI 0x00000010 /* PCI */ -+#define AR2315_ARB_ETHERNET 0x00000020 /* Ethernet */ -+#define AR2315_ARB_RETRY 0x00000100 /* retry policy, debug only */ -+ -+/* -+ * Config Register -+ */ -+#define AR2315_ENDIAN_CTL (AR2315_DSLBASE + 0x000c) -+ -+#define AR2315_CONFIG_AHB 0x00000001 /* EC - AHB bridge endianess */ -+#define AR2315_CONFIG_WLAN 0x00000002 /* WLAN byteswap */ -+#define AR2315_CONFIG_MPEGTS_RSVD 0x00000004 /* MPEG-TS byteswap */ -+#define AR2315_CONFIG_PCI 0x00000008 /* PCI byteswap */ -+#define AR2315_CONFIG_MEMCTL 0x00000010 /* Memory controller endianess */ -+#define AR2315_CONFIG_LOCAL 0x00000020 /* Local bus byteswap */ -+#define AR2315_CONFIG_ETHERNET 0x00000040 /* Ethernet byteswap */ -+ -+#define AR2315_CONFIG_MERGE 0x00000200 /* CPU write buffer merge */ -+#define AR2315_CONFIG_CPU 0x00000400 /* CPU big endian */ -+#define AR2315_CONFIG_PCIAHB 0x00000800 -+#define AR2315_CONFIG_PCIAHB_BRIDGE 0x00001000 -+#define AR2315_CONFIG_SPI 0x00008000 /* SPI byteswap */ -+#define AR2315_CONFIG_CPU_DRAM 0x00010000 -+#define AR2315_CONFIG_CPU_PCI 0x00020000 -+#define AR2315_CONFIG_CPU_MMR 0x00040000 -+#define AR2315_CONFIG_BIG 0x00000400 -+ -+ -+/* -+ * NMI control -+ */ -+#define AR2315_NMI_CTL (AR2315_DSLBASE + 0x0010) -+ -+#define AR2315_NMI_EN 1 -+ -+/* -+ * Revision Register - Initial value is 0x3010 (WMAC 3.0, AR531X 1.0). -+ */ -+#define AR2315_SREV (AR2315_DSLBASE + 0x0014) -+ -+#define AR2315_REV_MAJ 0x00f0 -+#define AR2315_REV_MAJ_S 4 -+#define AR2315_REV_MIN 0x000f -+#define AR2315_REV_MIN_S 0 -+#define AR2315_REV_CHIP (AR2315_REV_MAJ|AR2315_REV_MIN) -+ -+/* -+ * Interface Enable -+ */ -+#define AR2315_IF_CTL (AR2315_DSLBASE + 0x0018) -+ -+#define AR2315_IF_MASK 0x00000007 -+#define AR2315_IF_DISABLED 0 -+#define AR2315_IF_PCI 1 -+#define AR2315_IF_TS_LOCAL 2 -+#define AR2315_IF_ALL 3 /* only for emulation with separate pins */ -+#define AR2315_IF_LOCAL_HOST 0x00000008 -+#define AR2315_IF_PCI_HOST 0x00000010 -+#define AR2315_IF_PCI_INTR 0x00000020 -+#define AR2315_IF_PCI_CLK_MASK 0x00030000 -+#define AR2315_IF_PCI_CLK_INPUT 0 -+#define AR2315_IF_PCI_CLK_OUTPUT_LOW 1 -+#define AR2315_IF_PCI_CLK_OUTPUT_CLK 2 -+#define AR2315_IF_PCI_CLK_OUTPUT_HIGH 3 -+#define AR2315_IF_PCI_CLK_SHIFT 16 -+ -+/* -+ * APB Interrupt control -+ */ -+ -+#define AR2315_ISR (AR2315_DSLBASE + 0x0020) -+#define AR2315_IMR (AR2315_DSLBASE + 0x0024) -+#define AR2315_GISR (AR2315_DSLBASE + 0x0028) -+ -+#define AR2315_ISR_UART0 0x0001 /* high speed UART */ -+#define AR2315_ISR_I2C_RSVD 0x0002 /* I2C bus */ -+#define AR2315_ISR_SPI 0x0004 /* SPI bus */ -+#define AR2315_ISR_AHB 0x0008 /* AHB error */ -+#define AR2315_ISR_APB 0x0010 /* APB error */ -+#define AR2315_ISR_TIMER 0x0020 /* timer */ -+#define AR2315_ISR_GPIO 0x0040 /* GPIO */ -+#define AR2315_ISR_WD 0x0080 /* watchdog */ -+#define AR2315_ISR_IR_RSVD 0x0100 /* IR */ -+ -+#define AR2315_GISR_MISC 0x0001 -+#define AR2315_GISR_WLAN0 0x0002 -+#define AR2315_GISR_MPEGTS_RSVD 0x0004 -+#define AR2315_GISR_LOCALPCI 0x0008 -+#define AR2315_GISR_WMACPOLL 0x0010 -+#define AR2315_GISR_TIMER 0x0020 -+#define AR2315_GISR_ETHERNET 0x0040 -+ -+/* -+ * Interrupt routing from IO to the processor IP bits -+ * Define our inter mask and level -+ */ -+#define AR2315_INTR_MISCIO SR_IBIT3 -+#define AR2315_INTR_WLAN0 SR_IBIT4 -+#define AR2315_INTR_ENET0 SR_IBIT5 -+#define AR2315_INTR_LOCALPCI SR_IBIT6 -+#define AR2315_INTR_WMACPOLL SR_IBIT7 -+#define AR2315_INTR_COMPARE SR_IBIT8 -+ -+/* -+ * Timers -+ */ -+#define AR2315_TIMER (AR2315_DSLBASE + 0x0030) -+#define AR2315_RELOAD (AR2315_DSLBASE + 0x0034) -+#define AR2315_WD (AR2315_DSLBASE + 0x0038) -+#define AR2315_WDC (AR2315_DSLBASE + 0x003c) -+ -+#define AR2315_WDC_IGNORE_EXPIRATION 0x00000000 -+#define AR2315_WDC_NMI 0x00000001 /* NMI on watchdog */ -+#define AR2315_WDC_RESET 0x00000002 /* reset on watchdog */ -+ -+/* -+ * CPU Performance Counters -+ */ -+#define AR2315_PERFCNT0 (AR2315_DSLBASE + 0x0048) -+#define AR2315_PERFCNT1 (AR2315_DSLBASE + 0x004c) -+ -+#define AR2315_PERF0_DATAHIT 0x0001 /* Count Data Cache Hits */ -+#define AR2315_PERF0_DATAMISS 0x0002 /* Count Data Cache Misses */ -+#define AR2315_PERF0_INSTHIT 0x0004 /* Count Instruction Cache Hits */ -+#define AR2315_PERF0_INSTMISS 0x0008 /* Count Instruction Cache Misses */ -+#define AR2315_PERF0_ACTIVE 0x0010 /* Count Active Processor Cycles */ -+#define AR2315_PERF0_WBHIT 0x0020 /* Count CPU Write Buffer Hits */ -+#define AR2315_PERF0_WBMISS 0x0040 /* Count CPU Write Buffer Misses */ -+ -+#define AR2315_PERF1_EB_ARDY 0x0001 /* Count EB_ARdy signal */ -+#define AR2315_PERF1_EB_AVALID 0x0002 /* Count EB_AValid signal */ -+#define AR2315_PERF1_EB_WDRDY 0x0004 /* Count EB_WDRdy signal */ -+#define AR2315_PERF1_EB_RDVAL 0x0008 /* Count EB_RdVal signal */ -+#define AR2315_PERF1_VRADDR 0x0010 /* Count valid read address cycles */ -+#define AR2315_PERF1_VWADDR 0x0020 /* Count valid write address cycles */ -+#define AR2315_PERF1_VWDATA 0x0040 /* Count valid write data cycles */ -+ -+/* -+ * AHB Error Reporting. -+ */ -+#define AR2315_AHB_ERR0 (AR2315_DSLBASE + 0x0050) /* error */ -+#define AR2315_AHB_ERR1 (AR2315_DSLBASE + 0x0054) /* haddr */ -+#define AR2315_AHB_ERR2 (AR2315_DSLBASE + 0x0058) /* hwdata */ -+#define AR2315_AHB_ERR3 (AR2315_DSLBASE + 0x005c) /* hrdata */ -+#define AR2315_AHB_ERR4 (AR2315_DSLBASE + 0x0060) /* status */ -+ -+#define AHB_ERROR_DET 1 /* AHB Error has been detected, */ -+ /* write 1 to clear all bits in ERR0 */ -+#define AHB_ERROR_OVR 2 /* AHB Error overflow has been detected */ -+#define AHB_ERROR_WDT 4 /* AHB Error due to wdt instead of hresp */ -+ -+#define AR2315_PROCERR_HMAST 0x0000000f -+#define AR2315_PROCERR_HMAST_DFLT 0 -+#define AR2315_PROCERR_HMAST_WMAC 1 -+#define AR2315_PROCERR_HMAST_ENET 2 -+#define AR2315_PROCERR_HMAST_PCIENDPT 3 -+#define AR2315_PROCERR_HMAST_LOCAL 4 -+#define AR2315_PROCERR_HMAST_CPU 5 -+#define AR2315_PROCERR_HMAST_PCITGT 6 -+ -+#define AR2315_PROCERR_HMAST_S 0 -+#define AR2315_PROCERR_HWRITE 0x00000010 -+#define AR2315_PROCERR_HSIZE 0x00000060 -+#define AR2315_PROCERR_HSIZE_S 5 -+#define AR2315_PROCERR_HTRANS 0x00000180 -+#define AR2315_PROCERR_HTRANS_S 7 -+#define AR2315_PROCERR_HBURST 0x00000e00 -+#define AR2315_PROCERR_HBURST_S 9 -+ -+/* -+ * Clock Control -+ */ -+#define AR2315_PLLC_CTL (AR2315_DSLBASE + 0x0064) -+#define AR2315_PLLV_CTL (AR2315_DSLBASE + 0x0068) -+#define AR2315_CPUCLK (AR2315_DSLBASE + 0x006c) -+#define AR2315_AMBACLK (AR2315_DSLBASE + 0x0070) -+#define AR2315_SYNCCLK (AR2315_DSLBASE + 0x0074) -+#define AR2315_DSL_SLEEP_CTL (AR2315_DSLBASE + 0x0080) -+#define AR2315_DSL_SLEEP_DUR (AR2315_DSLBASE + 0x0084) -+ -+/* PLLc Control fields */ -+#define PLLC_REF_DIV_M 0x00000003 -+#define PLLC_REF_DIV_S 0 -+#define PLLC_FDBACK_DIV_M 0x0000007C -+#define PLLC_FDBACK_DIV_S 2 -+#define PLLC_ADD_FDBACK_DIV_M 0x00000080 -+#define PLLC_ADD_FDBACK_DIV_S 7 -+#define PLLC_CLKC_DIV_M 0x0001c000 -+#define PLLC_CLKC_DIV_S 14 -+#define PLLC_CLKM_DIV_M 0x00700000 -+#define PLLC_CLKM_DIV_S 20 -+ -+/* CPU CLK Control fields */ -+#define CPUCLK_CLK_SEL_M 0x00000003 -+#define CPUCLK_CLK_SEL_S 0 -+#define CPUCLK_CLK_DIV_M 0x0000000c -+#define CPUCLK_CLK_DIV_S 2 -+ -+/* AMBA CLK Control fields */ -+#define AMBACLK_CLK_SEL_M 0x00000003 -+#define AMBACLK_CLK_SEL_S 0 -+#define AMBACLK_CLK_DIV_M 0x0000000c -+#define AMBACLK_CLK_DIV_S 2 -+ -+/* -+ * GPIO -+ */ -+#define AR2315_GPIO_DI (AR2315_DSLBASE + 0x0088) -+#define AR2315_GPIO_DO (AR2315_DSLBASE + 0x0090) -+#define AR2315_GPIO_CR (AR2315_DSLBASE + 0x0098) -+#define AR2315_GPIO_INT (AR2315_DSLBASE + 0x00a0) -+ -+#define AR2315_GPIO_CR_M(x) (1 << (x)) /* mask for i/o */ -+#define AR2315_GPIO_CR_O(x) (1 << (x)) /* output */ -+#define AR2315_GPIO_CR_I(x) (0) /* input */ -+ -+#define AR2315_GPIO_INT_S(x) (x) /* interrupt enable */ -+#define AR2315_GPIO_INT_M (0x3F) /* mask for int */ -+#define AR2315_GPIO_INT_LVL(x) ((x) << 6) /* interrupt level */ -+#define AR2315_GPIO_INT_LVL_M ((0x3) << 6) /* mask for int level */ -+ -+#define AR2315_GPIO_INT_MAX_Y 1 /* Maximum value of Y for AR5313_GPIO_INT_* macros */ -+#define AR2315_GPIO_INT_LVL_OFF 0 /* Triggerring off */ -+#define AR2315_GPIO_INT_LVL_LOW 1 /* Low Level Triggered */ -+#define AR2315_GPIO_INT_LVL_HIGH 2 /* High Level Triggered */ -+#define AR2315_GPIO_INT_LVL_EDGE 3 /* Edge Triggered */ -+ -+#define AR2315_RESET_GPIO 5 -+#define AR2315_NUM_GPIO 22 -+ -+/* -+ * PCI Clock Control -+ */ -+#define AR2315_PCICLK (AR2315_DSLBASE + 0x00a4) -+ -+#define AR2315_PCICLK_INPUT_M 0x3 -+#define AR2315_PCICLK_INPUT_S 0 -+ -+#define AR2315_PCICLK_PLLC_CLKM 0 -+#define AR2315_PCICLK_PLLC_CLKM1 1 -+#define AR2315_PCICLK_PLLC_CLKC 2 -+#define AR2315_PCICLK_REF_CLK 3 -+ -+#define AR2315_PCICLK_DIV_M 0xc -+#define AR2315_PCICLK_DIV_S 2 -+ -+#define AR2315_PCICLK_IN_FREQ 0 -+#define AR2315_PCICLK_IN_FREQ_DIV_6 1 -+#define AR2315_PCICLK_IN_FREQ_DIV_8 2 -+#define AR2315_PCICLK_IN_FREQ_DIV_10 3 -+ -+/* -+ * Observation Control Register -+ */ -+#define AR2315_OCR (AR2315_DSLBASE + 0x00b0) -+#define OCR_GPIO0_IRIN 0x0040 -+#define OCR_GPIO1_IROUT 0x0080 -+#define OCR_GPIO3_RXCLR 0x0200 -+ -+/* -+ * General Clock Control -+ */ -+ -+#define AR2315_MISCCLK (AR2315_DSLBASE + 0x00b4) -+#define MISCCLK_PLLBYPASS_EN 0x00000001 -+#define MISCCLK_PROCREFCLK 0x00000002 -+ -+/* -+ * SDRAM Controller -+ * - No read or write buffers are included. -+ */ -+#define AR2315_MEM_CFG (AR2315_SDRAMCTL + 0x00) -+#define AR2315_MEM_CTRL (AR2315_SDRAMCTL + 0x0c) -+#define AR2315_MEM_REF (AR2315_SDRAMCTL + 0x10) -+ -+#define SDRAM_DATA_WIDTH_M 0x00006000 -+#define SDRAM_DATA_WIDTH_S 13 -+ -+#define SDRAM_COL_WIDTH_M 0x00001E00 -+#define SDRAM_COL_WIDTH_S 9 -+ -+#define SDRAM_ROW_WIDTH_M 0x000001E0 -+#define SDRAM_ROW_WIDTH_S 5 -+ -+#define SDRAM_BANKADDR_BITS_M 0x00000018 -+#define SDRAM_BANKADDR_BITS_S 3 -+ -+/* -+ * SPI Flash Interface Registers -+ */ -+ -+#define AR2315_SPI_CTL (AR2315_SPI + 0x00) -+#define AR2315_SPI_OPCODE (AR2315_SPI + 0x04) -+#define AR2315_SPI_DATA (AR2315_SPI + 0x08) -+ -+#define SPI_CTL_START 0x00000100 -+#define SPI_CTL_BUSY 0x00010000 -+#define SPI_CTL_TXCNT_MASK 0x0000000f -+#define SPI_CTL_RXCNT_MASK 0x000000f0 -+#define SPI_CTL_TX_RX_CNT_MASK 0x000000ff -+#define SPI_CTL_SIZE_MASK 0x00060000 -+ -+#define SPI_CTL_CLK_SEL_MASK 0x03000000 -+#define SPI_OPCODE_MASK 0x000000ff -+ -+/* -+ * PCI Bus Interface Registers -+ */ -+#define AR2315_PCI_1MS_REG (AR2315_PCI + 0x0008) -+#define AR2315_PCI_1MS_MASK 0x3FFFF /* # of AHB clk cycles in 1ms */ -+ -+#define AR2315_PCI_MISC_CONFIG (AR2315_PCI + 0x000c) -+#define AR2315_PCIMISC_TXD_EN 0x00000001 /* Enable TXD for fragments */ -+#define AR2315_PCIMISC_CFG_SEL 0x00000002 /* mem or config cycles */ -+#define AR2315_PCIMISC_GIG_MASK 0x0000000C /* bits 31-30 for pci req */ -+#define AR2315_PCIMISC_RST_MODE 0x00000030 -+#define AR2315_PCIRST_INPUT 0x00000000 /* 4:5=0 rst is input */ -+#define AR2315_PCIRST_LOW 0x00000010 /* 4:5=1 rst to GND */ -+#define AR2315_PCIRST_HIGH 0x00000020 /* 4:5=2 rst to VDD */ -+#define AR2315_PCIGRANT_EN 0x00000000 /* 6:7=0 early grant en */ -+#define AR2315_PCIGRANT_FRAME 0x00000040 /* 6:7=1 grant waits 4 frame */ -+#define AR2315_PCIGRANT_IDLE 0x00000080 /* 6:7=2 grant waits 4 idle */ -+#define AR2315_PCIGRANT_GAP 0x00000000 /* 6:7=2 grant waits 4 idle */ -+#define AR2315_PCICACHE_DIS 0x00001000 /* PCI external access cache disable */ -+ -+#define AR2315_PCI_OUT_TSTAMP (AR2315_PCI + 0x0010) -+ -+#define AR2315_PCI_UNCACHE_CFG (AR2315_PCI + 0x0014) -+ -+#define AR2315_PCI_IN_EN (AR2315_PCI + 0x0100) -+#define AR2315_PCI_IN_EN0 0x01 /* Enable chain 0 */ -+#define AR2315_PCI_IN_EN1 0x02 /* Enable chain 1 */ -+#define AR2315_PCI_IN_EN2 0x04 /* Enable chain 2 */ -+#define AR2315_PCI_IN_EN3 0x08 /* Enable chain 3 */ -+ -+#define AR2315_PCI_IN_DIS (AR2315_PCI + 0x0104) -+#define AR2315_PCI_IN_DIS0 0x01 /* Disable chain 0 */ -+#define AR2315_PCI_IN_DIS1 0x02 /* Disable chain 1 */ -+#define AR2315_PCI_IN_DIS2 0x04 /* Disable chain 2 */ -+#define AR2315_PCI_IN_DIS3 0x08 /* Disable chain 3 */ -+ -+#define AR2315_PCI_IN_PTR (AR2315_PCI + 0x0200) -+ -+#define AR2315_PCI_OUT_EN (AR2315_PCI + 0x0400) -+#define AR2315_PCI_OUT_EN0 0x01 /* Enable chain 0 */ -+ -+#define AR2315_PCI_OUT_DIS (AR2315_PCI + 0x0404) -+#define AR2315_PCI_OUT_DIS0 0x01 /* Disable chain 0 */ -+ -+#define AR2315_PCI_OUT_PTR (AR2315_PCI + 0x0408) -+ -+#define AR2315_PCI_INT_STATUS (AR2315_PCI + 0x0500) /* write one to clr */ -+#define AR2315_PCI_TXINT 0x00000001 /* Desc In Completed */ -+#define AR2315_PCI_TXOK 0x00000002 /* Desc In OK */ -+#define AR2315_PCI_TXERR 0x00000004 /* Desc In ERR */ -+#define AR2315_PCI_TXEOL 0x00000008 /* Desc In End-of-List */ -+#define AR2315_PCI_RXINT 0x00000010 /* Desc Out Completed */ -+#define AR2315_PCI_RXOK 0x00000020 /* Desc Out OK */ -+#define AR2315_PCI_RXERR 0x00000040 /* Desc Out ERR */ -+#define AR2315_PCI_RXEOL 0x00000080 /* Desc Out EOL */ -+#define AR2315_PCI_TXOOD 0x00000200 /* Desc In Out-of-Desc */ -+#define AR2315_PCI_MASK 0x0000FFFF /* Desc Mask */ -+#define AR2315_PCI_EXT_INT 0x02000000 -+#define AR2315_PCI_ABORT_INT 0x04000000 -+ -+#define AR2315_PCI_INT_MASK (AR2315_PCI + 0x0504) /* same as INT_STATUS */ -+ -+#define AR2315_PCI_INTEN_REG (AR2315_PCI + 0x0508) -+#define AR2315_PCI_INT_DISABLE 0x00 /* disable pci interrupts */ -+#define AR2315_PCI_INT_ENABLE 0x01 /* enable pci interrupts */ -+ -+#define AR2315_PCI_HOST_IN_EN (AR2315_PCI + 0x0800) -+#define AR2315_PCI_HOST_IN_DIS (AR2315_PCI + 0x0804) -+#define AR2315_PCI_HOST_IN_PTR (AR2315_PCI + 0x0810) -+#define AR2315_PCI_HOST_OUT_EN (AR2315_PCI + 0x0900) -+#define AR2315_PCI_HOST_OUT_DIS (AR2315_PCI + 0x0904) -+#define AR2315_PCI_HOST_OUT_PTR (AR2315_PCI + 0x0908) -+ -+ -+/* -+ * Local Bus Interface Registers -+ */ -+#define AR2315_LB_CONFIG (AR2315_LOCAL + 0x0000) -+#define AR2315_LBCONF_OE 0x00000001 /* =1 OE is low-true */ -+#define AR2315_LBCONF_CS0 0x00000002 /* =1 first CS is low-true */ -+#define AR2315_LBCONF_CS1 0x00000004 /* =1 2nd CS is low-true */ -+#define AR2315_LBCONF_RDY 0x00000008 /* =1 RDY is low-true */ -+#define AR2315_LBCONF_WE 0x00000010 /* =1 Write En is low-true */ -+#define AR2315_LBCONF_WAIT 0x00000020 /* =1 WAIT is low-true */ -+#define AR2315_LBCONF_ADS 0x00000040 /* =1 Adr Strobe is low-true */ -+#define AR2315_LBCONF_MOT 0x00000080 /* =0 Intel, =1 Motorola */ -+#define AR2315_LBCONF_8CS 0x00000100 /* =1 8 bits CS, 0= 16bits */ -+#define AR2315_LBCONF_8DS 0x00000200 /* =1 8 bits Data S, 0=16bits */ -+#define AR2315_LBCONF_ADS_EN 0x00000400 /* =1 Enable ADS */ -+#define AR2315_LBCONF_ADR_OE 0x00000800 /* =1 Adr cap on OE, WE or DS */ -+#define AR2315_LBCONF_ADDT_MUX 0x00001000 /* =1 Adr and Data share bus */ -+#define AR2315_LBCONF_DATA_OE 0x00002000 /* =1 Data cap on OE, WE, DS */ -+#define AR2315_LBCONF_16DATA 0x00004000 /* =1 Data is 16 bits wide */ -+#define AR2315_LBCONF_SWAPDT 0x00008000 /* =1 Byte swap data */ -+#define AR2315_LBCONF_SYNC 0x00010000 /* =1 Bus synchronous to clk */ -+#define AR2315_LBCONF_INT 0x00020000 /* =1 Intr is low true */ -+#define AR2315_LBCONF_INT_CTR0 0x00000000 /* GND high-Z, Vdd is high-Z */ -+#define AR2315_LBCONF_INT_CTR1 0x00040000 /* GND drive, Vdd is high-Z */ -+#define AR2315_LBCONF_INT_CTR2 0x00080000 /* GND high-Z, Vdd drive */ -+#define AR2315_LBCONF_INT_CTR3 0x000C0000 /* GND drive, Vdd drive */ -+#define AR2315_LBCONF_RDY_WAIT 0x00100000 /* =1 RDY is negative of WAIT */ -+#define AR2315_LBCONF_INT_PULSE 0x00200000 /* =1 Interrupt is a pulse */ -+#define AR2315_LBCONF_ENABLE 0x00400000 /* =1 Falcon respond to LB */ -+ -+#define AR2315_LB_CLKSEL (AR2315_LOCAL + 0x0004) -+#define AR2315_LBCLK_EXT 0x0001 /* use external clk for lb */ -+ -+#define AR2315_LB_1MS (AR2315_LOCAL + 0x0008) -+#define AR2315_LB1MS_MASK 0x3FFFF /* # of AHB clk cycles in 1ms */ -+ -+#define AR2315_LB_MISCCFG (AR2315_LOCAL + 0x000C) -+#define AR2315_LBM_TXD_EN 0x00000001 /* Enable TXD for fragments */ -+#define AR2315_LBM_RX_INTEN 0x00000002 /* Enable LB ints on RX ready */ -+#define AR2315_LBM_MBOXWR_INTEN 0x00000004 /* Enable LB ints on mbox wr */ -+#define AR2315_LBM_MBOXRD_INTEN 0x00000008 /* Enable LB ints on mbox rd */ -+#define AR2315_LMB_DESCSWAP_EN 0x00000010 /* Byte swap desc enable */ -+#define AR2315_LBM_TIMEOUT_MASK 0x00FFFF80 -+#define AR2315_LBM_TIMEOUT_SHFT 7 -+#define AR2315_LBM_PORTMUX 0x07000000 -+ -+ -+#define AR2315_LB_RXTSOFF (AR2315_LOCAL + 0x0010) -+ -+#define AR2315_LB_TX_CHAIN_EN (AR2315_LOCAL + 0x0100) -+#define AR2315_LB_TXEN_0 0x01 -+#define AR2315_LB_TXEN_1 0x02 -+#define AR2315_LB_TXEN_2 0x04 -+#define AR2315_LB_TXEN_3 0x08 -+ -+#define AR2315_LB_TX_CHAIN_DIS (AR2315_LOCAL + 0x0104) -+#define AR2315_LB_TX_DESC_PTR (AR2315_LOCAL + 0x0200) -+ -+#define AR2315_LB_RX_CHAIN_EN (AR2315_LOCAL + 0x0400) -+#define AR2315_LB_RXEN 0x01 -+ -+#define AR2315_LB_RX_CHAIN_DIS (AR2315_LOCAL + 0x0404) -+#define AR2315_LB_RX_DESC_PTR (AR2315_LOCAL + 0x0408) -+ -+#define AR2315_LB_INT_STATUS (AR2315_LOCAL + 0x0500) -+#define AR2315_INT_TX_DESC 0x0001 -+#define AR2315_INT_TX_OK 0x0002 -+#define AR2315_INT_TX_ERR 0x0004 -+#define AR2315_INT_TX_EOF 0x0008 -+#define AR2315_INT_RX_DESC 0x0010 -+#define AR2315_INT_RX_OK 0x0020 -+#define AR2315_INT_RX_ERR 0x0040 -+#define AR2315_INT_RX_EOF 0x0080 -+#define AR2315_INT_TX_TRUNC 0x0100 -+#define AR2315_INT_TX_STARVE 0x0200 -+#define AR2315_INT_LB_TIMEOUT 0x0400 -+#define AR2315_INT_LB_ERR 0x0800 -+#define AR2315_INT_MBOX_WR 0x1000 -+#define AR2315_INT_MBOX_RD 0x2000 -+ -+/* Bit definitions for INT MASK are the same as INT_STATUS */ -+#define AR2315_LB_INT_MASK (AR2315_LOCAL + 0x0504) -+ -+#define AR2315_LB_INT_EN (AR2315_LOCAL + 0x0508) -+#define AR2315_LB_MBOX (AR2315_LOCAL + 0x0600) -+ -+/* -+ * IR Interface Registers -+ */ -+#define AR2315_IR_PKTDATA (AR2315_IR + 0x0000) -+ -+#define AR2315_IR_PKTLEN (AR2315_IR + 0x07fc) /* 0 - 63 */ -+ -+#define AR2315_IR_CONTROL (AR2315_IR + 0x0800) -+#define AR2315_IRCTL_TX 0x00000000 /* use as tranmitter */ -+#define AR2315_IRCTL_RX 0x00000001 /* use as receiver */ -+#define AR2315_IRCTL_SAMPLECLK_MASK 0x00003ffe /* Sample clk divisor mask */ -+#define AR2315_IRCTL_SAMPLECLK_SHFT 1 -+#define AR2315_IRCTL_OUTPUTCLK_MASK 0x03ffc000 /* Output clk divisor mask */ -+#define AR2315_IRCTL_OUTPUTCLK_SHFT 14 -+ -+#define AR2315_IR_STATUS (AR2315_IR + 0x0804) -+#define AR2315_IRSTS_RX 0x00000001 /* receive in progress */ -+#define AR2315_IRSTS_TX 0x00000002 /* transmit in progress */ -+ -+#define AR2315_IR_CONFIG (AR2315_IR + 0x0808) -+#define AR2315_IRCFG_INVIN 0x00000001 /* invert input polarity */ -+#define AR2315_IRCFG_INVOUT 0x00000002 /* invert output polarity */ -+#define AR2315_IRCFG_SEQ_START_WIN_SEL 0x00000004 /* 1 => 28, 0 => 7 */ -+#define AR2315_IRCFG_SEQ_START_THRESH 0x000000f0 /* */ -+#define AR2315_IRCFG_SEQ_END_UNIT_SEL 0x00000100 /* */ -+#define AR2315_IRCFG_SEQ_END_UNIT_THRESH 0x00007e00 /* */ -+#define AR2315_IRCFG_SEQ_END_WIN_SEL 0x00008000 /* */ -+#define AR2315_IRCFG_SEQ_END_WIN_THRESH 0x001f0000 /* */ -+#define AR2315_IRCFG_NUM_BACKOFF_WORDS 0x01e00000 /* */ -+ -+#define HOST_PCI_DEV_ID 3 -+#define HOST_PCI_MBAR0 0x10000000 -+#define HOST_PCI_MBAR1 0x20000000 -+#define HOST_PCI_MBAR2 0x30000000 -+ -+#define HOST_PCI_SDRAM_BASEADDR HOST_PCI_MBAR1 -+#define PCI_DEVICE_MEM_SPACE 0x800000 -+ -+#endif /* __AR2315_REG_H */ ---- /dev/null -+++ b/arch/mips/include/asm/mach-ar231x/ar5312_regs.h -@@ -0,0 +1,236 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved. -+ * Copyright (C) 2006 Imre Kaloz -+ * Copyright (C) 2006 Felix Fietkau -+ */ -+ -+#ifndef AR5312_H -+#define AR5312_H -+ -+#include -+ -+/* -+ * IRQs -+ */ -+ -+#define AR5312_IRQ_WLAN0_INTRS MIPS_CPU_IRQ_BASE+2 /* C0_CAUSE: 0x0400 */ -+#define AR5312_IRQ_ENET0_INTRS MIPS_CPU_IRQ_BASE+3 /* C0_CAUSE: 0x0800 */ -+#define AR5312_IRQ_ENET1_INTRS MIPS_CPU_IRQ_BASE+4 /* C0_CAUSE: 0x1000 */ -+#define AR5312_IRQ_WLAN1_INTRS MIPS_CPU_IRQ_BASE+5 /* C0_CAUSE: 0x2000 */ -+#define AR5312_IRQ_MISC_INTRS MIPS_CPU_IRQ_BASE+6 /* C0_CAUSE: 0x4000 */ -+ -+ -+/* Address Map */ -+#define AR531X_WLAN0 0x18000000 -+#define AR531X_WLAN1 0x18500000 -+#define AR531X_ENET0 0x18100000 -+#define AR531X_ENET1 0x18200000 -+#define AR531X_SDRAMCTL 0x18300000 -+#define AR531X_FLASHCTL 0x18400000 -+#define AR531X_APBBASE 0x1c000000 -+#define AR531X_FLASH 0x1e000000 -+#define AR531X_UART0 0xbc000003 /* UART MMR */ -+ -+/* -+ * AR531X_NUM_ENET_MAC defines the number of ethernet MACs that -+ * should be considered available. The AR5312 supports 2 enet MACS, -+ * even though many reference boards only actually use 1 of them -+ * (i.e. Only MAC 0 is actually connected to an enet PHY or PHY switch. -+ * The AR2312 supports 1 enet MAC. -+ */ -+#define AR531X_NUM_ENET_MAC 2 -+ -+/* -+ * Need these defines to determine true number of ethernet MACs -+ */ -+#define AR5212_AR5312_REV2 0x0052 /* AR5312 WMAC (AP31) */ -+#define AR5212_AR5312_REV7 0x0057 /* AR5312 WMAC (AP30-040) */ -+#define AR5212_AR2313_REV8 0x0058 /* AR2313 WMAC (AP43-030) */ -+#define AR531X_RADIO_MASK_OFF 0xc8 -+#define AR531X_RADIO0_MASK 0x0003 -+#define AR531X_RADIO1_MASK 0x000c -+#define AR531X_RADIO1_S 2 -+ -+/* -+ * AR531X_NUM_WMAC defines the number of Wireless MACs that\ -+ * should be considered available. -+ */ -+#define AR531X_NUM_WMAC 2 -+ -+/* Reset/Timer Block Address Map */ -+#define AR531X_RESETTMR (AR531X_APBBASE + 0x3000) -+#define AR531X_TIMER (AR531X_RESETTMR + 0x0000) /* countdown timer */ -+#define AR531X_WD_CTRL (AR531X_RESETTMR + 0x0008) /* watchdog cntrl */ -+#define AR531X_WD_TIMER (AR531X_RESETTMR + 0x000c) /* watchdog timer */ -+#define AR531X_ISR (AR531X_RESETTMR + 0x0010) /* Intr Status Reg */ -+#define AR531X_IMR (AR531X_RESETTMR + 0x0014) /* Intr Mask Reg */ -+#define AR531X_RESET (AR531X_RESETTMR + 0x0020) -+#define AR5312_CLOCKCTL1 (AR531X_RESETTMR + 0x0064) -+#define AR5312_SCRATCH (AR531X_RESETTMR + 0x006c) -+#define AR531X_PROCADDR (AR531X_RESETTMR + 0x0070) -+#define AR531X_PROC1 (AR531X_RESETTMR + 0x0074) -+#define AR531X_DMAADDR (AR531X_RESETTMR + 0x0078) -+#define AR531X_DMA1 (AR531X_RESETTMR + 0x007c) -+#define AR531X_ENABLE (AR531X_RESETTMR + 0x0080) /* interface enb */ -+#define AR531X_REV (AR531X_RESETTMR + 0x0090) /* revision */ -+ -+/* AR531X_WD_CTRL register bit field definitions */ -+#define AR531X_WD_CTRL_IGNORE_EXPIRATION 0x0000 -+#define AR531X_WD_CTRL_NMI 0x0001 -+#define AR531X_WD_CTRL_RESET 0x0002 -+ -+/* AR531X_ISR register bit field definitions */ -+#define AR531X_ISR_NONE 0x0000 -+#define AR531X_ISR_TIMER 0x0001 -+#define AR531X_ISR_AHBPROC 0x0002 -+#define AR531X_ISR_AHBDMA 0x0004 -+#define AR531X_ISR_GPIO 0x0008 -+#define AR531X_ISR_UART0 0x0010 -+#define AR531X_ISR_UART0DMA 0x0020 -+#define AR531X_ISR_WD 0x0040 -+#define AR531X_ISR_LOCAL 0x0080 -+ -+/* AR531X_RESET register bit field definitions */ -+#define AR531X_RESET_SYSTEM 0x00000001 /* cold reset full system */ -+#define AR531X_RESET_PROC 0x00000002 /* cold reset MIPS core */ -+#define AR531X_RESET_WLAN0 0x00000004 /* cold reset WLAN MAC and BB */ -+#define AR531X_RESET_EPHY0 0x00000008 /* cold reset ENET0 phy */ -+#define AR531X_RESET_EPHY1 0x00000010 /* cold reset ENET1 phy */ -+#define AR531X_RESET_ENET0 0x00000020 /* cold reset ENET0 mac */ -+#define AR531X_RESET_ENET1 0x00000040 /* cold reset ENET1 mac */ -+#define AR531X_RESET_UART0 0x00000100 /* cold reset UART0 (high speed) */ -+#define AR531X_RESET_WLAN1 0x00000200 /* cold reset WLAN MAC/BB */ -+#define AR531X_RESET_APB 0x00000400 /* cold reset APB (ar5312) */ -+#define AR531X_RESET_WARM_PROC 0x00001000 /* warm reset MIPS core */ -+#define AR531X_RESET_WARM_WLAN0_MAC 0x00002000 /* warm reset WLAN0 MAC */ -+#define AR531X_RESET_WARM_WLAN0_BB 0x00004000 /* warm reset WLAN0 BaseBand */ -+#define AR531X_RESET_NMI 0x00010000 /* send an NMI to the processor */ -+#define AR531X_RESET_WARM_WLAN1_MAC 0x00020000 /* warm reset WLAN1 mac */ -+#define AR531X_RESET_WARM_WLAN1_BB 0x00040000 /* warm reset WLAN1 baseband */ -+#define AR531X_RESET_LOCAL_BUS 0x00080000 /* reset local bus */ -+#define AR531X_RESET_WDOG 0x00100000 /* last reset was a watchdog */ -+ -+#define AR531X_RESET_WMAC0_BITS \ -+ AR531X_RESET_WLAN0 |\ -+ AR531X_RESET_WARM_WLAN0_MAC |\ -+ AR531X_RESET_WARM_WLAN0_BB -+ -+#define AR531X_RESERT_WMAC1_BITS \ -+ AR531X_RESET_WLAN1 |\ -+ AR531X_RESET_WARM_WLAN1_MAC |\ -+ AR531X_RESET_WARM_WLAN1_BB -+ -+/* AR5312_CLOCKCTL1 register bit field definitions */ -+#define AR5312_CLOCKCTL1_PREDIVIDE_MASK 0x00000030 -+#define AR5312_CLOCKCTL1_PREDIVIDE_SHIFT 4 -+#define AR5312_CLOCKCTL1_MULTIPLIER_MASK 0x00001f00 -+#define AR5312_CLOCKCTL1_MULTIPLIER_SHIFT 8 -+#define AR5312_CLOCKCTL1_DOUBLER_MASK 0x00010000 -+ -+/* Valid for AR5312 and AR2312 */ -+#define AR5312_CLOCKCTL1_PREDIVIDE_MASK 0x00000030 -+#define AR5312_CLOCKCTL1_PREDIVIDE_SHIFT 4 -+#define AR5312_CLOCKCTL1_MULTIPLIER_MASK 0x00001f00 -+#define AR5312_CLOCKCTL1_MULTIPLIER_SHIFT 8 -+#define AR5312_CLOCKCTL1_DOUBLER_MASK 0x00010000 -+ -+/* Valid for AR2313 */ -+#define AR2313_CLOCKCTL1_PREDIVIDE_MASK 0x00003000 -+#define AR2313_CLOCKCTL1_PREDIVIDE_SHIFT 12 -+#define AR2313_CLOCKCTL1_MULTIPLIER_MASK 0x001f0000 -+#define AR2313_CLOCKCTL1_MULTIPLIER_SHIFT 16 -+#define AR2313_CLOCKCTL1_DOUBLER_MASK 0x00000000 -+ -+ -+/* AR531X_ENABLE register bit field definitions */ -+#define AR531X_ENABLE_WLAN0 0x0001 -+#define AR531X_ENABLE_ENET0 0x0002 -+#define AR531X_ENABLE_ENET1 0x0004 -+#define AR531X_ENABLE_UART_AND_WLAN1_PIO 0x0008 /* UART, and WLAN1 PIOs */ -+#define AR531X_ENABLE_WLAN1_DMA 0x0010 /* WLAN1 DMAs */ -+#define AR531X_ENABLE_WLAN1 \ -+ (AR531X_ENABLE_UART_AND_WLAN1_PIO | AR531X_ENABLE_WLAN1_DMA) -+ -+/* AR531X_REV register bit field definitions */ -+#define AR531X_REV_WMAC_MAJ 0xf000 -+#define AR531X_REV_WMAC_MAJ_S 12 -+#define AR531X_REV_WMAC_MIN 0x0f00 -+#define AR531X_REV_WMAC_MIN_S 8 -+#define AR531X_REV_MAJ 0x00f0 -+#define AR531X_REV_MAJ_S 4 -+#define AR531X_REV_MIN 0x000f -+#define AR531X_REV_MIN_S 0 -+#define AR531X_REV_CHIP (AR531X_REV_MAJ|AR531X_REV_MIN) -+ -+/* Major revision numbers, bits 7..4 of Revision ID register */ -+#define AR531X_REV_MAJ_AR5312 0x4 -+#define AR531X_REV_MAJ_AR2313 0x5 -+ -+/* Minor revision numbers, bits 3..0 of Revision ID register */ -+#define AR5312_REV_MIN_DUAL 0x0 /* Dual WLAN version */ -+#define AR5312_REV_MIN_SINGLE 0x1 /* Single WLAN version */ -+ -+/* AR531X_FLASHCTL register bit field definitions */ -+#define FLASHCTL_IDCY 0x0000000f /* Idle cycle turn around time */ -+#define FLASHCTL_IDCY_S 0 -+#define FLASHCTL_WST1 0x000003e0 /* Wait state 1 */ -+#define FLASHCTL_WST1_S 5 -+#define FLASHCTL_RBLE 0x00000400 /* Read byte lane enable */ -+#define FLASHCTL_WST2 0x0000f800 /* Wait state 2 */ -+#define FLASHCTL_WST2_S 11 -+#define FLASHCTL_AC 0x00070000 /* Flash address check (added) */ -+#define FLASHCTL_AC_S 16 -+#define FLASHCTL_AC_128K 0x00000000 -+#define FLASHCTL_AC_256K 0x00010000 -+#define FLASHCTL_AC_512K 0x00020000 -+#define FLASHCTL_AC_1M 0x00030000 -+#define FLASHCTL_AC_2M 0x00040000 -+#define FLASHCTL_AC_4M 0x00050000 -+#define FLASHCTL_AC_8M 0x00060000 -+#define FLASHCTL_AC_RES 0x00070000 /* 16MB is not supported */ -+#define FLASHCTL_E 0x00080000 /* Flash bank enable (added) */ -+#define FLASHCTL_BUSERR 0x01000000 /* Bus transfer error status flag */ -+#define FLASHCTL_WPERR 0x02000000 /* Write protect error status flag */ -+#define FLASHCTL_WP 0x04000000 /* Write protect */ -+#define FLASHCTL_BM 0x08000000 /* Burst mode */ -+#define FLASHCTL_MW 0x30000000 /* Memory width */ -+#define FLASHCTL_MWx8 0x00000000 /* Memory width x8 */ -+#define FLASHCTL_MWx16 0x10000000 /* Memory width x16 */ -+#define FLASHCTL_MWx32 0x20000000 /* Memory width x32 (not supported) */ -+#define FLASHCTL_ATNR 0x00000000 /* Access type == no retry */ -+#define FLASHCTL_ATR 0x80000000 /* Access type == retry every */ -+#define FLASHCTL_ATR4 0xc0000000 /* Access type == retry every 4 */ -+ -+/* ARM Flash Controller -- 3 flash banks with either x8 or x16 devices. */ -+#define AR531X_FLASHCTL0 (AR531X_FLASHCTL + 0x00) -+#define AR531X_FLASHCTL1 (AR531X_FLASHCTL + 0x04) -+#define AR531X_FLASHCTL2 (AR531X_FLASHCTL + 0x08) -+ -+/* ARM SDRAM Controller -- just enough to determine memory size */ -+#define AR531X_MEM_CFG1 (AR531X_SDRAMCTL + 0x04) -+#define MEM_CFG1_AC0 0x00000700 /* bank 0: SDRAM addr check (added) */ -+#define MEM_CFG1_AC0_S 8 -+#define MEM_CFG1_AC1 0x00007000 /* bank 1: SDRAM addr check (added) */ -+#define MEM_CFG1_AC1_S 12 -+ -+/* GPIO Address Map */ -+#define AR531X_GPIO (AR531X_APBBASE + 0x2000) -+#define AR531X_GPIO_DO (AR531X_GPIO + 0x00) /* output register */ -+#define AR531X_GPIO_DI (AR531X_GPIO + 0x04) /* intput register */ -+#define AR531X_GPIO_CR (AR531X_GPIO + 0x08) /* control register */ -+ -+/* GPIO Control Register bit field definitions */ -+#define AR531X_GPIO_CR_M(x) (1 << (x)) /* mask for i/o */ -+#define AR531X_GPIO_CR_O(x) (0 << (x)) /* mask for output */ -+#define AR531X_GPIO_CR_I(x) (1 << (x)) /* mask for input */ -+#define AR531X_GPIO_CR_INT(x) (1 << ((x)+8)) /* mask for interrupt */ -+#define AR531X_GPIO_CR_UART(x) (1 << ((x)+16)) /* uart multiplex */ -+#define AR531X_NUM_GPIO 8 -+ -+ -+#endif -+ ---- /dev/null -+++ b/arch/mips/ar231x/ar5312.c -@@ -0,0 +1,547 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved. -+ * Copyright (C) 2006 FON Technology, SL. -+ * Copyright (C) 2006 Imre Kaloz -+ * Copyright (C) 2006-2009 Felix Fietkau -+ */ -+ -+/* -+ * Platform devices for Atheros SoCs -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include "devices.h" -+#include "ar5312.h" -+ -+static void -+ar5312_misc_irq_dispatch(void) -+{ -+ unsigned int ar231x_misc_intrs = ar231x_read_reg(AR531X_ISR) & ar231x_read_reg(AR531X_IMR); -+ -+ if (ar231x_misc_intrs & AR531X_ISR_TIMER) { -+ do_IRQ(AR531X_MISC_IRQ_TIMER); -+ (void)ar231x_read_reg(AR531X_TIMER); -+ } else if (ar231x_misc_intrs & AR531X_ISR_AHBPROC) -+ do_IRQ(AR531X_MISC_IRQ_AHB_PROC); -+ else if ((ar231x_misc_intrs & AR531X_ISR_UART0)) -+ do_IRQ(AR531X_MISC_IRQ_UART0); -+ else if (ar231x_misc_intrs & AR531X_ISR_WD) -+ do_IRQ(AR531X_MISC_IRQ_WATCHDOG); -+ else -+ do_IRQ(AR531X_MISC_IRQ_NONE); -+} -+ -+static asmlinkage void -+ar5312_irq_dispatch(void) -+{ -+ int pending = read_c0_status() & read_c0_cause(); -+ -+ if (pending & CAUSEF_IP2) -+ do_IRQ(AR5312_IRQ_WLAN0_INTRS); -+ else if (pending & CAUSEF_IP3) -+ do_IRQ(AR5312_IRQ_ENET0_INTRS); -+ else if (pending & CAUSEF_IP4) -+ do_IRQ(AR5312_IRQ_ENET1_INTRS); -+ else if (pending & CAUSEF_IP5) -+ do_IRQ(AR5312_IRQ_WLAN1_INTRS); -+ else if (pending & CAUSEF_IP6) -+ ar5312_misc_irq_dispatch(); -+ else if (pending & CAUSEF_IP7) -+ do_IRQ(AR531X_IRQ_CPU_CLOCK); -+} -+ -+ -+/* Enable the specified AR531X_MISC_IRQ interrupt */ -+static void -+ar5312_misc_intr_enable(unsigned int irq) -+{ -+ unsigned int imr; -+ -+ imr = ar231x_read_reg(AR531X_IMR); -+ imr |= (1 << (irq - AR531X_MISC_IRQ_BASE - 1)); -+ ar231x_write_reg(AR531X_IMR, imr); -+} -+ -+/* Disable the specified AR531X_MISC_IRQ interrupt */ -+static void -+ar5312_misc_intr_disable(unsigned int irq) -+{ -+ unsigned int imr; -+ -+ imr = ar231x_read_reg(AR531X_IMR); -+ imr &= ~(1 << (irq - AR531X_MISC_IRQ_BASE - 1)); -+ ar231x_write_reg(AR531X_IMR, imr); -+ ar231x_read_reg(AR531X_IMR); /* flush write buffer */ -+} -+ -+static void -+ar5312_misc_intr_end(unsigned int irq) -+{ -+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) -+ ar5312_misc_intr_enable(irq); -+} -+ -+static struct irq_chip ar5312_misc_intr_controller = { -+ .name = "AR5312-MISC", -+ .disable = ar5312_misc_intr_disable, -+ .ack = ar5312_misc_intr_disable, -+ .mask_ack = ar5312_misc_intr_disable, -+ .mask = ar5312_misc_intr_disable, -+ .unmask = ar5312_misc_intr_enable, -+ .end = ar5312_misc_intr_end, -+}; -+ -+ -+static irqreturn_t ar5312_ahb_proc_handler(int cpl, void *dev_id) -+{ -+ u32 proc1 = ar231x_read_reg(AR531X_PROC1); -+ u32 procAddr = ar231x_read_reg(AR531X_PROCADDR); /* clears error state */ -+ u32 dma1 = ar231x_read_reg(AR531X_DMA1); -+ u32 dmaAddr = ar231x_read_reg(AR531X_DMAADDR); /* clears error state */ -+ -+ printk("AHB interrupt: PROCADDR=0x%8.8x PROC1=0x%8.8x DMAADDR=0x%8.8x DMA1=0x%8.8x\n", -+ procAddr, proc1, dmaAddr, dma1); -+ -+ machine_restart("AHB error"); /* Catastrophic failure */ -+ return IRQ_HANDLED; -+} -+ -+ -+static struct irqaction ar5312_ahb_proc_interrupt = { -+ .handler = ar5312_ahb_proc_handler, -+ .flags = IRQF_DISABLED, -+ .name = "ar5312_ahb_proc_interrupt", -+}; -+ -+ -+static struct irqaction cascade = { -+ .handler = no_action, -+ .flags = IRQF_DISABLED, -+ .name = "cascade", -+}; -+ -+void __init ar5312_irq_init(void) -+{ -+ int i; -+ -+ if (!is_5312()) -+ return; -+ -+ ar231x_irq_dispatch = ar5312_irq_dispatch; -+ for (i = 0; i < AR531X_MISC_IRQ_COUNT; i++) { -+ int irq = AR531X_MISC_IRQ_BASE + i; -+ set_irq_chip_and_handler(irq, &ar5312_misc_intr_controller, -+ handle_level_irq); -+ } -+ setup_irq(AR531X_MISC_IRQ_AHB_PROC, &ar5312_ahb_proc_interrupt); -+ setup_irq(AR5312_IRQ_MISC_INTRS, &cascade); -+} -+ -+const struct ar231x_gpiodev ar5312_gpiodev; -+ -+static u32 -+ar5312_gpio_get_output(void) -+{ -+ u32 reg; -+ reg = ~(ar231x_read_reg(AR531X_GPIO_CR)); -+ reg &= ar5312_gpiodev.valid_mask; -+ return reg; -+} -+ -+static u32 -+ar5312_gpio_set_output(u32 mask, u32 val) -+{ -+ u32 reg; -+ -+ reg = ar231x_read_reg(AR531X_GPIO_CR); -+ reg |= mask; -+ reg &= ~val; -+ ar231x_write_reg(AR531X_GPIO_CR, reg); -+ return reg; -+} -+ -+static u32 -+ar5312_gpio_get(void) -+{ -+ u32 reg; -+ reg = ar231x_read_reg(AR531X_GPIO_DI); -+ reg &= ar5312_gpiodev.valid_mask; -+ return reg; -+} -+ -+static u32 -+ar5312_gpio_set(u32 mask, u32 value) -+{ -+ u32 reg; -+ reg = ar231x_read_reg(AR531X_GPIO_DO); -+ reg &= ~mask; -+ reg |= value; -+ ar231x_write_reg(AR531X_GPIO_DO, reg); -+ return reg; -+} -+ -+const struct ar231x_gpiodev ar5312_gpiodev = { -+ .valid_mask = (1 << 8) - 1, -+ .get_output = ar5312_gpio_get_output, -+ .set_output = ar5312_gpio_set_output, -+ .get = ar5312_gpio_get, -+ .set = ar5312_gpio_set, -+}; -+ -+static struct physmap_flash_data ar5312_flash_data = { -+ .width = 2, -+}; -+ -+static struct resource ar5312_flash_resource = { -+ .start = AR531X_FLASH, -+ .end = AR531X_FLASH + 0x800000 - 1, -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct ar231x_eth ar5312_eth0_data = { -+ .reset_base = AR531X_RESET, -+ .reset_mac = AR531X_RESET_ENET0, -+ .reset_phy = AR531X_RESET_EPHY0, -+ .phy_base = KSEG1ADDR(AR531X_ENET0), -+ .config = &ar231x_board, -+}; -+ -+static struct ar231x_eth ar5312_eth1_data = { -+ .reset_base = AR531X_RESET, -+ .reset_mac = AR531X_RESET_ENET1, -+ .reset_phy = AR531X_RESET_EPHY1, -+ .phy_base = KSEG1ADDR(AR531X_ENET1), -+ .config = &ar231x_board, -+}; -+ -+static struct platform_device ar5312_physmap_flash = { -+ .name = "physmap-flash", -+ .id = 0, -+ .dev.platform_data = &ar5312_flash_data, -+ .resource = &ar5312_flash_resource, -+ .num_resources = 1, -+}; -+ -+#ifdef CONFIG_LEDS_GPIO -+static struct gpio_led ar5312_leds[] = { -+ { .name = "wlan", .gpio = 0, .active_low = 1, }, -+}; -+ -+static const struct gpio_led_platform_data ar5312_led_data = { -+ .num_leds = ARRAY_SIZE(ar5312_leds), -+ .leds = (void *) ar5312_leds, -+}; -+ -+static struct platform_device ar5312_gpio_leds = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev.platform_data = (void *) &ar5312_led_data, -+}; -+#endif -+ -+/* -+ * NB: This mapping size is larger than the actual flash size, -+ * but this shouldn't be a problem here, because the flash -+ * will simply be mapped multiple times. -+ */ -+static char __init *ar5312_flash_limit(void) -+{ -+ u32 ctl; -+ /* -+ * Configure flash bank 0. -+ * Assume 8M window size. Flash will be aliased if it's smaller -+ */ -+ ctl = FLASHCTL_E | -+ FLASHCTL_AC_8M | -+ FLASHCTL_RBLE | -+ (0x01 << FLASHCTL_IDCY_S) | -+ (0x07 << FLASHCTL_WST1_S) | -+ (0x07 << FLASHCTL_WST2_S) | -+ (ar231x_read_reg(AR531X_FLASHCTL0) & FLASHCTL_MW); -+ -+ ar231x_write_reg(AR531X_FLASHCTL0, ctl); -+ -+ /* Disable other flash banks */ -+ ar231x_write_reg(AR531X_FLASHCTL1, -+ ar231x_read_reg(AR531X_FLASHCTL1) & ~(FLASHCTL_E | FLASHCTL_AC)); -+ -+ ar231x_write_reg(AR531X_FLASHCTL2, -+ ar231x_read_reg(AR531X_FLASHCTL2) & ~(FLASHCTL_E | FLASHCTL_AC)); -+ -+ return (char *) KSEG1ADDR(AR531X_FLASH + 0x800000); -+} -+ -+int __init ar5312_init_devices(void) -+{ -+ struct ar231x_boarddata *config; -+ u32 fctl = 0; -+ const u8 *radio; -+ u8 *c; -+ -+ if (!is_5312()) -+ return 0; -+ -+ /* Locate board/radio config data */ -+ ar231x_find_config(ar5312_flash_limit()); -+ config = ar231x_board.config; -+ -+ -+ /* -+ * Chip IDs and hardware detection for some Atheros -+ * models are really broken! -+ * -+ * Atheros uses a disabled WMAC0 and Silicon ID of AR5312 -+ * as indication for AR2312, which is otherwise -+ * indistinguishable from the real AR5312. -+ */ -+ if (ar231x_board.radio) { -+ radio = ar231x_board.radio + AR531X_RADIO_MASK_OFF; -+ if ((*((const u32 *) radio) & AR531X_RADIO0_MASK) == 0) -+ config->flags |= BD_ISCASPER; -+ } else -+ radio = NULL; -+ -+ /* AR2313 has CPU minor rev. 10 */ -+ if ((current_cpu_data.processor_id & 0xff) == 0x0a) -+ ar231x_devtype = DEV_TYPE_AR2313; -+ -+ /* AR2312 shares the same Silicon ID as AR5312 */ -+ else if (config->flags & BD_ISCASPER) -+ ar231x_devtype = DEV_TYPE_AR2312; -+ -+ /* Everything else is probably AR5312 or compatible */ -+ else -+ ar231x_devtype = DEV_TYPE_AR5312; -+ -+ /* fixup flash width */ -+ fctl = ar231x_read_reg(AR531X_FLASHCTL) & FLASHCTL_MW; -+ switch (fctl) { -+ case FLASHCTL_MWx16: -+ ar5312_flash_data.width = 2; -+ break; -+ case FLASHCTL_MWx8: -+ default: -+ ar5312_flash_data.width = 1; -+ break; -+ } -+ -+ platform_device_register(&ar5312_physmap_flash); -+ -+#ifdef CONFIG_LEDS_GPIO -+ ar5312_leds[0].gpio = config->sysLedGpio; -+ platform_device_register(&ar5312_gpio_leds); -+#endif -+ -+ /* Fix up MAC addresses if necessary */ -+ if (!memcmp(config->enet0_mac, "\xff\xff\xff\xff\xff\xff", 6)) -+ memcpy(config->enet0_mac, config->enet1_mac, 6); -+ -+ /* If ENET0 and ENET1 have the same mac address, -+ * increment the one from ENET1 */ -+ if (memcmp(config->enet0_mac, config->enet1_mac, 6) == 0) { -+ c = config->enet1_mac + 5; -+ while ((c >= config->enet1_mac) && !(++(*c))) -+ c--; -+ } -+ -+ switch(ar231x_devtype) { -+ case DEV_TYPE_AR5312: -+ ar5312_eth0_data.macaddr = config->enet0_mac; -+ ar231x_add_ethernet(0, KSEG1ADDR(AR531X_ENET0), -+ AR5312_IRQ_ENET0_INTRS, &ar5312_eth0_data); -+ -+ ar5312_eth1_data.macaddr = config->enet1_mac; -+ ar231x_add_ethernet(1, KSEG1ADDR(AR531X_ENET1), -+ AR5312_IRQ_ENET1_INTRS, &ar5312_eth1_data); -+ -+ if (!ar231x_board.radio) -+ return 0; -+ -+ if (*((u32 *) radio) & AR531X_RADIO0_MASK) -+ ar231x_add_wmac(0, AR531X_WLAN0, -+ AR5312_IRQ_WLAN0_INTRS); -+ -+ break; -+ /* -+ * AR2312/3 ethernet uses the PHY of ENET0, but the MAC -+ * of ENET1. Atheros calls it 'twisted' for a reason :) -+ */ -+ case DEV_TYPE_AR2312: -+ case DEV_TYPE_AR2313: -+ ar5312_eth1_data.phy_base = ar5312_eth0_data.phy_base; -+ ar5312_eth1_data.reset_phy = ar5312_eth0_data.reset_phy; -+ ar5312_eth1_data.macaddr = config->enet0_mac; -+ ar231x_add_ethernet(0, KSEG1ADDR(AR531X_ENET1), -+ AR5312_IRQ_ENET1_INTRS, &ar5312_eth1_data); -+ -+ if (!ar231x_board.radio) -+ return 0; -+ break; -+ default: -+ break; -+ } -+ -+ if (*((u32 *) radio) & AR531X_RADIO1_MASK) -+ ar231x_add_wmac(1, AR531X_WLAN1, -+ AR5312_IRQ_WLAN1_INTRS); -+ -+ return 0; -+} -+ -+ -+static void ar5312_restart(char *command) -+{ -+ /* reset the system */ -+ local_irq_disable(); -+ while(1) { -+ ar231x_write_reg(AR531X_RESET, AR531X_RESET_SYSTEM); -+ } -+} -+ -+ -+/* -+ * This table is indexed by bits 5..4 of the CLOCKCTL1 register -+ * to determine the predevisor value. -+ */ -+static int __initdata CLOCKCTL1_PREDIVIDE_TABLE[4] = { 1, 2, 4, 5 }; -+ -+ -+static int __init -+ar5312_cpu_frequency(void) -+{ -+ unsigned int result; -+ unsigned int predivide_mask, predivide_shift; -+ unsigned int multiplier_mask, multiplier_shift; -+ unsigned int clockCtl1, preDivideSelect, preDivisor, multiplier; -+ unsigned int doubler_mask; -+ u16 devid; -+ -+ /* Trust the bootrom's idea of cpu frequency. */ -+ if ((result = ar231x_read_reg(AR5312_SCRATCH))) -+ return result; -+ -+ devid = ar231x_read_reg(AR531X_REV); -+ devid &= AR531X_REV_MAJ; -+ devid >>= AR531X_REV_MAJ_S; -+ if (devid == AR531X_REV_MAJ_AR2313) { -+ predivide_mask = AR2313_CLOCKCTL1_PREDIVIDE_MASK; -+ predivide_shift = AR2313_CLOCKCTL1_PREDIVIDE_SHIFT; -+ multiplier_mask = AR2313_CLOCKCTL1_MULTIPLIER_MASK; -+ multiplier_shift = AR2313_CLOCKCTL1_MULTIPLIER_SHIFT; -+ doubler_mask = AR2313_CLOCKCTL1_DOUBLER_MASK; -+ } else { /* AR5312 and AR2312 */ -+ predivide_mask = AR5312_CLOCKCTL1_PREDIVIDE_MASK; -+ predivide_shift = AR5312_CLOCKCTL1_PREDIVIDE_SHIFT; -+ multiplier_mask = AR5312_CLOCKCTL1_MULTIPLIER_MASK; -+ multiplier_shift = AR5312_CLOCKCTL1_MULTIPLIER_SHIFT; -+ doubler_mask = AR5312_CLOCKCTL1_DOUBLER_MASK; -+ } -+ -+ /* -+ * Clocking is derived from a fixed 40MHz input clock. -+ * -+ * cpuFreq = InputClock * MULT (where MULT is PLL multiplier) -+ * sysFreq = cpuFreq / 4 (used for APB clock, serial, -+ * flash, Timer, Watchdog Timer) -+ * -+ * cntFreq = cpuFreq / 2 (use for CPU count/compare) -+ * -+ * So, for example, with a PLL multiplier of 5, we have -+ * -+ * cpuFreq = 200MHz -+ * sysFreq = 50MHz -+ * cntFreq = 100MHz -+ * -+ * We compute the CPU frequency, based on PLL settings. -+ */ -+ -+ clockCtl1 = ar231x_read_reg(AR5312_CLOCKCTL1); -+ preDivideSelect = (clockCtl1 & predivide_mask) >> predivide_shift; -+ preDivisor = CLOCKCTL1_PREDIVIDE_TABLE[preDivideSelect]; -+ multiplier = (clockCtl1 & multiplier_mask) >> multiplier_shift; -+ -+ if (clockCtl1 & doubler_mask) { -+ multiplier = multiplier << 1; -+ } -+ return (40000000 / preDivisor) * multiplier; -+} -+ -+static inline int -+ar5312_sys_frequency(void) -+{ -+ return ar5312_cpu_frequency() / 4; -+} -+ -+void __init -+ar5312_time_init(void) -+{ -+ if (!is_5312()) -+ return; -+ -+ mips_hpt_frequency = ar5312_cpu_frequency() / 2; -+} -+ -+ -+void __init -+ar5312_prom_init(void) -+{ -+ u32 memsize, memcfg, bank0AC, bank1AC; -+ u32 devid; -+ -+ if (!is_5312()) -+ return; -+ -+ /* Detect memory size */ -+ memcfg = ar231x_read_reg(AR531X_MEM_CFG1); -+ bank0AC = (memcfg & MEM_CFG1_AC0) >> MEM_CFG1_AC0_S; -+ bank1AC = (memcfg & MEM_CFG1_AC1) >> MEM_CFG1_AC1_S; -+ memsize = (bank0AC ? (1 << (bank0AC+1)) : 0) -+ + (bank1AC ? (1 << (bank1AC+1)) : 0); -+ memsize <<= 20; -+ add_memory_region(0, memsize, BOOT_MEM_RAM); -+ -+ devid = ar231x_read_reg(AR531X_REV); -+ devid >>= AR531X_REV_WMAC_MIN_S; -+ devid &= AR531X_REV_CHIP; -+ ar231x_board.devid = (u16) devid; -+ ar231x_gpiodev = &ar5312_gpiodev; -+} -+ -+void __init -+ar5312_plat_setup(void) -+{ -+ if (!is_5312()) -+ return; -+ -+ /* Clear any lingering AHB errors */ -+ ar231x_read_reg(AR531X_PROCADDR); -+ ar231x_read_reg(AR531X_DMAADDR); -+ ar231x_write_reg(AR531X_WD_CTRL, AR531X_WD_CTRL_IGNORE_EXPIRATION); -+ -+ _machine_restart = ar5312_restart; -+ ar231x_serial_setup(KSEG1ADDR(AR531X_UART0), ar5312_sys_frequency()); -+} -+ ---- /dev/null -+++ b/arch/mips/ar231x/ar2315.c -@@ -0,0 +1,658 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2003 Atheros Communications, Inc., All Rights Reserved. -+ * Copyright (C) 2006 FON Technology, SL. -+ * Copyright (C) 2006 Imre Kaloz -+ * Copyright (C) 2006 Felix Fietkau -+ */ -+ -+/* -+ * Platform devices for Atheros SoCs -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include "devices.h" -+#include "ar2315.h" -+ -+static u32 gpiointmask = 0, gpiointval = 0; -+ -+static inline void ar2315_gpio_irq(void) -+{ -+ u32 pend; -+ int bit = -1; -+ -+ /* only do one gpio interrupt at a time */ -+ pend = (ar231x_read_reg(AR2315_GPIO_DI) ^ gpiointval) & gpiointmask; -+ -+ if (pend) { -+ bit = fls(pend) - 1; -+ pend &= ~(1 << bit); -+ gpiointval ^= (1 << bit); -+ } -+ -+ if (!pend) -+ ar231x_write_reg(AR2315_ISR, AR2315_ISR_GPIO); -+ -+ /* Enable interrupt with edge detection */ -+ if ((ar231x_read_reg(AR2315_GPIO_CR) & AR2315_GPIO_CR_M(bit)) != AR2315_GPIO_CR_I(bit)) -+ return; -+ -+ if (bit >= 0) -+ do_IRQ(AR531X_GPIO_IRQ_BASE + bit); -+} -+ -+ -+/* -+ * Called when an interrupt is received, this function -+ * determines exactly which interrupt it was, and it -+ * invokes the appropriate handler. -+ * -+ * Implicitly, we also define interrupt priority by -+ * choosing which to dispatch first. -+ */ -+static asmlinkage void -+ar2315_irq_dispatch(void) -+{ -+ int pending = read_c0_status() & read_c0_cause(); -+ -+ if (pending & CAUSEF_IP3) -+ do_IRQ(AR2315_IRQ_WLAN0_INTRS); -+ else if (pending & CAUSEF_IP4) -+ do_IRQ(AR2315_IRQ_ENET0_INTRS); -+ else if (pending & CAUSEF_IP2) { -+ unsigned int misc_intr = ar231x_read_reg(AR2315_ISR) & ar231x_read_reg(AR2315_IMR); -+ -+ if (misc_intr & AR2315_ISR_SPI) -+ do_IRQ(AR531X_MISC_IRQ_SPI); -+ else if (misc_intr & AR2315_ISR_TIMER) -+ do_IRQ(AR531X_MISC_IRQ_TIMER); -+ else if (misc_intr & AR2315_ISR_AHB) -+ do_IRQ(AR531X_MISC_IRQ_AHB_PROC); -+ else if (misc_intr & AR2315_ISR_GPIO) -+ ar2315_gpio_irq(); -+ else if (misc_intr & AR2315_ISR_UART0) -+ do_IRQ(AR531X_MISC_IRQ_UART0); -+ else if (misc_intr & AR2315_ISR_WD) -+ do_IRQ(AR531X_MISC_IRQ_WATCHDOG); -+ else -+ do_IRQ(AR531X_MISC_IRQ_NONE); -+ } else if (pending & CAUSEF_IP7) -+ do_IRQ(AR531X_IRQ_CPU_CLOCK); -+} -+ -+static void ar2315_set_gpiointmask(int gpio, int level) -+{ -+ u32 reg; -+ -+ reg = ar231x_read_reg(AR2315_GPIO_INT); -+ reg &= ~(AR2315_GPIO_INT_M | AR2315_GPIO_INT_LVL_M); -+ reg |= gpio | AR2315_GPIO_INT_LVL(level); -+ ar231x_write_reg(AR2315_GPIO_INT, reg); -+} -+ -+static void ar2315_gpio_intr_enable(unsigned int irq) -+{ -+ unsigned int gpio = irq - AR531X_GPIO_IRQ_BASE; -+ -+ /* Enable interrupt with edge detection */ -+ if ((ar231x_read_reg(AR2315_GPIO_CR) & AR2315_GPIO_CR_M(gpio)) != AR2315_GPIO_CR_I(gpio)) -+ return; -+ -+ gpiointmask |= (1 << gpio); -+ ar2315_set_gpiointmask(gpio, 3); -+} -+ -+static unsigned int ar2315_gpio_intr_startup(unsigned int irq) -+{ -+ unsigned int gpio = irq - AR531X_GPIO_IRQ_BASE; -+ -+ /* reconfigure GPIO line as input */ -+ ar231x_mask_reg(AR2315_GPIO_CR, AR2315_GPIO_CR_M(gpio), AR2315_GPIO_CR_I(gpio)); -+ ar2315_gpio_intr_enable(irq); -+ return 0; -+} -+ -+static void ar2315_gpio_intr_disable(unsigned int irq) -+{ -+ unsigned int gpio = irq - AR531X_GPIO_IRQ_BASE; -+ -+ /* Disable interrupt */ -+ gpiointmask &= ~(1 << gpio); -+ ar2315_set_gpiointmask(gpio, 0); -+} -+ -+static void -+ar2315_gpio_intr_end(unsigned int irq) -+{ -+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) -+ ar2315_gpio_intr_enable(irq); -+} -+ -+static struct irq_chip ar2315_gpio_intr_controller = { -+ .typename = "AR2315-GPIO", -+ .startup = ar2315_gpio_intr_startup, -+ .ack = ar2315_gpio_intr_disable, -+ .mask_ack = ar2315_gpio_intr_disable, -+ .mask = ar2315_gpio_intr_disable, -+ .unmask = ar2315_gpio_intr_enable, -+ .end = ar2315_gpio_intr_end, -+}; -+ -+static void -+ar2315_misc_intr_enable(unsigned int irq) -+{ -+ unsigned int imr; -+ -+ imr = ar231x_read_reg(AR2315_IMR); -+ switch(irq) { -+ case AR531X_MISC_IRQ_SPI: -+ imr |= AR2315_ISR_SPI; -+ break; -+ case AR531X_MISC_IRQ_TIMER: -+ imr |= AR2315_ISR_TIMER; -+ break; -+ case AR531X_MISC_IRQ_AHB_PROC: -+ imr |= AR2315_ISR_AHB; -+ break; -+ case AR531X_MISC_IRQ_GPIO: -+ imr |= AR2315_ISR_GPIO; -+ break; -+ case AR531X_MISC_IRQ_UART0: -+ imr |= AR2315_ISR_UART0; -+ break; -+ case AR531X_MISC_IRQ_WATCHDOG: -+ imr |= AR2315_ISR_WD; -+ break; -+ default: -+ break; -+ } -+ ar231x_write_reg(AR2315_IMR, imr); -+} -+ -+static void -+ar2315_misc_intr_disable(unsigned int irq) -+{ -+ unsigned int imr; -+ -+ imr = ar231x_read_reg(AR2315_IMR); -+ switch(irq) { -+ case AR531X_MISC_IRQ_SPI: -+ imr &= ~AR2315_ISR_SPI; -+ break; -+ case AR531X_MISC_IRQ_TIMER: -+ imr &= ~AR2315_ISR_TIMER; -+ break; -+ case AR531X_MISC_IRQ_AHB_PROC: -+ imr &= ~AR2315_ISR_AHB; -+ break; -+ case AR531X_MISC_IRQ_GPIO: -+ imr &= ~AR2315_ISR_GPIO; -+ break; -+ case AR531X_MISC_IRQ_UART0: -+ imr &= ~AR2315_ISR_UART0; -+ break; -+ case AR531X_MISC_IRQ_WATCHDOG: -+ imr &= ~AR2315_ISR_WD; -+ break; -+ default: -+ break; -+ } -+ ar231x_write_reg(AR2315_IMR, imr); -+} -+ -+static void -+ar2315_misc_intr_end(unsigned int irq) -+{ -+ if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) -+ ar2315_misc_intr_enable(irq); -+} -+ -+ -+static struct irq_chip ar2315_misc_intr_controller = { -+ .typename = "AR2315-MISC", -+ .ack = ar2315_misc_intr_disable, -+ .mask_ack = ar2315_misc_intr_disable, -+ .mask = ar2315_misc_intr_disable, -+ .unmask = ar2315_misc_intr_enable, -+ .end = ar2315_misc_intr_end, -+}; -+ -+static irqreturn_t ar2315_ahb_proc_handler(int cpl, void *dev_id) -+{ -+ ar231x_write_reg(AR2315_AHB_ERR0, AHB_ERROR_DET); -+ ar231x_read_reg(AR2315_AHB_ERR1); -+ -+ printk(KERN_ERR "AHB fatal error\n"); -+ machine_restart("AHB error"); /* Catastrophic failure */ -+ -+ return IRQ_HANDLED; -+} -+ -+static struct irqaction ar2315_ahb_proc_interrupt = { -+ .handler = ar2315_ahb_proc_handler, -+ .flags = IRQF_DISABLED, -+ .name = "ar2315_ahb_proc_interrupt", -+}; -+ -+static struct irqaction cascade = { -+ .handler = no_action, -+ .flags = IRQF_DISABLED, -+ .name = "cascade", -+}; -+ -+void -+ar2315_irq_init(void) -+{ -+ int i; -+ -+ if (!is_2315()) -+ return; -+ -+ ar231x_irq_dispatch = ar2315_irq_dispatch; -+ gpiointval = ar231x_read_reg(AR2315_GPIO_DI); -+ for (i = 0; i < AR531X_MISC_IRQ_COUNT; i++) { -+ int irq = AR531X_MISC_IRQ_BASE + i; -+ set_irq_chip_and_handler(irq, &ar2315_misc_intr_controller, -+ handle_level_irq); -+ } -+ for (i = 0; i < AR531X_GPIO_IRQ_COUNT; i++) { -+ int irq = AR531X_GPIO_IRQ_BASE + i; -+ set_irq_chip_and_handler(irq, &ar2315_gpio_intr_controller, -+ handle_level_irq); -+ } -+ setup_irq(AR531X_MISC_IRQ_GPIO, &cascade); -+ setup_irq(AR531X_MISC_IRQ_AHB_PROC, &ar2315_ahb_proc_interrupt); -+ setup_irq(AR2315_IRQ_MISC_INTRS, &cascade); -+} -+ -+const struct ar231x_gpiodev ar2315_gpiodev; -+ -+static u32 -+ar2315_gpio_get_output(void) -+{ -+ u32 reg; -+ reg = ar231x_read_reg(AR2315_GPIO_CR); -+ reg &= ar2315_gpiodev.valid_mask; -+ return reg; -+} -+ -+static u32 -+ar2315_gpio_set_output(u32 mask, u32 val) -+{ -+ u32 reg; -+ -+ reg = ar231x_read_reg(AR2315_GPIO_CR); -+ reg &= ~mask; -+ reg |= val; -+ ar231x_write_reg(AR2315_GPIO_CR, reg); -+ return reg; -+} -+ -+static u32 -+ar2315_gpio_get(void) -+{ -+ u32 reg; -+ reg = ar231x_read_reg(AR2315_GPIO_DI); -+ reg &= ar2315_gpiodev.valid_mask; -+ return reg; -+} -+ -+static u32 -+ar2315_gpio_set(u32 mask, u32 value) -+{ -+ u32 reg; -+ reg = ar231x_read_reg(AR2315_GPIO_DO); -+ reg &= ~mask; -+ reg |= value; -+ ar231x_write_reg(AR2315_GPIO_DO, reg); -+ return reg; -+} -+ -+const struct ar231x_gpiodev ar2315_gpiodev = { -+ .valid_mask = (1 << 22) - 1, -+ .get_output = ar2315_gpio_get_output, -+ .set_output = ar2315_gpio_set_output, -+ .get = ar2315_gpio_get, -+ .set = ar2315_gpio_set, -+}; -+ -+static struct ar231x_eth ar2315_eth_data = { -+ .reset_base = AR2315_RESET, -+ .reset_mac = AR2315_RESET_ENET0, -+ .reset_phy = AR2315_RESET_EPHY0, -+ .phy_base = AR2315_ENET0, -+ .config = &ar231x_board, -+}; -+ -+static struct resource ar2315_spiflash_res[] = { -+ { -+ .name = "flash_base", -+ .flags = IORESOURCE_MEM, -+ .start = KSEG1ADDR(AR2315_SPI_READ), -+ .end = KSEG1ADDR(AR2315_SPI_READ) + 0x1000000 - 1, -+ }, -+ { -+ .name = "flash_regs", -+ .flags = IORESOURCE_MEM, -+ .start = 0x11300000, -+ .end = 0x11300012, -+ }, -+}; -+ -+static struct platform_device ar2315_spiflash = { -+ .id = 0, -+ .name = "spiflash", -+ .resource = ar2315_spiflash_res, -+ .num_resources = ARRAY_SIZE(ar2315_spiflash_res) -+}; -+ -+static struct platform_device ar2315_wdt = { -+ .id = 0, -+ .name = "ar2315_wdt", -+}; -+ -+#define SPI_FLASH_CTL 0x00 -+#define SPI_FLASH_OPCODE 0x04 -+#define SPI_FLASH_DATA 0x08 -+ -+static inline u32 -+spiflash_read_reg(int reg) -+{ -+ return ar231x_read_reg(KSEG1ADDR(AR2315_SPI) + reg); -+} -+ -+static inline void -+spiflash_write_reg(int reg, u32 data) -+{ -+ ar231x_write_reg(KSEG1ADDR(AR2315_SPI) + reg, data); -+} -+ -+static u32 -+spiflash_wait_status(void) -+{ -+ u32 reg; -+ -+ do { -+ reg = spiflash_read_reg(SPI_FLASH_CTL); -+ } while (reg & SPI_CTL_BUSY); -+ -+ return reg; -+} -+ -+static u8 -+spiflash_probe(void) -+{ -+ u32 reg; -+ -+ reg = spiflash_wait_status(); -+ reg &= ~SPI_CTL_TX_RX_CNT_MASK; -+ reg |= (1 << 4) | 4 | SPI_CTL_START; -+ -+ spiflash_write_reg(SPI_FLASH_OPCODE, 0xab); -+ spiflash_write_reg(SPI_FLASH_CTL, reg); -+ -+ reg = spiflash_wait_status(); -+ reg = spiflash_read_reg(SPI_FLASH_DATA); -+ reg &= 0xff; -+ -+ return (u8) reg; -+} -+ -+ -+#define STM_8MBIT_SIGNATURE 0x13 -+#define STM_16MBIT_SIGNATURE 0x14 -+#define STM_32MBIT_SIGNATURE 0x15 -+#define STM_64MBIT_SIGNATURE 0x16 -+#define STM_128MBIT_SIGNATURE 0x17 -+ -+static u8 __init * -+ar2315_flash_limit(void) -+{ -+ u32 flash_size = 0; -+ -+ /* probe the flash chip size */ -+ switch(spiflash_probe()) { -+ case STM_8MBIT_SIGNATURE: -+ flash_size = 0x00100000; -+ break; -+ case STM_16MBIT_SIGNATURE: -+ flash_size = 0x00200000; -+ break; -+ case STM_32MBIT_SIGNATURE: -+ flash_size = 0x00400000; -+ break; -+ case STM_64MBIT_SIGNATURE: -+ flash_size = 0x00800000; -+ break; -+ case STM_128MBIT_SIGNATURE: -+ flash_size = 0x01000000; -+ break; -+ } -+ -+ ar2315_spiflash_res[0].end = ar2315_spiflash_res[0].start + -+ flash_size - 1; -+ return (u8 *) ar2315_spiflash_res[0].end + 1; -+} -+ -+#ifdef CONFIG_LEDS_GPIO -+static struct gpio_led ar2315_leds[6]; -+static struct gpio_led_platform_data ar2315_led_data = { -+ .leds = (void *) ar2315_leds, -+}; -+ -+static struct platform_device ar2315_gpio_leds = { -+ .name = "leds-gpio", -+ .id = -1, -+ .dev = { -+ .platform_data = (void *) &ar2315_led_data, -+ } -+}; -+ -+static void __init -+ar2315_init_gpio(void) -+{ -+ static char led_names[6][6]; -+ int i, led = 0; -+ -+ ar2315_led_data.num_leds = 0; -+ for(i = 1; i < 8; i++) -+ { -+ if((i == AR2315_RESET_GPIO) || -+ (i == ar231x_board.config->resetConfigGpio)) -+ continue; -+ -+ if(i == ar231x_board.config->sysLedGpio) -+ strcpy(led_names[led], "wlan"); -+ else -+ sprintf(led_names[led], "gpio%d", i); -+ -+ ar2315_leds[led].name = led_names[led]; -+ ar2315_leds[led].gpio = i; -+ ar2315_leds[led].active_low = 0; -+ led++; -+ } -+ ar2315_led_data.num_leds = led; -+ platform_device_register(&ar2315_gpio_leds); -+} -+#else -+static inline void ar2315_init_gpio(void) -+{ -+} -+#endif -+ -+int __init -+ar2315_init_devices(void) -+{ -+ if (!is_2315()) -+ return 0; -+ -+ /* Find board configuration */ -+ ar231x_find_config(ar2315_flash_limit()); -+ ar2315_eth_data.macaddr = ar231x_board.config->enet0_mac; -+ -+ ar2315_init_gpio(); -+ platform_device_register(&ar2315_wdt); -+ platform_device_register(&ar2315_spiflash); -+ ar231x_add_ethernet(0, AR2315_ENET0, AR2315_IRQ_ENET0_INTRS, -+ &ar2315_eth_data); -+ ar231x_add_wmac(0, AR2315_WLAN0, AR2315_IRQ_WLAN0_INTRS); -+ -+ return 0; -+} -+ -+static void -+ar2315_restart(char *command) -+{ -+ void (*mips_reset_vec)(void) = (void *) 0xbfc00000; -+ -+ local_irq_disable(); -+ -+ /* try reset the system via reset control */ -+ ar231x_write_reg(AR2315_COLD_RESET,AR2317_RESET_SYSTEM); -+ -+ /* Cold reset does not work on the AR2315/6, use the GPIO reset bits a workaround. -+ * give it some time to attempt a gpio based hardware reset -+ * (atheros reference design workaround) */ -+ gpio_direction_output(AR2315_RESET_GPIO, 0); -+ mdelay(100); -+ -+ /* Some boards (e.g. Senao EOC-2610) don't implement the reset logic -+ * workaround. Attempt to jump to the mips reset location - -+ * the boot loader itself might be able to recover the system */ -+ mips_reset_vec(); -+} -+ -+ -+/* -+ * This table is indexed by bits 5..4 of the CLOCKCTL1 register -+ * to determine the predevisor value. -+ */ -+static int __initdata CLOCKCTL1_PREDIVIDE_TABLE[4] = { 1, 2, 4, 5 }; -+static int __initdata PLLC_DIVIDE_TABLE[5] = { 2, 3, 4, 6, 3 }; -+ -+static unsigned int __init -+ar2315_sys_clk(unsigned int clockCtl) -+{ -+ unsigned int pllcCtrl,cpuDiv; -+ unsigned int pllcOut,refdiv,fdiv,divby2; -+ unsigned int clkDiv; -+ -+ pllcCtrl = ar231x_read_reg(AR2315_PLLC_CTL); -+ refdiv = (pllcCtrl & PLLC_REF_DIV_M) >> PLLC_REF_DIV_S; -+ refdiv = CLOCKCTL1_PREDIVIDE_TABLE[refdiv]; -+ fdiv = (pllcCtrl & PLLC_FDBACK_DIV_M) >> PLLC_FDBACK_DIV_S; -+ divby2 = (pllcCtrl & PLLC_ADD_FDBACK_DIV_M) >> PLLC_ADD_FDBACK_DIV_S; -+ divby2 += 1; -+ pllcOut = (40000000/refdiv)*(2*divby2)*fdiv; -+ -+ -+ /* clkm input selected */ -+ switch(clockCtl & CPUCLK_CLK_SEL_M) { -+ case 0: -+ case 1: -+ clkDiv = PLLC_DIVIDE_TABLE[(pllcCtrl & PLLC_CLKM_DIV_M) >> PLLC_CLKM_DIV_S]; -+ break; -+ case 2: -+ clkDiv = PLLC_DIVIDE_TABLE[(pllcCtrl & PLLC_CLKC_DIV_M) >> PLLC_CLKC_DIV_S]; -+ break; -+ default: -+ pllcOut = 40000000; -+ clkDiv = 1; -+ break; -+ } -+ cpuDiv = (clockCtl & CPUCLK_CLK_DIV_M) >> CPUCLK_CLK_DIV_S; -+ cpuDiv = cpuDiv * 2 ?: 1; -+ return (pllcOut/(clkDiv * cpuDiv)); -+} -+ -+static inline unsigned int -+ar2315_cpu_frequency(void) -+{ -+ return ar2315_sys_clk(ar231x_read_reg(AR2315_CPUCLK)); -+} -+ -+static inline unsigned int -+ar2315_apb_frequency(void) -+{ -+ return ar2315_sys_clk(ar231x_read_reg(AR2315_AMBACLK)); -+} -+ -+void __init -+ar2315_time_init(void) -+{ -+ if (!is_2315()) -+ return; -+ -+ mips_hpt_frequency = ar2315_cpu_frequency() / 2; -+} -+ -+void __init -+ar2315_prom_init(void) -+{ -+ u32 memsize, memcfg, devid; -+ -+ if (!is_2315()) -+ return; -+ -+ memcfg = ar231x_read_reg(AR2315_MEM_CFG); -+ memsize = 1 + ((memcfg & SDRAM_DATA_WIDTH_M) >> SDRAM_DATA_WIDTH_S); -+ memsize <<= 1 + ((memcfg & SDRAM_COL_WIDTH_M) >> SDRAM_COL_WIDTH_S); -+ memsize <<= 1 + ((memcfg & SDRAM_ROW_WIDTH_M) >> SDRAM_ROW_WIDTH_S); -+ memsize <<= 3; -+ add_memory_region(0, memsize, BOOT_MEM_RAM); -+ -+ /* Detect the hardware based on the device ID */ -+ devid = ar231x_read_reg(AR2315_SREV) & AR2315_REV_CHIP; -+ switch(devid) { -+ case 0x90: -+ case 0x91: -+ ar231x_devtype = DEV_TYPE_AR2317; -+ break; -+ default: -+ ar231x_devtype = DEV_TYPE_AR2315; -+ break; -+ } -+ ar231x_gpiodev = &ar2315_gpiodev; -+ ar231x_board.devid = devid; -+} -+ -+void __init -+ar2315_plat_setup(void) -+{ -+ u32 config; -+ -+ if (!is_2315()) -+ return; -+ -+ /* Clear any lingering AHB errors */ -+ config = read_c0_config(); -+ write_c0_config(config & ~0x3); -+ ar231x_write_reg(AR2315_AHB_ERR0,AHB_ERROR_DET); -+ ar231x_read_reg(AR2315_AHB_ERR1); -+ ar231x_write_reg(AR2315_WDC, AR2315_WDC_IGNORE_EXPIRATION); -+ -+ _machine_restart = ar2315_restart; -+ ar231x_serial_setup(KSEG1ADDR(AR2315_UART0), ar2315_apb_frequency()); -+} ---- /dev/null -+++ b/arch/mips/ar231x/ar2315.h -@@ -0,0 +1,37 @@ -+#ifndef __AR2315_H -+#define __AR2315_H -+ -+#ifdef CONFIG_ATHEROS_AR2315 -+ -+extern void ar2315_irq_init(void); -+extern int ar2315_init_devices(void); -+extern void ar2315_prom_init(void); -+extern void ar2315_plat_setup(void); -+extern void ar2315_time_init(void); -+ -+#else -+ -+static inline void ar2315_irq_init(void) -+{ -+} -+ -+static inline int ar2315_init_devices(void) -+{ -+ return 0; -+} -+ -+static inline void ar2315_prom_init(void) -+{ -+} -+ -+static inline void ar2315_plat_setup(void) -+{ -+} -+ -+static inline void ar2315_time_init(void) -+{ -+} -+ -+#endif -+ -+#endif ---- /dev/null -+++ b/arch/mips/ar231x/ar5312.h -@@ -0,0 +1,38 @@ -+#ifndef __AR5312_H -+#define __AR5312_H -+ -+#ifdef CONFIG_ATHEROS_AR5312 -+ -+extern void ar5312_irq_init(void); -+extern int ar5312_init_devices(void); -+extern void ar5312_prom_init(void); -+extern void ar5312_plat_setup(void); -+extern void ar5312_time_init(void); -+extern void ar5312_time_init(void); -+ -+#else -+ -+static inline void ar5312_irq_init(void) -+{ -+} -+ -+static inline int ar5312_init_devices(void) -+{ -+ return 0; -+} -+ -+static inline void ar5312_prom_init(void) -+{ -+} -+ -+static inline void ar5312_plat_setup(void) -+{ -+} -+ -+static inline void ar5312_time_init(void) -+{ -+} -+ -+#endif -+ -+#endif ---- /dev/null -+++ b/arch/mips/include/asm/mach-ar231x/ar231x.h -@@ -0,0 +1,54 @@ -+#ifndef __AR531X_H -+#define __AR531X_H -+ -+#define AR531X_MISC_IRQ_BASE 0x20 -+#define AR531X_GPIO_IRQ_BASE 0x30 -+ -+/* Software's idea of interrupts handled by "CPU Interrupt Controller" */ -+#define AR531X_IRQ_NONE MIPS_CPU_IRQ_BASE+0 -+#define AR531X_IRQ_CPU_CLOCK MIPS_CPU_IRQ_BASE+7 /* C0_CAUSE: 0x8000 */ -+ -+/* Miscellaneous interrupts, which share IP6 */ -+#define AR531X_MISC_IRQ_NONE AR531X_MISC_IRQ_BASE+0 -+#define AR531X_MISC_IRQ_TIMER AR531X_MISC_IRQ_BASE+1 -+#define AR531X_MISC_IRQ_AHB_PROC AR531X_MISC_IRQ_BASE+2 -+#define AR531X_MISC_IRQ_AHB_DMA AR531X_MISC_IRQ_BASE+3 -+#define AR531X_MISC_IRQ_GPIO AR531X_MISC_IRQ_BASE+4 -+#define AR531X_MISC_IRQ_UART0 AR531X_MISC_IRQ_BASE+5 -+#define AR531X_MISC_IRQ_UART0_DMA AR531X_MISC_IRQ_BASE+6 -+#define AR531X_MISC_IRQ_WATCHDOG AR531X_MISC_IRQ_BASE+7 -+#define AR531X_MISC_IRQ_LOCAL AR531X_MISC_IRQ_BASE+8 -+#define AR531X_MISC_IRQ_SPI AR531X_MISC_IRQ_BASE+9 -+#define AR531X_MISC_IRQ_COUNT 10 -+ -+/* GPIO Interrupts [0..7], share AR531X_MISC_IRQ_GPIO */ -+#define AR531X_GPIO_IRQ_NONE AR531X_GPIO_IRQ_BASE+0 -+#define AR531X_GPIO_IRQ(n) AR531X_GPIO_IRQ_BASE+n -+#define AR531X_GPIO_IRQ_COUNT 22 -+ -+static inline u32 -+ar231x_read_reg(u32 reg) -+{ -+ return __raw_readl((u32 *) KSEG1ADDR(reg)); -+} -+ -+static inline void -+ar231x_write_reg(u32 reg, u32 val) -+{ -+ __raw_writel(val, (u32 *) KSEG1ADDR(reg)); -+} -+ -+static inline u32 -+ar231x_mask_reg(u32 reg, u32 mask, u32 val) -+{ -+ u32 ret; -+ -+ ret = ar231x_read_reg(reg); -+ ret &= ~mask; -+ ret |= val; -+ ar231x_write_reg(reg, ret); -+ -+ return ret; -+} -+ -+#endif ---- /dev/null -+++ b/arch/mips/ar231x/devices.h -@@ -0,0 +1,37 @@ -+#ifndef __AR231X_DEVICES_H -+#define __AR231X_DEVICES_H -+ -+enum { -+ /* handled by ar5312.c */ -+ DEV_TYPE_AR2312, -+ DEV_TYPE_AR2313, -+ DEV_TYPE_AR5312, -+ -+ /* handled by ar2315.c */ -+ DEV_TYPE_AR2315, -+ DEV_TYPE_AR2316, -+ DEV_TYPE_AR2317, -+ -+ DEV_TYPE_UNKNOWN -+}; -+ -+extern int ar231x_devtype; -+extern struct ar231x_board_config ar231x_board; -+extern asmlinkage void (*ar231x_irq_dispatch)(void); -+ -+extern int ar231x_find_config(u8 *flash_limit); -+extern void ar231x_serial_setup(u32 mapbase, unsigned int uartclk); -+extern int ar231x_add_wmac(int nr, u32 base, int irq); -+extern int ar231x_add_ethernet(int nr, u32 base, int irq, void *pdata); -+ -+static inline bool is_2315(void) -+{ -+ return (current_cpu_data.cputype == CPU_4KEC); -+} -+ -+static inline bool is_5312(void) -+{ -+ return !is_2315(); -+} -+ -+#endif ---- /dev/null -+++ b/arch/mips/ar231x/devices.c -@@ -0,0 +1,175 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "devices.h" -+#include "ar5312.h" -+#include "ar2315.h" -+ -+struct ar231x_board_config ar231x_board; -+int ar231x_devtype = DEV_TYPE_UNKNOWN; -+const struct ar231x_gpiodev *ar231x_gpiodev; -+EXPORT_SYMBOL(ar231x_gpiodev); -+ -+static struct resource ar231x_eth0_res[] = { -+ { -+ .name = "eth0_membase", -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .name = "eth0_irq", -+ .flags = IORESOURCE_IRQ, -+ } -+}; -+ -+static struct resource ar231x_eth1_res[] = { -+ { -+ .name = "eth1_membase", -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .name = "eth1_irq", -+ .flags = IORESOURCE_IRQ, -+ } -+}; -+ -+static struct platform_device ar231x_eth[] = { -+ { -+ .id = 0, -+ .name = "ar231x-eth", -+ .resource = ar231x_eth0_res, -+ .num_resources = ARRAY_SIZE(ar231x_eth0_res) -+ }, -+ { -+ .id = 1, -+ .name = "ar231x-eth", -+ .resource = ar231x_eth1_res, -+ .num_resources = ARRAY_SIZE(ar231x_eth1_res) -+ } -+}; -+ -+static struct resource ar231x_wmac0_res[] = { -+ { -+ .name = "wmac0_membase", -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .name = "wmac0_irq", -+ .flags = IORESOURCE_IRQ, -+ } -+}; -+ -+static struct resource ar231x_wmac1_res[] = { -+ { -+ .name = "wmac1_membase", -+ .flags = IORESOURCE_MEM, -+ }, -+ { -+ .name = "wmac1_irq", -+ .flags = IORESOURCE_IRQ, -+ } -+}; -+ -+ -+static struct platform_device ar231x_wmac[] = { -+ { -+ .id = 0, -+ .name = "ar231x-wmac", -+ .resource = ar231x_wmac0_res, -+ .num_resources = ARRAY_SIZE(ar231x_wmac0_res), -+ .dev.platform_data = &ar231x_board, -+ }, -+ { -+ .id = 1, -+ .name = "ar231x-wmac", -+ .resource = ar231x_wmac1_res, -+ .num_resources = ARRAY_SIZE(ar231x_wmac1_res), -+ .dev.platform_data = &ar231x_board, -+ }, -+}; -+ -+static const char *devtype_strings[] = { -+ [DEV_TYPE_AR5312] = "Atheros AR5312", -+ [DEV_TYPE_AR2312] = "Atheros AR2312", -+ [DEV_TYPE_AR2313] = "Atheros AR2313", -+ [DEV_TYPE_AR2315] = "Atheros AR2315", -+ [DEV_TYPE_AR2316] = "Atheros AR2316", -+ [DEV_TYPE_AR2317] = "Atheros AR2317", -+ [DEV_TYPE_UNKNOWN] = "Atheros (unknown)", -+}; -+ -+const char *get_system_type(void) -+{ -+ if ((ar231x_devtype >= ARRAY_SIZE(devtype_strings)) || -+ !devtype_strings[ar231x_devtype]) -+ return devtype_strings[DEV_TYPE_UNKNOWN]; -+ return devtype_strings[ar231x_devtype]; -+} -+ -+ -+int __init -+ar231x_add_ethernet(int nr, u32 base, int irq, void *pdata) -+{ -+ struct resource *res; -+ -+ ar231x_eth[nr].dev.platform_data = pdata; -+ res = &ar231x_eth[nr].resource[0]; -+ res->start = base; -+ res->end = base + 0x2000 - 1; -+ res++; -+ res->start = irq; -+ res->end = irq; -+ return platform_device_register(&ar231x_eth[nr]); -+} -+ -+void __init -+ar231x_serial_setup(u32 mapbase, unsigned int uartclk) -+{ -+ struct uart_port s; -+ -+ memset(&s, 0, sizeof(s)); -+ -+ s.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST; -+ s.iotype = UPIO_MEM; -+ s.irq = AR531X_MISC_IRQ_UART0; -+ s.regshift = 2; -+ s.mapbase = mapbase; -+ s.uartclk = uartclk; -+ s.membase = (void __iomem *)s.mapbase; -+ -+ early_serial_setup(&s); -+} -+ -+int __init -+ar231x_add_wmac(int nr, u32 base, int irq) -+{ -+ struct resource *res; -+ -+ ar231x_wmac[nr].dev.platform_data = &ar231x_board; -+ res = &ar231x_wmac[nr].resource[0]; -+ res->start = base; -+ res->end = base + 0x10000 - 1; -+ res++; -+ res->start = irq; -+ res->end = irq; -+ return platform_device_register(&ar231x_wmac[nr]); -+} -+ -+static int __init ar231x_register_devices(void) -+{ -+ static struct resource res = { -+ .start = 0xFFFFFFFF, -+ }; -+ -+ platform_device_register_simple("GPIODEV", 0, &res, 1); -+ ar5312_init_devices(); -+ ar2315_init_devices(); -+ -+ return 0; -+} -+ -+device_initcall(ar231x_register_devices); diff --git a/target/linux/atheros/patches-2.6.31/101-early-printk-support.patch b/target/linux/atheros/patches-2.6.31/101-early-printk-support.patch deleted file mode 100644 index 3536ca801..000000000 --- a/target/linux/atheros/patches-2.6.31/101-early-printk-support.patch +++ /dev/null @@ -1,68 +0,0 @@ ---- /dev/null -+++ b/arch/mips/ar231x/early_printk.c -@@ -0,0 +1,44 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2010 Gabor Juhos -+ */ -+ -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include "devices.h" -+ -+static inline void prom_uart_wr(void __iomem *base, unsigned reg, -+ unsigned char ch) -+{ -+ __raw_writeb(ch, base + 4 * reg); -+} -+ -+static inline unsigned char prom_uart_rr(void __iomem *base, unsigned reg) -+{ -+ return __raw_readb(base + 4 * reg); -+} -+ -+void prom_putchar(unsigned char ch) -+{ -+ static void __iomem *base; -+ -+ if (unlikely(base == NULL)) { -+ if (is_2315()) -+ base = (void __iomem *)(KSEG1ADDR(AR2315_UART0)); -+ else -+ base = (void __iomem *)(KSEG1ADDR(AR531X_UART0)); -+ } -+ -+ while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0); -+ prom_uart_wr(base, UART_TX, ch); -+ while ((prom_uart_rr(base, UART_LSR) & UART_LSR_THRE) == 0); -+} -+ ---- a/arch/mips/ar231x/Makefile -+++ b/arch/mips/ar231x/Makefile -@@ -9,5 +9,8 @@ - # - - obj-y += board.o prom.o devices.o -+ -+obj-$(CONFIG_EARLY_PRINTK) += early_printk.o -+ - obj-$(CONFIG_ATHEROS_AR5312) += ar5312.o - obj-$(CONFIG_ATHEROS_AR2315) += ar2315.o ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -90,6 +90,7 @@ config ATHEROS_AR231X - select SYS_SUPPORTS_BIG_ENDIAN - select SYS_SUPPORTS_32BIT_KERNEL - select GENERIC_GPIO -+ select SYS_HAS_EARLY_PRINTK - help - Support for AR231x and AR531x based boards - diff --git a/target/linux/atheros/patches-2.6.31/105-ar2315_pci.patch b/target/linux/atheros/patches-2.6.31/105-ar2315_pci.patch deleted file mode 100644 index 3f5e6b452..000000000 --- a/target/linux/atheros/patches-2.6.31/105-ar2315_pci.patch +++ /dev/null @@ -1,297 +0,0 @@ ---- a/arch/mips/ar231x/Makefile -+++ b/arch/mips/ar231x/Makefile -@@ -14,3 +14,4 @@ obj-$(CONFIG_EARLY_PRINTK) += early_prin - - obj-$(CONFIG_ATHEROS_AR5312) += ar5312.o - obj-$(CONFIG_ATHEROS_AR2315) += ar2315.o -+obj-$(CONFIG_ATHEROS_AR2315_PCI) += pci.o ---- /dev/null -+++ b/arch/mips/ar231x/pci.c -@@ -0,0 +1,230 @@ -+/* -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version 2 -+ * of the License, or (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "devices.h" -+ -+#define AR531X_MEM_BASE 0x80800000UL -+#define AR531X_MEM_SIZE 0x00ffffffUL -+#define AR531X_IO_SIZE 0x00007fffUL -+ -+static unsigned long configspace; -+ -+static int config_access(int devfn, int where, int size, u32 *ptr, bool write) -+{ -+ unsigned long flags; -+ int func = PCI_FUNC(devfn); -+ int dev = PCI_SLOT(devfn); -+ u32 value = 0; -+ int err = 0; -+ u32 addr; -+ -+ if (((dev != 0) && (dev != 3)) || (func > 2)) -+ return PCIBIOS_DEVICE_NOT_FOUND; -+ -+ /* Select Configuration access */ -+ local_irq_save(flags); -+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, 0, AR2315_PCIMISC_CFG_SEL); -+ mb(); -+ -+ addr = (u32) configspace + (1 << (13 + dev)) + (func << 8) + where; -+ if (size == 1) -+ addr ^= 0x3; -+ else if (size == 2) -+ addr ^= 0x2; -+ -+ if (write) { -+ value = *ptr; -+ if (size == 1) -+ err = put_dbe(value, (u8 *) addr); -+ else if (size == 2) -+ err = put_dbe(value, (u16 *) addr); -+ else if (size == 4) -+ err = put_dbe(value, (u32 *) addr); -+ } else { -+ if (size == 1) -+ err = get_dbe(value, (u8 *) addr); -+ else if (size == 2) -+ err = get_dbe(value, (u16 *) addr); -+ else if (size == 4) -+ err = get_dbe(value, (u32 *) addr); -+ if (err) -+ *ptr = 0xffffffff; -+ else -+ *ptr = value; -+ } -+ -+ /* Select Memory access */ -+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_CFG_SEL, 0); -+ local_irq_restore(flags); -+ -+ return (err ? PCIBIOS_DEVICE_NOT_FOUND : PCIBIOS_SUCCESSFUL); -+} -+ -+static int ar231x_pci_read(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 * value) -+{ -+ return config_access(devfn, where, size, value, 0); -+} -+ -+static int ar231x_pci_write(struct pci_bus *bus, unsigned int devfn, int where, int size, u32 value) -+{ -+ return config_access(devfn, where, size, &value, 1); -+} -+ -+struct pci_ops ar231x_pci_ops = { -+ .read = ar231x_pci_read, -+ .write = ar231x_pci_write, -+}; -+ -+static struct resource ar231x_mem_resource = { -+ .name = "AR531x PCI MEM", -+ .start = AR531X_MEM_BASE, -+ .end = AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE - 1 + 0x4000000, -+ .flags = IORESOURCE_MEM, -+}; -+ -+static struct resource ar231x_io_resource = { -+ .name = "AR531x PCI I/O", -+ .start = AR531X_MEM_BASE + AR531X_MEM_SIZE - AR531X_IO_SIZE, -+ .end = AR531X_MEM_BASE + AR531X_MEM_SIZE - 1, -+ .flags = IORESOURCE_IO, -+}; -+ -+struct pci_controller ar231x_pci_controller = { -+ .pci_ops = &ar231x_pci_ops, -+ .mem_resource = &ar231x_mem_resource, -+ .io_resource = &ar231x_io_resource, -+ .mem_offset = 0x00000000UL, -+ .io_offset = 0x00000000UL, -+}; -+ -+int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -+{ -+ return AR2315_IRQ_LCBUS_PCI; -+} -+ -+int pcibios_plat_dev_init(struct pci_dev *dev) -+{ -+ pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 5); -+ pci_write_config_word(dev, 0x40, 0); -+ -+ /* Clear any pending Abort or external Interrupts -+ * and enable interrupt processing */ -+ ar231x_mask_reg(AR2315_PCI_INTEN_REG, AR2315_PCI_INT_ENABLE, 0); -+ ar231x_write_reg(AR2315_PCI_INT_STATUS, (AR2315_PCI_ABORT_INT | AR2315_PCI_EXT_INT)); -+ ar231x_write_reg(AR2315_PCI_INT_MASK, (AR2315_PCI_ABORT_INT | AR2315_PCI_EXT_INT)); -+ ar231x_mask_reg(AR2315_PCI_INTEN_REG, 0, AR2315_PCI_INT_ENABLE); -+ -+ return 0; -+} -+ -+static void -+ar2315_pci_fixup(struct pci_dev *dev) -+{ -+ unsigned int devfn = dev->devfn; -+ -+ if (dev->bus->number != 0) -+ return; -+ -+ /* Only fix up the PCI host settings */ -+ if ((PCI_SLOT(devfn) != 3) || (PCI_FUNC(devfn) != 0)) -+ return; -+ -+ /* Fix up MBARs */ -+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, HOST_PCI_MBAR0); -+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_1, HOST_PCI_MBAR1); -+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_2, HOST_PCI_MBAR2); -+ pci_write_config_dword(dev, PCI_COMMAND, -+ PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER | PCI_COMMAND_SPECIAL | -+ PCI_COMMAND_INVALIDATE | PCI_COMMAND_PARITY | PCI_COMMAND_SERR | -+ PCI_COMMAND_FAST_BACK); -+} -+DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, ar2315_pci_fixup); -+ -+static int __init -+ar2315_pci_init(void) -+{ -+ u32 reg; -+ -+ if (ar231x_devtype != DEV_TYPE_AR2315) -+ return -ENODEV; -+ -+ configspace = (unsigned long) ioremap_nocache(0x80000000, 1*1024*1024); /* Remap PCI config space */ -+ ar231x_pci_controller.io_map_base = -+ (unsigned long) ioremap_nocache(AR531X_MEM_BASE + AR531X_MEM_SIZE, AR531X_IO_SIZE); -+ set_io_port_base(ar231x_pci_controller.io_map_base); /* PCI I/O space */ -+ -+ reg = ar231x_mask_reg(AR2315_RESET, 0, AR2315_RESET_PCIDMA); -+ msleep(10); -+ -+ reg &= ~AR2315_RESET_PCIDMA; -+ ar231x_write_reg(AR2315_RESET, reg); -+ msleep(10); -+ -+ ar231x_mask_reg(AR2315_ENDIAN_CTL, 0, -+ AR2315_CONFIG_PCIAHB | AR2315_CONFIG_PCIAHB_BRIDGE); -+ -+ ar231x_write_reg(AR2315_PCICLK, AR2315_PCICLK_PLLC_CLKM | -+ (AR2315_PCICLK_IN_FREQ_DIV_6 << AR2315_PCICLK_DIV_S)); -+ ar231x_mask_reg(AR2315_AHB_ARB_CTL, 0, AR2315_ARB_PCI); -+ ar231x_mask_reg(AR2315_IF_CTL, AR2315_IF_PCI_CLK_MASK | AR2315_IF_MASK, -+ AR2315_IF_PCI | AR2315_IF_PCI_HOST | AR2315_IF_PCI_INTR | -+ (AR2315_IF_PCI_CLK_OUTPUT_CLK << AR2315_IF_PCI_CLK_SHIFT)); -+ -+ /* Reset the PCI bus by setting bits 5-4 in PCI_MCFG */ -+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_RST_MODE, -+ AR2315_PCIRST_LOW); -+ msleep(100); -+ -+ /* Bring the PCI out of reset */ -+ ar231x_mask_reg(AR2315_PCI_MISC_CONFIG, AR2315_PCIMISC_RST_MODE, -+ AR2315_PCIRST_HIGH | AR2315_PCICACHE_DIS | 0x8); -+ -+ ar231x_write_reg(AR2315_PCI_UNCACHE_CFG, -+ 0x1E | /* 1GB uncached */ -+ (1 << 5) | /* Enable uncached */ -+ (0x2 << 30) /* Base: 0x80000000 */ -+ ); -+ ar231x_read_reg(AR2315_PCI_UNCACHE_CFG); -+ -+ msleep(500); -+ -+ /* dirty hack - anyone with a datasheet that knows the memory map ? */ -+ ioport_resource.start = 0x10000000; -+ ioport_resource.end = 0xffffffff; -+ iomem_resource.start = 0x10000000; -+ iomem_resource.end = 0xffffffff; -+ -+ register_pci_controller(&ar231x_pci_controller); -+ -+ return 0; -+} -+ -+arch_initcall(ar2315_pci_init); ---- a/arch/mips/ar231x/Kconfig -+++ b/arch/mips/ar231x/Kconfig -@@ -15,3 +15,13 @@ config ATHEROS_AR2315 - select SYS_SUPPORTS_BIG_ENDIAN - select GENERIC_GPIO - default y -+ -+config ATHEROS_AR2315_PCI -+ bool "PCI support" -+ depends on ATHEROS_AR2315 -+ select HW_HAS_PCI -+ select PCI -+ select USB_ARCH_HAS_HCD -+ select USB_ARCH_HAS_OHCI -+ select USB_ARCH_HAS_EHCI -+ default y ---- a/arch/mips/ar231x/ar2315.c -+++ b/arch/mips/ar231x/ar2315.c -@@ -63,6 +63,27 @@ static inline void ar2315_gpio_irq(void) - do_IRQ(AR531X_GPIO_IRQ_BASE + bit); - } - -+#ifdef CONFIG_ATHEROS_AR2315_PCI -+static inline void pci_abort_irq(void) -+{ -+ ar231x_write_reg(AR2315_PCI_INT_STATUS, AR2315_PCI_ABORT_INT); -+} -+ -+static inline void pci_ack_irq(void) -+{ -+ ar231x_write_reg(AR2315_PCI_INT_STATUS, AR2315_PCI_EXT_INT); -+} -+ -+void ar2315_pci_irq(int irq) -+{ -+ if (ar231x_read_reg(AR2315_PCI_INT_STATUS) == AR2315_PCI_ABORT_INT) -+ pci_abort_irq(); -+ else { -+ do_IRQ(irq); -+ pci_ack_irq(); -+ } -+} -+#endif /* CONFIG_ATHEROS_AR2315_PCI */ - - /* - * Called when an interrupt is received, this function -@@ -81,6 +102,10 @@ ar2315_irq_dispatch(void) - do_IRQ(AR2315_IRQ_WLAN0_INTRS); - else if (pending & CAUSEF_IP4) - do_IRQ(AR2315_IRQ_ENET0_INTRS); -+#ifdef CONFIG_ATHEROS_AR2315_PCI -+ else if (pending & CAUSEF_IP5) -+ ar2315_pci_irq(AR2315_IRQ_LCBUS_PCI); -+#endif - else if (pending & CAUSEF_IP2) { - unsigned int misc_intr = ar231x_read_reg(AR2315_ISR) & ar231x_read_reg(AR2315_IMR); - diff --git a/target/linux/atheros/patches-2.6.31/110-ar2313_ethernet.patch b/target/linux/atheros/patches-2.6.31/110-ar2313_ethernet.patch deleted file mode 100644 index b47ccc4ba..000000000 --- a/target/linux/atheros/patches-2.6.31/110-ar2313_ethernet.patch +++ /dev/null @@ -1,1596 +0,0 @@ ---- a/drivers/net/Kconfig -+++ b/drivers/net/Kconfig -@@ -359,6 +359,12 @@ config AX88796_93CX6 - help - Select this if your platform comes with an external 93CX6 eeprom. - -+config AR231X_ETHERNET -+ tristate "AR231x Ethernet support" -+ depends on ATHEROS_AR231X -+ help -+ Support for the AR231x/531x ethernet controller -+ - config MACE - tristate "MACE (Power Mac ethernet) support" - depends on PPC_PMAC && PPC32 ---- a/drivers/net/Makefile -+++ b/drivers/net/Makefile -@@ -211,6 +211,7 @@ obj-$(CONFIG_EQUALIZER) += eql.o - obj-$(CONFIG_KORINA) += korina.o - obj-$(CONFIG_MIPS_JAZZ_SONIC) += jazzsonic.o - obj-$(CONFIG_MIPS_AU1X00_ENET) += au1000_eth.o -+obj-$(CONFIG_AR231X_ETHERNET) += ar231x.o - obj-$(CONFIG_MIPS_SIM_NET) += mipsnet.o - obj-$(CONFIG_SGI_IOC3_ETH) += ioc3-eth.o - obj-$(CONFIG_DECLANCE) += declance.o ---- /dev/null -+++ b/drivers/net/ar231x.c -@@ -0,0 +1,1263 @@ -+/* -+ * ar231x.c: Linux driver for the Atheros AR231x Ethernet device. -+ * -+ * Copyright (C) 2004 by Sameer Dekate -+ * Copyright (C) 2006 Imre Kaloz -+ * Copyright (C) 2006-2009 Felix Fietkau -+ * -+ * Thanks to Atheros for providing hardware and documentation -+ * enabling me to write this driver. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * Additional credits: -+ * This code is taken from John Taylor's Sibyte driver and then -+ * modified for the AR2313. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define AR2313_MTU 1692 -+#define AR2313_PRIOS 1 -+#define AR2313_QUEUES (2*AR2313_PRIOS) -+#define AR2313_DESCR_ENTRIES 64 -+ -+ -+#ifndef min -+#define min(a,b) (((a)<(b))?(a):(b)) -+#endif -+ -+#ifndef SMP_CACHE_BYTES -+#define SMP_CACHE_BYTES L1_CACHE_BYTES -+#endif -+ -+#define AR2313_MBOX_SET_BIT 0x8 -+ -+#include "ar231x.h" -+ -+/* -+ * New interrupt handler strategy: -+ * -+ * An old interrupt handler worked using the traditional method of -+ * replacing an skbuff with a new one when a packet arrives. However -+ * the rx rings do not need to contain a static number of buffer -+ * descriptors, thus it makes sense to move the memory allocation out -+ * of the main interrupt handler and do it in a bottom half handler -+ * and only allocate new buffers when the number of buffers in the -+ * ring is below a certain threshold. In order to avoid starving the -+ * NIC under heavy load it is however necessary to force allocation -+ * when hitting a minimum threshold. The strategy for alloction is as -+ * follows: -+ * -+ * RX_LOW_BUF_THRES - allocate buffers in the bottom half -+ * RX_PANIC_LOW_THRES - we are very low on buffers, allocate -+ * the buffers in the interrupt handler -+ * RX_RING_THRES - maximum number of buffers in the rx ring -+ * -+ * One advantagous side effect of this allocation approach is that the -+ * entire rx processing can be done without holding any spin lock -+ * since the rx rings and registers are totally independent of the tx -+ * ring and its registers. This of course includes the kmalloc's of -+ * new skb's. Thus start_xmit can run in parallel with rx processing -+ * and the memory allocation on SMP systems. -+ * -+ * Note that running the skb reallocation in a bottom half opens up -+ * another can of races which needs to be handled properly. In -+ * particular it can happen that the interrupt handler tries to run -+ * the reallocation while the bottom half is either running on another -+ * CPU or was interrupted on the same CPU. To get around this the -+ * driver uses bitops to prevent the reallocation routines from being -+ * reentered. -+ * -+ * TX handling can also be done without holding any spin lock, wheee -+ * this is fun! since tx_csm is only written to by the interrupt -+ * handler. -+ */ -+ -+/* -+ * Threshold values for RX buffer allocation - the low water marks for -+ * when to start refilling the rings are set to 75% of the ring -+ * sizes. It seems to make sense to refill the rings entirely from the -+ * intrrupt handler once it gets below the panic threshold, that way -+ * we don't risk that the refilling is moved to another CPU when the -+ * one running the interrupt handler just got the slab code hot in its -+ * cache. -+ */ -+#define RX_RING_SIZE AR2313_DESCR_ENTRIES -+#define RX_PANIC_THRES (RX_RING_SIZE/4) -+#define RX_LOW_THRES ((3*RX_RING_SIZE)/4) -+#define CRC_LEN 4 -+#define RX_OFFSET 2 -+ -+#if defined(CONFIG_VLAN_8021Q) || defined(CONFIG_VLAN_8021Q_MODULE) -+#define VLAN_HDR 4 -+#else -+#define VLAN_HDR 0 -+#endif -+ -+#define AR2313_BUFSIZE (AR2313_MTU + VLAN_HDR + ETH_HLEN + CRC_LEN + RX_OFFSET) -+ -+#ifdef MODULE -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("Sameer Dekate , Imre Kaloz , Felix Fietkau "); -+MODULE_DESCRIPTION("AR231x Ethernet driver"); -+#endif -+ -+#define virt_to_phys(x) ((u32)(x) & 0x1fffffff) -+ -+// prototypes -+static void ar231x_halt(struct net_device *dev); -+static void rx_tasklet_func(unsigned long data); -+static void rx_tasklet_cleanup(struct net_device *dev); -+static void ar231x_multicast_list(struct net_device *dev); -+ -+static int ar231x_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum); -+static int ar231x_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum, u16 value); -+static int ar231x_mdiobus_reset(struct mii_bus *bus); -+static int ar231x_mdiobus_probe (struct net_device *dev); -+static void ar231x_adjust_link(struct net_device *dev); -+ -+#ifndef ERR -+#define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args) -+#endif -+ -+static const struct net_device_ops ar231x_ops = { -+ .ndo_open = ar231x_open, -+ .ndo_stop = ar231x_close, -+ .ndo_start_xmit = ar231x_start_xmit, -+ .ndo_set_multicast_list = ar231x_multicast_list, -+ .ndo_do_ioctl = ar231x_ioctl, -+}; -+ -+int __init ar231x_probe(struct platform_device *pdev) -+{ -+ struct net_device *dev; -+ struct ar231x_private *sp; -+ struct resource *res; -+ unsigned long ar_eth_base; -+ char buf[64]; -+ -+ dev = alloc_etherdev(sizeof(struct ar231x_private)); -+ -+ if (dev == NULL) { -+ printk(KERN_ERR -+ "ar231x: Unable to allocate net_device structure!\n"); -+ return -ENOMEM; -+ } -+ -+ platform_set_drvdata(pdev, dev); -+ -+ sp = netdev_priv(dev); -+ sp->dev = dev; -+ sp->cfg = pdev->dev.platform_data; -+ -+ sprintf(buf, "eth%d_membase", pdev->id); -+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, buf); -+ if (!res) -+ return -ENODEV; -+ -+ sp->link = 0; -+ ar_eth_base = res->start; -+ -+ sprintf(buf, "eth%d_irq", pdev->id); -+ dev->irq = platform_get_irq_byname(pdev, buf); -+ -+ spin_lock_init(&sp->lock); -+ -+ dev->features |= NETIF_F_HIGHDMA; -+ dev->netdev_ops = &ar231x_ops; -+ -+ tasklet_init(&sp->rx_tasklet, rx_tasklet_func, (unsigned long) dev); -+ tasklet_disable(&sp->rx_tasklet); -+ -+ sp->eth_regs = -+ ioremap_nocache(virt_to_phys(ar_eth_base), sizeof(*sp->eth_regs)); -+ if (!sp->eth_regs) { -+ printk("Can't remap eth registers\n"); -+ return (-ENXIO); -+ } -+ -+ /* -+ * When there's only one MAC, PHY regs are typically on ENET0, -+ * even though the MAC might be on ENET1. -+ * Needto remap PHY regs separately in this case -+ */ -+ if (virt_to_phys(ar_eth_base) == virt_to_phys(sp->phy_regs)) -+ sp->phy_regs = sp->eth_regs; -+ else { -+ sp->phy_regs = -+ ioremap_nocache(virt_to_phys(sp->cfg->phy_base), -+ sizeof(*sp->phy_regs)); -+ if (!sp->phy_regs) { -+ printk("Can't remap phy registers\n"); -+ return (-ENXIO); -+ } -+ } -+ -+ sp->dma_regs = -+ ioremap_nocache(virt_to_phys(ar_eth_base + 0x1000), -+ sizeof(*sp->dma_regs)); -+ dev->base_addr = (unsigned int) sp->dma_regs; -+ if (!sp->dma_regs) { -+ printk("Can't remap DMA registers\n"); -+ return (-ENXIO); -+ } -+ -+ sp->int_regs = ioremap_nocache(virt_to_phys(sp->cfg->reset_base), 4); -+ if (!sp->int_regs) { -+ printk("Can't remap INTERRUPT registers\n"); -+ return (-ENXIO); -+ } -+ -+ strncpy(sp->name, "Atheros AR231x", sizeof(sp->name) - 1); -+ sp->name[sizeof(sp->name) - 1] = '\0'; -+ memcpy(dev->dev_addr, sp->cfg->macaddr, 6); -+ -+ if (ar231x_init(dev)) { -+ /* -+ * ar231x_init() calls ar231x_init_cleanup() on error. -+ */ -+ kfree(dev); -+ return -ENODEV; -+ } -+ -+ if (register_netdev(dev)) { -+ printk("%s: register_netdev failed\n", __func__); -+ return -1; -+ } -+ -+ printk("%s: %s: %02x:%02x:%02x:%02x:%02x:%02x, irq %d\n", -+ dev->name, sp->name, -+ dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], -+ dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5], dev->irq); -+ -+ sp->mii_bus = mdiobus_alloc(); -+ if (sp->mii_bus == NULL) -+ return -1; -+ -+ sp->mii_bus->priv = dev; -+ sp->mii_bus->read = ar231x_mdiobus_read; -+ sp->mii_bus->write = ar231x_mdiobus_write; -+ sp->mii_bus->reset = ar231x_mdiobus_reset; -+ sp->mii_bus->name = "ar231x_eth_mii"; -+ snprintf(sp->mii_bus->id, MII_BUS_ID_SIZE, "%d", pdev->id); -+ sp->mii_bus->irq = kmalloc(sizeof(int), GFP_KERNEL); -+ *sp->mii_bus->irq = PHY_POLL; -+ -+ mdiobus_register(sp->mii_bus); -+ -+ if (ar231x_mdiobus_probe(dev) != 0) { -+ printk(KERN_ERR "%s: mdiobus_probe failed\n", dev->name); -+ rx_tasklet_cleanup(dev); -+ ar231x_init_cleanup(dev); -+ unregister_netdev(dev); -+ kfree(dev); -+ return -ENODEV; -+ } -+ -+ /* start link poll timer */ -+ ar231x_setup_timer(dev); -+ -+ return 0; -+} -+ -+ -+static void ar231x_multicast_list(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ unsigned int filter; -+ -+ filter = sp->eth_regs->mac_control; -+ -+ if (dev->flags & IFF_PROMISC) -+ filter |= MAC_CONTROL_PR; -+ else -+ filter &= ~MAC_CONTROL_PR; -+ if ((dev->flags & IFF_ALLMULTI) || (dev->mc_count > 0)) -+ filter |= MAC_CONTROL_PM; -+ else -+ filter &= ~MAC_CONTROL_PM; -+ -+ sp->eth_regs->mac_control = filter; -+} -+ -+static void rx_tasklet_cleanup(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ -+ /* -+ * Tasklet may be scheduled. Need to get it removed from the list -+ * since we're about to free the struct. -+ */ -+ -+ sp->unloading = 1; -+ tasklet_enable(&sp->rx_tasklet); -+ tasklet_kill(&sp->rx_tasklet); -+} -+ -+static int __devexit ar231x_remove(struct platform_device *pdev) -+{ -+ struct net_device *dev = platform_get_drvdata(pdev); -+ struct ar231x_private *sp = netdev_priv(dev); -+ rx_tasklet_cleanup(dev); -+ ar231x_init_cleanup(dev); -+ unregister_netdev(dev); -+ mdiobus_unregister(sp->mii_bus); -+ mdiobus_free(sp->mii_bus); -+ kfree(dev); -+ return 0; -+} -+ -+ -+/* -+ * Restart the AR2313 ethernet controller. -+ */ -+static int ar231x_restart(struct net_device *dev) -+{ -+ /* disable interrupts */ -+ disable_irq(dev->irq); -+ -+ /* stop mac */ -+ ar231x_halt(dev); -+ -+ /* initialize */ -+ ar231x_init(dev); -+ -+ /* enable interrupts */ -+ enable_irq(dev->irq); -+ -+ return 0; -+} -+ -+static struct platform_driver ar231x_driver = { -+ .driver.name = "ar231x-eth", -+ .probe = ar231x_probe, -+ .remove = __devexit_p(ar231x_remove), -+}; -+ -+int __init ar231x_module_init(void) -+{ -+ return platform_driver_register(&ar231x_driver); -+} -+ -+void __exit ar231x_module_cleanup(void) -+{ -+ platform_driver_unregister(&ar231x_driver); -+} -+ -+module_init(ar231x_module_init); -+module_exit(ar231x_module_cleanup); -+ -+ -+static void ar231x_free_descriptors(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ if (sp->rx_ring != NULL) { -+ kfree((void *) KSEG0ADDR(sp->rx_ring)); -+ sp->rx_ring = NULL; -+ sp->tx_ring = NULL; -+ } -+} -+ -+ -+static int ar231x_allocate_descriptors(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ int size; -+ int j; -+ ar231x_descr_t *space; -+ -+ if (sp->rx_ring != NULL) { -+ printk("%s: already done.\n", __FUNCTION__); -+ return 0; -+ } -+ -+ size = -+ (sizeof(ar231x_descr_t) * (AR2313_DESCR_ENTRIES * AR2313_QUEUES)); -+ space = kmalloc(size, GFP_KERNEL); -+ if (space == NULL) -+ return 1; -+ -+ /* invalidate caches */ -+ dma_cache_inv((unsigned int) space, size); -+ -+ /* now convert pointer to KSEG1 */ -+ space = (ar231x_descr_t *) KSEG1ADDR(space); -+ -+ memset((void *) space, 0, size); -+ -+ sp->rx_ring = space; -+ space += AR2313_DESCR_ENTRIES; -+ -+ sp->tx_ring = space; -+ space += AR2313_DESCR_ENTRIES; -+ -+ /* Initialize the transmit Descriptors */ -+ for (j = 0; j < AR2313_DESCR_ENTRIES; j++) { -+ ar231x_descr_t *td = &sp->tx_ring[j]; -+ td->status = 0; -+ td->devcs = DMA_TX1_CHAINED; -+ td->addr = 0; -+ td->descr = -+ virt_to_phys(&sp-> -+ tx_ring[(j + 1) & (AR2313_DESCR_ENTRIES - 1)]); -+ } -+ -+ return 0; -+} -+ -+ -+/* -+ * Generic cleanup handling data allocated during init. Used when the -+ * module is unloaded or if an error occurs during initialization -+ */ -+static void ar231x_init_cleanup(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ struct sk_buff *skb; -+ int j; -+ -+ ar231x_free_descriptors(dev); -+ -+ if (sp->eth_regs) -+ iounmap((void *) sp->eth_regs); -+ if (sp->dma_regs) -+ iounmap((void *) sp->dma_regs); -+ -+ if (sp->rx_skb) { -+ for (j = 0; j < AR2313_DESCR_ENTRIES; j++) { -+ skb = sp->rx_skb[j]; -+ if (skb) { -+ sp->rx_skb[j] = NULL; -+ dev_kfree_skb(skb); -+ } -+ } -+ kfree(sp->rx_skb); -+ sp->rx_skb = NULL; -+ } -+ -+ if (sp->tx_skb) { -+ for (j = 0; j < AR2313_DESCR_ENTRIES; j++) { -+ skb = sp->tx_skb[j]; -+ if (skb) { -+ sp->tx_skb[j] = NULL; -+ dev_kfree_skb(skb); -+ } -+ } -+ kfree(sp->tx_skb); -+ sp->tx_skb = NULL; -+ } -+} -+ -+static int ar231x_setup_timer(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ -+ init_timer(&sp->link_timer); -+ -+ sp->link_timer.function = ar231x_link_timer_fn; -+ sp->link_timer.data = (int) dev; -+ sp->link_timer.expires = jiffies + HZ; -+ -+ add_timer(&sp->link_timer); -+ return 0; -+ -+} -+ -+static void ar231x_link_timer_fn(unsigned long data) -+{ -+ struct net_device *dev = (struct net_device *) data; -+ struct ar231x_private *sp = netdev_priv(dev); -+ -+ // see if the link status changed -+ // This was needed to make sure we set the PHY to the -+ // autonegotiated value of half or full duplex. -+ ar231x_check_link(dev); -+ -+ // Loop faster when we don't have link. -+ // This was needed to speed up the AP bootstrap time. -+ if (sp->link == 0) { -+ mod_timer(&sp->link_timer, jiffies + HZ / 2); -+ } else { -+ mod_timer(&sp->link_timer, jiffies + LINK_TIMER); -+ } -+} -+ -+static void ar231x_check_link(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ u16 phyData; -+ -+ phyData = ar231x_mdiobus_read(sp->mii_bus, sp->phy, MII_BMSR); -+ if (sp->phyData != phyData) { -+ if (phyData & BMSR_LSTATUS) { -+ /* link is present, ready link partner ability to deterine -+ duplexity */ -+ int duplex = 0; -+ u16 reg; -+ -+ sp->link = 1; -+ reg = ar231x_mdiobus_read(sp->mii_bus, sp->phy, MII_BMCR); -+ if (reg & BMCR_ANENABLE) { -+ /* auto neg enabled */ -+ reg = ar231x_mdiobus_read(sp->mii_bus, sp->phy, MII_LPA); -+ duplex = (reg & (LPA_100FULL | LPA_10FULL)) ? 1 : 0; -+ } else { -+ /* no auto neg, just read duplex config */ -+ duplex = (reg & BMCR_FULLDPLX) ? 1 : 0; -+ } -+ -+ printk(KERN_INFO "%s: Configuring MAC for %s duplex\n", -+ dev->name, (duplex) ? "full" : "half"); -+ -+ if (duplex) { -+ /* full duplex */ -+ sp->eth_regs->mac_control = -+ ((sp->eth_regs-> -+ mac_control | MAC_CONTROL_F) & ~MAC_CONTROL_DRO); -+ } else { -+ /* half duplex */ -+ sp->eth_regs->mac_control = -+ ((sp->eth_regs-> -+ mac_control | MAC_CONTROL_DRO) & ~MAC_CONTROL_F); -+ } -+ } else { -+ /* no link */ -+ sp->link = 0; -+ } -+ sp->phyData = phyData; -+ } -+} -+ -+static int ar231x_reset_reg(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ unsigned int ethsal, ethsah; -+ unsigned int flags; -+ -+ *sp->int_regs |= sp->cfg->reset_mac; -+ mdelay(10); -+ *sp->int_regs &= ~sp->cfg->reset_mac; -+ mdelay(10); -+ *sp->int_regs |= sp->cfg->reset_phy; -+ mdelay(10); -+ *sp->int_regs &= ~sp->cfg->reset_phy; -+ mdelay(10); -+ -+ sp->dma_regs->bus_mode = (DMA_BUS_MODE_SWR); -+ mdelay(10); -+ sp->dma_regs->bus_mode = -+ ((32 << DMA_BUS_MODE_PBL_SHIFT) | DMA_BUS_MODE_BLE); -+ -+ /* enable interrupts */ -+ sp->dma_regs->intr_ena = (DMA_STATUS_AIS | -+ DMA_STATUS_NIS | -+ DMA_STATUS_RI | -+ DMA_STATUS_TI | DMA_STATUS_FBE); -+ sp->dma_regs->xmt_base = virt_to_phys(sp->tx_ring); -+ sp->dma_regs->rcv_base = virt_to_phys(sp->rx_ring); -+ sp->dma_regs->control = -+ (DMA_CONTROL_SR | DMA_CONTROL_ST | DMA_CONTROL_SF); -+ -+ sp->eth_regs->flow_control = (FLOW_CONTROL_FCE); -+ sp->eth_regs->vlan_tag = (0x8100); -+ -+ /* Enable Ethernet Interface */ -+ flags = (MAC_CONTROL_TE | /* transmit enable */ -+ MAC_CONTROL_PM | /* pass mcast */ -+ MAC_CONTROL_F | /* full duplex */ -+ MAC_CONTROL_HBD); /* heart beat disabled */ -+ -+ if (dev->flags & IFF_PROMISC) { /* set promiscuous mode */ -+ flags |= MAC_CONTROL_PR; -+ } -+ sp->eth_regs->mac_control = flags; -+ -+ /* Set all Ethernet station address registers to their initial values */ -+ ethsah = ((((u_int) (dev->dev_addr[5]) << 8) & (u_int) 0x0000FF00) | -+ (((u_int) (dev->dev_addr[4]) << 0) & (u_int) 0x000000FF)); -+ -+ ethsal = ((((u_int) (dev->dev_addr[3]) << 24) & (u_int) 0xFF000000) | -+ (((u_int) (dev->dev_addr[2]) << 16) & (u_int) 0x00FF0000) | -+ (((u_int) (dev->dev_addr[1]) << 8) & (u_int) 0x0000FF00) | -+ (((u_int) (dev->dev_addr[0]) << 0) & (u_int) 0x000000FF)); -+ -+ sp->eth_regs->mac_addr[0] = ethsah; -+ sp->eth_regs->mac_addr[1] = ethsal; -+ -+ mdelay(10); -+ -+ return (0); -+} -+ -+ -+static int ar231x_init(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ int ecode = 0; -+ -+ /* -+ * Allocate descriptors -+ */ -+ if (ar231x_allocate_descriptors(dev)) { -+ printk("%s: %s: ar231x_allocate_descriptors failed\n", -+ dev->name, __FUNCTION__); -+ ecode = -EAGAIN; -+ goto init_error; -+ } -+ -+ /* -+ * Get the memory for the skb rings. -+ */ -+ if (sp->rx_skb == NULL) { -+ sp->rx_skb = -+ kmalloc(sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES, -+ GFP_KERNEL); -+ if (!(sp->rx_skb)) { -+ printk("%s: %s: rx_skb kmalloc failed\n", -+ dev->name, __FUNCTION__); -+ ecode = -EAGAIN; -+ goto init_error; -+ } -+ } -+ memset(sp->rx_skb, 0, sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES); -+ -+ if (sp->tx_skb == NULL) { -+ sp->tx_skb = -+ kmalloc(sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES, -+ GFP_KERNEL); -+ if (!(sp->tx_skb)) { -+ printk("%s: %s: tx_skb kmalloc failed\n", -+ dev->name, __FUNCTION__); -+ ecode = -EAGAIN; -+ goto init_error; -+ } -+ } -+ memset(sp->tx_skb, 0, sizeof(struct sk_buff *) * AR2313_DESCR_ENTRIES); -+ -+ /* -+ * Set tx_csm before we start receiving interrupts, otherwise -+ * the interrupt handler might think it is supposed to process -+ * tx ints before we are up and running, which may cause a null -+ * pointer access in the int handler. -+ */ -+ sp->rx_skbprd = 0; -+ sp->cur_rx = 0; -+ sp->tx_prd = 0; -+ sp->tx_csm = 0; -+ -+ /* -+ * Zero the stats before starting the interface -+ */ -+ memset(&dev->stats, 0, sizeof(dev->stats)); -+ -+ /* -+ * We load the ring here as there seem to be no way to tell the -+ * firmware to wipe the ring without re-initializing it. -+ */ -+ ar231x_load_rx_ring(dev, RX_RING_SIZE); -+ -+ /* -+ * Init hardware -+ */ -+ ar231x_reset_reg(dev); -+ -+ /* -+ * Get the IRQ -+ */ -+ ecode = -+ request_irq(dev->irq, &ar231x_interrupt, -+ IRQF_DISABLED | IRQF_SAMPLE_RANDOM, -+ dev->name, dev); -+ if (ecode) { -+ printk(KERN_WARNING "%s: %s: Requested IRQ %d is busy\n", -+ dev->name, __FUNCTION__, dev->irq); -+ goto init_error; -+ } -+ -+ -+ tasklet_enable(&sp->rx_tasklet); -+ -+ return 0; -+ -+ init_error: -+ ar231x_init_cleanup(dev); -+ return ecode; -+} -+ -+/* -+ * Load the rx ring. -+ * -+ * Loading rings is safe without holding the spin lock since this is -+ * done only before the device is enabled, thus no interrupts are -+ * generated and by the interrupt handler/tasklet handler. -+ */ -+static void ar231x_load_rx_ring(struct net_device *dev, int nr_bufs) -+{ -+ -+ struct ar231x_private *sp = netdev_priv(dev); -+ short i, idx; -+ -+ idx = sp->rx_skbprd; -+ -+ for (i = 0; i < nr_bufs; i++) { -+ struct sk_buff *skb; -+ ar231x_descr_t *rd; -+ -+ if (sp->rx_skb[idx]) -+ break; -+ -+ skb = netdev_alloc_skb(dev, AR2313_BUFSIZE); -+ if (!skb) { -+ printk("\n\n\n\n %s: No memory in system\n\n\n\n", -+ __FUNCTION__); -+ break; -+ } -+ -+ /* -+ * Make sure IP header starts on a fresh cache line. -+ */ -+ skb->dev = dev; -+ skb_reserve(skb, RX_OFFSET); -+ sp->rx_skb[idx] = skb; -+ -+ rd = (ar231x_descr_t *) & sp->rx_ring[idx]; -+ -+ /* initialize dma descriptor */ -+ rd->devcs = ((AR2313_BUFSIZE << DMA_RX1_BSIZE_SHIFT) | -+ DMA_RX1_CHAINED); -+ rd->addr = virt_to_phys(skb->data); -+ rd->descr = -+ virt_to_phys(&sp-> -+ rx_ring[(idx + 1) & (AR2313_DESCR_ENTRIES - 1)]); -+ rd->status = DMA_RX_OWN; -+ -+ idx = DSC_NEXT(idx); -+ } -+ -+ if (i) -+ sp->rx_skbprd = idx; -+ -+ return; -+} -+ -+#define AR2313_MAX_PKTS_PER_CALL 64 -+ -+static int ar231x_rx_int(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ struct sk_buff *skb, *skb_new; -+ ar231x_descr_t *rxdesc; -+ unsigned int status; -+ u32 idx; -+ int pkts = 0; -+ int rval; -+ -+ idx = sp->cur_rx; -+ -+ /* process at most the entire ring and then wait for another interrupt -+ */ -+ while (1) { -+ -+ rxdesc = &sp->rx_ring[idx]; -+ status = rxdesc->status; -+ if (status & DMA_RX_OWN) { -+ /* SiByte owns descriptor or descr not yet filled in */ -+ rval = 0; -+ break; -+ } -+ -+ if (++pkts > AR2313_MAX_PKTS_PER_CALL) { -+ rval = 1; -+ break; -+ } -+ -+ if ((status & DMA_RX_ERROR) && !(status & DMA_RX_LONG)) { -+ dev->stats.rx_errors++; -+ dev->stats.rx_dropped++; -+ -+ /* add statistics counters */ -+ if (status & DMA_RX_ERR_CRC) -+ dev->stats.rx_crc_errors++; -+ if (status & DMA_RX_ERR_COL) -+ dev->stats.rx_over_errors++; -+ if (status & DMA_RX_ERR_LENGTH) -+ dev->stats.rx_length_errors++; -+ if (status & DMA_RX_ERR_RUNT) -+ dev->stats.rx_over_errors++; -+ if (status & DMA_RX_ERR_DESC) -+ dev->stats.rx_over_errors++; -+ -+ } else { -+ /* alloc new buffer. */ -+ skb_new = netdev_alloc_skb(dev, AR2313_BUFSIZE + RX_OFFSET); -+ if (skb_new != NULL) { -+ -+ skb = sp->rx_skb[idx]; -+ /* set skb */ -+ skb_put(skb, -+ ((status >> DMA_RX_LEN_SHIFT) & 0x3fff) - CRC_LEN); -+ -+ dev->stats.rx_bytes += skb->len; -+ skb->protocol = eth_type_trans(skb, dev); -+ /* pass the packet to upper layers */ -+ netif_rx(skb); -+ -+ skb_new->dev = dev; -+ /* 16 bit align */ -+ skb_reserve(skb_new, RX_OFFSET); -+ /* reset descriptor's curr_addr */ -+ rxdesc->addr = virt_to_phys(skb_new->data); -+ -+ dev->stats.rx_packets++; -+ sp->rx_skb[idx] = skb_new; -+ } else { -+ dev->stats.rx_dropped++; -+ } -+ } -+ -+ rxdesc->devcs = ((AR2313_BUFSIZE << DMA_RX1_BSIZE_SHIFT) | -+ DMA_RX1_CHAINED); -+ rxdesc->status = DMA_RX_OWN; -+ -+ idx = DSC_NEXT(idx); -+ } -+ -+ sp->cur_rx = idx; -+ -+ return rval; -+} -+ -+ -+static void ar231x_tx_int(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ u32 idx; -+ struct sk_buff *skb; -+ ar231x_descr_t *txdesc; -+ unsigned int status = 0; -+ -+ idx = sp->tx_csm; -+ -+ while (idx != sp->tx_prd) { -+ txdesc = &sp->tx_ring[idx]; -+ -+ if ((status = txdesc->status) & DMA_TX_OWN) { -+ /* ar231x dma still owns descr */ -+ break; -+ } -+ /* done with this descriptor */ -+ dma_unmap_single(NULL, txdesc->addr, -+ txdesc->devcs & DMA_TX1_BSIZE_MASK, -+ DMA_TO_DEVICE); -+ txdesc->status = 0; -+ -+ if (status & DMA_TX_ERROR) { -+ dev->stats.tx_errors++; -+ dev->stats.tx_dropped++; -+ if (status & DMA_TX_ERR_UNDER) -+ dev->stats.tx_fifo_errors++; -+ if (status & DMA_TX_ERR_HB) -+ dev->stats.tx_heartbeat_errors++; -+ if (status & (DMA_TX_ERR_LOSS | DMA_TX_ERR_LINK)) -+ dev->stats.tx_carrier_errors++; -+ if (status & (DMA_TX_ERR_LATE | -+ DMA_TX_ERR_COL | -+ DMA_TX_ERR_JABBER | DMA_TX_ERR_DEFER)) -+ dev->stats.tx_aborted_errors++; -+ } else { -+ /* transmit OK */ -+ dev->stats.tx_packets++; -+ } -+ -+ skb = sp->tx_skb[idx]; -+ sp->tx_skb[idx] = NULL; -+ idx = DSC_NEXT(idx); -+ dev->stats.tx_bytes += skb->len; -+ dev_kfree_skb_irq(skb); -+ } -+ -+ sp->tx_csm = idx; -+ -+ return; -+} -+ -+ -+static void rx_tasklet_func(unsigned long data) -+{ -+ struct net_device *dev = (struct net_device *) data; -+ struct ar231x_private *sp = netdev_priv(dev); -+ -+ if (sp->unloading) { -+ return; -+ } -+ -+ if (ar231x_rx_int(dev)) { -+ tasklet_hi_schedule(&sp->rx_tasklet); -+ } else { -+ unsigned long flags; -+ spin_lock_irqsave(&sp->lock, flags); -+ sp->dma_regs->intr_ena |= DMA_STATUS_RI; -+ spin_unlock_irqrestore(&sp->lock, flags); -+ } -+} -+ -+static void rx_schedule(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ -+ sp->dma_regs->intr_ena &= ~DMA_STATUS_RI; -+ -+ tasklet_hi_schedule(&sp->rx_tasklet); -+} -+ -+static irqreturn_t ar231x_interrupt(int irq, void *dev_id) -+{ -+ struct net_device *dev = (struct net_device *) dev_id; -+ struct ar231x_private *sp = netdev_priv(dev); -+ unsigned int status, enabled; -+ -+ /* clear interrupt */ -+ /* -+ * Don't clear RI bit if currently disabled. -+ */ -+ status = sp->dma_regs->status; -+ enabled = sp->dma_regs->intr_ena; -+ sp->dma_regs->status = status & enabled; -+ -+ if (status & DMA_STATUS_NIS) { -+ /* normal status */ -+ /* -+ * Don't schedule rx processing if interrupt -+ * is already disabled. -+ */ -+ if (status & enabled & DMA_STATUS_RI) { -+ /* receive interrupt */ -+ rx_schedule(dev); -+ } -+ if (status & DMA_STATUS_TI) { -+ /* transmit interrupt */ -+ ar231x_tx_int(dev); -+ } -+ } -+ -+ /* abnormal status */ -+ if (status & (DMA_STATUS_FBE | DMA_STATUS_TPS)) { -+ ar231x_restart(dev); -+ } -+ return IRQ_HANDLED; -+} -+ -+ -+static int ar231x_open(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ unsigned int ethsal, ethsah; -+ -+ /* reset the hardware, in case the MAC address changed */ -+ ethsah = ((((u_int) (dev->dev_addr[5]) << 8) & (u_int) 0x0000FF00) | -+ (((u_int) (dev->dev_addr[4]) << 0) & (u_int) 0x000000FF)); -+ -+ ethsal = ((((u_int) (dev->dev_addr[3]) << 24) & (u_int) 0xFF000000) | -+ (((u_int) (dev->dev_addr[2]) << 16) & (u_int) 0x00FF0000) | -+ (((u_int) (dev->dev_addr[1]) << 8) & (u_int) 0x0000FF00) | -+ (((u_int) (dev->dev_addr[0]) << 0) & (u_int) 0x000000FF)); -+ -+ sp->eth_regs->mac_addr[0] = ethsah; -+ sp->eth_regs->mac_addr[1] = ethsal; -+ -+ mdelay(10); -+ -+ dev->mtu = 1500; -+ netif_start_queue(dev); -+ -+ sp->eth_regs->mac_control |= MAC_CONTROL_RE; -+ -+ return 0; -+} -+ -+static void ar231x_halt(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ int j; -+ -+ tasklet_disable(&sp->rx_tasklet); -+ -+ /* kill the MAC */ -+ sp->eth_regs->mac_control &= ~(MAC_CONTROL_RE | /* disable Receives */ -+ MAC_CONTROL_TE); /* disable Transmits */ -+ /* stop dma */ -+ sp->dma_regs->control = 0; -+ sp->dma_regs->bus_mode = DMA_BUS_MODE_SWR; -+ -+ /* place phy and MAC in reset */ -+ *sp->int_regs |= (sp->cfg->reset_mac | sp->cfg->reset_phy); -+ -+ /* free buffers on tx ring */ -+ for (j = 0; j < AR2313_DESCR_ENTRIES; j++) { -+ struct sk_buff *skb; -+ ar231x_descr_t *txdesc; -+ -+ txdesc = &sp->tx_ring[j]; -+ txdesc->descr = 0; -+ -+ skb = sp->tx_skb[j]; -+ if (skb) { -+ dev_kfree_skb(skb); -+ sp->tx_skb[j] = NULL; -+ } -+ } -+} -+ -+/* -+ * close should do nothing. Here's why. It's called when -+ * 'ifconfig bond0 down' is run. If it calls free_irq then -+ * the irq is gone forever ! When bond0 is made 'up' again, -+ * the ar231x_open () does not call request_irq (). Worse, -+ * the call to ar231x_halt() generates a WDOG reset due to -+ * the write to 'sp->int_regs' and the box reboots. -+ * Commenting this out is good since it allows the -+ * system to resume when bond0 is made up again. -+ */ -+static int ar231x_close(struct net_device *dev) -+{ -+#if 0 -+ /* -+ * Disable interrupts -+ */ -+ disable_irq(dev->irq); -+ -+ /* -+ * Without (or before) releasing irq and stopping hardware, this -+ * is an absolute non-sense, by the way. It will be reset instantly -+ * by the first irq. -+ */ -+ netif_stop_queue(dev); -+ -+ /* stop the MAC and DMA engines */ -+ ar231x_halt(dev); -+ -+ /* release the interrupt */ -+ free_irq(dev->irq, dev); -+ -+#endif -+ return 0; -+} -+ -+static int ar231x_start_xmit(struct sk_buff *skb, struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ ar231x_descr_t *td; -+ u32 idx; -+ -+ idx = sp->tx_prd; -+ td = &sp->tx_ring[idx]; -+ -+ if (td->status & DMA_TX_OWN) { -+ /* free skbuf and lie to the caller that we sent it out */ -+ dev->stats.tx_dropped++; -+ dev_kfree_skb(skb); -+ -+ /* restart transmitter in case locked */ -+ sp->dma_regs->xmt_poll = 0; -+ return 0; -+ } -+ -+ /* Setup the transmit descriptor. */ -+ td->devcs = ((skb->len << DMA_TX1_BSIZE_SHIFT) | -+ (DMA_TX1_LS | DMA_TX1_IC | DMA_TX1_CHAINED)); -+ td->addr = dma_map_single(NULL, skb->data, skb->len, DMA_TO_DEVICE); -+ td->status = DMA_TX_OWN; -+ -+ /* kick transmitter last */ -+ sp->dma_regs->xmt_poll = 0; -+ -+ sp->tx_skb[idx] = skb; -+ idx = DSC_NEXT(idx); -+ sp->tx_prd = idx; -+ -+ return 0; -+} -+ -+static int ar231x_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd) -+{ -+ struct mii_ioctl_data *data = (struct mii_ioctl_data *) &ifr->ifr_data; -+ struct ar231x_private *sp = netdev_priv(dev); -+ int ret; -+ -+ switch (cmd) { -+ -+ case SIOCETHTOOL: -+ spin_lock_irq(&sp->lock); -+ ret = phy_ethtool_ioctl(sp->phy_dev, (void *) ifr->ifr_data); -+ spin_unlock_irq(&sp->lock); -+ return ret; -+ -+ case SIOCSIFHWADDR: -+ if (copy_from_user -+ (dev->dev_addr, ifr->ifr_data, sizeof(dev->dev_addr))) -+ return -EFAULT; -+ return 0; -+ -+ case SIOCGIFHWADDR: -+ if (copy_to_user -+ (ifr->ifr_data, dev->dev_addr, sizeof(dev->dev_addr))) -+ return -EFAULT; -+ return 0; -+ -+ case SIOCGMIIPHY: -+ case SIOCGMIIREG: -+ case SIOCSMIIREG: -+ return phy_mii_ioctl(sp->phy_dev, data, cmd); -+ -+ default: -+ break; -+ } -+ -+ return -EOPNOTSUPP; -+} -+ -+static void ar231x_adjust_link(struct net_device *dev) -+{ -+ struct ar231x_private *sp = netdev_priv(dev); -+ unsigned int mc; -+ -+ if (!sp->phy_dev->link) -+ return; -+ -+ if (sp->phy_dev->duplex != sp->oldduplex) { -+ mc = readl(&sp->eth_regs->mac_control); -+ mc &= ~(MAC_CONTROL_F | MAC_CONTROL_DRO); -+ if (sp->phy_dev->duplex) -+ mc |= MAC_CONTROL_F; -+ else -+ mc |= MAC_CONTROL_DRO; -+ writel(mc, &sp->eth_regs->mac_control); -+ sp->oldduplex = sp->phy_dev->duplex; -+ } -+} -+ -+#define MII_ADDR(phy, reg) \ -+ ((reg << MII_ADDR_REG_SHIFT) | (phy << MII_ADDR_PHY_SHIFT)) -+ -+static int -+ar231x_mdiobus_read(struct mii_bus *bus, int phy_addr, int regnum) -+{ -+ struct net_device *const dev = bus->priv; -+ struct ar231x_private *sp = netdev_priv(dev); -+ volatile ETHERNET_STRUCT *ethernet = sp->phy_regs; -+ -+ ethernet->mii_addr = MII_ADDR(phy_addr, regnum); -+ while (ethernet->mii_addr & MII_ADDR_BUSY); -+ return (ethernet->mii_data >> MII_DATA_SHIFT); -+} -+ -+static int -+ar231x_mdiobus_write(struct mii_bus *bus, int phy_addr, int regnum, -+ u16 value) -+{ -+ struct net_device *const dev = bus->priv; -+ struct ar231x_private *sp = netdev_priv(dev); -+ volatile ETHERNET_STRUCT *ethernet = sp->phy_regs; -+ -+ while (ethernet->mii_addr & MII_ADDR_BUSY); -+ ethernet->mii_data = value << MII_DATA_SHIFT; -+ ethernet->mii_addr = MII_ADDR(phy_addr, regnum) | MII_ADDR_WRITE; -+ -+ return 0; -+} -+ -+static int ar231x_mdiobus_reset(struct mii_bus *bus) -+{ -+ struct net_device *const dev = bus->priv; -+ -+ ar231x_reset_reg(dev); -+ -+ return 0; -+} -+ -+static int ar231x_mdiobus_probe (struct net_device *dev) -+{ -+ struct ar231x_private *const sp = netdev_priv(dev); -+ struct phy_device *phydev = NULL; -+ int phy_addr; -+ -+ /* find the first (lowest address) PHY on the current MAC's MII bus */ -+ for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) -+ if (sp->mii_bus->phy_map[phy_addr]) { -+ phydev = sp->mii_bus->phy_map[phy_addr]; -+ sp->phy = phy_addr; -+ break; /* break out with first one found */ -+ } -+ -+ if (!phydev) { -+ printk (KERN_ERR "ar231x: %s: no PHY found\n", dev->name); -+ return -1; -+ } -+ -+ /* now we are supposed to have a proper phydev, to attach to... */ -+ BUG_ON(!phydev); -+ BUG_ON(phydev->attached_dev); -+ -+ phydev = phy_connect(dev, dev_name(&phydev->dev), &ar231x_adjust_link, 0, -+ PHY_INTERFACE_MODE_MII); -+ -+ if (IS_ERR(phydev)) { -+ printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); -+ return PTR_ERR(phydev); -+ } -+ -+ /* mask with MAC supported features */ -+ phydev->supported &= (SUPPORTED_10baseT_Half -+ | SUPPORTED_10baseT_Full -+ | SUPPORTED_100baseT_Half -+ | SUPPORTED_100baseT_Full -+ | SUPPORTED_Autoneg -+ /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */ -+ | SUPPORTED_MII -+ | SUPPORTED_TP); -+ -+ phydev->advertising = phydev->supported; -+ -+ sp->oldduplex = -1; -+ sp->phy_dev = phydev; -+ -+ printk(KERN_INFO "%s: attached PHY driver [%s] " -+ "(mii_bus:phy_addr=%s)\n", -+ dev->name, phydev->drv->name, dev_name(&phydev->dev)); -+ -+ return 0; -+} -+ ---- /dev/null -+++ b/drivers/net/ar231x.h -@@ -0,0 +1,302 @@ -+/* -+ * ar231x.h: Linux driver for the Atheros AR231x Ethernet device. -+ * -+ * Copyright (C) 2004 by Sameer Dekate -+ * Copyright (C) 2006 Imre Kaloz -+ * Copyright (C) 2006-2009 Felix Fietkau -+ * -+ * Thanks to Atheros for providing hardware and documentation -+ * enabling me to write this driver. -+ * -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ */ -+ -+#ifndef _AR2313_H_ -+#define _AR2313_H_ -+ -+#include -+#include -+#include -+#include -+ -+/* -+ * probe link timer - 5 secs -+ */ -+#define LINK_TIMER (5*HZ) -+ -+#define IS_DMA_TX_INT(X) (((X) & (DMA_STATUS_TI)) != 0) -+#define IS_DMA_RX_INT(X) (((X) & (DMA_STATUS_RI)) != 0) -+#define IS_DRIVER_OWNED(X) (((X) & (DMA_TX_OWN)) == 0) -+ -+#define AR2313_TX_TIMEOUT (HZ/4) -+ -+/* -+ * Rings -+ */ -+#define DSC_RING_ENTRIES_SIZE (AR2313_DESCR_ENTRIES * sizeof(struct desc)) -+#define DSC_NEXT(idx) ((idx + 1) & (AR2313_DESCR_ENTRIES - 1)) -+ -+#define AR2313_MBGET 2 -+#define AR2313_MBSET 3 -+#define AR2313_PCI_RECONFIG 4 -+#define AR2313_PCI_DUMP 5 -+#define AR2313_TEST_PANIC 6 -+#define AR2313_TEST_NULLPTR 7 -+#define AR2313_READ_DATA 8 -+#define AR2313_WRITE_DATA 9 -+#define AR2313_GET_VERSION 10 -+#define AR2313_TEST_HANG 11 -+#define AR2313_SYNC 12 -+ -+#define DMA_RX_ERR_CRC BIT(1) -+#define DMA_RX_ERR_DRIB BIT(2) -+#define DMA_RX_ERR_MII BIT(3) -+#define DMA_RX_EV2 BIT(5) -+#define DMA_RX_ERR_COL BIT(6) -+#define DMA_RX_LONG BIT(7) -+#define DMA_RX_LS BIT(8) /* last descriptor */ -+#define DMA_RX_FS BIT(9) /* first descriptor */ -+#define DMA_RX_MF BIT(10) /* multicast frame */ -+#define DMA_RX_ERR_RUNT BIT(11) /* runt frame */ -+#define DMA_RX_ERR_LENGTH BIT(12) /* length error */ -+#define DMA_RX_ERR_DESC BIT(14) /* descriptor error */ -+#define DMA_RX_ERROR BIT(15) /* error summary */ -+#define DMA_RX_LEN_MASK 0x3fff0000 -+#define DMA_RX_LEN_SHIFT 16 -+#define DMA_RX_FILT BIT(30) -+#define DMA_RX_OWN BIT(31) /* desc owned by DMA controller */ -+ -+#define DMA_RX1_BSIZE_MASK 0x000007ff -+#define DMA_RX1_BSIZE_SHIFT 0 -+#define DMA_RX1_CHAINED BIT(24) -+#define DMA_RX1_RER BIT(25) -+ -+#define DMA_TX_ERR_UNDER BIT(1) /* underflow error */ -+#define DMA_TX_ERR_DEFER BIT(2) /* excessive deferral */ -+#define DMA_TX_COL_MASK 0x78 -+#define DMA_TX_COL_SHIFT 3 -+#define DMA_TX_ERR_HB BIT(7) /* hearbeat failure */ -+#define DMA_TX_ERR_COL BIT(8) /* excessive collisions */ -+#define DMA_TX_ERR_LATE BIT(9) /* late collision */ -+#define DMA_TX_ERR_LINK BIT(10) /* no carrier */ -+#define DMA_TX_ERR_LOSS BIT(11) /* loss of carrier */ -+#define DMA_TX_ERR_JABBER BIT(14) /* transmit jabber timeout */ -+#define DMA_TX_ERROR BIT(15) /* frame aborted */ -+#define DMA_TX_OWN BIT(31) /* descr owned by DMA controller */ -+ -+#define DMA_TX1_BSIZE_MASK 0x000007ff -+#define DMA_TX1_BSIZE_SHIFT 0 -+#define DMA_TX1_CHAINED BIT(24) /* chained descriptors */ -+#define DMA_TX1_TER BIT(25) /* transmit end of ring */ -+#define DMA_TX1_FS BIT(29) /* first segment */ -+#define DMA_TX1_LS BIT(30) /* last segment */ -+#define DMA_TX1_IC BIT(31) /* interrupt on completion */ -+ -+#define RCVPKT_LENGTH(X) (X >> 16) /* Received pkt Length */ -+ -+#define MAC_CONTROL_RE BIT(2) /* receive enable */ -+#define MAC_CONTROL_TE BIT(3) /* transmit enable */ -+#define MAC_CONTROL_DC BIT(5) /* Deferral check */ -+#define MAC_CONTROL_ASTP BIT(8) /* Auto pad strip */ -+#define MAC_CONTROL_DRTY BIT(10) /* Disable retry */ -+#define MAC_CONTROL_DBF BIT(11) /* Disable bcast frames */ -+#define MAC_CONTROL_LCC BIT(12) /* late collision ctrl */ -+#define MAC_CONTROL_HP BIT(13) /* Hash Perfect filtering */ -+#define MAC_CONTROL_HASH BIT(14) /* Unicast hash filtering */ -+#define MAC_CONTROL_HO BIT(15) /* Hash only filtering */ -+#define MAC_CONTROL_PB BIT(16) /* Pass Bad frames */ -+#define MAC_CONTROL_IF BIT(17) /* Inverse filtering */ -+#define MAC_CONTROL_PR BIT(18) /* promiscuous mode (valid frames only) */ -+#define MAC_CONTROL_PM BIT(19) /* pass multicast */ -+#define MAC_CONTROL_F BIT(20) /* full-duplex */ -+#define MAC_CONTROL_DRO BIT(23) /* Disable Receive Own */ -+#define MAC_CONTROL_HBD BIT(28) /* heart-beat disabled (MUST BE SET) */ -+#define MAC_CONTROL_BLE BIT(30) /* big endian mode */ -+#define MAC_CONTROL_RA BIT(31) /* receive all (valid and invalid frames) */ -+ -+#define MII_ADDR_BUSY BIT(0) -+#define MII_ADDR_WRITE BIT(1) -+#define MII_ADDR_REG_SHIFT 6 -+#define MII_ADDR_PHY_SHIFT 11 -+#define MII_DATA_SHIFT 0 -+ -+#define FLOW_CONTROL_FCE BIT(1) -+ -+#define DMA_BUS_MODE_SWR BIT(0) /* software reset */ -+#define DMA_BUS_MODE_BLE BIT(7) /* big endian mode */ -+#define DMA_BUS_MODE_PBL_SHIFT 8 /* programmable burst length 32 */ -+#define DMA_BUS_MODE_DBO BIT(20) /* big-endian descriptors */ -+ -+#define DMA_STATUS_TI BIT(0) /* transmit interrupt */ -+#define DMA_STATUS_TPS BIT(1) /* transmit process stopped */ -+#define DMA_STATUS_TU BIT(2) /* transmit buffer unavailable */ -+#define DMA_STATUS_TJT BIT(3) /* transmit buffer timeout */ -+#define DMA_STATUS_UNF BIT(5) /* transmit underflow */ -+#define DMA_STATUS_RI BIT(6) /* receive interrupt */ -+#define DMA_STATUS_RU BIT(7) /* receive buffer unavailable */ -+#define DMA_STATUS_RPS BIT(8) /* receive process stopped */ -+#define DMA_STATUS_ETI BIT(10) /* early transmit interrupt */ -+#define DMA_STATUS_FBE BIT(13) /* fatal bus interrupt */ -+#define DMA_STATUS_ERI BIT(14) /* early receive interrupt */ -+#define DMA_STATUS_AIS BIT(15) /* abnormal interrupt summary */ -+#define DMA_STATUS_NIS BIT(16) /* normal interrupt summary */ -+#define DMA_STATUS_RS_SHIFT 17 /* receive process state */ -+#define DMA_STATUS_TS_SHIFT 20 /* transmit process state */ -+#define DMA_STATUS_EB_SHIFT 23 /* error bits */ -+ -+#define DMA_CONTROL_SR BIT(1) /* start receive */ -+#define DMA_CONTROL_ST BIT(13) /* start transmit */ -+#define DMA_CONTROL_SF BIT(21) /* store and forward */ -+ -+ -+typedef struct { -+ volatile unsigned int status; // OWN, Device control and status. -+ volatile unsigned int devcs; // pkt Control bits + Length -+ volatile unsigned int addr; // Current Address. -+ volatile unsigned int descr; // Next descriptor in chain. -+} ar231x_descr_t; -+ -+ -+ -+// -+// New Combo structure for Both Eth0 AND eth1 -+// -+typedef struct { -+ volatile unsigned int mac_control; /* 0x00 */ -+ volatile unsigned int mac_addr[2]; /* 0x04 - 0x08 */ -+ volatile unsigned int mcast_table[2]; /* 0x0c - 0x10 */ -+ volatile unsigned int mii_addr; /* 0x14 */ -+ volatile unsigned int mii_data; /* 0x18 */ -+ volatile unsigned int flow_control; /* 0x1c */ -+ volatile unsigned int vlan_tag; /* 0x20 */ -+ volatile unsigned int pad[7]; /* 0x24 - 0x3c */ -+ volatile unsigned int ucast_table[8]; /* 0x40-0x5c */ -+ -+} ETHERNET_STRUCT; -+ -+/******************************************************************** -+ * Interrupt controller -+ ********************************************************************/ -+ -+typedef struct { -+ volatile unsigned int wdog_control; /* 0x08 */ -+ volatile unsigned int wdog_timer; /* 0x0c */ -+ volatile unsigned int misc_status; /* 0x10 */ -+ volatile unsigned int misc_mask; /* 0x14 */ -+ volatile unsigned int global_status; /* 0x18 */ -+ volatile unsigned int reserved; /* 0x1c */ -+ volatile unsigned int reset_control; /* 0x20 */ -+} INTERRUPT; -+ -+/******************************************************************** -+ * DMA controller -+ ********************************************************************/ -+typedef struct { -+ volatile unsigned int bus_mode; /* 0x00 (CSR0) */ -+ volatile unsigned int xmt_poll; /* 0x04 (CSR1) */ -+ volatile unsigned int rcv_poll; /* 0x08 (CSR2) */ -+ volatile unsigned int rcv_base; /* 0x0c (CSR3) */ -+ volatile unsigned int xmt_base; /* 0x10 (CSR4) */ -+ volatile unsigned int status; /* 0x14 (CSR5) */ -+ volatile unsigned int control; /* 0x18 (CSR6) */ -+ volatile unsigned int intr_ena; /* 0x1c (CSR7) */ -+ volatile unsigned int rcv_missed; /* 0x20 (CSR8) */ -+ volatile unsigned int reserved[11]; /* 0x24-0x4c (CSR9-19) */ -+ volatile unsigned int cur_tx_buf_addr; /* 0x50 (CSR20) */ -+ volatile unsigned int cur_rx_buf_addr; /* 0x50 (CSR21) */ -+} DMA; -+ -+/* -+ * Struct private for the Sibyte. -+ * -+ * Elements are grouped so variables used by the tx handling goes -+ * together, and will go into the same cache lines etc. in order to -+ * avoid cache line contention between the rx and tx handling on SMP. -+ * -+ * Frequently accessed variables are put at the beginning of the -+ * struct to help the compiler generate better/shorter code. -+ */ -+struct ar231x_private { -+ struct net_device *dev; -+ int version; -+ u32 mb[2]; -+ -+ volatile ETHERNET_STRUCT *phy_regs; -+ volatile ETHERNET_STRUCT *eth_regs; -+ volatile DMA *dma_regs; -+ volatile u32 *int_regs; -+ struct ar231x_eth *cfg; -+ -+ spinlock_t lock; /* Serialise access to device */ -+ -+ /* -+ * RX and TX descriptors, must be adjacent -+ */ -+ ar231x_descr_t *rx_ring; -+ ar231x_descr_t *tx_ring; -+ -+ -+ struct sk_buff **rx_skb; -+ struct sk_buff **tx_skb; -+ -+ /* -+ * RX elements -+ */ -+ u32 rx_skbprd; -+ u32 cur_rx; -+ -+ /* -+ * TX elements -+ */ -+ u32 tx_prd; -+ u32 tx_csm; -+ -+ /* -+ * Misc elements -+ */ -+ char name[48]; -+ struct { -+ u32 address; -+ u32 length; -+ char *mapping; -+ } desc; -+ -+ -+ struct timer_list link_timer; -+ unsigned short phy; /* merlot phy = 1, samsung phy = 0x1f */ -+ unsigned short mac; -+ unsigned short link; /* 0 - link down, 1 - link up */ -+ u16 phyData; -+ -+ struct tasklet_struct rx_tasklet; -+ int unloading; -+ -+ struct phy_device *phy_dev; -+ struct mii_bus *mii_bus; -+ int oldduplex; -+}; -+ -+ -+/* -+ * Prototypes -+ */ -+static int ar231x_init(struct net_device *dev); -+#ifdef TX_TIMEOUT -+static void ar231x_tx_timeout(struct net_device *dev); -+#endif -+static int ar231x_restart(struct net_device *dev); -+static void ar231x_load_rx_ring(struct net_device *dev, int bufs); -+static irqreturn_t ar231x_interrupt(int irq, void *dev_id); -+static int ar231x_open(struct net_device *dev); -+static int ar231x_start_xmit(struct sk_buff *skb, struct net_device *dev); -+static int ar231x_close(struct net_device *dev); -+static int ar231x_ioctl(struct net_device *dev, struct ifreq *ifr, -+ int cmd); -+static void ar231x_init_cleanup(struct net_device *dev); -+static int ar231x_setup_timer(struct net_device *dev); -+static void ar231x_link_timer_fn(unsigned long data); -+static void ar231x_check_link(struct net_device *dev); -+#endif /* _AR2313_H_ */ diff --git a/target/linux/atheros/patches-2.6.31/120-spiflash.patch b/target/linux/atheros/patches-2.6.31/120-spiflash.patch deleted file mode 100644 index e63206007..000000000 --- a/target/linux/atheros/patches-2.6.31/120-spiflash.patch +++ /dev/null @@ -1,659 +0,0 @@ ---- a/drivers/mtd/devices/Kconfig -+++ b/drivers/mtd/devices/Kconfig -@@ -104,6 +104,10 @@ config M25PXX_USE_FAST_READ - help - This option enables FAST_READ access supported by ST M25Pxx. - -+config MTD_AR2315 -+ tristate "Atheros AR2315+ SPI Flash support" -+ depends on ATHEROS_AR2315 -+ - config MTD_SLRAM - tristate "Uncached system RAM" - help ---- a/drivers/mtd/devices/Makefile -+++ b/drivers/mtd/devices/Makefile -@@ -16,3 +16,4 @@ obj-$(CONFIG_MTD_LART) += lart.o - obj-$(CONFIG_MTD_BLOCK2MTD) += block2mtd.o - obj-$(CONFIG_MTD_DATAFLASH) += mtd_dataflash.o - obj-$(CONFIG_MTD_M25P80) += m25p80.o -+obj-$(CONFIG_MTD_AR2315) += ar2315.o ---- /dev/null -+++ b/drivers/mtd/devices/ar2315.c -@@ -0,0 +1,517 @@ -+ -+/* -+ * MTD driver for the SPI Flash Memory support on Atheros AR2315 -+ * -+ * Copyright (c) 2005-2006 Atheros Communications Inc. -+ * Copyright (C) 2006-2007 FON Technology, SL. -+ * Copyright (C) 2006-2007 Imre Kaloz -+ * Copyright (C) 2006-2009 Felix Fietkau -+ * -+ * This code is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+ -+ -+#define SPIFLASH "spiflash: " -+#define busy_wait(_priv, _condition, _wait) do { \ -+ while (_condition) { \ -+ spin_unlock_bh(&_priv->lock); \ -+ if (_wait > 1) \ -+ msleep(_wait); \ -+ else if ((_wait == 1) && need_resched()) \ -+ schedule(); \ -+ else \ -+ udelay(1); \ -+ spin_lock_bh(&_priv->lock); \ -+ } \ -+} while (0) -+ -+enum { -+ FLASH_NONE, -+ FLASH_1MB, -+ FLASH_2MB, -+ FLASH_4MB, -+ FLASH_8MB, -+ FLASH_16MB, -+}; -+ -+/* Flash configuration table */ -+struct flashconfig { -+ u32 byte_cnt; -+ u32 sector_cnt; -+ u32 sector_size; -+}; -+ -+const struct flashconfig flashconfig_tbl[] = { -+ [FLASH_NONE] = { 0, 0, 0}, -+ [FLASH_1MB] = { STM_1MB_BYTE_COUNT, STM_1MB_SECTOR_COUNT, STM_1MB_SECTOR_SIZE}, -+ [FLASH_2MB] = { STM_2MB_BYTE_COUNT, STM_2MB_SECTOR_COUNT, STM_2MB_SECTOR_SIZE}, -+ [FLASH_4MB] = { STM_4MB_BYTE_COUNT, STM_4MB_SECTOR_COUNT, STM_4MB_SECTOR_SIZE}, -+ [FLASH_8MB] = { STM_8MB_BYTE_COUNT, STM_8MB_SECTOR_COUNT, STM_8MB_SECTOR_SIZE}, -+ [FLASH_16MB] = { STM_16MB_BYTE_COUNT, STM_16MB_SECTOR_COUNT, STM_16MB_SECTOR_SIZE} -+}; -+ -+/* Mapping of generic opcodes to STM serial flash opcodes */ -+enum { -+ SPI_WRITE_ENABLE, -+ SPI_WRITE_DISABLE, -+ SPI_RD_STATUS, -+ SPI_WR_STATUS, -+ SPI_RD_DATA, -+ SPI_FAST_RD_DATA, -+ SPI_PAGE_PROGRAM, -+ SPI_SECTOR_ERASE, -+ SPI_BULK_ERASE, -+ SPI_DEEP_PWRDOWN, -+ SPI_RD_SIG, -+}; -+ -+struct opcodes { -+ __u16 code; -+ __s8 tx_cnt; -+ __s8 rx_cnt; -+}; -+const struct opcodes stm_opcodes[] = { -+ [SPI_WRITE_ENABLE] = {STM_OP_WR_ENABLE, 1, 0}, -+ [SPI_WRITE_DISABLE] = {STM_OP_WR_DISABLE, 1, 0}, -+ [SPI_RD_STATUS] = {STM_OP_RD_STATUS, 1, 1}, -+ [SPI_WR_STATUS] = {STM_OP_WR_STATUS, 1, 0}, -+ [SPI_RD_DATA] = {STM_OP_RD_DATA, 4, 4}, -+ [SPI_FAST_RD_DATA] = {STM_OP_FAST_RD_DATA, 5, 0}, -+ [SPI_PAGE_PROGRAM] = {STM_OP_PAGE_PGRM, 8, 0}, -+ [SPI_SECTOR_ERASE] = {STM_OP_SECTOR_ERASE, 4, 0}, -+ [SPI_BULK_ERASE] = {STM_OP_BULK_ERASE, 1, 0}, -+ [SPI_DEEP_PWRDOWN] = {STM_OP_DEEP_PWRDOWN, 1, 0}, -+ [SPI_RD_SIG] = {STM_OP_RD_SIG, 4, 1}, -+}; -+ -+/* Driver private data structure */ -+struct spiflash_priv { -+ struct mtd_info mtd; -+ void *readaddr; /* memory mapped data for read */ -+ void *mmraddr; /* memory mapped register space */ -+ wait_queue_head_t wq; -+ spinlock_t lock; -+ int state; -+}; -+ -+#define to_spiflash(_mtd) container_of(_mtd, struct spiflash_priv, mtd) -+ -+enum { -+ FL_READY, -+ FL_READING, -+ FL_ERASING, -+ FL_WRITING -+}; -+ -+/***************************************************************************************************/ -+ -+static u32 -+spiflash_read_reg(struct spiflash_priv *priv, int reg) -+{ -+ return ar231x_read_reg((u32) priv->mmraddr + reg); -+} -+ -+static void -+spiflash_write_reg(struct spiflash_priv *priv, int reg, u32 data) -+{ -+ ar231x_write_reg((u32) priv->mmraddr + reg, data); -+} -+ -+static u32 -+spiflash_wait_busy(struct spiflash_priv *priv) -+{ -+ u32 reg; -+ -+ busy_wait(priv, (reg = spiflash_read_reg(priv, SPI_FLASH_CTL)) & -+ SPI_CTL_BUSY, 0); -+ return reg; -+} -+ -+static u32 -+spiflash_sendcmd (struct spiflash_priv *priv, int opcode, u32 addr) -+{ -+ const struct opcodes *op; -+ u32 reg, mask; -+ -+ op = &stm_opcodes[opcode]; -+ reg = spiflash_wait_busy(priv); -+ spiflash_write_reg(priv, SPI_FLASH_OPCODE, -+ ((u32) op->code) | (addr << 8)); -+ -+ reg &= ~SPI_CTL_TX_RX_CNT_MASK; -+ reg |= SPI_CTL_START | op->tx_cnt | (op->rx_cnt << 4); -+ -+ spiflash_write_reg(priv, SPI_FLASH_CTL, reg); -+ spiflash_wait_busy(priv); -+ -+ if (!op->rx_cnt) -+ return 0; -+ -+ reg = spiflash_read_reg(priv, SPI_FLASH_DATA); -+ -+ switch (op->rx_cnt) { -+ case 1: -+ mask = 0x000000ff; -+ break; -+ case 2: -+ mask = 0x0000ffff; -+ break; -+ case 3: -+ mask = 0x00ffffff; -+ break; -+ default: -+ mask = 0xffffffff; -+ break; -+ } -+ reg &= mask; -+ -+ return reg; -+} -+ -+ -+/* -+ * Probe SPI flash device -+ * Function returns 0 for failure. -+ * and flashconfig_tbl array index for success. -+ */ -+static int -+spiflash_probe_chip (struct spiflash_priv *priv) -+{ -+ u32 sig; -+ int flash_size; -+ -+ /* Read the signature on the flash device */ -+ spin_lock_bh(&priv->lock); -+ sig = spiflash_sendcmd(priv, SPI_RD_SIG, 0); -+ spin_unlock_bh(&priv->lock); -+ -+ switch (sig) { -+ case STM_8MBIT_SIGNATURE: -+ flash_size = FLASH_1MB; -+ break; -+ case STM_16MBIT_SIGNATURE: -+ flash_size = FLASH_2MB; -+ break; -+ case STM_32MBIT_SIGNATURE: -+ flash_size = FLASH_4MB; -+ break; -+ case STM_64MBIT_SIGNATURE: -+ flash_size = FLASH_8MB; -+ break; -+ case STM_128MBIT_SIGNATURE: -+ flash_size = FLASH_16MB; -+ break; -+ default: -+ printk (KERN_WARNING SPIFLASH "Read of flash device signature failed!\n"); -+ return 0; -+ } -+ -+ return flash_size; -+} -+ -+ -+/* wait until the flash chip is ready and grab a lock */ -+static int spiflash_wait_ready(struct spiflash_priv *priv, int state) -+{ -+ DECLARE_WAITQUEUE(wait, current); -+ -+retry: -+ spin_lock_bh(&priv->lock); -+ if (priv->state != FL_READY) { -+ set_current_state(TASK_UNINTERRUPTIBLE); -+ add_wait_queue(&priv->wq, &wait); -+ spin_unlock_bh(&priv->lock); -+ schedule(); -+ remove_wait_queue(&priv->wq, &wait); -+ -+ if(signal_pending(current)) -+ return 0; -+ -+ goto retry; -+ } -+ priv->state = state; -+ -+ return 1; -+} -+ -+static inline void spiflash_done(struct spiflash_priv *priv) -+{ -+ priv->state = FL_READY; -+ spin_unlock_bh(&priv->lock); -+ wake_up(&priv->wq); -+} -+ -+static void -+spiflash_wait_complete(struct spiflash_priv *priv, unsigned int timeout) -+{ -+ busy_wait(priv, spiflash_sendcmd(priv, SPI_RD_STATUS, 0) & -+ SPI_STATUS_WIP, timeout); -+ spiflash_done(priv); -+} -+ -+ -+ -+static int -+spiflash_erase (struct mtd_info *mtd, struct erase_info *instr) -+{ -+ struct spiflash_priv *priv = to_spiflash(mtd); -+ const struct opcodes *op; -+ u32 temp, reg; -+ -+ if (instr->addr + instr->len > mtd->size) -+ return -EINVAL; -+ -+ if (!spiflash_wait_ready(priv, FL_ERASING)) -+ return -EINTR; -+ -+ spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0); -+ reg = spiflash_wait_busy(priv); -+ -+ op = &stm_opcodes[SPI_SECTOR_ERASE]; -+ temp = ((u32)instr->addr << 8) | (u32)(op->code); -+ spiflash_write_reg(priv, SPI_FLASH_OPCODE, temp); -+ -+ reg &= ~SPI_CTL_TX_RX_CNT_MASK; -+ reg |= op->tx_cnt | SPI_CTL_START; -+ spiflash_write_reg(priv, SPI_FLASH_CTL, reg); -+ -+ spiflash_wait_complete(priv, 20); -+ -+ instr->state = MTD_ERASE_DONE; -+ mtd_erase_callback(instr); -+ -+ return 0; -+} -+ -+static int -+spiflash_read (struct mtd_info *mtd, loff_t from, size_t len, size_t *retlen, u_char *buf) -+{ -+ struct spiflash_priv *priv = to_spiflash(mtd); -+ u8 *read_addr; -+ -+ if (!len) -+ return 0; -+ -+ if (from + len > mtd->size) -+ return -EINVAL; -+ -+ *retlen = len; -+ -+ if (!spiflash_wait_ready(priv, FL_READING)) -+ return -EINTR; -+ -+ read_addr = (u8 *)(priv->readaddr + from); -+ memcpy_fromio(buf, read_addr, len); -+ spiflash_done(priv); -+ -+ return 0; -+} -+ -+static int -+spiflash_write (struct mtd_info *mtd, loff_t to, size_t len, size_t *retlen, const u8 *buf) -+{ -+ struct spiflash_priv *priv = to_spiflash(mtd); -+ u32 opcode, bytes_left; -+ -+ *retlen = 0; -+ -+ if (!len) -+ return 0; -+ -+ if (to + len > mtd->size) -+ return -EINVAL; -+ -+ bytes_left = len; -+ -+ do { -+ u32 read_len, reg, page_offset, spi_data = 0; -+ -+ read_len = min(bytes_left, sizeof(u32)); -+ -+ /* 32-bit writes cannot span across a page boundary -+ * (256 bytes). This types of writes require two page -+ * program operations to handle it correctly. The STM part -+ * will write the overflow data to the beginning of the -+ * current page as opposed to the subsequent page. -+ */ -+ page_offset = (to & (STM_PAGE_SIZE - 1)) + read_len; -+ -+ if (page_offset > STM_PAGE_SIZE) -+ read_len -= (page_offset - STM_PAGE_SIZE); -+ -+ if (!spiflash_wait_ready(priv, FL_WRITING)) -+ return -EINTR; -+ -+ spiflash_sendcmd(priv, SPI_WRITE_ENABLE, 0); -+ spi_data = 0; -+ switch (read_len) { -+ case 4: -+ spi_data |= buf[3] << 24; -+ /* fall through */ -+ case 3: -+ spi_data |= buf[2] << 16; -+ /* fall through */ -+ case 2: -+ spi_data |= buf[1] << 8; -+ /* fall through */ -+ case 1: -+ spi_data |= buf[0] & 0xff; -+ break; -+ default: -+ break; -+ } -+ -+ spiflash_write_reg(priv, SPI_FLASH_DATA, spi_data); -+ opcode = stm_opcodes[SPI_PAGE_PROGRAM].code | -+ (to & 0x00ffffff) << 8; -+ spiflash_write_reg(priv, SPI_FLASH_OPCODE, opcode); -+ -+ reg = spiflash_read_reg(priv, SPI_FLASH_CTL); -+ reg &= ~SPI_CTL_TX_RX_CNT_MASK; -+ reg |= (read_len + 4) | SPI_CTL_START; -+ spiflash_write_reg(priv, SPI_FLASH_CTL, reg); -+ -+ spiflash_wait_complete(priv, 1); -+ -+ bytes_left -= read_len; -+ to += read_len; -+ buf += read_len; -+ -+ *retlen += read_len; -+ } while (bytes_left != 0); -+ -+ return 0; -+} -+ -+ -+#ifdef CONFIG_MTD_PARTITIONS -+static const char *part_probe_types[] = { "cmdlinepart", "RedBoot", "MyLoader", NULL }; -+#endif -+ -+ -+static int -+spiflash_probe(struct platform_device *pdev) -+{ -+ struct spiflash_priv *priv; -+ struct mtd_partition *parts; -+ struct mtd_info *mtd; -+ int index, num_parts; -+ int result = 0; -+ -+ priv = kzalloc(sizeof(struct spiflash_priv), GFP_KERNEL); -+ spin_lock_init(&priv->lock); -+ init_waitqueue_head(&priv->wq); -+ priv->state = FL_READY; -+ mtd = &priv->mtd; -+ -+ priv->mmraddr = ioremap_nocache(SPI_FLASH_MMR, SPI_FLASH_MMR_SIZE); -+ if (!priv->mmraddr) { -+ printk(KERN_WARNING SPIFLASH "Failed to map flash device\n"); -+ goto error; -+ } -+ -+ index = spiflash_probe_chip(priv); -+ if (!index) { -+ printk (KERN_WARNING SPIFLASH "Found no serial flash device\n"); -+ goto error; -+ } -+ -+ priv->readaddr = ioremap_nocache(SPI_FLASH_READ, flashconfig_tbl[index].byte_cnt); -+ if (!priv->readaddr) { -+ printk (KERN_WARNING SPIFLASH "Failed to map flash device\n"); -+ goto error; -+ } -+ -+ platform_set_drvdata(pdev, priv); -+ mtd->name = "spiflash"; -+ mtd->type = MTD_NORFLASH; -+ mtd->flags = (MTD_CAP_NORFLASH|MTD_WRITEABLE); -+ mtd->size = flashconfig_tbl[index].byte_cnt; -+ mtd->erasesize = flashconfig_tbl[index].sector_size; -+ mtd->writesize = 1; -+ mtd->numeraseregions = 0; -+ mtd->eraseregions = NULL; -+ mtd->erase = spiflash_erase; -+ mtd->read = spiflash_read; -+ mtd->write = spiflash_write; -+ mtd->owner = THIS_MODULE; -+ -+#ifdef CONFIG_MTD_PARTITIONS -+ /* parse redboot partitions */ -+ num_parts = parse_mtd_partitions(mtd, part_probe_types, &parts, 0); -+ if (!num_parts) -+ goto error; -+ -+ result = add_mtd_partitions(mtd, parts, num_parts); -+#endif -+ -+ return result; -+ -+error: -+ if (priv->mmraddr) -+ iounmap(priv->mmraddr); -+ kfree(priv); -+ return -ENXIO; -+} -+ -+static int -+spiflash_remove (struct platform_device *pdev) -+{ -+ struct spiflash_priv *priv = platform_get_drvdata(pdev); -+ struct mtd_info *mtd = &priv->mtd; -+ -+ del_mtd_partitions(mtd); -+ iounmap(priv->mmraddr); -+ iounmap(priv->readaddr); -+ kfree(priv); -+ -+ return 0; -+} -+ -+struct platform_driver spiflash_driver = { -+ .driver.name = "spiflash", -+ .probe = spiflash_probe, -+ .remove = spiflash_remove, -+}; -+ -+int __init -+spiflash_init (void) -+{ -+ return platform_driver_register(&spiflash_driver); -+} -+ -+void __exit -+spiflash_exit (void) -+{ -+ return platform_driver_unregister(&spiflash_driver); -+} -+ -+module_init (spiflash_init); -+module_exit (spiflash_exit); -+ -+MODULE_LICENSE("GPL"); -+MODULE_AUTHOR("OpenWrt.org, Atheros Communications Inc"); -+MODULE_DESCRIPTION("MTD driver for SPI Flash on Atheros SOC"); -+ ---- /dev/null -+++ b/arch/mips/include/asm/mach-ar231x/ar2315_spiflash.h -@@ -0,0 +1,116 @@ -+/* -+ * SPI Flash Memory support header file. -+ * -+ * Copyright (c) 2005, Atheros Communications Inc. -+ * Copyright (C) 2006 FON Technology, SL. -+ * Copyright (C) 2006 Imre Kaloz -+ * Copyright (C) 2006-2009 Felix Fietkau -+ * -+ * This code is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License version 2 as -+ * published by the Free Software Foundation. -+ * -+ */ -+#ifndef __AR2315_SPIFLASH_H -+#define __AR2315_SPIFLASH_H -+ -+#define STM_PAGE_SIZE 256 -+ -+#define SFI_WRITE_BUFFER_SIZE 4 -+#define SFI_FLASH_ADDR_MASK 0x00ffffff -+ -+#define STM_8MBIT_SIGNATURE 0x13 -+#define STM_M25P80_BYTE_COUNT 1048576 -+#define STM_M25P80_SECTOR_COUNT 16 -+#define STM_M25P80_SECTOR_SIZE 0x10000 -+ -+#define STM_16MBIT_SIGNATURE 0x14 -+#define STM_M25P16_BYTE_COUNT 2097152 -+#define STM_M25P16_SECTOR_COUNT 32 -+#define STM_M25P16_SECTOR_SIZE 0x10000 -+ -+#define STM_32MBIT_SIGNATURE 0x15 -+#define STM_M25P32_BYTE_COUNT 4194304 -+#define STM_M25P32_SECTOR_COUNT 64 -+#define STM_M25P32_SECTOR_SIZE 0x10000 -+ -+#define STM_64MBIT_SIGNATURE 0x16 -+#define STM_M25P64_BYTE_COUNT 8388608 -+#define STM_M25P64_SECTOR_COUNT 128 -+#define STM_M25P64_SECTOR_SIZE 0x10000 -+ -+#define STM_128MBIT_SIGNATURE 0x17 -+#define STM_M25P128_BYTE_COUNT 16777216 -+#define STM_M25P128_SECTOR_COUNT 256 -+#define STM_M25P128_SECTOR_SIZE 0x10000 -+ -+#define STM_1MB_BYTE_COUNT STM_M25P80_BYTE_COUNT -+#define STM_1MB_SECTOR_COUNT STM_M25P80_SECTOR_COUNT -+#define STM_1MB_SECTOR_SIZE STM_M25P80_SECTOR_SIZE -+#define STM_2MB_BYTE_COUNT STM_M25P16_BYTE_COUNT -+#define STM_2MB_SECTOR_COUNT STM_M25P16_SECTOR_COUNT -+#define STM_2MB_SECTOR_SIZE STM_M25P16_SECTOR_SIZE -+#define STM_4MB_BYTE_COUNT STM_M25P32_BYTE_COUNT -+#define STM_4MB_SECTOR_COUNT STM_M25P32_SECTOR_COUNT -+#define STM_4MB_SECTOR_SIZE STM_M25P32_SECTOR_SIZE -+#define STM_8MB_BYTE_COUNT STM_M25P64_BYTE_COUNT -+#define STM_8MB_SECTOR_COUNT STM_M25P64_SECTOR_COUNT -+#define STM_8MB_SECTOR_SIZE STM_M25P64_SECTOR_SIZE -+#define STM_16MB_BYTE_COUNT STM_M25P128_BYTE_COUNT -+#define STM_16MB_SECTOR_COUNT STM_M25P128_SECTOR_COUNT -+#define STM_16MB_SECTOR_SIZE STM_M25P128_SECTOR_SIZE -+ -+/* -+ * ST Microelectronics Opcodes for Serial Flash -+ */ -+ -+#define STM_OP_WR_ENABLE 0x06 /* Write Enable */ -+#define STM_OP_WR_DISABLE 0x04 /* Write Disable */ -+#define STM_OP_RD_STATUS 0x05 /* Read Status */ -+#define STM_OP_WR_STATUS 0x01 /* Write Status */ -+#define STM_OP_RD_DATA 0x03 /* Read Data */ -+#define STM_OP_FAST_RD_DATA 0x0b /* Fast Read Data */ -+#define STM_OP_PAGE_PGRM 0x02 /* Page Program */ -+#define STM_OP_SECTOR_ERASE 0xd8 /* Sector Erase */ -+#define STM_OP_BULK_ERASE 0xc7 /* Bulk Erase */ -+#define STM_OP_DEEP_PWRDOWN 0xb9 /* Deep Power-Down Mode */ -+#define STM_OP_RD_SIG 0xab /* Read Electronic Signature */ -+ -+#define STM_STATUS_WIP 0x01 /* Write-In-Progress */ -+#define STM_STATUS_WEL 0x02 /* Write Enable Latch */ -+#define STM_STATUS_BP0 0x04 /* Block Protect 0 */ -+#define STM_STATUS_BP1 0x08 /* Block Protect 1 */ -+#define STM_STATUS_BP2 0x10 /* Block Protect 2 */ -+#define STM_STATUS_SRWD 0x80 /* Status Register Write Disable */ -+ -+/* -+ * SPI Flash Interface Registers -+ */ -+#define AR531XPLUS_SPI_READ 0x08000000 -+#define AR531XPLUS_SPI_MMR 0x11300000 -+#define AR531XPLUS_SPI_MMR_SIZE 12 -+ -+#define AR531XPLUS_SPI_CTL 0x00 -+#define AR531XPLUS_SPI_OPCODE 0x04 -+#define AR531XPLUS_SPI_DATA 0x08 -+ -+#define SPI_FLASH_READ AR531XPLUS_SPI_READ -+#define SPI_FLASH_MMR AR531XPLUS_SPI_MMR -+#define SPI_FLASH_MMR_SIZE AR531XPLUS_SPI_MMR_SIZE -+#define SPI_FLASH_CTL AR531XPLUS_SPI_CTL -+#define SPI_FLASH_OPCODE AR531XPLUS_SPI_OPCODE -+#define SPI_FLASH_DATA AR531XPLUS_SPI_DATA -+ -+#define SPI_CTL_START 0x00000100 -+#define SPI_CTL_BUSY 0x00010000 -+#define SPI_CTL_TXCNT_MASK 0x0000000f -+#define SPI_CTL_RXCNT_MASK 0x000000f0 -+#define SPI_CTL_TX_RX_CNT_MASK 0x000000ff -+#define SPI_CTL_SIZE_MASK 0x00060000 -+ -+#define SPI_CTL_CLK_SEL_MASK 0x03000000 -+#define SPI_OPCODE_MASK 0x000000ff -+ -+#define SPI_STATUS_WIP STM_STATUS_WIP -+ -+#endif diff --git a/target/linux/atheros/patches-2.6.31/130-watchdog.patch b/target/linux/atheros/patches-2.6.31/130-watchdog.patch deleted file mode 100644 index f550ba73d..000000000 --- a/target/linux/atheros/patches-2.6.31/130-watchdog.patch +++ /dev/null @@ -1,228 +0,0 @@ ---- /dev/null -+++ b/drivers/watchdog/ar2315-wtd.c -@@ -0,0 +1,200 @@ -+/* -+ * This program is free software; you can redistribute it and/or modify -+ * it under the terms of the GNU General Public License as published by -+ * the Free Software Foundation; either version 2 of the License, or -+ * (at your option) any later version. -+ * -+ * This program is distributed in the hope that it will be useful, -+ * but WITHOUT ANY WARRANTY; without even the implied warranty of -+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -+ * GNU General Public License for more details. -+ * -+ * You should have received a copy of the GNU General Public License -+ * along with this program; if not, write to the Free Software -+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA -+ * -+ * Copyright (C) 2008 John Crispin -+ * Based on EP93xx and ifxmips wdt driver -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define CLOCK_RATE 40000000 -+#define HEARTBEAT(x) (x < 1 || x > 90)?(20):(x) -+ -+static int wdt_timeout = 20; -+static int started = 0; -+static int in_use = 0; -+ -+static void -+ar2315_wdt_enable(void) -+{ -+ ar231x_write_reg(AR2315_WD, wdt_timeout * CLOCK_RATE); -+ ar231x_write_reg(AR2315_ISR, 0x80); -+} -+ -+static ssize_t -+ar2315_wdt_write(struct file *file, const char __user *data, size_t len, loff_t *ppos) -+{ -+ if(len) -+ ar2315_wdt_enable(); -+ return len; -+} -+ -+static int -+ar2315_wdt_open(struct inode *inode, struct file *file) -+{ -+ if(in_use) -+ return -EBUSY; -+ ar2315_wdt_enable(); -+ in_use = started = 1; -+ return nonseekable_open(inode, file); -+} -+ -+static int -+ar2315_wdt_release(struct inode *inode, struct file *file) -+{ -+ in_use = 0; -+ return 0; -+} -+ -+static irqreturn_t -+ar2315_wdt_interrupt(int irq, void *dev_id) -+{ -+ if(started) -+ { -+ printk(KERN_CRIT "watchdog expired, rebooting system\n"); -+ emergency_restart(); -+ } else { -+ ar231x_write_reg(AR2315_WDC, 0); -+ ar231x_write_reg(AR2315_WD, 0); -+ ar231x_write_reg(AR2315_ISR, 0x80); -+ } -+ return IRQ_HANDLED; -+} -+ -+static struct watchdog_info ident = { -+ .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING, -+ .identity = "ar2315 Watchdog", -+}; -+ -+static int -+ar2315_wdt_ioctl(struct inode *inode, struct file *file, unsigned int cmd, unsigned long arg) -+{ -+ int new_wdt_timeout; -+ int ret = -ENOIOCTLCMD; -+ -+ switch(cmd) -+ { -+ case WDIOC_GETSUPPORT: -+ ret = copy_to_user((struct watchdog_info __user *)arg, &ident, sizeof(ident)) ? -EFAULT : 0; -+ break; -+ -+ case WDIOC_KEEPALIVE: -+ ar2315_wdt_enable(); -+ ret = 0; -+ break; -+ -+ case WDIOC_SETTIMEOUT: -+ if((ret = get_user(new_wdt_timeout, (int __user *)arg))) -+ break; -+ wdt_timeout = HEARTBEAT(new_wdt_timeout); -+ ar2315_wdt_enable(); -+ break; -+ -+ case WDIOC_GETTIMEOUT: -+ ret = put_user(wdt_timeout, (int __user *)arg); -+ break; -+ } -+ return ret; -+} -+ -+static struct file_operations ar2315_wdt_fops = { -+ .owner = THIS_MODULE, -+ .llseek = no_llseek, -+ .write = ar2315_wdt_write, -+ .ioctl = ar2315_wdt_ioctl, -+ .open = ar2315_wdt_open, -+ .release = ar2315_wdt_release, -+}; -+ -+static struct miscdevice ar2315_wdt_miscdev = { -+ .minor = WATCHDOG_MINOR, -+ .name = "watchdog", -+ .fops = &ar2315_wdt_fops, -+}; -+ -+static int -+ar2315_wdt_probe(struct platform_device *dev) -+{ -+ int ret = 0; -+ -+ ar2315_wdt_enable(); -+ ret = request_irq(AR531X_MISC_IRQ_WATCHDOG, ar2315_wdt_interrupt, IRQF_DISABLED, "ar2315_wdt", NULL); -+ if(ret) -+ { -+ printk(KERN_ERR "ar2315wdt: failed to register inetrrupt\n"); -+ goto out; -+ } -+ -+ ret = misc_register(&ar2315_wdt_miscdev); -+ if(ret) -+ printk(KERN_ERR "ar2315wdt: failed to register miscdev\n"); -+ -+out: -+ return ret; -+} -+ -+static int -+ar2315_wdt_remove(struct platform_device *dev) -+{ -+ misc_deregister(&ar2315_wdt_miscdev); -+ free_irq(AR531X_MISC_IRQ_WATCHDOG, NULL); -+ return 0; -+} -+ -+static struct platform_driver ar2315_wdt_driver = { -+ .probe = ar2315_wdt_probe, -+ .remove = ar2315_wdt_remove, -+ .driver = { -+ .name = "ar2315_wdt", -+ .owner = THIS_MODULE, -+ }, -+}; -+ -+static int __init -+init_ar2315_wdt(void) -+{ -+ int ret = platform_driver_register(&ar2315_wdt_driver); -+ if(ret) -+ printk(KERN_INFO "ar2315_wdt: error registering platfom driver!"); -+ return ret; -+} -+ -+static void __exit -+exit_ar2315_wdt(void) -+{ -+ platform_driver_unregister(&ar2315_wdt_driver); -+} -+ -+module_init(init_ar2315_wdt); -+module_exit(exit_ar2315_wdt); ---- a/drivers/watchdog/Kconfig -+++ b/drivers/watchdog/Kconfig -@@ -805,6 +805,12 @@ config TXX9_WDT - help - Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs. - -+config ATHEROS_WDT -+ tristate "Atheros wisoc Watchdog Timer" -+ depends on ATHEROS_AR231X -+ help -+ Hardware driver for the Atheros wisoc Watchdog Timer. -+ - # PARISC Architecture - - # POWERPC Architecture ---- a/drivers/watchdog/Makefile -+++ b/drivers/watchdog/Makefile -@@ -110,6 +110,7 @@ obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o - obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o - obj-$(CONFIG_AR7_WDT) += ar7_wdt.o - obj-$(CONFIG_TXX9_WDT) += txx9wdt.o -+obj-$(CONFIG_ATHEROS_WDT) += ar2315-wtd.o - - # PARISC Architecture - diff --git a/target/linux/atheros/patches-2.6.31/140-redboot_partition_scan.patch b/target/linux/atheros/patches-2.6.31/140-redboot_partition_scan.patch deleted file mode 100644 index 289d4eb99..000000000 --- a/target/linux/atheros/patches-2.6.31/140-redboot_partition_scan.patch +++ /dev/null @@ -1,54 +0,0 @@ ---- a/drivers/mtd/redboot.c -+++ b/drivers/mtd/redboot.c -@@ -60,31 +60,32 @@ static int parse_redboot_partitions(stru - static char nullstring[] = "unallocated"; - #endif - -+ buf = vmalloc(master->erasesize); -+ if (!buf) -+ return -ENOMEM; -+ -+ restart: - if ( directory < 0 ) { - offset = master->size + directory * master->erasesize; -- while (master->block_isbad && -+ while (master->block_isbad && - master->block_isbad(master, offset)) { - if (!offset) { - nogood: - printk(KERN_NOTICE "Failed to find a non-bad block to check for RedBoot partition table\n"); -+ vfree(buf); - return -EIO; - } - offset -= master->erasesize; - } - } else { - offset = directory * master->erasesize; -- while (master->block_isbad && -+ while (master->block_isbad && - master->block_isbad(master, offset)) { - offset += master->erasesize; - if (offset == master->size) - goto nogood; - } - } -- buf = vmalloc(master->erasesize); -- -- if (!buf) -- return -ENOMEM; -- - printk(KERN_NOTICE "Searching for RedBoot partition table in %s at offset 0x%lx\n", - master->name, offset); - -@@ -156,6 +157,11 @@ static int parse_redboot_partitions(stru - } - if (i == numslots) { - /* Didn't find it */ -+ if (offset + master->erasesize < master->size) { -+ /* not at the end of the flash yet, maybe next block :) */ -+ directory++; -+ goto restart; -+ } - printk(KERN_NOTICE "No RedBoot partition table detected in %s\n", - master->name); - ret = 0; diff --git a/target/linux/atheros/patches-2.6.31/141-redboot_various_erase_size_fix.patch b/target/linux/atheros/patches-2.6.31/141-redboot_various_erase_size_fix.patch deleted file mode 100644 index b9cb0b4bc..000000000 --- a/target/linux/atheros/patches-2.6.31/141-redboot_various_erase_size_fix.patch +++ /dev/null @@ -1,72 +0,0 @@ ---- a/drivers/mtd/redboot.c -+++ b/drivers/mtd/redboot.c -@@ -39,6 +39,22 @@ static inline int redboot_checksum(struc - return 1; - } - -+static uint32_t mtd_get_offset_erasesize(struct mtd_info *mtd, uint64_t offset) -+{ -+ struct mtd_erase_region_info *regions = mtd->eraseregions; -+ int i; -+ -+ for (i = 0; i < mtd->numeraseregions; i++) { -+ if (regions[i].offset + -+ regions[i].numblocks * regions[i].erasesize <= offset) -+ continue; -+ -+ return regions[i].erasesize; -+ } -+ -+ return mtd->erasesize; -+} -+ - static int parse_redboot_partitions(struct mtd_info *master, - struct mtd_partition **pparts, - unsigned long fis_origin) -@@ -55,6 +71,7 @@ static int parse_redboot_partitions(stru - int namelen = 0; - int nulllen = 0; - int numslots; -+ int first_slot; - unsigned long offset; - #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED - static char nullstring[] = "unallocated"; -@@ -168,7 +185,10 @@ static int parse_redboot_partitions(stru - goto out; - } - -- for (i = 0; i < numslots; i++) { -+ first_slot = (buf[i].flash_base & (master->erasesize - 1)) / -+ sizeof(struct fis_image_desc); -+ -+ for (i = first_slot; i < first_slot + numslots; i++) { - struct fis_list *new_fl, **prev; - - if (buf[i].name[0] == 0xff) { -@@ -244,12 +264,13 @@ static int parse_redboot_partitions(stru - } - #endif - for ( ; iimg->size; - parts[i].offset = fl->img->flash_base; - parts[i].name = names; - -+ if (max_offset < parts[i].offset + parts[i].size) -+ max_offset = parts[i].offset + parts[i].size; -+ - strcpy(names, fl->img->name); - #ifdef CONFIG_MTD_REDBOOT_PARTS_READONLY - if (!memcmp(names, "RedBoot", 8) || -@@ -279,7 +300,9 @@ static int parse_redboot_partitions(stru - fl = fl->next; - kfree(tmp_fl); - } -- if(master->size - max_offset >= master->erasesize) -+ -+ if (master->size - max_offset >= -+ mtd_get_offset_erasesize(master, max_offset)) - { - parts[nrparts].size = master->size - max_offset; - parts[nrparts].offset = max_offset; diff --git a/target/linux/atheros/patches-2.6.31/200-ar2313_enable_mvswitch.patch b/target/linux/atheros/patches-2.6.31/200-ar2313_enable_mvswitch.patch deleted file mode 100644 index b97a62d81..000000000 --- a/target/linux/atheros/patches-2.6.31/200-ar2313_enable_mvswitch.patch +++ /dev/null @@ -1,70 +0,0 @@ ---- a/drivers/net/ar231x.c -+++ b/drivers/net/ar231x.c -@@ -735,6 +735,7 @@ static void ar231x_load_rx_ring(struct n - for (i = 0; i < nr_bufs; i++) { - struct sk_buff *skb; - ar231x_descr_t *rd; -+ int offset = RX_OFFSET; - - if (sp->rx_skb[idx]) - break; -@@ -750,7 +751,9 @@ static void ar231x_load_rx_ring(struct n - * Make sure IP header starts on a fresh cache line. - */ - skb->dev = dev; -- skb_reserve(skb, RX_OFFSET); -+ if (sp->phy_dev) -+ offset += sp->phy_dev->pkt_align; -+ skb_reserve(skb, offset); - sp->rx_skb[idx] = skb; - - rd = (ar231x_descr_t *) & sp->rx_ring[idx]; -@@ -824,20 +827,23 @@ static int ar231x_rx_int(struct net_devi - /* alloc new buffer. */ - skb_new = netdev_alloc_skb(dev, AR2313_BUFSIZE + RX_OFFSET); - if (skb_new != NULL) { -+ int offset; - - skb = sp->rx_skb[idx]; - /* set skb */ - skb_put(skb, - ((status >> DMA_RX_LEN_SHIFT) & 0x3fff) - CRC_LEN); -- - dev->stats.rx_bytes += skb->len; -- skb->protocol = eth_type_trans(skb, dev); -- /* pass the packet to upper layers */ -- netif_rx(skb); - -+ /* pass the packet to upper layers */ -+ sp->rx(skb); - skb_new->dev = dev; -+ - /* 16 bit align */ -- skb_reserve(skb_new, RX_OFFSET); -+ offset = RX_OFFSET; -+ if (sp->phy_dev) -+ offset += sp->phy_dev->pkt_align; -+ skb_reserve(skb_new, offset); - /* reset descriptor's curr_addr */ - rxdesc->addr = virt_to_phys(skb_new->data); - -@@ -1239,6 +1245,8 @@ static int ar231x_mdiobus_probe (struct - return PTR_ERR(phydev); - } - -+ sp->rx = phydev->netif_rx; -+ - /* mask with MAC supported features */ - phydev->supported &= (SUPPORTED_10baseT_Half - | SUPPORTED_10baseT_Full ---- a/drivers/net/ar231x.h -+++ b/drivers/net/ar231x.h -@@ -221,6 +221,8 @@ typedef struct { - */ - struct ar231x_private { - struct net_device *dev; -+ int (*rx)(struct sk_buff *skb); -+ - int version; - u32 mb[2]; - diff --git a/target/linux/atheros/patches-2.6.31/210-reset_button.patch b/target/linux/atheros/patches-2.6.31/210-reset_button.patch deleted file mode 100644 index 3c9181814..000000000 --- a/target/linux/atheros/patches-2.6.31/210-reset_button.patch +++ /dev/null @@ -1,174 +0,0 @@ ---- a/arch/mips/ar231x/Makefile -+++ b/arch/mips/ar231x/Makefile -@@ -8,7 +8,7 @@ - # Copyright (C) 2006-2009 Felix Fietkau - # - --obj-y += board.o prom.o devices.o -+obj-y += board.o prom.o devices.o reset.o - - obj-$(CONFIG_EARLY_PRINTK) += early_printk.o - ---- /dev/null -+++ b/arch/mips/ar231x/reset.c -@@ -0,0 +1,160 @@ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include "devices.h" -+ -+#define AR531X_RESET_GPIO_IRQ (AR531X_GPIO_IRQ(ar231x_board.config->resetConfigGpio)) -+ -+struct event_t { -+ struct work_struct wq; -+ int set; -+ unsigned long jiffies; -+}; -+ -+static struct timer_list rst_button_timer; -+static unsigned long seen; -+ -+extern struct sock *uevent_sock; -+extern u64 uevent_next_seqnum(void); -+ -+static int no_release_workaround = 1; -+module_param(no_release_workaround, int, 0); -+ -+static inline void -+add_msg(struct sk_buff *skb, char *msg) -+{ -+ char *scratch; -+ scratch = skb_put(skb, strlen(msg) + 1); -+ sprintf(scratch, msg); -+} -+ -+static void -+hotplug_button(struct work_struct *wq) -+{ -+ struct sk_buff *skb; -+ struct event_t *event; -+ size_t len; -+ char *scratch, *s; -+ char buf[128]; -+ -+ event = container_of(wq, struct event_t, wq); -+ if (!uevent_sock) -+ goto done; -+ -+ /* allocate message with the maximum possible size */ -+ s = event->set ? "pressed" : "released"; -+ len = strlen(s) + 2; -+ skb = alloc_skb(NLMSG_GOODSIZE, GFP_KERNEL); -+ if (!skb) -+ goto done; -+ -+ /* add header */ -+ scratch = skb_put(skb, len); -+ sprintf(scratch, "%s@",s); -+ -+ /* copy keys to our continuous event payload buffer */ -+ add_msg(skb, "HOME=/"); -+ add_msg(skb, "PATH=/sbin:/bin:/usr/sbin:/usr/bin"); -+ add_msg(skb, "SUBSYSTEM=button"); -+ add_msg(skb, "BUTTON=reset"); -+ add_msg(skb, (event->set ? "ACTION=pressed" : "ACTION=released")); -+ sprintf(buf, "SEEN=%ld", (event->jiffies - seen)/HZ); -+ add_msg(skb, buf); -+ snprintf(buf, 128, "SEQNUM=%llu", uevent_next_seqnum()); -+ add_msg(skb, buf); -+ -+ NETLINK_CB(skb).dst_group = 1; -+ netlink_broadcast(uevent_sock, skb, 0, 1, GFP_KERNEL); -+ -+done: -+ kfree(event); -+} -+ -+static void -+reset_button_poll(unsigned long unused) -+{ -+ struct event_t *event; -+ int gpio = ~0; -+ -+ if(!no_release_workaround) -+ return; -+ -+ gpio = ar231x_gpiodev->get(); -+ gpio &= (1 << (AR531X_RESET_GPIO_IRQ - AR531X_GPIO_IRQ_BASE)); -+ if(gpio) { -+ rst_button_timer.expires = jiffies + (HZ / 4); -+ add_timer(&rst_button_timer); -+ return; -+ } -+ -+ event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC); -+ if (!event) -+ return; -+ -+ event->set = 0; -+ event->jiffies = jiffies; -+ INIT_WORK(&event->wq, hotplug_button); -+ schedule_work(&event->wq); -+} -+ -+static irqreturn_t -+button_handler(int irq, void *dev_id) -+{ -+ static int pressed = 0; -+ struct event_t *event; -+ u32 gpio = ~0; -+ -+ event = (struct event_t *) kzalloc(sizeof(struct event_t), GFP_ATOMIC); -+ if (!event) -+ return IRQ_NONE; -+ -+ pressed = !pressed; -+ -+ gpio = ar231x_gpiodev->get() & (1 << (irq - AR531X_GPIO_IRQ_BASE)); -+ -+ event->set = gpio; -+ if(!event->set) -+ no_release_workaround = 0; -+ -+ event->jiffies = jiffies; -+ -+ INIT_WORK(&event->wq, hotplug_button); -+ schedule_work(&event->wq); -+ -+ seen = jiffies; -+ if(event->set && no_release_workaround) -+ mod_timer(&rst_button_timer, jiffies + (HZ / 4)); -+ -+ return IRQ_HANDLED; -+} -+ -+ -+static int __init -+ar231x_init_reset(void) -+{ -+ seen = jiffies; -+ -+ if (ar231x_board.config->resetConfigGpio == 0xffff) -+ return -ENODEV; -+ -+ init_timer(&rst_button_timer); -+ rst_button_timer.function = reset_button_poll; -+ rst_button_timer.expires = jiffies + HZ / 50; -+ add_timer(&rst_button_timer); -+ -+ request_irq(AR531X_RESET_GPIO_IRQ, &button_handler, IRQF_SAMPLE_RANDOM, "ar231x_reset", NULL); -+ -+ return 0; -+} -+ -+module_init(ar231x_init_reset); diff --git a/target/linux/atheros/patches-2.6.31/220-enet_micrel_workaround.patch b/target/linux/atheros/patches-2.6.31/220-enet_micrel_workaround.patch deleted file mode 100644 index dc7d63d27..000000000 --- a/target/linux/atheros/patches-2.6.31/220-enet_micrel_workaround.patch +++ /dev/null @@ -1,69 +0,0 @@ ---- a/drivers/net/ar231x.c -+++ b/drivers/net/ar231x.c -@@ -148,6 +148,7 @@ static int ar231x_mdiobus_write(struct m - static int ar231x_mdiobus_reset(struct mii_bus *bus); - static int ar231x_mdiobus_probe (struct net_device *dev); - static void ar231x_adjust_link(struct net_device *dev); -+static bool no_phy = false; - - #ifndef ERR - #define ERR(fmt, args...) printk("%s: " fmt, __func__, ##args) -@@ -278,6 +279,21 @@ int __init ar231x_probe(struct platform_ - - mdiobus_register(sp->mii_bus); - -+ /* Workaround for Micrel switch, which is only available on -+ * one PHY and cannot be configured through MDIO */ -+ if (!no_phy) { -+ u32 phy_id = 0; -+ get_phy_id(sp->mii_bus, 1, &phy_id); -+ if (phy_id == 0x00221450) -+ no_phy = true; -+ } -+ if (no_phy) { -+ sp->link = 1; -+ netif_carrier_on(dev); -+ return 0; -+ } -+ no_phy = true; -+ - if (ar231x_mdiobus_probe(dev) != 0) { - printk(KERN_ERR "%s: mdiobus_probe failed\n", dev->name); - rx_tasklet_cleanup(dev); -@@ -334,8 +350,10 @@ static int __exit ar231x_remove(struct p - rx_tasklet_cleanup(dev); - ar231x_init_cleanup(dev); - unregister_netdev(dev); -- mdiobus_unregister(sp->mii_bus); -- mdiobus_free(sp->mii_bus); -+ if (sp->mii_bus) { -+ mdiobus_unregister(sp->mii_bus); -+ mdiobus_free(sp->mii_bus); -+ } - kfree(dev); - return 0; - } -@@ -836,7 +854,12 @@ static int ar231x_rx_int(struct net_devi - dev->stats.rx_bytes += skb->len; - - /* pass the packet to upper layers */ -- sp->rx(skb); -+ if (sp->rx) { -+ sp->rx(skb); -+ } else { -+ skb->protocol = eth_type_trans(skb, skb->dev); -+ netif_rx(skb); -+ } - skb_new->dev = dev; - - /* 16 bit align */ -@@ -1123,6 +1146,9 @@ static int ar231x_ioctl(struct net_devic - struct ar231x_private *sp = netdev_priv(dev); - int ret; - -+ if (!sp->phy_dev) -+ return -ENODEV; -+ - switch (cmd) { - - case SIOCETHTOOL: diff --git a/target/linux/au1000/Makefile b/target/linux/au1000/Makefile index 295030745..f9011b227 100644 --- a/target/linux/au1000/Makefile +++ b/target/linux/au1000/Makefile @@ -12,7 +12,7 @@ BOARDNAME:=RMI/AMD AU1x00 FEATURES:=jffs2 usb pci SUBTARGETS=au1500 au1550 -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk DEFAULT_PACKAGES += wpad-mini yamonenv diff --git a/target/linux/au1000/au1500/config-2.6.30 b/target/linux/au1000/au1500/config-2.6.30 deleted file mode 100644 index 92ab1568f..000000000 --- a/target/linux/au1000/au1500/config-2.6.30 +++ /dev/null @@ -1,187 +0,0 @@ -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_64BIT_PHYS_ADDR=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_POPULATES_NODE_MAP=y -CONFIG_ARCH_REQUIRE_GPIOLIB=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# CONFIG_BCM47XX is not set -# CONFIG_BINARY_PRINTF is not set -CONFIG_BITREVERSE=y -# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set -# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set -CONFIG_CEVT_R4K_LIB=y -CONFIG_CMDLINE="root=/dev/mtdblock0 rootfstype=squashfs,jffs2" -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_CAVIUM_OCTEON is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_LITTLE_ENDIAN=y -# CONFIG_CPU_LOONGSON2 is not set -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5500 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -CONFIG_CRAMFS=m -CONFIG_CRC16=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CSRC_R4K_LIB=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DEVPORT=y -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DUMMY=m -CONFIG_ELF_CORE=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_GPIOLIB=y -# CONFIG_HAMRADIO is not set -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_HAVE_IDE=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -# CONFIG_HZ_100 is not set -CONFIG_HZ=250 -CONFIG_HZ_250=y -CONFIG_I2C_ALGOBIT=m -CONFIG_I2C_ALGOPCA=m -CONFIG_I2C_ALGOPCF=m -CONFIG_I2C_BOARDINFO=y -CONFIG_I2C_CHARDEV=m -CONFIG_I2C=m -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQ_CPU=y -CONFIG_KEXEC=y -CONFIG_LEDS_GPIO=y -# CONFIG_LEMOTE_FULONG is not set -CONFIG_MACH_ALCHEMY=y -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MACH_VR41XX is not set -CONFIG_MAGIC_SYSRQ=y -# CONFIG_MIKROTIK_RB532 is not set -CONFIG_MIPS_AU1X00_ENET=y -# CONFIG_MIPS_BOSPORUS is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MIPS_DB1000 is not set -# CONFIG_MIPS_DB1100 is not set -# CONFIG_MIPS_DB1200 is not set -# CONFIG_MIPS_DB1500 is not set -# CONFIG_MIPS_DB1550 is not set -# CONFIG_MIPS_FPU_EMU is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_MACHINE is not set -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_MIRAGE is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -CONFIG_MIPS_MTX1=y -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1100 is not set -# CONFIG_MIPS_PB1200 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_MIPS_PB1550 is not set -# CONFIG_MIPS_SIM is not set -# CONFIG_MIPS_XXS1500 is not set -CONFIG_MIPS=y -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MTD_ALCHEMY is not set -# CONFIG_MTD_CFI_INTELEXT is not set -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PHYSMAP=y -# CONFIG_NO_IOPORT is not set -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCSPKR_PLATFORM=y -CONFIG_PHYLIB=y -# CONFIG_PMC_MSP is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -# CONFIG_PROBE_INITRD_HEADER is not set -CONFIG_SCHED_OMIT_FRAME_POINTER=y -# CONFIG_SCSI_DMA is not set -CONFIG_SERIAL_8250_AU1X00=y -# CONFIG_SERIAL_8250_EXTENDED is not set -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_PCI=m -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SLOW_WORK is not set -CONFIG_SOC_AU1500=y -CONFIG_SOC_AU1X00=y -CONFIG_SOFT_WATCHDOG=m -# CONFIG_STANDALONE is not set -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -# CONFIG_TC35815 is not set -CONFIG_TRACING_SUPPORT=y -CONFIG_TRAD_SIGNALS=y -CONFIG_USB_SUPPORT=y -CONFIG_WDT_MTX1=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/au1000/au1550/config-2.6.30 b/target/linux/au1000/au1550/config-2.6.30 deleted file mode 100644 index 96e819065..000000000 --- a/target/linux/au1000/au1550/config-2.6.30 +++ /dev/null @@ -1,277 +0,0 @@ -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_64BIT_PHYS_ADDR=y -# CONFIG_8139TOO is not set -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_POPULATES_NODE_MAP=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ATMEL=m -# CONFIG_BCM47XX is not set -CONFIG_BITREVERSE=y -CONFIG_CEVT_R4K=y -# CONFIG_CFG80211 is not set -CONFIG_CLASSIC_RCU=y -CONFIG_CMDLINE="root=/dev/mtdblock0 rootfstype=squashfs,jffs2" -# CONFIG_CPU_BIG_ENDIAN is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_LITTLE_ENDIAN=y -# CONFIG_CPU_LOONGSON2 is not set -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -CONFIG_CRAMFS=m -CONFIG_CRC16=y -CONFIG_CRC_CCITT=m -CONFIG_CRYPTO_CBC=m -CONFIG_CRYPTO_DEFLATE=m -CONFIG_CRYPTO_GF128MUL=m -CONFIG_CRYPTO_HASH=m -CONFIG_CRYPTO_HMAC=m -CONFIG_CRYPTO_MICHAEL_MIC=m -CONFIG_CSRC_R4K=y -CONFIG_DEVPORT=y -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DUMMY=m -CONFIG_ELF_CORE=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -# CONFIG_GENERIC_FIND_FIRST_BIT is not set -CONFIG_GENERIC_FIND_NEXT_BIT=y -# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set -# CONFIG_HAMRADIO is not set -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_HAVE_ARCH_TRACEHOOK is not set -# CONFIG_HAVE_CLK is not set -# CONFIG_HAVE_DMA_ATTRS is not set -# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_HAVE_IDE=y -# CONFIG_HAVE_IOREMAP_PROT is not set -# CONFIG_HAVE_KPROBES is not set -# CONFIG_HAVE_KRETPROBES is not set -CONFIG_HAVE_OPROFILE=y -CONFIG_HOSTAP_CS=m -CONFIG_HOSTAP=m -CONFIG_HOSTAP_PCI=m -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -# CONFIG_HZ_100 is not set -CONFIG_HZ=250 -CONFIG_HZ_250=y -# CONFIG_IDE is not set -CONFIG_IEEE80211_CRYPT_CCMP=m -CONFIG_IEEE80211_CRYPT_TKIP=m -CONFIG_IEEE80211_CRYPT_WEP=m -CONFIG_IEEE80211=m -CONFIG_IFB=m -CONFIG_INET_DIAG=m -CONFIG_INET_TCP_DIAG=m -CONFIG_INITRAMFS_ROOT_GID=1000 -CONFIG_INITRAMFS_ROOT_UID=1000 -CONFIG_INITRAMFS_SOURCE="/home/philippe/linux/openwrt/trunk/build_dir/target-mipsel_uClibc-0.9.29/root-au1000 /home/philippe/linux/openwrt/trunk/target/linux/generic-2.6/image/initramfs-base-files.txt" -CONFIG_IP_NF_FILTER=m -CONFIG_IP_NF_IPTABLES=m -CONFIG_IP_NF_MANGLE=m -CONFIG_IP_NF_TARGET_LOG=m -CONFIG_IP_NF_TARGET_MASQUERADE=m -CONFIG_IP_NF_TARGET_REJECT=m -CONFIG_IRQ_CPU=y -CONFIG_KEXEC=y -CONFIG_KMOD=y -# CONFIG_LEDS_TRIGGERS is not set -# CONFIG_LEMOTE_FULONG is not set -CONFIG_LIBCRC32C=m -CONFIG_LLC2=m -# CONFIG_MAC80211 is not set -CONFIG_MACH_ALCHEMY=y -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MACH_VR41XX is not set -CONFIG_MAGIC_SYSRQ=y -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_TMIO is not set -# CONFIG_MIKROTIK_RB532 is not set -CONFIG_MIPS_AU1X00_ENET=y -# CONFIG_MIPS_BOSPORUS is not set -# CONFIG_MIPS_COBALT is not set -# CONFIG_MIPS_DB1000 is not set -# CONFIG_MIPS_DB1100 is not set -# CONFIG_MIPS_DB1200 is not set -# CONFIG_MIPS_DB1500 is not set -CONFIG_MIPS_DB1550=y -CONFIG_MIPS_DISABLE_OBSOLETE_IDE=y -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_MIRAGE is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_MTX1 is not set -# CONFIG_MIPS_PB1000 is not set -# CONFIG_MIPS_PB1100 is not set -# CONFIG_MIPS_PB1200 is not set -# CONFIG_MIPS_PB1500 is not set -# CONFIG_MIPS_PB1550 is not set -# CONFIG_MIPS_SIM is not set -# CONFIG_MIPS_XXS1500 is not set -CONFIG_MIPS=y -CONFIG_MODULE_FORCE_UNLOAD=y -# CONFIG_MTD_ALCHEMY is not set -# CONFIG_MTD_CFI_INTELEXT is not set -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -CONFIG_MTD_PHYSMAP_LEN=0 -CONFIG_MTD_PHYSMAP_START=0x8000000 -CONFIG_MTD_PHYSMAP=y -CONFIG_NET_ACT_GACT=m -CONFIG_NET_ACT_IPT=m -CONFIG_NET_ACT_MIRRED=m -CONFIG_NET_ACT_PEDIT=m -CONFIG_NET_CLS_BASIC=m -CONFIG_NET_CLS_FLOW=m -CONFIG_NET_CLS_FW=m -CONFIG_NET_CLS_ROUTE4=m -CONFIG_NET_CLS_RSVP6=m -CONFIG_NET_CLS_RSVP=m -CONFIG_NET_CLS_TCINDEX=m -CONFIG_NET_CLS_U32=m -CONFIG_NETFILTER_XTABLES=m -CONFIG_NETFILTER_XT_MATCH_COMMENT=m -CONFIG_NETFILTER_XT_MATCH_CONNLIMIT=m -CONFIG_NETFILTER_XT_MATCH_DCCP=m -CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m -CONFIG_NETFILTER_XT_MATCH_IPRANGE=m -CONFIG_NETFILTER_XT_MATCH_LIMIT=m -CONFIG_NETFILTER_XT_MATCH_MAC=m -CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m -CONFIG_NETFILTER_XT_MATCH_OWNER=m -CONFIG_NETFILTER_XT_MATCH_RATEEST=m -CONFIG_NETFILTER_XT_MATCH_REALM=m -CONFIG_NETFILTER_XT_MATCH_SCTP=m -CONFIG_NETFILTER_XT_MATCH_STATE=m -CONFIG_NETFILTER_XT_MATCH_U32=m -CONFIG_NETFILTER_XT_TARGET_NFLOG=m -CONFIG_NETFILTER_XT_TARGET_NFQUEUE=m -CONFIG_NETFILTER_XT_TARGET_RATEEST=m -CONFIG_NETFILTER_XT_TARGET_TCPMSS=m -CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP=m -CONFIG_NET_SCH_CBQ=m -CONFIG_NF_CONNTRACK_FTP=m -CONFIG_NF_CONNTRACK_IPV4=m -CONFIG_NF_CONNTRACK_IRC=m -CONFIG_NF_CONNTRACK=m -CONFIG_NF_CONNTRACK_TFTP=m -CONFIG_NF_NAT_FTP=m -CONFIG_NF_NAT_IRC=m -CONFIG_NF_NAT=m -CONFIG_NF_NAT_TFTP=m -# CONFIG_NO_IOPORT is not set -CONFIG_PAGEFLAGS_EXTENDED=y -# CONFIG_PAGE_SIZE_16KB is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_64KB is not set -# CONFIG_PAGE_SIZE_8KB is not set -CONFIG_PCCARD=m -CONFIG_PCCARD_NONSTATIC=m -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCMCIA_AU1X00=m -CONFIG_PCMCIA_IOCTL=y -CONFIG_PCMCIA_LOAD_CIS=y -CONFIG_PCMCIA=m -CONFIG_PCSPKR_PLATFORM=y -CONFIG_PHYLIB=y -# CONFIG_PMC_MSP is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -CONFIG_PPP_ASYNC=m -CONFIG_PPP_BSDCOMP=m -CONFIG_PPP_DEFLATE=m -CONFIG_PPP=m -CONFIG_PPPOE=m -CONFIG_PPPOL2TP=m -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -# CONFIG_PROBE_INITRD_HEADER is not set -# CONFIG_R6040 is not set -CONFIG_RESOURCES_64BIT=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -# CONFIG_SCSI_DMA is not set -CONFIG_SERIAL_8250_AU1X00=y -# CONFIG_SERIAL_8250_EXTENDED is not set -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_PCI=m -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -CONFIG_SLHC=m -CONFIG_SOC_AU1550=y -CONFIG_SOC_AU1X00=y -# CONFIG_STANDALONE is not set -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_APM_EMULATION=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -# CONFIG_TC35815 is not set -CONFIG_TCP_CONG_BIC=m -CONFIG_TCP_CONG_CUBIC=m -CONFIG_TCP_CONG_HSTCP=m -CONFIG_TCP_CONG_HTCP=m -CONFIG_TCP_CONG_HYBLA=m -CONFIG_TCP_CONG_ILLINOIS=m -CONFIG_TCP_CONG_LP=m -CONFIG_TCP_CONG_SCALABLE=m -CONFIG_TCP_CONG_VENO=m -CONFIG_TCP_CONG_WESTWOOD=m -CONFIG_TCP_CONG_YEAH=m -CONFIG_TRAD_SIGNALS=y -CONFIG_USB_SUPPORT=y -# CONFIG_VGASTATE is not set -# CONFIG_VIA_RHINE is not set -CONFIG_YENTA=m -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/au1000/patches-2.6.30/001-mtx1_cmdline.patch b/target/linux/au1000/patches-2.6.30/001-mtx1_cmdline.patch deleted file mode 100644 index a45832765..000000000 --- a/target/linux/au1000/patches-2.6.30/001-mtx1_cmdline.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/mips/alchemy/mtx-1/init.c -+++ b/arch/mips/alchemy/mtx-1/init.c -@@ -49,7 +49,7 @@ void __init prom_init(void) - prom_argv = (char **)fw_arg1; - prom_envp = (char **)fw_arg2; - -- prom_init_cmdline(); -+ strcpy(arcs_cmdline, CONFIG_CMDLINE); - - memsize_str = prom_getenv("memsize"); - if (!memsize_str) diff --git a/target/linux/au1000/patches-2.6.30/002-openwrt_rootfs.patch b/target/linux/au1000/patches-2.6.30/002-openwrt_rootfs.patch deleted file mode 100644 index e1056e93d..000000000 --- a/target/linux/au1000/patches-2.6.30/002-openwrt_rootfs.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/mips/alchemy/mtx-1/platform.c -+++ b/arch/mips/alchemy/mtx-1/platform.c -@@ -90,7 +90,7 @@ static struct platform_device mtx1_gpio_ - - static struct mtd_partition mtx1_mtd_partitions[] = { - { -- .name = "filesystem", -+ .name = "rootfs", - .size = 0x01C00000, - .offset = 0, - }, diff --git a/target/linux/au1000/patches-2.6.30/003-au1000_eth_ioctl.patch b/target/linux/au1000/patches-2.6.30/003-au1000_eth_ioctl.patch deleted file mode 100644 index 9bda9a3fe..000000000 --- a/target/linux/au1000/patches-2.6.30/003-au1000_eth_ioctl.patch +++ /dev/null @@ -1,17 +0,0 @@ ---- a/drivers/net/au1000_eth.c -+++ b/drivers/net/au1000_eth.c -@@ -1036,10 +1036,14 @@ static void au1000_multicast_list(struct - } - } - -+#define AU1000_KNOWN_PHY_IOCTLS (SIOCGMIIPHY & 0xfff0) - static int au1000_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) - { - struct au1000_private *aup = netdev_priv(dev); - -+ if((cmd & AU1000_KNOWN_PHY_IOCTLS) != AU1000_KNOWN_PHY_IOCTLS) -+ return -EINVAL; -+ - if (!netif_running(dev)) return -EINVAL; - - if (!aup->phy_dev) return -EINVAL; // PHY not controllable diff --git a/target/linux/au1000/patches-2.6.30/004-state_led_phy_fix.patch b/target/linux/au1000/patches-2.6.30/004-state_led_phy_fix.patch deleted file mode 100644 index cfaea00e2..000000000 --- a/target/linux/au1000/patches-2.6.30/004-state_led_phy_fix.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- a/drivers/net/au1000_eth.c -+++ b/drivers/net/au1000_eth.c -@@ -166,6 +166,15 @@ struct au1000_private *au_macs[NUM_ETH_I - # undef AU1XXX_PHY1_IRQ - #endif - -+#if defined(CONFIG_MIPS_MTX1) -+/* -+ * 4G MeshCube (MTX-1) board -+ * PHY is at address 31 on MAC0 -+ * autodetect fails if not searched for highest address ! -+ */ -+# define AU1XXX_PHY_SEARCH_HIGHEST_ADDR -+#endif -+ - #if defined(AU1XXX_PHY0_BUSID) && (AU1XXX_PHY0_BUSID > 0) - # error MAC0-associated PHY attached 2nd MACs MII bus not supported yet - #endif -@@ -483,6 +492,12 @@ static int mii_probe (struct net_device - aup->old_duplex = -1; - aup->phy_dev = phydev; - -+#ifdef CONFIG_MIPS_MTX1 -+ /* set up ethernet jack LEDs on the 4G MeshCube (MTX-1 board) */ -+ printk(KERN_INFO "MTX-1 PHY: updating LED settings\n"); -+ phy_write(phydev, 0x11, 0xff80); -+#endif -+ - printk(KERN_INFO "%s: attached PHY driver [%s] " - "(mii_bus:phy_addr=%s, irq=%d)\n", dev->name, - phydev->drv->name, dev_name(&phydev->dev), phydev->irq); diff --git a/target/linux/au1000/patches-2.6.30/006-missing_string_header.patch b/target/linux/au1000/patches-2.6.30/006-missing_string_header.patch deleted file mode 100644 index 8aba20252..000000000 --- a/target/linux/au1000/patches-2.6.30/006-missing_string_header.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/mips/alchemy/mtx-1/init.c -+++ b/arch/mips/alchemy/mtx-1/init.c -@@ -32,6 +32,7 @@ - #include - - #include -+#include - - #include - diff --git a/target/linux/au1000/patches-2.6.30/007-gpio_request_button.patch b/target/linux/au1000/patches-2.6.30/007-gpio_request_button.patch deleted file mode 100644 index c0c6a22cf..000000000 --- a/target/linux/au1000/patches-2.6.30/007-gpio_request_button.patch +++ /dev/null @@ -1,30 +0,0 @@ ---- a/arch/mips/alchemy/mtx-1/platform.c -+++ b/arch/mips/alchemy/mtx-1/platform.c -@@ -1,7 +1,7 @@ - /* - * MTX-1 platform devices registration - * -- * Copyright (C) 2007, Florian Fainelli -+ * Copyright (C) 2007-2009, Florian Fainelli - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by -@@ -142,7 +142,17 @@ static struct __initdata platform_device - - static int __init mtx1_register_devices(void) - { -- gpio_direction_input(207); -+ int rc; -+ -+ rc = gpio_request(mtx1_gpio_button[0].gpio, -+ mtx1_gpio_button[0].desc); -+ if (rc < 0) { -+ printk(KERN_INFO "mtx1: failed to request %d\n", -+ mtx1_gpio_button[0].gpio); -+ goto out; -+ } -+ gpio_direction_input(mtx1_gpio_button[0].gpio); -+out: - return platform_add_devices(mtx1_devs, ARRAY_SIZE(mtx1_devs)); - } - diff --git a/target/linux/au1000/patches-2.6.32/001-mtx1_cmdline.patch b/target/linux/au1000/patches-2.6.32/001-mtx1_cmdline.patch index bbaa88232..d00cbc73b 100644 --- a/target/linux/au1000/patches-2.6.32/001-mtx1_cmdline.patch +++ b/target/linux/au1000/patches-2.6.32/001-mtx1_cmdline.patch @@ -8,7 +8,7 @@ #include -@@ -49,7 +49,7 @@ void __init prom_init(void) +@@ -49,7 +50,7 @@ void __init prom_init(void) prom_argv = (char **)fw_arg1; prom_envp = (char **)fw_arg2; @@ -17,4 +17,3 @@ memsize_str = prom_getenv("memsize"); if (!memsize_str) - diff --git a/target/linux/au1000/patches-2.6.32/003-au1000_eth_ioctl.patch b/target/linux/au1000/patches-2.6.32/003-au1000_eth_ioctl.patch index 9bda9a3fe..266502976 100644 --- a/target/linux/au1000/patches-2.6.32/003-au1000_eth_ioctl.patch +++ b/target/linux/au1000/patches-2.6.32/003-au1000_eth_ioctl.patch @@ -1,6 +1,6 @@ --- a/drivers/net/au1000_eth.c +++ b/drivers/net/au1000_eth.c -@@ -1036,10 +1036,14 @@ static void au1000_multicast_list(struct +@@ -1035,10 +1035,14 @@ static void au1000_multicast_list(struct } } diff --git a/target/linux/au1000/patches-2.6.32/004-state_led_phy_fix.patch b/target/linux/au1000/patches-2.6.32/004-state_led_phy_fix.patch index cfaea00e2..66b511b40 100644 --- a/target/linux/au1000/patches-2.6.32/004-state_led_phy_fix.patch +++ b/target/linux/au1000/patches-2.6.32/004-state_led_phy_fix.patch @@ -1,6 +1,6 @@ --- a/drivers/net/au1000_eth.c +++ b/drivers/net/au1000_eth.c -@@ -166,6 +166,15 @@ struct au1000_private *au_macs[NUM_ETH_I +@@ -167,6 +167,15 @@ struct au1000_private *au_macs[NUM_ETH_I # undef AU1XXX_PHY1_IRQ #endif @@ -16,7 +16,7 @@ #if defined(AU1XXX_PHY0_BUSID) && (AU1XXX_PHY0_BUSID > 0) # error MAC0-associated PHY attached 2nd MACs MII bus not supported yet #endif -@@ -483,6 +492,12 @@ static int mii_probe (struct net_device +@@ -484,6 +493,12 @@ static int mii_probe (struct net_device aup->old_duplex = -1; aup->phy_dev = phydev; diff --git a/target/linux/avr32/Makefile b/target/linux/avr32/Makefile index d3d0baafb..bfec9653f 100644 --- a/target/linux/avr32/Makefile +++ b/target/linux/avr32/Makefile @@ -10,7 +10,7 @@ ARCH:=avr32 BOARD:=avr32 BOARDNAME:=Atmel AVR32 FEATURES:=squashfs -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/brcm-2.4/image/Makefile b/target/linux/brcm-2.4/image/Makefile index 3dad1cee7..148c47f0c 100644 --- a/target/linux/brcm-2.4/image/Makefile +++ b/target/linux/brcm-2.4/image/Makefile @@ -32,7 +32,13 @@ ifneq ($(KERNEL),2.4) endif define Image/Build/CyberTAN - $(STAGING_DIR_HOST)/bin/addpattern -4 -p $(3) -v v$(4) -i $(BIN_DIR)/openwrt-$(BOARD)-$(1).trx -o $(BIN_DIR)/openwrt-$(2)-$(5).bin + $(STAGING_DIR_HOST)/bin/addpattern -4 -p $(3) -v v$(4) -i $(BIN_DIR)/openwrt-$(BOARD)-$(1).trx -o $(BIN_DIR)/openwrt-$(2)-$(5).bin $(if $(6),-s $(6)) +endef +define Image/Build/CyberTAN2 + $(STAGING_DIR_HOST)/bin/addpattern -4 -p $(3) -v v$(4) -i $(BIN_DIR)/openwrt-$(BOARD)-$(1).trx2 -o $(BIN_DIR)/openwrt-$(2)-$(5).bin $(if $(6),-s $(6)) +endef +define Image/Build/CyberTANHead + $(STAGING_DIR_HOST)/bin/addpattern -5 -p $(3) -v v$(4) -i /dev/null -o $(KDIR)/openwrt-$(2)-header.bin $(if $(6),-s $(6)) endef define Image/Build/Motorola @@ -50,13 +56,21 @@ define trxalign/jffs2-64k -a 0x10000 -f $(KDIR)/root.$(1) endef define trxalign/squashfs --a 1024 -f $(KDIR)/root.$(1) -a 0x10000 -A $(KDIR)/fs_mark +-a 1024 -f $(KDIR)/root.$(1) $(if $(2),-f $(2)) -a 0x10000 -A $(KDIR)/fs_mark endef +define Image/Build/trxV2 + $(call Image/Build/CyberTANHead,$(1),$(2),$(3),$(4),$(5),$(if $(6),$(6))) + $(STAGING_DIR_HOST)/bin/trx -2 -o $(BIN_DIR)/openwrt-$(BOARD)-$(1).trx2 \ + -f $(KDIR)/loader.gz -f $(KDIR)/vmlinux.lzma \ + $(call trxalign/$(1),$(1),$(KDIR)/openwrt-$(2)-header.bin) + $(call Image/Build/CyberTAN2,$(1),$(2),$(3),$(4),$(5),$(if $(6),$(6))) +endef define Image/Build/jffs2-128k $(call Image/Build/CyberTAN,$(1),wrt54gs,W54S,4.80.1,$(patsubst jffs2-%,jffs2,$(1))) $(call Image/Build/CyberTAN,$(1),wrtsl54gs,W54U,2.08.1,$(patsubst jffs2-%,jffs2,$(1))) + $(call Image/Build/trxV2,$(1),wrt54g3gv2-vf,3G2V,3.00.24,$(patsubst jffs2-%,jffs2,$(1)),6) ifeq ($(KERNEL),2.6) $(call Image/Build/wgt634u,$(1),$(patsubst jffs2-%,jffs2,$(1))) endif @@ -85,7 +99,9 @@ define Image/Build/Initramfs endef define Image/Build - $(STAGING_DIR_HOST)/bin/trx -o $(BIN_DIR)/openwrt-$(BOARD)-$(1).trx -f $(KDIR)/loader.gz -f $(KDIR)/vmlinux.lzma $(call trxalign/$(1),$(1)) + $(STAGING_DIR_HOST)/bin/trx -o $(BIN_DIR)/openwrt-$(BOARD)-$(1).trx \ + -f $(KDIR)/loader.gz -f $(KDIR)/vmlinux.lzma \ + $(call trxalign/$(1),$(1)) $(call Image/Build/$(1),$(1)) $(call Image/Build/Motorola,$(1),wr850g,1,$(1)) $(call Image/Build/USR,$(1),usr5461,$(1)) diff --git a/target/linux/brcm47xx/Makefile b/target/linux/brcm47xx/Makefile index 0d59b363e..f49392977 100644 --- a/target/linux/brcm47xx/Makefile +++ b/target/linux/brcm47xx/Makefile @@ -11,7 +11,7 @@ BOARD:=brcm47xx BOARDNAME:=Broadcom BCM947xx/953xx FEATURES:=squashfs usb pcmcia -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk DEFAULT_PACKAGES += wpad-mini kmod-switch kmod-diag nvram diff --git a/target/linux/brcm47xx/config-2.6.30 b/target/linux/brcm47xx/config-2.6.30 deleted file mode 100644 index 117cbb0aa..000000000 --- a/target/linux/brcm47xx/config-2.6.30 +++ /dev/null @@ -1,172 +0,0 @@ -CONFIG_32BIT=y -# CONFIG_64BIT is not set -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_POPULATES_NODE_MAP=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# CONFIG_ARPD is not set -CONFIG_B44_PCI_AUTOSELECT=y -CONFIG_B44_PCICORE_AUTOSELECT=y -CONFIG_B44_PCI=y -CONFIG_B44=y -CONFIG_BCM47XX_WDT=y -CONFIG_BCM47XX=y -# CONFIG_BINARY_PRINTF is not set -CONFIG_BITREVERSE=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set -# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set -CONFIG_CEVT_R4K_LIB=y -CONFIG_CEVT_R4K=y -CONFIG_CFE=y -CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200" -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_CAVIUM_OCTEON is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_LITTLE_ENDIAN=y -# CONFIG_CPU_LOONGSON2 is not set -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5500 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CSRC_R4K_LIB=y -CONFIG_CSRC_R4K=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DEVPORT=y -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -# CONFIG_HAMRADIO is not set -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_HAVE_IDE=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -# CONFIG_HZ_100 is not set -CONFIG_HZ=250 -CONFIG_HZ_250=y -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_IP_ROUTE_VERBOSE is not set -CONFIG_IRQ_CPU=y -CONFIG_KALLSYMS=y -CONFIG_LEDS_GPIO=y -# CONFIG_LEMOTE_FULONG is not set -# CONFIG_MACH_ALCHEMY is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_MIKROTIK_RB532 is not set -# CONFIG_MIPS_COBALT is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_MACHINE is not set -# CONFIG_MIPS_MALTA is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_SIM is not set -CONFIG_MIPS=y -CONFIG_MTD_BCM47XX=y -# CONFIG_NO_IOPORT is not set -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PHYLIB=y -# CONFIG_PMC_MSP is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_PROBE_INITRD_HEADER is not set -# CONFIG_PROC_KCORE is not set -CONFIG_SCHED_OMIT_FRAME_POINTER=y -# CONFIG_SCSI_DMA is not set -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -CONFIG_SERIAL_8250_EXTENDED=y -# CONFIG_SERIAL_8250_MANY_PORTS is not set -# CONFIG_SERIAL_8250_RSA is not set -CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SLOW_WORK is not set -CONFIG_SSB_B43_PCI_BRIDGE=y -CONFIG_SSB_DEBUG=y -CONFIG_SSB_DRIVER_EXTIF=y -CONFIG_SSB_DRIVER_GIGE=y -CONFIG_SSB_DRIVER_MIPS=y -CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y -CONFIG_SSB_DRIVER_PCICORE=y -CONFIG_SSB_EMBEDDED=y -CONFIG_SSB_PCICORE_HOSTMODE=y -CONFIG_SSB_PCIHOST_POSSIBLE=y -CONFIG_SSB_PCIHOST=y -CONFIG_SSB_SERIAL=y -CONFIG_SSB_SPROM=y -CONFIG_SSB=y -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -# CONFIG_TC35815 is not set -CONFIG_TRACING_SUPPORT=y -CONFIG_TRAD_SIGNALS=y -CONFIG_USB_EHCI_HCD_SSB=y -CONFIG_USB_OHCI_HCD_SSB=y -CONFIG_USB_SUPPORT=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/brcm47xx/config-2.6.31 b/target/linux/brcm47xx/config-2.6.31 deleted file mode 100644 index 48c808f23..000000000 --- a/target/linux/brcm47xx/config-2.6.31 +++ /dev/null @@ -1,171 +0,0 @@ -CONFIG_32BIT=y -# CONFIG_64BIT is not set -# CONFIG_ALCHEMY_GPIO_INDIRECT is not set -# CONFIG_AR7 is not set -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_POPULATES_NODE_MAP=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# CONFIG_ARPD is not set -CONFIG_B44_PCI_AUTOSELECT=y -CONFIG_B44_PCICORE_AUTOSELECT=y -CONFIG_B44_PCI=y -CONFIG_B44=y -CONFIG_BCM47XX_WDT=y -CONFIG_BCM47XX=y -# CONFIG_BINARY_PRINTF is not set -CONFIG_BITREVERSE=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set -# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set -CONFIG_CEVT_R4K_LIB=y -CONFIG_CEVT_R4K=y -CONFIG_CFE=y -CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200" -CONFIG_CONSTRUCTORS=y -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_CAVIUM_OCTEON is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_LITTLE_ENDIAN=y -# CONFIG_CPU_LOONGSON2 is not set -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5500 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -CONFIG_CSRC_R4K_LIB=y -CONFIG_CSRC_R4K=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DEVPORT=y -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -# CONFIG_FSNOTIFY is not set -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -# CONFIG_HAMRADIO is not set -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_HAVE_IDE=y -CONFIG_HAVE_MLOCKED_PAGE_BIT=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -# CONFIG_HZ_100 is not set -CONFIG_HZ=250 -CONFIG_HZ_250=y -CONFIG_INITRAMFS_SOURCE="" -# CONFIG_IP_ROUTE_VERBOSE is not set -CONFIG_IRQ_CPU=y -CONFIG_KALLSYMS=y -CONFIG_LEDS_GPIO=y -# CONFIG_LEMOTE_FULONG is not set -CONFIG_MAC80211_DEFAULT_PS_VALUE=0 -# CONFIG_MACH_ALCHEMY is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_MIKROTIK_RB532 is not set -# CONFIG_MIPS_COBALT is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_MACHINE is not set -# CONFIG_MIPS_MALTA is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_SIM is not set -CONFIG_MIPS=y -CONFIG_MTD_BCM47XX=y -# CONFIG_NO_IOPORT is not set -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PHYLIB=y -# CONFIG_PMC_MSP is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_PROBE_INITRD_HEADER is not set -# CONFIG_PROC_KCORE is not set -CONFIG_SCHED_OMIT_FRAME_POINTER=y -# CONFIG_SCSI_DMA is not set -# CONFIG_SERIAL_8250_DETECT_IRQ is not set -CONFIG_SERIAL_8250_EXTENDED=y -# CONFIG_SERIAL_8250_MANY_PORTS is not set -# CONFIG_SERIAL_8250_RSA is not set -CONFIG_SERIAL_8250_SHARE_IRQ=y -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SLOW_WORK is not set -CONFIG_SSB_B43_PCI_BRIDGE=y -CONFIG_SSB_DEBUG=y -CONFIG_SSB_DRIVER_EXTIF=y -CONFIG_SSB_DRIVER_GIGE=y -CONFIG_SSB_DRIVER_MIPS=y -CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y -CONFIG_SSB_DRIVER_PCICORE=y -CONFIG_SSB_EMBEDDED=y -CONFIG_SSB_PCICORE_HOSTMODE=y -CONFIG_SSB_PCIHOST_POSSIBLE=y -CONFIG_SSB_PCIHOST=y -CONFIG_SSB_SERIAL=y -CONFIG_SSB_SPROM=y -CONFIG_SSB=y -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -# CONFIG_TC35815 is not set -CONFIG_TRACING_SUPPORT=y -CONFIG_TRAD_SIGNALS=y -CONFIG_USB_SUPPORT=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/brcm47xx/patches-2.6.30/110-flash_map.patch b/target/linux/brcm47xx/patches-2.6.30/110-flash_map.patch deleted file mode 100644 index 59e89e575..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/110-flash_map.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/mtd/maps/Kconfig -+++ b/drivers/mtd/maps/Kconfig -@@ -343,6 +343,12 @@ config MTD_CFI_FLAGADM - Mapping for the Flaga digital module. If you don't have one, ignore - this setting. - -+config MTD_BCM47XX -+ tristate "BCM47xx flash device" -+ depends on MIPS && MTD_CFI && BCM47XX -+ help -+ Support for the flash chips on the BCM947xx board. -+ - config MTD_REDWOOD - tristate "CFI Flash devices mapped on IBM Redwood" - depends on MTD_CFI && ( REDWOOD_4 || REDWOOD_5 || REDWOOD_6 ) ---- a/drivers/mtd/maps/Makefile -+++ b/drivers/mtd/maps/Makefile -@@ -29,6 +29,7 @@ obj-$(CONFIG_MTD_PMC_MSP_RAMROOT)+= pmcm - obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o - obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o - obj-$(CONFIG_MTD_TQM8XXL) += tqm8xxl.o -+obj-$(CONFIG_MTD_BCM47XX) += bcm47xx-flash.o - obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o - obj-$(CONFIG_MTD_IPAQ) += ipaq-flash.o - obj-$(CONFIG_MTD_SBC_GXX) += sbc_gxx.o diff --git a/target/linux/brcm47xx/patches-2.6.30/130-remove_scache.patch b/target/linux/brcm47xx/patches-2.6.30/130-remove_scache.patch deleted file mode 100644 index 4ed30486d..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/130-remove_scache.patch +++ /dev/null @@ -1,89 +0,0 @@ ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -195,7 +195,6 @@ config MIPS_MALTA - select I8259 - select MIPS_BOARDS_GEN - select MIPS_BONITO64 -- select MIPS_CPU_SCACHE - select PCI_GT64XXX_PCI0 - select MIPS_MSC - select SWAP_IO_SPACE -@@ -1473,13 +1472,6 @@ config IP22_CPU_SCACHE - bool - select BOARD_SCACHE - --# --# Support for a MIPS32 / MIPS64 style S-caches --# --config MIPS_CPU_SCACHE -- bool -- select BOARD_SCACHE -- - config R5000_CPU_SCACHE - bool - select BOARD_SCACHE ---- a/arch/mips/kernel/cpu-probe.c -+++ b/arch/mips/kernel/cpu-probe.c -@@ -753,6 +753,8 @@ static inline void cpu_probe_mips(struct - case PRID_IMP_25KF: - c->cputype = CPU_25KF; - __cpu_name[cpu] = "MIPS 25Kc"; -+ /* Probe for L2 cache */ -+ c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT; - break; - case PRID_IMP_34K: - c->cputype = CPU_34K; ---- a/arch/mips/mm/Makefile -+++ b/arch/mips/mm/Makefile -@@ -32,6 +32,5 @@ obj-$(CONFIG_CPU_CAVIUM_OCTEON) += c-oct - obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o - obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o - obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o --obj-$(CONFIG_MIPS_CPU_SCACHE) += sc-mips.o - - EXTRA_CFLAGS += -Werror ---- a/arch/mips/mm/c-r4k.c -+++ b/arch/mips/mm/c-r4k.c -@@ -1135,7 +1135,6 @@ static void __init loongson2_sc_init(voi - - extern int r5k_sc_init(void); - extern int rm7k_sc_init(void); --extern int mips_sc_init(void); - - static void __cpuinit setup_scache(void) - { -@@ -1189,29 +1188,17 @@ static void __cpuinit setup_scache(void) - #endif - - default: -- if (c->isa_level == MIPS_CPU_ISA_M32R1 || -- c->isa_level == MIPS_CPU_ISA_M32R2 || -- c->isa_level == MIPS_CPU_ISA_M64R1 || -- c->isa_level == MIPS_CPU_ISA_M64R2) { --#ifdef CONFIG_MIPS_CPU_SCACHE -- if (mips_sc_init ()) { -- scache_size = c->scache.ways * c->scache.sets * c->scache.linesz; -- printk("MIPS secondary cache %ldkB, %s, linesize %d bytes.\n", -- scache_size >> 10, -- way_string[c->scache.ways], c->scache.linesz); -- } --#else -- if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT)) -- panic("Dunno how to handle MIPS32 / MIPS64 second level cache"); --#endif -- return; -- } - sc_present = 0; - } - - if (!sc_present) - return; - -+ if ((c->isa_level == MIPS_CPU_ISA_M32R1 || -+ c->isa_level == MIPS_CPU_ISA_M64R1) && -+ !(c->scache.flags & MIPS_CACHE_NOT_PRESENT)) -+ panic("Dunno how to handle MIPS32 / MIPS64 second level cache"); -+ - /* compute a couple of other cache variables */ - c->scache.waysize = scache_size / c->scache.ways; - diff --git a/target/linux/brcm47xx/patches-2.6.30/150-cpu_fixes.patch b/target/linux/brcm47xx/patches-2.6.30/150-cpu_fixes.patch deleted file mode 100644 index 7eb795085..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/150-cpu_fixes.patch +++ /dev/null @@ -1,365 +0,0 @@ ---- a/arch/mips/include/asm/r4kcache.h -+++ b/arch/mips/include/asm/r4kcache.h -@@ -17,6 +17,20 @@ - #include - #include - -+#ifdef CONFIG_BCM47XX -+#include -+#include -+#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE + SSB_IMSTATE))) -+ -+#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr)) -+#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); }) -+#else -+#define BCM4710_DUMMY_RREG() -+ -+#define BCM4710_FILL_TLB(addr) -+#define BCM4710_PROTECTED_FILL_TLB(addr) -+#endif -+ - /* - * This macro return a properly sign-extended address suitable as base address - * for indexed cache operations. Two issues here: -@@ -150,6 +164,7 @@ static inline void flush_icache_line_ind - static inline void flush_dcache_line_indexed(unsigned long addr) - { - __dflush_prologue -+ BCM4710_DUMMY_RREG(); - cache_op(Index_Writeback_Inv_D, addr); - __dflush_epilogue - } -@@ -169,6 +184,7 @@ static inline void flush_icache_line(uns - static inline void flush_dcache_line(unsigned long addr) - { - __dflush_prologue -+ BCM4710_DUMMY_RREG(); - cache_op(Hit_Writeback_Inv_D, addr); - __dflush_epilogue - } -@@ -176,6 +192,7 @@ static inline void flush_dcache_line(uns - static inline void invalidate_dcache_line(unsigned long addr) - { - __dflush_prologue -+ BCM4710_DUMMY_RREG(); - cache_op(Hit_Invalidate_D, addr); - __dflush_epilogue - } -@@ -208,6 +225,7 @@ static inline void flush_scache_line(uns - */ - static inline void protected_flush_icache_line(unsigned long addr) - { -+ BCM4710_DUMMY_RREG(); - protected_cache_op(Hit_Invalidate_I, addr); - } - -@@ -219,6 +237,7 @@ static inline void protected_flush_icach - */ - static inline void protected_writeback_dcache_line(unsigned long addr) - { -+ BCM4710_DUMMY_RREG(); - protected_cache_op(Hit_Writeback_Inv_D, addr); - } - -@@ -339,8 +358,52 @@ static inline void invalidate_tcache_pag - : "r" (base), \ - "i" (op)); - -+static inline void blast_dcache(void) -+{ -+ unsigned long start = KSEG0; -+ unsigned long dcache_size = current_cpu_data.dcache.waysize * current_cpu_data.dcache.ways; -+ unsigned long end = (start + dcache_size); -+ -+ do { -+ BCM4710_DUMMY_RREG(); -+ cache_op(Index_Writeback_Inv_D, start); -+ start += current_cpu_data.dcache.linesz; -+ } while(start < end); -+} -+ -+static inline void blast_dcache_page(unsigned long page) -+{ -+ unsigned long start = page; -+ unsigned long end = start + PAGE_SIZE; -+ -+ BCM4710_FILL_TLB(start); -+ do { -+ BCM4710_DUMMY_RREG(); -+ cache_op(Hit_Writeback_Inv_D, start); -+ start += current_cpu_data.dcache.linesz; -+ } while(start < end); -+} -+ -+static inline void blast_dcache_page_indexed(unsigned long page) -+{ -+ unsigned long start = page; -+ unsigned long end = start + PAGE_SIZE; -+ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit; -+ unsigned long ws_end = current_cpu_data.dcache.ways << -+ current_cpu_data.dcache.waybit; -+ unsigned long ws, addr; -+ for (ws = 0; ws < ws_end; ws += ws_inc) { -+ start = page + ws; -+ for (addr = start; addr < end; addr += current_cpu_data.dcache.linesz) { -+ BCM4710_DUMMY_RREG(); -+ cache_op(Index_Writeback_Inv_D, addr); -+ } -+ } -+} -+ -+ - /* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */ --#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize) \ -+#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, war) \ - static inline void blast_##pfx##cache##lsize(void) \ - { \ - unsigned long start = INDEX_BASE; \ -@@ -352,6 +415,7 @@ static inline void blast_##pfx##cache##l - \ - __##pfx##flush_prologue \ - \ -+ war \ - for (ws = 0; ws < ws_end; ws += ws_inc) \ - for (addr = start; addr < end; addr += lsize * 32) \ - cache##lsize##_unroll32(addr|ws, indexop); \ -@@ -366,6 +430,7 @@ static inline void blast_##pfx##cache##l - \ - __##pfx##flush_prologue \ - \ -+ war \ - do { \ - cache##lsize##_unroll32(start, hitop); \ - start += lsize * 32; \ -@@ -384,6 +449,8 @@ static inline void blast_##pfx##cache##l - current_cpu_data.desc.waybit; \ - unsigned long ws, addr; \ - \ -+ war \ -+ \ - __##pfx##flush_prologue \ - \ - for (ws = 0; ws < ws_end; ws += ws_inc) \ -@@ -393,35 +460,37 @@ static inline void blast_##pfx##cache##l - __##pfx##flush_epilogue \ - } - --__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16) --__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16) --__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16) --__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32) --__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32) --__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32) --__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64) --__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64) --__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128) -- --__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16) --__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32) --__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16) --__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32) --__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64) --__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128) -+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, ) -+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, BCM4710_FILL_TLB(start);) -+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, ) -+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, ) -+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, BCM4710_FILL_TLB(start);) -+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, ) -+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, BCM4710_FILL_TLB(start);) -+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, ) -+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, ) -+ -+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, ) -+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, ) -+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, ) -+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, ) -+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, ) -+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, ) - - /* build blast_xxx_range, protected_blast_xxx_range */ --#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot) \ -+#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, war, war2) \ - static inline void prot##blast_##pfx##cache##_range(unsigned long start, \ - unsigned long end) \ - { \ - unsigned long lsize = cpu_##desc##_line_size(); \ - unsigned long addr = start & ~(lsize - 1); \ - unsigned long aend = (end - 1) & ~(lsize - 1); \ -+ war \ - \ - __##pfx##flush_prologue \ - \ - while (1) { \ -+ war2 \ - prot##cache_op(hitop, addr); \ - if (addr == aend) \ - break; \ -@@ -431,13 +500,13 @@ static inline void prot##blast_##pfx##ca - __##pfx##flush_epilogue \ - } - --__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_) --__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_) --__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_) --__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, ) --__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, ) -+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, BCM4710_PROTECTED_FILL_TLB(addr); BCM4710_PROTECTED_FILL_TLB(aend);, BCM4710_DUMMY_RREG();) -+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_,, ) -+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_,, ) -+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D,, BCM4710_FILL_TLB(addr); BCM4710_FILL_TLB(aend);, BCM4710_DUMMY_RREG();) -+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD,,, ) - /* blast_inv_dcache_range */ --__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, ) --__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, ) -+__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D,,,BCM4710_DUMMY_RREG();) -+__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD,,, ) - - #endif /* _ASM_R4KCACHE_H */ ---- a/arch/mips/include/asm/stackframe.h -+++ b/arch/mips/include/asm/stackframe.h -@@ -426,6 +426,10 @@ - .macro RESTORE_SP_AND_RET - LONG_L sp, PT_R29(sp) - .set mips3 -+#ifdef CONFIG_BCM47XX -+ nop -+ nop -+#endif - eret - .set mips0 - .endm ---- a/arch/mips/kernel/genex.S -+++ b/arch/mips/kernel/genex.S -@@ -52,6 +52,10 @@ NESTED(except_vec1_generic, 0, sp) - NESTED(except_vec3_generic, 0, sp) - .set push - .set noat -+#ifdef CONFIG_BCM47XX -+ nop -+ nop -+#endif - #if R5432_CP0_INTERRUPT_WAR - mfc0 k0, CP0_INDEX - #endif ---- a/arch/mips/mm/c-r4k.c -+++ b/arch/mips/mm/c-r4k.c -@@ -34,6 +34,9 @@ - #include /* for run_uncached() */ - - -+/* For enabling BCM4710 cache workarounds */ -+int bcm4710 = 0; -+ - /* - * Special Variant of smp_call_function for use by cache functions: - * -@@ -104,6 +107,9 @@ static void __cpuinit r4k_blast_dcache_p - { - unsigned long dc_lsize = cpu_dcache_line_size(); - -+ if (bcm4710) -+ r4k_blast_dcache_page = blast_dcache_page; -+ else - if (dc_lsize == 0) - r4k_blast_dcache_page = (void *)cache_noop; - else if (dc_lsize == 16) -@@ -118,6 +124,9 @@ static void __cpuinit r4k_blast_dcache_p - { - unsigned long dc_lsize = cpu_dcache_line_size(); - -+ if (bcm4710) -+ r4k_blast_dcache_page_indexed = blast_dcache_page_indexed; -+ else - if (dc_lsize == 0) - r4k_blast_dcache_page_indexed = (void *)cache_noop; - else if (dc_lsize == 16) -@@ -132,6 +141,9 @@ static void __cpuinit r4k_blast_dcache_s - { - unsigned long dc_lsize = cpu_dcache_line_size(); - -+ if (bcm4710) -+ r4k_blast_dcache = blast_dcache; -+ else - if (dc_lsize == 0) - r4k_blast_dcache = (void *)cache_noop; - else if (dc_lsize == 16) -@@ -667,6 +679,8 @@ static void local_r4k_flush_cache_sigtra - unsigned long addr = (unsigned long) arg; - - R4600_HIT_CACHEOP_WAR_IMPL; -+ BCM4710_PROTECTED_FILL_TLB(addr); -+ BCM4710_PROTECTED_FILL_TLB(addr + 4); - if (dc_lsize) - protected_writeback_dcache_line(addr & ~(dc_lsize - 1)); - if (!cpu_icache_snoops_remote_store && scache_size) -@@ -1285,6 +1299,17 @@ static void __cpuinit coherency_setup(vo - * silly idea of putting something else there ... - */ - switch (current_cpu_type()) { -+ case CPU_BCM3302: -+ { -+ u32 cm; -+ cm = read_c0_diag(); -+ /* Enable icache */ -+ cm |= (1 << 31); -+ /* Enable dcache */ -+ cm |= (1 << 30); -+ write_c0_diag(cm); -+ } -+ break; - case CPU_R4000PC: - case CPU_R4000SC: - case CPU_R4000MC: -@@ -1341,6 +1366,15 @@ void __cpuinit r4k_cache_init(void) - break; - } - -+ /* Check if special workarounds are required */ -+#ifdef CONFIG_BCM47XX -+ if (current_cpu_data.cputype == CPU_BCM4710 && (current_cpu_data.processor_id & 0xff) == 0) { -+ printk("Enabling BCM4710A0 cache workarounds.\n"); -+ bcm4710 = 1; -+ } else -+#endif -+ bcm4710 = 0; -+ - probe_pcache(); - setup_scache(); - -@@ -1399,5 +1433,13 @@ void __cpuinit r4k_cache_init(void) - #if !defined(CONFIG_MIPS_CMP) - local_r4k___flush_cache_all(NULL); - #endif -+#ifdef CONFIG_BCM47XX -+ { -+ static void (*_coherency_setup)(void); -+ _coherency_setup = (void (*)(void)) KSEG1ADDR(coherency_setup); -+ _coherency_setup(); -+ } -+#else - coherency_setup(); -+#endif - } ---- a/arch/mips/mm/tlbex.c -+++ b/arch/mips/mm/tlbex.c -@@ -674,6 +674,9 @@ static void __cpuinit build_r4000_tlb_re - /* No need for uasm_i_nop */ - } - -+#ifdef CONFIG_BCM47XX -+ uasm_i_nop(&p); -+#endif - #ifdef CONFIG_64BIT - build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ - #else -@@ -1081,6 +1084,9 @@ build_r4000_tlbchange_handler_head(u32 * - struct uasm_reloc **r, unsigned int pte, - unsigned int ptr) - { -+#ifdef CONFIG_BCM47XX -+ uasm_i_nop(p); -+#endif - #ifdef CONFIG_64BIT - build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */ - #else diff --git a/target/linux/brcm47xx/patches-2.6.30/160-kmap_coherent.patch b/target/linux/brcm47xx/patches-2.6.30/160-kmap_coherent.patch deleted file mode 100644 index ef1cacdba..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/160-kmap_coherent.patch +++ /dev/null @@ -1,77 +0,0 @@ ---- a/arch/mips/include/asm/cpu-features.h -+++ b/arch/mips/include/asm/cpu-features.h -@@ -104,6 +104,9 @@ - #ifndef cpu_has_pindexed_dcache - #define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX) - #endif -+#ifndef cpu_use_kmap_coherent -+#define cpu_use_kmap_coherent 1 -+#endif - - /* - * I-Cache snoops remote store. This only matters on SMP. Some multiprocessors ---- /dev/null -+++ b/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h -@@ -0,0 +1,13 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) -+ */ -+#ifndef __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H -+#define __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H -+ -+#define cpu_use_kmap_coherent 0 -+ -+#endif /* __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H */ ---- a/arch/mips/mm/c-r4k.c -+++ b/arch/mips/mm/c-r4k.c -@@ -494,7 +494,7 @@ static inline void local_r4k_flush_cache - */ - map_coherent = (cpu_has_dc_aliases && - page_mapped(page) && !Page_dcache_dirty(page)); -- if (map_coherent) -+ if (map_coherent && cpu_use_kmap_coherent) - vaddr = kmap_coherent(page, addr); - else - vaddr = kmap_atomic(page, KM_USER0); -@@ -517,7 +517,7 @@ static inline void local_r4k_flush_cache - } - - if (vaddr) { -- if (map_coherent) -+ if (map_coherent && cpu_use_kmap_coherent) - kunmap_coherent(); - else - kunmap_atomic(vaddr, KM_USER0); ---- a/arch/mips/mm/init.c -+++ b/arch/mips/mm/init.c -@@ -204,7 +204,7 @@ void copy_user_highpage(struct page *to, - void *vfrom, *vto; - - vto = kmap_atomic(to, KM_USER1); -- if (cpu_has_dc_aliases && -+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent && - page_mapped(from) && !Page_dcache_dirty(from)) { - vfrom = kmap_coherent(from, vaddr); - copy_page(vto, vfrom); -@@ -226,7 +226,7 @@ void copy_to_user_page(struct vm_area_st - struct page *page, unsigned long vaddr, void *dst, const void *src, - unsigned long len) - { -- if (cpu_has_dc_aliases && -+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent && - page_mapped(page) && !Page_dcache_dirty(page)) { - void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); - memcpy(vto, src, len); -@@ -244,7 +244,7 @@ void copy_from_user_page(struct vm_area_ - struct page *page, unsigned long vaddr, void *dst, const void *src, - unsigned long len) - { -- if (cpu_has_dc_aliases && -+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent && - page_mapped(page) && !Page_dcache_dirty(page)) { - void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); - memcpy(dst, vfrom, len); diff --git a/target/linux/brcm47xx/patches-2.6.30/170-128MB_ram_bugfix.patch b/target/linux/brcm47xx/patches-2.6.30/170-128MB_ram_bugfix.patch deleted file mode 100644 index 93f4b1f10..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/170-128MB_ram_bugfix.patch +++ /dev/null @@ -1,32 +0,0 @@ ---- a/arch/mips/bcm47xx/prom.c -+++ b/arch/mips/bcm47xx/prom.c -@@ -126,6 +126,7 @@ static __init void prom_init_cmdline(voi - static __init void prom_init_mem(void) - { - unsigned long mem; -+ unsigned long max; - - /* Figure out memory size by finding aliases. - * -@@ -134,8 +135,21 @@ static __init void prom_init_mem(void) - * want to reuse the memory used by CFE (around 4MB). That means cfe_* - * functions stop to work at some point during the boot, we should only - * call them at the beginning of the boot. -+ * -+ * BCM47XX uses 128MB for addressing the ram, if the system contains -+ * less that that amount of ram it remaps the ram more often into the -+ * available space. -+ * Accessing memory after 128MB will cause an exception. -+ * max contains the biggest possible address supported by the platform. -+ * If the method wants to try something above we assume 128MB ram. - */ -+ max = ((unsigned long)(prom_init) | ((128 << 20) - 1)); - for (mem = (1 << 20); mem < (128 << 20); mem += (1 << 20)) { -+ if (((unsigned long)(prom_init) + mem) > max) { -+ mem = (128 << 20); -+ printk("assume 128MB RAM\n"); -+ break; -+ } - if (*(unsigned long *)((unsigned long)(prom_init) + mem) == - *(unsigned long *)(prom_init)) - break; diff --git a/target/linux/brcm47xx/patches-2.6.30/210-b44_phy_fix.patch b/target/linux/brcm47xx/patches-2.6.30/210-b44_phy_fix.patch deleted file mode 100644 index 51b65afa6..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/210-b44_phy_fix.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/drivers/net/b44.c -+++ b/drivers/net/b44.c -@@ -339,7 +339,7 @@ static int b44_phy_reset(struct b44 *bp) - } - } - -- return 0; -+ return err; - } - - static void __b44_set_flow_ctrl(struct b44 *bp, u32 pause_flags) -@@ -2220,6 +2220,10 @@ static int __devinit b44_init_one(struct - */ - b44_chip_reset(bp, B44_CHIP_RESET_FULL); - -+ /* do a phy reset to test if there is an active phy */ -+ if (b44_phy_reset(bp) < 0) -+ bp->phy_addr = B44_PHY_ADDR_NO_PHY; -+ - printk(KERN_INFO "%s: Broadcom 44xx/47xx 10/100BaseT Ethernet %pM\n", - dev->name, dev->dev_addr); - diff --git a/target/linux/brcm47xx/patches-2.6.30/220-bcm5354.patch b/target/linux/brcm47xx/patches-2.6.30/220-bcm5354.patch deleted file mode 100644 index 65416086f..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/220-bcm5354.patch +++ /dev/null @@ -1,42 +0,0 @@ ---- a/drivers/ssb/driver_chipcommon.c -+++ b/drivers/ssb/driver_chipcommon.c -@@ -258,6 +258,8 @@ void ssb_chipco_resume(struct ssb_chipco - void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc, - u32 *plltype, u32 *n, u32 *m) - { -+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354) -+ return; - *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N); - *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); - switch (*plltype) { -@@ -281,6 +283,8 @@ void ssb_chipco_get_clockcpu(struct ssb_ - void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc, - u32 *plltype, u32 *n, u32 *m) - { -+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354) -+ return; - *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N); - *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); - switch (*plltype) { ---- a/drivers/ssb/driver_mipscore.c -+++ b/drivers/ssb/driver_mipscore.c -@@ -161,6 +161,8 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m - - if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) { - rate = 200000000; -+ } else if (bus->chip_id == 0x5354) { -+ rate = 240000000; - } else { - rate = ssb_calc_clock_rate(pll_type, n, m); - } ---- a/drivers/ssb/main.c -+++ b/drivers/ssb/main.c -@@ -1012,6 +1012,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus) - - if (bus->chip_id == 0x5365) { - rate = 100000000; -+ } else if (bus->chip_id == 0x5354) { -+ rate = 120000000; - } else { - rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m); - if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */ diff --git a/target/linux/brcm47xx/patches-2.6.30/250-ohci-ssb-usb2.patch b/target/linux/brcm47xx/patches-2.6.30/250-ohci-ssb-usb2.patch deleted file mode 100644 index 25b27e47e..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/250-ohci-ssb-usb2.patch +++ /dev/null @@ -1,60 +0,0 @@ ---- - drivers/usb/host/ohci-ssb.c | 39 ++++++++++++++++++++++++++++++++++++--- - 1 file changed, 36 insertions(+), 3 deletions(-) - ---- a/drivers/usb/host/ohci-ssb.c -+++ b/drivers/usb/host/ohci-ssb.c -@@ -106,10 +106,42 @@ static int ssb_ohci_attach(struct ssb_de - int err = -ENOMEM; - u32 tmp, flags = 0; - -- if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV) -+ if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV) { -+ /* Put the device into host-mode. */ - flags |= SSB_OHCI_TMSLOW_HOSTMODE; -- -- ssb_device_enable(dev, flags); -+ ssb_device_enable(dev, flags); -+ } else if (dev->id.coreid == SSB_DEV_USB20_HOST) { -+ /* -+ * USB 2.0 special considerations: -+ * -+ * 1. Since the core supports both OHCI and EHCI functions, it must -+ * only be reset once. -+ * -+ * 2. In addition to the standard SSB reset sequence, the Host Control -+ * Register must be programmed to bring the USB core and various -+ * phy components out of reset. -+ */ -+ ssb_device_enable(dev, 0); -+ ssb_write32(dev, 0x200, 0x7ff); -+ udelay(1); -+ if (dev->id.revision == 1) { // bug in rev 1 -+ -+ /* Change Flush control reg */ -+ tmp = ssb_read32(dev, 0x400); -+ tmp &= ~8; -+ ssb_write32(dev, 0x400, tmp); -+ tmp = ssb_read32(dev, 0x400); -+ printk("USB20H fcr: 0x%0x\n", tmp); -+ -+ /* Change Shim control reg */ -+ tmp = ssb_read32(dev, 0x304); -+ tmp &= ~0x100; -+ ssb_write32(dev, 0x304, tmp); -+ tmp = ssb_read32(dev, 0x304); -+ printk("USB20H shim: 0x%0x\n", tmp); -+ } -+ } else -+ ssb_device_enable(dev, 0); - - hcd = usb_create_hcd(&ssb_ohci_hc_driver, dev->dev, - dev_name(dev->dev)); -@@ -200,6 +232,7 @@ static int ssb_ohci_resume(struct ssb_de - static const struct ssb_device_id ssb_ohci_table[] = { - SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOSTDEV, SSB_ANY_REV), - SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOST, SSB_ANY_REV), -+ SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV), - SSB_DEVTABLE_END - }; - MODULE_DEVICE_TABLE(ssb, ssb_ohci_table); diff --git a/target/linux/brcm47xx/patches-2.6.30/260-ohci-set-dma-mask.patch b/target/linux/brcm47xx/patches-2.6.30/260-ohci-set-dma-mask.patch deleted file mode 100644 index 50dcd5718..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/260-ohci-set-dma-mask.patch +++ /dev/null @@ -1,16 +0,0 @@ ---- - drivers/usb/host/ohci-ssb.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/usb/host/ohci-ssb.c -+++ b/drivers/usb/host/ohci-ssb.c -@@ -106,6 +106,9 @@ static int ssb_ohci_attach(struct ssb_de - int err = -ENOMEM; - u32 tmp, flags = 0; - -+ if (ssb_dma_set_mask(dev, DMA_32BIT_MASK)) -+ return -EOPNOTSUPP; -+ - if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV) { - /* Put the device into host-mode. */ - flags |= SSB_OHCI_TMSLOW_HOSTMODE; diff --git a/target/linux/brcm47xx/patches-2.6.30/270-ehci-ssb.patch b/target/linux/brcm47xx/patches-2.6.30/270-ehci-ssb.patch deleted file mode 100644 index d1421332b..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/270-ehci-ssb.patch +++ /dev/null @@ -1,314 +0,0 @@ ---- - drivers/usb/host/Kconfig | 13 ++ - drivers/usb/host/ehci-hcd.c | 12 ++ - drivers/usb/host/ehci-ssb.c | 201 ++++++++++++++++++++++++++++++++++++++++++++ - drivers/usb/host/ohci-ssb.c | 23 +++++ - 4 files changed, 247 insertions(+), 2 deletions(-) - ---- a/drivers/usb/host/Kconfig -+++ b/drivers/usb/host/Kconfig -@@ -106,6 +106,19 @@ config USB_OXU210HP_HCD - To compile this driver as a module, choose M here: the - module will be called oxu210hp-hcd. - -+config USB_EHCI_HCD_SSB -+ bool "EHCI support for Broadcom SSB EHCI core" -+ depends on USB_EHCI_HCD && SSB && EXPERIMENTAL -+ default n -+ ---help--- -+ Support for the Sonics Silicon Backplane (SSB) attached -+ Broadcom USB EHCI core. -+ -+ This device is present in some embedded devices with -+ Broadcom based SSB bus. -+ -+ If unsure, say N. -+ - config USB_ISP116X_HCD - tristate "ISP116X HCD support" - depends on USB ---- a/drivers/usb/host/ehci-hcd.c -+++ b/drivers/usb/host/ehci-hcd.c -@@ -1075,8 +1075,16 @@ MODULE_LICENSE ("GPL"); - #define PLATFORM_DRIVER ixp4xx_ehci_driver - #endif - --#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \ -- !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) -+#ifdef CONFIG_USB_EHCI_HCD_SSB -+#include "ehci-ssb.c" -+#define SSB_EHCI_DRIVER ssb_ehci_driver -+#endif -+ -+#if !defined(PCI_DRIVER) && \ -+ !defined(PLATFORM_DRIVER) && \ -+ !defined(PS3_SYSTEM_BUS_DRIVER) && \ -+ !defined(OF_PLATFORM_DRIVER) && \ -+ !defined(SSB_EHCI_DRIVER) - #error "missing bus glue for ehci-hcd" - #endif - ---- /dev/null -+++ b/drivers/usb/host/ehci-ssb.c -@@ -0,0 +1,201 @@ -+/* -+ * Sonics Silicon Backplane -+ * Broadcom USB-core EHCI driver (SSB bus glue) -+ * -+ * Copyright 2007 Steven Brown -+ * -+ * Derived from the OHCI-SSB driver -+ * Copyright 2007 Michael Buesch -+ * -+ * Derived from the EHCI-PCI driver -+ * Copyright (c) 2000-2004 by David Brownell -+ * -+ * Derived from the OHCI-PCI driver -+ * Copyright 1999 Roman Weissgaerber -+ * Copyright 2000-2002 David Brownell -+ * Copyright 1999 Linus Torvalds -+ * Copyright 1999 Gregory P. Smith -+ * -+ * Derived from the USBcore related parts of Broadcom-SB -+ * Copyright 2005 Broadcom Corporation -+ * -+ * Licensed under the GNU/GPL. See COPYING for details. -+ */ -+#include -+ -+#define SSB_OHCI_TMSLOW_HOSTMODE (1 << 29) -+ -+struct ssb_ehci_device { -+ struct ehci_hcd ehci; /* _must_ be at the beginning. */ -+ -+ u32 enable_flags; -+}; -+ -+static inline -+struct ssb_ehci_device *hcd_to_ssb_ehci(struct usb_hcd *hcd) -+{ -+ return (struct ssb_ehci_device *)(hcd->hcd_priv); -+} -+ -+ -+static int ssb_ehci_reset(struct usb_hcd *hcd) -+{ -+ struct ehci_hcd *ehci = hcd_to_ehci(hcd); -+ int err; -+ -+ ehci->caps = hcd->regs; -+ ehci->regs = hcd->regs + -+ HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); -+ -+ dbg_hcs_params(ehci, "reset"); -+ dbg_hcc_params(ehci, "reset"); -+ -+ ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); -+ -+ err = ehci_halt(ehci); -+ -+ if (err) -+ return err; -+ -+ err = ehci_init(hcd); -+ -+ if (err) -+ return err; -+ -+ ehci_port_power(ehci, 0); -+ -+ return err; -+} -+ -+static int ssb_ehci_start(struct usb_hcd *hcd) -+{ -+ struct ehci_hcd *ehci = hcd_to_ehci(hcd); -+ int err; -+ -+ err = ehci_run(hcd); -+ if (err < 0) { -+ ehci_err(ehci, "can't start\n"); -+ ehci_stop(hcd); -+ } -+ -+ return err; -+} -+ -+#ifdef CONFIG_PM -+static int ssb_ehci_hcd_suspend(struct usb_hcd *hcd, pm_message_t message) -+{ -+ struct ssb_ehci_device *ehcidev = hcd_to_ssb_ehci(hcd); -+ struct ehci_hcd *ehci = &ehcidev->ehci; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&ehci->lock, flags); -+ -+ ehci_writel(ehci, EHCI_INTR_MIE, &ehci->regs->intrdisable); -+ ehci_readl(ehci, &ehci->regs->intrdisable); /* commit write */ -+ -+ /* make sure snapshot being resumed re-enumerates everything */ -+ if (message.event == PM_EVENT_PRETHAW) -+ ehci_usb_reset(ehci); -+ -+ clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); -+ -+ spin_unlock_irqrestore(&ehci->lock, flags); -+ return 0; -+} -+ -+static int ssb_ehci_hcd_resume(struct usb_hcd *hcd) -+{ -+ set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); -+ usb_hcd_resume_root_hub(hcd); -+ return 0; -+} -+#endif /* CONFIG_PM */ -+ -+static const struct hc_driver ssb_ehci_hc_driver = { -+ .description = "ssb-usb-ehci", -+ .product_desc = "SSB EHCI Controller", -+ .hcd_priv_size = sizeof(struct ssb_ehci_device), -+ -+ .irq = ehci_irq, -+ .flags = HCD_MEMORY | HCD_USB2, -+ -+ .reset = ssb_ehci_reset, -+ .start = ssb_ehci_start, -+ .stop = ehci_stop, -+ .shutdown = ehci_shutdown, -+ -+#ifdef CONFIG_PM -+ .suspend = ssb_ehci_hcd_suspend, -+ .resume = ssb_ehci_hcd_resume, -+#endif -+ -+ .urb_enqueue = ehci_urb_enqueue, -+ .urb_dequeue = ehci_urb_dequeue, -+ .endpoint_disable = ehci_endpoint_disable, -+ -+ .get_frame_number = ehci_get_frame, -+ -+ .hub_status_data = ehci_hub_status_data, -+ .hub_control = ehci_hub_control, -+#ifdef CONFIG_PM -+ .bus_suspend = ehci_bus_suspend, -+ .bus_resume = ehci_bus_resume, -+#endif -+ -+}; -+ -+static void ssb_ehci_detach(struct ssb_device *dev, struct usb_hcd *hcd) -+{ -+ -+ usb_remove_hcd(hcd); -+ iounmap(hcd->regs); -+ usb_put_hcd(hcd); -+} -+EXPORT_SYMBOL_GPL(ssb_ehci_detach); -+ -+static int ssb_ehci_attach(struct ssb_device *dev, struct usb_hcd **ehci_hcd) -+{ -+ struct ssb_ehci_device *ehcidev; -+ struct usb_hcd *hcd; -+ int err = -ENOMEM; -+ u32 tmp, flags = 0; -+ -+ hcd = usb_create_hcd(&ssb_ehci_hc_driver, dev->dev, -+ dev_name(dev->dev)); -+ if (!hcd) -+ goto err_dev_disable; -+ -+ ehcidev = hcd_to_ssb_ehci(hcd); -+ ehcidev->enable_flags = flags; -+ tmp = ssb_read32(dev, SSB_ADMATCH0); -+ hcd->rsrc_start = ssb_admatch_base(tmp) + 0x800; /* ehci core offset */ -+ hcd->rsrc_len = 0x100; /* ehci reg block size */ -+ /* -+ * start & size modified per sbutils.c -+ */ -+ hcd->regs = ioremap_nocache(hcd->rsrc_start, hcd->rsrc_len); -+ if (!hcd->regs) -+ goto err_put_hcd; -+ err = usb_add_hcd(hcd, dev->irq, IRQF_SHARED | IRQF_DISABLED); -+ if (err) -+ goto err_iounmap; -+ -+ *ehci_hcd = hcd; -+ -+ return err; -+ -+err_iounmap: -+ iounmap(hcd->regs); -+err_put_hcd: -+ usb_put_hcd(hcd); -+err_dev_disable: -+ ssb_device_disable(dev, flags); -+ return err; -+} -+EXPORT_SYMBOL_GPL(ssb_ehci_attach); -+ -+static const struct ssb_device_id ssb_ehci_table[] = { -+ SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV), -+ SSB_DEVTABLE_END -+}; -+MODULE_DEVICE_TABLE(ssb, ssb_ehci_table); ---- a/drivers/usb/host/ohci-ssb.c -+++ b/drivers/usb/host/ohci-ssb.c -@@ -17,6 +17,8 @@ - */ - #include - -+extern int ssb_ehci_attach(struct ssb_device *dev, struct usb_hcd **hcd); -+extern void ssb_ehci_detach(struct ssb_device *dev, struct usb_hcd *hcd); - - #define SSB_OHCI_TMSLOW_HOSTMODE (1 << 29) - -@@ -24,6 +26,7 @@ struct ssb_ohci_device { - struct ohci_hcd ohci; /* _must_ be at the beginning. */ - - u32 enable_flags; -+ struct usb_hcd *ehci_hcd; - }; - - static inline -@@ -92,13 +95,25 @@ static const struct hc_driver ssb_ohci_h - static void ssb_ohci_detach(struct ssb_device *dev) - { - struct usb_hcd *hcd = ssb_get_drvdata(dev); -+#ifdef CONFIG_USB_EHCI_HCD_SSB -+ struct ssb_ohci_device *ohcidev = hcd_to_ssb_ohci(hcd); -+#endif - - usb_remove_hcd(hcd); - iounmap(hcd->regs); - usb_put_hcd(hcd); -+ -+#ifdef CONFIG_USB_EHCI_HCD_SSB -+ /* -+ * Also detach ehci function -+ */ -+ if (dev->id.coreid == SSB_DEV_USB20_HOST) -+ ssb_ehci_detach(dev, ohcidev->ehci_hcd); -+#endif - ssb_device_disable(dev, 0); - } - -+ - static int ssb_ohci_attach(struct ssb_device *dev) - { - struct ssb_ohci_device *ohcidev; -@@ -165,6 +180,14 @@ static int ssb_ohci_attach(struct ssb_de - - ssb_set_drvdata(dev, hcd); - -+#ifdef CONFIG_USB_EHCI_HCD_SSB -+ /* -+ * attach ehci function in this core -+ */ -+ if (dev->id.coreid == SSB_DEV_USB20_HOST) -+ err = ssb_ehci_attach(dev, &(ohcidev->ehci_hcd)); -+#endif -+ - return err; - - err_iounmap: diff --git a/target/linux/brcm47xx/patches-2.6.30/275-usb2-bcm5354-init.patch b/target/linux/brcm47xx/patches-2.6.30/275-usb2-bcm5354-init.patch deleted file mode 100644 index 3d8327ebf..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/275-usb2-bcm5354-init.patch +++ /dev/null @@ -1,63 +0,0 @@ -This patch significantly improves the reliability of high speed -usb writes on the bcm5354. It implements a work around for version 2 -of the usb20 core that was cribbed from the GPL sources for the -Asus wl500gpv2 and verified against the wl520gu sources. - -Reference: -GPL/WL-520gu-NewUI/src/linux/linux/arch/mips/brcm-boards/bcm947xx/pcibios.c -GPL/WL-500gPV2-NewUI/src/linux/linux/arch/mips/brcm-boards/bcm947xx/pcibios.c - -Signed-off-by: Steve Brown - ---- - drivers/usb/host/ohci-ssb.c | 37 +++++++++++++++++++++++-------------- - 1 file changed, 23 insertions(+), 14 deletions(-) - ---- a/drivers/usb/host/ohci-ssb.c -+++ b/drivers/usb/host/ohci-ssb.c -@@ -141,22 +141,31 @@ static int ssb_ohci_attach(struct ssb_de - */ - ssb_device_enable(dev, 0); - ssb_write32(dev, 0x200, 0x7ff); -+ -+ /* Change Flush control reg */ -+ tmp = ssb_read32(dev, 0x400); -+ tmp &= ~8; -+ ssb_write32(dev, 0x400, tmp); -+ tmp = ssb_read32(dev, 0x400); -+ -+ /* Change Shim control reg */ -+ tmp = ssb_read32(dev, 0x304); -+ tmp &= ~0x100; -+ ssb_write32(dev, 0x304, tmp); -+ tmp = ssb_read32(dev, 0x304); -+ - udelay(1); -- if (dev->id.revision == 1) { // bug in rev 1 - -- /* Change Flush control reg */ -- tmp = ssb_read32(dev, 0x400); -- tmp &= ~8; -- ssb_write32(dev, 0x400, tmp); -- tmp = ssb_read32(dev, 0x400); -- printk("USB20H fcr: 0x%0x\n", tmp); -- -- /* Change Shim control reg */ -- tmp = ssb_read32(dev, 0x304); -- tmp &= ~0x100; -- ssb_write32(dev, 0x304, tmp); -- tmp = ssb_read32(dev, 0x304); -- printk("USB20H shim: 0x%0x\n", tmp); -+ /* Work around for 5354 failures */ -+ if ((dev->id.revision == 2) && (dev->bus->chip_id == 0x5354)) { -+ /* Change syn01 reg */ -+ tmp = 0x00fe00fe; -+ ssb_write32(dev, 0x894, tmp); -+ -+ /* Change syn03 reg */ -+ tmp = ssb_read32(dev, 0x89c); -+ tmp |= 0x1; -+ ssb_write32(dev, 0x89c, tmp); - } - } else - ssb_device_enable(dev, 0); diff --git a/target/linux/brcm47xx/patches-2.6.30/280-activate_ssb_support_in_usb.patch b/target/linux/brcm47xx/patches-2.6.30/280-activate_ssb_support_in_usb.patch deleted file mode 100644 index aeb9d334c..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/280-activate_ssb_support_in_usb.patch +++ /dev/null @@ -1,16 +0,0 @@ -This prevents the options from being delete with make kernel_oldconfig. ---- - drivers/ssb/Kconfig | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/ssb/Kconfig -+++ b/drivers/ssb/Kconfig -@@ -126,6 +126,8 @@ config SSB_DRIVER_MIPS - config SSB_EMBEDDED - bool - depends on SSB_DRIVER_MIPS -+ select USB_EHCI_HCD_SSB if USB_EHCI_HCD -+ select USB_OHCI_HCD_SSB if USB_OHCI_HCD - default y - - config SSB_DRIVER_EXTIF diff --git a/target/linux/brcm47xx/patches-2.6.30/300-fork_cacheflush.patch b/target/linux/brcm47xx/patches-2.6.30/300-fork_cacheflush.patch deleted file mode 100644 index 686fb1b94..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/300-fork_cacheflush.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/mips/include/asm/cacheflush.h -+++ b/arch/mips/include/asm/cacheflush.h -@@ -32,7 +32,7 @@ - extern void (*flush_cache_all)(void); - extern void (*__flush_cache_all)(void); - extern void (*flush_cache_mm)(struct mm_struct *mm); --#define flush_cache_dup_mm(mm) do { (void) (mm); } while (0) -+#define flush_cache_dup_mm(mm) flush_cache_mm(mm) - extern void (*flush_cache_range)(struct vm_area_struct *vma, - unsigned long start, unsigned long end); - extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn); diff --git a/target/linux/brcm47xx/patches-2.6.30/301-kmod-fuse-dcache-bug-r4k.patch b/target/linux/brcm47xx/patches-2.6.30/301-kmod-fuse-dcache-bug-r4k.patch deleted file mode 100644 index 6e1b130e9..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/301-kmod-fuse-dcache-bug-r4k.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- a/arch/mips/mm/c-r4k.c -+++ b/arch/mips/mm/c-r4k.c -@@ -360,7 +360,7 @@ static inline void local_r4k___flush_cac - } - } - --static void r4k___flush_cache_all(void) -+void r4k___flush_cache_all(void) - { - r4k_on_each_cpu(local_r4k___flush_cache_all, NULL, 1); - } -@@ -524,7 +524,7 @@ static inline void local_r4k_flush_cache - } - } - --static void r4k_flush_cache_page(struct vm_area_struct *vma, -+void r4k_flush_cache_page(struct vm_area_struct *vma, - unsigned long addr, unsigned long pfn) - { - struct flush_cache_page_args args; -@@ -1443,3 +1443,10 @@ void __cpuinit r4k_cache_init(void) - coherency_setup(); - #endif - } -+ -+// fuse package DCACHE BUG patch exports -+void (*fuse_flush_cache_all)(void) = r4k___flush_cache_all; -+void (*fuse_flush_cache_page)(struct vm_area_struct *vma, unsigned long page, -+ unsigned long pfn) = r4k_flush_cache_page; -+EXPORT_SYMBOL(fuse_flush_cache_page); -+EXPORT_SYMBOL(fuse_flush_cache_all); diff --git a/target/linux/brcm47xx/patches-2.6.30/302-kmod-fuse-dcache-bug-fuse.patch b/target/linux/brcm47xx/patches-2.6.30/302-kmod-fuse-dcache-bug-fuse.patch deleted file mode 100644 index 79515d444..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/302-kmod-fuse-dcache-bug-fuse.patch +++ /dev/null @@ -1,82 +0,0 @@ ---- a/fs/fuse/dev.c -+++ b/fs/fuse/dev.c -@@ -527,6 +527,11 @@ static void fuse_copy_finish(struct fuse - } - } - -+#ifdef DCACHE_BUG -+extern void (*fuse_flush_cache_all)(void); -+extern void (*fuse_flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn); -+#endif -+ - /* - * Get another pagefull of userspace buffer, and map it to kernel - * address space, and lock request -@@ -535,6 +540,9 @@ static int fuse_copy_fill(struct fuse_co - { - unsigned long offset; - int err; -+#ifdef DCACHE_BUG -+ struct vm_area_struct *vma; -+#endif - - unlock_request(cs->fc, cs->req); - fuse_copy_finish(cs); -@@ -546,14 +554,22 @@ static int fuse_copy_fill(struct fuse_co - cs->nr_segs--; - } - down_read(¤t->mm->mmap_sem); -+#ifndef DCACHE_BUG - err = get_user_pages(current, current->mm, cs->addr, 1, cs->write, 0, - &cs->pg, NULL); -+#else -+ err = get_user_pages(current, current->mm, cs->addr, 1, cs->write, 0, -+ &cs->pg, &vma); -+#endif - up_read(¤t->mm->mmap_sem); - if (err < 0) - return err; - BUG_ON(err != 1); - offset = cs->addr % PAGE_SIZE; - cs->mapaddr = kmap_atomic(cs->pg, KM_USER0); -+#ifdef DCACHE_BUG -+ fuse_flush_cache_page(vma, cs->addr, page_to_pfn(cs->pg)); -+#endif - cs->buf = cs->mapaddr + offset; - cs->len = min(PAGE_SIZE - offset, cs->seglen); - cs->seglen -= cs->len; -@@ -567,6 +583,11 @@ static int fuse_copy_do(struct fuse_copy - { - unsigned ncpy = min(*size, cs->len); - if (val) { -+#ifdef DCACHE_BUG -+ // patch from mailing list, it is very important, otherwise, -+ // can't mount, or ls mount point will hang -+ fuse_flush_cache_all(); -+#endif - if (cs->write) - memcpy(cs->buf, *val, ncpy); - else ---- a/fs/fuse/fuse_i.h -+++ b/fs/fuse/fuse_i.h -@@ -8,6 +8,7 @@ - - #ifndef _FS_FUSE_I_H - #define _FS_FUSE_I_H -+#define DCACHE_BUG - - #include - #include ---- a/fs/fuse/inode.c -+++ b/fs/fuse/inode.c -@@ -1055,6 +1055,10 @@ static int __init fuse_init(void) - printk(KERN_INFO "fuse init (API version %i.%i)\n", - FUSE_KERNEL_VERSION, FUSE_KERNEL_MINOR_VERSION); - -+#ifdef DCACHE_BUG -+printk("fuse init: DCACHE_BUG enabled\n"); -+#endif -+ - INIT_LIST_HEAD(&fuse_conn_list); - res = fuse_fs_init(); - if (res) diff --git a/target/linux/brcm47xx/patches-2.6.30/310-no_highpage.patch b/target/linux/brcm47xx/patches-2.6.30/310-no_highpage.patch deleted file mode 100644 index 45ce36a11..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/310-no_highpage.patch +++ /dev/null @@ -1,66 +0,0 @@ ---- a/arch/mips/include/asm/page.h -+++ b/arch/mips/include/asm/page.h -@@ -35,6 +35,7 @@ - #ifndef __ASSEMBLY__ - - #include -+#include - #include - - extern void build_clear_page(void); -@@ -70,13 +71,16 @@ static inline void clear_user_page(void - flush_data_cache_page((unsigned long)addr); - } - --extern void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, -- struct page *to); --struct vm_area_struct; --extern void copy_user_highpage(struct page *to, struct page *from, -- unsigned long vaddr, struct vm_area_struct *vma); -+static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, -+ struct page *to) -+{ -+ extern void (*flush_data_cache_page)(unsigned long addr); - --#define __HAVE_ARCH_COPY_USER_HIGHPAGE -+ copy_page(vto, vfrom); -+ if (!cpu_has_ic_fills_f_dc || -+ pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) -+ flush_data_cache_page((unsigned long)vto); -+} - - /* - * These are used to make use of C type-checking.. ---- a/arch/mips/mm/init.c -+++ b/arch/mips/mm/init.c -@@ -198,30 +198,6 @@ void kunmap_coherent(void) - preempt_check_resched(); - } - --void copy_user_highpage(struct page *to, struct page *from, -- unsigned long vaddr, struct vm_area_struct *vma) --{ -- void *vfrom, *vto; -- -- vto = kmap_atomic(to, KM_USER1); -- if (cpu_has_dc_aliases && cpu_use_kmap_coherent && -- page_mapped(from) && !Page_dcache_dirty(from)) { -- vfrom = kmap_coherent(from, vaddr); -- copy_page(vto, vfrom); -- kunmap_coherent(); -- } else { -- vfrom = kmap_atomic(from, KM_USER0); -- copy_page(vto, vfrom); -- kunmap_atomic(vfrom, KM_USER0); -- } -- if ((!cpu_has_ic_fills_f_dc) || -- pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) -- flush_data_cache_page((unsigned long)vto); -- kunmap_atomic(vto, KM_USER1); -- /* Make sure this page is cleared on other CPU's too before using it */ -- smp_wmb(); --} -- - void copy_to_user_page(struct vm_area_struct *vma, - struct page *page, unsigned long vaddr, void *dst, const void *src, - unsigned long len) diff --git a/target/linux/brcm47xx/patches-2.6.30/400-arch-bcm47xx.patch b/target/linux/brcm47xx/patches-2.6.30/400-arch-bcm47xx.patch deleted file mode 100644 index ef6b71267..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/400-arch-bcm47xx.patch +++ /dev/null @@ -1,319 +0,0 @@ ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -53,6 +53,7 @@ config BCM47XX - select SSB_DRIVER_MIPS - select SSB_DRIVER_EXTIF - select SSB_EMBEDDED -+ select SSB_B43_PCI_BRIDGE if PCI - select SSB_PCICORE_HOSTMODE if PCI - select GENERIC_GPIO - select SYS_HAS_EARLY_PRINTK ---- a/arch/mips/bcm47xx/Makefile -+++ b/arch/mips/bcm47xx/Makefile -@@ -3,4 +3,4 @@ - # under Linux. - # - --obj-y := gpio.o irq.o prom.o serial.o setup.o time.o wgt634u.o -+obj-y := cfe_env.o gpio.o irq.o nvram.o prom.o serial.o setup.o time.o wgt634u.o ---- a/arch/mips/bcm47xx/irq.c -+++ b/arch/mips/bcm47xx/irq.c -@@ -1,5 +1,6 @@ - /* - * Copyright (C) 2004 Florian Schirmer -+ * Copyright (C) 2008 Michael Buesch - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the -@@ -23,10 +24,19 @@ - */ - - #include -+#include -+#include - #include - #include -+#include -+#include -+ - #include - -+ -+extern struct ssb_bus ssb_bcm47xx; -+ -+ - void plat_irq_dispatch(void) - { - u32 cause; ---- a/arch/mips/bcm47xx/nvram.c -+++ b/arch/mips/bcm47xx/nvram.c -@@ -24,10 +24,10 @@ - #include - #include - --#include -+#include "include/nvram.h" - - #define MB * 1048576 --extern struct ssb_bus ssb; -+extern struct ssb_bus ssb_bcm47xx; - - static char nvram_buf[NVRAM_SPACE]; - static int cfe_env; -@@ -36,7 +36,7 @@ extern char *cfe_env_get(char *nv_buf, c - /* Probe for NVRAM header */ - static void __init early_nvram_init(void) - { -- struct ssb_mipscore *mcore = &ssb.mipscore; -+ struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore; - struct nvram_header *header; - int i; - u32 base, lim, off; ---- a/arch/mips/bcm47xx/setup.c -+++ b/arch/mips/bcm47xx/setup.c -@@ -2,7 +2,7 @@ - * Copyright (C) 2004 Florian Schirmer - * Copyright (C) 2005 Waldemar Brodkorb - * Copyright (C) 2006 Felix Fietkau -- * Copyright (C) 2006 Michael Buesch -+ * Copyright (C) 2006-2008 Michael Buesch - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the -@@ -25,18 +25,28 @@ - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -+#include - #include - #include - #include -+#include -+#include -+#include -+#include -+#include - #include - #include - #include --#include - #include -+#include -+ -+#include "include/nvram.h" - - struct ssb_bus ssb_bcm47xx; - EXPORT_SYMBOL(ssb_bcm47xx); - -+extern void bcm47xx_pci_init(void); -+ - static void bcm47xx_machine_restart(char *command) - { - printk(KERN_ALERT "Please stand by while rebooting the system...\n"); -@@ -56,7 +66,7 @@ static void bcm47xx_machine_halt(void) - cpu_relax(); - } - --static void str2eaddr(char *str, char *dest) -+static void e_aton(char *str, char *dest) - { - int i = 0; - -@@ -73,52 +83,142 @@ static void str2eaddr(char *str, char *d - } - } - --static int bcm47xx_get_invariants(struct ssb_bus *bus, -- struct ssb_init_invariants *iv) -+static void bcm47xx_fill_sprom(struct ssb_sprom *sprom) - { -- char buf[100]; -+ char *s; - -- /* Fill boardinfo structure */ -- memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo)); -+ memset(sprom, 0xFF, sizeof(struct ssb_sprom)); - -- if (cfe_getenv("boardvendor", buf, sizeof(buf)) >= 0) -- iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0); -- if (cfe_getenv("boardtype", buf, sizeof(buf)) >= 0) -- iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0); -- if (cfe_getenv("boardrev", buf, sizeof(buf)) >= 0) -- iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0); -- -- /* Fill sprom structure */ -- memset(&(iv->sprom), 0, sizeof(struct ssb_sprom)); -- iv->sprom.revision = 3; -- -- if (cfe_getenv("et0macaddr", buf, sizeof(buf)) >= 0) -- str2eaddr(buf, iv->sprom.et0mac); -- if (cfe_getenv("et1macaddr", buf, sizeof(buf)) >= 0) -- str2eaddr(buf, iv->sprom.et1mac); -- if (cfe_getenv("et0phyaddr", buf, sizeof(buf)) >= 0) -- iv->sprom.et0phyaddr = simple_strtoul(buf, NULL, 10); -- if (cfe_getenv("et1phyaddr", buf, sizeof(buf)) >= 0) -- iv->sprom.et1phyaddr = simple_strtoul(buf, NULL, 10); -- if (cfe_getenv("et0mdcport", buf, sizeof(buf)) >= 0) -- iv->sprom.et0mdcport = simple_strtoul(buf, NULL, 10); -- if (cfe_getenv("et1mdcport", buf, sizeof(buf)) >= 0) -- iv->sprom.et1mdcport = simple_strtoul(buf, NULL, 10); -+ sprom->revision = 1; -+ if ((s = nvram_get("il0macaddr"))) -+ e_aton(s, sprom->il0mac); -+ if ((s = nvram_get("et0macaddr"))) -+ e_aton(s, sprom->et0mac); -+ if ((s = nvram_get("et1macaddr"))) -+ e_aton(s, sprom->et1mac); -+ if ((s = nvram_get("et0phyaddr"))) -+ sprom->et0phyaddr = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("et1phyaddr"))) -+ sprom->et1phyaddr = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("et0mdcport"))) -+ sprom->et0mdcport = !!simple_strtoul(s, NULL, 10); -+ if ((s = nvram_get("et1mdcport"))) -+ sprom->et1mdcport = !!simple_strtoul(s, NULL, 10); -+ if ((s = nvram_get("pa0b0"))) -+ sprom->pa0b0 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa0b1"))) -+ sprom->pa0b1 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa0b2"))) -+ sprom->pa0b2 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa1b0"))) -+ sprom->pa1b0 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa1b1"))) -+ sprom->pa1b1 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa1b2"))) -+ sprom->pa1b2 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("wl0gpio0"))) -+ sprom->gpio0 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("wl0gpio1"))) -+ sprom->gpio1 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("wl0gpio2"))) -+ sprom->gpio2 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("wl0gpio3"))) -+ sprom->gpio3 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa0maxpwr"))) -+ sprom->maxpwr_bg = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa1maxpwr"))) -+ sprom->maxpwr_a = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa0itssit"))) -+ sprom->itssi_bg = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa1itssit"))) -+ sprom->itssi_a = simple_strtoul(s, NULL, 0); -+ sprom->boardflags_lo = 0; -+ if ((s = nvram_get("boardflags"))) -+ sprom->boardflags_lo = simple_strtoul(s, NULL, 0); -+ sprom->boardflags_hi = 0; -+ if ((s = nvram_get("boardflags2"))) -+ sprom->boardflags_hi = simple_strtoul(s, NULL, 0); -+} -+ -+static int bcm47xx_get_invariants(struct ssb_bus *bus, struct ssb_init_invariants *iv) -+{ -+ char *s; -+ -+ iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM; -+ if ((s = nvram_get("boardtype"))) -+ iv->boardinfo.type = (u16)simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("boardrev"))) -+ iv->boardinfo.rev = (u16)simple_strtoul(s, NULL, 0); -+ -+ bcm47xx_fill_sprom(&iv->sprom); -+ -+ if ((s = nvram_get("cardbus"))) -+ iv->has_cardbus_slot = !!simple_strtoul(s, NULL, 10); - - return 0; - } - - void __init plat_mem_setup(void) - { -- int err; -+ int i, err; -+ char *s; -+ struct ssb_mipscore *mcore; -+ -+ err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE, bcm47xx_get_invariants); -+ if (err) { -+ const char *msg = "Failed to initialize SSB bus (err %d)\n"; -+ printk(msg, err); /* Make sure the message gets out of the box. */ -+ panic(msg, err); -+ } -+ mcore = &ssb_bcm47xx.mipscore; - -- err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE, -- bcm47xx_get_invariants); -- if (err) -- panic("Failed to initialize SSB bus (err %d)\n", err); -+ s = nvram_get("kernel_args"); -+ if (s && !strncmp(s, "console=ttyS1", 13)) { -+ struct ssb_serial_port port; -+ -+ printk("Swapping serial ports!\n"); -+ /* swap serial ports */ -+ memcpy(&port, &mcore->serial_ports[0], sizeof(port)); -+ memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1], sizeof(port)); -+ memcpy(&mcore->serial_ports[1], &port, sizeof(port)); -+ } -+ -+ for (i = 0; i < mcore->nr_serial_ports; i++) { -+ struct ssb_serial_port *port = &(mcore->serial_ports[i]); -+ struct uart_port s; -+ -+ memset(&s, 0, sizeof(s)); -+ s.line = i; -+ s.mapbase = (unsigned int) port->regs; -+ s.membase = port->regs; -+ s.irq = port->irq + 2; -+ s.uartclk = port->baud_base; -+ s.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ; -+ s.iotype = SERIAL_IO_MEM; -+ s.regshift = port->reg_shift; -+ -+ early_serial_setup(&s); -+ } -+ printk("Serial init done.\n"); - - _machine_restart = bcm47xx_machine_restart; - _machine_halt = bcm47xx_machine_halt; - pm_power_off = bcm47xx_machine_halt; - } - -+static int __init bcm47xx_register_gpiodev(void) -+{ -+ static struct resource res = { -+ .start = 0xFFFFFFFF, -+ }; -+ struct platform_device *pdev; -+ -+ pdev = platform_device_register_simple("GPIODEV", 0, &res, 1); -+ if (!pdev) { -+ printk(KERN_ERR "bcm47xx: GPIODEV init failed\n"); -+ return -ENODEV; -+ } -+ -+ return 0; -+} -+device_initcall(bcm47xx_register_gpiodev); ---- a/arch/mips/bcm47xx/time.c -+++ b/arch/mips/bcm47xx/time.c -@@ -22,11 +22,17 @@ - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -- - #include -+#include -+#include -+#include -+#include - #include -+#include -+#include - #include --#include -+ -+extern struct ssb_bus ssb_bcm47xx; - - void __init plat_time_init(void) - { diff --git a/target/linux/brcm47xx/patches-2.6.30/601-mips-remove-pci-collision-check.patch b/target/linux/brcm47xx/patches-2.6.30/601-mips-remove-pci-collision-check.patch deleted file mode 100644 index 7860ca0dd..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/601-mips-remove-pci-collision-check.patch +++ /dev/null @@ -1,18 +0,0 @@ ---- a/arch/mips/pci/pci.c -+++ b/arch/mips/pci/pci.c -@@ -185,12 +185,10 @@ static int pcibios_enable_resources(stru - if ((idx == PCI_ROM_RESOURCE) && - (!(r->flags & IORESOURCE_ROM_ENABLE))) - continue; -- if (!r->start && r->end) { -- printk(KERN_ERR "PCI: Device %s not available " -- "because of resource collisions\n", -+ if (!r->start && r->end) -+ printk(KERN_WARNING "PCI: Device %s resource" -+ "collisions detected. Ignoring...\n", - pci_name(dev)); -- return -EINVAL; -- } - if (r->flags & IORESOURCE_IO) - cmd |= PCI_COMMAND_IO; - if (r->flags & IORESOURCE_MEM) diff --git a/target/linux/brcm47xx/patches-2.6.30/700-ssb-gigabit-ethernet-driver.patch b/target/linux/brcm47xx/patches-2.6.30/700-ssb-gigabit-ethernet-driver.patch deleted file mode 100644 index ec40bd8fc..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/700-ssb-gigabit-ethernet-driver.patch +++ /dev/null @@ -1,328 +0,0 @@ ---- a/drivers/net/tg3.c -+++ b/drivers/net/tg3.c -@@ -41,6 +41,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -446,8 +447,9 @@ static void _tw32_flush(struct tg3 *tp, - static inline void tw32_mailbox_flush(struct tg3 *tp, u32 off, u32 val) - { - tp->write32_mbox(tp, off, val); -- if (!(tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER) && -- !(tp->tg3_flags2 & TG3_FLG2_ICH_WORKAROUND)) -+ if ((tp->tg3_flags3 & TG3_FLG3_FLUSH_POSTED_WRITES) || -+ (!(tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER) && -+ !(tp->tg3_flags2 & TG3_FLG2_ICH_WORKAROUND))) - tp->read32_mbox(tp, off); - } - -@@ -457,7 +459,7 @@ static void tg3_write32_tx_mbox(struct t - writel(val, mbox); - if (tp->tg3_flags & TG3_FLAG_TXD_MBOX_HWBUG) - writel(val, mbox); -- if (tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER) -+ if ((tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER) || (tp->tg3_flags3 & TG3_FLG3_FLUSH_POSTED_WRITES)) - readl(mbox); - } - -@@ -729,7 +731,7 @@ static void tg3_switch_clocks(struct tg3 - - #define PHY_BUSY_LOOPS 5000 - --static int tg3_readphy(struct tg3 *tp, int reg, u32 *val) -+static int __tg3_readphy(struct tg3 *tp, unsigned int phy_addr, int reg, u32 *val) - { - u32 frame_val; - unsigned int loops; -@@ -743,7 +745,7 @@ static int tg3_readphy(struct tg3 *tp, i - - *val = 0x0; - -- frame_val = ((PHY_ADDR << MI_COM_PHY_ADDR_SHIFT) & -+ frame_val = ((phy_addr << MI_COM_PHY_ADDR_SHIFT) & - MI_COM_PHY_ADDR_MASK); - frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & - MI_COM_REG_ADDR_MASK); -@@ -778,7 +780,12 @@ static int tg3_readphy(struct tg3 *tp, i - return ret; - } - --static int tg3_writephy(struct tg3 *tp, int reg, u32 val) -+static int tg3_readphy(struct tg3 *tp, int reg, u32 *val) -+{ -+ return __tg3_readphy(tp, PHY_ADDR, reg, val); -+} -+ -+static int __tg3_writephy(struct tg3 *tp, unsigned int phy_addr, int reg, u32 val) - { - u32 frame_val; - unsigned int loops; -@@ -794,7 +801,7 @@ static int tg3_writephy(struct tg3 *tp, - udelay(80); - } - -- frame_val = ((PHY_ADDR << MI_COM_PHY_ADDR_SHIFT) & -+ frame_val = ((phy_addr << MI_COM_PHY_ADDR_SHIFT) & - MI_COM_PHY_ADDR_MASK); - frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & - MI_COM_REG_ADDR_MASK); -@@ -827,6 +834,11 @@ static int tg3_writephy(struct tg3 *tp, - return ret; - } - -+static int tg3_writephy(struct tg3 *tp, int reg, u32 val) -+{ -+ return __tg3_writephy(tp, PHY_ADDR, reg, val); -+} -+ - static int tg3_bmcr_reset(struct tg3 *tp) - { - u32 phy_control; -@@ -2262,6 +2274,9 @@ static int tg3_nvram_read(struct tg3 *tp - { - int ret; - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) -+ return -ENODEV; -+ - if (!(tp->tg3_flags & TG3_FLAG_NVRAM)) - return tg3_nvram_read_using_eeprom(tp, offset, val); - -@@ -2595,8 +2610,10 @@ static int tg3_set_power_state(struct tg - tg3_frob_aux_power(tp); - - /* Workaround for unstable PLL clock */ -- if ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) || -- (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX)) { -+ if ((tp->phy_id & PHY_ID_MASK) != PHY_ID_BCM5750_2 && -+ /* !!! FIXME !!! */ -+ ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) || -+ (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX))) { - u32 val = tr32(0x7d00); - - val &= ~((1 << 16) | (1 << 4) | (1 << 2) | (1 << 1) | 1); -@@ -3088,6 +3105,14 @@ relink: - - tg3_phy_copper_begin(tp); - -+ if (tp->tg3_flags3 & TG3_FLG3_ROBOSWITCH) { -+ current_link_up = 1; -+ current_speed = SPEED_1000; //FIXME -+ current_duplex = DUPLEX_FULL; -+ tp->link_config.active_speed = current_speed; -+ tp->link_config.active_duplex = current_duplex; -+ } -+ - tg3_readphy(tp, MII_BMSR, &tmp); - if (!tg3_readphy(tp, MII_BMSR, &tmp) && - (tmp & BMSR_LSTATUS)) -@@ -6000,6 +6025,11 @@ static int tg3_poll_fw(struct tg3 *tp) - int i; - u32 val; - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) { -+ /* We don't use firmware. */ -+ return 0; -+ } -+ - if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { - /* Wait up to 20ms for init done. */ - for (i = 0; i < 200; i++) { -@@ -6256,6 +6286,14 @@ static int tg3_chip_reset(struct tg3 *tp - tw32(0x5000, 0x400); - } - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) { -+ /* BCM4785: In order to avoid repercussions from using potentially -+ * defective internal ROM, stop the Rx RISC CPU, which is not -+ * required. */ -+ tg3_stop_fw(tp); -+ tg3_halt_cpu(tp, RX_CPU_BASE); -+ } -+ - tw32(GRC_MODE, tp->grc_mode); - - if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) { -@@ -6406,9 +6444,12 @@ static int tg3_halt_cpu(struct tg3 *tp, - return -ENODEV; - } - -- /* Clear firmware's nvram arbitration. */ -- if (tp->tg3_flags & TG3_FLAG_NVRAM) -- tw32(NVRAM_SWARB, SWARB_REQ_CLR0); -+ if (!(tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE)) { -+ /* Clear firmware's nvram arbitration. */ -+ if (tp->tg3_flags & TG3_FLAG_NVRAM) -+ tw32(NVRAM_SWARB, SWARB_REQ_CLR0); -+ } -+ - return 0; - } - -@@ -6471,6 +6512,11 @@ static int tg3_load_5701_a0_firmware_fix - const __be32 *fw_data; - int err, i; - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) { -+ /* We don't use firmware. */ -+ return 0; -+ } -+ - fw_data = (void *)tp->fw->data; - - /* Firmware blob starts with version numbers, followed by -@@ -6530,6 +6576,11 @@ static int tg3_load_tso_firmware(struct - unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size; - int err, i; - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) { -+ /* We don't use firmware. */ -+ return 0; -+ } -+ - if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) - return 0; - -@@ -7435,6 +7486,11 @@ static void tg3_timer(unsigned long __op - - spin_lock(&tp->lock); - -+ if (tp->tg3_flags3 & TG3_FLG3_FLUSH_POSTED_WRITES) { -+ /* BCM4785: Flush posted writes from GbE to host memory. */ -+ tr32(HOSTCC_MODE); -+ } -+ - if (!(tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)) { - /* All of this garbage is because when using non-tagged - * IRQ status the mailbox/status_block protocol the chip -@@ -9201,6 +9257,11 @@ static int tg3_test_nvram(struct tg3 *tp - __be32 *buf; - int i, j, k, err = 0, size; - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) { -+ /* We don't have NVRAM. */ -+ return 0; -+ } -+ - if (tg3_nvram_read(tp, 0, &magic) != 0) - return -EIO; - -@@ -9994,7 +10055,7 @@ static int tg3_ioctl(struct net_device * - return -EAGAIN; - - spin_lock_bh(&tp->lock); -- err = tg3_readphy(tp, data->reg_num & 0x1f, &mii_regval); -+ err = __tg3_readphy(tp, data->phy_id & 0x1f, data->reg_num & 0x1f, &mii_regval); - spin_unlock_bh(&tp->lock); - - data->val_out = mii_regval; -@@ -10013,7 +10074,7 @@ static int tg3_ioctl(struct net_device * - return -EAGAIN; - - spin_lock_bh(&tp->lock); -- err = tg3_writephy(tp, data->reg_num & 0x1f, data->val_in); -+ err = __tg3_writephy(tp, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); - spin_unlock_bh(&tp->lock); - - return err; -@@ -10601,6 +10662,12 @@ static void __devinit tg3_get_57780_nvra - /* Chips other than 5700/5701 use the NVRAM for fetching info. */ - static void __devinit tg3_nvram_init(struct tg3 *tp) - { -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) { -+ /* No NVRAM and EEPROM on the SSB Broadcom GigE core. */ -+ tp->tg3_flags &= ~(TG3_FLAG_NVRAM | TG3_FLAG_NVRAM_BUFFERED); -+ return; -+ } -+ - tw32_f(GRC_EEPROM_ADDR, - (EEPROM_ADDR_FSM_RESET | - (EEPROM_DEFAULT_CLOCK_PERIOD << -@@ -10859,6 +10926,9 @@ static int tg3_nvram_write_block(struct - { - int ret; - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) -+ return -ENODEV; -+ - if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) { - tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl & - ~GRC_LCLCTRL_GPIO_OUTPUT1); -@@ -12099,6 +12169,11 @@ static int __devinit tg3_get_invariants( - GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701))) - tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG; - -+ if (tp->tg3_flags3 & TG3_FLG3_FLUSH_POSTED_WRITES) { -+ tp->write32_tx_mbox = tg3_write_flush_reg32; -+ tp->write32_rx_mbox = tg3_write_flush_reg32; -+ } -+ - /* Get eeprom hw config before calling tg3_set_power_state(). - * In particular, the TG3_FLG2_IS_NIC flag must be - * determined before calling tg3_set_power_state() so that -@@ -12474,6 +12549,10 @@ static int __devinit tg3_get_device_addr - } - - if (!is_valid_ether_addr(&dev->dev_addr[0])) { -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) -+ ssb_gige_get_macaddr(tp->pdev, &dev->dev_addr[0]); -+ } -+ if (!is_valid_ether_addr(&dev->dev_addr[0])) { - #ifdef CONFIG_SPARC - if (!tg3_get_default_macaddr_sparc(tp)) - return 0; -@@ -12965,6 +13044,7 @@ static char * __devinit tg3_phy_string(s - case PHY_ID_BCM5704: return "5704"; - case PHY_ID_BCM5705: return "5705"; - case PHY_ID_BCM5750: return "5750"; -+ case PHY_ID_BCM5750_2: return "5750-2"; - case PHY_ID_BCM5752: return "5752"; - case PHY_ID_BCM5714: return "5714"; - case PHY_ID_BCM5780: return "5780"; -@@ -13175,6 +13255,13 @@ static int __devinit tg3_init_one(struct - tp->msg_enable = tg3_debug; - else - tp->msg_enable = TG3_DEF_MSG_ENABLE; -+ if (pdev_is_ssb_gige_core(pdev)) { -+ tp->tg3_flags3 |= TG3_FLG3_IS_SSB_CORE; -+ if (ssb_gige_must_flush_posted_writes(pdev)) -+ tp->tg3_flags3 |= TG3_FLG3_FLUSH_POSTED_WRITES; -+ if (ssb_gige_have_roboswitch(pdev)) -+ tp->tg3_flags3 |= TG3_FLG3_ROBOSWITCH; -+ } - - /* The word/byte swap controls here control register access byte - * swapping. DMA data byte swapping is controlled in the GRC_MODE ---- a/drivers/net/tg3.h -+++ b/drivers/net/tg3.h -@@ -1849,6 +1849,9 @@ - #define NIC_SRAM_RGMII_STD_IBND_DISABLE 0x00000004 - #define NIC_SRAM_RGMII_EXT_IBND_RX_EN 0x00000008 - #define NIC_SRAM_RGMII_EXT_IBND_TX_EN 0x00000010 -+#define TG3_FLG3_IS_SSB_CORE 0x00000800 -+#define TG3_FLG3_FLUSH_POSTED_WRITES 0x00001000 -+#define TG3_FLG3_ROBOSWITCH 0x00002000 - - #define NIC_SRAM_RX_MINI_BUFFER_DESC 0x00001000 - -@@ -2695,6 +2698,7 @@ struct tg3 { - #define PHY_ID_BCM5714 0x60008340 - #define PHY_ID_BCM5780 0x60008350 - #define PHY_ID_BCM5755 0xbc050cc0 -+#define PHY_ID_BCM5750_2 0xbc050cd0 - #define PHY_ID_BCM5787 0xbc050ce0 - #define PHY_ID_BCM5756 0xbc050ed0 - #define PHY_ID_BCM5784 0xbc050fa0 -@@ -2739,7 +2743,7 @@ struct tg3 { - (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \ - (X) == PHY_ID_BCM5755 || (X) == PHY_ID_BCM5756 || \ - (X) == PHY_ID_BCM5906 || (X) == PHY_ID_BCM5761 || \ -- (X) == PHY_ID_BCM8002) -+ (X) == PHY_ID_BCM8002 || (X) == PHY_ID_BCM5750_2) - - struct tg3_hw_stats *hw_stats; - dma_addr_t stats_mapping; diff --git a/target/linux/brcm47xx/patches-2.6.30/800-fix_cfe_detection.patch b/target/linux/brcm47xx/patches-2.6.30/800-fix_cfe_detection.patch deleted file mode 100644 index 50f911437..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/800-fix_cfe_detection.patch +++ /dev/null @@ -1,108 +0,0 @@ ---- a/arch/mips/bcm47xx/prom.c -+++ b/arch/mips/bcm47xx/prom.c -@@ -32,6 +32,7 @@ - #include - - static int cfe_cons_handle; -+static void (* __prom_putchar)(char c); - - const char *get_system_type(void) - { -@@ -40,65 +41,40 @@ const char *get_system_type(void) - - void prom_putchar(char c) - { -+ if (__prom_putchar) -+ __prom_putchar(c); -+} -+ -+void prom_putchar_cfe(char c) -+{ - while (cfe_write(cfe_cons_handle, &c, 1) == 0) - ; - } - --static __init void prom_init_cfe(void) -+static __init int prom_init_cfe(void) - { - uint32_t cfe_ept; - uint32_t cfe_handle; - uint32_t cfe_eptseal; -- int argc = fw_arg0; -- char **envp = (char **) fw_arg2; -- int *prom_vec = (int *) fw_arg3; -- -- /* -- * Check if a loader was used; if NOT, the 4 arguments are -- * what CFE gives us (handle, 0, EPT and EPTSEAL) -- */ -- if (argc < 0) { -- cfe_handle = (uint32_t)argc; -- cfe_ept = (uint32_t)envp; -- cfe_eptseal = (uint32_t)prom_vec; -- } else { -- if ((int)prom_vec < 0) { -- /* -- * Old loader; all it gives us is the handle, -- * so use the "known" entrypoint and assume -- * the seal. -- */ -- cfe_handle = (uint32_t)prom_vec; -- cfe_ept = 0xBFC00500; -- cfe_eptseal = CFE_EPTSEAL; -- } else { -- /* -- * Newer loaders bundle the handle/ept/eptseal -- * Note: prom_vec is in the loader's useg -- * which is still alive in the TLB. -- */ -- cfe_handle = prom_vec[0]; -- cfe_ept = prom_vec[2]; -- cfe_eptseal = prom_vec[3]; -- } -- } - -- if (cfe_eptseal != CFE_EPTSEAL) { -- /* too early for panic to do any good */ -- printk(KERN_ERR "CFE's entrypoint seal doesn't match."); -- while (1) ; -- } -+ cfe_eptseal = (uint32_t) fw_arg3; -+ cfe_handle = (uint32_t) fw_arg0; -+ cfe_ept = (uint32_t) fw_arg2; -+ -+ if (cfe_eptseal != CFE_EPTSEAL) -+ return -1; - - cfe_init(cfe_handle, cfe_ept); -+ return 0; - } - --static __init void prom_init_console(void) -+static __init void prom_init_console_cfe(void) - { - /* Initialize CFE console */ - cfe_cons_handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE); - } - --static __init void prom_init_cmdline(void) -+static __init void prom_init_cmdline_cfe(void) - { - char buf[CL_SIZE]; - -@@ -160,9 +136,12 @@ static __init void prom_init_mem(void) - - void __init prom_init(void) - { -- prom_init_cfe(); -- prom_init_console(); -- prom_init_cmdline(); -+ if (prom_init_cfe() == 0) { -+ //prom_init_console_cfe(); -+ //prom_init_cmdline_cfe(); -+ __prom_putchar = prom_putchar_cfe; -+ } -+ - prom_init_mem(); - } - diff --git a/target/linux/brcm47xx/patches-2.6.30/812-disable_wgt634u_crap.patch b/target/linux/brcm47xx/patches-2.6.30/812-disable_wgt634u_crap.patch deleted file mode 100644 index eb212f3d1..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/812-disable_wgt634u_crap.patch +++ /dev/null @@ -1,178 +0,0 @@ ---- a/arch/mips/bcm47xx/Makefile -+++ b/arch/mips/bcm47xx/Makefile -@@ -3,4 +3,4 @@ - # under Linux. - # - --obj-y := cfe_env.o gpio.o irq.o nvram.o prom.o serial.o setup.o time.o wgt634u.o -+obj-y := cfe_env.o gpio.o irq.o nvram.o prom.o serial.o setup.o time.o ---- a/arch/mips/bcm47xx/wgt634u.c -+++ /dev/null -@@ -1,167 +0,0 @@ --/* -- * This file is subject to the terms and conditions of the GNU General Public -- * License. See the file "COPYING" in the main directory of this archive -- * for more details. -- * -- * Copyright (C) 2007 Aurelien Jarno -- */ -- --#include --#include --#include --#include --#include --#include --#include --#include --#include -- --/* GPIO definitions for the WGT634U */ --#define WGT634U_GPIO_LED 3 --#define WGT634U_GPIO_RESET 2 --#define WGT634U_GPIO_TP1 7 --#define WGT634U_GPIO_TP2 6 --#define WGT634U_GPIO_TP3 5 --#define WGT634U_GPIO_TP4 4 --#define WGT634U_GPIO_TP5 1 -- --static struct gpio_led wgt634u_leds[] = { -- { -- .name = "power", -- .gpio = WGT634U_GPIO_LED, -- .active_low = 1, -- .default_trigger = "heartbeat", -- }, --}; -- --static struct gpio_led_platform_data wgt634u_led_data = { -- .num_leds = ARRAY_SIZE(wgt634u_leds), -- .leds = wgt634u_leds, --}; -- --static struct platform_device wgt634u_gpio_leds = { -- .name = "leds-gpio", -- .id = -1, -- .dev = { -- .platform_data = &wgt634u_led_data, -- } --}; -- -- --/* 8MiB flash. The struct mtd_partition matches original Netgear WGT634U -- firmware. */ --static struct mtd_partition wgt634u_partitions[] = { -- { -- .name = "cfe", -- .offset = 0, -- .size = 0x60000, /* 384k */ -- .mask_flags = MTD_WRITEABLE /* force read-only */ -- }, -- { -- .name = "config", -- .offset = 0x60000, -- .size = 0x20000 /* 128k */ -- }, -- { -- .name = "linux", -- .offset = 0x80000, -- .size = 0x140000 /* 1280k */ -- }, -- { -- .name = "jffs", -- .offset = 0x1c0000, -- .size = 0x620000 /* 6272k */ -- }, -- { -- .name = "nvram", -- .offset = 0x7e0000, -- .size = 0x20000 /* 128k */ -- }, --}; -- --static struct physmap_flash_data wgt634u_flash_data = { -- .parts = wgt634u_partitions, -- .nr_parts = ARRAY_SIZE(wgt634u_partitions) --}; -- --static struct resource wgt634u_flash_resource = { -- .flags = IORESOURCE_MEM, --}; -- --static struct platform_device wgt634u_flash = { -- .name = "physmap-flash", -- .id = 0, -- .dev = { .platform_data = &wgt634u_flash_data, }, -- .resource = &wgt634u_flash_resource, -- .num_resources = 1, --}; -- --/* Platform devices */ --static struct platform_device *wgt634u_devices[] __initdata = { -- &wgt634u_flash, -- &wgt634u_gpio_leds, --}; -- --static irqreturn_t gpio_interrupt(int irq, void *ignored) --{ -- int state; -- -- /* Interrupts are shared, check if the current one is -- a GPIO interrupt. */ -- if (!ssb_chipco_irq_status(&ssb_bcm47xx.chipco, -- SSB_CHIPCO_IRQ_GPIO)) -- return IRQ_NONE; -- -- state = gpio_get_value(WGT634U_GPIO_RESET); -- -- /* Interrupt are level triggered, revert the interrupt polarity -- to clear the interrupt. */ -- gpio_polarity(WGT634U_GPIO_RESET, state); -- -- if (!state) { -- printk(KERN_INFO "Reset button pressed"); -- ctrl_alt_del(); -- } -- -- return IRQ_HANDLED; --} -- --static int __init wgt634u_init(void) --{ -- /* There is no easy way to detect that we are running on a WGT634U -- * machine. Use the MAC address as an heuristic. Netgear Inc. has -- * been allocated ranges 00:09:5b:xx:xx:xx and 00:0f:b5:xx:xx:xx. -- */ -- -- u8 *et0mac = ssb_bcm47xx.sprom.et0mac; -- -- if (et0mac[0] == 0x00 && -- ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) || -- (et0mac[1] == 0x0f && et0mac[2] == 0xb5))) { -- struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore; -- -- printk(KERN_INFO "WGT634U machine detected.\n"); -- -- if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET), -- gpio_interrupt, IRQF_SHARED, -- "WGT634U GPIO", &ssb_bcm47xx.chipco)) { -- gpio_direction_input(WGT634U_GPIO_RESET); -- gpio_intmask(WGT634U_GPIO_RESET, 1); -- ssb_chipco_irq_mask(&ssb_bcm47xx.chipco, -- SSB_CHIPCO_IRQ_GPIO, -- SSB_CHIPCO_IRQ_GPIO); -- } -- -- wgt634u_flash_data.width = mcore->flash_buswidth; -- wgt634u_flash_resource.start = mcore->flash_window; -- wgt634u_flash_resource.end = mcore->flash_window -- + mcore->flash_window_size -- - 1; -- return platform_add_devices(wgt634u_devices, -- ARRAY_SIZE(wgt634u_devices)); -- } else -- return -ENODEV; --} -- --module_init(wgt634u_init); -- diff --git a/target/linux/brcm47xx/patches-2.6.30/813-use_netdev_alloc_skb.patch b/target/linux/brcm47xx/patches-2.6.30/813-use_netdev_alloc_skb.patch deleted file mode 100644 index c431e4096..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/813-use_netdev_alloc_skb.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/drivers/net/b44.c -+++ b/drivers/net/b44.c -@@ -815,7 +815,7 @@ static int b44_rx(struct b44 *bp, int bu - struct sk_buff *copy_skb; - - b44_recycle_rx(bp, cons, bp->rx_prod); -- copy_skb = dev_alloc_skb(len + 2); -+ copy_skb = netdev_alloc_skb(bp->dev, len + 2); - if (copy_skb == NULL) - goto drop_it_no_recycle; - diff --git a/target/linux/brcm47xx/patches-2.6.30/815-watchdog.patch b/target/linux/brcm47xx/patches-2.6.30/815-watchdog.patch deleted file mode 100644 index 3d2b2a8df..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/815-watchdog.patch +++ /dev/null @@ -1,326 +0,0 @@ -This add watchdog driver for broadcom 47xx device. -It uses the ssb subsytem to access embeded watchdog device. - -Because the watchdog timeout is very short (about 2s), a soft timer is used -to increase the watchdog period. - -Note : A patch for exporting the ssb_watchdog_timer_set will -be submitted on next linux-mips merge. Without this patch it can't -be build as a module. - -Signed-off-by: Aleksandar Radovanovic -Signed-off-by: Matthieu CASTET ---- a/drivers/watchdog/Kconfig -+++ b/drivers/watchdog/Kconfig -@@ -764,6 +764,12 @@ config TXX9_WDT - help - Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs. - -+config BCM47XX_WDT -+ tristate "Broadcom BCM47xx Watchdog Timer" -+ depends on BCM47XX -+ help -+ Hardware driver for the Broadcom BCM47xx Watchog Timer. -+ - # PARISC Architecture - - # POWERPC Architecture ---- a/drivers/watchdog/Makefile -+++ b/drivers/watchdog/Makefile -@@ -105,6 +105,7 @@ obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o - obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o - obj-$(CONFIG_AR7_WDT) += ar7_wdt.o - obj-$(CONFIG_TXX9_WDT) += txx9wdt.o -+obj-$(CONFIG_BCM47XX_WDT) += bcm47xx_wdt.o - - # PARISC Architecture - ---- /dev/null -+++ b/drivers/watchdog/bcm47xx_wdt.c -@@ -0,0 +1,286 @@ -+/* -+ * Watchdog driver for Broadcom BCM47XX -+ * -+ * Copyright (C) 2008 Aleksandar Radovanovic -+ * Copyright (C) 2009 Matthieu CASTET -+ * -+ * This program is free software; you can redistribute it and/or -+ * modify it under the terms of the GNU General Public License -+ * as published by the Free Software Foundation; either version -+ * 2 of the License, or (at your option) any later version. -+ */ -+ -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+#include -+ -+#define DRV_NAME "bcm47xx_wdt" -+ -+#define WDT_DEFAULT_TIME 30 /* seconds */ -+#define WDT_MAX_TIME 256 /* seconds */ -+ -+static int wdt_time = WDT_DEFAULT_TIME; -+static int nowayout = WATCHDOG_NOWAYOUT; -+ -+module_param(wdt_time, int, 0); -+MODULE_PARM_DESC(wdt_time, "Watchdog time in seconds. (default=" -+ __MODULE_STRING(WDT_DEFAULT_TIME) ")"); -+ -+#ifdef CONFIG_WATCHDOG_NOWAYOUT -+module_param(nowayout, int, 0); -+MODULE_PARM_DESC(nowayout, -+ "Watchdog cannot be stopped once started (default=" -+ __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); -+#endif -+ -+static unsigned long bcm47xx_wdt_busy; -+static char expect_release; -+static struct timer_list wdt_timer; -+static atomic_t ticks; -+ -+static inline void bcm47xx_wdt_hw_start(void) -+{ -+ /* this is 2,5s on 100Mhz clock and 2s on 133 Mhz */ -+ ssb_watchdog_timer_set(&ssb_bcm47xx, 0xfffffff); -+} -+ -+static inline int bcm47xx_wdt_hw_stop(void) -+{ -+ return ssb_watchdog_timer_set(&ssb_bcm47xx, 0); -+} -+ -+static void bcm47xx_timer_tick(unsigned long unused) -+{ -+ if (!atomic_dec_and_test(&ticks)) { -+ bcm47xx_wdt_hw_start(); -+ mod_timer(&wdt_timer, jiffies + HZ); -+ } else { -+ printk(KERN_CRIT DRV_NAME "Watchdog will fire soon!!!\n"); -+ } -+} -+ -+static inline void bcm47xx_wdt_pet(void) -+{ -+ atomic_set(&ticks, wdt_time); -+} -+ -+static void bcm47xx_wdt_start(void) -+{ -+ bcm47xx_wdt_pet(); -+ bcm47xx_timer_tick(0); -+} -+ -+static void bcm47xx_wdt_pause(void) -+{ -+ del_timer_sync(&wdt_timer); -+ bcm47xx_wdt_hw_stop(); -+} -+ -+static void bcm47xx_wdt_stop(void) -+{ -+ bcm47xx_wdt_pause(); -+} -+ -+static int bcm47xx_wdt_settimeout(int new_time) -+{ -+ if ((new_time <= 0) || (new_time > WDT_MAX_TIME)) -+ return -EINVAL; -+ -+ wdt_time = new_time; -+ return 0; -+} -+ -+static int bcm47xx_wdt_open(struct inode *inode, struct file *file) -+{ -+ if (test_and_set_bit(0, &bcm47xx_wdt_busy)) -+ return -EBUSY; -+ -+ bcm47xx_wdt_start(); -+ return nonseekable_open(inode, file); -+} -+ -+static int bcm47xx_wdt_release(struct inode *inode, struct file *file) -+{ -+ if (expect_release == 42) { -+ bcm47xx_wdt_stop(); -+ } else { -+ printk(KERN_CRIT DRV_NAME -+ ": Unexpected close, not stopping watchdog!\n"); -+ bcm47xx_wdt_start(); -+ } -+ -+ clear_bit(0, &bcm47xx_wdt_busy); -+ expect_release = 0; -+ return 0; -+} -+ -+static ssize_t bcm47xx_wdt_write(struct file *file, const char __user *data, -+ size_t len, loff_t *ppos) -+{ -+ if (len) { -+ if (!nowayout) { -+ size_t i; -+ -+ expect_release = 0; -+ -+ for (i = 0; i != len; i++) { -+ char c; -+ if (get_user(c, data + i)) -+ return -EFAULT; -+ if (c == 'V') -+ expect_release = 42; -+ } -+ } -+ bcm47xx_wdt_pet(); -+ } -+ return len; -+} -+ -+static struct watchdog_info bcm47xx_wdt_info = { -+ .identity = DRV_NAME, -+ .options = WDIOF_SETTIMEOUT | -+ WDIOF_KEEPALIVEPING | -+ WDIOF_MAGICCLOSE, -+}; -+ -+static long bcm47xx_wdt_ioctl(struct file *file, -+ unsigned int cmd, unsigned long arg) -+{ -+ void __user *argp = (void __user *)arg; -+ int __user *p = argp; -+ int new_value, retval = -EINVAL;; -+ -+ switch (cmd) { -+ case WDIOC_GETSUPPORT: -+ return copy_to_user(argp, &bcm47xx_wdt_info, -+ sizeof(bcm47xx_wdt_info)) ? -EFAULT : 0; -+ -+ case WDIOC_GETSTATUS: -+ case WDIOC_GETBOOTSTATUS: -+ return put_user(0, p); -+ -+ case WDIOC_SETOPTIONS: -+ if (get_user(new_value, p)) -+ return -EFAULT; -+ -+ if (new_value & WDIOS_DISABLECARD) { -+ bcm47xx_wdt_stop(); -+ retval = 0; -+ } -+ -+ if (new_value & WDIOS_ENABLECARD) { -+ bcm47xx_wdt_start(); -+ retval = 0; -+ } -+ -+ return retval; -+ -+ case WDIOC_KEEPALIVE: -+ bcm47xx_wdt_pet(); -+ return 0; -+ -+ case WDIOC_SETTIMEOUT: -+ if (get_user(new_value, p)) -+ return -EFAULT; -+ -+ if (bcm47xx_wdt_settimeout(new_value)) -+ return -EINVAL; -+ -+ bcm47xx_wdt_pet(); -+ -+ case WDIOC_GETTIMEOUT: -+ return put_user(wdt_time, p); -+ -+ default: -+ return -ENOTTY; -+ } -+} -+ -+static int bcm47xx_wdt_notify_sys(struct notifier_block *this, -+ unsigned long code, void *unused) -+{ -+ if (code == SYS_DOWN || code == SYS_HALT) -+ bcm47xx_wdt_stop(); -+ return NOTIFY_DONE; -+} -+ -+static const struct file_operations bcm47xx_wdt_fops = { -+ .owner = THIS_MODULE, -+ .llseek = no_llseek, -+ .unlocked_ioctl = bcm47xx_wdt_ioctl, -+ .open = bcm47xx_wdt_open, -+ .release = bcm47xx_wdt_release, -+ .write = bcm47xx_wdt_write, -+}; -+ -+static struct miscdevice bcm47xx_wdt_miscdev = { -+ .minor = WATCHDOG_MINOR, -+ .name = "watchdog", -+ .fops = &bcm47xx_wdt_fops, -+}; -+ -+static struct notifier_block bcm47xx_wdt_notifier = { -+ .notifier_call = bcm47xx_wdt_notify_sys, -+}; -+ -+static int __init bcm47xx_wdt_init(void) -+{ -+ int ret; -+ -+ if (bcm47xx_wdt_hw_stop() < 0) -+ return -ENODEV; -+ -+ setup_timer(&wdt_timer, bcm47xx_timer_tick, 0L); -+ -+ if (bcm47xx_wdt_settimeout(wdt_time)) { -+ bcm47xx_wdt_settimeout(WDT_DEFAULT_TIME); -+ printk(KERN_INFO DRV_NAME -+ ": wdt_time value must be 1 <= wdt_time <= 256, using %d\n", -+ wdt_time); -+ } -+ -+ ret = register_reboot_notifier(&bcm47xx_wdt_notifier); -+ if (ret) -+ return ret; -+ -+ ret = misc_register(&bcm47xx_wdt_miscdev); -+ if (ret) { -+ unregister_reboot_notifier(&bcm47xx_wdt_notifier); -+ return ret; -+ } -+ -+ printk(KERN_INFO "BCM47xx Watchdog Timer enabled (%d seconds%s)\n", -+ wdt_time, nowayout ? ", nowayout" : ""); -+ return 0; -+} -+ -+static void __exit bcm47xx_wdt_exit(void) -+{ -+ if (!nowayout) -+ bcm47xx_wdt_stop(); -+ -+ misc_deregister(&bcm47xx_wdt_miscdev); -+ -+ unregister_reboot_notifier(&bcm47xx_wdt_notifier); -+} -+ -+module_init(bcm47xx_wdt_init); -+module_exit(bcm47xx_wdt_exit); -+ -+MODULE_AUTHOR("Aleksandar Radovanovic"); -+MODULE_DESCRIPTION("Watchdog driver for Broadcom BCM47xx"); -+MODULE_LICENSE("GPL"); -+MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); diff --git a/target/linux/brcm47xx/patches-2.6.30/816-ssb_fix_irq_setup.patch b/target/linux/brcm47xx/patches-2.6.30/816-ssb_fix_irq_setup.patch deleted file mode 100644 index 05c36517d..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/816-ssb_fix_irq_setup.patch +++ /dev/null @@ -1,183 +0,0 @@ -the current ssb irq setup (in ssb_mipscore_init) have some problem : -it configure some device on some irq without checking that the irq is not taken by an other device. - -For example in my case PCI host is on irq 0 and IPSEC on irq 3. -The current code : -- store in dev->irq that IPSEC irq is 3+2 -- do a set_irq 0->3 on PCI host - -But now IPSEC irq is not routed anymore to the mips code and dev->irq is wrong. This cause problem described in [1]. - -This patch try to solve the problem by making set_irq configure the device we want to take the irq on the shared irq0. -The previous example become : -- store in dev->irq that IPSEC irq is 3+2 -- do a set_irq 0->3 on PCI host : - - irq 3 is already taken by IPSEC. do a set_irq 3->0 on IPSEC - - -I also added some code to print the irq configuration before and after irq setup to allow easier debugging. And I add extra checking in ssb_mips_irq to report device without irq or device with not routed irq. - - -[1] http://www.danm.de/files/src/bcm5365p/REPORTED_DEVICES - -Signed-off-by: Matthieu CASTET ---- a/drivers/ssb/driver_mipscore.c -+++ b/drivers/ssb/driver_mipscore.c -@@ -49,29 +49,54 @@ static const u32 ipsflag_irq_shift[] = { - - static inline u32 ssb_irqflag(struct ssb_device *dev) - { -- return ssb_read32(dev, SSB_TPSFLAG) & SSB_TPSFLAG_BPFLAG; -+ u32 tpsflag = ssb_read32(dev, SSB_TPSFLAG); -+ if (tpsflag) -+ return ssb_read32(dev, SSB_TPSFLAG) & SSB_TPSFLAG_BPFLAG; -+ else -+ /* not irq supported */ -+ return 0x3f; -+} -+ -+static struct ssb_device *find_device(struct ssb_device *rdev, int irqflag) -+{ -+ struct ssb_bus *bus = rdev->bus; -+ int i; -+ for (i = 0; i < bus->nr_devices; i++) { -+ struct ssb_device *dev; -+ dev = &(bus->devices[i]); -+ if (ssb_irqflag(dev) == irqflag) -+ return dev; -+ } -+ return NULL; - } - - /* Get the MIPS IRQ assignment for a specified device. - * If unassigned, 0 is returned. -+ * If disabled, 5 is returned. -+ * If not supported, 6 is returned. - */ - unsigned int ssb_mips_irq(struct ssb_device *dev) - { - struct ssb_bus *bus = dev->bus; -+ struct ssb_device *mdev = bus->mipscore.dev; - u32 irqflag; - u32 ipsflag; - u32 tmp; - unsigned int irq; - - irqflag = ssb_irqflag(dev); -+ if (irqflag == 0x3f) -+ return 6; - ipsflag = ssb_read32(bus->mipscore.dev, SSB_IPSFLAG); - for (irq = 1; irq <= 4; irq++) { - tmp = ((ipsflag & ipsflag_irq_mask[irq]) >> ipsflag_irq_shift[irq]); - if (tmp == irqflag) - break; - } -- if (irq == 5) -- irq = 0; -+ if (irq == 5) { -+ if ((1 << irqflag) & ssb_read32(mdev, SSB_INTVEC)) -+ irq = 0; -+ } - - return irq; - } -@@ -97,25 +122,56 @@ static void set_irq(struct ssb_device *d - struct ssb_device *mdev = bus->mipscore.dev; - u32 irqflag = ssb_irqflag(dev); - -+ BUG_ON(oldirq == 6); -+ - dev->irq = irq + 2; - -- ssb_dprintk(KERN_INFO PFX -- "set_irq: core 0x%04x, irq %d => %d\n", -- dev->id.coreid, oldirq, irq); - /* clear the old irq */ - if (oldirq == 0) - ssb_write32(mdev, SSB_INTVEC, (~(1 << irqflag) & ssb_read32(mdev, SSB_INTVEC))); -- else -+ else if (oldirq != 5) - clear_irq(bus, oldirq); - - /* assign the new one */ - if (irq == 0) { - ssb_write32(mdev, SSB_INTVEC, ((1 << irqflag) | ssb_read32(mdev, SSB_INTVEC))); - } else { -+ u32 ipsflag = ssb_read32(mdev, SSB_IPSFLAG); -+ if ((ipsflag & ipsflag_irq_mask[irq]) != ipsflag_irq_mask[irq]) { -+ u32 oldipsflag = (ipsflag & ipsflag_irq_mask[irq]) >> ipsflag_irq_shift[irq]; -+ struct ssb_device *olddev = find_device(dev, oldipsflag); -+ if (olddev) -+ set_irq(olddev, 0); -+ } - irqflag <<= ipsflag_irq_shift[irq]; -- irqflag |= (ssb_read32(mdev, SSB_IPSFLAG) & ~ipsflag_irq_mask[irq]); -+ irqflag |= (ipsflag & ~ipsflag_irq_mask[irq]); - ssb_write32(mdev, SSB_IPSFLAG, irqflag); - } -+ ssb_dprintk(KERN_INFO PFX -+ "set_irq: core 0x%04x, irq %d => %d\n", -+ dev->id.coreid, oldirq+2, irq+2); -+} -+ -+static void print_irq(struct ssb_device *dev, unsigned int irq) -+{ -+ int i; -+ static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"}; -+ ssb_dprintk(KERN_INFO PFX -+ "core 0x%04x, irq :", dev->id.coreid); -+ for (i = 0; i <= 6; i++) { -+ ssb_dprintk(" %s%s", irq_name[i], i==irq?"*":" "); -+ } -+ ssb_dprintk("\n"); -+} -+ -+static void dump_irq(struct ssb_bus *bus) -+{ -+ int i; -+ for (i = 0; i < bus->nr_devices; i++) { -+ struct ssb_device *dev; -+ dev = &(bus->devices[i]); -+ print_irq(dev, ssb_mips_irq(dev)); -+ } - } - - static void ssb_mips_serial_init(struct ssb_mipscore *mcore) -@@ -197,18 +253,26 @@ void ssb_mipscore_init(struct ssb_mipsco - else if (bus->chipco.dev) - ssb_chipco_timing_init(&bus->chipco, ns); - -+ dump_irq(bus); - /* Assign IRQs to all cores on the bus, start with irq line 2, because serial usually takes 1 */ - for (irq = 2, i = 0; i < bus->nr_devices; i++) { -+ int mips_irq; - dev = &(bus->devices[i]); -- dev->irq = ssb_mips_irq(dev) + 2; -+ mips_irq = ssb_mips_irq(dev); -+ if (mips_irq > 4) -+ dev->irq = 0; -+ else -+ dev->irq = mips_irq + 2; -+ if (dev->irq > 5) -+ continue; - switch (dev->id.coreid) { - case SSB_DEV_USB11_HOST: - /* shouldn't need a separate irq line for non-4710, most of them have a proper - * external usb controller on the pci */ - if ((bus->chip_id == 0x4710) && (irq <= 4)) { - set_irq(dev, irq++); -- break; - } -+ break; - /* fallthrough */ - case SSB_DEV_PCI: - case SSB_DEV_ETHERNET: -@@ -222,6 +286,8 @@ void ssb_mipscore_init(struct ssb_mipsco - } - } - } -+ ssb_dprintk(KERN_INFO PFX "after irq reconfiguration\n"); -+ dump_irq(bus); - - ssb_mips_serial_init(mcore); - ssb_mips_flash_detect(mcore); diff --git a/target/linux/brcm47xx/patches-2.6.30/900-disable_early_printk.patch b/target/linux/brcm47xx/patches-2.6.30/900-disable_early_printk.patch deleted file mode 100644 index 3f1aeef8d..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/900-disable_early_printk.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -56,7 +56,6 @@ config BCM47XX - select SSB_B43_PCI_BRIDGE if PCI - select SSB_PCICORE_HOSTMODE if PCI - select GENERIC_GPIO -- select SYS_HAS_EARLY_PRINTK - select CFE - help - Support for BCM47XX based boards diff --git a/target/linux/brcm47xx/patches-2.6.30/920-cache-wround.patch b/target/linux/brcm47xx/patches-2.6.30/920-cache-wround.patch deleted file mode 100644 index e9b37e7b5..000000000 --- a/target/linux/brcm47xx/patches-2.6.30/920-cache-wround.patch +++ /dev/null @@ -1,135 +0,0 @@ ---- a/arch/mips/include/asm/r4kcache.h -+++ b/arch/mips/include/asm/r4kcache.h -@@ -20,10 +20,25 @@ - #ifdef CONFIG_BCM47XX - #include - #include --#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE + SSB_IMSTATE))) -+#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg() -+ -+static inline unsigned long bcm4710_dummy_rreg(void) { -+ return (*(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE + SSB_IMSTATE))); -+} -+ -+#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void*)(addr)) -+ -+static inline unsigned long bcm4710_fill_tlb(void *addr) { -+ return (*(unsigned long *)addr); -+} -+ -+#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void*)(addr)) -+ -+static inline void bcm4710_protected_fill_tlb(void *addr) { -+ unsigned long x; -+ get_dbe(x, (unsigned long *)addr);; -+} - --#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr)) --#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); }) - #else - #define BCM4710_DUMMY_RREG() - ---- a/arch/mips/mm/tlbex.c -+++ b/arch/mips/mm/tlbex.c -@@ -544,6 +544,9 @@ build_get_pgde32(u32 **p, unsigned int t - #endif - uasm_i_addu(p, ptr, tmp, ptr); - #else -+#ifdef CONFIG_BCM47XX -+ uasm_i_nop(p); -+#endif - UASM_i_LA_mostly(p, ptr, pgdc); - #endif - uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */ -@@ -674,12 +677,12 @@ static void __cpuinit build_r4000_tlb_re - /* No need for uasm_i_nop */ - } - --#ifdef CONFIG_BCM47XX -- uasm_i_nop(&p); --#endif - #ifdef CONFIG_64BIT - build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ - #else -+# ifdef CONFIG_BCM47XX -+ uasm_i_nop(&p); -+# endif - build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ - #endif - -@@ -687,6 +690,9 @@ static void __cpuinit build_r4000_tlb_re - build_update_entries(&p, K0, K1); - build_tlb_write_entry(&p, &l, &r, tlb_random); - uasm_l_leave(&l, p); -+#ifdef CONFIG_BCM47XX -+ uasm_i_nop(&p); -+#endif - uasm_i_eret(&p); /* return from trap */ - - #ifdef CONFIG_64BIT -@@ -1084,12 +1090,12 @@ build_r4000_tlbchange_handler_head(u32 * - struct uasm_reloc **r, unsigned int pte, - unsigned int ptr) - { --#ifdef CONFIG_BCM47XX -- uasm_i_nop(p); --#endif - #ifdef CONFIG_64BIT - build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */ - #else -+# ifdef CONFIG_BCM47XX -+ uasm_i_nop(p); -+# endif - build_get_pgde32(p, pte, ptr); /* get pgd in ptr */ - #endif - -@@ -1117,6 +1123,9 @@ build_r4000_tlbchange_handler_tail(u32 * - build_update_entries(p, tmp, ptr); - build_tlb_write_entry(p, l, r, tlb_indexed); - uasm_l_leave(l, *p); -+#ifdef CONFIG_BCM47XX -+ uasm_i_nop(p); -+#endif - uasm_i_eret(p); /* return from trap */ - - #ifdef CONFIG_64BIT ---- a/arch/mips/kernel/genex.S -+++ b/arch/mips/kernel/genex.S -@@ -22,6 +22,19 @@ - #include - #include - -+#ifdef CONFIG_BCM47XX -+# ifdef eret -+# undef eret -+# endif -+# define eret \ -+ .set push; \ -+ .set noreorder; \ -+ nop; \ -+ nop; \ -+ eret; \ -+ .set pop; -+#endif -+ - #define PANIC_PIC(msg) \ - .set push; \ - .set reorder; \ -@@ -54,7 +67,6 @@ NESTED(except_vec3_generic, 0, sp) - .set noat - #ifdef CONFIG_BCM47XX - nop -- nop - #endif - #if R5432_CP0_INTERRUPT_WAR - mfc0 k0, CP0_INDEX -@@ -79,6 +91,9 @@ NESTED(except_vec3_r4000, 0, sp) - .set push - .set mips3 - .set noat -+#ifdef CONFIG_BCM47XX -+ nop -+#endif - mfc0 k1, CP0_CAUSE - li k0, 31<<2 - andi k1, k1, 0x7c diff --git a/target/linux/brcm47xx/patches-2.6.31/110-flash_map.patch b/target/linux/brcm47xx/patches-2.6.31/110-flash_map.patch deleted file mode 100644 index a2c3fab79..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/110-flash_map.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/mtd/maps/Kconfig -+++ b/drivers/mtd/maps/Kconfig -@@ -327,6 +327,12 @@ config MTD_CFI_FLAGADM - Mapping for the Flaga digital module. If you don't have one, ignore - this setting. - -+config MTD_BCM47XX -+ tristate "BCM47xx flash device" -+ depends on MIPS && MTD_CFI && BCM47XX -+ help -+ Support for the flash chips on the BCM947xx board. -+ - config MTD_REDWOOD - tristate "CFI Flash devices mapped on IBM Redwood" - depends on MTD_CFI && ( REDWOOD_4 || REDWOOD_5 || REDWOOD_6 ) ---- a/drivers/mtd/maps/Makefile -+++ b/drivers/mtd/maps/Makefile -@@ -28,6 +28,7 @@ obj-$(CONFIG_MTD_PMC_MSP_EVM) += pmcms - obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o - obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o - obj-$(CONFIG_MTD_TQM8XXL) += tqm8xxl.o -+obj-$(CONFIG_MTD_BCM47XX) += bcm47xx-flash.o - obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o - obj-$(CONFIG_MTD_IPAQ) += ipaq-flash.o - obj-$(CONFIG_MTD_SBC_GXX) += sbc_gxx.o diff --git a/target/linux/brcm47xx/patches-2.6.31/130-remove_scache.patch b/target/linux/brcm47xx/patches-2.6.31/130-remove_scache.patch deleted file mode 100644 index 46aaaca0e..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/130-remove_scache.patch +++ /dev/null @@ -1,89 +0,0 @@ ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -215,7 +215,6 @@ config MIPS_MALTA - select I8259 - select MIPS_BOARDS_GEN - select MIPS_BONITO64 -- select MIPS_CPU_SCACHE - select PCI_GT64XXX_PCI0 - select MIPS_MSC - select SWAP_IO_SPACE -@@ -1518,13 +1517,6 @@ config IP22_CPU_SCACHE - bool - select BOARD_SCACHE - --# --# Support for a MIPS32 / MIPS64 style S-caches --# --config MIPS_CPU_SCACHE -- bool -- select BOARD_SCACHE -- - config R5000_CPU_SCACHE - bool - select BOARD_SCACHE ---- a/arch/mips/kernel/cpu-probe.c -+++ b/arch/mips/kernel/cpu-probe.c -@@ -754,6 +754,8 @@ static inline void cpu_probe_mips(struct - case PRID_IMP_25KF: - c->cputype = CPU_25KF; - __cpu_name[cpu] = "MIPS 25Kc"; -+ /* Probe for L2 cache */ -+ c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT; - break; - case PRID_IMP_34K: - c->cputype = CPU_34K; ---- a/arch/mips/mm/Makefile -+++ b/arch/mips/mm/Makefile -@@ -33,6 +33,5 @@ obj-$(CONFIG_CPU_CAVIUM_OCTEON) += c-oct - obj-$(CONFIG_IP22_CPU_SCACHE) += sc-ip22.o - obj-$(CONFIG_R5000_CPU_SCACHE) += sc-r5k.o - obj-$(CONFIG_RM7000_CPU_SCACHE) += sc-rm7k.o --obj-$(CONFIG_MIPS_CPU_SCACHE) += sc-mips.o - - EXTRA_CFLAGS += -Werror ---- a/arch/mips/mm/c-r4k.c -+++ b/arch/mips/mm/c-r4k.c -@@ -1148,7 +1148,6 @@ static void __init loongson2_sc_init(voi - - extern int r5k_sc_init(void); - extern int rm7k_sc_init(void); --extern int mips_sc_init(void); - - static void __cpuinit setup_scache(void) - { -@@ -1202,29 +1201,17 @@ static void __cpuinit setup_scache(void) - #endif - - default: -- if (c->isa_level == MIPS_CPU_ISA_M32R1 || -- c->isa_level == MIPS_CPU_ISA_M32R2 || -- c->isa_level == MIPS_CPU_ISA_M64R1 || -- c->isa_level == MIPS_CPU_ISA_M64R2) { --#ifdef CONFIG_MIPS_CPU_SCACHE -- if (mips_sc_init ()) { -- scache_size = c->scache.ways * c->scache.sets * c->scache.linesz; -- printk("MIPS secondary cache %ldkB, %s, linesize %d bytes.\n", -- scache_size >> 10, -- way_string[c->scache.ways], c->scache.linesz); -- } --#else -- if (!(c->scache.flags & MIPS_CACHE_NOT_PRESENT)) -- panic("Dunno how to handle MIPS32 / MIPS64 second level cache"); --#endif -- return; -- } - sc_present = 0; - } - - if (!sc_present) - return; - -+ if ((c->isa_level == MIPS_CPU_ISA_M32R1 || -+ c->isa_level == MIPS_CPU_ISA_M64R1) && -+ !(c->scache.flags & MIPS_CACHE_NOT_PRESENT)) -+ panic("Dunno how to handle MIPS32 / MIPS64 second level cache"); -+ - /* compute a couple of other cache variables */ - c->scache.waysize = scache_size / c->scache.ways; - diff --git a/target/linux/brcm47xx/patches-2.6.31/150-cpu_fixes.patch b/target/linux/brcm47xx/patches-2.6.31/150-cpu_fixes.patch deleted file mode 100644 index f5209d4fe..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/150-cpu_fixes.patch +++ /dev/null @@ -1,367 +0,0 @@ ---- a/arch/mips/include/asm/r4kcache.h -+++ b/arch/mips/include/asm/r4kcache.h -@@ -17,6 +17,20 @@ - #include - #include - -+#ifdef CONFIG_BCM47XX -+#include -+#include -+#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE + SSB_IMSTATE))) -+ -+#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr)) -+#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); }) -+#else -+#define BCM4710_DUMMY_RREG() -+ -+#define BCM4710_FILL_TLB(addr) -+#define BCM4710_PROTECTED_FILL_TLB(addr) -+#endif -+ - /* - * This macro return a properly sign-extended address suitable as base address - * for indexed cache operations. Two issues here: -@@ -150,6 +164,7 @@ static inline void flush_icache_line_ind - static inline void flush_dcache_line_indexed(unsigned long addr) - { - __dflush_prologue -+ BCM4710_DUMMY_RREG(); - cache_op(Index_Writeback_Inv_D, addr); - __dflush_epilogue - } -@@ -169,6 +184,7 @@ static inline void flush_icache_line(uns - static inline void flush_dcache_line(unsigned long addr) - { - __dflush_prologue -+ BCM4710_DUMMY_RREG(); - cache_op(Hit_Writeback_Inv_D, addr); - __dflush_epilogue - } -@@ -176,6 +192,7 @@ static inline void flush_dcache_line(uns - static inline void invalidate_dcache_line(unsigned long addr) - { - __dflush_prologue -+ BCM4710_DUMMY_RREG(); - cache_op(Hit_Invalidate_D, addr); - __dflush_epilogue - } -@@ -208,6 +225,7 @@ static inline void flush_scache_line(uns - */ - static inline void protected_flush_icache_line(unsigned long addr) - { -+ BCM4710_DUMMY_RREG(); - protected_cache_op(Hit_Invalidate_I, addr); - } - -@@ -219,6 +237,7 @@ static inline void protected_flush_icach - */ - static inline void protected_writeback_dcache_line(unsigned long addr) - { -+ BCM4710_DUMMY_RREG(); - protected_cache_op(Hit_Writeback_Inv_D, addr); - } - -@@ -339,8 +358,52 @@ static inline void invalidate_tcache_pag - : "r" (base), \ - "i" (op)); - -+static inline void blast_dcache(void) -+{ -+ unsigned long start = KSEG0; -+ unsigned long dcache_size = current_cpu_data.dcache.waysize * current_cpu_data.dcache.ways; -+ unsigned long end = (start + dcache_size); -+ -+ do { -+ BCM4710_DUMMY_RREG(); -+ cache_op(Index_Writeback_Inv_D, start); -+ start += current_cpu_data.dcache.linesz; -+ } while(start < end); -+} -+ -+static inline void blast_dcache_page(unsigned long page) -+{ -+ unsigned long start = page; -+ unsigned long end = start + PAGE_SIZE; -+ -+ BCM4710_FILL_TLB(start); -+ do { -+ BCM4710_DUMMY_RREG(); -+ cache_op(Hit_Writeback_Inv_D, start); -+ start += current_cpu_data.dcache.linesz; -+ } while(start < end); -+} -+ -+static inline void blast_dcache_page_indexed(unsigned long page) -+{ -+ unsigned long start = page; -+ unsigned long end = start + PAGE_SIZE; -+ unsigned long ws_inc = 1UL << current_cpu_data.dcache.waybit; -+ unsigned long ws_end = current_cpu_data.dcache.ways << -+ current_cpu_data.dcache.waybit; -+ unsigned long ws, addr; -+ for (ws = 0; ws < ws_end; ws += ws_inc) { -+ start = page + ws; -+ for (addr = start; addr < end; addr += current_cpu_data.dcache.linesz) { -+ BCM4710_DUMMY_RREG(); -+ cache_op(Index_Writeback_Inv_D, addr); -+ } -+ } -+} -+ -+ - /* build blast_xxx, blast_xxx_page, blast_xxx_page_indexed */ --#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize) \ -+#define __BUILD_BLAST_CACHE(pfx, desc, indexop, hitop, lsize, war) \ - static inline void blast_##pfx##cache##lsize(void) \ - { \ - unsigned long start = INDEX_BASE; \ -@@ -352,6 +415,7 @@ static inline void blast_##pfx##cache##l - \ - __##pfx##flush_prologue \ - \ -+ war \ - for (ws = 0; ws < ws_end; ws += ws_inc) \ - for (addr = start; addr < end; addr += lsize * 32) \ - cache##lsize##_unroll32(addr|ws, indexop); \ -@@ -366,6 +430,7 @@ static inline void blast_##pfx##cache##l - \ - __##pfx##flush_prologue \ - \ -+ war \ - do { \ - cache##lsize##_unroll32(start, hitop); \ - start += lsize * 32; \ -@@ -384,6 +449,8 @@ static inline void blast_##pfx##cache##l - current_cpu_data.desc.waybit; \ - unsigned long ws, addr; \ - \ -+ war \ -+ \ - __##pfx##flush_prologue \ - \ - for (ws = 0; ws < ws_end; ws += ws_inc) \ -@@ -393,36 +460,38 @@ static inline void blast_##pfx##cache##l - __##pfx##flush_epilogue \ - } - --__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16) --__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16) --__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16) --__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32) --__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32) --__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32) --__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64) --__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64) --__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64) --__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128) -- --__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16) --__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32) --__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16) --__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32) --__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64) --__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128) -+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 16, ) -+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 16, BCM4710_FILL_TLB(start);) -+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 16, ) -+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 32, ) -+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 32, BCM4710_FILL_TLB(start);) -+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 32, ) -+__BUILD_BLAST_CACHE(d, dcache, Index_Writeback_Inv_D, Hit_Writeback_Inv_D, 64, ) -+__BUILD_BLAST_CACHE(i, icache, Index_Invalidate_I, Hit_Invalidate_I, 64, BCM4710_FILL_TLB(start);) -+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 64, ) -+__BUILD_BLAST_CACHE(s, scache, Index_Writeback_Inv_SD, Hit_Writeback_Inv_SD, 128, ) -+ -+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 16, ) -+__BUILD_BLAST_CACHE(inv_d, dcache, Index_Writeback_Inv_D, Hit_Invalidate_D, 32, ) -+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 16, ) -+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 32, ) -+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 64, ) -+__BUILD_BLAST_CACHE(inv_s, scache, Index_Writeback_Inv_SD, Hit_Invalidate_SD, 128, ) - - /* build blast_xxx_range, protected_blast_xxx_range */ --#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot) \ -+#define __BUILD_BLAST_CACHE_RANGE(pfx, desc, hitop, prot, war, war2) \ - static inline void prot##blast_##pfx##cache##_range(unsigned long start, \ - unsigned long end) \ - { \ - unsigned long lsize = cpu_##desc##_line_size(); \ - unsigned long addr = start & ~(lsize - 1); \ - unsigned long aend = (end - 1) & ~(lsize - 1); \ -+ war \ - \ - __##pfx##flush_prologue \ - \ - while (1) { \ -+ war2 \ - prot##cache_op(hitop, addr); \ - if (addr == aend) \ - break; \ -@@ -432,13 +501,13 @@ static inline void prot##blast_##pfx##ca - __##pfx##flush_epilogue \ - } - --__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_) --__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_) --__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_) --__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, ) --__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, ) -+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D, protected_, BCM4710_PROTECTED_FILL_TLB(addr); BCM4710_PROTECTED_FILL_TLB(aend);, BCM4710_DUMMY_RREG();) -+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD, protected_,, ) -+__BUILD_BLAST_CACHE_RANGE(i, icache, Hit_Invalidate_I, protected_,, ) -+__BUILD_BLAST_CACHE_RANGE(d, dcache, Hit_Writeback_Inv_D,, BCM4710_FILL_TLB(addr); BCM4710_FILL_TLB(aend);, BCM4710_DUMMY_RREG();) -+__BUILD_BLAST_CACHE_RANGE(s, scache, Hit_Writeback_Inv_SD,,, ) - /* blast_inv_dcache_range */ --__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D, ) --__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD, ) -+__BUILD_BLAST_CACHE_RANGE(inv_d, dcache, Hit_Invalidate_D,,,BCM4710_DUMMY_RREG();) -+__BUILD_BLAST_CACHE_RANGE(inv_s, scache, Hit_Invalidate_SD,,, ) - - #endif /* _ASM_R4KCACHE_H */ ---- a/arch/mips/include/asm/stackframe.h -+++ b/arch/mips/include/asm/stackframe.h -@@ -426,6 +426,10 @@ - .macro RESTORE_SP_AND_RET - LONG_L sp, PT_R29(sp) - .set mips3 -+#ifdef CONFIG_BCM47XX -+ nop -+ nop -+#endif - eret - .set mips0 - .endm ---- a/arch/mips/kernel/genex.S -+++ b/arch/mips/kernel/genex.S -@@ -52,6 +52,10 @@ NESTED(except_vec1_generic, 0, sp) - NESTED(except_vec3_generic, 0, sp) - .set push - .set noat -+#ifdef CONFIG_BCM47XX -+ nop -+ nop -+#endif - #if R5432_CP0_INTERRUPT_WAR - mfc0 k0, CP0_INDEX - #endif ---- a/arch/mips/mm/c-r4k.c -+++ b/arch/mips/mm/c-r4k.c -@@ -35,6 +35,9 @@ - #include /* for run_uncached() */ - - -+/* For enabling BCM4710 cache workarounds */ -+int bcm4710 = 0; -+ - /* - * Special Variant of smp_call_function for use by cache functions: - * -@@ -111,6 +114,9 @@ static void __cpuinit r4k_blast_dcache_p - { - unsigned long dc_lsize = cpu_dcache_line_size(); - -+ if (bcm4710) -+ r4k_blast_dcache_page = blast_dcache_page; -+ else - if (dc_lsize == 0) - r4k_blast_dcache_page = (void *)cache_noop; - else if (dc_lsize == 16) -@@ -127,6 +133,9 @@ static void __cpuinit r4k_blast_dcache_p - { - unsigned long dc_lsize = cpu_dcache_line_size(); - -+ if (bcm4710) -+ r4k_blast_dcache_page_indexed = blast_dcache_page_indexed; -+ else - if (dc_lsize == 0) - r4k_blast_dcache_page_indexed = (void *)cache_noop; - else if (dc_lsize == 16) -@@ -143,6 +152,9 @@ static void __cpuinit r4k_blast_dcache_s - { - unsigned long dc_lsize = cpu_dcache_line_size(); - -+ if (bcm4710) -+ r4k_blast_dcache = blast_dcache; -+ else - if (dc_lsize == 0) - r4k_blast_dcache = (void *)cache_noop; - else if (dc_lsize == 16) -@@ -680,6 +692,8 @@ static void local_r4k_flush_cache_sigtra - unsigned long addr = (unsigned long) arg; - - R4600_HIT_CACHEOP_WAR_IMPL; -+ BCM4710_PROTECTED_FILL_TLB(addr); -+ BCM4710_PROTECTED_FILL_TLB(addr + 4); - if (dc_lsize) - protected_writeback_dcache_line(addr & ~(dc_lsize - 1)); - if (!cpu_icache_snoops_remote_store && scache_size) -@@ -1298,6 +1312,17 @@ static void __cpuinit coherency_setup(vo - * silly idea of putting something else there ... - */ - switch (current_cpu_type()) { -+ case CPU_BCM3302: -+ { -+ u32 cm; -+ cm = read_c0_diag(); -+ /* Enable icache */ -+ cm |= (1 << 31); -+ /* Enable dcache */ -+ cm |= (1 << 30); -+ write_c0_diag(cm); -+ } -+ break; - case CPU_R4000PC: - case CPU_R4000SC: - case CPU_R4000MC: -@@ -1354,6 +1379,15 @@ void __cpuinit r4k_cache_init(void) - break; - } - -+ /* Check if special workarounds are required */ -+#ifdef CONFIG_BCM47XX -+ if (current_cpu_data.cputype == CPU_BCM4710 && (current_cpu_data.processor_id & 0xff) == 0) { -+ printk("Enabling BCM4710A0 cache workarounds.\n"); -+ bcm4710 = 1; -+ } else -+#endif -+ bcm4710 = 0; -+ - probe_pcache(); - setup_scache(); - -@@ -1412,5 +1446,13 @@ void __cpuinit r4k_cache_init(void) - #if !defined(CONFIG_MIPS_CMP) - local_r4k___flush_cache_all(NULL); - #endif -+#ifdef CONFIG_BCM47XX -+ { -+ static void (*_coherency_setup)(void); -+ _coherency_setup = (void (*)(void)) KSEG1ADDR(coherency_setup); -+ _coherency_setup(); -+ } -+#else - coherency_setup(); -+#endif - } ---- a/arch/mips/mm/tlbex.c -+++ b/arch/mips/mm/tlbex.c -@@ -784,6 +784,9 @@ static void __cpuinit build_r4000_tlb_re - /* No need for uasm_i_nop */ - } - -+#ifdef CONFIG_BCM47XX -+ uasm_i_nop(&p); -+#endif - #ifdef CONFIG_64BIT - build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ - #else -@@ -1238,6 +1241,9 @@ build_r4000_tlbchange_handler_head(u32 * - struct uasm_reloc **r, unsigned int pte, - unsigned int ptr) - { -+#ifdef CONFIG_BCM47XX -+ uasm_i_nop(p); -+#endif - #ifdef CONFIG_64BIT - build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */ - #else diff --git a/target/linux/brcm47xx/patches-2.6.31/160-kmap_coherent.patch b/target/linux/brcm47xx/patches-2.6.31/160-kmap_coherent.patch deleted file mode 100644 index 5c06f3a4e..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/160-kmap_coherent.patch +++ /dev/null @@ -1,77 +0,0 @@ ---- a/arch/mips/include/asm/cpu-features.h -+++ b/arch/mips/include/asm/cpu-features.h -@@ -104,6 +104,9 @@ - #ifndef cpu_has_pindexed_dcache - #define cpu_has_pindexed_dcache (cpu_data[0].dcache.flags & MIPS_CACHE_PINDEX) - #endif -+#ifndef cpu_use_kmap_coherent -+#define cpu_use_kmap_coherent 1 -+#endif - - /* - * I-Cache snoops remote store. This only matters on SMP. Some multiprocessors ---- /dev/null -+++ b/arch/mips/include/asm/mach-bcm47xx/cpu-feature-overrides.h -@@ -0,0 +1,13 @@ -+/* -+ * This file is subject to the terms and conditions of the GNU General Public -+ * License. See the file "COPYING" in the main directory of this archive -+ * for more details. -+ * -+ * Copyright (C) 2005 Ralf Baechle (ralf@linux-mips.org) -+ */ -+#ifndef __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H -+#define __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H -+ -+#define cpu_use_kmap_coherent 0 -+ -+#endif /* __ASM_MACH_BCM47XX_CPU_FEATURE_OVERRIDES_H */ ---- a/arch/mips/mm/c-r4k.c -+++ b/arch/mips/mm/c-r4k.c -@@ -507,7 +507,7 @@ static inline void local_r4k_flush_cache - */ - map_coherent = (cpu_has_dc_aliases && - page_mapped(page) && !Page_dcache_dirty(page)); -- if (map_coherent) -+ if (map_coherent && cpu_use_kmap_coherent) - vaddr = kmap_coherent(page, addr); - else - vaddr = kmap_atomic(page, KM_USER0); -@@ -530,7 +530,7 @@ static inline void local_r4k_flush_cache - } - - if (vaddr) { -- if (map_coherent) -+ if (map_coherent && cpu_use_kmap_coherent) - kunmap_coherent(); - else - kunmap_atomic(vaddr, KM_USER0); ---- a/arch/mips/mm/init.c -+++ b/arch/mips/mm/init.c -@@ -205,7 +205,7 @@ void copy_user_highpage(struct page *to, - void *vfrom, *vto; - - vto = kmap_atomic(to, KM_USER1); -- if (cpu_has_dc_aliases && -+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent && - page_mapped(from) && !Page_dcache_dirty(from)) { - vfrom = kmap_coherent(from, vaddr); - copy_page(vto, vfrom); -@@ -227,7 +227,7 @@ void copy_to_user_page(struct vm_area_st - struct page *page, unsigned long vaddr, void *dst, const void *src, - unsigned long len) - { -- if (cpu_has_dc_aliases && -+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent && - page_mapped(page) && !Page_dcache_dirty(page)) { - void *vto = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); - memcpy(vto, src, len); -@@ -245,7 +245,7 @@ void copy_from_user_page(struct vm_area_ - struct page *page, unsigned long vaddr, void *dst, const void *src, - unsigned long len) - { -- if (cpu_has_dc_aliases && -+ if (cpu_has_dc_aliases && cpu_use_kmap_coherent && - page_mapped(page) && !Page_dcache_dirty(page)) { - void *vfrom = kmap_coherent(page, vaddr) + (vaddr & ~PAGE_MASK); - memcpy(dst, vfrom, len); diff --git a/target/linux/brcm47xx/patches-2.6.31/170-128MB_ram_bugfix.patch b/target/linux/brcm47xx/patches-2.6.31/170-128MB_ram_bugfix.patch deleted file mode 100644 index 93f4b1f10..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/170-128MB_ram_bugfix.patch +++ /dev/null @@ -1,32 +0,0 @@ ---- a/arch/mips/bcm47xx/prom.c -+++ b/arch/mips/bcm47xx/prom.c -@@ -126,6 +126,7 @@ static __init void prom_init_cmdline(voi - static __init void prom_init_mem(void) - { - unsigned long mem; -+ unsigned long max; - - /* Figure out memory size by finding aliases. - * -@@ -134,8 +135,21 @@ static __init void prom_init_mem(void) - * want to reuse the memory used by CFE (around 4MB). That means cfe_* - * functions stop to work at some point during the boot, we should only - * call them at the beginning of the boot. -+ * -+ * BCM47XX uses 128MB for addressing the ram, if the system contains -+ * less that that amount of ram it remaps the ram more often into the -+ * available space. -+ * Accessing memory after 128MB will cause an exception. -+ * max contains the biggest possible address supported by the platform. -+ * If the method wants to try something above we assume 128MB ram. - */ -+ max = ((unsigned long)(prom_init) | ((128 << 20) - 1)); - for (mem = (1 << 20); mem < (128 << 20); mem += (1 << 20)) { -+ if (((unsigned long)(prom_init) + mem) > max) { -+ mem = (128 << 20); -+ printk("assume 128MB RAM\n"); -+ break; -+ } - if (*(unsigned long *)((unsigned long)(prom_init) + mem) == - *(unsigned long *)(prom_init)) - break; diff --git a/target/linux/brcm47xx/patches-2.6.31/210-b44_phy_fix.patch b/target/linux/brcm47xx/patches-2.6.31/210-b44_phy_fix.patch deleted file mode 100644 index 6bf52f7bc..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/210-b44_phy_fix.patch +++ /dev/null @@ -1,22 +0,0 @@ ---- a/drivers/net/b44.c -+++ b/drivers/net/b44.c -@@ -339,7 +339,7 @@ static int b44_phy_reset(struct b44 *bp) - } - } - -- return 0; -+ return err; - } - - static void __b44_set_flow_ctrl(struct b44 *bp, u32 pause_flags) -@@ -2217,6 +2217,10 @@ static int __devinit b44_init_one(struct - */ - b44_chip_reset(bp, B44_CHIP_RESET_FULL); - -+ /* do a phy reset to test if there is an active phy */ -+ if (b44_phy_reset(bp) < 0) -+ bp->phy_addr = B44_PHY_ADDR_NO_PHY; -+ - printk(KERN_INFO "%s: Broadcom 44xx/47xx 10/100BaseT Ethernet %pM\n", - dev->name, dev->dev_addr); - diff --git a/target/linux/brcm47xx/patches-2.6.31/220-bcm5354.patch b/target/linux/brcm47xx/patches-2.6.31/220-bcm5354.patch deleted file mode 100644 index 0d46f82c4..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/220-bcm5354.patch +++ /dev/null @@ -1,42 +0,0 @@ ---- a/drivers/ssb/driver_chipcommon.c -+++ b/drivers/ssb/driver_chipcommon.c -@@ -258,6 +258,8 @@ void ssb_chipco_resume(struct ssb_chipco - void ssb_chipco_get_clockcpu(struct ssb_chipcommon *cc, - u32 *plltype, u32 *n, u32 *m) - { -+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354) -+ return; - *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N); - *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); - switch (*plltype) { -@@ -281,6 +283,8 @@ void ssb_chipco_get_clockcpu(struct ssb_ - void ssb_chipco_get_clockcontrol(struct ssb_chipcommon *cc, - u32 *plltype, u32 *n, u32 *m) - { -+ if ((chipco_read32(cc, SSB_CHIPCO_CHIPID) & SSB_CHIPCO_IDMASK) == 0x5354) -+ return; - *n = chipco_read32(cc, SSB_CHIPCO_CLOCK_N); - *plltype = (cc->capabilities & SSB_CHIPCO_CAP_PLLT); - switch (*plltype) { ---- a/drivers/ssb/driver_mipscore.c -+++ b/drivers/ssb/driver_mipscore.c -@@ -217,6 +217,8 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m - - if ((pll_type == SSB_PLLTYPE_5) || (bus->chip_id == 0x5365)) { - rate = 200000000; -+ } else if (bus->chip_id == 0x5354) { -+ rate = 240000000; - } else { - rate = ssb_calc_clock_rate(pll_type, n, m); - } ---- a/drivers/ssb/main.c -+++ b/drivers/ssb/main.c -@@ -1012,6 +1012,8 @@ u32 ssb_clockspeed(struct ssb_bus *bus) - - if (bus->chip_id == 0x5365) { - rate = 100000000; -+ } else if (bus->chip_id == 0x5354) { -+ rate = 120000000; - } else { - rate = ssb_calc_clock_rate(plltype, clkctl_n, clkctl_m); - if (plltype == SSB_PLLTYPE_3) /* 25Mhz, 2 dividers */ diff --git a/target/linux/brcm47xx/patches-2.6.31/250-ohci-ssb-usb2.patch b/target/linux/brcm47xx/patches-2.6.31/250-ohci-ssb-usb2.patch deleted file mode 100644 index 25b27e47e..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/250-ohci-ssb-usb2.patch +++ /dev/null @@ -1,60 +0,0 @@ ---- - drivers/usb/host/ohci-ssb.c | 39 ++++++++++++++++++++++++++++++++++++--- - 1 file changed, 36 insertions(+), 3 deletions(-) - ---- a/drivers/usb/host/ohci-ssb.c -+++ b/drivers/usb/host/ohci-ssb.c -@@ -106,10 +106,42 @@ static int ssb_ohci_attach(struct ssb_de - int err = -ENOMEM; - u32 tmp, flags = 0; - -- if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV) -+ if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV) { -+ /* Put the device into host-mode. */ - flags |= SSB_OHCI_TMSLOW_HOSTMODE; -- -- ssb_device_enable(dev, flags); -+ ssb_device_enable(dev, flags); -+ } else if (dev->id.coreid == SSB_DEV_USB20_HOST) { -+ /* -+ * USB 2.0 special considerations: -+ * -+ * 1. Since the core supports both OHCI and EHCI functions, it must -+ * only be reset once. -+ * -+ * 2. In addition to the standard SSB reset sequence, the Host Control -+ * Register must be programmed to bring the USB core and various -+ * phy components out of reset. -+ */ -+ ssb_device_enable(dev, 0); -+ ssb_write32(dev, 0x200, 0x7ff); -+ udelay(1); -+ if (dev->id.revision == 1) { // bug in rev 1 -+ -+ /* Change Flush control reg */ -+ tmp = ssb_read32(dev, 0x400); -+ tmp &= ~8; -+ ssb_write32(dev, 0x400, tmp); -+ tmp = ssb_read32(dev, 0x400); -+ printk("USB20H fcr: 0x%0x\n", tmp); -+ -+ /* Change Shim control reg */ -+ tmp = ssb_read32(dev, 0x304); -+ tmp &= ~0x100; -+ ssb_write32(dev, 0x304, tmp); -+ tmp = ssb_read32(dev, 0x304); -+ printk("USB20H shim: 0x%0x\n", tmp); -+ } -+ } else -+ ssb_device_enable(dev, 0); - - hcd = usb_create_hcd(&ssb_ohci_hc_driver, dev->dev, - dev_name(dev->dev)); -@@ -200,6 +232,7 @@ static int ssb_ohci_resume(struct ssb_de - static const struct ssb_device_id ssb_ohci_table[] = { - SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOSTDEV, SSB_ANY_REV), - SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB11_HOST, SSB_ANY_REV), -+ SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV), - SSB_DEVTABLE_END - }; - MODULE_DEVICE_TABLE(ssb, ssb_ohci_table); diff --git a/target/linux/brcm47xx/patches-2.6.31/260-ohci-set-dma-mask.patch b/target/linux/brcm47xx/patches-2.6.31/260-ohci-set-dma-mask.patch deleted file mode 100644 index 962779847..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/260-ohci-set-dma-mask.patch +++ /dev/null @@ -1,16 +0,0 @@ ---- - drivers/usb/host/ohci-ssb.c | 3 +++ - 1 file changed, 3 insertions(+) - ---- a/drivers/usb/host/ohci-ssb.c -+++ b/drivers/usb/host/ohci-ssb.c -@@ -106,6 +106,9 @@ static int ssb_ohci_attach(struct ssb_de - int err = -ENOMEM; - u32 tmp, flags = 0; - -+ if (ssb_dma_set_mask(dev, DMA_BIT_MASK(32))) -+ return -EOPNOTSUPP; -+ - if (dev->id.coreid == SSB_DEV_USB11_HOSTDEV) { - /* Put the device into host-mode. */ - flags |= SSB_OHCI_TMSLOW_HOSTMODE; diff --git a/target/linux/brcm47xx/patches-2.6.31/270-ehci-ssb.patch b/target/linux/brcm47xx/patches-2.6.31/270-ehci-ssb.patch deleted file mode 100644 index 8dc3ccd02..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/270-ehci-ssb.patch +++ /dev/null @@ -1,314 +0,0 @@ ---- - drivers/usb/host/Kconfig | 13 ++ - drivers/usb/host/ehci-hcd.c | 12 ++ - drivers/usb/host/ehci-ssb.c | 201 ++++++++++++++++++++++++++++++++++++++++++++ - drivers/usb/host/ohci-ssb.c | 23 +++++ - 4 files changed, 247 insertions(+), 2 deletions(-) - ---- a/drivers/usb/host/Kconfig -+++ b/drivers/usb/host/Kconfig -@@ -126,6 +126,19 @@ config USB_OXU210HP_HCD - To compile this driver as a module, choose M here: the - module will be called oxu210hp-hcd. - -+config USB_EHCI_HCD_SSB -+ bool "EHCI support for Broadcom SSB EHCI core" -+ depends on USB_EHCI_HCD && SSB && EXPERIMENTAL -+ default n -+ ---help--- -+ Support for the Sonics Silicon Backplane (SSB) attached -+ Broadcom USB EHCI core. -+ -+ This device is present in some embedded devices with -+ Broadcom based SSB bus. -+ -+ If unsure, say N. -+ - config USB_ISP116X_HCD - tristate "ISP116X HCD support" - depends on USB ---- a/drivers/usb/host/ehci-hcd.c -+++ b/drivers/usb/host/ehci-hcd.c -@@ -1119,8 +1119,16 @@ MODULE_LICENSE ("GPL"); - #define PLATFORM_DRIVER ixp4xx_ehci_driver - #endif - --#if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \ -- !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) -+#ifdef CONFIG_USB_EHCI_HCD_SSB -+#include "ehci-ssb.c" -+#define SSB_EHCI_DRIVER ssb_ehci_driver -+#endif -+ -+#if !defined(PCI_DRIVER) && \ -+ !defined(PLATFORM_DRIVER) && \ -+ !defined(PS3_SYSTEM_BUS_DRIVER) && \ -+ !defined(OF_PLATFORM_DRIVER) && \ -+ !defined(SSB_EHCI_DRIVER) - #error "missing bus glue for ehci-hcd" - #endif - ---- /dev/null -+++ b/drivers/usb/host/ehci-ssb.c -@@ -0,0 +1,201 @@ -+/* -+ * Sonics Silicon Backplane -+ * Broadcom USB-core EHCI driver (SSB bus glue) -+ * -+ * Copyright 2007 Steven Brown -+ * -+ * Derived from the OHCI-SSB driver -+ * Copyright 2007 Michael Buesch -+ * -+ * Derived from the EHCI-PCI driver -+ * Copyright (c) 2000-2004 by David Brownell -+ * -+ * Derived from the OHCI-PCI driver -+ * Copyright 1999 Roman Weissgaerber -+ * Copyright 2000-2002 David Brownell -+ * Copyright 1999 Linus Torvalds -+ * Copyright 1999 Gregory P. Smith -+ * -+ * Derived from the USBcore related parts of Broadcom-SB -+ * Copyright 2005 Broadcom Corporation -+ * -+ * Licensed under the GNU/GPL. See COPYING for details. -+ */ -+#include -+ -+#define SSB_OHCI_TMSLOW_HOSTMODE (1 << 29) -+ -+struct ssb_ehci_device { -+ struct ehci_hcd ehci; /* _must_ be at the beginning. */ -+ -+ u32 enable_flags; -+}; -+ -+static inline -+struct ssb_ehci_device *hcd_to_ssb_ehci(struct usb_hcd *hcd) -+{ -+ return (struct ssb_ehci_device *)(hcd->hcd_priv); -+} -+ -+ -+static int ssb_ehci_reset(struct usb_hcd *hcd) -+{ -+ struct ehci_hcd *ehci = hcd_to_ehci(hcd); -+ int err; -+ -+ ehci->caps = hcd->regs; -+ ehci->regs = hcd->regs + -+ HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); -+ -+ dbg_hcs_params(ehci, "reset"); -+ dbg_hcc_params(ehci, "reset"); -+ -+ ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); -+ -+ err = ehci_halt(ehci); -+ -+ if (err) -+ return err; -+ -+ err = ehci_init(hcd); -+ -+ if (err) -+ return err; -+ -+ ehci_port_power(ehci, 0); -+ -+ return err; -+} -+ -+static int ssb_ehci_start(struct usb_hcd *hcd) -+{ -+ struct ehci_hcd *ehci = hcd_to_ehci(hcd); -+ int err; -+ -+ err = ehci_run(hcd); -+ if (err < 0) { -+ ehci_err(ehci, "can't start\n"); -+ ehci_stop(hcd); -+ } -+ -+ return err; -+} -+ -+#ifdef CONFIG_PM -+static int ssb_ehci_hcd_suspend(struct usb_hcd *hcd, pm_message_t message) -+{ -+ struct ssb_ehci_device *ehcidev = hcd_to_ssb_ehci(hcd); -+ struct ehci_hcd *ehci = &ehcidev->ehci; -+ unsigned long flags; -+ -+ spin_lock_irqsave(&ehci->lock, flags); -+ -+ ehci_writel(ehci, EHCI_INTR_MIE, &ehci->regs->intrdisable); -+ ehci_readl(ehci, &ehci->regs->intrdisable); /* commit write */ -+ -+ /* make sure snapshot being resumed re-enumerates everything */ -+ if (message.event == PM_EVENT_PRETHAW) -+ ehci_usb_reset(ehci); -+ -+ clear_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); -+ -+ spin_unlock_irqrestore(&ehci->lock, flags); -+ return 0; -+} -+ -+static int ssb_ehci_hcd_resume(struct usb_hcd *hcd) -+{ -+ set_bit(HCD_FLAG_HW_ACCESSIBLE, &hcd->flags); -+ usb_hcd_resume_root_hub(hcd); -+ return 0; -+} -+#endif /* CONFIG_PM */ -+ -+static const struct hc_driver ssb_ehci_hc_driver = { -+ .description = "ssb-usb-ehci", -+ .product_desc = "SSB EHCI Controller", -+ .hcd_priv_size = sizeof(struct ssb_ehci_device), -+ -+ .irq = ehci_irq, -+ .flags = HCD_MEMORY | HCD_USB2, -+ -+ .reset = ssb_ehci_reset, -+ .start = ssb_ehci_start, -+ .stop = ehci_stop, -+ .shutdown = ehci_shutdown, -+ -+#ifdef CONFIG_PM -+ .suspend = ssb_ehci_hcd_suspend, -+ .resume = ssb_ehci_hcd_resume, -+#endif -+ -+ .urb_enqueue = ehci_urb_enqueue, -+ .urb_dequeue = ehci_urb_dequeue, -+ .endpoint_disable = ehci_endpoint_disable, -+ -+ .get_frame_number = ehci_get_frame, -+ -+ .hub_status_data = ehci_hub_status_data, -+ .hub_control = ehci_hub_control, -+#ifdef CONFIG_PM -+ .bus_suspend = ehci_bus_suspend, -+ .bus_resume = ehci_bus_resume, -+#endif -+ -+}; -+ -+static void ssb_ehci_detach(struct ssb_device *dev, struct usb_hcd *hcd) -+{ -+ -+ usb_remove_hcd(hcd); -+ iounmap(hcd->regs); -+ usb_put_hcd(hcd); -+} -+EXPORT_SYMBOL_GPL(ssb_ehci_detach); -+ -+static int ssb_ehci_attach(struct ssb_device *dev, struct usb_hcd **ehci_hcd) -+{ -+ struct ssb_ehci_device *ehcidev; -+ struct usb_hcd *hcd; -+ int err = -ENOMEM; -+ u32 tmp, flags = 0; -+ -+ hcd = usb_create_hcd(&ssb_ehci_hc_driver, dev->dev, -+ dev_name(dev->dev)); -+ if (!hcd) -+ goto err_dev_disable; -+ -+ ehcidev = hcd_to_ssb_ehci(hcd); -+ ehcidev->enable_flags = flags; -+ tmp = ssb_read32(dev, SSB_ADMATCH0); -+ hcd->rsrc_start = ssb_admatch_base(tmp) + 0x800; /* ehci core offset */ -+ hcd->rsrc_len = 0x100; /* ehci reg block size */ -+ /* -+ * start & size modified per sbutils.c -+ */ -+ hcd->regs = ioremap_nocache(hcd->rsrc_start, hcd->rsrc_len); -+ if (!hcd->regs) -+ goto err_put_hcd; -+ err = usb_add_hcd(hcd, dev->irq, IRQF_SHARED | IRQF_DISABLED); -+ if (err) -+ goto err_iounmap; -+ -+ *ehci_hcd = hcd; -+ -+ return err; -+ -+err_iounmap: -+ iounmap(hcd->regs); -+err_put_hcd: -+ usb_put_hcd(hcd); -+err_dev_disable: -+ ssb_device_disable(dev, flags); -+ return err; -+} -+EXPORT_SYMBOL_GPL(ssb_ehci_attach); -+ -+static const struct ssb_device_id ssb_ehci_table[] = { -+ SSB_DEVICE(SSB_VENDOR_BROADCOM, SSB_DEV_USB20_HOST, SSB_ANY_REV), -+ SSB_DEVTABLE_END -+}; -+MODULE_DEVICE_TABLE(ssb, ssb_ehci_table); ---- a/drivers/usb/host/ohci-ssb.c -+++ b/drivers/usb/host/ohci-ssb.c -@@ -17,6 +17,8 @@ - */ - #include - -+extern int ssb_ehci_attach(struct ssb_device *dev, struct usb_hcd **hcd); -+extern void ssb_ehci_detach(struct ssb_device *dev, struct usb_hcd *hcd); - - #define SSB_OHCI_TMSLOW_HOSTMODE (1 << 29) - -@@ -24,6 +26,7 @@ struct ssb_ohci_device { - struct ohci_hcd ohci; /* _must_ be at the beginning. */ - - u32 enable_flags; -+ struct usb_hcd *ehci_hcd; - }; - - static inline -@@ -92,13 +95,25 @@ static const struct hc_driver ssb_ohci_h - static void ssb_ohci_detach(struct ssb_device *dev) - { - struct usb_hcd *hcd = ssb_get_drvdata(dev); -+#ifdef CONFIG_USB_EHCI_HCD_SSB -+ struct ssb_ohci_device *ohcidev = hcd_to_ssb_ohci(hcd); -+#endif - - usb_remove_hcd(hcd); - iounmap(hcd->regs); - usb_put_hcd(hcd); -+ -+#ifdef CONFIG_USB_EHCI_HCD_SSB -+ /* -+ * Also detach ehci function -+ */ -+ if (dev->id.coreid == SSB_DEV_USB20_HOST) -+ ssb_ehci_detach(dev, ohcidev->ehci_hcd); -+#endif - ssb_device_disable(dev, 0); - } - -+ - static int ssb_ohci_attach(struct ssb_device *dev) - { - struct ssb_ohci_device *ohcidev; -@@ -165,6 +180,14 @@ static int ssb_ohci_attach(struct ssb_de - - ssb_set_drvdata(dev, hcd); - -+#ifdef CONFIG_USB_EHCI_HCD_SSB -+ /* -+ * attach ehci function in this core -+ */ -+ if (dev->id.coreid == SSB_DEV_USB20_HOST) -+ err = ssb_ehci_attach(dev, &(ohcidev->ehci_hcd)); -+#endif -+ - return err; - - err_iounmap: diff --git a/target/linux/brcm47xx/patches-2.6.31/275-usb2-bcm5354-init.patch b/target/linux/brcm47xx/patches-2.6.31/275-usb2-bcm5354-init.patch deleted file mode 100644 index 3d8327ebf..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/275-usb2-bcm5354-init.patch +++ /dev/null @@ -1,63 +0,0 @@ -This patch significantly improves the reliability of high speed -usb writes on the bcm5354. It implements a work around for version 2 -of the usb20 core that was cribbed from the GPL sources for the -Asus wl500gpv2 and verified against the wl520gu sources. - -Reference: -GPL/WL-520gu-NewUI/src/linux/linux/arch/mips/brcm-boards/bcm947xx/pcibios.c -GPL/WL-500gPV2-NewUI/src/linux/linux/arch/mips/brcm-boards/bcm947xx/pcibios.c - -Signed-off-by: Steve Brown - ---- - drivers/usb/host/ohci-ssb.c | 37 +++++++++++++++++++++++-------------- - 1 file changed, 23 insertions(+), 14 deletions(-) - ---- a/drivers/usb/host/ohci-ssb.c -+++ b/drivers/usb/host/ohci-ssb.c -@@ -141,22 +141,31 @@ static int ssb_ohci_attach(struct ssb_de - */ - ssb_device_enable(dev, 0); - ssb_write32(dev, 0x200, 0x7ff); -+ -+ /* Change Flush control reg */ -+ tmp = ssb_read32(dev, 0x400); -+ tmp &= ~8; -+ ssb_write32(dev, 0x400, tmp); -+ tmp = ssb_read32(dev, 0x400); -+ -+ /* Change Shim control reg */ -+ tmp = ssb_read32(dev, 0x304); -+ tmp &= ~0x100; -+ ssb_write32(dev, 0x304, tmp); -+ tmp = ssb_read32(dev, 0x304); -+ - udelay(1); -- if (dev->id.revision == 1) { // bug in rev 1 - -- /* Change Flush control reg */ -- tmp = ssb_read32(dev, 0x400); -- tmp &= ~8; -- ssb_write32(dev, 0x400, tmp); -- tmp = ssb_read32(dev, 0x400); -- printk("USB20H fcr: 0x%0x\n", tmp); -- -- /* Change Shim control reg */ -- tmp = ssb_read32(dev, 0x304); -- tmp &= ~0x100; -- ssb_write32(dev, 0x304, tmp); -- tmp = ssb_read32(dev, 0x304); -- printk("USB20H shim: 0x%0x\n", tmp); -+ /* Work around for 5354 failures */ -+ if ((dev->id.revision == 2) && (dev->bus->chip_id == 0x5354)) { -+ /* Change syn01 reg */ -+ tmp = 0x00fe00fe; -+ ssb_write32(dev, 0x894, tmp); -+ -+ /* Change syn03 reg */ -+ tmp = ssb_read32(dev, 0x89c); -+ tmp |= 0x1; -+ ssb_write32(dev, 0x89c, tmp); - } - } else - ssb_device_enable(dev, 0); diff --git a/target/linux/brcm47xx/patches-2.6.31/280-activate_ssb_support_in_usb.patch b/target/linux/brcm47xx/patches-2.6.31/280-activate_ssb_support_in_usb.patch deleted file mode 100644 index aeb9d334c..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/280-activate_ssb_support_in_usb.patch +++ /dev/null @@ -1,16 +0,0 @@ -This prevents the options from being delete with make kernel_oldconfig. ---- - drivers/ssb/Kconfig | 2 ++ - 1 file changed, 2 insertions(+) - ---- a/drivers/ssb/Kconfig -+++ b/drivers/ssb/Kconfig -@@ -126,6 +126,8 @@ config SSB_DRIVER_MIPS - config SSB_EMBEDDED - bool - depends on SSB_DRIVER_MIPS -+ select USB_EHCI_HCD_SSB if USB_EHCI_HCD -+ select USB_OHCI_HCD_SSB if USB_OHCI_HCD - default y - - config SSB_DRIVER_EXTIF diff --git a/target/linux/brcm47xx/patches-2.6.31/300-fork_cacheflush.patch b/target/linux/brcm47xx/patches-2.6.31/300-fork_cacheflush.patch deleted file mode 100644 index 686fb1b94..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/300-fork_cacheflush.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/arch/mips/include/asm/cacheflush.h -+++ b/arch/mips/include/asm/cacheflush.h -@@ -32,7 +32,7 @@ - extern void (*flush_cache_all)(void); - extern void (*__flush_cache_all)(void); - extern void (*flush_cache_mm)(struct mm_struct *mm); --#define flush_cache_dup_mm(mm) do { (void) (mm); } while (0) -+#define flush_cache_dup_mm(mm) flush_cache_mm(mm) - extern void (*flush_cache_range)(struct vm_area_struct *vma, - unsigned long start, unsigned long end); - extern void (*flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn); diff --git a/target/linux/brcm47xx/patches-2.6.31/301-kmod-fuse-dcache-bug-r4k.patch b/target/linux/brcm47xx/patches-2.6.31/301-kmod-fuse-dcache-bug-r4k.patch deleted file mode 100644 index e960dbacc..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/301-kmod-fuse-dcache-bug-r4k.patch +++ /dev/null @@ -1,31 +0,0 @@ ---- a/arch/mips/mm/c-r4k.c -+++ b/arch/mips/mm/c-r4k.c -@@ -373,7 +373,7 @@ static inline void local_r4k___flush_cac - } - } - --static void r4k___flush_cache_all(void) -+void r4k___flush_cache_all(void) - { - r4k_on_each_cpu(local_r4k___flush_cache_all, NULL, 1); - } -@@ -537,7 +537,7 @@ static inline void local_r4k_flush_cache - } - } - --static void r4k_flush_cache_page(struct vm_area_struct *vma, -+void r4k_flush_cache_page(struct vm_area_struct *vma, - unsigned long addr, unsigned long pfn) - { - struct flush_cache_page_args args; -@@ -1456,3 +1456,10 @@ void __cpuinit r4k_cache_init(void) - coherency_setup(); - #endif - } -+ -+// fuse package DCACHE BUG patch exports -+void (*fuse_flush_cache_all)(void) = r4k___flush_cache_all; -+void (*fuse_flush_cache_page)(struct vm_area_struct *vma, unsigned long page, -+ unsigned long pfn) = r4k_flush_cache_page; -+EXPORT_SYMBOL(fuse_flush_cache_page); -+EXPORT_SYMBOL(fuse_flush_cache_all); diff --git a/target/linux/brcm47xx/patches-2.6.31/302-kmod-fuse-dcache-bug-fuse.patch b/target/linux/brcm47xx/patches-2.6.31/302-kmod-fuse-dcache-bug-fuse.patch deleted file mode 100644 index ba4b799ec..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/302-kmod-fuse-dcache-bug-fuse.patch +++ /dev/null @@ -1,82 +0,0 @@ ---- a/fs/fuse/dev.c -+++ b/fs/fuse/dev.c -@@ -533,6 +533,11 @@ static void fuse_copy_finish(struct fuse - } - } - -+#ifdef DCACHE_BUG -+extern void (*fuse_flush_cache_all)(void); -+extern void (*fuse_flush_cache_page)(struct vm_area_struct *vma, unsigned long page, unsigned long pfn); -+#endif -+ - /* - * Get another pagefull of userspace buffer, and map it to kernel - * address space, and lock request -@@ -541,6 +546,9 @@ static int fuse_copy_fill(struct fuse_co - { - unsigned long offset; - int err; -+#ifdef DCACHE_BUG -+ struct vm_area_struct *vma; -+#endif - - unlock_request(cs->fc, cs->req); - fuse_copy_finish(cs); -@@ -552,14 +560,22 @@ static int fuse_copy_fill(struct fuse_co - cs->nr_segs--; - } - down_read(¤t->mm->mmap_sem); -+#ifndef DCACHE_BUG - err = get_user_pages(current, current->mm, cs->addr, 1, cs->write, 0, - &cs->pg, NULL); -+#else -+ err = get_user_pages(current, current->mm, cs->addr, 1, cs->write, 0, -+ &cs->pg, &vma); -+#endif - up_read(¤t->mm->mmap_sem); - if (err < 0) - return err; - BUG_ON(err != 1); - offset = cs->addr % PAGE_SIZE; - cs->mapaddr = kmap_atomic(cs->pg, KM_USER0); -+#ifdef DCACHE_BUG -+ fuse_flush_cache_page(vma, cs->addr, page_to_pfn(cs->pg)); -+#endif - cs->buf = cs->mapaddr + offset; - cs->len = min(PAGE_SIZE - offset, cs->seglen); - cs->seglen -= cs->len; -@@ -573,6 +589,11 @@ static int fuse_copy_do(struct fuse_copy - { - unsigned ncpy = min(*size, cs->len); - if (val) { -+#ifdef DCACHE_BUG -+ // patch from mailing list, it is very important, otherwise, -+ // can't mount, or ls mount point will hang -+ fuse_flush_cache_all(); -+#endif - if (cs->write) - memcpy(cs->buf, *val, ncpy); - else ---- a/fs/fuse/fuse_i.h -+++ b/fs/fuse/fuse_i.h -@@ -8,6 +8,7 @@ - - #ifndef _FS_FUSE_I_H - #define _FS_FUSE_I_H -+#define DCACHE_BUG - - #include - #include ---- a/fs/fuse/inode.c -+++ b/fs/fuse/inode.c -@@ -1130,6 +1130,10 @@ static int __init fuse_init(void) - printk(KERN_INFO "fuse init (API version %i.%i)\n", - FUSE_KERNEL_VERSION, FUSE_KERNEL_MINOR_VERSION); - -+#ifdef DCACHE_BUG -+printk("fuse init: DCACHE_BUG enabled\n"); -+#endif -+ - INIT_LIST_HEAD(&fuse_conn_list); - res = fuse_fs_init(); - if (res) diff --git a/target/linux/brcm47xx/patches-2.6.31/310-no_highpage.patch b/target/linux/brcm47xx/patches-2.6.31/310-no_highpage.patch deleted file mode 100644 index 292060dea..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/310-no_highpage.patch +++ /dev/null @@ -1,66 +0,0 @@ ---- a/arch/mips/include/asm/page.h -+++ b/arch/mips/include/asm/page.h -@@ -42,6 +42,7 @@ - #ifndef __ASSEMBLY__ - - #include -+#include - #include - - extern void build_clear_page(void); -@@ -77,13 +78,16 @@ static inline void clear_user_page(void - flush_data_cache_page((unsigned long)addr); - } - --extern void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, -- struct page *to); --struct vm_area_struct; --extern void copy_user_highpage(struct page *to, struct page *from, -- unsigned long vaddr, struct vm_area_struct *vma); -+static inline void copy_user_page(void *vto, void *vfrom, unsigned long vaddr, -+ struct page *to) -+{ -+ extern void (*flush_data_cache_page)(unsigned long addr); - --#define __HAVE_ARCH_COPY_USER_HIGHPAGE -+ copy_page(vto, vfrom); -+ if (!cpu_has_ic_fills_f_dc || -+ pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) -+ flush_data_cache_page((unsigned long)vto); -+} - - /* - * These are used to make use of C type-checking.. ---- a/arch/mips/mm/init.c -+++ b/arch/mips/mm/init.c -@@ -199,30 +199,6 @@ void kunmap_coherent(void) - preempt_check_resched(); - } - --void copy_user_highpage(struct page *to, struct page *from, -- unsigned long vaddr, struct vm_area_struct *vma) --{ -- void *vfrom, *vto; -- -- vto = kmap_atomic(to, KM_USER1); -- if (cpu_has_dc_aliases && cpu_use_kmap_coherent && -- page_mapped(from) && !Page_dcache_dirty(from)) { -- vfrom = kmap_coherent(from, vaddr); -- copy_page(vto, vfrom); -- kunmap_coherent(); -- } else { -- vfrom = kmap_atomic(from, KM_USER0); -- copy_page(vto, vfrom); -- kunmap_atomic(vfrom, KM_USER0); -- } -- if ((!cpu_has_ic_fills_f_dc) || -- pages_do_alias((unsigned long)vto, vaddr & PAGE_MASK)) -- flush_data_cache_page((unsigned long)vto); -- kunmap_atomic(vto, KM_USER1); -- /* Make sure this page is cleared on other CPU's too before using it */ -- smp_wmb(); --} -- - void copy_to_user_page(struct vm_area_struct *vma, - struct page *page, unsigned long vaddr, void *dst, const void *src, - unsigned long len) diff --git a/target/linux/brcm47xx/patches-2.6.31/400-arch-bcm47xx.patch b/target/linux/brcm47xx/patches-2.6.31/400-arch-bcm47xx.patch deleted file mode 100644 index 1c15a35e9..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/400-arch-bcm47xx.patch +++ /dev/null @@ -1,319 +0,0 @@ ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -73,6 +73,7 @@ config BCM47XX - select SSB_DRIVER_MIPS - select SSB_DRIVER_EXTIF - select SSB_EMBEDDED -+ select SSB_B43_PCI_BRIDGE if PCI - select SSB_PCICORE_HOSTMODE if PCI - select GENERIC_GPIO - select SYS_HAS_EARLY_PRINTK ---- a/arch/mips/bcm47xx/Makefile -+++ b/arch/mips/bcm47xx/Makefile -@@ -3,4 +3,4 @@ - # under Linux. - # - --obj-y := gpio.o irq.o prom.o serial.o setup.o time.o wgt634u.o -+obj-y := cfe_env.o gpio.o irq.o nvram.o prom.o serial.o setup.o time.o wgt634u.o ---- a/arch/mips/bcm47xx/irq.c -+++ b/arch/mips/bcm47xx/irq.c -@@ -1,5 +1,6 @@ - /* - * Copyright (C) 2004 Florian Schirmer -+ * Copyright (C) 2008 Michael Buesch - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the -@@ -23,10 +24,19 @@ - */ - - #include -+#include -+#include - #include - #include -+#include -+#include -+ - #include - -+ -+extern struct ssb_bus ssb_bcm47xx; -+ -+ - void plat_irq_dispatch(void) - { - u32 cause; ---- a/arch/mips/bcm47xx/nvram.c -+++ b/arch/mips/bcm47xx/nvram.c -@@ -24,10 +24,10 @@ - #include - #include - --#include -+#include "include/nvram.h" - - #define MB * 1048576 --extern struct ssb_bus ssb; -+extern struct ssb_bus ssb_bcm47xx; - - static char nvram_buf[NVRAM_SPACE]; - static int cfe_env; -@@ -36,7 +36,7 @@ extern char *cfe_env_get(char *nv_buf, c - /* Probe for NVRAM header */ - static void __init early_nvram_init(void) - { -- struct ssb_mipscore *mcore = &ssb.mipscore; -+ struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore; - struct nvram_header *header; - int i; - u32 base, lim, off; ---- a/arch/mips/bcm47xx/setup.c -+++ b/arch/mips/bcm47xx/setup.c -@@ -2,7 +2,7 @@ - * Copyright (C) 2004 Florian Schirmer - * Copyright (C) 2005 Waldemar Brodkorb - * Copyright (C) 2006 Felix Fietkau -- * Copyright (C) 2006 Michael Buesch -+ * Copyright (C) 2006-2008 Michael Buesch - * - * This program is free software; you can redistribute it and/or modify it - * under the terms of the GNU General Public License as published by the -@@ -25,18 +25,28 @@ - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -+#include - #include - #include - #include -+#include -+#include -+#include -+#include -+#include - #include - #include - #include --#include - #include -+#include -+ -+#include "include/nvram.h" - - struct ssb_bus ssb_bcm47xx; - EXPORT_SYMBOL(ssb_bcm47xx); - -+extern void bcm47xx_pci_init(void); -+ - static void bcm47xx_machine_restart(char *command) - { - printk(KERN_ALERT "Please stand by while rebooting the system...\n"); -@@ -56,7 +66,7 @@ static void bcm47xx_machine_halt(void) - cpu_relax(); - } - --static void str2eaddr(char *str, char *dest) -+static void e_aton(char *str, char *dest) - { - int i = 0; - -@@ -73,52 +83,142 @@ static void str2eaddr(char *str, char *d - } - } - --static int bcm47xx_get_invariants(struct ssb_bus *bus, -- struct ssb_init_invariants *iv) -+static void bcm47xx_fill_sprom(struct ssb_sprom *sprom) - { -- char buf[100]; -+ char *s; - -- /* Fill boardinfo structure */ -- memset(&(iv->boardinfo), 0 , sizeof(struct ssb_boardinfo)); -+ memset(sprom, 0xFF, sizeof(struct ssb_sprom)); - -- if (cfe_getenv("boardvendor", buf, sizeof(buf)) >= 0) -- iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0); -- if (cfe_getenv("boardtype", buf, sizeof(buf)) >= 0) -- iv->boardinfo.type = (u16)simple_strtoul(buf, NULL, 0); -- if (cfe_getenv("boardrev", buf, sizeof(buf)) >= 0) -- iv->boardinfo.rev = (u16)simple_strtoul(buf, NULL, 0); -- -- /* Fill sprom structure */ -- memset(&(iv->sprom), 0, sizeof(struct ssb_sprom)); -- iv->sprom.revision = 3; -- -- if (cfe_getenv("et0macaddr", buf, sizeof(buf)) >= 0) -- str2eaddr(buf, iv->sprom.et0mac); -- if (cfe_getenv("et1macaddr", buf, sizeof(buf)) >= 0) -- str2eaddr(buf, iv->sprom.et1mac); -- if (cfe_getenv("et0phyaddr", buf, sizeof(buf)) >= 0) -- iv->sprom.et0phyaddr = simple_strtoul(buf, NULL, 10); -- if (cfe_getenv("et1phyaddr", buf, sizeof(buf)) >= 0) -- iv->sprom.et1phyaddr = simple_strtoul(buf, NULL, 10); -- if (cfe_getenv("et0mdcport", buf, sizeof(buf)) >= 0) -- iv->sprom.et0mdcport = simple_strtoul(buf, NULL, 10); -- if (cfe_getenv("et1mdcport", buf, sizeof(buf)) >= 0) -- iv->sprom.et1mdcport = simple_strtoul(buf, NULL, 10); -+ sprom->revision = 1; -+ if ((s = nvram_get("il0macaddr"))) -+ e_aton(s, sprom->il0mac); -+ if ((s = nvram_get("et0macaddr"))) -+ e_aton(s, sprom->et0mac); -+ if ((s = nvram_get("et1macaddr"))) -+ e_aton(s, sprom->et1mac); -+ if ((s = nvram_get("et0phyaddr"))) -+ sprom->et0phyaddr = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("et1phyaddr"))) -+ sprom->et1phyaddr = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("et0mdcport"))) -+ sprom->et0mdcport = !!simple_strtoul(s, NULL, 10); -+ if ((s = nvram_get("et1mdcport"))) -+ sprom->et1mdcport = !!simple_strtoul(s, NULL, 10); -+ if ((s = nvram_get("pa0b0"))) -+ sprom->pa0b0 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa0b1"))) -+ sprom->pa0b1 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa0b2"))) -+ sprom->pa0b2 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa1b0"))) -+ sprom->pa1b0 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa1b1"))) -+ sprom->pa1b1 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa1b2"))) -+ sprom->pa1b2 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("wl0gpio0"))) -+ sprom->gpio0 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("wl0gpio1"))) -+ sprom->gpio1 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("wl0gpio2"))) -+ sprom->gpio2 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("wl0gpio3"))) -+ sprom->gpio3 = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa0maxpwr"))) -+ sprom->maxpwr_bg = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa1maxpwr"))) -+ sprom->maxpwr_a = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa0itssit"))) -+ sprom->itssi_bg = simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("pa1itssit"))) -+ sprom->itssi_a = simple_strtoul(s, NULL, 0); -+ sprom->boardflags_lo = 0; -+ if ((s = nvram_get("boardflags"))) -+ sprom->boardflags_lo = simple_strtoul(s, NULL, 0); -+ sprom->boardflags_hi = 0; -+ if ((s = nvram_get("boardflags2"))) -+ sprom->boardflags_hi = simple_strtoul(s, NULL, 0); -+} -+ -+static int bcm47xx_get_invariants(struct ssb_bus *bus, struct ssb_init_invariants *iv) -+{ -+ char *s; -+ -+ iv->boardinfo.vendor = SSB_BOARDVENDOR_BCM; -+ if ((s = nvram_get("boardtype"))) -+ iv->boardinfo.type = (u16)simple_strtoul(s, NULL, 0); -+ if ((s = nvram_get("boardrev"))) -+ iv->boardinfo.rev = (u16)simple_strtoul(s, NULL, 0); -+ -+ bcm47xx_fill_sprom(&iv->sprom); -+ -+ if ((s = nvram_get("cardbus"))) -+ iv->has_cardbus_slot = !!simple_strtoul(s, NULL, 10); - - return 0; - } - - void __init plat_mem_setup(void) - { -- int err; -+ int i, err; -+ char *s; -+ struct ssb_mipscore *mcore; -+ -+ err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE, bcm47xx_get_invariants); -+ if (err) { -+ const char *msg = "Failed to initialize SSB bus (err %d)\n"; -+ printk(msg, err); /* Make sure the message gets out of the box. */ -+ panic(msg, err); -+ } -+ mcore = &ssb_bcm47xx.mipscore; - -- err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE, -- bcm47xx_get_invariants); -- if (err) -- panic("Failed to initialize SSB bus (err %d)\n", err); -+ s = nvram_get("kernel_args"); -+ if (s && !strncmp(s, "console=ttyS1", 13)) { -+ struct ssb_serial_port port; -+ -+ printk("Swapping serial ports!\n"); -+ /* swap serial ports */ -+ memcpy(&port, &mcore->serial_ports[0], sizeof(port)); -+ memcpy(&mcore->serial_ports[0], &mcore->serial_ports[1], sizeof(port)); -+ memcpy(&mcore->serial_ports[1], &port, sizeof(port)); -+ } -+ -+ for (i = 0; i < mcore->nr_serial_ports; i++) { -+ struct ssb_serial_port *port = &(mcore->serial_ports[i]); -+ struct uart_port s; -+ -+ memset(&s, 0, sizeof(s)); -+ s.line = i; -+ s.mapbase = (unsigned int) port->regs; -+ s.membase = port->regs; -+ s.irq = port->irq + 2; -+ s.uartclk = port->baud_base; -+ s.flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ; -+ s.iotype = SERIAL_IO_MEM; -+ s.regshift = port->reg_shift; -+ -+ early_serial_setup(&s); -+ } -+ printk("Serial init done.\n"); - - _machine_restart = bcm47xx_machine_restart; - _machine_halt = bcm47xx_machine_halt; - pm_power_off = bcm47xx_machine_halt; - } - -+static int __init bcm47xx_register_gpiodev(void) -+{ -+ static struct resource res = { -+ .start = 0xFFFFFFFF, -+ }; -+ struct platform_device *pdev; -+ -+ pdev = platform_device_register_simple("GPIODEV", 0, &res, 1); -+ if (!pdev) { -+ printk(KERN_ERR "bcm47xx: GPIODEV init failed\n"); -+ return -ENODEV; -+ } -+ -+ return 0; -+} -+device_initcall(bcm47xx_register_gpiodev); ---- a/arch/mips/bcm47xx/time.c -+++ b/arch/mips/bcm47xx/time.c -@@ -22,11 +22,17 @@ - * 675 Mass Ave, Cambridge, MA 02139, USA. - */ - -- - #include -+#include -+#include -+#include -+#include - #include -+#include -+#include - #include --#include -+ -+extern struct ssb_bus ssb_bcm47xx; - - void __init plat_time_init(void) - { diff --git a/target/linux/brcm47xx/patches-2.6.31/601-mips-remove-pci-collision-check.patch b/target/linux/brcm47xx/patches-2.6.31/601-mips-remove-pci-collision-check.patch deleted file mode 100644 index 7860ca0dd..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/601-mips-remove-pci-collision-check.patch +++ /dev/null @@ -1,18 +0,0 @@ ---- a/arch/mips/pci/pci.c -+++ b/arch/mips/pci/pci.c -@@ -185,12 +185,10 @@ static int pcibios_enable_resources(stru - if ((idx == PCI_ROM_RESOURCE) && - (!(r->flags & IORESOURCE_ROM_ENABLE))) - continue; -- if (!r->start && r->end) { -- printk(KERN_ERR "PCI: Device %s not available " -- "because of resource collisions\n", -+ if (!r->start && r->end) -+ printk(KERN_WARNING "PCI: Device %s resource" -+ "collisions detected. Ignoring...\n", - pci_name(dev)); -- return -EINVAL; -- } - if (r->flags & IORESOURCE_IO) - cmd |= PCI_COMMAND_IO; - if (r->flags & IORESOURCE_MEM) diff --git a/target/linux/brcm47xx/patches-2.6.31/700-ssb-gigabit-ethernet-driver.patch b/target/linux/brcm47xx/patches-2.6.31/700-ssb-gigabit-ethernet-driver.patch deleted file mode 100644 index f09eb4f50..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/700-ssb-gigabit-ethernet-driver.patch +++ /dev/null @@ -1,328 +0,0 @@ ---- a/drivers/net/tg3.c -+++ b/drivers/net/tg3.c -@@ -41,6 +41,7 @@ - #include - #include - #include -+#include - - #include - #include -@@ -446,8 +447,9 @@ static void _tw32_flush(struct tg3 *tp, - static inline void tw32_mailbox_flush(struct tg3 *tp, u32 off, u32 val) - { - tp->write32_mbox(tp, off, val); -- if (!(tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER) && -- !(tp->tg3_flags2 & TG3_FLG2_ICH_WORKAROUND)) -+ if ((tp->tg3_flags3 & TG3_FLG3_FLUSH_POSTED_WRITES) || -+ (!(tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER) && -+ !(tp->tg3_flags2 & TG3_FLG2_ICH_WORKAROUND))) - tp->read32_mbox(tp, off); - } - -@@ -457,7 +459,7 @@ static void tg3_write32_tx_mbox(struct t - writel(val, mbox); - if (tp->tg3_flags & TG3_FLAG_TXD_MBOX_HWBUG) - writel(val, mbox); -- if (tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER) -+ if ((tp->tg3_flags & TG3_FLAG_MBOX_WRITE_REORDER) || (tp->tg3_flags3 & TG3_FLG3_FLUSH_POSTED_WRITES)) - readl(mbox); - } - -@@ -729,7 +731,7 @@ static void tg3_switch_clocks(struct tg3 - - #define PHY_BUSY_LOOPS 5000 - --static int tg3_readphy(struct tg3 *tp, int reg, u32 *val) -+static int __tg3_readphy(struct tg3 *tp, unsigned int phy_addr, int reg, u32 *val) - { - u32 frame_val; - unsigned int loops; -@@ -743,7 +745,7 @@ static int tg3_readphy(struct tg3 *tp, i - - *val = 0x0; - -- frame_val = ((PHY_ADDR << MI_COM_PHY_ADDR_SHIFT) & -+ frame_val = ((phy_addr << MI_COM_PHY_ADDR_SHIFT) & - MI_COM_PHY_ADDR_MASK); - frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & - MI_COM_REG_ADDR_MASK); -@@ -778,7 +780,12 @@ static int tg3_readphy(struct tg3 *tp, i - return ret; - } - --static int tg3_writephy(struct tg3 *tp, int reg, u32 val) -+static int tg3_readphy(struct tg3 *tp, int reg, u32 *val) -+{ -+ return __tg3_readphy(tp, PHY_ADDR, reg, val); -+} -+ -+static int __tg3_writephy(struct tg3 *tp, unsigned int phy_addr, int reg, u32 val) - { - u32 frame_val; - unsigned int loops; -@@ -794,7 +801,7 @@ static int tg3_writephy(struct tg3 *tp, - udelay(80); - } - -- frame_val = ((PHY_ADDR << MI_COM_PHY_ADDR_SHIFT) & -+ frame_val = ((phy_addr << MI_COM_PHY_ADDR_SHIFT) & - MI_COM_PHY_ADDR_MASK); - frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & - MI_COM_REG_ADDR_MASK); -@@ -827,6 +834,11 @@ static int tg3_writephy(struct tg3 *tp, - return ret; - } - -+static int tg3_writephy(struct tg3 *tp, int reg, u32 val) -+{ -+ return __tg3_writephy(tp, PHY_ADDR, reg, val); -+} -+ - static int tg3_bmcr_reset(struct tg3 *tp) - { - u32 phy_control; -@@ -2263,6 +2275,9 @@ static int tg3_nvram_read(struct tg3 *tp - { - int ret; - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) -+ return -ENODEV; -+ - if (!(tp->tg3_flags & TG3_FLAG_NVRAM)) - return tg3_nvram_read_using_eeprom(tp, offset, val); - -@@ -2594,8 +2609,10 @@ static int tg3_set_power_state(struct tg - tg3_frob_aux_power(tp); - - /* Workaround for unstable PLL clock */ -- if ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) || -- (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX)) { -+ if ((tp->phy_id & PHY_ID_MASK) != PHY_ID_BCM5750_2 && -+ /* !!! FIXME !!! */ -+ ((GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_AX) || -+ (GET_CHIP_REV(tp->pci_chip_rev_id) == CHIPREV_5750_BX))) { - u32 val = tr32(0x7d00); - - val &= ~((1 << 16) | (1 << 4) | (1 << 2) | (1 << 1) | 1); -@@ -3087,6 +3104,14 @@ relink: - - tg3_phy_copper_begin(tp); - -+ if (tp->tg3_flags3 & TG3_FLG3_ROBOSWITCH) { -+ current_link_up = 1; -+ current_speed = SPEED_1000; //FIXME -+ current_duplex = DUPLEX_FULL; -+ tp->link_config.active_speed = current_speed; -+ tp->link_config.active_duplex = current_duplex; -+ } -+ - tg3_readphy(tp, MII_BMSR, &tmp); - if (!tg3_readphy(tp, MII_BMSR, &tmp) && - (tmp & BMSR_LSTATUS)) -@@ -6000,6 +6025,11 @@ static int tg3_poll_fw(struct tg3 *tp) - int i; - u32 val; - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) { -+ /* We don't use firmware. */ -+ return 0; -+ } -+ - if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5906) { - /* Wait up to 20ms for init done. */ - for (i = 0; i < 200; i++) { -@@ -6257,6 +6287,14 @@ static int tg3_chip_reset(struct tg3 *tp - tw32(0x5000, 0x400); - } - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) { -+ /* BCM4785: In order to avoid repercussions from using potentially -+ * defective internal ROM, stop the Rx RISC CPU, which is not -+ * required. */ -+ tg3_stop_fw(tp); -+ tg3_halt_cpu(tp, RX_CPU_BASE); -+ } -+ - tw32(GRC_MODE, tp->grc_mode); - - if (tp->pci_chip_rev_id == CHIPREV_ID_5705_A0) { -@@ -6409,9 +6447,12 @@ static int tg3_halt_cpu(struct tg3 *tp, - return -ENODEV; - } - -- /* Clear firmware's nvram arbitration. */ -- if (tp->tg3_flags & TG3_FLAG_NVRAM) -- tw32(NVRAM_SWARB, SWARB_REQ_CLR0); -+ if (!(tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE)) { -+ /* Clear firmware's nvram arbitration. */ -+ if (tp->tg3_flags & TG3_FLAG_NVRAM) -+ tw32(NVRAM_SWARB, SWARB_REQ_CLR0); -+ } -+ - return 0; - } - -@@ -6474,6 +6515,11 @@ static int tg3_load_5701_a0_firmware_fix - const __be32 *fw_data; - int err, i; - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) { -+ /* We don't use firmware. */ -+ return 0; -+ } -+ - fw_data = (void *)tp->fw->data; - - /* Firmware blob starts with version numbers, followed by -@@ -6533,6 +6579,11 @@ static int tg3_load_tso_firmware(struct - unsigned long cpu_base, cpu_scratch_base, cpu_scratch_size; - int err, i; - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) { -+ /* We don't use firmware. */ -+ return 0; -+ } -+ - if (tp->tg3_flags2 & TG3_FLG2_HW_TSO) - return 0; - -@@ -7444,6 +7495,11 @@ static void tg3_timer(unsigned long __op - - spin_lock(&tp->lock); - -+ if (tp->tg3_flags3 & TG3_FLG3_FLUSH_POSTED_WRITES) { -+ /* BCM4785: Flush posted writes from GbE to host memory. */ -+ tr32(HOSTCC_MODE); -+ } -+ - if (!(tp->tg3_flags & TG3_FLAG_TAGGED_STATUS)) { - /* All of this garbage is because when using non-tagged - * IRQ status the mailbox/status_block protocol the chip -@@ -9217,6 +9273,11 @@ static int tg3_test_nvram(struct tg3 *tp - if (tp->tg3_flags3 & TG3_FLG3_NO_NVRAM) - return 0; - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) { -+ /* We don't have NVRAM. */ -+ return 0; -+ } -+ - if (tg3_nvram_read(tp, 0, &magic) != 0) - return -EIO; - -@@ -10010,7 +10071,7 @@ static int tg3_ioctl(struct net_device * - return -EAGAIN; - - spin_lock_bh(&tp->lock); -- err = tg3_readphy(tp, data->reg_num & 0x1f, &mii_regval); -+ err = __tg3_readphy(tp, data->phy_id & 0x1f, data->reg_num & 0x1f, &mii_regval); - spin_unlock_bh(&tp->lock); - - data->val_out = mii_regval; -@@ -10029,7 +10090,7 @@ static int tg3_ioctl(struct net_device * - return -EAGAIN; - - spin_lock_bh(&tp->lock); -- err = tg3_writephy(tp, data->reg_num & 0x1f, data->val_in); -+ err = __tg3_writephy(tp, data->phy_id & 0x1f, data->reg_num & 0x1f, data->val_in); - spin_unlock_bh(&tp->lock); - - return err; -@@ -10619,6 +10680,12 @@ static void __devinit tg3_get_57780_nvra - /* Chips other than 5700/5701 use the NVRAM for fetching info. */ - static void __devinit tg3_nvram_init(struct tg3 *tp) - { -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) { -+ /* No NVRAM and EEPROM on the SSB Broadcom GigE core. */ -+ tp->tg3_flags &= ~(TG3_FLAG_NVRAM | TG3_FLAG_NVRAM_BUFFERED); -+ return; -+ } -+ - tw32_f(GRC_EEPROM_ADDR, - (EEPROM_ADDR_FSM_RESET | - (EEPROM_DEFAULT_CLOCK_PERIOD << -@@ -10877,6 +10944,9 @@ static int tg3_nvram_write_block(struct - { - int ret; - -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) -+ return -ENODEV; -+ - if (tp->tg3_flags & TG3_FLAG_EEPROM_WRITE_PROT) { - tw32_f(GRC_LOCAL_CTRL, tp->grc_local_ctrl & - ~GRC_LCLCTRL_GPIO_OUTPUT1); -@@ -12136,6 +12206,11 @@ static int __devinit tg3_get_invariants( - GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5701))) - tp->tg3_flags |= TG3_FLAG_SRAM_USE_CONFIG; - -+ if (tp->tg3_flags3 & TG3_FLG3_FLUSH_POSTED_WRITES) { -+ tp->write32_tx_mbox = tg3_write_flush_reg32; -+ tp->write32_rx_mbox = tg3_write_flush_reg32; -+ } -+ - /* Get eeprom hw config before calling tg3_set_power_state(). - * In particular, the TG3_FLG2_IS_NIC flag must be - * determined before calling tg3_set_power_state() so that -@@ -12513,6 +12588,10 @@ static int __devinit tg3_get_device_addr - } - - if (!is_valid_ether_addr(&dev->dev_addr[0])) { -+ if (tp->tg3_flags3 & TG3_FLG3_IS_SSB_CORE) -+ ssb_gige_get_macaddr(tp->pdev, &dev->dev_addr[0]); -+ } -+ if (!is_valid_ether_addr(&dev->dev_addr[0])) { - #ifdef CONFIG_SPARC - if (!tg3_get_default_macaddr_sparc(tp)) - return 0; -@@ -13004,6 +13083,7 @@ static char * __devinit tg3_phy_string(s - case PHY_ID_BCM5704: return "5704"; - case PHY_ID_BCM5705: return "5705"; - case PHY_ID_BCM5750: return "5750"; -+ case PHY_ID_BCM5750_2: return "5750-2"; - case PHY_ID_BCM5752: return "5752"; - case PHY_ID_BCM5714: return "5714"; - case PHY_ID_BCM5780: return "5780"; -@@ -13214,6 +13294,13 @@ static int __devinit tg3_init_one(struct - tp->msg_enable = tg3_debug; - else - tp->msg_enable = TG3_DEF_MSG_ENABLE; -+ if (pdev_is_ssb_gige_core(pdev)) { -+ tp->tg3_flags3 |= TG3_FLG3_IS_SSB_CORE; -+ if (ssb_gige_must_flush_posted_writes(pdev)) -+ tp->tg3_flags3 |= TG3_FLG3_FLUSH_POSTED_WRITES; -+ if (ssb_gige_have_roboswitch(pdev)) -+ tp->tg3_flags3 |= TG3_FLG3_ROBOSWITCH; -+ } - - /* The word/byte swap controls here control register access byte - * swapping. DMA data byte swapping is controlled in the GRC_MODE ---- a/drivers/net/tg3.h -+++ b/drivers/net/tg3.h -@@ -1853,6 +1853,9 @@ - #define NIC_SRAM_RGMII_STD_IBND_DISABLE 0x00000004 - #define NIC_SRAM_RGMII_EXT_IBND_RX_EN 0x00000008 - #define NIC_SRAM_RGMII_EXT_IBND_TX_EN 0x00000010 -+#define TG3_FLG3_IS_SSB_CORE 0x00000800 -+#define TG3_FLG3_FLUSH_POSTED_WRITES 0x00001000 -+#define TG3_FLG3_ROBOSWITCH 0x00002000 - - #define NIC_SRAM_RX_MINI_BUFFER_DESC 0x00001000 - -@@ -2701,6 +2704,7 @@ struct tg3 { - #define PHY_ID_BCM5714 0x60008340 - #define PHY_ID_BCM5780 0x60008350 - #define PHY_ID_BCM5755 0xbc050cc0 -+#define PHY_ID_BCM5750_2 0xbc050cd0 - #define PHY_ID_BCM5787 0xbc050ce0 - #define PHY_ID_BCM5756 0xbc050ed0 - #define PHY_ID_BCM5784 0xbc050fa0 -@@ -2745,7 +2749,7 @@ struct tg3 { - (X) == PHY_ID_BCM5780 || (X) == PHY_ID_BCM5787 || \ - (X) == PHY_ID_BCM5755 || (X) == PHY_ID_BCM5756 || \ - (X) == PHY_ID_BCM5906 || (X) == PHY_ID_BCM5761 || \ -- (X) == PHY_ID_BCM8002) -+ (X) == PHY_ID_BCM8002 || (X) == PHY_ID_BCM5750_2) - - struct tg3_hw_stats *hw_stats; - dma_addr_t stats_mapping; diff --git a/target/linux/brcm47xx/patches-2.6.31/800-fix_cfe_detection.patch b/target/linux/brcm47xx/patches-2.6.31/800-fix_cfe_detection.patch deleted file mode 100644 index 50f911437..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/800-fix_cfe_detection.patch +++ /dev/null @@ -1,108 +0,0 @@ ---- a/arch/mips/bcm47xx/prom.c -+++ b/arch/mips/bcm47xx/prom.c -@@ -32,6 +32,7 @@ - #include - - static int cfe_cons_handle; -+static void (* __prom_putchar)(char c); - - const char *get_system_type(void) - { -@@ -40,65 +41,40 @@ const char *get_system_type(void) - - void prom_putchar(char c) - { -+ if (__prom_putchar) -+ __prom_putchar(c); -+} -+ -+void prom_putchar_cfe(char c) -+{ - while (cfe_write(cfe_cons_handle, &c, 1) == 0) - ; - } - --static __init void prom_init_cfe(void) -+static __init int prom_init_cfe(void) - { - uint32_t cfe_ept; - uint32_t cfe_handle; - uint32_t cfe_eptseal; -- int argc = fw_arg0; -- char **envp = (char **) fw_arg2; -- int *prom_vec = (int *) fw_arg3; -- -- /* -- * Check if a loader was used; if NOT, the 4 arguments are -- * what CFE gives us (handle, 0, EPT and EPTSEAL) -- */ -- if (argc < 0) { -- cfe_handle = (uint32_t)argc; -- cfe_ept = (uint32_t)envp; -- cfe_eptseal = (uint32_t)prom_vec; -- } else { -- if ((int)prom_vec < 0) { -- /* -- * Old loader; all it gives us is the handle, -- * so use the "known" entrypoint and assume -- * the seal. -- */ -- cfe_handle = (uint32_t)prom_vec; -- cfe_ept = 0xBFC00500; -- cfe_eptseal = CFE_EPTSEAL; -- } else { -- /* -- * Newer loaders bundle the handle/ept/eptseal -- * Note: prom_vec is in the loader's useg -- * which is still alive in the TLB. -- */ -- cfe_handle = prom_vec[0]; -- cfe_ept = prom_vec[2]; -- cfe_eptseal = prom_vec[3]; -- } -- } - -- if (cfe_eptseal != CFE_EPTSEAL) { -- /* too early for panic to do any good */ -- printk(KERN_ERR "CFE's entrypoint seal doesn't match."); -- while (1) ; -- } -+ cfe_eptseal = (uint32_t) fw_arg3; -+ cfe_handle = (uint32_t) fw_arg0; -+ cfe_ept = (uint32_t) fw_arg2; -+ -+ if (cfe_eptseal != CFE_EPTSEAL) -+ return -1; - - cfe_init(cfe_handle, cfe_ept); -+ return 0; - } - --static __init void prom_init_console(void) -+static __init void prom_init_console_cfe(void) - { - /* Initialize CFE console */ - cfe_cons_handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE); - } - --static __init void prom_init_cmdline(void) -+static __init void prom_init_cmdline_cfe(void) - { - char buf[CL_SIZE]; - -@@ -160,9 +136,12 @@ static __init void prom_init_mem(void) - - void __init prom_init(void) - { -- prom_init_cfe(); -- prom_init_console(); -- prom_init_cmdline(); -+ if (prom_init_cfe() == 0) { -+ //prom_init_console_cfe(); -+ //prom_init_cmdline_cfe(); -+ __prom_putchar = prom_putchar_cfe; -+ } -+ - prom_init_mem(); - } - diff --git a/target/linux/brcm47xx/patches-2.6.31/812-disable_wgt634u_crap.patch b/target/linux/brcm47xx/patches-2.6.31/812-disable_wgt634u_crap.patch deleted file mode 100644 index eb212f3d1..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/812-disable_wgt634u_crap.patch +++ /dev/null @@ -1,178 +0,0 @@ ---- a/arch/mips/bcm47xx/Makefile -+++ b/arch/mips/bcm47xx/Makefile -@@ -3,4 +3,4 @@ - # under Linux. - # - --obj-y := cfe_env.o gpio.o irq.o nvram.o prom.o serial.o setup.o time.o wgt634u.o -+obj-y := cfe_env.o gpio.o irq.o nvram.o prom.o serial.o setup.o time.o ---- a/arch/mips/bcm47xx/wgt634u.c -+++ /dev/null -@@ -1,167 +0,0 @@ --/* -- * This file is subject to the terms and conditions of the GNU General Public -- * License. See the file "COPYING" in the main directory of this archive -- * for more details. -- * -- * Copyright (C) 2007 Aurelien Jarno -- */ -- --#include --#include --#include --#include --#include --#include --#include --#include --#include -- --/* GPIO definitions for the WGT634U */ --#define WGT634U_GPIO_LED 3 --#define WGT634U_GPIO_RESET 2 --#define WGT634U_GPIO_TP1 7 --#define WGT634U_GPIO_TP2 6 --#define WGT634U_GPIO_TP3 5 --#define WGT634U_GPIO_TP4 4 --#define WGT634U_GPIO_TP5 1 -- --static struct gpio_led wgt634u_leds[] = { -- { -- .name = "power", -- .gpio = WGT634U_GPIO_LED, -- .active_low = 1, -- .default_trigger = "heartbeat", -- }, --}; -- --static struct gpio_led_platform_data wgt634u_led_data = { -- .num_leds = ARRAY_SIZE(wgt634u_leds), -- .leds = wgt634u_leds, --}; -- --static struct platform_device wgt634u_gpio_leds = { -- .name = "leds-gpio", -- .id = -1, -- .dev = { -- .platform_data = &wgt634u_led_data, -- } --}; -- -- --/* 8MiB flash. The struct mtd_partition matches original Netgear WGT634U -- firmware. */ --static struct mtd_partition wgt634u_partitions[] = { -- { -- .name = "cfe", -- .offset = 0, -- .size = 0x60000, /* 384k */ -- .mask_flags = MTD_WRITEABLE /* force read-only */ -- }, -- { -- .name = "config", -- .offset = 0x60000, -- .size = 0x20000 /* 128k */ -- }, -- { -- .name = "linux", -- .offset = 0x80000, -- .size = 0x140000 /* 1280k */ -- }, -- { -- .name = "jffs", -- .offset = 0x1c0000, -- .size = 0x620000 /* 6272k */ -- }, -- { -- .name = "nvram", -- .offset = 0x7e0000, -- .size = 0x20000 /* 128k */ -- }, --}; -- --static struct physmap_flash_data wgt634u_flash_data = { -- .parts = wgt634u_partitions, -- .nr_parts = ARRAY_SIZE(wgt634u_partitions) --}; -- --static struct resource wgt634u_flash_resource = { -- .flags = IORESOURCE_MEM, --}; -- --static struct platform_device wgt634u_flash = { -- .name = "physmap-flash", -- .id = 0, -- .dev = { .platform_data = &wgt634u_flash_data, }, -- .resource = &wgt634u_flash_resource, -- .num_resources = 1, --}; -- --/* Platform devices */ --static struct platform_device *wgt634u_devices[] __initdata = { -- &wgt634u_flash, -- &wgt634u_gpio_leds, --}; -- --static irqreturn_t gpio_interrupt(int irq, void *ignored) --{ -- int state; -- -- /* Interrupts are shared, check if the current one is -- a GPIO interrupt. */ -- if (!ssb_chipco_irq_status(&ssb_bcm47xx.chipco, -- SSB_CHIPCO_IRQ_GPIO)) -- return IRQ_NONE; -- -- state = gpio_get_value(WGT634U_GPIO_RESET); -- -- /* Interrupt are level triggered, revert the interrupt polarity -- to clear the interrupt. */ -- gpio_polarity(WGT634U_GPIO_RESET, state); -- -- if (!state) { -- printk(KERN_INFO "Reset button pressed"); -- ctrl_alt_del(); -- } -- -- return IRQ_HANDLED; --} -- --static int __init wgt634u_init(void) --{ -- /* There is no easy way to detect that we are running on a WGT634U -- * machine. Use the MAC address as an heuristic. Netgear Inc. has -- * been allocated ranges 00:09:5b:xx:xx:xx and 00:0f:b5:xx:xx:xx. -- */ -- -- u8 *et0mac = ssb_bcm47xx.sprom.et0mac; -- -- if (et0mac[0] == 0x00 && -- ((et0mac[1] == 0x09 && et0mac[2] == 0x5b) || -- (et0mac[1] == 0x0f && et0mac[2] == 0xb5))) { -- struct ssb_mipscore *mcore = &ssb_bcm47xx.mipscore; -- -- printk(KERN_INFO "WGT634U machine detected.\n"); -- -- if (!request_irq(gpio_to_irq(WGT634U_GPIO_RESET), -- gpio_interrupt, IRQF_SHARED, -- "WGT634U GPIO", &ssb_bcm47xx.chipco)) { -- gpio_direction_input(WGT634U_GPIO_RESET); -- gpio_intmask(WGT634U_GPIO_RESET, 1); -- ssb_chipco_irq_mask(&ssb_bcm47xx.chipco, -- SSB_CHIPCO_IRQ_GPIO, -- SSB_CHIPCO_IRQ_GPIO); -- } -- -- wgt634u_flash_data.width = mcore->flash_buswidth; -- wgt634u_flash_resource.start = mcore->flash_window; -- wgt634u_flash_resource.end = mcore->flash_window -- + mcore->flash_window_size -- - 1; -- return platform_add_devices(wgt634u_devices, -- ARRAY_SIZE(wgt634u_devices)); -- } else -- return -ENODEV; --} -- --module_init(wgt634u_init); -- diff --git a/target/linux/brcm47xx/patches-2.6.31/813-use_netdev_alloc_skb.patch b/target/linux/brcm47xx/patches-2.6.31/813-use_netdev_alloc_skb.patch deleted file mode 100644 index c431e4096..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/813-use_netdev_alloc_skb.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/drivers/net/b44.c -+++ b/drivers/net/b44.c -@@ -815,7 +815,7 @@ static int b44_rx(struct b44 *bp, int bu - struct sk_buff *copy_skb; - - b44_recycle_rx(bp, cons, bp->rx_prod); -- copy_skb = dev_alloc_skb(len + 2); -+ copy_skb = netdev_alloc_skb(bp->dev, len + 2); - if (copy_skb == NULL) - goto drop_it_no_recycle; - diff --git a/target/linux/brcm47xx/patches-2.6.31/900-disable_early_printk.patch b/target/linux/brcm47xx/patches-2.6.31/900-disable_early_printk.patch deleted file mode 100644 index 95d333f96..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/900-disable_early_printk.patch +++ /dev/null @@ -1,10 +0,0 @@ ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -76,7 +76,6 @@ config BCM47XX - select SSB_B43_PCI_BRIDGE if PCI - select SSB_PCICORE_HOSTMODE if PCI - select GENERIC_GPIO -- select SYS_HAS_EARLY_PRINTK - select CFE - help - Support for BCM47XX based boards diff --git a/target/linux/brcm47xx/patches-2.6.31/920-cache-wround.patch b/target/linux/brcm47xx/patches-2.6.31/920-cache-wround.patch deleted file mode 100644 index 2938e1cf8..000000000 --- a/target/linux/brcm47xx/patches-2.6.31/920-cache-wround.patch +++ /dev/null @@ -1,135 +0,0 @@ ---- a/arch/mips/include/asm/r4kcache.h -+++ b/arch/mips/include/asm/r4kcache.h -@@ -20,10 +20,25 @@ - #ifdef CONFIG_BCM47XX - #include - #include --#define BCM4710_DUMMY_RREG() ((void) *((u8 *) KSEG1ADDR(SSB_ENUM_BASE + SSB_IMSTATE))) -+#define BCM4710_DUMMY_RREG() bcm4710_dummy_rreg() -+ -+static inline unsigned long bcm4710_dummy_rreg(void) { -+ return (*(volatile unsigned long *)(KSEG1ADDR(SSB_ENUM_BASE + SSB_IMSTATE))); -+} -+ -+#define BCM4710_FILL_TLB(addr) bcm4710_fill_tlb((void*)(addr)) -+ -+static inline unsigned long bcm4710_fill_tlb(void *addr) { -+ return (*(unsigned long *)addr); -+} -+ -+#define BCM4710_PROTECTED_FILL_TLB(addr) bcm4710_protected_fill_tlb((void*)(addr)) -+ -+static inline void bcm4710_protected_fill_tlb(void *addr) { -+ unsigned long x; -+ get_dbe(x, (unsigned long *)addr);; -+} - --#define BCM4710_FILL_TLB(addr) (*(volatile unsigned long *)(addr)) --#define BCM4710_PROTECTED_FILL_TLB(addr) ({ unsigned long x; get_dbe(x, (volatile unsigned long *)(addr)); }) - #else - #define BCM4710_DUMMY_RREG() - ---- a/arch/mips/mm/tlbex.c -+++ b/arch/mips/mm/tlbex.c -@@ -646,6 +646,9 @@ build_get_pgde32(u32 **p, unsigned int t - #endif - uasm_i_addu(p, ptr, tmp, ptr); - #else -+#ifdef CONFIG_BCM47XX -+ uasm_i_nop(p); -+#endif - UASM_i_LA_mostly(p, ptr, pgdc); - #endif - uasm_i_mfc0(p, tmp, C0_BADVADDR); /* get faulting address */ -@@ -784,12 +787,12 @@ static void __cpuinit build_r4000_tlb_re - /* No need for uasm_i_nop */ - } - --#ifdef CONFIG_BCM47XX -- uasm_i_nop(&p); --#endif - #ifdef CONFIG_64BIT - build_get_pmde64(&p, &l, &r, K0, K1); /* get pmd in K1 */ - #else -+# ifdef CONFIG_BCM47XX -+ uasm_i_nop(&p); -+# endif - build_get_pgde32(&p, K0, K1); /* get pgd in K1 */ - #endif - -@@ -801,6 +804,9 @@ static void __cpuinit build_r4000_tlb_re - build_update_entries(&p, K0, K1); - build_tlb_write_entry(&p, &l, &r, tlb_random); - uasm_l_leave(&l, p); -+#ifdef CONFIG_BCM47XX -+ uasm_i_nop(&p); -+#endif - uasm_i_eret(&p); /* return from trap */ - - #ifdef CONFIG_HUGETLB_PAGE -@@ -1241,12 +1247,12 @@ build_r4000_tlbchange_handler_head(u32 * - struct uasm_reloc **r, unsigned int pte, - unsigned int ptr) - { --#ifdef CONFIG_BCM47XX -- uasm_i_nop(p); --#endif - #ifdef CONFIG_64BIT - build_get_pmde64(p, l, r, pte, ptr); /* get pmd in ptr */ - #else -+# ifdef CONFIG_BCM47XX -+ uasm_i_nop(p); -+# endif - build_get_pgde32(p, pte, ptr); /* get pgd in ptr */ - #endif - -@@ -1283,6 +1289,9 @@ build_r4000_tlbchange_handler_tail(u32 * - build_update_entries(p, tmp, ptr); - build_tlb_write_entry(p, l, r, tlb_indexed); - uasm_l_leave(l, *p); -+#ifdef CONFIG_BCM47XX -+ uasm_i_nop(p); -+#endif - uasm_i_eret(p); /* return from trap */ - - #ifdef CONFIG_64BIT ---- a/arch/mips/kernel/genex.S -+++ b/arch/mips/kernel/genex.S -@@ -22,6 +22,19 @@ - #include - #include - -+#ifdef CONFIG_BCM47XX -+# ifdef eret -+# undef eret -+# endif -+# define eret \ -+ .set push; \ -+ .set noreorder; \ -+ nop; \ -+ nop; \ -+ eret; \ -+ .set pop; -+#endif -+ - #define PANIC_PIC(msg) \ - .set push; \ - .set reorder; \ -@@ -54,7 +67,6 @@ NESTED(except_vec3_generic, 0, sp) - .set noat - #ifdef CONFIG_BCM47XX - nop -- nop - #endif - #if R5432_CP0_INTERRUPT_WAR - mfc0 k0, CP0_INDEX -@@ -79,6 +91,9 @@ NESTED(except_vec3_r4000, 0, sp) - .set push - .set mips3 - .set noat -+#ifdef CONFIG_BCM47XX -+ nop -+#endif - mfc0 k1, CP0_CAUSE - li k0, 31<<2 - andi k1, k1, 0x7c diff --git a/target/linux/brcm47xx/patches-2.6.32/930-bcm47xx-pci-iomem.patch b/target/linux/brcm47xx/patches-2.6.32/930-bcm47xx-pci-iomem.patch index 1ceccb5c6..4f47a3c52 100644 --- a/target/linux/brcm47xx/patches-2.6.32/930-bcm47xx-pci-iomem.patch +++ b/target/linux/brcm47xx/patches-2.6.32/930-bcm47xx-pci-iomem.patch @@ -1,8 +1,6 @@ -Index: linux-2.6.33/drivers/ssb/driver_pcicore.c -=================================================================== ---- linux-2.6.33.orig/drivers/ssb/driver_pcicore.c 2010-03-15 14:52:55.000000000 +0100 -+++ linux-2.6.33/drivers/ssb/driver_pcicore.c 2010-03-15 15:57:38.000000000 +0100 -@@ -246,20 +246,12 @@ +--- a/drivers/ssb/driver_pcicore.c ++++ b/drivers/ssb/driver_pcicore.c +@@ -246,20 +246,12 @@ static struct pci_controller ssb_pcicore .pci_ops = &ssb_pcicore_pciops, .io_resource = &ssb_pcicore_io_resource, .mem_resource = &ssb_pcicore_mem_resource, @@ -23,7 +21,7 @@ Index: linux-2.6.33/drivers/ssb/driver_pcicore.c if (d->bus->ops != &ssb_pcicore_pciops) { /* This is not a device on the PCI-core bridge. */ return -ENODEV; -@@ -268,27 +260,6 @@ +@@ -268,27 +260,6 @@ int ssb_pcicore_plat_dev_init(struct pci ssb_printk(KERN_INFO "PCI: Fixing up device %s\n", pci_name(d)); diff --git a/target/linux/brcm47xx/patches-2.6.32/940-bcm47xx-yenta.patch b/target/linux/brcm47xx/patches-2.6.32/940-bcm47xx-yenta.patch index aaff52339..522859353 100644 --- a/target/linux/brcm47xx/patches-2.6.32/940-bcm47xx-yenta.patch +++ b/target/linux/brcm47xx/patches-2.6.32/940-bcm47xx-yenta.patch @@ -1,8 +1,6 @@ -Index: linux-2.6.32.9/drivers/pcmcia/yenta_socket.c -=================================================================== ---- linux-2.6.32.9.orig/drivers/pcmcia/yenta_socket.c 2010-03-12 09:43:45.000000000 +0100 -+++ linux-2.6.32.9/drivers/pcmcia/yenta_socket.c 2010-03-12 10:05:33.000000000 +0100 -@@ -866,6 +866,8 @@ +--- a/drivers/pcmcia/yenta_socket.c ++++ b/drivers/pcmcia/yenta_socket.c +@@ -866,6 +866,8 @@ static unsigned int yenta_probe_irq(stru * Probe for usable interrupts using the force * register to generate bogus card status events. */ @@ -11,7 +9,7 @@ Index: linux-2.6.32.9/drivers/pcmcia/yenta_socket.c cb_writel(socket, CB_SOCKET_EVENT, -1); cb_writel(socket, CB_SOCKET_MASK, CB_CSTSMASK); exca_writeb(socket, I365_CSCINT, 0); -@@ -880,6 +882,7 @@ +@@ -880,6 +882,7 @@ static unsigned int yenta_probe_irq(stru } cb_writel(socket, CB_SOCKET_MASK, 0); exca_writeb(socket, I365_CSCINT, 0); @@ -19,7 +17,7 @@ Index: linux-2.6.32.9/drivers/pcmcia/yenta_socket.c mask = probe_irq_mask(val) & 0xffff; -@@ -960,6 +963,10 @@ +@@ -960,6 +963,10 @@ static void yenta_get_socket_capabilitie else socket->socket.irq_mask = 0; @@ -30,7 +28,7 @@ Index: linux-2.6.32.9/drivers/pcmcia/yenta_socket.c dev_printk(KERN_INFO, &socket->dev->dev, "ISA IRQ mask 0x%04x, PCI irq %d\n", socket->socket.irq_mask, socket->cb_irq); -@@ -1198,6 +1205,15 @@ +@@ -1198,6 +1205,15 @@ static int __devinit yenta_probe (struct dev_printk(KERN_INFO, &dev->dev, "Socket status: %08x\n", cb_readl(socket, CB_SOCKET_STATE)); diff --git a/target/linux/brcm63xx/Makefile b/target/linux/brcm63xx/Makefile index 5ad20eb5c..d5285ba8a 100644 --- a/target/linux/brcm63xx/Makefile +++ b/target/linux/brcm63xx/Makefile @@ -10,7 +10,7 @@ ARCH:=mips BOARD:=brcm63xx BOARDNAME:=Broadcom BCM63xx FEATURES:=squashfs jffs2 usb atm pci pcmcia -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/brcm63xx/config-2.6.30 b/target/linux/brcm63xx/config-2.6.30 deleted file mode 100644 index b1acfe703..000000000 --- a/target/linux/brcm63xx/config-2.6.30 +++ /dev/null @@ -1,212 +0,0 @@ -CONFIG_32BIT=y -# CONFIG_64BIT is not set -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_POPULATES_NODE_MAP=y -CONFIG_ARCH_REQUIRE_GPIOLIB=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_AUDIT_GENERIC=y -CONFIG_AUDIT=y -# CONFIG_BCM47XX is not set -CONFIG_BCM63XX_CPU_6338=y -CONFIG_BCM63XX_CPU_6345=y -CONFIG_BCM63XX_CPU_6348=y -CONFIG_BCM63XX_CPU_6358=y -CONFIG_BCM63XX_ENET=y -CONFIG_BCM63XX_PHY=y -CONFIG_BCM63XX_WDT=y -CONFIG_BCM63XX=y -CONFIG_BINARY_PRINTF=y -CONFIG_BITREVERSE=y -CONFIG_BLK_DEV_IO_TRACE=y -CONFIG_BOARD_BCM963XX=y -# CONFIG_BOARD_LIVEBOX is not set -CONFIG_BSD_PROCESS_ACCT_V3=y -# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set -# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_CEVT_R4K_LIB=y -CONFIG_CEVT_R4K=y -CONFIG_CMDLINE="root=/dev/mtdblock2 rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200" -CONFIG_CPU_BIG_ENDIAN=y -# CONFIG_CPU_CAVIUM_OCTEON is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -# CONFIG_CPU_LITTLE_ENDIAN is not set -# CONFIG_CPU_LOONGSON2 is not set -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -CONFIG_CPU_MIPS32=y -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5500 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -CONFIG_CRAMFS=y -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -CONFIG_CSRC_R4K_LIB=y -CONFIG_CSRC_R4K=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DEVPORT=y -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_EARLY_PRINTK=y -CONFIG_ELF_CORE=y -CONFIG_FIRMWARE_IN_KERNEL=y -# CONFIG_FTRACE_STARTUP_TEST is not set -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_GPIO_DEVICE=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_SYSFS=y -# CONFIG_HAMRADIO is not set -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_HAVE_IDE=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -# CONFIG_HZ_100 is not set -CONFIG_HZ=250 -CONFIG_HZ_250=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INOTIFY_USER=y -CONFIG_INOTIFY=y -CONFIG_IP_PIMSM_V1=y -CONFIG_IP_PIMSM_V2=y -CONFIG_IRQ_CPU=y -CONFIG_KEXEC=y -CONFIG_LBD=y -CONFIG_LEDS_GPIO=y -# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set -# CONFIG_LEMOTE_FULONG is not set -# CONFIG_MACH_ALCHEMY is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MACH_VR41XX is not set -CONFIG_MAGIC_SYSRQ=y -# CONFIG_MIKROTIK_RB532 is not set -# CONFIG_MIPS_COBALT is not set -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_MACHINE is not set -# CONFIG_MIPS_MALTA is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_SIM is not set -CONFIG_MIPS=y -CONFIG_MODULE_FORCE_LOAD=y -CONFIG_MODULE_FORCE_UNLOAD=y -CONFIG_MTD_BCM963XX=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -CONFIG_MTD_CFI_BE_BYTE_SWAP=y -# CONFIG_MTD_CFI_GEOMETRY is not set -# CONFIG_MTD_CFI_NOSWAP is not set -CONFIG_MTD_CFI_STAA=y -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_CONCAT=y -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y -CONFIG_MTD_REDBOOT_PARTS=y -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_NO_IOPORT is not set -CONFIG_NOP_TRACER=y -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PHYLIB=y -# CONFIG_PMC_MSP is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -CONFIG_POSIX_MQUEUE_SYSCTL=y -CONFIG_POSIX_MQUEUE=y -# CONFIG_PROBE_INITRD_HEADER is not set -CONFIG_RELAY=y -CONFIG_RING_BUFFER=y -CONFIG_SCHED_OMIT_FRAME_POINTER=y -# CONFIG_SCSI_DMA is not set -# CONFIG_SERIAL_8250 is not set -CONFIG_SERIAL_BCM63XX_CONSOLE=y -CONFIG_SERIAL_BCM63XX=y -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SLOW_WORK is not set -CONFIG_SQUASHFS_EMBEDDED=y -CONFIG_SSB_B43_PCI_BRIDGE=y -# CONFIG_SSB_DRIVER_MIPS is not set -CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y -CONFIG_SSB_DRIVER_PCICORE=y -CONFIG_SSB_PCIHOST_POSSIBLE=y -CONFIG_SSB_PCIHOST=y -CONFIG_SSB_SPROM=y -CONFIG_SSB=y -CONFIG_STACKTRACE=y -CONFIG_SWAP_IO_SPACE=y -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -# CONFIG_TC35815 is not set -CONFIG_TRACEPOINTS=y -CONFIG_TRACING_SUPPORT=y -CONFIG_TRACING=y -CONFIG_TRAD_SIGNALS=y -CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_SUPPORT=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_WATCHDOG_NOWAYOUT=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/Kconfig b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/Kconfig deleted file mode 100644 index ac0b44e92..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/Kconfig +++ /dev/null @@ -1,35 +0,0 @@ -menu "CPU support" - depends on BCM63XX - -config BCM63XX_CPU_6338 - bool "support 6338 CPU" - select HW_HAS_PCI - select USB_ARCH_HAS_OHCI - select USB_ARCH_HAS_UDC - select USB_OHCI_BIG_ENDIAN_DESC - select USB_OHCI_BIG_ENDIAN_MMIO - -config BCM63XX_CPU_6345 - bool "support 6345 CPU" - select USB_OHCI_BIG_ENDIAN_DESC - select USB_OHCI_BIG_ENDIAN_MMIO - -config BCM63XX_CPU_6348 - bool "support 6348 CPU" - select HW_HAS_PCI - select USB_ARCH_HAS_OHCI - select USB_ARCH_HAS_UDC - select USB_OHCI_BIG_ENDIAN_DESC - select USB_OHCI_BIG_ENDIAN_MMIO - -config BCM63XX_CPU_6358 - bool "support 6358 CPU" - select HW_HAS_PCI - select USB_ARCH_HAS_OHCI - select USB_OHCI_BIG_ENDIAN_DESC - select USB_OHCI_BIG_ENDIAN_MMIO - select USB_ARCH_HAS_EHCI - select USB_EHCI_BIG_ENDIAN_MMIO -endmenu - -source "arch/mips/bcm63xx/boards/Kconfig" diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/Makefile b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/Makefile deleted file mode 100644 index b9343a8d6..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/Makefile +++ /dev/null @@ -1,13 +0,0 @@ -obj-y += clk.o cpu.o cs.o gpio.o irq.o prom.o setup.o timer.o -obj-y += dev-uart.o -obj-y += dev-pcmcia.o -obj-y += dev-usb-ohci.o -obj-y += dev-usb-ehci.o -obj-y += dev-usb-udc.o -obj-y += dev-enet.o -obj-y += dev-wdt.o -obj-y += dev-spi.o -obj-y += dev-dsp.o -obj-$(CONFIG_EARLY_PRINTK) += early_printk.o - -obj-y += boards/ diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/boards/Kconfig b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/boards/Kconfig deleted file mode 100644 index 970615e67..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/boards/Kconfig +++ /dev/null @@ -1,15 +0,0 @@ -choice - prompt "Board support" - depends on BCM63XX - default BOARD_BCM963XX - -config BOARD_BCM963XX - bool "Generic Broadcom 963xx boards" - help - -config BOARD_LIVEBOX - bool "Inventel Livebox(es) boards" - help - Boards using RedBoot. - -endchoice diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/boards/Makefile b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/boards/Makefile deleted file mode 100644 index 098137b59..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/boards/Makefile +++ /dev/null @@ -1,2 +0,0 @@ -obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o -obj-$(CONFIG_BOARD_LIVEBOX) += board_livebox.o diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/boards/board_bcm963xx.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/boards/board_bcm963xx.c deleted file mode 100644 index 280383a6a..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ /dev/null @@ -1,1008 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - * Copyright (C) 2009 Florian Fainelli - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define PFX "board_bcm963xx: " - -static struct bcm963xx_nvram nvram; -static unsigned int mac_addr_used = 0; -static struct board_info board; - -/* - * known 6338 boards - */ - -#ifdef CONFIG_BCM63XX_CPU_6338 -static struct board_info __initdata board_96338gw = { - .name = "96338GW", - .expected_cpu_id = 0x6338, - - .has_enet0 = 1, - .enet0 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, - - .has_ohci0 = 1, - - .leds = { - { - .name = "adsl", - .gpio = 3, - .active_low = 1, - }, - { - .name = "ses", - .gpio = 5, - .active_low = 1, - }, - { - .name = "ppp-fail", - .gpio = 4, - .active_low = 1, - }, - { - .name = "power", - .gpio = 0, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "stop", - .gpio = 1, - .active_low = 1, - } - }, -}; - -static struct board_info __initdata board_96338w = { - .name = "96338W", - .expected_cpu_id = 0x6338, - - .has_enet0 = 1, - .enet0 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, - - .leds = { - { - .name = "adsl", - .gpio = 3, - .active_low = 1, - }, - { - .name = "ses", - .gpio = 5, - .active_low = 1, - }, - { - .name = "ppp-fail", - .gpio = 4, - .active_low = 1, - }, - { - .name = "power", - .gpio = 0, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "stop", - .gpio = 1, - .active_low = 1, - }, - }, -}; -#endif - -/* - * known 6345 boards - */ -#ifdef CONFIG_BCM63XX_CPU_6345 -static struct board_info __initdata board_96345gw2 = { - .name = "96345GW2", - .expected_cpu_id = 0x6345, -}; -#endif - -/* - * known 6348 boards - */ -#ifdef CONFIG_BCM63XX_CPU_6348 -static struct board_info __initdata board_96348r = { - .name = "96348R", - .expected_cpu_id = 0x6348, - - .has_enet0 = 1, - .has_pci = 1, - - .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, - }, - - .leds = { - { - .name = "adsl-fail", - .gpio = 2, - .active_low = 1, - }, - { - .name = "ppp", - .gpio = 3, - .active_low = 1, - }, - { - .name = "ppp-fail", - .gpio = 4, - .active_low = 1, - }, - { - .name = "power", - .gpio = 0, - .active_low = 1, - .default_trigger = "default-on", - - }, - { - .name = "stop", - .gpio = 1, - .active_low = 1, - }, - }, -}; - -static struct board_info __initdata board_96348gw_10 = { - .name = "96348GW-10", - .expected_cpu_id = 0x6348, - - .has_enet0 = 1, - .has_enet1 = 1, - .has_pci = 1, - - .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, - }, - .enet1 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, - - .has_ohci0 = 1, - .has_pccard = 1, - .has_ehci0 = 1, - - .has_dsp = 1, - .dsp = { - .gpio_rst = 6, - .gpio_int = 34, - .cs = 2, - .ext_irq = 2, - }, - - .leds = { - { - .name = "adsl-fail", - .gpio = 2, - .active_low = 1, - }, - { - .name = "ppp", - .gpio = 3, - .active_low = 1, - }, - { - .name = "ppp-fail", - .gpio = 4, - .active_low = 1, - }, - { - .name = "power", - .gpio = 0, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "stop", - .gpio = 1, - .active_low = 1, - }, - }, -}; - -static struct board_info __initdata board_96348gw_11 = { - .name = "96348GW-11", - .expected_cpu_id = 0x6348, - - .has_enet0 = 1, - .has_enet1 = 1, - .has_pci = 1, - - .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, - }, - - .enet1 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, - - - .has_ohci0 = 1, - .has_pccard = 1, - .has_ehci0 = 1, - - .leds = { - { - .name = "adsl-fail", - .gpio = 2, - .active_low = 1, - }, - { - .name = "ppp", - .gpio = 3, - .active_low = 1, - }, - { - .name = "ppp-fail", - .gpio = 4, - .active_low = 1, - }, - { - .name = "power", - .gpio = 0, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "stop", - .gpio = 1, - .active_low = 1, - }, - }, - .reset_buttons = { - { - .desc = "reset", - .gpio = 32, - .active_low = 1, - .type = EV_KEY, - .code = BTN_0, - .threshold = 3, - }, - }, -}; - -static struct board_info __initdata board_96348gw = { - .name = "96348GW", - .expected_cpu_id = 0x6348, - - .has_enet0 = 1, - .has_enet1 = 1, - .has_pci = 1, - - .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, - }, - .enet1 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, - - .has_ohci0 = 1, - .has_dsp = 1, - - .dsp = { - .gpio_rst = 6, - .gpio_int = 34, - .ext_irq = 2, - .cs = 2, - }, - - .leds = { - { - .name = "adsl-fail", - .gpio = 2, - .active_low = 1, - }, - { - .name = "power", - .gpio = 0, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "stop", - .gpio = 1, - .active_low = 1, - }, - { - .name = "line1", - .gpio = 4, - .active_low = 1, - }, - { - .name = "line2", - .gpio = 5, - .active_low = 1, - }, - { .name = "line3", - .gpio = 6, - .active_low = 1, - }, - { - .name = "tel", - .gpio = 7, - .active_low = 1, - }, - { - .name = "eth", - .gpio = 35, - .active_low = 1, - }, - }, - .reset_buttons = { - { - .desc = "reset", - .gpio = 36, - .active_low = 1, - .type = EV_KEY, - .code = BTN_0, - .threshold = 3, - }, - }, -}; - -static struct board_info __initdata board_FAST2404 = { - .name = "F@ST2404", - .expected_cpu_id = 0x6348, - - .has_enet0 = 1, - .has_enet1 = 1, - .has_pci = 1, - - .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, - }, - - .enet1 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, - - - .has_ohci0 = 1, - .has_pccard = 1, - .has_ehci0 = 1, -}; - -static struct board_info __initdata board_DV201AMR = { - .name = "DV201AMR", - .expected_cpu_id = 0x6348, - - .has_pci = 1, - .has_ohci0 = 1, - .has_udc0 = 1, - - .has_enet0 = 1, - .has_enet1 = 1, - .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, - }, - .enet1 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, -}; - -static struct board_info __initdata board_96348gw_a = { - .name = "96348GW-A", - .expected_cpu_id = 0x6348, - - .has_enet0 = 1, - .has_enet1 = 1, - .has_pci = 1, - - .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, - }, - .enet1 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, - - .has_ohci0 = 1, -}; - -static struct board_info __initdata board_rta1025w_16 = { - .name = "RTA1025W_16", - .expected_cpu_id = 0x6348, - - .has_enet0 = 1, - .has_enet1 = 1, - .has_pci = 1, - - .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, - }, - .enet1 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, -}; -#endif - -/* - * known 6358 boards - */ -#ifdef CONFIG_BCM63XX_CPU_6358 -static struct board_info __initdata board_96358vw = { - .name = "96358VW", - .expected_cpu_id = 0x6358, - - .has_enet0 = 1, - .has_enet1 = 1, - .has_pci = 1, - - .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, - }, - - .enet1 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, - - - .has_ohci0 = 1, - .has_pccard = 1, - .has_ehci0 = 1, - - .leds = { - { - .name = "adsl-fail", - .gpio = 15, - .active_low = 1, - }, - { - .name = "ppp", - .gpio = 22, - .active_low = 1, - }, - { - .name = "ppp-fail", - .gpio = 23, - .active_low = 1, - }, - { - .name = "power", - .gpio = 4, - .default_trigger = "default-on", - }, - { - .name = "stop", - .gpio = 5, - }, - }, -}; - -static struct board_info __initdata board_96358vw2 = { - .name = "96358VW2", - .expected_cpu_id = 0x6358, - - .has_enet0 = 1, - .has_enet1 = 1, - .has_pci = 1, - - .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, - }, - - .enet1 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, - - - .has_ohci0 = 1, - .has_pccard = 1, - .has_ehci0 = 1, - - .leds = { - { - .name = "adsl", - .gpio = 22, - .active_low = 1, - }, - { - .name = "ppp-fail", - .gpio = 23, - }, - { - .name = "power", - .gpio = 5, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "stop", - .gpio = 4, - .active_low = 1, - }, - }, -}; - -static struct board_info __initdata board_AGPFS0 = { - .name = "AGPF-S0", - .expected_cpu_id = 0x6358, - - .has_enet0 = 1, - .has_enet1 = 1, - .has_pci = 1, - - .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, - }, - - .enet1 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, - - .has_ohci0 = 1, - .has_ehci0 = 1, - - .leds = { - /*Each led on alice gate is bi-color so final char */ - /* is r for red and g for green leds */ - { - .name = "pwrr", - .gpio = 5, - .active_low = 1, - }, - { - .name = "pwrg", - .gpio = 4, - .active_low = 1, - .default_trigger = "default-on", - }, - { - .name = "wifir", - .gpio = 23, - .active_low = 1, - }, - { - .name = "wifig", - .gpio = 22, - .active_low = 1, - }, - { - .name = "usr1r", - .gpio = 27, - .active_low = 1, - }, - { - .name = "usr1g", - .gpio = 26, - .active_low = 1, - }, - { - .name = "usr2r", - .gpio = 30, - .active_low = 1, - }, - { - .name = "usr2g", - .gpio = 29, - .active_low = 1, - }, - }, - - .reset_buttons = { - { - .desc = "sw2", - .gpio = 37, - .active_low = 1, - .type = EV_KEY, - .code = BTN_0, - .threshold = 3, - }, - }, - /* sw1 is connected to gpio34*/ -}; - -static struct board_info __initdata board_DWVS0 = { - .name = "DWV-S0", - .expected_cpu_id = 0x6358, - - .has_enet0 = 1, - .has_enet1 = 1, - .has_pci = 1, - - .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, - }, - - .enet1 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, - - .has_ohci0 = 1, -}; -#endif - -/* - * all boards - */ -static const struct board_info __initdata *bcm963xx_boards[] = { -#ifdef CONFIG_BCM63XX_CPU_6338 - &board_96338gw, - &board_96338w, -#endif -#ifdef CONFIG_BCM63XX_CPU_6345 - &board_96345gw2, -#endif -#ifdef CONFIG_BCM63XX_CPU_6348 - &board_96348r, - &board_96348gw, - &board_96348gw_10, - &board_96348gw_11, - &board_FAST2404, - &board_DV201AMR, - &board_96348gw_a, - &board_rta1025w_16, -#endif - -#ifdef CONFIG_BCM63XX_CPU_6358 - &board_96358vw, - &board_96358vw2, - &board_AGPFS0, - &board_DWVS0, -#endif -}; - -/* - * early init callback, read nvram data from flash and checksum it - */ -void __init board_prom_init(void) -{ - unsigned int check_len, i; - u8 *boot_addr, *cfe, *p; - char cfe_version[32]; - u32 val; - - /* read base address of boot chip select (0) - * 6345 does not have MPI but boots from standard - * MIPS Flash address */ - if (BCMCPU_IS_6345()) - val = 0x1fc00000; - else { - val = bcm_mpi_readl(MPI_CSBASE_REG(0)); - val &= MPI_CSBASE_BASE_MASK; - } - boot_addr = (u8 *)KSEG1ADDR(val); - - /* dump cfe version */ - cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET; - if (!memcmp(cfe, "cfe-v", 5)) - snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u", - cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]); - else - strcpy(cfe_version, "unknown"); - printk(KERN_INFO PFX "CFE version: %s\n", cfe_version); - - /* extract nvram data */ - memcpy(&nvram, boot_addr + BCM963XX_NVRAM_OFFSET, sizeof(nvram)); - - /* check checksum before using data */ - if (nvram.version <= 4) - check_len = offsetof(struct bcm963xx_nvram, checksum_old); - else - check_len = sizeof(nvram); - val = 0; - p = (u8 *)&nvram; - while (check_len--) - val += *p; - if (val) { - printk(KERN_ERR PFX "invalid nvram checksum\n"); - return; - } - - /* find board by name */ - for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) { - if (strncmp(nvram.name, bcm963xx_boards[i]->name, - sizeof(nvram.name))) - continue; - /* copy, board desc array is marked initdata */ - memcpy(&board, bcm963xx_boards[i], sizeof(board)); - break; - } - - /* bail out if board is not found, will complain later */ - if (!board.name[0]) { - char name[17]; - memcpy(name, nvram.name, 16); - name[16] = 0; - printk(KERN_ERR PFX "unknown bcm963xx board: %s\n", - name); - return; - } - - /* setup pin multiplexing depending on board enabled device, - * this has to be done this early since PCI init is done - * inside arch_initcall */ - val = 0; -#ifdef CONFIG_PCI - if (board.has_pci) { - bcm63xx_pci_enabled = 1; - if (BCMCPU_IS_6348()) - val |= GPIO_MODE_6348_G2_PCI; - } -#endif - if (board.has_pccard) { - if (BCMCPU_IS_6348()) - val |= GPIO_MODE_6348_G1_MII_PCCARD; - } - - if (board.has_enet0 && !board.enet0.use_internal_phy) { - if (BCMCPU_IS_6348()) - val |= GPIO_MODE_6348_G3_EXT_MII | - GPIO_MODE_6348_G0_EXT_MII; - } - - if (board.has_enet1 && !board.enet1.use_internal_phy) { - if (BCMCPU_IS_6348()) - val |= GPIO_MODE_6348_G3_EXT_MII | - GPIO_MODE_6348_G0_EXT_MII; - } - - bcm_gpio_writel(val, GPIO_MODE_REG); -} - -/* - * second stage init callback, good time to panic if we couldn't - * identify on which board we're running since early printk is working - */ -void __init board_setup(void) -{ - if (!board.name[0]) - panic("unable to detect bcm963xx board"); - printk(KERN_INFO PFX "board name: %s\n", board.name); - - /* make sure we're running on expected cpu */ - if (bcm63xx_get_cpu_id() != board.expected_cpu_id) - panic("unexpected CPU for bcm963xx board"); -} - -/* - * return board name for /proc/cpuinfo - */ -const char *board_get_name(void) -{ - return board.name; -} - -/* - * register & return a new board mac address - */ -static int board_get_mac_address(u8 *mac) -{ - u8 *p; - int count; - - if (mac_addr_used >= nvram.mac_addr_count) { - printk(KERN_ERR PFX "not enough mac address\n"); - return -ENODEV; - } - - memcpy(mac, nvram.mac_addr_base, ETH_ALEN); - p = mac + ETH_ALEN - 1; - count = mac_addr_used; - - while (count--) { - do { - (*p)++; - if (*p != 0) - break; - p--; - } while (p != mac); - } - - if (p == mac) { - printk(KERN_ERR PFX "unable to fetch mac address\n"); - return -ENODEV; - } - - mac_addr_used++; - return 0; -} - -static struct resource mtd_resources[] = { - { - .start = 0, /* filled at runtime */ - .end = 0, /* filled at runtime */ - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device mtd_dev = { - .name = "bcm963xx-flash", - .resource = mtd_resources, - .num_resources = ARRAY_SIZE(mtd_resources), -}; - -/* - * Register a sane SPROMv2 to make the on-board - * bcm4318 WLAN work - */ -static struct ssb_sprom bcm63xx_sprom = { - .revision = 0x02, - .board_rev = 0x17, - .country_code = 0x0, - .ant_available_bg = 0x3, - .pa0b0 = 0x15ae, - .pa0b1 = 0xfa85, - .pa0b2 = 0xfe8d, - .pa1b0 = 0xffff, - .pa1b1 = 0xffff, - .pa1b2 = 0xffff, - .gpio0 = 0xff, - .gpio1 = 0xff, - .gpio2 = 0xff, - .gpio3 = 0xff, - .maxpwr_bg = 0x004c, - .itssi_bg = 0x00, - .boardflags_lo = 0x2848, - .boardflags_hi = 0x0000, -}; - -static struct resource gpiodev_resource = { - .start = 0xFFFFFFFF, -}; - -static struct gpio_led_platform_data bcm63xx_led_data; - -static struct platform_device bcm63xx_gpio_leds = { - .name = "leds-gpio", - .id = 0, - .dev.platform_data = &bcm63xx_led_data, -}; - -static struct gpio_buttons_platform_data bcm63xx_gpio_buttons_data = { - .poll_interval = 20, -}; - -static struct platform_device bcm63xx_gpio_buttons_device = { - .name = "gpio-buttons", - .id = 0, - .dev.platform_data = &bcm63xx_gpio_buttons_data, -}; - - -/* - * third stage init callback, register all board devices. - */ -int __init board_register_devices(void) -{ - u32 val; - int led_count = 0; - - bcm63xx_uart_register(); - bcm63xx_wdt_register(); - - if (!BCMCPU_IS_6345()) - bcm63xx_spi_register(); - - if (board.has_pccard) - bcm63xx_pcmcia_register(); - - if (board.has_enet0 && - !board_get_mac_address(board.enet0.mac_addr)) - bcm63xx_enet_register(0, &board.enet0); - - if (board.has_enet1 && - !board_get_mac_address(board.enet1.mac_addr)) - bcm63xx_enet_register(1, &board.enet1); - - if (board.has_ohci0) - bcm63xx_ohci_register(); - - if (board.has_ehci0) - bcm63xx_ehci_register(); - - if (board.has_udc0) - bcm63xx_udc_register(); - - if (board.has_dsp) - bcm63xx_dsp_register(&board.dsp); - - /* Generate MAC address for WLAN and - * register our SPROM */ -#ifdef CONFIG_PCI - if (!board_get_mac_address(bcm63xx_sprom.il0mac)) { - memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN); - memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN); - if (ssb_arch_set_fallback_sprom(&bcm63xx_sprom) < 0) - printk(KERN_ERR "failed to register fallback SPROM\n"); - } -#endif - - /* read base address of boot chip select (0) */ - if (BCMCPU_IS_6345()) - val = 0x1fc00000; - else { - val = bcm_mpi_readl(MPI_CSBASE_REG(0)); - val &= MPI_CSBASE_BASE_MASK; - } - mtd_resources[0].start = val; - mtd_resources[0].end = 0x1FFFFFFF; - - platform_device_register(&mtd_dev); - - /* Register GPIODEV */ - platform_device_register_simple("GPIODEV", 0, &gpiodev_resource, 1); - - /* count number of LEDs defined by this device */ - while (led_count < ARRAY_SIZE(board.leds) && board.leds[led_count].name) - led_count++; - - bcm63xx_led_data.num_leds = led_count; - bcm63xx_led_data.leds = board.leds; - - platform_device_register(&bcm63xx_gpio_leds); - - if (board.reset_buttons) { - bcm63xx_gpio_buttons_data.nbuttons = ARRAY_SIZE(board.reset_buttons); - bcm63xx_gpio_buttons_data.buttons = board.reset_buttons; - - platform_device_register(&bcm63xx_gpio_buttons_device); - } - - return 0; -} - diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/boards/board_livebox.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/boards/board_livebox.c deleted file mode 100644 index 06ca83b59..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/boards/board_livebox.c +++ /dev/null @@ -1,227 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Florian Fainelli - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define PFX "board_livebox: " - -static unsigned int mac_addr_used = 0; -static struct board_info board; - -/* - * known 6348 boards - */ -#ifdef CONFIG_BCM63XX_CPU_6348 -static struct board_info __initdata board_livebox = { - .name = "Livebox", - .expected_cpu_id = 0x6348, - - .has_enet0 = 1, - .has_enet1 = 1, - .has_pci = 1, - - .enet0 = { - .has_phy = 1, - .use_internal_phy = 1, - }, - - .enet1 = { - .force_speed_100 = 1, - .force_duplex_full = 1, - }, - - .has_ohci0 = 1, - .has_pccard = 1, - .has_ehci0 = 1, -}; -#endif - -/* - * all boards - */ -static const struct board_info __initdata *bcm963xx_boards[] = { -#ifdef CONFIG_BCM63XX_CPU_6348 - &board_livebox -#endif -}; - -/* - * early init callback - */ -void __init board_prom_init(void) -{ - u32 val; - - /* read base address of boot chip select (0) */ - val = bcm_mpi_readl(MPI_CSBASE_REG(0)); - val &= MPI_CSBASE_BASE_MASK; - - /* assume board is a Livebox */ - memcpy(&board, bcm963xx_boards[0], sizeof(board)); - - /* setup pin multiplexing depending on board enabled device, - * this has to be done this early since PCI init is done - * inside arch_initcall */ - val = 0; - - if (board.has_pci) { - bcm63xx_pci_enabled = 1; - if (BCMCPU_IS_6348()) - val |= GPIO_MODE_6348_G2_PCI; - } - - if (board.has_pccard) { - if (BCMCPU_IS_6348()) - val |= GPIO_MODE_6348_G1_MII_PCCARD; - } - - if (board.has_enet0 && !board.enet0.use_internal_phy) { - if (BCMCPU_IS_6348()) - val |= GPIO_MODE_6348_G3_EXT_MII | - GPIO_MODE_6348_G0_EXT_MII; - } - - if (board.has_enet1 && !board.enet1.use_internal_phy) { - if (BCMCPU_IS_6348()) - val |= GPIO_MODE_6348_G3_EXT_MII | - GPIO_MODE_6348_G0_EXT_MII; - } - - bcm_gpio_writel(val, GPIO_MODE_REG); -} - -/* - * second stage init callback, good time to panic if we couldn't - * identify on which board we're running since early printk is working - */ -void __init board_setup(void) -{ - if (!board.name[0]) - panic("unable to detect bcm963xx board"); - printk(KERN_INFO PFX "board name: %s\n", board.name); - - /* make sure we're running on expected cpu */ - if (bcm63xx_get_cpu_id() != board.expected_cpu_id) - panic("unexpected CPU for bcm963xx board"); -} - -/* - * return board name for /proc/cpuinfo - */ -const char *board_get_name(void) -{ - return board.name; -} - -/* - * register & return a new board mac address - */ - -static int board_get_mac_address(u8 *mac) -{ - u8 default_mac[ETH_ALEN] = {0x00, 0x07, 0x3A, 0x00, 0x00, 0x00}; - u8 *p; - int count; - - memcpy(mac, default_mac, ETH_ALEN); - - p = mac + ETH_ALEN - 1; - count = mac_addr_used; - - while (count--) { - do { - (*p)++; - if (*p != 0) - break; - p--; - } while (p != mac); - } - - if (p == mac) { - printk(KERN_ERR PFX "unable to fetch mac address\n"); - return -ENODEV; - } - mac_addr_used++; - - return 0; -} - -static struct resource mtd_resources[] = { - { - .start = 0, /* filled at runtime */ - .end = 0, /* filled at runtime */ - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device mtd_dev = { - .name = "bcm963xx-flash", - .resource = mtd_resources, - .num_resources = ARRAY_SIZE(mtd_resources), -}; - - -/* - * third stage init callback, register all board devices. - */ -int __init board_register_devices(void) -{ - u32 val; - - bcm63xx_uart_register(); - bcm63xx_wdt_register(); - - if (board.has_pccard) - bcm63xx_pcmcia_register(); - - if (board.has_enet0 && - !board_get_mac_address(board.enet0.mac_addr)) - bcm63xx_enet_register(0, &board.enet0); - - if (board.has_enet1 && - !board_get_mac_address(board.enet1.mac_addr)) - bcm63xx_enet_register(1, &board.enet1); - - if (board.has_ohci0) - bcm63xx_ohci_register(); - - if (board.has_ehci0) - bcm63xx_ehci_register(); - - - /* read base address of boot chip select (0) */ - val = bcm_mpi_readl(MPI_CSBASE_REG(0)); - val &= MPI_CSBASE_BASE_MASK; - mtd_resources[0].start = val; - mtd_resources[0].end = 0x1FFFFFFF; - - platform_device_register(&mtd_dev); - - return 0; -} - diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/clk.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/clk.c deleted file mode 100644 index eaf6196c7..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/clk.c +++ /dev/null @@ -1,249 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -DEFINE_MUTEX(clocks_mutex); - - -static void clk_enable_unlocked(struct clk *clk) -{ - if (clk->set && (clk->usage++) == 0) - clk->set(clk, 1); -} - -static void clk_disable_unlocked(struct clk *clk) -{ - if (clk->set && (--clk->usage) == 0) - clk->set(clk, 0); -} - -static void bcm_hwclock_set(u32 mask, int enable) -{ - u32 reg; - - reg = bcm_perf_readl(PERF_CKCTL_REG); - if (enable) - reg |= mask; - else - reg &= ~mask; - bcm_perf_writel(reg, PERF_CKCTL_REG); -} - -/* - * Ethernet MAC "misc" clock: dma clocks and main clock on 6348 - */ -static void enet_misc_set(struct clk *clk, int enable) -{ - u32 mask; - - if (BCMCPU_IS_6338()) - mask = CKCTL_6338_ENET_EN; - else if (BCMCPU_IS_6345()) - mask = CKCTL_6345_ENET_EN; - else if (BCMCPU_IS_6348()) - mask = CKCTL_6348_ENET_EN; - else - /* BCMCPU_IS_6358 */ - mask = CKCTL_6358_EMUSB_EN; - bcm_hwclock_set(mask, enable); -} - -static struct clk clk_enet_misc = { - .set = enet_misc_set, -}; - -/* - * Ethernet MAC clocks: only revelant on 6358, silently enable misc - * clocks - */ -static void enetx_set(struct clk *clk, int enable) -{ - if (enable) - clk_enable_unlocked(&clk_enet_misc); - else - clk_disable_unlocked(&clk_enet_misc); - - if (BCMCPU_IS_6358()) { - u32 mask; - - if (clk->id == 0) - mask = CKCTL_6358_ENET0_EN; - else - mask = CKCTL_6358_ENET1_EN; - bcm_hwclock_set(mask, enable); - } -} - -static struct clk clk_enet0 = { - .id = 0, - .set = enetx_set, -}; - -static struct clk clk_enet1 = { - .id = 1, - .set = enetx_set, -}; - -/* - * Ethernet PHY clock - */ -static void ephy_set(struct clk *clk, int enable) -{ - if (!BCMCPU_IS_6358()) - return; - bcm_hwclock_set(CKCTL_6358_EPHY_EN, enable); -} - - -static struct clk clk_ephy = { - .set = ephy_set, -}; - -/* - * PCM clock - */ -static void pcm_set(struct clk *clk, int enable) -{ - if (!BCMCPU_IS_6358()) - return; - bcm_hwclock_set(CKCTL_6358_PCM_EN, enable); -} - -static struct clk clk_pcm = { - .set = pcm_set, -}; - -/* - * USB host clock - */ -static void usbh_set(struct clk *clk, int enable) -{ - if (!BCMCPU_IS_6348()) - return; - bcm_hwclock_set(CKCTL_6348_USBH_EN, enable); -} - -static struct clk clk_usbh = { - .set = usbh_set, -}; - -/* - * USB slave clock - */ -static void usbs_set(struct clk *clk, int enable) -{ - u32 mask; - - switch(bcm63xx_get_cpu_id()) { - case BCM6338_CPU_ID: mask = CKCTL_6338_USBS_EN; break; - case BCM6345_CPU_ID: mask = CKCTL_6345_USBS_EN; break; - case BCM6348_CPU_ID: mask = CKCTL_6348_USBS_EN; break; - default: - return; - } - bcm_hwclock_set(mask, enable); -} - -static struct clk clk_usbs = { - .set = usbs_set, -}; - -/* - * SPI clock - */ -static void spi_set(struct clk *clk, int enable) -{ - u32 mask; - - if (BCMCPU_IS_6338()) - mask = CKCTL_6338_SPI_EN; - else if (BCMCPU_IS_6348()) - mask = CKCTL_6348_SPI_EN; - else - /* BCMCPU_IS_6358 */ - mask = CKCTL_6358_SPI_EN; - bcm_hwclock_set(mask, enable); -} - -static struct clk clk_spi = { - .set = spi_set, -}; - -/* - * Internal peripheral clock - */ -static struct clk clk_periph = { - .rate = (50 * 1000 * 1000), -}; - - -/* - * Linux clock API implementation - */ -int clk_enable(struct clk *clk) -{ - mutex_lock(&clocks_mutex); - clk_enable_unlocked(clk); - mutex_unlock(&clocks_mutex); - return 0; -} - -EXPORT_SYMBOL(clk_enable); - -void clk_disable(struct clk *clk) -{ - mutex_lock(&clocks_mutex); - clk_disable_unlocked(clk); - mutex_unlock(&clocks_mutex); -} - -EXPORT_SYMBOL(clk_disable); - -unsigned long clk_get_rate(struct clk *clk) -{ - return clk->rate; -} - -EXPORT_SYMBOL(clk_get_rate); - -struct clk *clk_get(struct device *dev, const char *id) -{ - if (!strcmp(id, "enet0")) - return &clk_enet0; - if (!strcmp(id, "enet1")) - return &clk_enet1; - if (!strcmp(id, "ephy")) - return &clk_ephy; - if (!strcmp(id, "usbh")) - return &clk_usbh; - if (!strcmp(id, "usbs")) - return &clk_usbs; - if (!strcmp(id, "spi")) - return &clk_spi; - if (!strcmp(id, "periph")) - return &clk_periph; - if (BCMCPU_IS_6358() && !strcmp(id, "pcm")) - return &clk_pcm; - return ERR_PTR(-ENOENT); -} - -EXPORT_SYMBOL(clk_get); - -void clk_put(struct clk *clk) -{ -} - -EXPORT_SYMBOL(clk_put); diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/cpu.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/cpu.c deleted file mode 100644 index 00da28286..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/cpu.c +++ /dev/null @@ -1,398 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - * 2009 Florian Fainelli - */ - -#include -#include -#include -#include -#include -#include -#include - -const unsigned long *bcm63xx_regs_base; -EXPORT_SYMBOL(bcm63xx_regs_base); - -const int *bcm63xx_irqs; -EXPORT_SYMBOL(bcm63xx_irqs); - -const unsigned long *bcm63xx_regs_spi; -EXPORT_SYMBOL(bcm63xx_regs_spi); - -static u16 bcm63xx_cpu_id; -static u16 bcm63xx_cpu_rev; -static unsigned int bcm63xx_cpu_freq; -static unsigned int bcm63xx_memory_size; - -/* - * 6338 register sets and irqs - */ - -static const unsigned long bcm96338_regs_base[] = { - [RSET_DSL_LMEM] = BCM_6338_DSL_LMEM_BASE, - [RSET_PERF] = BCM_6338_PERF_BASE, - [RSET_TIMER] = BCM_6338_TIMER_BASE, - [RSET_WDT] = BCM_6338_WDT_BASE, - [RSET_UART0] = BCM_6338_UART0_BASE, - [RSET_GPIO] = BCM_6338_GPIO_BASE, - [RSET_SPI] = BCM_6338_SPI_BASE, - [RSET_OHCI0] = BCM_6338_OHCI0_BASE, - [RSET_OHCI_PRIV] = BCM_6338_OHCI_PRIV_BASE, - [RSET_USBH_PRIV] = BCM_6338_USBH_PRIV_BASE, - [RSET_UDC0] = BCM_6338_UDC0_BASE, - [RSET_MPI] = BCM_6338_MPI_BASE, - [RSET_PCMCIA] = BCM_6338_PCMCIA_BASE, - [RSET_SDRAM] = BCM_6338_SDRAM_BASE, - [RSET_DSL] = BCM_6338_DSL_BASE, - [RSET_ENET0] = BCM_6338_ENET0_BASE, - [RSET_ENET1] = BCM_6338_ENET1_BASE, - [RSET_ENETDMA] = BCM_6338_ENETDMA_BASE, - [RSET_MEMC] = BCM_6338_MEMC_BASE, - [RSET_DDR] = BCM_6338_DDR_BASE, -}; - -static const int bcm96338_irqs[] = { - [IRQ_TIMER] = BCM_6338_TIMER_IRQ, - [IRQ_SPI] = BCM_6338_SPI_IRQ, - [IRQ_UART0] = BCM_6338_UART0_IRQ, - [IRQ_DSL] = BCM_6338_DSL_IRQ, - [IRQ_UDC0] = BCM_6338_UDC0_IRQ, - [IRQ_ENET0] = BCM_6338_ENET0_IRQ, - [IRQ_ENET_PHY] = BCM_6338_ENET_PHY_IRQ, - [IRQ_ENET0_RXDMA] = BCM_6338_ENET0_RXDMA_IRQ, - [IRQ_ENET0_TXDMA] = BCM_6338_ENET0_TXDMA_IRQ, -}; - -static const unsigned long bcm96338_regs_spi[] = { - [SPI_CMD] = SPI_BCM_6338_SPI_CMD, - [SPI_INT_STATUS] = SPI_BCM_6338_SPI_INT_STATUS, - [SPI_INT_MASK_ST] = SPI_BCM_6338_SPI_MASK_INT_ST, - [SPI_INT_MASK] = SPI_BCM_6338_SPI_INT_MASK, - [SPI_ST] = SPI_BCM_6338_SPI_ST, - [SPI_CLK_CFG] = SPI_BCM_6338_SPI_CLK_CFG, - [SPI_FILL_BYTE] = SPI_BCM_6338_SPI_FILL_BYTE, - [SPI_MSG_TAIL] = SPI_BCM_6338_SPI_MSG_TAIL, - [SPI_RX_TAIL] = SPI_BCM_6338_SPI_RX_TAIL, - [SPI_MSG_CTL] = SPI_BCM_6338_SPI_MSG_CTL, - [SPI_MSG_DATA] = SPI_BCM_6338_SPI_MSG_DATA, - [SPI_RX_DATA] = SPI_BCM_6338_SPI_RX_DATA, -}; - -/* - * 6345 register sets and irqs - */ - -static const unsigned long bcm96345_regs_base[] = { - [RSET_DSL_LMEM] = BCM_6345_DSL_LMEM_BASE, - [RSET_PERF] = BCM_6345_PERF_BASE, - [RSET_TIMER] = BCM_6345_TIMER_BASE, - [RSET_WDT] = BCM_6345_WDT_BASE, - [RSET_UART0] = BCM_6345_UART0_BASE, - [RSET_GPIO] = BCM_6345_GPIO_BASE, - [RSET_SPI] = BCM_6345_SPI_BASE, - [RSET_UDC0] = BCM_6345_UDC0_BASE, - [RSET_OHCI0] = BCM_6345_OHCI0_BASE, - [RSET_OHCI_PRIV] = BCM_6345_OHCI_PRIV_BASE, - [RSET_USBH_PRIV] = BCM_6345_USBH_PRIV_BASE, - [RSET_MPI] = BCM_6345_MPI_BASE, - [RSET_PCMCIA] = BCM_6345_PCMCIA_BASE, - [RSET_DSL] = BCM_6345_DSL_BASE, - [RSET_ENET0] = BCM_6345_ENET0_BASE, - [RSET_ENET1] = BCM_6345_ENET1_BASE, - [RSET_ENETDMA] = BCM_6345_ENETDMA_BASE, - [RSET_EHCI0] = BCM_6345_EHCI0_BASE, - [RSET_SDRAM] = BCM_6345_SDRAM_BASE, - [RSET_MEMC] = BCM_6345_MEMC_BASE, - [RSET_DDR] = BCM_6345_DDR_BASE, -}; - -static const int bcm96345_irqs[] = { - [IRQ_TIMER] = BCM_6345_TIMER_IRQ, - [IRQ_UART0] = BCM_6345_UART0_IRQ, - [IRQ_DSL] = BCM_6345_DSL_IRQ, - [IRQ_UDC0] = BCM_6345_UDC0_IRQ, - [IRQ_ENET0] = BCM_6345_ENET0_IRQ, - [IRQ_ENET_PHY] = BCM_6345_ENET_PHY_IRQ, - [IRQ_ENET0_RXDMA] = BCM_6345_ENET0_RXDMA_IRQ, - [IRQ_ENET0_TXDMA] = BCM_6345_ENET0_TXDMA_IRQ, -}; - -/* - * 6348 register sets and irqs - */ -static const unsigned long bcm96348_regs_base[] = { - [RSET_DSL_LMEM] = BCM_6348_DSL_LMEM_BASE, - [RSET_PERF] = BCM_6348_PERF_BASE, - [RSET_TIMER] = BCM_6348_TIMER_BASE, - [RSET_WDT] = BCM_6348_WDT_BASE, - [RSET_UART0] = BCM_6348_UART0_BASE, - [RSET_GPIO] = BCM_6348_GPIO_BASE, - [RSET_SPI] = BCM_6348_SPI_BASE, - [RSET_OHCI0] = BCM_6348_OHCI0_BASE, - [RSET_OHCI_PRIV] = BCM_6348_OHCI_PRIV_BASE, - [RSET_USBH_PRIV] = BCM_6348_USBH_PRIV_BASE, - [RSET_UDC0] = BCM_6348_UDC0_BASE, - [RSET_MPI] = BCM_6348_MPI_BASE, - [RSET_PCMCIA] = BCM_6348_PCMCIA_BASE, - [RSET_SDRAM] = BCM_6348_SDRAM_BASE, - [RSET_DSL] = BCM_6348_DSL_BASE, - [RSET_ENET0] = BCM_6348_ENET0_BASE, - [RSET_ENET1] = BCM_6348_ENET1_BASE, - [RSET_ENETDMA] = BCM_6348_ENETDMA_BASE, - [RSET_MEMC] = BCM_6348_MEMC_BASE, - [RSET_DDR] = BCM_6348_DDR_BASE, -}; - -static const int bcm96348_irqs[] = { - [IRQ_TIMER] = BCM_6348_TIMER_IRQ, - [IRQ_SPI] = BCM_6348_SPI_IRQ, - [IRQ_UART0] = BCM_6348_UART0_IRQ, - [IRQ_DSL] = BCM_6348_DSL_IRQ, - [IRQ_UDC0] = BCM_6348_UDC0_IRQ, - [IRQ_ENET0] = BCM_6348_ENET0_IRQ, - [IRQ_ENET1] = BCM_6348_ENET1_IRQ, - [IRQ_ENET_PHY] = BCM_6348_ENET_PHY_IRQ, - [IRQ_OHCI0] = BCM_6348_OHCI0_IRQ, - [IRQ_PCMCIA] = BCM_6348_PCMCIA_IRQ, - [IRQ_ENET0_RXDMA] = BCM_6348_ENET0_RXDMA_IRQ, - [IRQ_ENET0_TXDMA] = BCM_6348_ENET0_TXDMA_IRQ, - [IRQ_ENET1_RXDMA] = BCM_6348_ENET1_RXDMA_IRQ, - [IRQ_ENET1_TXDMA] = BCM_6348_ENET1_TXDMA_IRQ, - [IRQ_PCI] = BCM_6348_PCI_IRQ, -}; - -static const unsigned long bcm96348_regs_spi[] = { - [SPI_CMD] = SPI_BCM_6348_SPI_CMD, - [SPI_INT_STATUS] = SPI_BCM_6348_SPI_INT_STATUS, - [SPI_INT_MASK_ST] = SPI_BCM_6348_SPI_MASK_INT_ST, - [SPI_INT_MASK] = SPI_BCM_6348_SPI_INT_MASK, - [SPI_ST] = SPI_BCM_6348_SPI_ST, - [SPI_CLK_CFG] = SPI_BCM_6348_SPI_CLK_CFG, - [SPI_FILL_BYTE] = SPI_BCM_6348_SPI_FILL_BYTE, - [SPI_MSG_TAIL] = SPI_BCM_6348_SPI_MSG_TAIL, - [SPI_RX_TAIL] = SPI_BCM_6348_SPI_RX_TAIL, - [SPI_MSG_CTL] = SPI_BCM_6348_SPI_MSG_CTL, - [SPI_MSG_DATA] = SPI_BCM_6348_SPI_MSG_DATA, - [SPI_RX_DATA] = SPI_BCM_6348_SPI_RX_DATA, -}; - -/* - * 6358 register sets and irqs - */ -static const unsigned long bcm96358_regs_base[] = { - [RSET_DSL_LMEM] = BCM_6358_DSL_LMEM_BASE, - [RSET_PERF] = BCM_6358_PERF_BASE, - [RSET_TIMER] = BCM_6358_TIMER_BASE, - [RSET_WDT] = BCM_6358_WDT_BASE, - [RSET_UART0] = BCM_6358_UART0_BASE, - [RSET_GPIO] = BCM_6358_GPIO_BASE, - [RSET_SPI] = BCM_6358_SPI_BASE, - [RSET_OHCI0] = BCM_6358_OHCI0_BASE, - [RSET_EHCI0] = BCM_6358_EHCI0_BASE, - [RSET_OHCI_PRIV] = BCM_6358_OHCI_PRIV_BASE, - [RSET_USBH_PRIV] = BCM_6358_USBH_PRIV_BASE, - [RSET_MPI] = BCM_6358_MPI_BASE, - [RSET_PCMCIA] = BCM_6358_PCMCIA_BASE, - [RSET_SDRAM] = BCM_6358_SDRAM_BASE, - [RSET_DSL] = BCM_6358_DSL_BASE, - [RSET_ENET0] = BCM_6358_ENET0_BASE, - [RSET_ENET1] = BCM_6358_ENET1_BASE, - [RSET_ENETDMA] = BCM_6358_ENETDMA_BASE, - [RSET_MEMC] = BCM_6358_MEMC_BASE, - [RSET_DDR] = BCM_6358_DDR_BASE, -}; - -static const int bcm96358_irqs[] = { - [IRQ_TIMER] = BCM_6358_TIMER_IRQ, - [IRQ_SPI] = BCM_6358_SPI_IRQ, - [IRQ_UART0] = BCM_6358_UART0_IRQ, - [IRQ_DSL] = BCM_6358_DSL_IRQ, - [IRQ_ENET0] = BCM_6358_ENET0_IRQ, - [IRQ_ENET1] = BCM_6358_ENET1_IRQ, - [IRQ_ENET_PHY] = BCM_6358_ENET_PHY_IRQ, - [IRQ_OHCI0] = BCM_6358_OHCI0_IRQ, - [IRQ_EHCI0] = BCM_6358_EHCI0_IRQ, - [IRQ_PCMCIA] = BCM_6358_PCMCIA_IRQ, - [IRQ_ENET0_RXDMA] = BCM_6358_ENET0_RXDMA_IRQ, - [IRQ_ENET0_TXDMA] = BCM_6358_ENET0_TXDMA_IRQ, - [IRQ_ENET1_RXDMA] = BCM_6358_ENET1_RXDMA_IRQ, - [IRQ_ENET1_TXDMA] = BCM_6358_ENET1_TXDMA_IRQ, - [IRQ_PCI] = BCM_6358_PCI_IRQ, -}; - -static const unsigned long bcm96358_regs_spi[] = { - [SPI_CMD] = SPI_BCM_6358_SPI_CMD, - [SPI_INT_STATUS] = SPI_BCM_6358_SPI_INT_STATUS, - [SPI_INT_MASK_ST] = SPI_BCM_6358_SPI_MASK_INT_ST, - [SPI_INT_MASK] = SPI_BCM_6358_SPI_INT_MASK, - [SPI_ST] = SPI_BCM_6358_SPI_STATUS, - [SPI_CLK_CFG] = SPI_BCM_6358_SPI_CLK_CFG, - [SPI_FILL_BYTE] = SPI_BCM_6358_SPI_FILL_BYTE, - [SPI_MSG_TAIL] = SPI_BCM_6358_SPI_MSG_TAIL, - [SPI_RX_TAIL] = SPI_BCM_6358_SPI_RX_TAIL, - [SPI_MSG_CTL] = SPI_BCM_6358_MSG_CTL, - [SPI_MSG_DATA] = SPI_BCM_6358_SPI_MSG_DATA, - [SPI_RX_DATA] = SPI_BCM_6358_SPI_RX_DATA, -}; - -u16 __bcm63xx_get_cpu_id(void) -{ - return bcm63xx_cpu_id; -} - -EXPORT_SYMBOL(__bcm63xx_get_cpu_id); - -u16 bcm63xx_get_cpu_rev(void) -{ - return bcm63xx_cpu_rev; -} - -EXPORT_SYMBOL(bcm63xx_get_cpu_rev); - -unsigned int bcm63xx_get_cpu_freq(void) -{ - return bcm63xx_cpu_freq; -} - -unsigned int bcm63xx_get_memory_size(void) -{ - return bcm63xx_memory_size; -} - -static unsigned int detect_cpu_clock(void) -{ - unsigned int tmp, n1 = 0, n2 = 0, m1 = 0; - - if (BCMCPU_IS_6338()) - return 240000000; - - if (BCMCPU_IS_6345()) - return 140000000; - - /* - * frequency depends on PLL configuration: - */ - if (BCMCPU_IS_6348()) { - /* 16MHz * (N1 + 1) * (N2 + 2) / (M1_CPU + 1) */ - tmp = bcm_perf_readl(PERF_MIPSPLLCTL_REG); - n1 = (tmp & MIPSPLLCTL_N1_MASK) >> MIPSPLLCTL_N1_SHIFT; - n2 = (tmp & MIPSPLLCTL_N2_MASK) >> MIPSPLLCTL_N2_SHIFT; - m1 = (tmp & MIPSPLLCTL_M1CPU_MASK) >> MIPSPLLCTL_M1CPU_SHIFT; - n1 += 1; - n2 += 2; - m1 += 1; - } - - if (BCMCPU_IS_6358()) { - /* 16MHz * N1 * N2 / M1_CPU */ - tmp = bcm_ddr_readl(DDR_DMIPSPLLCFG_REG); - n1 = (tmp & DMIPSPLLCFG_N1_MASK) >> DMIPSPLLCFG_N1_SHIFT; - n2 = (tmp & DMIPSPLLCFG_N2_MASK) >> DMIPSPLLCFG_N2_SHIFT; - m1 = (tmp & DMIPSPLLCFG_M1_MASK) >> DMIPSPLLCFG_M1_SHIFT; - } - - return (16 * 1000000 * n1 * n2) / m1; -} - -/* - * attempt to detect the amount of memory installed - */ -static unsigned int detect_memory_size(void) -{ - unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0; - u32 val; - - if (BCMCPU_IS_6345()) - return (8 * 1024 * 1024); - - if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) { - val = bcm_sdram_readl(SDRAM_CFG_REG); - rows = (val & SDRAM_CFG_ROW_MASK) >> SDRAM_CFG_ROW_SHIFT; - cols = (val & SDRAM_CFG_COL_MASK) >> SDRAM_CFG_COL_SHIFT; - is_32bits = (val & SDRAM_CFG_32B_MASK) ? 1 : 0; - banks = (val & SDRAM_CFG_BANK_MASK) ? 2 : 1; - } - - if (BCMCPU_IS_6358()) { - val = bcm_memc_readl(MEMC_CFG_REG); - rows = (val & MEMC_CFG_ROW_MASK) >> MEMC_CFG_ROW_SHIFT; - cols = (val & MEMC_CFG_COL_MASK) >> MEMC_CFG_COL_SHIFT; - is_32bits = (val & MEMC_CFG_32B_MASK) ? 0 : 1; - banks = 2; - } - - /* 0 => 11 address bits ... 2 => 13 address bits */ - rows += 11; - - /* 0 => 8 address bits ... 2 => 10 address bits */ - cols += 8; - - return 1 << (cols + rows + (is_32bits + 1) + banks); -} - -void __init bcm63xx_cpu_init(void) -{ - unsigned int tmp, expected_cpu_id; - struct cpuinfo_mips *c = ¤t_cpu_data; - - /* soc registers location depends on cpu type */ - expected_cpu_id = 0; - - switch (c->cputype) { - case CPU_BCM3302: - expected_cpu_id = BCM6338_CPU_ID; - bcm63xx_regs_base = bcm96338_regs_base; - bcm63xx_irqs = bcm96338_irqs; - bcm63xx_regs_spi = bcm96338_regs_spi; - break; - case CPU_BCM6345: - expected_cpu_id = BCM6345_CPU_ID; - bcm63xx_regs_base = bcm96345_regs_base; - bcm63xx_irqs = bcm96345_irqs; - break; - case CPU_BCM6348: - expected_cpu_id = BCM6348_CPU_ID; - bcm63xx_regs_base = bcm96348_regs_base; - bcm63xx_irqs = bcm96348_irqs; - bcm63xx_regs_spi = bcm96348_regs_spi; - break; - case CPU_BCM6358: - expected_cpu_id = BCM6358_CPU_ID; - bcm63xx_regs_base = bcm96358_regs_base; - bcm63xx_irqs = bcm96358_irqs; - bcm63xx_regs_spi = bcm96358_regs_spi; - break; - } - - /* really early to panic, but delaying panic would not help - * since we will never get any working console */ - if (!expected_cpu_id) - panic("unsupported Broadcom CPU"); - - /* - * bcm63xx_regs_base is set, we can access soc registers - */ - - /* double check CPU type */ - tmp = bcm_perf_readl(PERF_REV_REG); - bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT; - bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT; - - if (bcm63xx_cpu_id != expected_cpu_id) - panic("bcm63xx CPU id mismatch"); - - bcm63xx_cpu_freq = detect_cpu_clock(); - bcm63xx_memory_size = detect_memory_size(); - - printk(KERN_INFO "Detected Broadcom 0x%04x CPU revision %02x\n", - bcm63xx_cpu_id, bcm63xx_cpu_rev); - printk(KERN_INFO "CPU frequency is %u Hz\n", - bcm63xx_cpu_freq); - printk(KERN_INFO "%uMB of RAM installed\n", - bcm63xx_memory_size >> 20); -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/cs.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/cs.c deleted file mode 100644 index 50d8190bb..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/cs.c +++ /dev/null @@ -1,144 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -static DEFINE_SPINLOCK(bcm63xx_cs_lock); - -/* - * check if given chip select exists - */ -static int is_valid_cs(unsigned int cs) -{ - if (cs > 6) - return 0; - return 1; -} - -/* - * Configure chipselect base address and size (bytes). - * Size must be a power of two between 8k and 256M. - */ -int bcm63xx_set_cs_base(unsigned int cs, u32 base, unsigned int size) -{ - unsigned long flags; - u32 val; - - if (!is_valid_cs(cs)) - return -EINVAL; - - /* sanity check on size */ - if (size != roundup_pow_of_two(size)) - return -EINVAL; - - if (size < 8 * 1024 || size > 256 * 1024 * 1024) - return -EINVAL; - - val = (base & MPI_CSBASE_BASE_MASK); - /* 8k => 0 - 256M => 15 */ - val |= (ilog2(size) - ilog2(8 * 1024)) << MPI_CSBASE_SIZE_SHIFT; - - spin_lock_irqsave(&bcm63xx_cs_lock, flags); - bcm_mpi_writel(val, MPI_CSBASE_REG(cs)); - spin_unlock_irqrestore(&bcm63xx_cs_lock, flags); - - return 0; -} - -EXPORT_SYMBOL(bcm63xx_set_cs_base); - -/* - * configure chipselect timing (ns) - */ -int bcm63xx_set_cs_timing(unsigned int cs, unsigned int wait, - unsigned int setup, unsigned int hold) -{ - unsigned long flags; - u32 val; - - if (!is_valid_cs(cs)) - return -EINVAL; - - spin_lock_irqsave(&bcm63xx_cs_lock, flags); - val = bcm_mpi_readl(MPI_CSCTL_REG(cs)); - val &= ~(MPI_CSCTL_WAIT_MASK); - val &= ~(MPI_CSCTL_SETUP_MASK); - val &= ~(MPI_CSCTL_HOLD_MASK); - val |= wait << MPI_CSCTL_WAIT_SHIFT; - val |= setup << MPI_CSCTL_SETUP_SHIFT; - val |= hold << MPI_CSCTL_HOLD_SHIFT; - bcm_mpi_writel(val, MPI_CSCTL_REG(cs)); - spin_unlock_irqrestore(&bcm63xx_cs_lock, flags); - - return 0; -} - -EXPORT_SYMBOL(bcm63xx_set_cs_timing); - -/* - * configure other chipselect parameter (data bus size, ...) - */ -int bcm63xx_set_cs_param(unsigned int cs, u32 params) -{ - unsigned long flags; - u32 val; - - if (!is_valid_cs(cs)) - return -EINVAL; - - /* none of this fields apply to pcmcia */ - if (cs == MPI_CS_PCMCIA_COMMON || - cs == MPI_CS_PCMCIA_ATTR || - cs == MPI_CS_PCMCIA_IO) - return -EINVAL; - - spin_lock_irqsave(&bcm63xx_cs_lock, flags); - val = bcm_mpi_readl(MPI_CSCTL_REG(cs)); - val &= ~(MPI_CSCTL_DATA16_MASK); - val &= ~(MPI_CSCTL_SYNCMODE_MASK); - val &= ~(MPI_CSCTL_TSIZE_MASK); - val &= ~(MPI_CSCTL_ENDIANSWAP_MASK); - val |= params; - bcm_mpi_writel(val, MPI_CSCTL_REG(cs)); - spin_unlock_irqrestore(&bcm63xx_cs_lock, flags); - - return 0; -} - -EXPORT_SYMBOL(bcm63xx_set_cs_param); - -/* - * set cs status (enable/disable) - */ -int bcm63xx_set_cs_status(unsigned int cs, int enable) -{ - unsigned long flags; - u32 val; - - if (!is_valid_cs(cs)) - return -EINVAL; - - spin_lock_irqsave(&bcm63xx_cs_lock, flags); - val = bcm_mpi_readl(MPI_CSCTL_REG(cs)); - if (enable) - val |= MPI_CSCTL_ENABLE_MASK; - else - val &= ~MPI_CSCTL_ENABLE_MASK; - bcm_mpi_writel(val, MPI_CSCTL_REG(cs)); - spin_unlock_irqrestore(&bcm63xx_cs_lock, flags); - return 0; -} - -EXPORT_SYMBOL(bcm63xx_set_cs_status); diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-dsp.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-dsp.c deleted file mode 100644 index 08a2f75c2..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-dsp.c +++ /dev/null @@ -1,56 +0,0 @@ -/* - * Broadcom BCM63xx VoIP DSP registration - * - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2009 Florian Fainelli - */ - -#include -#include -#include - -#include -#include -#include -#include - -static struct resource voip_dsp_resources[] = { - { - .start = -1, /* filled at runtime */ - .end = -1, /* filled at runtime */ - .flags = IORESOURCE_MEM, - }, - { - .start = -1, /* filled at runtime */ - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device bcm63xx_voip_dsp_device = { - .name = "bcm63xx-voip-dsp", - .id = 0, - .num_resources = ARRAY_SIZE(voip_dsp_resources), - .resource = voip_dsp_resources, -}; - -int __init bcm63xx_dsp_register(const struct bcm63xx_dsp_platform_data *pd) -{ - struct bcm63xx_dsp_platform_data *dpd; - u32 val; - - /* Get the memory window */ - val = bcm_mpi_readl(MPI_CSBASE_REG(pd->cs - 1)); - val &= MPI_CSBASE_BASE_MASK; - voip_dsp_resources[0].start = val; - voip_dsp_resources[0].end = val + 0xFFFFFFF; - voip_dsp_resources[1].start = pd->ext_irq; - - /* copy given platform data */ - dpd = bcm63xx_voip_dsp_device.dev.platform_data; - memcpy(dpd, pd, sizeof (*pd)); - - return platform_device_register(&bcm63xx_voip_dsp_device); -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-enet.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-enet.c deleted file mode 100644 index aeb1b934f..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-enet.c +++ /dev/null @@ -1,161 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include -#include - -static struct resource shared_res[] = { - { - .start = -1, /* filled at runtime */ - .end = -1, /* filled at runtime */ - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device bcm63xx_enet_shared_device = { - .name = "bcm63xx_enet_shared", - .id = 0, - .num_resources = ARRAY_SIZE(shared_res), - .resource = shared_res, -}; - -static int shared_device_registered = 0; - -static struct resource enet0_res[] = { - { - .start = -1, /* filled at runtime */ - .end = -1, /* filled at runtime */ - .flags = IORESOURCE_MEM, - }, - { - .start = -1, /* filled at runtime */ - .flags = IORESOURCE_IRQ, - }, - { - .start = -1, /* filled at runtime */ - .start = IRQ_ENET0_RXDMA, - .flags = IORESOURCE_IRQ, - }, - { - .start = -1, /* filled at runtime */ - .start = IRQ_ENET0_TXDMA, - .flags = IORESOURCE_IRQ, - }, -}; - -static struct bcm63xx_enet_platform_data enet0_pd; - -static struct platform_device bcm63xx_enet0_device = { - .name = "bcm63xx_enet", - .id = 0, - .num_resources = ARRAY_SIZE(enet0_res), - .resource = enet0_res, - .dev = { - .platform_data = &enet0_pd, - }, -}; - -static struct resource enet1_res[] = { - { - .start = -1, /* filled at runtime */ - .end = -1, /* filled at runtime */ - .flags = IORESOURCE_MEM, - }, - { - .start = -1, /* filled at runtime */ - .flags = IORESOURCE_IRQ, - }, - { - .start = -1, /* filled at runtime */ - .flags = IORESOURCE_IRQ, - }, - { - .start = -1, /* filled at runtime */ - .flags = IORESOURCE_IRQ, - }, -}; - -static struct bcm63xx_enet_platform_data enet1_pd; - -static struct platform_device bcm63xx_enet1_device = { - .name = "bcm63xx_enet", - .id = 1, - .num_resources = ARRAY_SIZE(enet1_res), - .resource = enet1_res, - .dev = { - .platform_data = &enet1_pd, - }, -}; - -int __init bcm63xx_enet_register(int unit, - const struct bcm63xx_enet_platform_data *pd) -{ - struct platform_device *pdev; - struct bcm63xx_enet_platform_data *dpd; - int ret; - - if (unit > 1) - return -ENODEV; - - if (!shared_device_registered) { - shared_res[0].start = bcm63xx_regset_address(RSET_ENETDMA); - shared_res[0].end = shared_res[0].start; - if (BCMCPU_IS_6338()) - shared_res[0].end += (RSET_ENETDMA_SIZE / 2) - 1; - else - shared_res[0].end += (RSET_ENETDMA_SIZE) - 1; - - ret = platform_device_register(&bcm63xx_enet_shared_device); - if (ret) - return ret; - shared_device_registered = 1; - } - - if (unit == 0) { - enet0_res[0].start = bcm63xx_regset_address(RSET_ENET0); - enet0_res[0].end = enet0_res[0].start; - enet0_res[0].end += RSET_ENET_SIZE - 1; - enet0_res[1].start = bcm63xx_get_irq_number(IRQ_ENET0); - enet0_res[2].start = bcm63xx_get_irq_number(IRQ_ENET0_RXDMA); - enet0_res[3].start = bcm63xx_get_irq_number(IRQ_ENET0_TXDMA); - pdev = &bcm63xx_enet0_device; - } else { - enet1_res[0].start = bcm63xx_regset_address(RSET_ENET1); - enet1_res[0].end = enet1_res[0].start; - enet1_res[0].end += RSET_ENET_SIZE - 1; - enet1_res[1].start = bcm63xx_get_irq_number(IRQ_ENET1); - enet1_res[2].start = bcm63xx_get_irq_number(IRQ_ENET1_RXDMA); - enet1_res[3].start = bcm63xx_get_irq_number(IRQ_ENET1_TXDMA); - pdev = &bcm63xx_enet1_device; - } - - /* copy given platform data */ - dpd = pdev->dev.platform_data; - memcpy(dpd, pd, sizeof (*pd)); - - /* adjust them in case internal phy is used */ - if (dpd->use_internal_phy) { - - /* internal phy only exists for enet0 */ - if (unit == 1) - return -ENODEV; - - dpd->phy_id = 1; - dpd->has_phy_interrupt = 1; - dpd->phy_interrupt = bcm63xx_get_irq_number(IRQ_ENET_PHY); - } - - ret = platform_device_register(pdev); - if (ret) - return ret; - return 0; -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-pcmcia.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-pcmcia.c deleted file mode 100644 index 6bb911ca4..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-pcmcia.c +++ /dev/null @@ -1,135 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static struct resource pcmcia_resources[] = { - /* pcmcia registers */ - { - .start = -1, /* filled at runtime */ - .end = -1, /* filled at runtime */ - .flags = IORESOURCE_MEM, - }, - - /* pcmcia memory zone resources */ - { - .start = BCM_PCMCIA_COMMON_BASE_PA, - .end = BCM_PCMCIA_COMMON_END_PA, - .flags = IORESOURCE_MEM, - }, - { - .start = BCM_PCMCIA_ATTR_BASE_PA, - .end = BCM_PCMCIA_ATTR_END_PA, - .flags = IORESOURCE_MEM, - }, - { - .start = BCM_PCMCIA_IO_BASE_PA, - .end = BCM_PCMCIA_IO_END_PA, - .flags = IORESOURCE_MEM, - }, - - /* PCMCIA irq */ - { - .start = -1, /* filled at runtime */ - .flags = IORESOURCE_IRQ, - }, - - /* declare PCMCIA IO resource also */ - { - .start = BCM_PCMCIA_IO_BASE_PA, - .end = BCM_PCMCIA_IO_END_PA, - .flags = IORESOURCE_IO, - }, -}; - -static struct bcm63xx_pcmcia_platform_data pd; - -static struct platform_device bcm63xx_pcmcia_device = { - .name = "bcm63xx_pcmcia", - .id = 0, - .num_resources = ARRAY_SIZE(pcmcia_resources), - .resource = pcmcia_resources, - .dev = { - .platform_data = &pd, - }, -}; - -static int __init config_pcmcia_cs(unsigned int cs, - u32 base, unsigned int size) -{ - int ret; - - ret = bcm63xx_set_cs_status(cs, 0); - if (!ret) - ret = bcm63xx_set_cs_base(cs, base, size); - if (!ret) - ret = bcm63xx_set_cs_status(cs, 1); - return ret; -} - -static const __initdata unsigned int pcmcia_cs[3][3] = { - /* cs, base address, size */ - { MPI_CS_PCMCIA_COMMON, BCM_PCMCIA_COMMON_BASE_PA, - BCM_PCMCIA_COMMON_SIZE }, - - { MPI_CS_PCMCIA_ATTR, BCM_PCMCIA_ATTR_BASE_PA, - BCM_PCMCIA_ATTR_SIZE }, - - { MPI_CS_PCMCIA_IO, BCM_PCMCIA_IO_BASE_PA, - BCM_PCMCIA_IO_SIZE }, -}; - -int __init bcm63xx_pcmcia_register(void) -{ - int ret, i; - - if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358()) - return 0; - - /* use correct pcmcia ready gpio depending on processor */ - switch (bcm63xx_get_cpu_id()) { - case BCM6348_CPU_ID: - pd.ready_gpio = 22; - break; - - case BCM6358_CPU_ID: - pd.ready_gpio = 18; - break; - - default: - return -ENODEV; - } - - pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA); - pcmcia_resources[0].end = pcmcia_resources[0].start; - pcmcia_resources[0].end += RSET_PCMCIA_SIZE - 1; - pcmcia_resources[4].start = bcm63xx_get_irq_number(IRQ_PCMCIA); - - /* configure pcmcia chip selects */ - for (i = 0; i < 3; i++) { - ret = config_pcmcia_cs(pcmcia_cs[i][0], - pcmcia_cs[i][1], - pcmcia_cs[i][2]); - if (ret) - goto out_err; - } - - return platform_device_register(&bcm63xx_pcmcia_device); - -out_err: - printk(KERN_ERR "unable to set pcmcia chip select"); - return ret; -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-spi.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-spi.c deleted file mode 100644 index 1ba4aded3..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-spi.c +++ /dev/null @@ -1,60 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2009 Florian Fainelli - */ - -#include -#include -#include - -#include -#include -#include - -static struct resource spi_resources[] = { - { - .start = -1, /* filled at runtime */ - .end = -1, /* filled at runtime */ - .flags = IORESOURCE_MEM, - }, - { - .start = -1, /* filled at runtime */ - .flags = IORESOURCE_IRQ, - }, -}; - -static struct bcm63xx_spi_pdata spi_pdata = { - .bus_num = 0, - .num_chipselect = 4, - .speed_hz = 50000000, /* Fclk */ -}; - -static struct platform_device bcm63xx_spi_device = { - .name = "bcm63xx-spi", - .id = 0, - .num_resources = ARRAY_SIZE(spi_resources), - .resource = spi_resources, - .dev = { - .platform_data = &spi_pdata, - }, -}; - -int __init bcm63xx_spi_register(void) -{ - spi_resources[0].start = bcm63xx_regset_address(RSET_SPI); - spi_resources[0].end = spi_resources[0].start; - spi_resources[0].end += RSET_SPI_SIZE - 1; - spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI); - - /* Fill in platform data */ - if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) - spi_pdata.fifo_size = SPI_BCM_6338_SPI_MSG_DATA_SIZE; - - if (BCMCPU_IS_6358()) - spi_pdata.fifo_size = SPI_BCM_6358_SPI_MSG_DATA_SIZE; - - return platform_device_register(&bcm63xx_spi_device); -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-uart.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-uart.c deleted file mode 100644 index 5f3d89c4a..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-uart.c +++ /dev/null @@ -1,41 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include - -static struct resource uart_resources[] = { - { - .start = -1, /* filled at runtime */ - .end = -1, /* filled at runtime */ - .flags = IORESOURCE_MEM, - }, - { - .start = -1, /* filled at runtime */ - .flags = IORESOURCE_IRQ, - }, -}; - -static struct platform_device bcm63xx_uart_device = { - .name = "bcm63xx_uart", - .id = 0, - .num_resources = ARRAY_SIZE(uart_resources), - .resource = uart_resources, -}; - -int __init bcm63xx_uart_register(void) -{ - uart_resources[0].start = bcm63xx_regset_address(RSET_UART0); - uart_resources[0].end = uart_resources[0].start; - uart_resources[0].end += RSET_UART_SIZE - 1; - uart_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0); - return platform_device_register(&bcm63xx_uart_device); -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-usb-ehci.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-usb-ehci.c deleted file mode 100644 index 7885405f7..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-usb-ehci.c +++ /dev/null @@ -1,50 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include - -static struct resource ehci_resources[] = { - { - .start = -1, /* filled at runtime */ - .end = -1, /* filled at runtime */ - .flags = IORESOURCE_MEM, - }, - { - .start = -1, /* filled at runtime */ - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 ehci_dmamask = ~(u32)0; - -static struct platform_device bcm63xx_ehci_device = { - .name = "bcm63xx_ehci", - .id = 0, - .num_resources = ARRAY_SIZE(ehci_resources), - .resource = ehci_resources, - .dev = { - .dma_mask = &ehci_dmamask, - .coherent_dma_mask = 0xffffffff, - }, -}; - -int __init bcm63xx_ehci_register(void) -{ - if (!BCMCPU_IS_6358()) - return 0; - - ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0); - ehci_resources[0].end = ehci_resources[0].start; - ehci_resources[0].end += RSET_EHCI_SIZE - 1; - ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0); - return platform_device_register(&bcm63xx_ehci_device); -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-usb-ohci.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-usb-ohci.c deleted file mode 100644 index 377e67cf2..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-usb-ohci.c +++ /dev/null @@ -1,50 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include - -static struct resource ohci_resources[] = { - { - .start = -1, /* filled at runtime */ - .end = -1, /* filled at runtime */ - .flags = IORESOURCE_MEM, - }, - { - .start = -1, /* filled at runtime */ - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 ohci_dmamask = ~(u32)0; - -static struct platform_device bcm63xx_ohci_device = { - .name = "bcm63xx_ohci", - .id = 0, - .num_resources = ARRAY_SIZE(ohci_resources), - .resource = ohci_resources, - .dev = { - .dma_mask = &ohci_dmamask, - .coherent_dma_mask = 0xffffffff, - }, -}; - -int __init bcm63xx_ohci_register(void) -{ - if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358()) - return 0; - - ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0); - ohci_resources[0].end = ohci_resources[0].start; - ohci_resources[0].end += RSET_OHCI_SIZE - 1; - ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0); - return platform_device_register(&bcm63xx_ohci_device); -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-usb-udc.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-usb-udc.c deleted file mode 100644 index c5f1070c3..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-usb-udc.c +++ /dev/null @@ -1,58 +0,0 @@ -/* - * Copyright (C) 2009 Henk Vergonet - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; either version 2 of - * the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. - */ -#include -#include -#include -#include - -static struct resource udc_resources[] = { - { - .start = -1, /* filled at runtime */ - .end = -1, /* filled at runtime */ - .flags = IORESOURCE_MEM, - }, - { - .start = -1, /* filled at runtime */ - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 udc_dmamask = ~(u32)0; - -static struct platform_device bcm63xx_udc_device = { - .name = "bcm63xx-udc", - .id = 0, - .num_resources = ARRAY_SIZE(udc_resources), - .resource = udc_resources, - .dev = { - .dma_mask = &udc_dmamask, - .coherent_dma_mask = 0xffffffff, - }, -}; - -int __init bcm63xx_udc_register(void) -{ - if (!BCMCPU_IS_6338() && !BCMCPU_IS_6345() && !BCMCPU_IS_6348()) - return 0; - - udc_resources[0].start = bcm63xx_regset_address(RSET_UDC0); - udc_resources[0].end = udc_resources[0].start; - udc_resources[0].end += RSET_UDC_SIZE - 1; - udc_resources[1].start = bcm63xx_get_irq_number(IRQ_UDC0); - return platform_device_register(&bcm63xx_udc_device); -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-wdt.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-wdt.c deleted file mode 100644 index 6e184891d..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/dev-wdt.c +++ /dev/null @@ -1,36 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Florian Fainelli - */ - -#include -#include -#include -#include - -static struct resource wdt_resources[] = { - { - .start = -1, /* filled at runtime */ - .end = -1, /* filled at runtime */ - .flags = IORESOURCE_MEM, - }, -}; - -static struct platform_device bcm63xx_wdt_device = { - .name = "bcm63xx-wdt", - .id = 0, - .num_resources = ARRAY_SIZE(wdt_resources), - .resource = wdt_resources, -}; - -int __init bcm63xx_wdt_register(void) -{ - wdt_resources[0].start = bcm63xx_regset_address(RSET_WDT); - wdt_resources[0].end = wdt_resources[0].start; - wdt_resources[0].end += RSET_WDT_SIZE - 1; - - return platform_device_register(&bcm63xx_wdt_device); -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/early_printk.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/early_printk.c deleted file mode 100644 index bf353c937..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/early_printk.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include - -static void __init wait_xfered(void) -{ - unsigned int val; - - /* wait for any previous char to be transmitted */ - do { - val = bcm_uart0_readl(UART_IR_REG); - if (val & UART_IR_STAT(UART_IR_TXEMPTY)) - break; - } while (1); -} - -void __init prom_putchar(char c) -{ - wait_xfered(); - bcm_uart0_writel(c, UART_FIFO_REG); - wait_xfered(); -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/gpio.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/gpio.c deleted file mode 100644 index 53e46641a..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/gpio.c +++ /dev/null @@ -1,131 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - * Copyright (C) 2008 Florian Fainelli - */ - -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -static DEFINE_SPINLOCK(bcm63xx_gpio_lock); -static u32 gpio_out_low, gpio_out_high; - -static void bcm63xx_gpio_set(struct gpio_chip *chip, - unsigned gpio, int val) -{ - u32 reg; - u32 mask; - u32 *v; - unsigned long flags; - - if (gpio >= chip->ngpio) - BUG(); - - if (gpio < 32) { - reg = GPIO_DATA_LO_REG; - mask = 1 << gpio; - v = &gpio_out_low; - } else { - reg = GPIO_DATA_HI_REG; - mask = 1 << (gpio - 32); - v = &gpio_out_high; - } - - spin_lock_irqsave(&bcm63xx_gpio_lock, flags); - if (val) - *v |= mask; - else - *v &= ~mask; - bcm_gpio_writel(*v, reg); - spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags); -} - -static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio) -{ - u32 reg; - u32 mask; - - if (gpio >= chip->ngpio) - BUG(); - - if (gpio < 32) { - reg = GPIO_DATA_LO_REG; - mask = 1 << gpio; - } else { - reg = GPIO_DATA_HI_REG; - mask = 1 << (gpio - 32); - } - - return !!(bcm_gpio_readl(reg) & mask); -} - -static int bcm63xx_gpio_set_direction(struct gpio_chip *chip, - unsigned gpio, int dir) -{ - u32 reg; - u32 mask; - u32 tmp; - unsigned long flags; - - if (gpio >= chip->ngpio) - BUG(); - - if (gpio < 32) { - reg = GPIO_CTL_LO_REG; - mask = 1 << gpio; - } else { - reg = GPIO_CTL_HI_REG; - mask = 1 << (gpio - 32); - } - - spin_lock_irqsave(&bcm63xx_gpio_lock, flags); - tmp = bcm_gpio_readl(reg); - if (dir == GPIO_DIR_IN) - tmp &= ~mask; - else - tmp |= mask; - bcm_gpio_writel(tmp, reg); - spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags); - - return 0; -} - -static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio) -{ - return bcm63xx_gpio_set_direction(chip, gpio, GPIO_DIR_IN); -} - -static int bcm63xx_gpio_direction_output(struct gpio_chip *chip, - unsigned gpio, int value) -{ - bcm63xx_gpio_set(chip, gpio, value); - return bcm63xx_gpio_set_direction(chip, gpio, GPIO_DIR_OUT); -} - - -static struct gpio_chip bcm63xx_gpio_chip = { - .label = "bcm63xx-gpio", - .direction_input = bcm63xx_gpio_direction_input, - .direction_output = bcm63xx_gpio_direction_output, - .get = bcm63xx_gpio_get, - .set = bcm63xx_gpio_set, - .base = 0, -}; - -int __init bcm63xx_gpio_init(void) -{ - bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count(); - printk(KERN_INFO "registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio); - return gpiochip_add(&bcm63xx_gpio_chip); -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/irq.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/irq.c deleted file mode 100644 index a0c5cd18c..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/irq.c +++ /dev/null @@ -1,253 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - * Copyright (C) 2008 Nicolas Schichan - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* - * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not - * prioritize any interrupt relatively to another. the static counter - * will resume the loop where it ended the last time we left this - * function. - */ -static void bcm63xx_irq_dispatch_internal(void) -{ - u32 pending; - static int i; - - pending = bcm_perf_readl(PERF_IRQMASK_REG) & - bcm_perf_readl(PERF_IRQSTAT_REG); - - if (!pending) - return ; - - while (1) { - int to_call = i; - - i = (i + 1) & 0x1f; - if (pending & (1 << to_call)) { - do_IRQ(to_call + IRQ_INTERNAL_BASE); - break; - } - } -} - -asmlinkage void plat_irq_dispatch(void) -{ - u32 cause; - - do { - cause = read_c0_cause() & read_c0_status() & ST0_IM; - - if (!cause) - break; - - if (cause & CAUSEF_IP7) - do_IRQ(7); - if (cause & CAUSEF_IP2) - bcm63xx_irq_dispatch_internal(); - if (cause & CAUSEF_IP3) - do_IRQ(IRQ_EXT_0); - if (cause & CAUSEF_IP4) - do_IRQ(IRQ_EXT_1); - if (cause & CAUSEF_IP5) - do_IRQ(IRQ_EXT_2); - if (cause & CAUSEF_IP6) - do_IRQ(IRQ_EXT_3); - } while (1); -} - -/* - * internal IRQs operations: only mask/unmask on PERF irq mask - * register. - */ -static inline void bcm63xx_internal_irq_mask(unsigned int irq) -{ - u32 mask; - - irq -= IRQ_INTERNAL_BASE; - mask = bcm_perf_readl(PERF_IRQMASK_REG); - mask &= ~(1 << irq); - bcm_perf_writel(mask, PERF_IRQMASK_REG); -} - -static void bcm63xx_internal_irq_unmask(unsigned int irq) -{ - u32 mask; - - irq -= IRQ_INTERNAL_BASE; - mask = bcm_perf_readl(PERF_IRQMASK_REG); - mask |= (1 << irq); - bcm_perf_writel(mask, PERF_IRQMASK_REG); -} - -static unsigned int bcm63xx_internal_irq_startup(unsigned int irq) -{ - bcm63xx_internal_irq_unmask(irq); - return 0; -} - -/* - * external IRQs operations: mask/unmask and clear on PERF external - * irq control register. - */ -static void bcm63xx_external_irq_mask(unsigned int irq) -{ - u32 reg; - - irq -= IRQ_EXT_BASE; - reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); - reg &= ~EXTIRQ_CFG_MASK(irq); - bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); -} - -static void bcm63xx_external_irq_unmask(unsigned int irq) -{ - u32 reg; - - irq -= IRQ_EXT_BASE; - reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); - reg |= EXTIRQ_CFG_MASK(irq); - bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); -} - -static void bcm63xx_external_irq_clear(unsigned int irq) -{ - u32 reg; - - irq -= IRQ_EXT_BASE; - reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); - reg |= EXTIRQ_CFG_CLEAR(irq); - bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); -} - -static unsigned int bcm63xx_external_irq_startup(unsigned int irq) -{ - set_c0_status(0x100 << (irq - IRQ_MIPS_BASE)); - irq_enable_hazard(); - bcm63xx_external_irq_unmask(irq); - return 0; -} - -static void bcm63xx_external_irq_shutdown(unsigned int irq) -{ - bcm63xx_external_irq_mask(irq); - clear_c0_status(0x100 << (irq - IRQ_MIPS_BASE)); - irq_disable_hazard(); -} - -static int bcm63xx_external_irq_set_type(unsigned int irq, - unsigned int flow_type) -{ - u32 reg; - struct irq_desc *desc = irq_desc + irq; - - irq -= IRQ_EXT_BASE; - - flow_type &= IRQ_TYPE_SENSE_MASK; - - if (flow_type == IRQ_TYPE_NONE) - flow_type = IRQ_TYPE_LEVEL_LOW; - - reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); - switch (flow_type) { - case IRQ_TYPE_EDGE_BOTH: - reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); - reg |= EXTIRQ_CFG_BOTHEDGE(irq); - break; - - case IRQ_TYPE_EDGE_RISING: - reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); - reg |= EXTIRQ_CFG_SENSE(irq); - reg &= ~EXTIRQ_CFG_BOTHEDGE(irq); - break; - - case IRQ_TYPE_EDGE_FALLING: - reg &= ~EXTIRQ_CFG_LEVELSENSE(irq); - reg &= ~EXTIRQ_CFG_SENSE(irq); - reg &= ~EXTIRQ_CFG_BOTHEDGE(irq); - break; - - case IRQ_TYPE_LEVEL_HIGH: - reg |= EXTIRQ_CFG_LEVELSENSE(irq); - reg |= EXTIRQ_CFG_SENSE(irq); - break; - - case IRQ_TYPE_LEVEL_LOW: - reg |= EXTIRQ_CFG_LEVELSENSE(irq); - reg &= ~EXTIRQ_CFG_SENSE(irq); - break; - - default: - printk(KERN_ERR "bogus flow type combination given !\n"); - return -EINVAL; - } - bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); - - if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) { - desc->status |= IRQ_LEVEL; - desc->handle_irq = handle_level_irq; - } else { - desc->handle_irq = handle_edge_irq; - } - - return 0; -} - -static struct irq_chip bcm63xx_internal_irq_chip = { - .name = "bcm63xx_ipic", - .startup = bcm63xx_internal_irq_startup, - .shutdown = bcm63xx_internal_irq_mask, - - .mask = bcm63xx_internal_irq_mask, - .mask_ack = bcm63xx_internal_irq_mask, - .unmask = bcm63xx_internal_irq_unmask, -}; - -static struct irq_chip bcm63xx_external_irq_chip = { - .name = "bcm63xx_epic", - .startup = bcm63xx_external_irq_startup, - .shutdown = bcm63xx_external_irq_shutdown, - - .ack = bcm63xx_external_irq_clear, - - .mask = bcm63xx_external_irq_mask, - .unmask = bcm63xx_external_irq_unmask, - - .set_type = bcm63xx_external_irq_set_type, -}; - -static struct irqaction cpu_ip2_cascade_action = { - .handler = no_action, - .name = "cascade_ip2", -}; - -void __init arch_init_irq(void) -{ - int i; - - mips_cpu_irq_init(); - for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i) - set_irq_chip_and_handler(i, &bcm63xx_internal_irq_chip, - handle_level_irq); - - for (i = IRQ_EXT_BASE; i < IRQ_EXT_BASE + 4; ++i) - set_irq_chip_and_handler(i, &bcm63xx_external_irq_chip, - handle_edge_irq); - - setup_irq(IRQ_MIPS_BASE + 2, &cpu_ip2_cascade_action); -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/prom.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/prom.c deleted file mode 100644 index fb284fbc5..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/prom.c +++ /dev/null @@ -1,55 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -void __init prom_init(void) -{ - u32 reg, mask; - - bcm63xx_cpu_init(); - - /* stop any running watchdog */ - bcm_wdt_writel(WDT_STOP_1, WDT_CTL_REG); - bcm_wdt_writel(WDT_STOP_2, WDT_CTL_REG); - - /* disable all hardware blocks clock for now */ - if (BCMCPU_IS_6338()) - mask = CKCTL_6338_ALL_SAFE_EN; - else if (BCMCPU_IS_6345()) - mask = CKCTL_6345_ALL_SAFE_EN; - else if (BCMCPU_IS_6348()) - mask = CKCTL_6348_ALL_SAFE_EN; - else - /* BCMCPU_IS_6358() */ - mask = CKCTL_6358_ALL_SAFE_EN; - - reg = bcm_perf_readl(PERF_CKCTL_REG); - reg &= ~mask; - bcm_perf_writel(reg, PERF_CKCTL_REG); - - /* assign command line from kernel config */ - strcpy(arcs_cmdline, CONFIG_CMDLINE); - - /* register gpiochip */ - bcm63xx_gpio_init(); - - /* do low level board init */ - board_prom_init(); -} - -void __init prom_free_prom_memory(void) -{ -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/setup.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/setup.c deleted file mode 100644 index 6d1ce6442..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/setup.c +++ /dev/null @@ -1,124 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -void bcm63xx_machine_halt(void) -{ - printk(KERN_INFO "System halted\n"); - while (1); -} - -static void bcm6348_a1_reboot(void) -{ - u32 reg; - - /* soft reset all blocks */ - printk(KERN_INFO "soft-reseting all blocks ...\n"); - reg = bcm_perf_readl(PERF_SOFTRESET_REG); - reg &= ~SOFTRESET_6348_ALL; - bcm_perf_writel(reg, PERF_SOFTRESET_REG); - mdelay(10); - - reg = bcm_perf_readl(PERF_SOFTRESET_REG); - reg |= SOFTRESET_6348_ALL; - bcm_perf_writel(reg, PERF_SOFTRESET_REG); - mdelay(10); - - /* Jump to the power on address. */ - printk(KERN_INFO "jumping to reset vector.\n"); - /* set high vectors (base at 0xbfc00000 */ - set_c0_status(ST0_BEV | ST0_ERL); - /* run uncached in kseg0 */ - change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED); - __flush_cache_all(); - /* remove all wired TLB entries */ - write_c0_wired(0); - __asm__ __volatile__( - "jr\t%0" - : - : "r" (0xbfc00000)); - while (1); -} - -void bcm63xx_machine_reboot(void) -{ - u32 reg; - - /* mask and clear all external irq */ - reg = bcm_perf_readl(PERF_EXTIRQ_CFG_REG); - reg &= ~EXTIRQ_CFG_MASK_ALL; - reg |= EXTIRQ_CFG_CLEAR_ALL; - bcm_perf_writel(reg, PERF_EXTIRQ_CFG_REG); - - if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() == 0xa1)) - bcm6348_a1_reboot(); - - printk(KERN_INFO "triggering watchdog soft-reset...\n"); - reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG); - reg |= SYS_PLL_SOFT_RESET; - bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG); - while (1); -} - -static void __bcm63xx_machine_reboot(char *p) -{ - bcm63xx_machine_reboot(); -} - -/* - * return system type in /proc/cpuinfo - */ -const char *get_system_type(void) -{ - static char buf[128]; - snprintf(buf, sizeof (buf), "bcm63xx/%s (0x%04x/0x%04X)", - board_get_name(), - bcm63xx_get_cpu_id(), bcm63xx_get_cpu_rev()); - return buf; -} - -void __init plat_time_init(void) -{ - mips_hpt_frequency = bcm63xx_get_cpu_freq() / 2; -} - -void __init plat_mem_setup(void) -{ - add_memory_region(0, bcm63xx_get_memory_size(), BOOT_MEM_RAM); - - _machine_halt = bcm63xx_machine_halt; - _machine_restart = __bcm63xx_machine_reboot; - pm_power_off = bcm63xx_machine_halt; - - set_io_port_base(0); - ioport_resource.start = 0; - ioport_resource.end = ~0; - - board_setup(); -} - -int __init bcm63xx_register_devices(void) -{ - return board_register_devices(); -} - -arch_initcall(bcm63xx_register_devices); diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/timer.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/timer.c deleted file mode 100644 index ba522bdcd..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/bcm63xx/timer.c +++ /dev/null @@ -1,205 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static DEFINE_SPINLOCK(timer_reg_lock); -static DEFINE_SPINLOCK(timer_data_lock); -static struct clk *periph_clk; - -static struct timer_data { - void (*cb)(void *); - void *data; -} timer_data[BCM63XX_TIMER_COUNT]; - -static irqreturn_t timer_interrupt(int irq, void *dev_id) -{ - u32 stat; - int i; - - spin_lock(&timer_reg_lock); - stat = bcm_timer_readl(TIMER_IRQSTAT_REG); - bcm_timer_writel(stat, TIMER_IRQSTAT_REG); - spin_unlock(&timer_reg_lock); - - for (i = 0; i < BCM63XX_TIMER_COUNT; i++) { - if (!(stat & TIMER_IRQSTAT_TIMER_CAUSE(i))) - continue; - - spin_lock(&timer_data_lock); - if (!timer_data[i].cb) { - spin_unlock(&timer_data_lock); - continue; - } - - timer_data[i].cb(timer_data[i].data); - spin_unlock(&timer_data_lock); - } - - return IRQ_HANDLED; -} - -int bcm63xx_timer_enable(int id) -{ - u32 reg; - unsigned long flags; - - if (id >= BCM63XX_TIMER_COUNT) - return -EINVAL; - - spin_lock_irqsave(&timer_reg_lock, flags); - - reg = bcm_timer_readl(TIMER_CTLx_REG(id)); - reg |= TIMER_CTL_ENABLE_MASK; - bcm_timer_writel(reg, TIMER_CTLx_REG(id)); - - reg = bcm_timer_readl(TIMER_IRQSTAT_REG); - reg |= TIMER_IRQSTAT_TIMER_IR_EN(id); - bcm_timer_writel(reg, TIMER_IRQSTAT_REG); - - spin_unlock_irqrestore(&timer_reg_lock, flags); - return 0; -} - -EXPORT_SYMBOL(bcm63xx_timer_enable); - -int bcm63xx_timer_disable(int id) -{ - u32 reg; - unsigned long flags; - - if (id >= BCM63XX_TIMER_COUNT) - return -EINVAL; - - spin_lock_irqsave(&timer_reg_lock, flags); - - reg = bcm_timer_readl(TIMER_CTLx_REG(id)); - reg &= ~TIMER_CTL_ENABLE_MASK; - bcm_timer_writel(reg, TIMER_CTLx_REG(id)); - - reg = bcm_timer_readl(TIMER_IRQSTAT_REG); - reg &= ~TIMER_IRQSTAT_TIMER_IR_EN(id); - bcm_timer_writel(reg, TIMER_IRQSTAT_REG); - - spin_unlock_irqrestore(&timer_reg_lock, flags); - return 0; -} - -EXPORT_SYMBOL(bcm63xx_timer_disable); - -int bcm63xx_timer_register(int id, void (*callback)(void *data), void *data) -{ - unsigned long flags; - int ret; - - if (id >= BCM63XX_TIMER_COUNT || !callback) - return -EINVAL; - - ret = 0; - spin_lock_irqsave(&timer_data_lock, flags); - if (timer_data[id].cb) { - ret = -EBUSY; - goto out; - } - - timer_data[id].cb = callback; - timer_data[id].data = data; - -out: - spin_unlock_irqrestore(&timer_data_lock, flags); - return ret; -} - -EXPORT_SYMBOL(bcm63xx_timer_register); - -void bcm63xx_timer_unregister(int id) -{ - unsigned long flags; - - if (id >= BCM63XX_TIMER_COUNT) - return; - - spin_lock_irqsave(&timer_data_lock, flags); - timer_data[id].cb = NULL; - spin_unlock_irqrestore(&timer_data_lock, flags); -} - -EXPORT_SYMBOL(bcm63xx_timer_unregister); - -unsigned int bcm63xx_timer_countdown(unsigned int countdown_us) -{ - return (clk_get_rate(periph_clk) / (1000 * 1000)) * countdown_us; -} - -EXPORT_SYMBOL(bcm63xx_timer_countdown); - -int bcm63xx_timer_set(int id, int monotonic, unsigned int countdown_us) -{ - u32 reg, countdown; - unsigned long flags; - - if (id >= BCM63XX_TIMER_COUNT) - return -EINVAL; - - countdown = bcm63xx_timer_countdown(countdown_us); - if (countdown & ~TIMER_CTL_COUNTDOWN_MASK) - return -EINVAL; - - spin_lock_irqsave(&timer_reg_lock, flags); - reg = bcm_timer_readl(TIMER_CTLx_REG(id)); - - if (monotonic) - reg &= ~TIMER_CTL_MONOTONIC_MASK; - else - reg |= TIMER_CTL_MONOTONIC_MASK; - - reg &= ~TIMER_CTL_COUNTDOWN_MASK; - reg |= countdown; - bcm_timer_writel(reg, TIMER_CTLx_REG(id)); - - spin_unlock_irqrestore(&timer_reg_lock, flags); - return 0; -} - -EXPORT_SYMBOL(bcm63xx_timer_set); - -int bcm63xx_timer_init(void) -{ - int ret, irq; - u32 reg; - - reg = bcm_timer_readl(TIMER_IRQSTAT_REG); - reg &= ~TIMER_IRQSTAT_TIMER0_IR_EN; - reg &= ~TIMER_IRQSTAT_TIMER1_IR_EN; - reg &= ~TIMER_IRQSTAT_TIMER2_IR_EN; - bcm_timer_writel(reg, TIMER_IRQSTAT_REG); - - periph_clk = clk_get(NULL, "periph"); - if (IS_ERR(periph_clk)) - return -ENODEV; - - irq = bcm63xx_get_irq_number(IRQ_TIMER); - ret = request_irq(irq, timer_interrupt, 0, "bcm63xx_timer", NULL); - if (ret) { - printk(KERN_ERR "bcm63xx_timer: failed to register irq\n"); - return ret; - } - - return 0; -} - -arch_initcall(bcm63xx_timer_init); diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/configs/bcm63xx_defconfig b/target/linux/brcm63xx/files-2.6.30/arch/mips/configs/bcm63xx_defconfig deleted file mode 100644 index 65cacae63..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/configs/bcm63xx_defconfig +++ /dev/null @@ -1,868 +0,0 @@ -# -# Automatically generated make config: don't edit -# Linux kernel version: 2.6.27 -# Fri Oct 17 06:51:37 2008 -# -CONFIG_MIPS=y - -# -# Machine selection -# -# CONFIG_MACH_ALCHEMY is not set -# CONFIG_BASLER_EXCITE is not set -# CONFIG_BCM47XX is not set -CONFIG_BCM63XX=y -# CONFIG_MIPS_COBALT is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_LASAT is not set -# CONFIG_LEMOTE_FULONG is not set -# CONFIG_MIPS_MALTA is not set -# CONFIG_MIPS_SIM is not set -# CONFIG_MARKEINS is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_PMC_MSP is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SNI_RM is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MIKROTIK_RB532 is not set -# CONFIG_WR_PPMC is not set - -# -# CPU support -# -CONFIG_BCM63XX_CPU_6348=y -CONFIG_BCM63XX_CPU_6358=y -CONFIG_BOARD_BCM963XX=y -CONFIG_RWSEM_GENERIC_SPINLOCK=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HWEIGHT=y -CONFIG_GENERIC_CALIBRATE_DELAY=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_TIME=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y -# CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set -CONFIG_CEVT_R4K=y -CONFIG_CSRC_R4K=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_EARLY_PRINTK=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -# CONFIG_HOTPLUG_CPU is not set -# CONFIG_NO_IOPORT is not set -CONFIG_GENERIC_GPIO=y -CONFIG_CPU_BIG_ENDIAN=y -# CONFIG_CPU_LITTLE_ENDIAN is not set -CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y -CONFIG_IRQ_CPU=y -CONFIG_SWAP_IO_SPACE=y -CONFIG_MIPS_L1_CACHE_SHIFT=5 - -# -# CPU selection -# -# CONFIG_CPU_LOONGSON2 is not set -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_VR41XX is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPSR1=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y - -# -# Kernel type -# -CONFIG_32BIT=y -# CONFIG_64BIT is not set -CONFIG_PAGE_SIZE_4KB=y -# CONFIG_PAGE_SIZE_8KB is not set -# CONFIG_PAGE_SIZE_16KB is not set -# CONFIG_PAGE_SIZE_64KB is not set -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_GENERIC_HARDIRQS=y -CONFIG_GENERIC_IRQ_PROBE=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -CONFIG_ARCH_FLATMEM_ENABLE=y -CONFIG_ARCH_POPULATES_NODE_MAP=y -CONFIG_SELECT_MEMORY_MODEL=y -CONFIG_FLATMEM_MANUAL=y -# CONFIG_DISCONTIGMEM_MANUAL is not set -# CONFIG_SPARSEMEM_MANUAL is not set -CONFIG_FLATMEM=y -CONFIG_FLAT_NODE_MEM_MAP=y -# CONFIG_SPARSEMEM_STATIC is not set -# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_SPLIT_PTLOCK_CPUS=4 -# CONFIG_RESOURCES_64BIT is not set -CONFIG_ZONE_DMA_FLAG=0 -CONFIG_VIRT_TO_BUS=y -CONFIG_TICK_ONESHOT=y -CONFIG_NO_HZ=y -# CONFIG_HIGH_RES_TIMERS is not set -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -# CONFIG_HZ_48 is not set -# CONFIG_HZ_100 is not set -# CONFIG_HZ_128 is not set -CONFIG_HZ_250=y -# CONFIG_HZ_256 is not set -# CONFIG_HZ_1000 is not set -# CONFIG_HZ_1024 is not set -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_HZ=250 -CONFIG_PREEMPT_NONE=y -# CONFIG_PREEMPT_VOLUNTARY is not set -# CONFIG_PREEMPT is not set -# CONFIG_KEXEC is not set -# CONFIG_SECCOMP is not set -CONFIG_LOCKDEP_SUPPORT=y -CONFIG_STACKTRACE_SUPPORT=y -CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" - -# -# General setup -# -CONFIG_EXPERIMENTAL=y -CONFIG_BROKEN_ON_SMP=y -CONFIG_INIT_ENV_ARG_LIMIT=32 -CONFIG_LOCALVERSION="" -# CONFIG_LOCALVERSION_AUTO is not set -# CONFIG_SWAP is not set -# CONFIG_SYSVIPC is not set -# CONFIG_POSIX_MQUEUE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_TASKSTATS is not set -# CONFIG_AUDIT is not set -# CONFIG_IKCONFIG is not set -CONFIG_LOG_BUF_SHIFT=17 -# CONFIG_CGROUPS is not set -# CONFIG_GROUP_SCHED is not set -CONFIG_SYSFS_DEPRECATED=y -CONFIG_SYSFS_DEPRECATED_V2=y -# CONFIG_RELAY is not set -# CONFIG_NAMESPACES is not set -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_SYSCTL=y -CONFIG_EMBEDDED=y -CONFIG_SYSCTL_SYSCALL=y -CONFIG_KALLSYMS=y -# CONFIG_KALLSYMS_EXTRA_PASS is not set -CONFIG_HOTPLUG=y -CONFIG_PRINTK=y -CONFIG_BUG=y -CONFIG_ELF_CORE=y -# CONFIG_PCSPKR_PLATFORM is not set -CONFIG_COMPAT_BRK=y -CONFIG_BASE_FULL=y -# CONFIG_FUTEX is not set -# CONFIG_EPOLL is not set -# CONFIG_SIGNALFD is not set -# CONFIG_TIMERFD is not set -# CONFIG_EVENTFD is not set -# CONFIG_SHMEM is not set -# CONFIG_VM_EVENT_COUNTERS is not set -# CONFIG_SLUB_DEBUG is not set -# CONFIG_SLAB is not set -CONFIG_SLUB=y -# CONFIG_SLOB is not set -# CONFIG_PROFILING is not set -# CONFIG_MARKERS is not set -CONFIG_HAVE_OPROFILE=y -# CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS is not set -# CONFIG_HAVE_IOREMAP_PROT is not set -# CONFIG_HAVE_KPROBES is not set -# CONFIG_HAVE_KRETPROBES is not set -# CONFIG_HAVE_ARCH_TRACEHOOK is not set -# CONFIG_HAVE_DMA_ATTRS is not set -# CONFIG_USE_GENERIC_SMP_HELPERS is not set -# CONFIG_HAVE_CLK is not set -CONFIG_PROC_PAGE_MONITOR=y -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_TINY_SHMEM=y -CONFIG_BASE_SMALL=0 -# CONFIG_MODULES is not set -CONFIG_BLOCK=y -# CONFIG_LBD is not set -# CONFIG_BLK_DEV_IO_TRACE is not set -# CONFIG_LSF is not set -# CONFIG_BLK_DEV_BSG is not set -# CONFIG_BLK_DEV_INTEGRITY is not set - -# -# IO Schedulers -# -CONFIG_IOSCHED_NOOP=y -# CONFIG_IOSCHED_AS is not set -# CONFIG_IOSCHED_DEADLINE is not set -# CONFIG_IOSCHED_CFQ is not set -# CONFIG_DEFAULT_AS is not set -# CONFIG_DEFAULT_DEADLINE is not set -# CONFIG_DEFAULT_CFQ is not set -CONFIG_DEFAULT_NOOP=y -CONFIG_DEFAULT_IOSCHED="noop" -CONFIG_CLASSIC_RCU=y - -# -# Bus options (PCI, PCMCIA, EISA, ISA, TC) -# -CONFIG_HW_HAS_PCI=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -# CONFIG_PCI_LEGACY is not set -CONFIG_MMU=y -CONFIG_PCCARD=y -# CONFIG_PCMCIA_DEBUG is not set -CONFIG_PCMCIA=y -CONFIG_PCMCIA_LOAD_CIS=y -CONFIG_PCMCIA_IOCTL=y -CONFIG_CARDBUS=y - -# -# PC-card bridges -# -# CONFIG_YENTA is not set -# CONFIG_PD6729 is not set -# CONFIG_I82092 is not set -CONFIG_PCMCIA_BCM63XX=y -# CONFIG_HOTPLUG_PCI is not set - -# -# Executable file formats -# -CONFIG_BINFMT_ELF=y -# CONFIG_BINFMT_MISC is not set -CONFIG_TRAD_SIGNALS=y - -# -# Power management options -# -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# CONFIG_PM is not set -CONFIG_NET=y - -# -# Networking options -# -# CONFIG_PACKET is not set -CONFIG_UNIX=y -# CONFIG_NET_KEY is not set -CONFIG_INET=y -# CONFIG_IP_MULTICAST is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -CONFIG_IP_FIB_HASH=y -# CONFIG_IP_PNP is not set -# CONFIG_NET_IPIP is not set -# CONFIG_NET_IPGRE is not set -# CONFIG_ARPD is not set -# CONFIG_SYN_COOKIES is not set -# CONFIG_INET_AH is not set -# CONFIG_INET_ESP is not set -# CONFIG_INET_IPCOMP is not set -# CONFIG_INET_XFRM_TUNNEL is not set -# CONFIG_INET_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_TRANSPORT is not set -# CONFIG_INET_XFRM_MODE_TUNNEL is not set -# CONFIG_INET_XFRM_MODE_BEET is not set -# CONFIG_INET_LRO is not set -# CONFIG_INET_DIAG is not set -# CONFIG_TCP_CONG_ADVANCED is not set -CONFIG_TCP_CONG_CUBIC=y -CONFIG_DEFAULT_TCP_CONG="cubic" -# CONFIG_TCP_MD5SIG is not set -# CONFIG_IPV6 is not set -# CONFIG_NETWORK_SECMARK is not set -# CONFIG_NETFILTER is not set -# CONFIG_IP_DCCP is not set -# CONFIG_IP_SCTP is not set -# CONFIG_TIPC is not set -# CONFIG_ATM is not set -# CONFIG_BRIDGE is not set -# CONFIG_VLAN_8021Q is not set -# CONFIG_DECNET is not set -# CONFIG_LLC2 is not set -# CONFIG_IPX is not set -# CONFIG_ATALK is not set -# CONFIG_X25 is not set -# CONFIG_LAPB is not set -# CONFIG_ECONET is not set -# CONFIG_WAN_ROUTER is not set -# CONFIG_NET_SCHED is not set - -# -# Network testing -# -# CONFIG_NET_PKTGEN is not set -# CONFIG_HAMRADIO is not set -# CONFIG_CAN is not set -# CONFIG_IRDA is not set -# CONFIG_BT is not set -# CONFIG_AF_RXRPC is not set - -# -# Wireless -# -# CONFIG_CFG80211 is not set -# CONFIG_WIRELESS_EXT is not set -# CONFIG_MAC80211 is not set -# CONFIG_IEEE80211 is not set -# CONFIG_RFKILL is not set -# CONFIG_NET_9P is not set - -# -# Device Drivers -# - -# -# Generic Driver Options -# -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" -# CONFIG_STANDALONE is not set -# CONFIG_PREVENT_FIRMWARE_BUILD is not set -CONFIG_FW_LOADER=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_EXTRA_FIRMWARE="" -# CONFIG_SYS_HYPERVISOR is not set -# CONFIG_CONNECTOR is not set -CONFIG_MTD=y -# CONFIG_MTD_DEBUG is not set -# CONFIG_MTD_CONCAT is not set -CONFIG_MTD_PARTITIONS=y -# CONFIG_MTD_REDBOOT_PARTS is not set -# CONFIG_MTD_CMDLINE_PARTS is not set -# CONFIG_MTD_AR7_PARTS is not set - -# -# User Modules And Translation Layers -# -# CONFIG_MTD_CHAR is not set -# CONFIG_MTD_BLKDEVS is not set -# CONFIG_MTD_BLOCK is not set -# CONFIG_MTD_BLOCK_RO is not set -# CONFIG_FTL is not set -# CONFIG_NFTL is not set -# CONFIG_INFTL is not set -# CONFIG_RFD_FTL is not set -# CONFIG_SSFDC is not set -# CONFIG_MTD_OOPS is not set - -# -# RAM/ROM/Flash chip drivers -# -CONFIG_MTD_CFI=y -# CONFIG_MTD_JEDECPROBE is not set -CONFIG_MTD_GEN_PROBE=y -# CONFIG_MTD_CFI_ADV_OPTIONS is not set -CONFIG_MTD_MAP_BANK_WIDTH_1=y -CONFIG_MTD_MAP_BANK_WIDTH_2=y -CONFIG_MTD_MAP_BANK_WIDTH_4=y -# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set -# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set -CONFIG_MTD_CFI_I1=y -CONFIG_MTD_CFI_I2=y -# CONFIG_MTD_CFI_I4 is not set -# CONFIG_MTD_CFI_I8 is not set -CONFIG_MTD_CFI_INTELEXT=y -CONFIG_MTD_CFI_AMDSTD=y -# CONFIG_MTD_CFI_STAA is not set -CONFIG_MTD_CFI_UTIL=y -# CONFIG_MTD_RAM is not set -# CONFIG_MTD_ROM is not set -# CONFIG_MTD_ABSENT is not set - -# -# Mapping drivers for chip access -# -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_PHYSMAP=y -CONFIG_MTD_PHYSMAP_START=0x8000000 -CONFIG_MTD_PHYSMAP_LEN=0 -CONFIG_MTD_PHYSMAP_BANKWIDTH=2 -# CONFIG_MTD_INTEL_VR_NOR is not set -# CONFIG_MTD_PLATRAM is not set - -# -# Self-contained MTD device drivers -# -# CONFIG_MTD_PMC551 is not set -# CONFIG_MTD_SLRAM is not set -# CONFIG_MTD_PHRAM is not set -# CONFIG_MTD_MTDRAM is not set -# CONFIG_MTD_BLOCK2MTD is not set - -# -# Disk-On-Chip Device Drivers -# -# CONFIG_MTD_DOC2000 is not set -# CONFIG_MTD_DOC2001 is not set -# CONFIG_MTD_DOC2001PLUS is not set -# CONFIG_MTD_NAND is not set -# CONFIG_MTD_ONENAND is not set - -# -# UBI - Unsorted block images -# -# CONFIG_MTD_UBI is not set -# CONFIG_PARPORT is not set -# CONFIG_BLK_DEV is not set -# CONFIG_MISC_DEVICES is not set -CONFIG_HAVE_IDE=y -# CONFIG_IDE is not set - -# -# SCSI device support -# -# CONFIG_RAID_ATTRS is not set -# CONFIG_SCSI is not set -# CONFIG_SCSI_DMA is not set -# CONFIG_SCSI_NETLINK is not set -# CONFIG_ATA is not set -# CONFIG_MD is not set -# CONFIG_FUSION is not set - -# -# IEEE 1394 (FireWire) support -# - -# -# Enable only one of the two stacks, unless you know what you are doing -# -# CONFIG_FIREWIRE is not set -# CONFIG_IEEE1394 is not set -# CONFIG_I2O is not set -CONFIG_NETDEVICES=y -# CONFIG_DUMMY is not set -# CONFIG_BONDING is not set -# CONFIG_MACVLAN is not set -# CONFIG_EQUALIZER is not set -# CONFIG_TUN is not set -# CONFIG_VETH is not set -# CONFIG_ARCNET is not set -CONFIG_PHYLIB=y - -# -# MII PHY device drivers -# -# CONFIG_MARVELL_PHY is not set -# CONFIG_DAVICOM_PHY is not set -# CONFIG_QSEMI_PHY is not set -# CONFIG_LXT_PHY is not set -# CONFIG_CICADA_PHY is not set -# CONFIG_VITESSE_PHY is not set -# CONFIG_SMSC_PHY is not set -# CONFIG_BROADCOM_PHY is not set -CONFIG_BCM63XX_PHY=y -# CONFIG_ICPLUS_PHY is not set -# CONFIG_REALTEK_PHY is not set -# CONFIG_FIXED_PHY is not set -# CONFIG_MDIO_BITBANG is not set -CONFIG_NET_ETHERNET=y -CONFIG_MII=y -# CONFIG_AX88796 is not set -# CONFIG_HAPPYMEAL is not set -# CONFIG_SUNGEM is not set -# CONFIG_CASSINI is not set -# CONFIG_NET_VENDOR_3COM is not set -# CONFIG_DM9000 is not set -# CONFIG_NET_TULIP is not set -# CONFIG_HP100 is not set -# CONFIG_IBM_NEW_EMAC_ZMII is not set -# CONFIG_IBM_NEW_EMAC_RGMII is not set -# CONFIG_IBM_NEW_EMAC_TAH is not set -# CONFIG_IBM_NEW_EMAC_EMAC4 is not set -# CONFIG_NET_PCI is not set -# CONFIG_B44 is not set -CONFIG_BCM63XX_ENET=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NETDEV_10000 is not set -# CONFIG_TR is not set - -# -# Wireless LAN -# -# CONFIG_WLAN_PRE80211 is not set -# CONFIG_WLAN_80211 is not set -# CONFIG_IWLWIFI_LEDS is not set - -# -# USB Network Adapters -# -# CONFIG_USB_CATC is not set -# CONFIG_USB_KAWETH is not set -# CONFIG_USB_PEGASUS is not set -# CONFIG_USB_RTL8150 is not set -# CONFIG_USB_USBNET is not set -# CONFIG_NET_PCMCIA is not set -# CONFIG_WAN is not set -# CONFIG_FDDI is not set -# CONFIG_HIPPI is not set -# CONFIG_PPP is not set -# CONFIG_SLIP is not set -# CONFIG_NETCONSOLE is not set -# CONFIG_NETPOLL is not set -# CONFIG_NET_POLL_CONTROLLER is not set -# CONFIG_ISDN is not set -# CONFIG_PHONE is not set - -# -# Input device support -# -# CONFIG_INPUT is not set - -# -# Hardware I/O ports -# -# CONFIG_SERIO is not set -# CONFIG_GAMEPORT is not set - -# -# Character devices -# -# CONFIG_VT is not set -# CONFIG_DEVKMEM is not set -# CONFIG_SERIAL_NONSTANDARD is not set -# CONFIG_NOZOMI is not set - -# -# Serial drivers -# -# CONFIG_SERIAL_8250 is not set - -# -# Non-8250 serial port support -# -CONFIG_SERIAL_CORE=y -CONFIG_SERIAL_CORE_CONSOLE=y -# CONFIG_SERIAL_JSM is not set -CONFIG_SERIAL_BCM63XX=y -CONFIG_SERIAL_BCM63XX_CONSOLE=y -# CONFIG_UNIX98_PTYS is not set -CONFIG_LEGACY_PTYS=y -CONFIG_LEGACY_PTY_COUNT=256 -# CONFIG_IPMI_HANDLER is not set -# CONFIG_HW_RANDOM is not set -# CONFIG_R3964 is not set -# CONFIG_APPLICOM is not set - -# -# PCMCIA character devices -# -# CONFIG_SYNCLINK_CS is not set -# CONFIG_CARDMAN_4000 is not set -# CONFIG_CARDMAN_4040 is not set -# CONFIG_IPWIRELESS is not set -# CONFIG_RAW_DRIVER is not set -# CONFIG_TCG_TPM is not set -CONFIG_DEVPORT=y -# CONFIG_I2C is not set -# CONFIG_SPI is not set -# CONFIG_W1 is not set -# CONFIG_POWER_SUPPLY is not set -# CONFIG_HWMON is not set -# CONFIG_THERMAL is not set -# CONFIG_THERMAL_HWMON is not set -# CONFIG_WATCHDOG is not set - -# -# Sonics Silicon Backplane -# -CONFIG_SSB_POSSIBLE=y -# CONFIG_SSB is not set - -# -# Multifunction device drivers -# -# CONFIG_MFD_CORE is not set -# CONFIG_MFD_SM501 is not set -# CONFIG_HTC_PASIC3 is not set -# CONFIG_MFD_TMIO is not set - -# -# Multimedia devices -# - -# -# Multimedia core support -# -# CONFIG_VIDEO_DEV is not set -# CONFIG_DVB_CORE is not set -# CONFIG_VIDEO_MEDIA is not set - -# -# Multimedia drivers -# -# CONFIG_DAB is not set - -# -# Graphics support -# -# CONFIG_DRM is not set -# CONFIG_VGASTATE is not set -# CONFIG_VIDEO_OUTPUT_CONTROL is not set -# CONFIG_FB is not set -# CONFIG_BACKLIGHT_LCD_SUPPORT is not set - -# -# Display device support -# -CONFIG_DISPLAY_SUPPORT=y - -# -# Display hardware drivers -# -# CONFIG_SOUND is not set -CONFIG_USB_SUPPORT=y -CONFIG_USB_ARCH_HAS_HCD=y -CONFIG_USB_ARCH_HAS_OHCI=y -CONFIG_USB_ARCH_HAS_EHCI=y -CONFIG_USB=y -# CONFIG_USB_DEBUG is not set -# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set - -# -# Miscellaneous USB options -# -# CONFIG_USB_DEVICEFS is not set -# CONFIG_USB_DEVICE_CLASS is not set -# CONFIG_USB_DYNAMIC_MINORS is not set -# CONFIG_USB_OTG is not set -# CONFIG_USB_OTG_WHITELIST is not set -# CONFIG_USB_OTG_BLACKLIST_HUB is not set -# CONFIG_USB_MON is not set - -# -# USB Host Controller Drivers -# -# CONFIG_USB_C67X00_HCD is not set -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -# CONFIG_USB_EHCI_TT_NEWSCHED is not set -CONFIG_USB_EHCI_BIG_ENDIAN_MMIO=y -# CONFIG_USB_ISP116X_HCD is not set -# CONFIG_USB_ISP1760_HCD is not set -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y -CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y -CONFIG_USB_OHCI_LITTLE_ENDIAN=y -# CONFIG_USB_UHCI_HCD is not set -# CONFIG_USB_SL811_HCD is not set -# CONFIG_USB_R8A66597_HCD is not set - -# -# USB Device Class drivers -# -# CONFIG_USB_ACM is not set -# CONFIG_USB_PRINTER is not set -# CONFIG_USB_WDM is not set - -# -# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' -# - -# -# may also be needed; see USB_STORAGE Help for more information -# -# CONFIG_USB_LIBUSUAL is not set - -# -# USB Imaging devices -# -# CONFIG_USB_MDC800 is not set - -# -# USB port drivers -# -# CONFIG_USB_SERIAL is not set - -# -# USB Miscellaneous drivers -# -# CONFIG_USB_EMI62 is not set -# CONFIG_USB_EMI26 is not set -# CONFIG_USB_ADUTUX is not set -# CONFIG_USB_RIO500 is not set -# CONFIG_USB_LEGOTOWER is not set -# CONFIG_USB_LCD is not set -# CONFIG_USB_BERRY_CHARGE is not set -# CONFIG_USB_LED is not set -# CONFIG_USB_CYPRESS_CY7C63 is not set -# CONFIG_USB_CYTHERM is not set -# CONFIG_USB_PHIDGET is not set -# CONFIG_USB_IDMOUSE is not set -# CONFIG_USB_FTDI_ELAN is not set -# CONFIG_USB_APPLEDISPLAY is not set -# CONFIG_USB_SISUSBVGA is not set -# CONFIG_USB_LD is not set -# CONFIG_USB_TRANCEVIBRATOR is not set -# CONFIG_USB_IOWARRIOR is not set -# CONFIG_USB_ISIGHTFW is not set -# CONFIG_USB_GADGET is not set -# CONFIG_MMC is not set -# CONFIG_MEMSTICK is not set -# CONFIG_NEW_LEDS is not set -# CONFIG_ACCESSIBILITY is not set -# CONFIG_INFINIBAND is not set -CONFIG_RTC_LIB=y -# CONFIG_RTC_CLASS is not set -# CONFIG_DMADEVICES is not set -# CONFIG_UIO is not set - -# -# File systems -# -# CONFIG_EXT2_FS is not set -# CONFIG_EXT3_FS is not set -# CONFIG_EXT4DEV_FS is not set -# CONFIG_REISERFS_FS is not set -# CONFIG_JFS_FS is not set -# CONFIG_FS_POSIX_ACL is not set -# CONFIG_XFS_FS is not set -# CONFIG_OCFS2_FS is not set -# CONFIG_DNOTIFY is not set -# CONFIG_INOTIFY is not set -# CONFIG_QUOTA is not set -# CONFIG_AUTOFS_FS is not set -# CONFIG_AUTOFS4_FS is not set -# CONFIG_FUSE_FS is not set - -# -# CD-ROM/DVD Filesystems -# -# CONFIG_ISO9660_FS is not set -# CONFIG_UDF_FS is not set - -# -# DOS/FAT/NT Filesystems -# -# CONFIG_MSDOS_FS is not set -# CONFIG_VFAT_FS is not set -# CONFIG_NTFS_FS is not set - -# -# Pseudo filesystems -# -CONFIG_PROC_FS=y -CONFIG_PROC_KCORE=y -CONFIG_PROC_SYSCTL=y -CONFIG_SYSFS=y -CONFIG_TMPFS=y -# CONFIG_TMPFS_POSIX_ACL is not set -# CONFIG_HUGETLB_PAGE is not set -# CONFIG_CONFIGFS_FS is not set - -# -# Miscellaneous filesystems -# -# CONFIG_ADFS_FS is not set -# CONFIG_AFFS_FS is not set -# CONFIG_HFS_FS is not set -# CONFIG_HFSPLUS_FS is not set -# CONFIG_BEFS_FS is not set -# CONFIG_BFS_FS is not set -# CONFIG_EFS_FS is not set -# CONFIG_JFFS2_FS is not set -# CONFIG_CRAMFS is not set -# CONFIG_VXFS_FS is not set -# CONFIG_MINIX_FS is not set -# CONFIG_OMFS_FS is not set -# CONFIG_HPFS_FS is not set -# CONFIG_QNX4FS_FS is not set -# CONFIG_ROMFS_FS is not set -# CONFIG_SYSV_FS is not set -# CONFIG_UFS_FS is not set -# CONFIG_NETWORK_FILESYSTEMS is not set - -# -# Partition Types -# -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_MSDOS_PARTITION=y -# CONFIG_NLS is not set -# CONFIG_DLM is not set - -# -# Kernel hacking -# -CONFIG_TRACE_IRQFLAGS_SUPPORT=y -# CONFIG_PRINTK_TIME is not set -CONFIG_ENABLE_WARN_DEPRECATED=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FRAME_WARN=1024 -CONFIG_MAGIC_SYSRQ=y -# CONFIG_UNUSED_SYMBOLS is not set -# CONFIG_DEBUG_FS is not set -# CONFIG_HEADERS_CHECK is not set -# CONFIG_DEBUG_KERNEL is not set -# CONFIG_DEBUG_MEMORY_INIT is not set -CONFIG_SYSCTL_SYSCALL_CHECK=y -# CONFIG_SAMPLES is not set -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_CMDLINE="console=ttyS0,115200" - -# -# Security options -# -# CONFIG_KEYS is not set -# CONFIG_SECURITY is not set -# CONFIG_SECURITY_FILE_CAPABILITIES is not set -# CONFIG_CRYPTO is not set - -# -# Library routines -# -CONFIG_BITREVERSE=y -# CONFIG_GENERIC_FIND_FIRST_BIT is not set -# CONFIG_CRC_CCITT is not set -# CONFIG_CRC16 is not set -# CONFIG_CRC_T10DIF is not set -# CONFIG_CRC_ITU_T is not set -CONFIG_CRC32=y -# CONFIG_CRC7 is not set -# CONFIG_LIBCRC32C is not set -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAS_DMA=y diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/include/asm/mach-bcm63xx b/target/linux/brcm63xx/files-2.6.30/arch/mips/include/asm/mach-bcm63xx deleted file mode 120000 index 8482b2ecf..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/include/asm/mach-bcm63xx +++ /dev/null @@ -1 +0,0 @@ -../../../../include/asm-mips/mach-bcm63xx \ No newline at end of file diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/pci/fixup-bcm63xx.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/pci/fixup-bcm63xx.c deleted file mode 100644 index 340863009..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/pci/fixup-bcm63xx.c +++ /dev/null @@ -1,21 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include - -int pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) -{ - return bcm63xx_get_irq_number(IRQ_PCI); -} - -int pcibios_plat_dev_init(struct pci_dev *dev) -{ - return 0; -} diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/pci/ops-bcm63xx.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/pci/ops-bcm63xx.c deleted file mode 100644 index 822ae179b..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/pci/ops-bcm63xx.c +++ /dev/null @@ -1,467 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include -#include - -#include "pci-bcm63xx.h" - -/* - * swizzle 32bits data to return only the needed part - */ -static int postprocess_read(u32 data, int where, unsigned int size) -{ - u32 ret; - - ret = 0; - switch (size) { - case 1: - ret = (data >> ((where & 3) << 3)) & 0xff; - break; - case 2: - ret = (data >> ((where & 3) << 3)) & 0xffff; - break; - case 4: - ret = data; - break; - } - return ret; -} - -static int preprocess_write(u32 orig_data, u32 val, int where, - unsigned int size) -{ - u32 ret; - - ret = 0; - switch (size) { - case 1: - ret = (orig_data & ~(0xff << ((where & 3) << 3))) | - (val << ((where & 3) << 3)); - break; - case 2: - ret = (orig_data & ~(0xffff << ((where & 3) << 3))) | - (val << ((where & 3) << 3)); - break; - case 4: - ret = val; - break; - } - return ret; -} - -/* - * setup hardware for a configuration cycle with given parameters - */ -static int bcm63xx_setup_cfg_access(int type, unsigned int busn, - unsigned int devfn, int where) -{ - unsigned int slot, func, reg; - u32 val; - - slot = PCI_SLOT(devfn); - func = PCI_FUNC(devfn); - reg = where >> 2; - - /* sanity check */ - if (slot > (MPI_L2PCFG_DEVNUM_MASK >> MPI_L2PCFG_DEVNUM_SHIFT)) - return 1; - - if (func > (MPI_L2PCFG_FUNC_MASK >> MPI_L2PCFG_FUNC_SHIFT)) - return 1; - - if (reg > (MPI_L2PCFG_REG_MASK >> MPI_L2PCFG_REG_SHIFT)) - return 1; - - /* ok, setup config access */ - val = (reg << MPI_L2PCFG_REG_SHIFT); - val |= (func << MPI_L2PCFG_FUNC_SHIFT); - val |= (slot << MPI_L2PCFG_DEVNUM_SHIFT); - val |= MPI_L2PCFG_CFG_USEREG_MASK; - val |= MPI_L2PCFG_CFG_SEL_MASK; - /* type 0 cycle for local bus, type 1 cycle for anything else */ - if (type != 0) { - /* FIXME: how to specify bus ??? */ - val |= (1 << MPI_L2PCFG_CFG_TYPE_SHIFT); - } - bcm_mpi_writel(val, MPI_L2PCFG_REG); - - return 0; -} - -static int bcm63xx_do_cfg_read(int type, unsigned int busn, - unsigned int devfn, int where, int size, - u32 *val) -{ - u32 data; - - /* two phase cycle, first we write address, then read data at - * another location, caller already has a spinlock so no need - * to add one here */ - if (bcm63xx_setup_cfg_access(type, busn, devfn, where)) - return PCIBIOS_DEVICE_NOT_FOUND; - iob(); - data = le32_to_cpu(__raw_readl(pci_iospace_start)); - /* restore IO space normal behaviour */ - bcm_mpi_writel(0, MPI_L2PCFG_REG); - - *val = postprocess_read(data, where, size); - - return PCIBIOS_SUCCESSFUL; -} - -static int bcm63xx_do_cfg_write(int type, unsigned int busn, - unsigned int devfn, int where, int size, - u32 val) -{ - u32 data; - - /* two phase cycle, first we write address, then write data to - * another location, caller already has a spinlock so no need - * to add one here */ - if (bcm63xx_setup_cfg_access(type, busn, devfn, where)) - return PCIBIOS_DEVICE_NOT_FOUND; - iob(); - - data = le32_to_cpu(__raw_readl(pci_iospace_start)); - data = preprocess_write(data, val, where, size); - - __raw_writel(cpu_to_le32(data), pci_iospace_start); - wmb(); - /* no way to know the access is done, we have to wait */ - udelay(500); - /* restore IO space normal behaviour */ - bcm_mpi_writel(0, MPI_L2PCFG_REG); - - return PCIBIOS_SUCCESSFUL; -} - -static int bcm63xx_pci_read(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 *val) -{ - int type; - - type = bus->parent ? 1 : 0; - - if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL) - return PCIBIOS_DEVICE_NOT_FOUND; - - return bcm63xx_do_cfg_read(type, bus->number, devfn, - where, size, val); -} - -static int bcm63xx_pci_write(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 val) -{ - int type; - - type = bus->parent ? 1 : 0; - - if (type == 0 && PCI_SLOT(devfn) == CARDBUS_PCI_IDSEL) - return PCIBIOS_DEVICE_NOT_FOUND; - - return bcm63xx_do_cfg_write(type, bus->number, devfn, - where, size, val); -} - -struct pci_ops bcm63xx_pci_ops = { - .read = bcm63xx_pci_read, - .write = bcm63xx_pci_write -}; - -#ifdef CONFIG_CARDBUS -/* - * emulate configuration read access on a cardbus bridge - */ -#define FAKE_CB_BRIDGE_SLOT 0x1e - -static int fake_cb_bridge_bus_number = -1; - -static struct { - u16 pci_command; - u8 cb_latency; - u8 subordinate_busn; - u8 cardbus_busn; - u8 pci_busn; - int bus_assigned; - u16 bridge_control; - - u32 mem_base0; - u32 mem_limit0; - u32 mem_base1; - u32 mem_limit1; - - u32 io_base0; - u32 io_limit0; - u32 io_base1; - u32 io_limit1; -} fake_cb_bridge_regs; - -static int fake_cb_bridge_read(int where, int size, u32 *val) -{ - unsigned int reg; - u32 data; - - data = 0; - reg = where >> 2; - switch (reg) { - case (PCI_VENDOR_ID >> 2): - case (PCI_CB_SUBSYSTEM_VENDOR_ID >> 2): - /* create dummy vendor/device id from our cpu id */ - data = (bcm63xx_get_cpu_id() << 16) | PCI_VENDOR_ID_BROADCOM; - break; - - case (PCI_COMMAND >> 2): - data = (PCI_STATUS_DEVSEL_SLOW << 16); - data |= fake_cb_bridge_regs.pci_command; - break; - - case (PCI_CLASS_REVISION >> 2): - data = (PCI_CLASS_BRIDGE_CARDBUS << 16); - break; - - case (PCI_CACHE_LINE_SIZE >> 2): - data = (PCI_HEADER_TYPE_CARDBUS << 16); - break; - - case (PCI_INTERRUPT_LINE >> 2): - /* bridge control */ - data = (fake_cb_bridge_regs.bridge_control << 16); - /* pin:intA line:0xff */ - data |= (0x1 << 8) | 0xff; - break; - - case (PCI_CB_PRIMARY_BUS >> 2): - data = (fake_cb_bridge_regs.cb_latency << 24); - data |= (fake_cb_bridge_regs.subordinate_busn << 16); - data |= (fake_cb_bridge_regs.cardbus_busn << 8); - data |= fake_cb_bridge_regs.pci_busn; - break; - - case (PCI_CB_MEMORY_BASE_0 >> 2): - data = fake_cb_bridge_regs.mem_base0; - break; - - case (PCI_CB_MEMORY_LIMIT_0 >> 2): - data = fake_cb_bridge_regs.mem_limit0; - break; - - case (PCI_CB_MEMORY_BASE_1 >> 2): - data = fake_cb_bridge_regs.mem_base1; - break; - - case (PCI_CB_MEMORY_LIMIT_1 >> 2): - data = fake_cb_bridge_regs.mem_limit1; - break; - - case (PCI_CB_IO_BASE_0 >> 2): - /* | 1 for 32bits io support */ - data = fake_cb_bridge_regs.io_base0 | 0x1; - break; - - case (PCI_CB_IO_LIMIT_0 >> 2): - data = fake_cb_bridge_regs.io_limit0; - break; - - case (PCI_CB_IO_BASE_1 >> 2): - /* | 1 for 32bits io support */ - data = fake_cb_bridge_regs.io_base1 | 0x1; - break; - - case (PCI_CB_IO_LIMIT_1 >> 2): - data = fake_cb_bridge_regs.io_limit1; - break; - } - - *val = postprocess_read(data, where, size); - return PCIBIOS_SUCCESSFUL; -} - -/* - * emulate configuration write access on a cardbus bridge - */ -static int fake_cb_bridge_write(int where, int size, u32 val) -{ - unsigned int reg; - u32 data, tmp; - int ret; - - ret = fake_cb_bridge_read((where & ~0x3), 4, &data); - if (ret != PCIBIOS_SUCCESSFUL) - return ret; - - data = preprocess_write(data, val, where, size); - - reg = where >> 2; - switch (reg) { - case (PCI_COMMAND >> 2): - fake_cb_bridge_regs.pci_command = (data & 0xffff); - break; - - case (PCI_CB_PRIMARY_BUS >> 2): - fake_cb_bridge_regs.cb_latency = (data >> 24) & 0xff; - fake_cb_bridge_regs.subordinate_busn = (data >> 16) & 0xff; - fake_cb_bridge_regs.cardbus_busn = (data >> 8) & 0xff; - fake_cb_bridge_regs.pci_busn = data & 0xff; - if (fake_cb_bridge_regs.cardbus_busn) - fake_cb_bridge_regs.bus_assigned = 1; - break; - - case (PCI_INTERRUPT_LINE >> 2): - tmp = (data >> 16) & 0xffff; - /* disable memory prefetch support */ - tmp &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM0; - tmp &= ~PCI_CB_BRIDGE_CTL_PREFETCH_MEM1; - fake_cb_bridge_regs.bridge_control = tmp; - break; - - case (PCI_CB_MEMORY_BASE_0 >> 2): - fake_cb_bridge_regs.mem_base0 = data; - break; - - case (PCI_CB_MEMORY_LIMIT_0 >> 2): - fake_cb_bridge_regs.mem_limit0 = data; - break; - - case (PCI_CB_MEMORY_BASE_1 >> 2): - fake_cb_bridge_regs.mem_base1 = data; - break; - - case (PCI_CB_MEMORY_LIMIT_1 >> 2): - fake_cb_bridge_regs.mem_limit1 = data; - break; - - case (PCI_CB_IO_BASE_0 >> 2): - fake_cb_bridge_regs.io_base0 = data; - break; - - case (PCI_CB_IO_LIMIT_0 >> 2): - fake_cb_bridge_regs.io_limit0 = data; - break; - - case (PCI_CB_IO_BASE_1 >> 2): - fake_cb_bridge_regs.io_base1 = data; - break; - - case (PCI_CB_IO_LIMIT_1 >> 2): - fake_cb_bridge_regs.io_limit1 = data; - break; - } - - return PCIBIOS_SUCCESSFUL; -} - -static int bcm63xx_cb_read(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 *val) -{ - /* snoop access to slot 0x1e on root bus, we fake a cardbus - * bridge at this location */ - if (!bus->parent && PCI_SLOT(devfn) == FAKE_CB_BRIDGE_SLOT) { - fake_cb_bridge_bus_number = bus->number; - return fake_cb_bridge_read(where, size, val); - } - - /* a configuration cycle for the device behind the cardbus - * bridge is actually done as a type 0 cycle on the primary - * bus. This means that only one device can be on the cardbus - * bus */ - if (fake_cb_bridge_regs.bus_assigned && - bus->number == fake_cb_bridge_regs.cardbus_busn && - PCI_SLOT(devfn) == 0) - return bcm63xx_do_cfg_read(0, 0, - PCI_DEVFN(CARDBUS_PCI_IDSEL, 0), - where, size, val); - - return PCIBIOS_DEVICE_NOT_FOUND; -} - -static int bcm63xx_cb_write(struct pci_bus *bus, unsigned int devfn, - int where, int size, u32 val) -{ - if (!bus->parent && PCI_SLOT(devfn) == FAKE_CB_BRIDGE_SLOT) { - fake_cb_bridge_bus_number = bus->number; - return fake_cb_bridge_write(where, size, val); - } - - if (fake_cb_bridge_regs.bus_assigned && - bus->number == fake_cb_bridge_regs.cardbus_busn && - PCI_SLOT(devfn) == 0) - return bcm63xx_do_cfg_write(0, 0, - PCI_DEVFN(CARDBUS_PCI_IDSEL, 0), - where, size, val); - - return PCIBIOS_DEVICE_NOT_FOUND; -} - -struct pci_ops bcm63xx_cb_ops = { - .read = bcm63xx_cb_read, - .write = bcm63xx_cb_write, -}; - -/* - * only one IO window, so it cannot be shared by PCI and cardbus, use - * fixup to choose and detect unhandled configuration - */ -static void bcm63xx_fixup(struct pci_dev *dev) -{ - static int io_window = -1; - int i, found, new_io_window; - u32 val; - - /* look for any io resource */ - found = 0; - for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { - if (pci_resource_flags(dev, i) & IORESOURCE_IO) { - found = 1; - break; - } - } - - if (!found) - return; - - /* skip our fake bus with only cardbus bridge on it */ - if (dev->bus->number == fake_cb_bridge_bus_number) - return; - - /* find on which bus the device is */ - if (fake_cb_bridge_regs.bus_assigned && - dev->bus->number == fake_cb_bridge_regs.cardbus_busn && - PCI_SLOT(dev->devfn) == 0) - new_io_window = 1; - else - new_io_window = 0; - - if (new_io_window == io_window) - return; - - if (io_window != -1) { - printk(KERN_ERR "bcm63xx: both PCI and cardbus devices " - "need IO, which hardware cannot do\n"); - return; - } - - printk(KERN_INFO "bcm63xx: PCI IO window assigned to %s\n", - (new_io_window == 0) ? "PCI" : "cardbus"); - - val = bcm_mpi_readl(MPI_L2PIOREMAP_REG); - if (io_window) - val |= MPI_L2PREMAP_IS_CARDBUS_MASK; - else - val &= ~MPI_L2PREMAP_IS_CARDBUS_MASK; - bcm_mpi_writel(val, MPI_L2PIOREMAP_REG); - - io_window = new_io_window; -} - -DECLARE_PCI_FIXUP_ENABLE(PCI_ANY_ID, PCI_ANY_ID, bcm63xx_fixup); -#endif diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/pci/pci-bcm63xx.c b/target/linux/brcm63xx/files-2.6.30/arch/mips/pci/pci-bcm63xx.c deleted file mode 100644 index 601700dfd..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/pci/pci-bcm63xx.c +++ /dev/null @@ -1,222 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include - -#include "pci-bcm63xx.h" - -/* allow PCI to be disabled at runtime depending on board nvram - * configuration */ -int bcm63xx_pci_enabled = 0; - -static struct resource bcm_pci_mem_resource = { - .name = "bcm63xx PCI memory space", - .start = BCM_PCI_MEM_BASE_PA, - .end = BCM_PCI_MEM_END_PA, - .flags = IORESOURCE_MEM -}; - -static struct resource bcm_pci_io_resource = { - .name = "bcm63xx PCI IO space", - .start = BCM_PCI_IO_BASE_PA, -#ifdef CONFIG_CARDBUS - .end = BCM_PCI_IO_HALF_PA, -#else - .end = BCM_PCI_IO_END_PA, -#endif - .flags = IORESOURCE_IO -}; - -struct pci_controller bcm63xx_controller = { - .pci_ops = &bcm63xx_pci_ops, - .io_resource = &bcm_pci_io_resource, - .mem_resource = &bcm_pci_mem_resource, -}; - -/* - * We handle cardbus via a fake Cardbus bridge, memory and io spaces - * have to be clearly separated from PCI one since we have different - * memory decoder. - */ -#ifdef CONFIG_CARDBUS -static struct resource bcm_cb_mem_resource = { - .name = "bcm63xx Cardbus memory space", - .start = BCM_CB_MEM_BASE_PA, - .end = BCM_CB_MEM_END_PA, - .flags = IORESOURCE_MEM -}; - -static struct resource bcm_cb_io_resource = { - .name = "bcm63xx Cardbus IO space", - .start = BCM_PCI_IO_HALF_PA + 1, - .end = BCM_PCI_IO_END_PA, - .flags = IORESOURCE_IO -}; - -struct pci_controller bcm63xx_cb_controller = { - .pci_ops = &bcm63xx_cb_ops, - .io_resource = &bcm_cb_io_resource, - .mem_resource = &bcm_cb_mem_resource, -}; -#endif - -static u32 bcm63xx_int_cfg_readl(u32 reg) -{ - u32 tmp; - - tmp = reg & MPI_PCICFGCTL_CFGADDR_MASK; - tmp |= MPI_PCICFGCTL_WRITEEN_MASK; - bcm_mpi_writel(tmp, MPI_PCICFGCTL_REG); - iob(); - return bcm_mpi_readl(MPI_PCICFGDATA_REG); -} - -static void bcm63xx_int_cfg_writel(u32 val, u32 reg) -{ - u32 tmp; - - tmp = reg & MPI_PCICFGCTL_CFGADDR_MASK; - tmp |= MPI_PCICFGCTL_WRITEEN_MASK; - bcm_mpi_writel(tmp, MPI_PCICFGCTL_REG); - bcm_mpi_writel(val, MPI_PCICFGDATA_REG); -} - -void __iomem *pci_iospace_start; - -static int __init bcm63xx_pci_init(void) -{ - unsigned int mem_size; - u32 val; - - if (!BCMCPU_IS_6348() && !BCMCPU_IS_6358()) - return -ENODEV; - - if (!bcm63xx_pci_enabled) - return -ENODEV; - - /* - * configuration access are done through IO space, remap 4 - * first bytes to access it from CPU. - * - * this means that no io access from CPU should happen while - * we do a configuration cycle, but there's no way we can add - * a spinlock for each io access, so this is currently kind of - * broken on SMP. - */ - pci_iospace_start = ioremap_nocache(BCM_PCI_IO_BASE_PA, 4); - if (!pci_iospace_start) - return -ENOMEM; - - /* setup local bus to PCI access (PCI memory) */ - val = BCM_PCI_MEM_BASE_PA & MPI_L2P_BASE_MASK; - bcm_mpi_writel(val, MPI_L2PMEMBASE1_REG); - bcm_mpi_writel(~(BCM_PCI_MEM_SIZE - 1), MPI_L2PMEMRANGE1_REG); - bcm_mpi_writel(val | MPI_L2PREMAP_ENABLED_MASK, MPI_L2PMEMREMAP1_REG); - - /* set Cardbus IDSEL (type 0 cfg access on primary bus for - * this IDSEL will be done on Cardbus instead) */ - val = bcm_pcmcia_readl(PCMCIA_C1_REG); - val &= ~PCMCIA_C1_CBIDSEL_MASK; - val |= (CARDBUS_PCI_IDSEL << PCMCIA_C1_CBIDSEL_SHIFT); - bcm_pcmcia_writel(val, PCMCIA_C1_REG); - -#ifdef CONFIG_CARDBUS - /* setup local bus to PCI access (Cardbus memory) */ - val = BCM_CB_MEM_BASE_PA & MPI_L2P_BASE_MASK; - bcm_mpi_writel(val, MPI_L2PMEMBASE2_REG); - bcm_mpi_writel(~(BCM_CB_MEM_SIZE - 1), MPI_L2PMEMRANGE2_REG); - val |= MPI_L2PREMAP_ENABLED_MASK | MPI_L2PREMAP_IS_CARDBUS_MASK; - bcm_mpi_writel(val, MPI_L2PMEMREMAP2_REG); -#else - /* disable second access windows */ - bcm_mpi_writel(0, MPI_L2PMEMREMAP2_REG); -#endif - - /* setup local bus to PCI access (IO memory), we have only 1 - * IO window for both PCI and cardbus, but it cannot handle - * both at the same time, assume standard PCI for now, if - * cardbus card has IO zone, PCI fixup will change window to - * cardbus */ - val = BCM_PCI_IO_BASE_PA & MPI_L2P_BASE_MASK; - bcm_mpi_writel(val, MPI_L2PIOBASE_REG); - bcm_mpi_writel(~(BCM_PCI_IO_SIZE - 1), MPI_L2PIORANGE_REG); - bcm_mpi_writel(val | MPI_L2PREMAP_ENABLED_MASK, MPI_L2PIOREMAP_REG); - - /* enable PCI related GPIO pins */ - bcm_mpi_writel(MPI_LOCBUSCTL_EN_PCI_GPIO_MASK, MPI_LOCBUSCTL_REG); - - /* setup PCI to local bus access, used by PCI device to target - * local RAM while bus mastering */ - bcm63xx_int_cfg_writel(0, PCI_BASE_ADDRESS_3); - if (BCMCPU_IS_6358()) - val = MPI_SP0_REMAP_ENABLE_MASK; - else - val = 0; - bcm_mpi_writel(val, MPI_SP0_REMAP_REG); - - bcm63xx_int_cfg_writel(0x0, PCI_BASE_ADDRESS_4); - bcm_mpi_writel(0, MPI_SP1_REMAP_REG); - - mem_size = bcm63xx_get_memory_size(); - - /* 6348 before rev b0 exposes only 16 MB of RAM memory through - * PCI, throw a warning if we have more memory */ - if (BCMCPU_IS_6348() && (bcm63xx_get_cpu_rev() & 0xf0) == 0xa0) { - if (mem_size > (16 * 1024 * 1024)) - printk(KERN_WARNING "bcm63xx: this CPU " - "revision cannot handle more than 16MB " - "of RAM for PCI bus mastering\n"); - } else { - /* setup sp0 range to local RAM size */ - bcm_mpi_writel(~(mem_size - 1), MPI_SP0_RANGE_REG); - bcm_mpi_writel(0, MPI_SP1_RANGE_REG); - } - - /* change host bridge retry counter to infinite number of - * retry, needed for some broadcom wifi cards with Silicon - * Backplane bus where access to srom seems very slow */ - val = bcm63xx_int_cfg_readl(BCMPCI_REG_TIMERS); - val &= ~REG_TIMER_RETRY_MASK; - bcm63xx_int_cfg_writel(val, BCMPCI_REG_TIMERS); - - /* enable memory decoder and bus mastering */ - val = bcm63xx_int_cfg_readl(PCI_COMMAND); - val |= (PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER); - bcm63xx_int_cfg_writel(val, PCI_COMMAND); - - /* enable read prefetching & disable byte swapping for bus - * mastering transfers */ - val = bcm_mpi_readl(MPI_PCIMODESEL_REG); - val &= ~MPI_PCIMODESEL_BAR1_NOSWAP_MASK; - val &= ~MPI_PCIMODESEL_BAR2_NOSWAP_MASK; - val &= ~MPI_PCIMODESEL_PREFETCH_MASK; - val |= (8 << MPI_PCIMODESEL_PREFETCH_SHIFT); - bcm_mpi_writel(val, MPI_PCIMODESEL_REG); - - /* enable pci interrupt */ - val = bcm_mpi_readl(MPI_LOCINT_REG); - val |= MPI_LOCINT_MASK(MPI_LOCINT_EXT_PCI_INT); - bcm_mpi_writel(val, MPI_LOCINT_REG); - - register_pci_controller(&bcm63xx_controller); - -#ifdef CONFIG_CARDBUS - register_pci_controller(&bcm63xx_cb_controller); -#endif - - /* mark memory space used for IO mapping as reserved */ - request_mem_region(BCM_PCI_IO_BASE_PA, BCM_PCI_IO_SIZE, - "bcm63xx PCI IO space"); - return 0; -} - -arch_initcall(bcm63xx_pci_init); diff --git a/target/linux/brcm63xx/files-2.6.30/arch/mips/pci/pci-bcm63xx.h b/target/linux/brcm63xx/files-2.6.30/arch/mips/pci/pci-bcm63xx.h deleted file mode 100644 index a6e594ef3..000000000 --- a/target/linux/brcm63xx/files-2.6.30/arch/mips/pci/pci-bcm63xx.h +++ /dev/null @@ -1,27 +0,0 @@ -#ifndef PCI_BCM63XX_H_ -#define PCI_BCM63XX_H_ - -#include -#include -#include -#include - -/* - * Cardbus shares the PCI bus, but has no IDSEL, so a special id is - * reserved for it. If you have a standard PCI device at this id, you - * need to change the following definition. - */ -#define CARDBUS_PCI_IDSEL 0x8 - -/* - * defined in ops-bcm63xx.c - */ -extern struct pci_ops bcm63xx_pci_ops; -extern struct pci_ops bcm63xx_cb_ops; - -/* - * defined in pci-bcm63xx.c - */ -extern void __iomem *pci_iospace_start; - -#endif /* ! PCI_BCM63XX_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/drivers/mtd/maps/bcm963xx-flash.c b/target/linux/brcm63xx/files-2.6.30/drivers/mtd/maps/bcm963xx-flash.c deleted file mode 100644 index abb20b61f..000000000 --- a/target/linux/brcm63xx/files-2.6.30/drivers/mtd/maps/bcm963xx-flash.c +++ /dev/null @@ -1,399 +0,0 @@ -/* - * Copyright (C) 2006-2008 Florian Fainelli - * Mike Albon - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA - */ - -#include -#include -#include -#include -#include -#include -#include - -#include -#include - -#define BUSWIDTH 2 /* Buswidth */ -#define EXTENDED_SIZE 0xBFC00000 /* Extended flash address */ - -#define PFX KBUILD_MODNAME ": " - -extern int parse_redboot_partitions(struct mtd_info *master, struct mtd_partition **pparts, unsigned long fis_origin); -static struct mtd_partition *parsed_parts; - -static struct mtd_info *bcm963xx_mtd_info; - -static struct map_info bcm963xx_map = { - .name = "bcm963xx", - .bankwidth = BUSWIDTH, -}; - -static struct tagiddesc_t tagidtab[NUM_TAGID] = TAGID_DEFINITIONS; - -static uint32_t tagcrc32tab[256] = { - 0x00000000, 0x77073096, 0xEE0E612C, 0x990951BA, 0x076DC419, 0x706AF48F, 0xE963A535, 0x9E6495A3, - 0x0EDB8832, 0x79DCB8A4, 0xE0D5E91E, 0x97D2D988, 0x09B64C2B, 0x7EB17CBD, 0xE7B82D07, 0x90BF1D91, - 0x1DB71064, 0x6AB020F2, 0xF3B97148, 0x84BE41DE, 0x1ADAD47D, 0x6DDDE4EB, 0xF4D4B551, 0x83D385C7, - 0x136C9856, 0x646BA8C0, 0xFD62F97A, 0x8A65C9EC, 0x14015C4F, 0x63066CD9, 0xFA0F3D63, 0x8D080DF5, - 0x3B6E20C8, 0x4C69105E, 0xD56041E4, 0xA2677172, 0x3C03E4D1, 0x4B04D447, 0xD20D85FD, 0xA50AB56B, - 0x35B5A8FA, 0x42B2986C, 0xDBBBC9D6, 0xACBCF940, 0x32D86CE3, 0x45DF5C75, 0xDCD60DCF, 0xABD13D59, - 0x26D930AC, 0x51DE003A, 0xC8D75180, 0xBFD06116, 0x21B4F4B5, 0x56B3C423, 0xCFBA9599, 0xB8BDA50F, - 0x2802B89E, 0x5F058808, 0xC60CD9B2, 0xB10BE924, 0x2F6F7C87, 0x58684C11, 0xC1611DAB, 0xB6662D3D, - 0x76DC4190, 0x01DB7106, 0x98D220BC, 0xEFD5102A, 0x71B18589, 0x06B6B51F, 0x9FBFE4A5, 0xE8B8D433, - 0x7807C9A2, 0x0F00F934, 0x9609A88E, 0xE10E9818, 0x7F6A0DBB, 0x086D3D2D, 0x91646C97, 0xE6635C01, - 0x6B6B51F4, 0x1C6C6162, 0x856530D8, 0xF262004E, 0x6C0695ED, 0x1B01A57B, 0x8208F4C1, 0xF50FC457, - 0x65B0D9C6, 0x12B7E950, 0x8BBEB8EA, 0xFCB9887C, 0x62DD1DDF, 0x15DA2D49, 0x8CD37CF3, 0xFBD44C65, - 0x4DB26158, 0x3AB551CE, 0xA3BC0074, 0xD4BB30E2, 0x4ADFA541, 0x3DD895D7, 0xA4D1C46D, 0xD3D6F4FB, - 0x4369E96A, 0x346ED9FC, 0xAD678846, 0xDA60B8D0, 0x44042D73, 0x33031DE5, 0xAA0A4C5F, 0xDD0D7CC9, - 0x5005713C, 0x270241AA, 0xBE0B1010, 0xC90C2086, 0x5768B525, 0x206F85B3, 0xB966D409, 0xCE61E49F, - 0x5EDEF90E, 0x29D9C998, 0xB0D09822, 0xC7D7A8B4, 0x59B33D17, 0x2EB40D81, 0xB7BD5C3B, 0xC0BA6CAD, - 0xEDB88320, 0x9ABFB3B6, 0x03B6E20C, 0x74B1D29A, 0xEAD54739, 0x9DD277AF, 0x04DB2615, 0x73DC1683, - 0xE3630B12, 0x94643B84, 0x0D6D6A3E, 0x7A6A5AA8, 0xE40ECF0B, 0x9309FF9D, 0x0A00AE27, 0x7D079EB1, - 0xF00F9344, 0x8708A3D2, 0x1E01F268, 0x6906C2FE, 0xF762575D, 0x806567CB, 0x196C3671, 0x6E6B06E7, - 0xFED41B76, 0x89D32BE0, 0x10DA7A5A, 0x67DD4ACC, 0xF9B9DF6F, 0x8EBEEFF9, 0x17B7BE43, 0x60B08ED5, - 0xD6D6A3E8, 0xA1D1937E, 0x38D8C2C4, 0x4FDFF252, 0xD1BB67F1, 0xA6BC5767, 0x3FB506DD, 0x48B2364B, - 0xD80D2BDA, 0xAF0A1B4C, 0x36034AF6, 0x41047A60, 0xDF60EFC3, 0xA867DF55, 0x316E8EEF, 0x4669BE79, - 0xCB61B38C, 0xBC66831A, 0x256FD2A0, 0x5268E236, 0xCC0C7795, 0xBB0B4703, 0x220216B9, 0x5505262F, - 0xC5BA3BBE, 0xB2BD0B28, 0x2BB45A92, 0x5CB36A04, 0xC2D7FFA7, 0xB5D0CF31, 0x2CD99E8B, 0x5BDEAE1D, - 0x9B64C2B0, 0xEC63F226, 0x756AA39C, 0x026D930A, 0x9C0906A9, 0xEB0E363F, 0x72076785, 0x05005713, - 0x95BF4A82, 0xE2B87A14, 0x7BB12BAE, 0x0CB61B38, 0x92D28E9B, 0xE5D5BE0D, 0x7CDCEFB7, 0x0BDBDF21, - 0x86D3D2D4, 0xF1D4E242, 0x68DDB3F8, 0x1FDA836E, 0x81BE16CD, 0xF6B9265B, 0x6FB077E1, 0x18B74777, - 0x88085AE6, 0xFF0F6A70, 0x66063BCA, 0x11010B5C, 0x8F659EFF, 0xF862AE69, 0x616BFFD3, 0x166CCF45, - 0xA00AE278, 0xD70DD2EE, 0x4E048354, 0x3903B3C2, 0xA7672661, 0xD06016F7, 0x4969474D, 0x3E6E77DB, - 0xAED16A4A, 0xD9D65ADC, 0x40DF0B66, 0x37D83BF0, 0xA9BCAE53, 0xDEBB9EC5, 0x47B2CF7F, 0x30B5FFE9, - 0xBDBDF21C, 0xCABAC28A, 0x53B39330, 0x24B4A3A6, 0xBAD03605, 0xCDD70693, 0x54DE5729, 0x23D967BF, - 0xB3667A2E, 0xC4614AB8, 0x5D681B02, 0x2A6F2B94, 0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D -}; - -static uint32_t tagcrc32(uint32_t crc, uint8_t *data, size_t len) -{ - while (len--) - crc = (crc >> 8) ^ tagcrc32tab[(crc ^ *data++) & 0xFF]; - - return crc; -} - -static int parse_cfe_partitions( struct mtd_info *master, struct mtd_partition **pparts) -{ - int nrparts = 3, curpart = 0; /* CFE,NVRAM and global LINUX are always present. */ - union bcm_tag *buf; - struct mtd_partition *parts; - int ret; - size_t retlen; - unsigned int rootfsaddr, kerneladdr, spareaddr; - unsigned int rootfslen, kernellen, sparelen, totallen; - unsigned char *tagid; - int namelen = 0; - int i; - uint32_t tagidcrc; - uint32_t calctagidcrc; - bool tagid_match = false; - char *boardid; - char *tagversion; - char *matchtagid; - - /* Allocate memory for buffer */ - buf = vmalloc(sizeof(union bcm_tag)); - if (!buf) - return -ENOMEM; - - /* Get the tag */ - ret = master->read(master,master->erasesize,sizeof(union bcm_tag), &retlen, (void *)buf); - if (retlen != sizeof(union bcm_tag)){ - vfree(buf); - return -EIO; - } - - /* tagId isn't in the same location, so we check each tagid against the - * tagid CRC. If the CRC is valid we have found the right tag and so - * use that tag - */ - - for (i = 0; i < NUM_TAGID; i++) { - switch(i) { - case 0: - matchtagid = "bccfe"; - tagid = &(buf->bccfe.tagId[0]); - sscanf(buf->bccfe.rootAddress,"%u", &rootfsaddr); - sscanf(buf->bccfe.rootLength, "%u", &rootfslen); - sscanf(buf->bccfe.kernelAddress, "%u", &kerneladdr); - sscanf(buf->bccfe.kernelLength, "%u", &kernellen); - sscanf(buf->bccfe.totalLength, "%u", &totallen); - tagidcrc = *(uint32_t *)&(buf->bccfe.tagIdCRC[0]); - tagversion = &(buf->bccfe.tagVersion[0]); - boardid = &(buf->bccfe.boardid[0]); - break; - case 1: - matchtagid = "bc300"; - tagid = &(buf->bc300.tagId[0]); - sscanf(buf->bc300.rootAddress,"%u", &rootfsaddr); - sscanf(buf->bc300.rootLength, "%u", &rootfslen); - sscanf(buf->bc300.kernelAddress, "%u", &kerneladdr); - sscanf(buf->bc300.kernelLength, "%u", &kernellen); - sscanf(buf->bc300.totalLength, "%u", &totallen); - tagidcrc = *(uint32_t *)&(buf->bc300.tagIdCRC[0]); - tagversion = &(buf->bc300.tagVersion[0]); - boardid = &(buf->bc300.boardid[0]); - break; - case 2: - matchtagid = "ag306"; - tagid = &(buf->ag306.tagId[0]); - sscanf(buf->ag306.rootAddress,"%u", &rootfsaddr); - sscanf(buf->ag306.rootLength, "%u", &rootfslen); - sscanf(buf->ag306.kernelAddress, "%u", &kerneladdr); - sscanf(buf->ag306.kernelLength, "%u", &kernellen); - sscanf(buf->ag306.totalLength, "%u", &totallen); - tagidcrc = *(uint32_t *)&(buf->ag306.tagIdCRC[0]); - tagversion = &(buf->ag306.tagVersion[0]); - boardid = &(buf->ag306.boardid[0]); - break; - case 3: - matchtagid = "bc221"; - tagid = &(buf->bc221.tagId[0]); - sscanf(buf->bc221.rootAddress,"%u", &rootfsaddr); - sscanf(buf->bc221.rootLength, "%u", &rootfslen); - sscanf(buf->bc221.kernelAddress, "%u", &kerneladdr); - sscanf(buf->bc221.kernelLength, "%u", &kernellen); - sscanf(buf->bc221.totalLength, "%u", &totallen); - tagidcrc = *(uint32_t *)&(buf->bc221.tagIdCRC[0]); - tagversion = &(buf->bc221.tagVersion[0]); - boardid = &(buf->bc221.boardid[0]); - break; - case 4: - matchtagid = "bc310"; - tagid = &(buf->bc310.tagId[0]); - sscanf(buf->bc310.rootAddress,"%u", &rootfsaddr); - sscanf(buf->bc310.rootLength, "%u", &rootfslen); - sscanf(buf->bc310.kernelAddress, "%u", &kerneladdr); - sscanf(buf->bc310.kernelLength, "%u", &kernellen); - sscanf(buf->bc310.totalLength, "%u", &totallen); - tagidcrc = *(uint32_t *)&(buf->bc310.tagIdCRC[0]); - tagversion = &(buf->bc310.tagVersion[0]); - boardid = &(buf->bc310.boardid[0]); - break; - } - if (strncmp(tagid, matchtagid, TAGID_LEN) != 0) { - continue; - } - - calctagidcrc = htonl(tagcrc32(IMAGETAG_CRC_START, tagid, TAGID_LEN)); - if (tagidcrc == calctagidcrc) { - tagid_match = true; - break; - } - } - - if (!tagid_match) { - tagid = "bcram"; - sscanf(buf->bccfe.rootAddress,"%u", &rootfsaddr); - sscanf(buf->bccfe.rootLength, "%u", &rootfslen); - sscanf(buf->bccfe.kernelAddress, "%u", &kerneladdr); - sscanf(buf->bccfe.kernelLength, "%u", &kernellen); - sscanf(buf->bccfe.totalLength, "%u", &totallen); - tagidcrc = *(uint32_t *)&(buf->bccfe.tagIdCRC[0]); - tagversion = &(buf->bccfe.tagVersion[0]); - boardid = &(buf->bccfe.boardid[0]); - } - - printk(KERN_INFO PFX "CFE boot tag found with version %s, board type %s, and tagid %s.\n",tagversion,boardid,tagid); - - rootfsaddr = rootfsaddr - EXTENDED_SIZE; - kerneladdr = kerneladdr - EXTENDED_SIZE; - spareaddr = roundup(totallen,master->erasesize) + master->erasesize; - sparelen = master->size - spareaddr - master->erasesize; - - /* Determine number of partitions */ - namelen = 8; - if (rootfslen > 0){ - nrparts++; - namelen =+ 6; - }; - if (kernellen > 0) { - nrparts++; - namelen =+ 6; - }; - - /* Ask kernel for more memory */ - parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL); - if (!parts) { - vfree(buf); - return -ENOMEM; - }; - - /* Start building partition list */ - parts[curpart].name = "CFE"; - parts[curpart].offset = 0; - parts[curpart].size = master->erasesize; - curpart++; - - if (kernellen > 0) { - parts[curpart].name = "kernel"; - parts[curpart].offset = kerneladdr; - parts[curpart].size = kernellen; - curpart++; - }; - - if (rootfslen > 0) { - parts[curpart].name = "rootfs"; - parts[curpart].offset = rootfsaddr; - parts[curpart].size = rootfslen; - if (sparelen > 0) - parts[curpart].size += sparelen; - curpart++; - }; - - parts[curpart].name = "nvram"; - parts[curpart].offset = master->size - master->erasesize; - parts[curpart].size = master->erasesize; - - /* Global partition "linux" to make easy firmware upgrade */ - curpart++; - parts[curpart].name = "linux"; - parts[curpart].offset = parts[0].size; - parts[curpart].size = master->size - parts[0].size - parts[3].size; - - for (i = 0; i < nrparts; i++) - printk(KERN_INFO PFX "Partition %d is %s offset %lx and length %lx\n", i, parts[i].name, parts[i].offset, parts[i].size); - - printk(KERN_INFO PFX "Spare partition is %x offset and length %x\n", spareaddr, sparelen); - *pparts = parts; - vfree(buf); - - return nrparts; -}; - -static int bcm963xx_detect_cfe(struct mtd_info *master) -{ - int idoffset = 0x4e0; - static char idstring[8] = "CFE1CFE1"; - char buf[9]; - int ret; - size_t retlen; - - ret = master->read(master, idoffset, 8, &retlen, (void *)buf); - buf[retlen] = 0; - printk(KERN_INFO PFX "Read Signature value of %s\n", buf); - - return strncmp(idstring, buf, 8); -} - -static int bcm963xx_probe(struct platform_device *pdev) -{ - int err = 0; - int parsed_nr_parts = 0; - char *part_type; - struct resource *r; - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - bcm963xx_map.phys = r->start; - bcm963xx_map.size = (r->end - r->start) + 1; - bcm963xx_map.virt = ioremap(r->start, r->end - r->start + 1); - - if (!bcm963xx_map.virt) { - printk(KERN_ERR PFX "Failed to ioremap\n"); - return -EIO; - } - printk(KERN_INFO PFX "0x%08lx at 0x%08x\n", bcm963xx_map.size, bcm963xx_map.phys); - - simple_map_init(&bcm963xx_map); - - bcm963xx_mtd_info = do_map_probe("cfi_probe", &bcm963xx_map); - if (!bcm963xx_mtd_info) { - printk(KERN_ERR PFX "Failed to probe using CFI\n"); - err = -EIO; - goto err_probe; - } - - bcm963xx_mtd_info->owner = THIS_MODULE; - - /* This is mutually exclusive */ - if (bcm963xx_detect_cfe(bcm963xx_mtd_info) == 0) { - printk(KERN_INFO PFX "CFE bootloader detected\n"); - if (parsed_nr_parts == 0) { - int ret = parse_cfe_partitions(bcm963xx_mtd_info, &parsed_parts); - if (ret > 0) { - part_type = "CFE"; - parsed_nr_parts = ret; - } - } - } else { - printk(KERN_INFO PFX "assuming RedBoot bootloader\n"); - if (bcm963xx_mtd_info->size > 0x00400000) { - printk(KERN_INFO PFX "Support for extended flash memory size : 0x%lx ; ONLY 64MBIT SUPPORT\n", bcm963xx_mtd_info->size); - bcm963xx_map.virt = (u32)(EXTENDED_SIZE); - } - -#ifdef CONFIG_MTD_REDBOOT_PARTS - if (parsed_nr_parts == 0) { - int ret = parse_redboot_partitions(bcm963xx_mtd_info, &parsed_parts, 0); - if (ret > 0) { - part_type = "RedBoot"; - parsed_nr_parts = ret; - } - } -#endif - } - - return add_mtd_partitions(bcm963xx_mtd_info, parsed_parts, parsed_nr_parts); - -err_probe: - iounmap(bcm963xx_map.virt); - return err; -} - -static int bcm963xx_remove(struct platform_device *pdev) -{ - if (bcm963xx_mtd_info) { - del_mtd_partitions(bcm963xx_mtd_info); - map_destroy(bcm963xx_mtd_info); - } - - if (bcm963xx_map.virt) { - iounmap(bcm963xx_map.virt); - bcm963xx_map.virt = 0; - } - - return 0; -} - -static struct platform_driver bcm63xx_mtd_dev = { - .probe = bcm963xx_probe, - .remove = bcm963xx_remove, - .driver = { - .name = "bcm963xx-flash", - .owner = THIS_MODULE, - }, -}; - -static int __init bcm963xx_mtd_init(void) -{ - return platform_driver_register(&bcm63xx_mtd_dev); -} - -static void __exit bcm963xx_mtd_exit(void) -{ - platform_driver_unregister(&bcm63xx_mtd_dev); -} - -module_init(bcm963xx_mtd_init); -module_exit(bcm963xx_mtd_exit); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("Broadcom BCM63xx MTD partition parser/mapping for CFE and RedBoot"); -MODULE_AUTHOR("Florian Fainelli "); -MODULE_AUTHOR("Mike Albon "); diff --git a/target/linux/brcm63xx/files-2.6.30/drivers/net/bcm63xx_enet.c b/target/linux/brcm63xx/files-2.6.30/drivers/net/bcm63xx_enet.c deleted file mode 100644 index d338bbc08..000000000 --- a/target/linux/brcm63xx/files-2.6.30/drivers/net/bcm63xx_enet.c +++ /dev/null @@ -1,1964 +0,0 @@ -/* - * Driver for BCM963xx builtin Ethernet mac - * - * Copyright (C) 2008 Maxime Bizon - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. - */ -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include "bcm63xx_enet.h" - -static char bcm_enet_driver_name[] = "bcm63xx_enet"; -static char bcm_enet_driver_version[] = "1.0"; - -static int copybreak __read_mostly = 128; -module_param(copybreak, int, 0); -MODULE_PARM_DESC(copybreak, "Receive copy threshold"); - -/* io memory shared between all devices */ -static void __iomem *bcm_enet_shared_base; - -/* - * io helpers to access mac registers - */ -static inline u32 enet_readl(struct bcm_enet_priv *priv, u32 off) -{ - return bcm_readl(priv->base + off); -} - -static inline void enet_writel(struct bcm_enet_priv *priv, - u32 val, u32 off) -{ - bcm_writel(val, priv->base + off); -} - -/* - * io helpers to access shared registers - */ -static inline u32 enet_dma_readl(struct bcm_enet_priv *priv, u32 off) -{ - return bcm_readl(bcm_enet_shared_base + off); -} - -static inline void enet_dma_writel(struct bcm_enet_priv *priv, - u32 val, u32 off) -{ - bcm_writel(val, bcm_enet_shared_base + off); -} - -/* - * write given data into mii register and wait for transfer to end - * with timeout (average measured transfer time is 25us) - */ -static int do_mdio_op(struct bcm_enet_priv *priv, unsigned int data) -{ - int limit; - - /* make sure mii interrupt status is cleared */ - enet_writel(priv, ENET_IR_MII, ENET_IR_REG); - - enet_writel(priv, data, ENET_MIIDATA_REG); - wmb(); - - /* busy wait on mii interrupt bit, with timeout */ - limit = 1000; - do { - if (enet_readl(priv, ENET_IR_REG) & ENET_IR_MII) - break; - udelay(1); - } while (limit-- >= 0); - - return (limit < 0) ? 1 : 0; -} - -/* - * MII internal read callback - */ -static int bcm_enet_mdio_read(struct bcm_enet_priv *priv, int mii_id, - int regnum) -{ - u32 tmp, val; - - tmp = regnum << ENET_MIIDATA_REG_SHIFT; - tmp |= 0x2 << ENET_MIIDATA_TA_SHIFT; - tmp |= mii_id << ENET_MIIDATA_PHYID_SHIFT; - tmp |= ENET_MIIDATA_OP_READ_MASK; - - if (do_mdio_op(priv, tmp)) - return -1; - - val = enet_readl(priv, ENET_MIIDATA_REG); - val &= 0xffff; - return val; -} - -/* - * MII internal write callback - */ -static int bcm_enet_mdio_write(struct bcm_enet_priv *priv, int mii_id, - int regnum, u16 value) -{ - u32 tmp; - - tmp = (value & 0xffff) << ENET_MIIDATA_DATA_SHIFT; - tmp |= 0x2 << ENET_MIIDATA_TA_SHIFT; - tmp |= regnum << ENET_MIIDATA_REG_SHIFT; - tmp |= mii_id << ENET_MIIDATA_PHYID_SHIFT; - tmp |= ENET_MIIDATA_OP_WRITE_MASK; - - (void)do_mdio_op(priv, tmp); - return 0; -} - -/* - * MII read callback from phylib - */ -static int bcm_enet_mdio_read_phylib(struct mii_bus *bus, int mii_id, - int regnum) -{ - return bcm_enet_mdio_read(bus->priv, mii_id, regnum); -} - -/* - * MII write callback from phylib - */ -static int bcm_enet_mdio_write_phylib(struct mii_bus *bus, int mii_id, - int regnum, u16 value) -{ - return bcm_enet_mdio_write(bus->priv, mii_id, regnum, value); -} - -/* - * MII read callback from mii core - */ -static int bcm_enet_mdio_read_mii(struct net_device *dev, int mii_id, - int regnum) -{ - return bcm_enet_mdio_read(netdev_priv(dev), mii_id, regnum); -} - -/* - * MII write callback from mii core - */ -static void bcm_enet_mdio_write_mii(struct net_device *dev, int mii_id, - int regnum, int value) -{ - bcm_enet_mdio_write(netdev_priv(dev), mii_id, regnum, value); -} - -/* - * refill rx queue - */ -static int bcm_enet_refill_rx(struct net_device *dev) -{ - struct bcm_enet_priv *priv; - - priv = netdev_priv(dev); - - while (priv->rx_desc_count < priv->rx_ring_size) { - struct bcm_enet_desc *desc; - struct sk_buff *skb; - dma_addr_t p; - int desc_idx; - u32 len_stat; - - desc_idx = priv->rx_dirty_desc; - desc = &priv->rx_desc_cpu[desc_idx]; - - if (!priv->rx_skb[desc_idx]) { - skb = netdev_alloc_skb(dev, priv->rx_skb_size); - if (!skb) - break; - priv->rx_skb[desc_idx] = skb; - - p = dma_map_single(&priv->pdev->dev, skb->data, - priv->rx_skb_size, - DMA_FROM_DEVICE); - desc->address = p; - } - - len_stat = priv->rx_skb_size << DMADESC_LENGTH_SHIFT; - len_stat |= DMADESC_OWNER_MASK; - if (priv->rx_dirty_desc == priv->rx_ring_size - 1) { - len_stat |= DMADESC_WRAP_MASK; - priv->rx_dirty_desc = 0; - } else { - priv->rx_dirty_desc++; - } - wmb(); - desc->len_stat = len_stat; - - priv->rx_desc_count++; - - /* tell dma engine we allocated one buffer */ - enet_dma_writel(priv, 1, ENETDMA_BUFALLOC_REG(priv->rx_chan)); - } - - /* If rx ring is still empty, set a timer to try allocating - * again at a later time. */ - if (priv->rx_desc_count == 0 && netif_running(dev)) { - dev_warn(&priv->pdev->dev, "unable to refill rx ring\n"); - priv->rx_timeout.expires = jiffies + HZ; - add_timer(&priv->rx_timeout); - } - - return 0; -} - -/* - * timer callback to defer refill rx queue in case we're OOM - */ -static void bcm_enet_refill_rx_timer(unsigned long data) -{ - struct net_device *dev; - struct bcm_enet_priv *priv; - - dev = (struct net_device *)data; - priv = netdev_priv(dev); - - spin_lock(&priv->rx_lock); - bcm_enet_refill_rx((struct net_device *)data); - spin_unlock(&priv->rx_lock); -} - -/* - * extract packet from rx queue - */ -static int bcm_enet_receive_queue(struct net_device *dev, int budget) -{ - struct bcm_enet_priv *priv; - struct device *kdev; - int processed; - - priv = netdev_priv(dev); - kdev = &priv->pdev->dev; - processed = 0; - - /* don't scan ring further than number of refilled - * descriptor */ - if (budget > priv->rx_desc_count) - budget = priv->rx_desc_count; - - do { - struct bcm_enet_desc *desc; - struct sk_buff *skb; - int desc_idx; - u32 len_stat; - unsigned int len; - - desc_idx = priv->rx_curr_desc; - desc = &priv->rx_desc_cpu[desc_idx]; - - /* make sure we actually read the descriptor status at - * each loop */ - rmb(); - - len_stat = desc->len_stat; - - /* break if dma ownership belongs to hw */ - if (len_stat & DMADESC_OWNER_MASK) - break; - - processed++; - priv->rx_curr_desc++; - if (priv->rx_curr_desc == priv->rx_ring_size) - priv->rx_curr_desc = 0; - priv->rx_desc_count--; - - /* if the packet does not have start of packet _and_ - * end of packet flag set, then just recycle it */ - if ((len_stat & DMADESC_ESOP_MASK) != DMADESC_ESOP_MASK) { - priv->stats.rx_dropped++; - continue; - } - - /* recycle packet if it's marked as bad */ - if (unlikely(len_stat & DMADESC_ERR_MASK)) { - priv->stats.rx_errors++; - - if (len_stat & DMADESC_OVSIZE_MASK) - priv->stats.rx_length_errors++; - if (len_stat & DMADESC_CRC_MASK) - priv->stats.rx_crc_errors++; - if (len_stat & DMADESC_UNDER_MASK) - priv->stats.rx_frame_errors++; - if (len_stat & DMADESC_OV_MASK) - priv->stats.rx_fifo_errors++; - continue; - } - - /* valid packet */ - skb = priv->rx_skb[desc_idx]; - len = (len_stat & DMADESC_LENGTH_MASK) >> DMADESC_LENGTH_SHIFT; - /* don't include FCS */ - len -= 4; - - if (len < copybreak) { - struct sk_buff *nskb; - - nskb = netdev_alloc_skb(dev, len + 2); - if (!nskb) { - /* forget packet, just rearm desc */ - priv->stats.rx_dropped++; - continue; - } - - /* since we're copying the data, we can align - * them properly */ - skb_reserve(nskb, NET_IP_ALIGN); - dma_sync_single_for_cpu(kdev, desc->address, - len, DMA_FROM_DEVICE); - memcpy(nskb->data, skb->data, len); - dma_sync_single_for_device(kdev, desc->address, - len, DMA_FROM_DEVICE); - skb = nskb; - } else { - dma_unmap_single(&priv->pdev->dev, desc->address, - priv->rx_skb_size, DMA_FROM_DEVICE); - priv->rx_skb[desc_idx] = NULL; - } - - skb_put(skb, len); - skb->dev = dev; - skb->protocol = eth_type_trans(skb, dev); - priv->stats.rx_packets++; - priv->stats.rx_bytes += len; - dev->last_rx = jiffies; - netif_receive_skb(skb); - - } while (--budget > 0); - - if (processed || !priv->rx_desc_count) { - bcm_enet_refill_rx(dev); - - /* kick rx dma */ - enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK, - ENETDMA_CHANCFG_REG(priv->rx_chan)); - } - - return processed; -} - - -/* - * try to or force reclaim of transmitted buffers - */ -static int bcm_enet_tx_reclaim(struct net_device *dev, int force) -{ - struct bcm_enet_priv *priv; - int released; - - priv = netdev_priv(dev); - released = 0; - - while (priv->tx_desc_count < priv->tx_ring_size) { - struct bcm_enet_desc *desc; - struct sk_buff *skb; - - /* We run in a bh and fight against start_xmit, which - * is called with bh disabled */ - spin_lock(&priv->tx_lock); - - desc = &priv->tx_desc_cpu[priv->tx_dirty_desc]; - - if (!force && (desc->len_stat & DMADESC_OWNER_MASK)) { - spin_unlock(&priv->tx_lock); - break; - } - - /* ensure other field of the descriptor were not read - * before we checked ownership */ - rmb(); - - skb = priv->tx_skb[priv->tx_dirty_desc]; - priv->tx_skb[priv->tx_dirty_desc] = NULL; - dma_unmap_single(&priv->pdev->dev, desc->address, skb->len, - DMA_TO_DEVICE); - - priv->tx_dirty_desc++; - if (priv->tx_dirty_desc == priv->tx_ring_size) - priv->tx_dirty_desc = 0; - priv->tx_desc_count++; - - spin_unlock(&priv->tx_lock); - - if (desc->len_stat & DMADESC_UNDER_MASK) - priv->stats.tx_errors++; - - dev_kfree_skb(skb); - released++; - } - - if (netif_queue_stopped(dev) && released) - netif_wake_queue(dev); - - return released; -} - -/* - * poll func, called by network core - */ -static int bcm_enet_poll(struct napi_struct *napi, int budget) -{ - struct bcm_enet_priv *priv; - struct net_device *dev; - int tx_work_done, rx_work_done; - - priv = container_of(napi, struct bcm_enet_priv, napi); - dev = priv->net_dev; - - /* ack interrupts */ - enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, - ENETDMA_IR_REG(priv->rx_chan)); - enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, - ENETDMA_IR_REG(priv->tx_chan)); - - /* reclaim sent skb */ - tx_work_done = bcm_enet_tx_reclaim(dev, 0); - - spin_lock(&priv->rx_lock); - rx_work_done = bcm_enet_receive_queue(dev, budget); - spin_unlock(&priv->rx_lock); - - if (rx_work_done >= budget || tx_work_done > 0) { - /* rx/tx queue is not yet empty/clean */ - return rx_work_done; - } - - /* no more packet in rx/tx queue, remove device from poll - * queue */ -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) - netif_rx_complete(dev, napi); -#else - napi_complete(napi); -#endif - - /* restore rx/tx interrupt */ - enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, - ENETDMA_IRMASK_REG(priv->rx_chan)); - enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, - ENETDMA_IRMASK_REG(priv->tx_chan)); - - return rx_work_done; -} - -/* - * mac interrupt handler - */ -static irqreturn_t bcm_enet_isr_mac(int irq, void *dev_id) -{ - struct net_device *dev; - struct bcm_enet_priv *priv; - u32 stat; - - dev = dev_id; - priv = netdev_priv(dev); - - stat = enet_readl(priv, ENET_IR_REG); - if (!(stat & ENET_IR_MIB)) - return IRQ_NONE; - - /* clear & mask interrupt */ - enet_writel(priv, ENET_IR_MIB, ENET_IR_REG); - enet_writel(priv, 0, ENET_IRMASK_REG); - - /* read mib registers in workqueue */ - schedule_work(&priv->mib_update_task); - - return IRQ_HANDLED; -} - -/* - * rx/tx dma interrupt handler - */ -static irqreturn_t bcm_enet_isr_dma(int irq, void *dev_id) -{ - struct net_device *dev; - struct bcm_enet_priv *priv; - - dev = dev_id; - priv = netdev_priv(dev); - - /* mask rx/tx interrupts */ - enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan)); - enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan)); - -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) - netif_rx_schedule(dev, &priv->napi); -#else - napi_schedule(&priv->napi); -#endif - - return IRQ_HANDLED; -} - -/* - * tx request callback - */ -static int bcm_enet_start_xmit(struct sk_buff *skb, struct net_device *dev) -{ - struct bcm_enet_priv *priv; - struct bcm_enet_desc *desc; - u32 len_stat; - int ret; - - priv = netdev_priv(dev); - - /* lock against tx reclaim */ - spin_lock(&priv->tx_lock); - - /* make sure the tx hw queue is not full, should not happen - * since we stop queue before it's the case */ - if (unlikely(!priv->tx_desc_count)) { - netif_stop_queue(dev); - dev_err(&priv->pdev->dev, "xmit called with no tx desc " - "available?\n"); - ret = NETDEV_TX_BUSY; - goto out_unlock; - } - - /* point to the next available desc */ - desc = &priv->tx_desc_cpu[priv->tx_curr_desc]; - priv->tx_skb[priv->tx_curr_desc] = skb; - - /* fill descriptor */ - desc->address = dma_map_single(&priv->pdev->dev, skb->data, skb->len, - DMA_TO_DEVICE); - - len_stat = (skb->len << DMADESC_LENGTH_SHIFT) & DMADESC_LENGTH_MASK; - len_stat |= DMADESC_ESOP_MASK | - DMADESC_APPEND_CRC | - DMADESC_OWNER_MASK; - - priv->tx_curr_desc++; - if (priv->tx_curr_desc == priv->tx_ring_size) { - priv->tx_curr_desc = 0; - len_stat |= DMADESC_WRAP_MASK; - } - priv->tx_desc_count--; - - /* dma might be already polling, make sure we update desc - * fields in correct order */ - wmb(); - desc->len_stat = len_stat; - wmb(); - - /* kick tx dma */ - enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK, - ENETDMA_CHANCFG_REG(priv->tx_chan)); - - /* stop queue if no more desc available */ - if (!priv->tx_desc_count) - netif_stop_queue(dev); - - priv->stats.tx_bytes += skb->len; - priv->stats.tx_packets++; - dev->trans_start = jiffies; - ret = NETDEV_TX_OK; - -out_unlock: - spin_unlock(&priv->tx_lock); - return ret; -} - -/* - * Change the interface's mac address. - */ -static int bcm_enet_set_mac_address(struct net_device *dev, void *p) -{ - struct bcm_enet_priv *priv; - struct sockaddr *addr = p; - u32 val; - - priv = netdev_priv(dev); - memcpy(dev->dev_addr, addr->sa_data, ETH_ALEN); - - /* use perfect match register 0 to store my mac address */ - val = (dev->dev_addr[2] << 24) | (dev->dev_addr[3] << 16) | - (dev->dev_addr[4] << 8) | dev->dev_addr[5]; - enet_writel(priv, val, ENET_PML_REG(0)); - - val = (dev->dev_addr[0] << 8 | dev->dev_addr[1]); - val |= ENET_PMH_DATAVALID_MASK; - enet_writel(priv, val, ENET_PMH_REG(0)); - - return 0; -} - -/* - * Change rx mode (promiscous/allmulti) and update multicast list - */ -static void bcm_enet_set_multicast_list(struct net_device *dev) -{ - struct bcm_enet_priv *priv; - struct dev_mc_list *mc_list; - u32 val; - int i; - - priv = netdev_priv(dev); - - val = enet_readl(priv, ENET_RXCFG_REG); - - if (dev->flags & IFF_PROMISC) - val |= ENET_RXCFG_PROMISC_MASK; - else - val &= ~ENET_RXCFG_PROMISC_MASK; - - /* only 3 perfect match registers left, first one is used for - * own mac address */ - if ((dev->flags & IFF_ALLMULTI) || dev->mc_count > 3) - val |= ENET_RXCFG_ALLMCAST_MASK; - else - val &= ~ENET_RXCFG_ALLMCAST_MASK; - - /* no need to set perfect match registers if we catch all - * multicast */ - if (val & ENET_RXCFG_ALLMCAST_MASK) { - enet_writel(priv, val, ENET_RXCFG_REG); - return; - } - - for (i = 0, mc_list = dev->mc_list; - (mc_list != NULL) && (i < dev->mc_count) && (i < 3); - i++, mc_list = mc_list->next) { - u8 *dmi_addr; - u32 tmp; - - /* filter non ethernet address */ - if (mc_list->dmi_addrlen != 6) - continue; - - /* update perfect match registers */ - dmi_addr = mc_list->dmi_addr; - tmp = (dmi_addr[2] << 24) | (dmi_addr[3] << 16) | - (dmi_addr[4] << 8) | dmi_addr[5]; - enet_writel(priv, tmp, ENET_PML_REG(i + 1)); - - tmp = (dmi_addr[0] << 8 | dmi_addr[1]); - tmp |= ENET_PMH_DATAVALID_MASK; - enet_writel(priv, tmp, ENET_PMH_REG(i + 1)); - } - - for (; i < 3; i++) { - enet_writel(priv, 0, ENET_PML_REG(i + 1)); - enet_writel(priv, 0, ENET_PMH_REG(i + 1)); - } - - enet_writel(priv, val, ENET_RXCFG_REG); -} - -/* - * set mac duplex parameters - */ -static void bcm_enet_set_duplex(struct bcm_enet_priv *priv, int fullduplex) -{ - u32 val; - - val = enet_readl(priv, ENET_TXCTL_REG); - if (fullduplex) - val |= ENET_TXCTL_FD_MASK; - else - val &= ~ENET_TXCTL_FD_MASK; - enet_writel(priv, val, ENET_TXCTL_REG); -} - -/* - * set mac flow control parameters - */ -static void bcm_enet_set_flow(struct bcm_enet_priv *priv, int rx_en, int tx_en) -{ - u32 val; - - /* rx flow control (pause frame handling) */ - val = enet_readl(priv, ENET_RXCFG_REG); - if (rx_en) - val |= ENET_RXCFG_ENFLOW_MASK; - else - val &= ~ENET_RXCFG_ENFLOW_MASK; - enet_writel(priv, val, ENET_RXCFG_REG); - - /* tx flow control (pause frame generation) */ - val = enet_dma_readl(priv, ENETDMA_CFG_REG); - if (tx_en) - val |= ENETDMA_CFG_FLOWCH_MASK(priv->rx_chan); - else - val &= ~ENETDMA_CFG_FLOWCH_MASK(priv->rx_chan); - enet_dma_writel(priv, val, ENETDMA_CFG_REG); -} - -/* - * link changed callback (from phylib) - */ -static void bcm_enet_adjust_phy_link(struct net_device *dev) -{ - struct bcm_enet_priv *priv; - struct phy_device *phydev; - int status_changed; - - priv = netdev_priv(dev); - phydev = priv->phydev; - status_changed = 0; - - if (priv->old_link != phydev->link) { - status_changed = 1; - priv->old_link = phydev->link; - } - - /* reflect duplex change in mac configuration */ - if (phydev->link && phydev->duplex != priv->old_duplex) { - bcm_enet_set_duplex(priv, - (phydev->duplex == DUPLEX_FULL) ? 1 : 0); - status_changed = 1; - priv->old_duplex = phydev->duplex; - } - - /* enable flow control if remote advertise it (trust phylib to - * check that duplex is full */ - if (phydev->link && phydev->pause != priv->old_pause) { - int rx_pause_en, tx_pause_en; - - if (phydev->pause) { - /* pause was advertised by lpa and us */ - rx_pause_en = 1; - tx_pause_en = 1; - } else if (!priv->pause_auto) { - /* pause setting overrided by user */ - rx_pause_en = priv->pause_rx; - tx_pause_en = priv->pause_tx; - } else { - rx_pause_en = 0; - tx_pause_en = 0; - } - - bcm_enet_set_flow(priv, rx_pause_en, tx_pause_en); - status_changed = 1; - priv->old_pause = phydev->pause; - } - - if (status_changed) { - pr_info("%s: link %s", dev->name, phydev->link ? - "UP" : "DOWN"); - if (phydev->link) - printk(" - %d/%s - flow control %s", phydev->speed, - DUPLEX_FULL == phydev->duplex ? "full" : "half", - phydev->pause == 1 ? "rx&tx" : "off"); - - printk("\n"); - } -} - -/* - * link changed callback (if phylib is not used) - */ -static void bcm_enet_adjust_link(struct net_device *dev) -{ - struct bcm_enet_priv *priv; - - priv = netdev_priv(dev); - bcm_enet_set_duplex(priv, priv->force_duplex_full); - bcm_enet_set_flow(priv, priv->pause_rx, priv->pause_tx); - - pr_info("%s: link forced UP - %d/%s - flow control %s/%s\n", - dev->name, - priv->force_speed_100 ? 100 : 10, - priv->force_duplex_full ? "full" : "half", - priv->pause_rx ? "rx" : "off", - priv->pause_tx ? "tx" : "off"); -} - -/* - * open callback, allocate dma rings & buffers and start rx operation - */ -static int bcm_enet_open(struct net_device *dev) -{ - struct bcm_enet_priv *priv; - struct sockaddr addr; - struct device *kdev; - struct phy_device *phydev; - int irq_requested, i, ret; - unsigned int size; - char phy_id[BUS_ID_SIZE]; - void *p; - u32 val; - - priv = netdev_priv(dev); - priv->rx_desc_cpu = priv->tx_desc_cpu = NULL; - priv->rx_skb = priv->tx_skb = NULL; - - kdev = &priv->pdev->dev; - - if (priv->has_phy) { - /* connect to PHY */ - snprintf(phy_id, BUS_ID_SIZE, PHY_ID_FMT, - priv->mac_id ? "1" : "0", priv->phy_id); - - phydev = phy_connect(dev, phy_id, &bcm_enet_adjust_phy_link, 0, - PHY_INTERFACE_MODE_MII); - - if (IS_ERR(phydev)) { - dev_err(kdev, "could not attach to PHY\n"); - return PTR_ERR(phydev); - } - - /* mask with MAC supported features */ - phydev->supported &= (SUPPORTED_10baseT_Half | - SUPPORTED_10baseT_Full | - SUPPORTED_100baseT_Half | - SUPPORTED_100baseT_Full | - SUPPORTED_Autoneg | - SUPPORTED_Pause | - SUPPORTED_MII); - phydev->advertising = phydev->supported; - - if (priv->pause_auto && priv->pause_rx && priv->pause_tx) - phydev->advertising |= SUPPORTED_Pause; - else - phydev->advertising &= ~SUPPORTED_Pause; - - dev_info(kdev, "attached PHY at address %d [%s]\n", - phydev->addr, phydev->drv->name); - - priv->old_link = 0; - priv->old_duplex = -1; - priv->old_pause = -1; - priv->phydev = phydev; - } - - /* mask all interrupts and request them */ - enet_writel(priv, 0, ENET_IRMASK_REG); - enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan)); - enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan)); - - irq_requested = 0; - ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev); - if (ret) - goto out; - irq_requested++; - - ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, - IRQF_SAMPLE_RANDOM | IRQF_DISABLED, dev->name, dev); - if (ret) - goto out; - irq_requested++; - - ret = request_irq(priv->irq_tx, bcm_enet_isr_dma, - IRQF_DISABLED, dev->name, dev); - if (ret) - goto out; - irq_requested++; - - /* initialize perfect match registers */ - for (i = 0; i < 4; i++) { - enet_writel(priv, 0, ENET_PML_REG(i)); - enet_writel(priv, 0, ENET_PMH_REG(i)); - } - - /* write device mac address */ - memcpy(addr.sa_data, dev->dev_addr, ETH_ALEN); - bcm_enet_set_mac_address(dev, &addr); - - /* allocate rx dma ring */ - size = priv->rx_ring_size * sizeof(struct bcm_enet_desc); - p = dma_alloc_coherent(kdev, size, &priv->rx_desc_dma, GFP_KERNEL); - if (!p) { - dev_err(kdev, "cannot allocate rx ring %u\n", size); - ret = -ENOMEM; - goto out; - } - - memset(p, 0, size); - priv->rx_desc_alloc_size = size; - priv->rx_desc_cpu = p; - - /* allocate tx dma ring */ - size = priv->tx_ring_size * sizeof(struct bcm_enet_desc); - p = dma_alloc_coherent(kdev, size, &priv->tx_desc_dma, GFP_KERNEL); - if (!p) { - dev_err(kdev, "cannot allocate tx ring\n"); - ret = -ENOMEM; - goto out; - } - - memset(p, 0, size); - priv->tx_desc_alloc_size = size; - priv->tx_desc_cpu = p; - - priv->tx_skb = kzalloc(sizeof(struct sk_buff *) * priv->tx_ring_size, - GFP_KERNEL); - if (!priv->tx_skb) { - dev_err(kdev, "cannot allocate rx skb queue\n"); - ret = -ENOMEM; - goto out; - } - - priv->tx_desc_count = priv->tx_ring_size; - priv->tx_dirty_desc = 0; - priv->tx_curr_desc = 0; - spin_lock_init(&priv->tx_lock); - - /* init & fill rx ring with skbs */ - priv->rx_skb = kzalloc(sizeof(struct sk_buff *) * priv->rx_ring_size, - GFP_KERNEL); - if (!priv->rx_skb) { - dev_err(kdev, "cannot allocate rx skb queue\n"); - ret = -ENOMEM; - goto out; - } - - priv->rx_desc_count = 0; - priv->rx_dirty_desc = 0; - priv->rx_curr_desc = 0; - - /* initialize flow control buffer allocation */ - enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0, - ENETDMA_BUFALLOC_REG(priv->rx_chan)); - - if (bcm_enet_refill_rx(dev)) { - dev_err(kdev, "cannot allocate rx skb queue\n"); - ret = -ENOMEM; - goto out; - } - - /* write rx & tx ring addresses */ - enet_dma_writel(priv, priv->rx_desc_dma, - ENETDMA_RSTART_REG(priv->rx_chan)); - enet_dma_writel(priv, priv->tx_desc_dma, - ENETDMA_RSTART_REG(priv->tx_chan)); - - /* clear remaining state ram for rx & tx channel */ - enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->rx_chan)); - enet_dma_writel(priv, 0, ENETDMA_SRAM2_REG(priv->tx_chan)); - enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->rx_chan)); - enet_dma_writel(priv, 0, ENETDMA_SRAM3_REG(priv->tx_chan)); - enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->rx_chan)); - enet_dma_writel(priv, 0, ENETDMA_SRAM4_REG(priv->tx_chan)); - - /* set max rx/tx length */ - enet_writel(priv, priv->hw_mtu, ENET_RXMAXLEN_REG); - enet_writel(priv, priv->hw_mtu, ENET_TXMAXLEN_REG); - - /* set dma maximum burst len */ - enet_dma_writel(priv, BCMENET_DMA_MAXBURST, - ENETDMA_MAXBURST_REG(priv->rx_chan)); - enet_dma_writel(priv, BCMENET_DMA_MAXBURST, - ENETDMA_MAXBURST_REG(priv->tx_chan)); - - /* set correct transmit fifo watermark */ - enet_writel(priv, BCMENET_TX_FIFO_TRESH, ENET_TXWMARK_REG); - - /* set flow control low/high threshold to 1/3 / 2/3 */ - val = priv->rx_ring_size / 3; - enet_dma_writel(priv, val, ENETDMA_FLOWCL_REG(priv->rx_chan)); - val = (priv->rx_ring_size * 2) / 3; - enet_dma_writel(priv, val, ENETDMA_FLOWCH_REG(priv->rx_chan)); - - /* all set, enable mac and interrupts, start dma engine and - * kick rx dma channel */ - wmb(); - enet_writel(priv, ENET_CTL_ENABLE_MASK, ENET_CTL_REG); - enet_dma_writel(priv, ENETDMA_CFG_EN_MASK, ENETDMA_CFG_REG); - enet_dma_writel(priv, ENETDMA_CHANCFG_EN_MASK, - ENETDMA_CHANCFG_REG(priv->rx_chan)); - - /* watch "mib counters about to overflow" interrupt */ - enet_writel(priv, ENET_IR_MIB, ENET_IR_REG); - enet_writel(priv, ENET_IR_MIB, ENET_IRMASK_REG); - - /* watch "packet transferred" interrupt in rx and tx */ - enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, - ENETDMA_IR_REG(priv->rx_chan)); - enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, - ENETDMA_IR_REG(priv->tx_chan)); - - /* make sure we enable napi before rx interrupt */ - napi_enable(&priv->napi); - - enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, - ENETDMA_IRMASK_REG(priv->rx_chan)); - enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, - ENETDMA_IRMASK_REG(priv->tx_chan)); - - if (priv->has_phy) - phy_start(priv->phydev); - else - bcm_enet_adjust_link(dev); - - netif_start_queue(dev); - return 0; - -out: - phy_disconnect(priv->phydev); - if (irq_requested > 2) - free_irq(priv->irq_tx, dev); - if (irq_requested > 1) - free_irq(priv->irq_rx, dev); - if (irq_requested > 0) - free_irq(dev->irq, dev); - for (i = 0; i < priv->rx_ring_size; i++) { - struct bcm_enet_desc *desc; - - if (!priv->rx_skb[i]) - continue; - - desc = &priv->rx_desc_cpu[i]; - dma_unmap_single(kdev, desc->address, priv->rx_skb_size, - DMA_FROM_DEVICE); - kfree_skb(priv->rx_skb[i]); - } - if (priv->rx_desc_cpu) - dma_free_coherent(kdev, priv->rx_desc_alloc_size, - priv->rx_desc_cpu, priv->rx_desc_dma); - if (priv->tx_desc_cpu) - dma_free_coherent(kdev, priv->tx_desc_alloc_size, - priv->tx_desc_cpu, priv->tx_desc_dma); - kfree(priv->rx_skb); - kfree(priv->tx_skb); - return ret; -} - -/* - * disable mac - */ -static void bcm_enet_disable_mac(struct bcm_enet_priv *priv) -{ - int limit; - u32 val; - - val = enet_readl(priv, ENET_CTL_REG); - val |= ENET_CTL_DISABLE_MASK; - enet_writel(priv, val, ENET_CTL_REG); - - limit = 1000; - do { - u32 val; - - val = enet_readl(priv, ENET_CTL_REG); - if (!(val & ENET_CTL_DISABLE_MASK)) - break; - udelay(1); - } while (limit--); -} - -/* - * disable dma in given channel - */ -static void bcm_enet_disable_dma(struct bcm_enet_priv *priv, int chan) -{ - int limit; - - enet_dma_writel(priv, 0, ENETDMA_CHANCFG_REG(chan)); - - limit = 1000; - do { - u32 val; - - val = enet_dma_readl(priv, ENETDMA_CHANCFG_REG(chan)); - if (!(val & ENETDMA_CHANCFG_EN_MASK)) - break; - udelay(1); - } while (limit--); -} - -/* - * stop callback - */ -static int bcm_enet_stop(struct net_device *dev) -{ - struct bcm_enet_priv *priv; - struct device *kdev; - int i; - - priv = netdev_priv(dev); - kdev = &priv->pdev->dev; - - netif_stop_queue(dev); - napi_disable(&priv->napi); - if (priv->has_phy) - phy_stop(priv->phydev); - del_timer_sync(&priv->rx_timeout); - - /* mask all interrupts */ - enet_writel(priv, 0, ENET_IRMASK_REG); - enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan)); - enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan)); - - /* make sure no mib update is scheduled */ - flush_scheduled_work(); - - /* disable dma & mac */ - bcm_enet_disable_dma(priv, priv->tx_chan); - bcm_enet_disable_dma(priv, priv->rx_chan); - bcm_enet_disable_mac(priv); - - /* force reclaim of all tx buffers */ - bcm_enet_tx_reclaim(dev, 1); - - /* free the rx skb ring */ - for (i = 0; i < priv->rx_ring_size; i++) { - struct bcm_enet_desc *desc; - - if (!priv->rx_skb[i]) - continue; - - desc = &priv->rx_desc_cpu[i]; - dma_unmap_single(kdev, desc->address, priv->rx_skb_size, - DMA_FROM_DEVICE); - kfree_skb(priv->rx_skb[i]); - } - - /* free remaining allocated memory */ - kfree(priv->rx_skb); - kfree(priv->tx_skb); - dma_free_coherent(kdev, priv->rx_desc_alloc_size, - priv->rx_desc_cpu, priv->rx_desc_dma); - dma_free_coherent(kdev, priv->tx_desc_alloc_size, - priv->tx_desc_cpu, priv->tx_desc_dma); - free_irq(priv->irq_tx, dev); - free_irq(priv->irq_rx, dev); - free_irq(dev->irq, dev); - - /* release phy */ - if (priv->has_phy) { - phy_disconnect(priv->phydev); - priv->phydev = NULL; - } - - return 0; -} - -/* - * core request to return device rx/tx stats - */ -static struct net_device_stats *bcm_enet_get_stats(struct net_device *dev) -{ - struct bcm_enet_priv *priv; - - priv = netdev_priv(dev); - return &priv->stats; -} - -/* - * ethtool callbacks - */ -struct bcm_enet_stats { - char stat_string[ETH_GSTRING_LEN]; - int sizeof_stat; - int stat_offset; - int mib_reg; -}; - -#define GEN_STAT(m) sizeof(((struct bcm_enet_priv *)0)->m), \ - offsetof(struct bcm_enet_priv, m) - -static const struct bcm_enet_stats bcm_enet_gstrings_stats[] = { - { "rx_packets", GEN_STAT(stats.rx_packets), -1 }, - { "tx_packets", GEN_STAT(stats.tx_packets), -1 }, - { "rx_bytes", GEN_STAT(stats.rx_bytes), -1 }, - { "tx_bytes", GEN_STAT(stats.tx_bytes), -1 }, - { "rx_errors", GEN_STAT(stats.rx_errors), -1 }, - { "tx_errors", GEN_STAT(stats.tx_errors), -1 }, - { "rx_dropped", GEN_STAT(stats.rx_dropped), -1 }, - { "tx_dropped", GEN_STAT(stats.tx_dropped), -1 }, - - { "rx_good_octets", GEN_STAT(mib.rx_gd_octets), ETH_MIB_RX_GD_OCTETS}, - { "rx_good_pkts", GEN_STAT(mib.rx_gd_pkts), ETH_MIB_RX_GD_PKTS }, - { "rx_broadcast", GEN_STAT(mib.rx_brdcast), ETH_MIB_RX_BRDCAST }, - { "rx_multicast", GEN_STAT(mib.rx_mult), ETH_MIB_RX_MULT }, - { "rx_64_octets", GEN_STAT(mib.rx_64), ETH_MIB_RX_64 }, - { "rx_65_127_oct", GEN_STAT(mib.rx_65_127), ETH_MIB_RX_65_127 }, - { "rx_128_255_oct", GEN_STAT(mib.rx_128_255), ETH_MIB_RX_128_255 }, - { "rx_256_511_oct", GEN_STAT(mib.rx_256_511), ETH_MIB_RX_256_511 }, - { "rx_512_1023_oct", GEN_STAT(mib.rx_512_1023), ETH_MIB_RX_512_1023 }, - { "rx_1024_max_oct", GEN_STAT(mib.rx_1024_max), ETH_MIB_RX_1024_MAX }, - { "rx_jabber", GEN_STAT(mib.rx_jab), ETH_MIB_RX_JAB }, - { "rx_oversize", GEN_STAT(mib.rx_ovr), ETH_MIB_RX_OVR }, - { "rx_fragment", GEN_STAT(mib.rx_frag), ETH_MIB_RX_FRAG }, - { "rx_dropped", GEN_STAT(mib.rx_drop), ETH_MIB_RX_DROP }, - { "rx_crc_align", GEN_STAT(mib.rx_crc_align), ETH_MIB_RX_CRC_ALIGN }, - { "rx_undersize", GEN_STAT(mib.rx_und), ETH_MIB_RX_UND }, - { "rx_crc", GEN_STAT(mib.rx_crc), ETH_MIB_RX_CRC }, - { "rx_align", GEN_STAT(mib.rx_align), ETH_MIB_RX_ALIGN }, - { "rx_symbol_error", GEN_STAT(mib.rx_sym), ETH_MIB_RX_SYM }, - { "rx_pause", GEN_STAT(mib.rx_pause), ETH_MIB_RX_PAUSE }, - { "rx_control", GEN_STAT(mib.rx_cntrl), ETH_MIB_RX_CNTRL }, - - { "tx_good_octets", GEN_STAT(mib.tx_gd_octets), ETH_MIB_TX_GD_OCTETS }, - { "tx_good_pkts", GEN_STAT(mib.tx_gd_pkts), ETH_MIB_TX_GD_PKTS }, - { "tx_broadcast", GEN_STAT(mib.tx_brdcast), ETH_MIB_TX_BRDCAST }, - { "tx_multicast", GEN_STAT(mib.tx_mult), ETH_MIB_TX_MULT }, - { "tx_64_oct", GEN_STAT(mib.tx_64), ETH_MIB_TX_64 }, - { "tx_65_127_oct", GEN_STAT(mib.tx_65_127), ETH_MIB_TX_65_127 }, - { "tx_128_255_oct", GEN_STAT(mib.tx_128_255), ETH_MIB_TX_128_255 }, - { "tx_256_511_oct", GEN_STAT(mib.tx_256_511), ETH_MIB_TX_256_511 }, - { "tx_512_1023_oct", GEN_STAT(mib.tx_512_1023), ETH_MIB_TX_512_1023}, - { "tx_1024_max_oct", GEN_STAT(mib.tx_1024_max), ETH_MIB_TX_1024_MAX }, - { "tx_jabber", GEN_STAT(mib.tx_jab), ETH_MIB_TX_JAB }, - { "tx_oversize", GEN_STAT(mib.tx_ovr), ETH_MIB_TX_OVR }, - { "tx_fragment", GEN_STAT(mib.tx_frag), ETH_MIB_TX_FRAG }, - { "tx_underrun", GEN_STAT(mib.tx_underrun), ETH_MIB_TX_UNDERRUN }, - { "tx_collisions", GEN_STAT(mib.tx_col), ETH_MIB_TX_COL }, - { "tx_single_collision", GEN_STAT(mib.tx_1_col), ETH_MIB_TX_1_COL }, - { "tx_multiple_collision", GEN_STAT(mib.tx_m_col), ETH_MIB_TX_M_COL }, - { "tx_excess_collision", GEN_STAT(mib.tx_ex_col), ETH_MIB_TX_EX_COL }, - { "tx_late_collision", GEN_STAT(mib.tx_late), ETH_MIB_TX_LATE }, - { "tx_deferred", GEN_STAT(mib.tx_def), ETH_MIB_TX_DEF }, - { "tx_carrier_sense", GEN_STAT(mib.tx_crs), ETH_MIB_TX_CRS }, - { "tx_pause", GEN_STAT(mib.tx_pause), ETH_MIB_TX_PAUSE }, - -}; - -#define BCM_ENET_STATS_LEN \ - (sizeof(bcm_enet_gstrings_stats) / sizeof(struct bcm_enet_stats)) - -static const u32 unused_mib_regs[] = { - ETH_MIB_TX_ALL_OCTETS, - ETH_MIB_TX_ALL_PKTS, - ETH_MIB_RX_ALL_OCTETS, - ETH_MIB_RX_ALL_PKTS, -}; - - -static void bcm_enet_get_drvinfo(struct net_device *netdev, - struct ethtool_drvinfo *drvinfo) -{ - strncpy(drvinfo->driver, bcm_enet_driver_name, 32); - strncpy(drvinfo->version, bcm_enet_driver_version, 32); - strncpy(drvinfo->fw_version, "N/A", 32); - strncpy(drvinfo->bus_info, "bcm63xx", 32); - drvinfo->n_stats = BCM_ENET_STATS_LEN; -} - -static int bcm_enet_get_stats_count(struct net_device *netdev) -{ - return BCM_ENET_STATS_LEN; -} - -static void bcm_enet_get_strings(struct net_device *netdev, - u32 stringset, u8 *data) -{ - int i; - - switch (stringset) { - case ETH_SS_STATS: - for (i = 0; i < BCM_ENET_STATS_LEN; i++) { - memcpy(data + i * ETH_GSTRING_LEN, - bcm_enet_gstrings_stats[i].stat_string, - ETH_GSTRING_LEN); - } - break; - } -} - -static void update_mib_counters(struct bcm_enet_priv *priv) -{ - int i; - - for (i = 0; i < BCM_ENET_STATS_LEN; i++) { - const struct bcm_enet_stats *s; - u32 val; - char *p; - - s = &bcm_enet_gstrings_stats[i]; - if (s->mib_reg == -1) - continue; - - val = enet_readl(priv, ENET_MIB_REG(s->mib_reg)); - p = (char *)priv + s->stat_offset; - - if (s->sizeof_stat == sizeof(u64)) - *(u64 *)p += val; - else - *(u32 *)p += val; - } - - /* also empty unused mib counters to make sure mib counter - * overflow interrupt is cleared */ - for (i = 0; i < ARRAY_SIZE(unused_mib_regs); i++) - (void)enet_readl(priv, ENET_MIB_REG(unused_mib_regs[i])); -} - -static void bcm_enet_update_mib_counters_defer(struct work_struct *t) -{ - struct bcm_enet_priv *priv; - - priv = container_of(t, struct bcm_enet_priv, mib_update_task); - mutex_lock(&priv->mib_update_lock); - update_mib_counters(priv); - mutex_unlock(&priv->mib_update_lock); - - /* reenable mib interrupt */ - if (netif_running(priv->net_dev)) - enet_writel(priv, ENET_IR_MIB, ENET_IRMASK_REG); -} - -static void bcm_enet_get_ethtool_stats(struct net_device *netdev, - struct ethtool_stats *stats, - u64 *data) -{ - struct bcm_enet_priv *priv; - int i; - - priv = netdev_priv(netdev); - - mutex_lock(&priv->mib_update_lock); - update_mib_counters(priv); - - for (i = 0; i < BCM_ENET_STATS_LEN; i++) { - const struct bcm_enet_stats *s; - char *p; - - s = &bcm_enet_gstrings_stats[i]; - p = (char *)priv + s->stat_offset; - data[i] = (s->sizeof_stat == sizeof(u64)) ? - *(u64 *)p : *(u32 *)p; - } - mutex_unlock(&priv->mib_update_lock); -} - -static int bcm_enet_get_settings(struct net_device *dev, - struct ethtool_cmd *cmd) -{ - struct bcm_enet_priv *priv; - - priv = netdev_priv(dev); - - cmd->maxrxpkt = 0; - cmd->maxtxpkt = 0; - - if (priv->has_phy) { - if (!priv->phydev) - return -ENODEV; - return phy_ethtool_gset(priv->phydev, cmd); - } else { - cmd->autoneg = 0; - cmd->speed = (priv->force_speed_100) ? SPEED_100 : SPEED_10; - cmd->duplex = (priv->force_duplex_full) ? - DUPLEX_FULL : DUPLEX_HALF; - cmd->supported = ADVERTISED_10baseT_Half | - ADVERTISED_10baseT_Full | - ADVERTISED_100baseT_Half | - ADVERTISED_100baseT_Full; - cmd->advertising = 0; - cmd->port = PORT_MII; - cmd->transceiver = XCVR_EXTERNAL; - } - return 0; -} - -static int bcm_enet_set_settings(struct net_device *dev, - struct ethtool_cmd *cmd) -{ - struct bcm_enet_priv *priv; - - priv = netdev_priv(dev); - if (priv->has_phy) { - if (!priv->phydev) - return -ENODEV; - return phy_ethtool_sset(priv->phydev, cmd); - } else { - - if (cmd->autoneg || - (cmd->speed != SPEED_100 && cmd->speed != SPEED_10) || - cmd->port != PORT_MII) - return -EINVAL; - - priv->force_speed_100 = (cmd->speed == SPEED_100) ? 1 : 0; - priv->force_duplex_full = (cmd->duplex == DUPLEX_FULL) ? 1 : 0; - - if (netif_running(dev)) - bcm_enet_adjust_link(dev); - return 0; - } -} - -static void bcm_enet_get_ringparam(struct net_device *dev, - struct ethtool_ringparam *ering) -{ - struct bcm_enet_priv *priv; - - priv = netdev_priv(dev); - - /* rx/tx ring is actually only limited by memory */ - ering->rx_max_pending = 8192; - ering->tx_max_pending = 8192; - ering->rx_mini_max_pending = 0; - ering->rx_jumbo_max_pending = 0; - ering->rx_pending = priv->rx_ring_size; - ering->tx_pending = priv->tx_ring_size; -} - -static int bcm_enet_set_ringparam(struct net_device *dev, - struct ethtool_ringparam *ering) -{ - struct bcm_enet_priv *priv; - int was_running; - - priv = netdev_priv(dev); - - was_running = 0; - if (netif_running(dev)) { - bcm_enet_stop(dev); - was_running = 1; - } - - priv->rx_ring_size = ering->rx_pending; - priv->tx_ring_size = ering->tx_pending; - - if (was_running) { - int err; - - err = bcm_enet_open(dev); - if (err) - dev_close(dev); - else - bcm_enet_set_multicast_list(dev); - } - return 0; -} - -static void bcm_enet_get_pauseparam(struct net_device *dev, - struct ethtool_pauseparam *ecmd) -{ - struct bcm_enet_priv *priv; - - priv = netdev_priv(dev); - ecmd->autoneg = priv->pause_auto; - ecmd->rx_pause = priv->pause_rx; - ecmd->tx_pause = priv->pause_tx; -} - -static int bcm_enet_set_pauseparam(struct net_device *dev, - struct ethtool_pauseparam *ecmd) -{ - struct bcm_enet_priv *priv; - - priv = netdev_priv(dev); - - if (priv->has_phy) { - if (ecmd->autoneg && (ecmd->rx_pause != ecmd->tx_pause)) { - /* asymetric pause mode not supported, - * actually possible but integrated PHY has RO - * asym_pause bit */ - return -EINVAL; - } - } else { - /* no pause autoneg on direct mii connection */ - if (ecmd->autoneg) - return -EINVAL; - } - - priv->pause_auto = ecmd->autoneg; - priv->pause_rx = ecmd->rx_pause; - priv->pause_tx = ecmd->tx_pause; - - return 0; -} - -static struct ethtool_ops bcm_enet_ethtool_ops = { - .get_strings = bcm_enet_get_strings, - .get_stats_count = bcm_enet_get_stats_count, - .get_ethtool_stats = bcm_enet_get_ethtool_stats, - .get_settings = bcm_enet_get_settings, - .set_settings = bcm_enet_set_settings, - .get_drvinfo = bcm_enet_get_drvinfo, - .get_link = ethtool_op_get_link, - .get_ringparam = bcm_enet_get_ringparam, - .set_ringparam = bcm_enet_set_ringparam, - .get_pauseparam = bcm_enet_get_pauseparam, - .set_pauseparam = bcm_enet_set_pauseparam, -}; - -static int bcm_enet_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) -{ - struct bcm_enet_priv *priv; - - priv = netdev_priv(dev); - if (priv->has_phy) { - if (!priv->phydev) - return -ENODEV; - return phy_mii_ioctl(priv->phydev, if_mii(rq), cmd); - } else { - struct mii_if_info mii; - - mii.dev = dev; - mii.mdio_read = bcm_enet_mdio_read_mii; - mii.mdio_write = bcm_enet_mdio_write_mii; - mii.phy_id = 0; - mii.phy_id_mask = 0x3f; - mii.reg_num_mask = 0x1f; - return generic_mii_ioctl(&mii, if_mii(rq), cmd, NULL); - } -} - -/* - * calculate actual hardware mtu - */ -static int compute_hw_mtu(struct bcm_enet_priv *priv, int mtu) -{ - int actual_mtu; - - actual_mtu = mtu; - - /* add ethernet header + vlan tag size */ - actual_mtu += VLAN_ETH_HLEN; - - if (actual_mtu < 64 || actual_mtu > BCMENET_MAX_MTU) - return -EINVAL; - - /* - * setup maximum size before we get overflow mark in - * descriptor, note that this will not prevent reception of - * big frames, they will be split into multiple buffers - * anyway - */ - priv->hw_mtu = actual_mtu; - - /* - * align rx buffer size to dma burst len, account FCS since - * it's appended - */ - priv->rx_skb_size = ALIGN(actual_mtu + ETH_FCS_LEN, - BCMENET_DMA_MAXBURST * 4); - return 0; -} - -/* - * adjust mtu, can't be called while device is running - */ -static int bcm_enet_change_mtu(struct net_device *dev, int new_mtu) -{ - int ret; - - if (netif_running(dev)) - return -EBUSY; - - ret = compute_hw_mtu(netdev_priv(dev), new_mtu); - if (ret) - return ret; - dev->mtu = new_mtu; - return 0; -} - -/* - * preinit hardware to allow mii operation while device is down - */ -static void bcm_enet_hw_preinit(struct bcm_enet_priv *priv) -{ - u32 val; - int limit; - - /* make sure mac is disabled */ - bcm_enet_disable_mac(priv); - - /* soft reset mac */ - val = ENET_CTL_SRESET_MASK; - enet_writel(priv, val, ENET_CTL_REG); - wmb(); - - limit = 1000; - do { - val = enet_readl(priv, ENET_CTL_REG); - if (!(val & ENET_CTL_SRESET_MASK)) - break; - udelay(1); - } while (limit--); - - /* select correct mii interface */ - val = enet_readl(priv, ENET_CTL_REG); - if (priv->use_external_mii) - val |= ENET_CTL_EPHYSEL_MASK; - else - val &= ~ENET_CTL_EPHYSEL_MASK; - enet_writel(priv, val, ENET_CTL_REG); - - /* turn on mdc clock */ - enet_writel(priv, (0x1f << ENET_MIISC_MDCFREQDIV_SHIFT) | - ENET_MIISC_PREAMBLEEN_MASK, ENET_MIISC_REG); - - /* set mib counters to self-clear when read */ - val = enet_readl(priv, ENET_MIBCTL_REG); - val |= ENET_MIBCTL_RDCLEAR_MASK; - enet_writel(priv, val, ENET_MIBCTL_REG); -} - -/* - * allocate netdevice, request register memory and register device. - */ -static int __devinit bcm_enet_probe(struct platform_device *pdev) -{ - struct bcm_enet_priv *priv; - struct net_device *dev; - struct bcm63xx_enet_platform_data *pd; - struct resource *res_mem, *res_irq, *res_irq_rx, *res_irq_tx; - struct mii_bus *bus; - const char *clk_name; - unsigned int iomem_size; - int i, ret, mdio_registered, mem_requested; - - /* stop if shared driver failed, assume driver->probe will be - * called in the same order we register devices (correct ?) */ - if (!bcm_enet_shared_base) - return -ENODEV; - - mdio_registered = mem_requested = 0; - - res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - res_irq_rx = platform_get_resource(pdev, IORESOURCE_IRQ, 1); - res_irq_tx = platform_get_resource(pdev, IORESOURCE_IRQ, 2); - if (!res_mem || !res_irq || !res_irq_rx || !res_irq_tx) - return -ENODEV; - - ret = 0; - dev = alloc_etherdev(sizeof(*priv)); - if (!dev) - return -ENOMEM; - priv = netdev_priv(dev); - memset(priv, 0, sizeof(*priv)); - - ret = compute_hw_mtu(priv, dev->mtu); - if (ret) - goto out; - - iomem_size = res_mem->end - res_mem->start + 1; - if (!request_mem_region(res_mem->start, iomem_size, "bcm63xx_enet")) { - ret = -EBUSY; - goto err; - } - mem_requested = 1; - - priv->base = ioremap(res_mem->start, iomem_size); - if (priv->base == NULL) { - ret = -ENOMEM; - goto err; - } - dev->irq = priv->irq = res_irq->start; - priv->irq_rx = res_irq_rx->start; - priv->irq_tx = res_irq_tx->start; - priv->mac_id = pdev->id; - - /* get rx & tx dma channel id for this mac */ - if (priv->mac_id == 0) { - priv->rx_chan = 0; - priv->tx_chan = 1; - clk_name = "enet0"; - } else { - priv->rx_chan = 2; - priv->tx_chan = 3; - clk_name = "enet1"; - } - - priv->mac_clk = clk_get(&pdev->dev, clk_name); - if (IS_ERR(priv->mac_clk)) { - ret = PTR_ERR(priv->mac_clk); - priv->mac_clk = NULL; - goto err; - } - clk_enable(priv->mac_clk); - - /* initialize default and fetch platform data */ - priv->rx_ring_size = BCMENET_DEF_RX_DESC; - priv->tx_ring_size = BCMENET_DEF_TX_DESC; - - pd = pdev->dev.platform_data; - if (pd) { - memcpy(dev->dev_addr, pd->mac_addr, ETH_ALEN); - priv->has_phy = pd->has_phy; - priv->phy_id = pd->phy_id; - priv->has_phy_interrupt = pd->has_phy_interrupt; - priv->phy_interrupt = pd->phy_interrupt; - priv->use_external_mii = !pd->use_internal_phy; - priv->pause_auto = pd->pause_auto; - priv->pause_rx = pd->pause_rx; - priv->pause_tx = pd->pause_tx; - priv->force_duplex_full = pd->force_duplex_full; - priv->force_speed_100 = pd->force_speed_100; - } - - if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) { - /* using internal PHY, enable clock */ - priv->phy_clk = clk_get(&pdev->dev, "ephy"); - if (IS_ERR(priv->phy_clk)) { - ret = PTR_ERR(priv->phy_clk); - priv->phy_clk = NULL; - goto err; - } - clk_enable(priv->phy_clk); - } - - /* do minimal hardware init to be able to probe mii bus */ - bcm_enet_hw_preinit(priv); - - /* MII bus registration */ - if (priv->has_phy) { - bus = &priv->mii_bus; - bus->name = "bcm63xx_enet MII bus"; -#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) - bus->dev = &pdev->dev; -#else - bus->parent = &pdev->dev; -#endif - bus->priv = priv; - bus->read = bcm_enet_mdio_read_phylib; - bus->write = bcm_enet_mdio_write_phylib; - sprintf(bus->id, "%d", priv->mac_id); - - /* only probe bus where we think the PHY is, because - * the mdio read operation return 0 instead of 0xffff - * if a slave is not present on hw */ - bus->phy_mask = ~(1 << priv->phy_id); - - bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL); - if (!bus->irq) { - ret = -ENOMEM; - goto err; - } - - if (priv->has_phy_interrupt) - bus->irq[priv->phy_id] = priv->phy_interrupt; - else - bus->irq[priv->phy_id] = PHY_POLL; - - ret = mdiobus_register(bus); - if (ret) { - dev_err(&pdev->dev, "unable to register mdio bus\n"); - goto err; - } - mdio_registered = 1; - } else { - - /* run platform code to initialize PHY device */ - if (pd->mii_config && - pd->mii_config(dev, 1, bcm_enet_mdio_read_mii, - bcm_enet_mdio_write_mii)) { - dev_err(&pdev->dev, "unable to configure mdio bus\n"); - goto err; - } - } - - spin_lock_init(&priv->rx_lock); - - /* init rx timeout (used for oom) */ - init_timer(&priv->rx_timeout); - priv->rx_timeout.function = bcm_enet_refill_rx_timer; - priv->rx_timeout.data = (unsigned long)dev; - - /* init the mib update lock&work */ - mutex_init(&priv->mib_update_lock); - INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer); - - /* zero mib counters */ - for (i = 0; i < ENET_MIB_REG_COUNT; i++) - enet_writel(priv, 0, ENET_MIB_REG(i)); - - /* register netdevice */ - dev->open = bcm_enet_open; - dev->stop = bcm_enet_stop; - dev->hard_start_xmit = bcm_enet_start_xmit; - dev->get_stats = bcm_enet_get_stats; - dev->set_mac_address = bcm_enet_set_mac_address; - dev->set_multicast_list = bcm_enet_set_multicast_list; - netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16); - dev->do_ioctl = bcm_enet_ioctl; -#ifdef CONFIG_NET_POLL_CONTROLLER - dev->poll_controller = bcm_enet_netpoll; -#endif - dev->change_mtu = bcm_enet_change_mtu; - - SET_ETHTOOL_OPS(dev, &bcm_enet_ethtool_ops); - SET_NETDEV_DEV(dev, &pdev->dev); - - ret = register_netdev(dev); - if (ret) - goto err; - - platform_set_drvdata(pdev, dev); - priv->pdev = pdev; - priv->net_dev = dev; - - return 0; - -err: - if (mem_requested) - release_mem_region(res_mem->start, iomem_size); - if (mdio_registered) - mdiobus_unregister(&priv->mii_bus); - kfree(priv->mii_bus.irq); - if (priv->mac_clk) { - clk_disable(priv->mac_clk); - clk_put(priv->mac_clk); - } - if (priv->phy_clk) { - clk_disable(priv->phy_clk); - clk_put(priv->phy_clk); - } - if (priv->base) { - /* turn off mdc clock */ - enet_writel(priv, 0, ENET_MIISC_REG); - iounmap(priv->base); - } -out: - free_netdev(dev); - return ret; -} - - -/* - * exit func, stops hardware and unregisters netdevice - */ -static int __devexit bcm_enet_remove(struct platform_device *pdev) -{ - struct bcm_enet_priv *priv; - struct net_device *dev; - struct resource *res; - - /* stop netdevice */ - dev = platform_get_drvdata(pdev); - priv = netdev_priv(dev); - unregister_netdev(dev); - - /* turn off mdc clock */ - enet_writel(priv, 0, ENET_MIISC_REG); - - if (priv->has_phy) { - mdiobus_unregister(&priv->mii_bus); - kfree(priv->mii_bus.irq); - } else { - struct bcm63xx_enet_platform_data *pd; - - pd = pdev->dev.platform_data; - if (pd && pd->mii_config) - pd->mii_config(dev, 0, bcm_enet_mdio_read_mii, - bcm_enet_mdio_write_mii); - } - - /* release device resources */ - iounmap(priv->base); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(res->start, res->end - res->start + 1); - - /* disable hw block clocks */ - if (priv->phy_clk) { - clk_disable(priv->phy_clk); - clk_put(priv->phy_clk); - } - clk_disable(priv->mac_clk); - clk_put(priv->mac_clk); - - platform_set_drvdata(pdev, NULL); - free_netdev(dev); - return 0; -} - -struct platform_driver bcm63xx_enet_driver = { - .probe = bcm_enet_probe, - .remove = __devexit_p(bcm_enet_remove), - .driver = { - .name = "bcm63xx_enet", - .owner = THIS_MODULE, - }, -}; - -/* - * reserve & remap memory space shared between all macs - */ -static int __devinit bcm_enet_shared_probe(struct platform_device *pdev) -{ - struct resource *res; - unsigned int iomem_size; - - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res) - return -ENODEV; - - iomem_size = res->end - res->start + 1; - if (!request_mem_region(res->start, iomem_size, "bcm63xx_enet_dma")) - return -EBUSY; - - bcm_enet_shared_base = ioremap(res->start, iomem_size); - if (!bcm_enet_shared_base) { - release_mem_region(res->start, iomem_size); - return -ENOMEM; - } - return 0; -} - -static int __devexit bcm_enet_shared_remove(struct platform_device *pdev) -{ - struct resource *res; - - iounmap(bcm_enet_shared_base); - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - release_mem_region(res->start, res->end - res->start + 1); - return 0; -} - -/* - * this "shared" driver is needed because both macs share a single - * address space - */ -struct platform_driver bcm63xx_enet_shared_driver = { - .probe = bcm_enet_shared_probe, - .remove = __devexit_p(bcm_enet_shared_remove), - .driver = { - .name = "bcm63xx_enet_shared", - .owner = THIS_MODULE, - }, -}; - -/* - * entry point - */ -static int __init bcm_enet_init(void) -{ - int ret; - - ret = platform_driver_register(&bcm63xx_enet_shared_driver); - if (ret) - return ret; - - ret = platform_driver_register(&bcm63xx_enet_driver); - if (ret) - platform_driver_unregister(&bcm63xx_enet_shared_driver); - - return ret; -} - -static void __exit bcm_enet_exit(void) -{ - platform_driver_unregister(&bcm63xx_enet_driver); - platform_driver_unregister(&bcm63xx_enet_shared_driver); -} - - -module_init(bcm_enet_init); -module_exit(bcm_enet_exit); - -MODULE_DESCRIPTION("BCM63xx internal ethernet mac driver"); -MODULE_AUTHOR("Maxime Bizon "); -MODULE_LICENSE("GPL"); diff --git a/target/linux/brcm63xx/files-2.6.30/drivers/net/bcm63xx_enet.h b/target/linux/brcm63xx/files-2.6.30/drivers/net/bcm63xx_enet.h deleted file mode 100644 index dc78f5ae2..000000000 --- a/target/linux/brcm63xx/files-2.6.30/drivers/net/bcm63xx_enet.h +++ /dev/null @@ -1,303 +0,0 @@ -#ifndef BCM63XX_ENET_H_ -#define BCM63XX_ENET_H_ - -#include -#include -#include -#include -#include - -#include -#include -#include - -/* default number of descriptor */ -#define BCMENET_DEF_RX_DESC 64 -#define BCMENET_DEF_TX_DESC 32 - -/* maximum burst len for dma (4 bytes unit) */ -#define BCMENET_DMA_MAXBURST 16 - -/* tx transmit threshold (4 bytes unit), fifo is 256 bytes, the value - * must be low enough so that a DMA transfer of above burst length can - * not overflow the fifo */ -#define BCMENET_TX_FIFO_TRESH 32 - -/* - * hardware maximum rx/tx packet size including FCS, max mtu is - * actually 2047, but if we set max rx size register to 2047 we won't - * get overflow information if packet size is 2048 or above - */ -#define BCMENET_MAX_MTU 2046 - -/* - * rx/tx dma descriptor - */ -struct bcm_enet_desc { - u32 len_stat; - u32 address; -}; - -#define DMADESC_LENGTH_SHIFT 16 -#define DMADESC_LENGTH_MASK (0xfff << DMADESC_LENGTH_SHIFT) -#define DMADESC_OWNER_MASK (1 << 15) -#define DMADESC_EOP_MASK (1 << 14) -#define DMADESC_SOP_MASK (1 << 13) -#define DMADESC_ESOP_MASK (DMADESC_EOP_MASK | DMADESC_SOP_MASK) -#define DMADESC_WRAP_MASK (1 << 12) - -#define DMADESC_UNDER_MASK (1 << 9) -#define DMADESC_APPEND_CRC (1 << 8) -#define DMADESC_OVSIZE_MASK (1 << 4) -#define DMADESC_RXER_MASK (1 << 2) -#define DMADESC_CRC_MASK (1 << 1) -#define DMADESC_OV_MASK (1 << 0) -#define DMADESC_ERR_MASK (DMADESC_UNDER_MASK | \ - DMADESC_OVSIZE_MASK | \ - DMADESC_RXER_MASK | \ - DMADESC_CRC_MASK | \ - DMADESC_OV_MASK) - - -/* - * MIB Counters register definitions -*/ -#define ETH_MIB_TX_GD_OCTETS 0 -#define ETH_MIB_TX_GD_PKTS 1 -#define ETH_MIB_TX_ALL_OCTETS 2 -#define ETH_MIB_TX_ALL_PKTS 3 -#define ETH_MIB_TX_BRDCAST 4 -#define ETH_MIB_TX_MULT 5 -#define ETH_MIB_TX_64 6 -#define ETH_MIB_TX_65_127 7 -#define ETH_MIB_TX_128_255 8 -#define ETH_MIB_TX_256_511 9 -#define ETH_MIB_TX_512_1023 10 -#define ETH_MIB_TX_1024_MAX 11 -#define ETH_MIB_TX_JAB 12 -#define ETH_MIB_TX_OVR 13 -#define ETH_MIB_TX_FRAG 14 -#define ETH_MIB_TX_UNDERRUN 15 -#define ETH_MIB_TX_COL 16 -#define ETH_MIB_TX_1_COL 17 -#define ETH_MIB_TX_M_COL 18 -#define ETH_MIB_TX_EX_COL 19 -#define ETH_MIB_TX_LATE 20 -#define ETH_MIB_TX_DEF 21 -#define ETH_MIB_TX_CRS 22 -#define ETH_MIB_TX_PAUSE 23 - -#define ETH_MIB_RX_GD_OCTETS 32 -#define ETH_MIB_RX_GD_PKTS 33 -#define ETH_MIB_RX_ALL_OCTETS 34 -#define ETH_MIB_RX_ALL_PKTS 35 -#define ETH_MIB_RX_BRDCAST 36 -#define ETH_MIB_RX_MULT 37 -#define ETH_MIB_RX_64 38 -#define ETH_MIB_RX_65_127 39 -#define ETH_MIB_RX_128_255 40 -#define ETH_MIB_RX_256_511 41 -#define ETH_MIB_RX_512_1023 42 -#define ETH_MIB_RX_1024_MAX 43 -#define ETH_MIB_RX_JAB 44 -#define ETH_MIB_RX_OVR 45 -#define ETH_MIB_RX_FRAG 46 -#define ETH_MIB_RX_DROP 47 -#define ETH_MIB_RX_CRC_ALIGN 48 -#define ETH_MIB_RX_UND 49 -#define ETH_MIB_RX_CRC 50 -#define ETH_MIB_RX_ALIGN 51 -#define ETH_MIB_RX_SYM 52 -#define ETH_MIB_RX_PAUSE 53 -#define ETH_MIB_RX_CNTRL 54 - - -struct bcm_enet_mib_counters { - u64 tx_gd_octets; - u32 tx_gd_pkts; - u32 tx_all_octets; - u32 tx_all_pkts; - u32 tx_brdcast; - u32 tx_mult; - u32 tx_64; - u32 tx_65_127; - u32 tx_128_255; - u32 tx_256_511; - u32 tx_512_1023; - u32 tx_1024_max; - u32 tx_jab; - u32 tx_ovr; - u32 tx_frag; - u32 tx_underrun; - u32 tx_col; - u32 tx_1_col; - u32 tx_m_col; - u32 tx_ex_col; - u32 tx_late; - u32 tx_def; - u32 tx_crs; - u32 tx_pause; - u64 rx_gd_octets; - u32 rx_gd_pkts; - u32 rx_all_octets; - u32 rx_all_pkts; - u32 rx_brdcast; - u32 rx_mult; - u32 rx_64; - u32 rx_65_127; - u32 rx_128_255; - u32 rx_256_511; - u32 rx_512_1023; - u32 rx_1024_max; - u32 rx_jab; - u32 rx_ovr; - u32 rx_frag; - u32 rx_drop; - u32 rx_crc_align; - u32 rx_und; - u32 rx_crc; - u32 rx_align; - u32 rx_sym; - u32 rx_pause; - u32 rx_cntrl; -}; - - -struct bcm_enet_priv { - - /* mac id (from platform device id) */ - int mac_id; - - /* base remapped address of device */ - void __iomem *base; - - /* mac irq, rx_dma irq, tx_dma irq */ - int irq; - int irq_rx; - int irq_tx; - - /* hw view of rx & tx dma ring */ - dma_addr_t rx_desc_dma; - dma_addr_t tx_desc_dma; - - /* allocated size (in bytes) for rx & tx dma ring */ - unsigned int rx_desc_alloc_size; - unsigned int tx_desc_alloc_size; - - - struct napi_struct napi; - - /* dma channel id for rx */ - int rx_chan; - - /* number of dma desc in rx ring */ - int rx_ring_size; - - /* cpu view of rx dma ring */ - struct bcm_enet_desc *rx_desc_cpu; - - /* current number of armed descriptor given to hardware for rx */ - int rx_desc_count; - - /* next rx descriptor to fetch from hardware */ - int rx_curr_desc; - - /* next dirty rx descriptor to refill */ - int rx_dirty_desc; - - /* size of allocated rx skbs */ - unsigned int rx_skb_size; - - /* list of skb given to hw for rx */ - struct sk_buff **rx_skb; - - /* used when rx skb allocation failed, so we defer rx queue - * refill */ - struct timer_list rx_timeout; - - /* lock rx_timeout against rx normal operation */ - spinlock_t rx_lock; - - - /* dma channel id for tx */ - int tx_chan; - - /* number of dma desc in tx ring */ - int tx_ring_size; - - /* cpu view of rx dma ring */ - struct bcm_enet_desc *tx_desc_cpu; - - /* number of available descriptor for tx */ - int tx_desc_count; - - /* next tx descriptor avaiable */ - int tx_curr_desc; - - /* next dirty tx descriptor to reclaim */ - int tx_dirty_desc; - - /* list of skb given to hw for tx */ - struct sk_buff **tx_skb; - - /* lock used by tx reclaim and xmit */ - spinlock_t tx_lock; - - - /* set if internal phy is ignored and external mii interface - * is selected */ - int use_external_mii; - - /* set if a phy is connected, phy address must be known, - * probing is not possible */ - int has_phy; - int phy_id; - - /* set if connected phy has an associated irq */ - int has_phy_interrupt; - int phy_interrupt; - - /* used when a phy is connected (phylib used) */ - struct mii_bus mii_bus; - struct phy_device *phydev; - int old_link; - int old_duplex; - int old_pause; - - /* used when no phy is connected */ - int force_speed_100; - int force_duplex_full; - - /* pause parameters */ - int pause_auto; - int pause_rx; - int pause_tx; - - /* stats */ - struct net_device_stats stats; - struct bcm_enet_mib_counters mib; - - /* after mib interrupt, mib registers update is done in this - * work queue */ - struct work_struct mib_update_task; - - /* lock mib update between userspace request and workqueue */ - struct mutex mib_update_lock; - - /* mac clock */ - struct clk *mac_clk; - - /* phy clock if internal phy is used */ - struct clk *phy_clk; - - /* network device reference */ - struct net_device *net_dev; - - /* platform device reference */ - struct platform_device *pdev; - - /* maximum hardware transmit/receive size */ - unsigned int hw_mtu; -}; - -#endif /* ! BCM63XX_ENET_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/drivers/net/phy/bcm63xx.c b/target/linux/brcm63xx/files-2.6.30/drivers/net/phy/bcm63xx.c deleted file mode 100644 index 4fed95e83..000000000 --- a/target/linux/brcm63xx/files-2.6.30/drivers/net/phy/bcm63xx.c +++ /dev/null @@ -1,132 +0,0 @@ -/* - * Driver for Broadcom 63xx SOCs integrated PHYs - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ -#include -#include - -#define MII_BCM63XX_IR 0x1a /* interrupt register */ -#define MII_BCM63XX_IR_EN 0x4000 /* global interrupt enable */ -#define MII_BCM63XX_IR_DUPLEX 0x0800 /* duplex changed */ -#define MII_BCM63XX_IR_SPEED 0x0400 /* speed changed */ -#define MII_BCM63XX_IR_LINK 0x0200 /* link changed */ -#define MII_BCM63XX_IR_GMASK 0x0100 /* global interrupt mask */ - -MODULE_DESCRIPTION("Broadcom 63xx internal PHY driver"); -MODULE_AUTHOR("Maxime Bizon "); -MODULE_LICENSE("GPL"); - -static int bcm63xx_config_init(struct phy_device *phydev) -{ - int reg, err; - - reg = phy_read(phydev, MII_BCM63XX_IR); - if (reg < 0) - return reg; - - /* Mask interrupts globally. */ - reg |= MII_BCM63XX_IR_GMASK; - err = phy_write(phydev, MII_BCM63XX_IR, reg); - if (err < 0) - return err; - - /* Unmask events we are interested in */ - reg = ~(MII_BCM63XX_IR_DUPLEX | - MII_BCM63XX_IR_SPEED | - MII_BCM63XX_IR_LINK) | - MII_BCM63XX_IR_EN; - err = phy_write(phydev, MII_BCM63XX_IR, reg); - if (err < 0) - return err; - return 0; -} - -static int bcm63xx_ack_interrupt(struct phy_device *phydev) -{ - int reg; - - /* Clear pending interrupts. */ - reg = phy_read(phydev, MII_BCM63XX_IR); - if (reg < 0) - return reg; - - return 0; -} - -static int bcm63xx_config_intr(struct phy_device *phydev) -{ - int reg, err; - - reg = phy_read(phydev, MII_BCM63XX_IR); - if (reg < 0) - return reg; - - if (phydev->interrupts == PHY_INTERRUPT_ENABLED) - reg &= ~MII_BCM63XX_IR_GMASK; - else - reg |= MII_BCM63XX_IR_GMASK; - - err = phy_write(phydev, MII_BCM63XX_IR, reg); - return err; -} - -static struct phy_driver bcm63xx_1_driver = { - .phy_id = 0x00406000, - .phy_id_mask = 0xfffffc00, - .name = "Broadcom BCM63XX (1)", - /* ASYM_PAUSE bit is marked RO in datasheet, so don't cheat */ - .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), - .flags = PHY_HAS_INTERRUPT, - .config_init = bcm63xx_config_init, - .config_aneg = genphy_config_aneg, - .read_status = genphy_read_status, - .ack_interrupt = bcm63xx_ack_interrupt, - .config_intr = bcm63xx_config_intr, - .driver = { .owner = THIS_MODULE }, -}; - -/* same phy as above, with just a different OUI */ -static struct phy_driver bcm63xx_2_driver = { - .phy_id = 0x002bdc00, - .phy_id_mask = 0xfffffc00, - .name = "Broadcom BCM63XX (2)", - .features = (PHY_BASIC_FEATURES | SUPPORTED_Pause), - .flags = PHY_HAS_INTERRUPT, - .config_init = bcm63xx_config_init, - .config_aneg = genphy_config_aneg, - .read_status = genphy_read_status, - .ack_interrupt = bcm63xx_ack_interrupt, - .config_intr = bcm63xx_config_intr, - .driver = { .owner = THIS_MODULE }, -}; - -static int __init bcm63xx_phy_init(void) -{ - int ret; - - ret = phy_driver_register(&bcm63xx_1_driver); - if (ret) - goto out_63xx_1; - ret = phy_driver_register(&bcm63xx_2_driver); - if (ret) - goto out_63xx_2; - return ret; - -out_63xx_2: - phy_driver_unregister(&bcm63xx_1_driver); -out_63xx_1: - return ret; -} - -static void __exit bcm63xx_phy_exit(void) -{ - phy_driver_unregister(&bcm63xx_1_driver); - phy_driver_unregister(&bcm63xx_2_driver); -} - -module_init(bcm63xx_phy_init); -module_exit(bcm63xx_phy_exit); diff --git a/target/linux/brcm63xx/files-2.6.30/drivers/pcmcia/bcm63xx_pcmcia.c b/target/linux/brcm63xx/files-2.6.30/drivers/pcmcia/bcm63xx_pcmcia.c deleted file mode 100644 index 383e322d0..000000000 --- a/target/linux/brcm63xx/files-2.6.30/drivers/pcmcia/bcm63xx_pcmcia.c +++ /dev/null @@ -1,536 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include "bcm63xx_pcmcia.h" - -#define PFX "bcm63xx_pcmcia: " - -#ifdef CONFIG_CARDBUS -/* if cardbus is used, platform device needs reference to actual pci - * device */ -static struct pci_dev *bcm63xx_cb_dev; -#endif - -/* - * read/write helper for pcmcia regs - */ -static inline u32 pcmcia_readl(struct bcm63xx_pcmcia_socket *skt, u32 off) -{ - return bcm_readl(skt->base + off); -} - -static inline void pcmcia_writel(struct bcm63xx_pcmcia_socket *skt, - u32 val, u32 off) -{ - bcm_writel(val, skt->base + off); -} - -/* - * (Re-)Initialise the socket, turning on status interrupts and PCMCIA - * bus. This must wait for power to stabilise so that the card status - * signals report correctly. - */ -static int bcm63xx_pcmcia_sock_init(struct pcmcia_socket *sock) -{ - struct bcm63xx_pcmcia_socket *skt; - skt = sock->driver_data; - return 0; -} - -/* - * Remove power on the socket, disable IRQs from the card. - * Turn off status interrupts, and disable the PCMCIA bus. - */ -static int bcm63xx_pcmcia_suspend(struct pcmcia_socket *sock) -{ - struct bcm63xx_pcmcia_socket *skt; - skt = sock->driver_data; - return 0; -} - -/* - * Implements the set_socket() operation for the in-kernel PCMCIA - * service (formerly SS_SetSocket in Card Services). We more or - * less punt all of this work and let the kernel handle the details - * of power configuration, reset, &c. We also record the value of - * `state' in order to regurgitate it to the PCMCIA core later. - */ -static int bcm63xx_pcmcia_set_socket(struct pcmcia_socket *sock, - socket_state_t *state) -{ - struct bcm63xx_pcmcia_socket *skt; - unsigned long flags; - u32 val; - - skt = sock->driver_data; - - spin_lock_irqsave(&skt->lock, flags); - - /* apply requested socket power */ - /* FIXME: hardware can't do this */ - - /* apply socket reset */ - val = pcmcia_readl(skt, PCMCIA_C1_REG); - if (state->flags & SS_RESET) - val |= PCMCIA_C1_RESET_MASK; - else - val &= ~PCMCIA_C1_RESET_MASK; - - /* reverse reset logic for cardbus card */ - if (skt->card_detected && (skt->card_type & CARD_CARDBUS)) - val ^= PCMCIA_C1_RESET_MASK; - - pcmcia_writel(skt, val, PCMCIA_C1_REG); - - /* keep requested state for event reporting */ - skt->requested_state = *state; - - spin_unlock_irqrestore(&skt->lock, flags); - - return 0; -} - -/* - * identity cardtype from VS[12] input, CD[12] input while only VS2 is - * floating, and CD[12] input while only VS1 is floating - */ -enum { - IN_VS1 = (1 << 0), - IN_VS2 = (1 << 1), - IN_CD1_VS2H = (1 << 2), - IN_CD2_VS2H = (1 << 3), - IN_CD1_VS1H = (1 << 4), - IN_CD2_VS1H = (1 << 5), -}; - -static const u8 vscd_to_cardtype[] = { - - /* VS1 float, VS2 float */ - [IN_VS1 | IN_VS2] = (CARD_PCCARD | CARD_5V), - - /* VS1 grounded, VS2 float */ - [IN_VS2] = (CARD_PCCARD | CARD_5V | CARD_3V), - - /* VS1 grounded, VS2 grounded */ - [0] = (CARD_PCCARD | CARD_5V | CARD_3V | CARD_XV), - - /* VS1 tied to CD1, VS2 float */ - [IN_VS1 | IN_VS2 | IN_CD1_VS1H] = (CARD_CARDBUS | CARD_3V), - - /* VS1 grounded, VS2 tied to CD2 */ - [IN_VS2 | IN_CD2_VS2H] = (CARD_CARDBUS | CARD_3V | CARD_XV), - - /* VS1 tied to CD2, VS2 grounded */ - [IN_VS1 | IN_CD2_VS1H] = (CARD_CARDBUS | CARD_3V | CARD_XV | CARD_YV), - - /* VS1 float, VS2 grounded */ - [IN_VS1] = (CARD_PCCARD | CARD_XV), - - /* VS1 float, VS2 tied to CD2 */ - [IN_VS1 | IN_VS2 | IN_CD2_VS2H] = (CARD_CARDBUS | CARD_3V), - - /* VS1 float, VS2 tied to CD1 */ - [IN_VS1 | IN_VS2 | IN_CD1_VS2H] = (CARD_CARDBUS | CARD_XV | CARD_YV), - - /* VS1 tied to CD2, VS2 float */ - [IN_VS1 | IN_VS2 | IN_CD2_VS1H] = (CARD_CARDBUS | CARD_YV), - - /* VS2 grounded, VS1 is tied to CD1, CD2 is grounded */ - [IN_VS1 | IN_CD1_VS1H] = 0, /* ignore cardbay */ -}; - -/* - * poll hardware to check card insertion status - */ -static unsigned int __get_socket_status(struct bcm63xx_pcmcia_socket *skt) -{ - unsigned int stat; - u32 val; - - stat = 0; - - /* check CD for card presence */ - val = pcmcia_readl(skt, PCMCIA_C1_REG); - - if (!(val & PCMCIA_C1_CD1_MASK) && !(val & PCMCIA_C1_CD2_MASK)) - stat |= SS_DETECT; - - /* if new insertion, detect cardtype */ - if ((stat & SS_DETECT) && !skt->card_detected) { - unsigned int stat = 0; - - /* float VS1, float VS2 */ - val |= PCMCIA_C1_VS1OE_MASK; - val |= PCMCIA_C1_VS2OE_MASK; - pcmcia_writel(skt, val, PCMCIA_C1_REG); - - /* wait for output to stabilize and read VS[12] */ - udelay(10); - val = pcmcia_readl(skt, PCMCIA_C1_REG); - stat |= (val & PCMCIA_C1_VS1_MASK) ? IN_VS1 : 0; - stat |= (val & PCMCIA_C1_VS2_MASK) ? IN_VS2 : 0; - - /* drive VS1 low, float VS2 */ - val &= ~PCMCIA_C1_VS1OE_MASK; - val |= PCMCIA_C1_VS2OE_MASK; - pcmcia_writel(skt, val, PCMCIA_C1_REG); - - /* wait for output to stabilize and read CD[12] */ - udelay(10); - val = pcmcia_readl(skt, PCMCIA_C1_REG); - stat |= (val & PCMCIA_C1_CD1_MASK) ? IN_CD1_VS2H : 0; - stat |= (val & PCMCIA_C1_CD2_MASK) ? IN_CD2_VS2H : 0; - - /* float VS1, drive VS2 low */ - val |= PCMCIA_C1_VS1OE_MASK; - val &= ~PCMCIA_C1_VS2OE_MASK; - pcmcia_writel(skt, val, PCMCIA_C1_REG); - - /* wait for output to stabilize and read CD[12] */ - udelay(10); - val = pcmcia_readl(skt, PCMCIA_C1_REG); - stat |= (val & PCMCIA_C1_CD1_MASK) ? IN_CD1_VS1H : 0; - stat |= (val & PCMCIA_C1_CD2_MASK) ? IN_CD2_VS1H : 0; - - /* guess cardtype from all this */ - skt->card_type = vscd_to_cardtype[stat]; - if (!skt->card_type) - printk(KERN_ERR PFX "unsupported card type\n"); - - /* drive both VS pin to 0 again */ - val &= ~(PCMCIA_C1_VS1OE_MASK | PCMCIA_C1_VS2OE_MASK); - - /* enable correct logic */ - val &= ~(PCMCIA_C1_EN_PCMCIA_MASK | PCMCIA_C1_EN_CARDBUS_MASK); - if (skt->card_type & CARD_PCCARD) - val |= PCMCIA_C1_EN_PCMCIA_MASK; - else - val |= PCMCIA_C1_EN_CARDBUS_MASK; - - pcmcia_writel(skt, val, PCMCIA_C1_REG); - } - skt->card_detected = (stat & SS_DETECT) ? 1 : 0; - - /* report card type/voltage */ - if (skt->card_type & CARD_CARDBUS) - stat |= SS_CARDBUS; - if (skt->card_type & CARD_3V) - stat |= SS_3VCARD; - if (skt->card_type & CARD_XV) - stat |= SS_XVCARD; - stat |= SS_POWERON; - - if (gpio_get_value(skt->pd->ready_gpio)) - stat |= SS_READY; - - return stat; -} - -/* - * core request to get current socket status - */ -static int bcm63xx_pcmcia_get_status(struct pcmcia_socket *sock, - unsigned int *status) -{ - struct bcm63xx_pcmcia_socket *skt; - - skt = sock->driver_data; - - spin_lock_bh(&skt->lock); - *status = __get_socket_status(skt); - spin_unlock_bh(&skt->lock); - - return 0; -} - -/* - * socket polling timer callback - */ -static void bcm63xx_pcmcia_poll(unsigned long data) -{ - struct bcm63xx_pcmcia_socket *skt; - unsigned int stat, events; - - skt = (struct bcm63xx_pcmcia_socket *)data; - - spin_lock_bh(&skt->lock); - - stat = __get_socket_status(skt); - - /* keep only changed bits, and mask with required one from the - * core */ - events = (stat ^ skt->old_status) & skt->requested_state.csc_mask; - skt->old_status = stat; - spin_unlock_bh(&skt->lock); - - if (events) - pcmcia_parse_events(&skt->socket, events); - - mod_timer(&skt->timer, - jiffies + msecs_to_jiffies(BCM63XX_PCMCIA_POLL_RATE)); -} - -static int bcm63xx_pcmcia_set_io_map(struct pcmcia_socket *sock, - struct pccard_io_map *map) -{ - /* this doesn't seem to be called by pcmcia layer if static - * mapping is used */ - return 0; -} - -static int bcm63xx_pcmcia_set_mem_map(struct pcmcia_socket *sock, - struct pccard_mem_map *map) -{ - struct bcm63xx_pcmcia_socket *skt; - struct resource *res; - - skt = sock->driver_data; - if (map->flags & MAP_ATTRIB) - res = skt->attr_res; - else - res = skt->common_res; - - map->static_start = res->start + map->card_start; - return 0; -} - -static struct pccard_operations bcm63xx_pcmcia_operations = { - .init = bcm63xx_pcmcia_sock_init, - .suspend = bcm63xx_pcmcia_suspend, - .get_status = bcm63xx_pcmcia_get_status, - .set_socket = bcm63xx_pcmcia_set_socket, - .set_io_map = bcm63xx_pcmcia_set_io_map, - .set_mem_map = bcm63xx_pcmcia_set_mem_map, -}; - -/* - * register pcmcia socket to core - */ -static int bcm63xx_drv_pcmcia_probe(struct platform_device *pdev) -{ - struct bcm63xx_pcmcia_socket *skt; - struct pcmcia_socket *sock; - struct resource *res, *irq_res; - unsigned int regmem_size = 0, iomem_size = 0; - u32 val; - int ret; - - skt = kzalloc(sizeof(*skt), GFP_KERNEL); - if (!skt) - return -ENOMEM; - spin_lock_init(&skt->lock); - sock = &skt->socket; - sock->driver_data = skt; - - /* make sure we have all resources we need */ - skt->common_res = platform_get_resource(pdev, IORESOURCE_MEM, 1); - skt->attr_res = platform_get_resource(pdev, IORESOURCE_MEM, 2); - irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - skt->pd = pdev->dev.platform_data; - if (!skt->common_res || !skt->attr_res || !irq_res || !skt->pd) { - ret = -EINVAL; - goto err; - } - - /* remap pcmcia registers */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 0); - regmem_size = res->end - res->start + 1; - if (!request_mem_region(res->start, regmem_size, "bcm63xx_pcmcia")) { - ret = -EINVAL; - goto err; - } - skt->reg_res = res; - - skt->base = ioremap(res->start, regmem_size); - if (!skt->base) { - ret = -ENOMEM; - goto err; - } - - /* remap io registers */ - res = platform_get_resource(pdev, IORESOURCE_MEM, 3); - iomem_size = res->end - res->start + 1; - skt->io_base = ioremap(res->start, iomem_size); - if (!skt->io_base) { - ret = -ENOMEM; - goto err; - } - - /* resources are static */ - sock->resource_ops = &pccard_static_ops; - sock->ops = &bcm63xx_pcmcia_operations; - sock->owner = THIS_MODULE; - sock->dev.parent = &pdev->dev; - sock->features = SS_CAP_STATIC_MAP | SS_CAP_PCCARD; - sock->io_offset = (unsigned long)skt->io_base; - sock->pci_irq = irq_res->start; - -#ifdef CONFIG_CARDBUS - sock->cb_dev = bcm63xx_cb_dev; - if (bcm63xx_cb_dev) - sock->features |= SS_CAP_CARDBUS; -#endif - - /* assume common & attribute memory have the same size */ - sock->map_size = skt->common_res->end - skt->common_res->start + 1; - - /* initialize polling timer */ - setup_timer(&skt->timer, bcm63xx_pcmcia_poll, (unsigned long)skt); - - /* initialize pcmcia control register, drive VS[12] to 0, - * leave CB IDSEL to the old value since it is set by the PCI - * layer */ - val = pcmcia_readl(skt, PCMCIA_C1_REG); - val &= PCMCIA_C1_CBIDSEL_MASK; - val |= PCMCIA_C1_EN_PCMCIA_GPIO_MASK; - pcmcia_writel(skt, val, PCMCIA_C1_REG); - - /* FIXME set correct pcmcia timings */ - val = PCMCIA_C2_DATA16_MASK; - val |= 10 << PCMCIA_C2_RWCOUNT_SHIFT; - val |= 6 << PCMCIA_C2_INACTIVE_SHIFT; - val |= 3 << PCMCIA_C2_SETUP_SHIFT; - val |= 3 << PCMCIA_C2_HOLD_SHIFT; - pcmcia_writel(skt, val, PCMCIA_C2_REG); - - /* request and setup ready gpio */ - ret = gpio_request(skt->pd->ready_gpio, "bcm63xx_pcmcia"); - if (ret < 0) - goto err; - - ret = gpio_direction_input(skt->pd->ready_gpio); - if (ret < 0) - goto err_gpio; - - ret = pcmcia_register_socket(sock); - if (ret) - goto err_gpio; - - /* start polling socket */ - mod_timer(&skt->timer, - jiffies + msecs_to_jiffies(BCM63XX_PCMCIA_POLL_RATE)); - - platform_set_drvdata(pdev, skt); - return 0; - -err_gpio: - gpio_free(skt->pd->ready_gpio); - -err: - if (skt->io_base) - iounmap(skt->io_base); - if (skt->base) - iounmap(skt->base); - if (skt->reg_res) - release_mem_region(skt->reg_res->start, regmem_size); - kfree(skt); - return ret; -} - -static int bcm63xx_drv_pcmcia_remove(struct platform_device *pdev) -{ - struct bcm63xx_pcmcia_socket *skt; - struct resource *res; - - skt = platform_get_drvdata(pdev); - del_timer_sync(&skt->timer); - iounmap(skt->base); - iounmap(skt->io_base); - res = skt->reg_res; - release_mem_region(res->start, res->end - res->start + 1); - gpio_free(skt->pd->ready_gpio); - platform_set_drvdata(pdev, NULL); - kfree(skt); - return 0; -} - -struct platform_driver bcm63xx_pcmcia_driver = { - .probe = bcm63xx_drv_pcmcia_probe, - .remove = __devexit_p(bcm63xx_drv_pcmcia_remove), - .driver = { - .name = "bcm63xx_pcmcia", - .owner = THIS_MODULE, - }, -}; - -#ifdef CONFIG_CARDBUS -static int __devinit bcm63xx_cb_probe(struct pci_dev *dev, - const struct pci_device_id *id) -{ - /* keep pci device */ - bcm63xx_cb_dev = dev; - return platform_driver_register(&bcm63xx_pcmcia_driver); -} - -static void __devexit bcm63xx_cb_exit(struct pci_dev *dev) -{ - platform_driver_unregister(&bcm63xx_pcmcia_driver); - bcm63xx_cb_dev = NULL; -} - -static struct pci_device_id bcm63xx_cb_table[] = { - { - .vendor = PCI_VENDOR_ID_BROADCOM, - .device = PCI_ANY_ID, - .subvendor = PCI_VENDOR_ID_BROADCOM, - .subdevice = PCI_ANY_ID, - .class = PCI_CLASS_BRIDGE_CARDBUS << 8, - .class_mask = ~0, - }, - {} -}; - -MODULE_DEVICE_TABLE(pci, bcm63xx_cb_table); - -static struct pci_driver bcm63xx_cardbus_driver = { - .name = "yenta_cardbus", - .id_table = bcm63xx_cb_table, - .probe = bcm63xx_cb_probe, - .remove = __devexit_p(bcm63xx_cb_exit), -}; -#endif - -/* - * if cardbus support is enabled, register our platform device after - * our fake cardbus bridge has been registered - */ -static int __init bcm63xx_pcmcia_init(void) -{ -#ifdef CONFIG_CARDBUS - return pci_register_driver(&bcm63xx_cardbus_driver); -#else - return platform_driver_register(&bcm63xx_pcmcia_driver); -#endif -} - -static void __exit bcm63xx_pcmcia_exit(void) -{ -#ifdef CONFIG_CARDBUS - return pci_unregister_driver(&bcm63xx_cardbus_driver); -#else - platform_driver_unregister(&bcm63xx_pcmcia_driver); -#endif -} - -module_init(bcm63xx_pcmcia_init); -module_exit(bcm63xx_pcmcia_exit); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Maxime Bizon "); -MODULE_DESCRIPTION("Linux PCMCIA Card Services: bcm63xx Socket Controller"); diff --git a/target/linux/brcm63xx/files-2.6.30/drivers/pcmcia/bcm63xx_pcmcia.h b/target/linux/brcm63xx/files-2.6.30/drivers/pcmcia/bcm63xx_pcmcia.h deleted file mode 100644 index 85de86696..000000000 --- a/target/linux/brcm63xx/files-2.6.30/drivers/pcmcia/bcm63xx_pcmcia.h +++ /dev/null @@ -1,65 +0,0 @@ -#ifndef BCM63XX_PCMCIA_H_ -#define BCM63XX_PCMCIA_H_ - -#include -#include -#include -#include - -/* socket polling rate in ms */ -#define BCM63XX_PCMCIA_POLL_RATE 500 - -enum { - CARD_CARDBUS = (1 << 0), - - CARD_PCCARD = (1 << 1), - - CARD_5V = (1 << 2), - - CARD_3V = (1 << 3), - - CARD_XV = (1 << 4), - - CARD_YV = (1 << 5), -}; - -struct bcm63xx_pcmcia_socket { - struct pcmcia_socket socket; - - /* platform specific data */ - struct bcm63xx_pcmcia_platform_data *pd; - - /* all regs access are protected by this spinlock */ - spinlock_t lock; - - /* pcmcia registers resource */ - struct resource *reg_res; - - /* base remapped address of registers */ - void __iomem *base; - - /* whether a card is detected at the moment */ - int card_detected; - - /* type of detected card (mask of above enum) */ - u8 card_type; - - /* keep last socket status to implement event reporting */ - unsigned int old_status; - - /* backup of requested socket state */ - socket_state_t requested_state; - - /* timer used for socket status polling */ - struct timer_list timer; - - /* attribute/common memory resources */ - struct resource *attr_res; - struct resource *common_res; - struct resource *io_res; - - /* base address of io memory */ - void __iomem *io_base; -}; - -#endif /* BCM63XX_PCMCIA_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/drivers/serial/bcm63xx_uart.c b/target/linux/brcm63xx/files-2.6.30/drivers/serial/bcm63xx_uart.c deleted file mode 100644 index 606f4d68c..000000000 --- a/target/linux/brcm63xx/files-2.6.30/drivers/serial/bcm63xx_uart.c +++ /dev/null @@ -1,890 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Derived from many drivers using generic_serial interface. - * - * Copyright (C) 2008 Maxime Bizon - * - * Serial driver for BCM63xx integrated UART. - * - * Hardware flow control was _not_ tested since I only have RX/TX on - * my board. - */ - -#if defined(CONFIG_SERIAL_BCM63XX_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) -#define SUPPORT_SYSRQ -#endif - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include - -#define BCM63XX_NR_UARTS 1 - -static struct uart_port ports[BCM63XX_NR_UARTS]; - -/* - * rx interrupt mask / stat - * - * mask: - * - rx fifo full - * - rx fifo above threshold - * - rx fifo not empty for too long - */ -#define UART_RX_INT_MASK (UART_IR_MASK(UART_IR_RXOVER) | \ - UART_IR_MASK(UART_IR_RXTHRESH) | \ - UART_IR_MASK(UART_IR_RXTIMEOUT)) - -#define UART_RX_INT_STAT (UART_IR_STAT(UART_IR_RXOVER) | \ - UART_IR_STAT(UART_IR_RXTHRESH) | \ - UART_IR_STAT(UART_IR_RXTIMEOUT)) - -/* - * tx interrupt mask / stat - * - * mask: - * - tx fifo empty - * - tx fifo below threshold - */ -#define UART_TX_INT_MASK (UART_IR_MASK(UART_IR_TXEMPTY) | \ - UART_IR_MASK(UART_IR_TXTRESH)) - -#define UART_TX_INT_STAT (UART_IR_STAT(UART_IR_TXEMPTY) | \ - UART_IR_STAT(UART_IR_TXTRESH)) - -/* - * external input interrupt - * - * mask: any edge on CTS, DCD - */ -#define UART_EXTINP_INT_MASK (UART_EXTINP_IRMASK(UART_EXTINP_IR_CTS) | \ - UART_EXTINP_IRMASK(UART_EXTINP_IR_DCD)) - -/* - * handy uart register accessor - */ -static inline unsigned int bcm_uart_readl(struct uart_port *port, - unsigned int offset) -{ - return bcm_readl(port->membase + offset); -} - -static inline void bcm_uart_writel(struct uart_port *port, - unsigned int value, unsigned int offset) -{ - bcm_writel(value, port->membase + offset); -} - -/* - * serial core request to check if uart tx fifo is empty - */ -static unsigned int bcm_uart_tx_empty(struct uart_port *port) -{ - unsigned int val; - - val = bcm_uart_readl(port, UART_IR_REG); - return (val & UART_IR_STAT(UART_IR_TXEMPTY)) ? 1 : 0; -} - -/* - * serial core request to set RTS and DTR pin state and loopback mode - */ -static void bcm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl) -{ - unsigned int val; - - val = bcm_uart_readl(port, UART_MCTL_REG); - val &= ~(UART_MCTL_DTR_MASK | UART_MCTL_RTS_MASK); - /* invert of written value is reflected on the pin */ - if (!(mctrl & TIOCM_DTR)) - val |= UART_MCTL_DTR_MASK; - if (!(mctrl & TIOCM_RTS)) - val |= UART_MCTL_RTS_MASK; - bcm_uart_writel(port, val, UART_MCTL_REG); - - val = bcm_uart_readl(port, UART_CTL_REG); - if (mctrl & TIOCM_LOOP) - val |= UART_CTL_LOOPBACK_MASK; - else - val &= ~UART_CTL_LOOPBACK_MASK; - bcm_uart_writel(port, val, UART_CTL_REG); -} - -/* - * serial core request to return RI, CTS, DCD and DSR pin state - */ -static unsigned int bcm_uart_get_mctrl(struct uart_port *port) -{ - unsigned int val, mctrl; - - mctrl = 0; - val = bcm_uart_readl(port, UART_EXTINP_REG); - if (val & UART_EXTINP_RI_MASK) - mctrl |= TIOCM_RI; - if (val & UART_EXTINP_CTS_MASK) - mctrl |= TIOCM_CTS; - if (val & UART_EXTINP_DCD_MASK) - mctrl |= TIOCM_CD; - if (val & UART_EXTINP_DSR_MASK) - mctrl |= TIOCM_DSR; - return mctrl; -} - -/* - * serial core request to disable tx ASAP (used for flow control) - */ -static void bcm_uart_stop_tx(struct uart_port *port) -{ - unsigned int val; - - val = bcm_uart_readl(port, UART_CTL_REG); - val &= ~(UART_CTL_TXEN_MASK); - bcm_uart_writel(port, val, UART_CTL_REG); - - val = bcm_uart_readl(port, UART_IR_REG); - val &= ~UART_TX_INT_MASK; - bcm_uart_writel(port, val, UART_IR_REG); -} - -/* - * serial core request to (re)enable tx - */ -static void bcm_uart_start_tx(struct uart_port *port) -{ - unsigned int val; - - val = bcm_uart_readl(port, UART_IR_REG); - val |= UART_TX_INT_MASK; - bcm_uart_writel(port, val, UART_IR_REG); - - val = bcm_uart_readl(port, UART_CTL_REG); - val |= UART_CTL_TXEN_MASK; - bcm_uart_writel(port, val, UART_CTL_REG); -} - -/* - * serial core request to stop rx, called before port shutdown - */ -static void bcm_uart_stop_rx(struct uart_port *port) -{ - unsigned int val; - - val = bcm_uart_readl(port, UART_IR_REG); - val &= ~UART_RX_INT_MASK; - bcm_uart_writel(port, val, UART_IR_REG); -} - -/* - * serial core request to enable modem status interrupt reporting - */ -static void bcm_uart_enable_ms(struct uart_port *port) -{ - unsigned int val; - - val = bcm_uart_readl(port, UART_IR_REG); - val |= UART_IR_MASK(UART_IR_EXTIP); - bcm_uart_writel(port, val, UART_IR_REG); -} - -/* - * serial core request to start/stop emitting break char - */ -static void bcm_uart_break_ctl(struct uart_port *port, int ctl) -{ - unsigned long flags; - unsigned int val; - - spin_lock_irqsave(&port->lock, flags); - - val = bcm_uart_readl(port, UART_CTL_REG); - if (ctl) - val |= UART_CTL_XMITBRK_MASK; - else - val &= ~UART_CTL_XMITBRK_MASK; - bcm_uart_writel(port, val, UART_CTL_REG); - - spin_unlock_irqrestore(&port->lock, flags); -} - -/* - * return port type in string format - */ -static const char *bcm_uart_type(struct uart_port *port) -{ - return (port->type == PORT_BCM63XX) ? "bcm63xx_uart" : NULL; -} - -/* - * read all chars in rx fifo and send them to core - */ -static void bcm_uart_do_rx(struct uart_port *port) -{ - struct tty_struct *tty; - unsigned int max_count; - - /* limit number of char read in interrupt, should not be - * higher than fifo size anyway since we're much faster than - * serial port */ - max_count = 32; - tty = port->info->port.tty; - do { - unsigned int iestat, c, cstat; - char flag; - - /* get overrun/fifo empty information from ier - * register */ - iestat = bcm_uart_readl(port, UART_IR_REG); - if (!(iestat & UART_IR_STAT(UART_IR_RXNOTEMPTY))) - break; - - cstat = c = bcm_uart_readl(port, UART_FIFO_REG); - port->icount.rx++; - flag = TTY_NORMAL; - c &= 0xff; - - if (unlikely((cstat & UART_FIFO_ANYERR_MASK))) { - /* do stats first */ - if (cstat & UART_FIFO_BRKDET_MASK) { - port->icount.brk++; - if (uart_handle_break(port)) - continue; - } - - if (cstat & UART_FIFO_PARERR_MASK) - port->icount.parity++; - if (cstat & UART_FIFO_FRAMEERR_MASK) - port->icount.frame++; - - /* update flag wrt read_status_mask */ - cstat &= port->read_status_mask; - if (cstat & UART_FIFO_BRKDET_MASK) - flag = TTY_BREAK; - if (cstat & UART_FIFO_FRAMEERR_MASK) - flag = TTY_FRAME; - if (cstat & UART_FIFO_PARERR_MASK) - flag = TTY_PARITY; - } - - if (uart_handle_sysrq_char(port, c)) - continue; - - if (unlikely(iestat & UART_IR_STAT(UART_IR_RXOVER))) { - port->icount.overrun++; - tty_insert_flip_char(tty, 0, TTY_OVERRUN); - } - - if ((cstat & port->ignore_status_mask) == 0) - tty_insert_flip_char(tty, c, flag); - - } while (--max_count); - - tty_flip_buffer_push(tty); -} - -/* - * fill tx fifo with chars to send, stop when fifo is about to be full - * or when all chars have been sent. - */ -static void bcm_uart_do_tx(struct uart_port *port) -{ - struct circ_buf *xmit; - unsigned int val, max_count; - - if (port->x_char) { - bcm_uart_writel(port, port->x_char, UART_FIFO_REG); - port->icount.tx++; - port->x_char = 0; - return; - } - - if (uart_tx_stopped(port)) { - bcm_uart_stop_tx(port); - return; - } - - xmit = &port->info->xmit; - if (uart_circ_empty(xmit)) - goto txq_empty; - - val = bcm_uart_readl(port, UART_MCTL_REG); - val = (val & UART_MCTL_TXFIFOFILL_MASK) >> UART_MCTL_TXFIFOFILL_SHIFT; - max_count = port->fifosize - val; - - while (max_count--) { - unsigned int c; - - c = xmit->buf[xmit->tail]; - bcm_uart_writel(port, c, UART_FIFO_REG); - xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); - port->icount.tx++; - if (uart_circ_empty(xmit)) - break; - } - - if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) - uart_write_wakeup(port); - - if (uart_circ_empty(xmit)) - goto txq_empty; - return; - -txq_empty: - /* nothing to send, disable transmit interrupt */ - val = bcm_uart_readl(port, UART_IR_REG); - val &= ~UART_TX_INT_MASK; - bcm_uart_writel(port, val, UART_IR_REG); - return; -} - -/* - * process uart interrupt - */ -static irqreturn_t bcm_uart_interrupt(int irq, void *dev_id) -{ - struct uart_port *port; - unsigned int irqstat; - - port = dev_id; - spin_lock(&port->lock); - - irqstat = bcm_uart_readl(port, UART_IR_REG); - if (irqstat & UART_RX_INT_STAT) - bcm_uart_do_rx(port); - - if (irqstat & UART_TX_INT_STAT) - bcm_uart_do_tx(port); - - if (irqstat & UART_IR_MASK(UART_IR_EXTIP)) { - unsigned int estat; - - estat = bcm_uart_readl(port, UART_EXTINP_REG); - if (estat & UART_EXTINP_IRSTAT(UART_EXTINP_IR_CTS)) - uart_handle_cts_change(port, - estat & UART_EXTINP_CTS_MASK); - if (estat & UART_EXTINP_IRSTAT(UART_EXTINP_IR_DCD)) - uart_handle_dcd_change(port, - estat & UART_EXTINP_DCD_MASK); - } - - spin_unlock(&port->lock); - return IRQ_HANDLED; -} - -/* - * enable rx & tx operation on uart - */ -static void bcm_uart_enable(struct uart_port *port) -{ - unsigned int val; - - val = bcm_uart_readl(port, UART_CTL_REG); - val |= (UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); - bcm_uart_writel(port, val, UART_CTL_REG); -} - -/* - * disable rx & tx operation on uart - */ -static void bcm_uart_disable(struct uart_port *port) -{ - unsigned int val; - - val = bcm_uart_readl(port, UART_CTL_REG); - val &= ~(UART_CTL_BRGEN_MASK | UART_CTL_TXEN_MASK | - UART_CTL_RXEN_MASK); - bcm_uart_writel(port, val, UART_CTL_REG); -} - -/* - * clear all unread data in rx fifo and unsent data in tx fifo - */ -static void bcm_uart_flush(struct uart_port *port) -{ - unsigned int val; - - /* empty rx and tx fifo */ - val = bcm_uart_readl(port, UART_CTL_REG); - val |= UART_CTL_RSTRXFIFO_MASK | UART_CTL_RSTTXFIFO_MASK; - bcm_uart_writel(port, val, UART_CTL_REG); - - /* read any pending char to make sure all irq status are - * cleared */ - (void)bcm_uart_readl(port, UART_FIFO_REG); -} - -/* - * serial core request to initialize uart and start rx operation - */ -static int bcm_uart_startup(struct uart_port *port) -{ - unsigned int val; - int ret; - - /* mask all irq and flush port */ - bcm_uart_disable(port); - bcm_uart_writel(port, 0, UART_IR_REG); - bcm_uart_flush(port); - - /* clear any pending external input interrupt */ - (void)bcm_uart_readl(port, UART_EXTINP_REG); - - /* set rx/tx fifo thresh to fifo half size */ - val = bcm_uart_readl(port, UART_MCTL_REG); - val &= ~(UART_MCTL_RXFIFOTHRESH_MASK | UART_MCTL_TXFIFOTHRESH_MASK); - val |= (port->fifosize / 2) << UART_MCTL_RXFIFOTHRESH_SHIFT; - val |= (port->fifosize / 2) << UART_MCTL_TXFIFOTHRESH_SHIFT; - bcm_uart_writel(port, val, UART_MCTL_REG); - - /* set rx fifo timeout to 1 char time */ - val = bcm_uart_readl(port, UART_CTL_REG); - val &= ~UART_CTL_RXTMOUTCNT_MASK; - val |= 1 << UART_CTL_RXTMOUTCNT_SHIFT; - bcm_uart_writel(port, val, UART_CTL_REG); - - /* report any edge on dcd and cts */ - val = UART_EXTINP_INT_MASK; - val |= UART_EXTINP_DCD_NOSENSE_MASK; - val |= UART_EXTINP_CTS_NOSENSE_MASK; - bcm_uart_writel(port, val, UART_EXTINP_REG); - - /* register irq and enable rx interrupts */ - ret = request_irq(port->irq, bcm_uart_interrupt, 0, - bcm_uart_type(port), port); - if (ret) - return ret; - bcm_uart_writel(port, UART_RX_INT_MASK, UART_IR_REG); - bcm_uart_enable(port); - return 0; -} - -/* - * serial core request to flush & disable uart - */ -static void bcm_uart_shutdown(struct uart_port *port) -{ - unsigned long flags; - - spin_lock_irqsave(&port->lock, flags); - bcm_uart_writel(port, 0, UART_IR_REG); - spin_unlock_irqrestore(&port->lock, flags); - - bcm_uart_disable(port); - bcm_uart_flush(port); - free_irq(port->irq, port); -} - -/* - * serial core request to change current uart setting - */ -static void bcm_uart_set_termios(struct uart_port *port, - struct ktermios *new, - struct ktermios *old) -{ - unsigned int ctl, baud, quot, ier; - unsigned long flags; - - spin_lock_irqsave(&port->lock, flags); - - /* disable uart while changing speed */ - bcm_uart_disable(port); - bcm_uart_flush(port); - - /* update Control register */ - ctl = bcm_uart_readl(port, UART_CTL_REG); - ctl &= ~UART_CTL_BITSPERSYM_MASK; - - switch (new->c_cflag & CSIZE) { - case CS5: - ctl |= (0 << UART_CTL_BITSPERSYM_SHIFT); - break; - case CS6: - ctl |= (1 << UART_CTL_BITSPERSYM_SHIFT); - break; - case CS7: - ctl |= (2 << UART_CTL_BITSPERSYM_SHIFT); - break; - default: - ctl |= (3 << UART_CTL_BITSPERSYM_SHIFT); - break; - } - - ctl &= ~UART_CTL_STOPBITS_MASK; - if (new->c_cflag & CSTOPB) - ctl |= UART_CTL_STOPBITS_2; - else - ctl |= UART_CTL_STOPBITS_1; - - ctl &= ~(UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK); - if (new->c_cflag & PARENB) - ctl |= (UART_CTL_RXPAREN_MASK | UART_CTL_TXPAREN_MASK); - ctl &= ~(UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK); - if (new->c_cflag & PARODD) - ctl |= (UART_CTL_RXPAREVEN_MASK | UART_CTL_TXPAREVEN_MASK); - bcm_uart_writel(port, ctl, UART_CTL_REG); - - /* update Baudword register */ - baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16); - quot = uart_get_divisor(port, baud) - 1; - bcm_uart_writel(port, quot, UART_BAUD_REG); - - /* update Interrupt register */ - ier = bcm_uart_readl(port, UART_IR_REG); - - ier &= ~UART_IR_MASK(UART_IR_EXTIP); - if (UART_ENABLE_MS(port, new->c_cflag)) - ier |= UART_IR_MASK(UART_IR_EXTIP); - - bcm_uart_writel(port, ier, UART_IR_REG); - - /* update read/ignore mask */ - port->read_status_mask = UART_FIFO_VALID_MASK; - if (new->c_iflag & INPCK) { - port->read_status_mask |= UART_FIFO_FRAMEERR_MASK; - port->read_status_mask |= UART_FIFO_PARERR_MASK; - } - if (new->c_iflag & (BRKINT)) - port->read_status_mask |= UART_FIFO_BRKDET_MASK; - - port->ignore_status_mask = 0; - if (new->c_iflag & IGNPAR) - port->ignore_status_mask |= UART_FIFO_PARERR_MASK; - if (new->c_iflag & IGNBRK) - port->ignore_status_mask |= UART_FIFO_BRKDET_MASK; - if (!(new->c_cflag & CREAD)) - port->ignore_status_mask |= UART_FIFO_VALID_MASK; - - uart_update_timeout(port, new->c_cflag, baud); - bcm_uart_enable(port); - spin_unlock_irqrestore(&port->lock, flags); -} - -/* - * serial core request to claim uart iomem - */ -static int bcm_uart_request_port(struct uart_port *port) -{ - unsigned int size; - - size = RSET_UART_SIZE; - if (!request_mem_region(port->mapbase, size, "bcm63xx")) { - dev_err(port->dev, "Memory region busy\n"); - return -EBUSY; - } - - port->membase = ioremap(port->mapbase, size); - if (!port->membase) { - dev_err(port->dev, "Unable to map registers\n"); - release_mem_region(port->mapbase, size); - return -EBUSY; - } - return 0; -} - -/* - * serial core request to release uart iomem - */ -static void bcm_uart_release_port(struct uart_port *port) -{ - release_mem_region(port->mapbase, RSET_UART_SIZE); - iounmap(port->membase); -} - -/* - * serial core request to do any port required autoconfiguration - */ -static void bcm_uart_config_port(struct uart_port *port, int flags) -{ - if (flags & UART_CONFIG_TYPE) { - if (bcm_uart_request_port(port)) - return; - port->type = PORT_BCM63XX; - } -} - -/* - * serial core request to check that port information in serinfo are - * suitable - */ -static int bcm_uart_verify_port(struct uart_port *port, - struct serial_struct *serinfo) -{ - if (port->type != PORT_BCM63XX) - return -EINVAL; - if (port->irq != serinfo->irq) - return -EINVAL; - if (port->iotype != serinfo->io_type) - return -EINVAL; - if (port->mapbase != (unsigned long)serinfo->iomem_base) - return -EINVAL; - return 0; -} - -/* serial core callbacks */ -static struct uart_ops bcm_uart_ops = { - .tx_empty = bcm_uart_tx_empty, - .get_mctrl = bcm_uart_get_mctrl, - .set_mctrl = bcm_uart_set_mctrl, - .start_tx = bcm_uart_start_tx, - .stop_tx = bcm_uart_stop_tx, - .stop_rx = bcm_uart_stop_rx, - .enable_ms = bcm_uart_enable_ms, - .break_ctl = bcm_uart_break_ctl, - .startup = bcm_uart_startup, - .shutdown = bcm_uart_shutdown, - .set_termios = bcm_uart_set_termios, - .type = bcm_uart_type, - .release_port = bcm_uart_release_port, - .request_port = bcm_uart_request_port, - .config_port = bcm_uart_config_port, - .verify_port = bcm_uart_verify_port, -}; - - - -#ifdef CONFIG_SERIAL_BCM63XX_CONSOLE -static inline void wait_for_xmitr(struct uart_port *port) -{ - unsigned int tmout; - - /* Wait up to 10ms for the character(s) to be sent. */ - tmout = 10000; - while (--tmout) { - unsigned int val; - - val = bcm_uart_readl(port, UART_IR_REG); - if (val & UART_IR_STAT(UART_IR_TXEMPTY)) - break; - udelay(1); - } - - /* Wait up to 1s for flow control if necessary */ - if (port->flags & UPF_CONS_FLOW) { - tmout = 1000000; - while (--tmout) { - unsigned int val; - - val = bcm_uart_readl(port, UART_EXTINP_REG); - if (val & UART_EXTINP_CTS_MASK) - break; - udelay(1); - } - } -} - -/* - * output given char - */ -static void bcm_console_putchar(struct uart_port *port, int ch) -{ - wait_for_xmitr(port); - bcm_uart_writel(port, ch, UART_FIFO_REG); -} - -/* - * console core request to output given string - */ -static void bcm_console_write(struct console *co, const char *s, - unsigned int count) -{ - struct uart_port *port; - unsigned long flags; - int locked; - - port = &ports[co->index]; - - local_irq_save(flags); - if (port->sysrq) { - /* bcm_uart_interrupt() already took the lock */ - locked = 0; - } else if (oops_in_progress) { - locked = spin_trylock(&port->lock); - } else { - spin_lock(&port->lock); - locked = 1; - } - - /* call helper to deal with \r\n */ - uart_console_write(port, s, count, bcm_console_putchar); - - /* and wait for char to be transmitted */ - wait_for_xmitr(port); - - if (locked) - spin_unlock(&port->lock); - local_irq_restore(flags); -} - -/* - * console core request to setup given console, find matching uart - * port and setup it. - */ -static int bcm_console_setup(struct console *co, char *options) -{ - struct uart_port *port; - int baud = 9600; - int bits = 8; - int parity = 'n'; - int flow = 'n'; - - if (co->index < 0 || co->index >= BCM63XX_NR_UARTS) - return -EINVAL; - port = &ports[co->index]; - if (!port->membase) - return -ENODEV; - if (options) - uart_parse_options(options, &baud, &parity, &bits, &flow); - - return uart_set_options(port, co, baud, parity, bits, flow); -} - -static struct uart_driver bcm_uart_driver; - -static struct console bcm63xx_console = { - .name = "ttyS", - .write = bcm_console_write, - .device = uart_console_device, - .setup = bcm_console_setup, - .flags = CON_PRINTBUFFER, - .index = -1, - .data = &bcm_uart_driver, -}; - -static int __init bcm63xx_console_init(void) -{ - register_console(&bcm63xx_console); - return 0; -} - -console_initcall(bcm63xx_console_init); - -#define BCM63XX_CONSOLE &bcm63xx_console -#else -#define BCM63XX_CONSOLE NULL -#endif /* CONFIG_SERIAL_BCM63XX_CONSOLE */ - -static struct uart_driver bcm_uart_driver = { - .owner = THIS_MODULE, - .driver_name = "bcm63xx_uart", - .dev_name = "ttyS", - .major = TTY_MAJOR, - .minor = 64, - .nr = 1, - .cons = BCM63XX_CONSOLE, -}; - -/* - * platform driver probe/remove callback - */ -static int __devinit bcm_uart_probe(struct platform_device *pdev) -{ - struct resource *res_mem, *res_irq; - struct uart_port *port; - struct clk *clk; - int ret; - - if (pdev->id < 0 || pdev->id >= BCM63XX_NR_UARTS) - return -EINVAL; - - if (ports[pdev->id].membase) - return -EBUSY; - - res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!res_mem) - return -ENODEV; - - res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (!res_irq) - return -ENODEV; - - clk = clk_get(&pdev->dev, "periph"); - if (IS_ERR(clk)) - return -ENODEV; - - port = &ports[pdev->id]; - memset(port, 0, sizeof(*port)); - port->iotype = UPIO_MEM; - port->mapbase = res_mem->start; - port->irq = res_irq->start; - port->ops = &bcm_uart_ops; - port->flags = UPF_BOOT_AUTOCONF; - port->dev = &pdev->dev; - port->fifosize = 16; - port->uartclk = clk_get_rate(clk) / 2; - clk_put(clk); - - ret = uart_add_one_port(&bcm_uart_driver, port); - if (ret) { - kfree(port); - return ret; - } - platform_set_drvdata(pdev, port); - return 0; -} - -static int __devexit bcm_uart_remove(struct platform_device *pdev) -{ - struct uart_port *port; - - port = platform_get_drvdata(pdev); - uart_remove_one_port(&bcm_uart_driver, port); - platform_set_drvdata(pdev, NULL); - /* mark port as free */ - ports[pdev->id].membase = 0; - return 0; -} - -/* - * platform driver stuff - */ -static struct platform_driver bcm_uart_platform_driver = { - .probe = bcm_uart_probe, - .remove = __devexit_p(bcm_uart_remove), - .driver = { - .owner = THIS_MODULE, - .name = "bcm63xx_uart", - }, -}; - -static int __init bcm_uart_init(void) -{ - int ret; - - ret = uart_register_driver(&bcm_uart_driver); - if (ret) - return ret; - - ret = platform_driver_register(&bcm_uart_platform_driver); - if (ret) - uart_unregister_driver(&bcm_uart_driver); - - return ret; -} - -static void __exit bcm_uart_exit(void) -{ - platform_driver_unregister(&bcm_uart_platform_driver); - uart_unregister_driver(&bcm_uart_driver); -} - -module_init(bcm_uart_init); -module_exit(bcm_uart_exit); - -MODULE_AUTHOR("Maxime Bizon "); -MODULE_DESCRIPTION("Broadcom 63 - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version 2 - * of the License, or (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the - * Free Software Foundation, Inc., 51 Franklin Street, Fifth Floor, - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#define PFX KBUILD_MODNAME -#define DRV_VER "0.1.2" - -struct bcm63xx_spi { - /* bitbang has to be first */ - struct spi_bitbang bitbang; - struct completion done; - - void __iomem *regs; - int irq; - - /* Platform data */ - u32 speed_hz; - unsigned fifo_size; - - /* Data buffers */ - const unsigned char *tx_ptr; - unsigned char *rx_ptr; - int remaining_bytes; - - struct clk *clk; - struct resource *ioarea; - struct platform_device *pdev; -}; - -static void bcm63xx_spi_chipselect(struct spi_device *spi, int is_on) -{ - struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); - u16 val; - - val = bcm_spi_readw(bs->regs, SPI_CMD); - if (is_on == BITBANG_CS_INACTIVE) - val |= SPI_CMD_NOOP; - else if (is_on == BITBANG_CS_ACTIVE) - val |= (1 << spi->chip_select << SPI_CMD_DEVICE_ID_SHIFT); - - bcm_spi_writew(val, bs->regs, SPI_CMD); -} - -static int bcm63xx_spi_setup_transfer(struct spi_device *spi, - struct spi_transfer *t) -{ - u8 bits_per_word; - u8 clk_cfg; - u32 hz; - unsigned int div; - - struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); - - bits_per_word = (t) ? t->bits_per_word : spi->bits_per_word; - hz = (t) ? t->speed_hz : spi->max_speed_hz; - if (bits_per_word != 8) { - dev_err(&spi->dev, "%s, unsupported bits_per_word=%d\n", - __func__, bits_per_word); - return -EINVAL; - } - - if (spi->chip_select > spi->master->num_chipselect) { - dev_err(&spi->dev, "%s, unsupported slave %d\n", - __func__, spi->chip_select); - return -EINVAL; - } - - /* Check clock setting */ - div = (bs->speed_hz / hz); - switch (div) { - case 2: - clk_cfg = SPI_CLK_25MHZ; - break; - case 4: - clk_cfg = SPI_CLK_12_50MHZ; - break; - case 8: - clk_cfg = SPI_CLK_6_250MHZ; - break; - case 16: - clk_cfg = SPI_CLK_3_125MHZ; - break; - case 32: - clk_cfg = SPI_CLK_1_563MHZ; - break; - case 128: - clk_cfg = SPI_CLK_0_781MHZ; - break; - case 64: - default: - /* Set to slowest mode for compatibility */ - clk_cfg = SPI_CLK_0_781MHZ; - break; - } - - bcm_spi_writeb(clk_cfg, bs->regs, SPI_CLK_CFG); - dev_dbg(&spi->dev, "Setting clock register to %d (hz %d, cmd %02x)\n", - div, hz, clk_cfg); - - return 0; -} - -/* the spi->mode bits understood by this driver: */ -#define MODEBITS (SPI_CPOL | SPI_CPHA) - -static int bcm63xx_spi_setup(struct spi_device *spi) -{ - struct spi_bitbang *bitbang; - struct bcm63xx_spi *bs; - int retval; - - bs = spi_master_get_devdata(spi->master); - bitbang = &bs->bitbang; - - if (!spi->bits_per_word) - spi->bits_per_word = 8; - - if (spi->mode & ~MODEBITS) { - dev_err(&spi->dev, "%s, unsupported mode bits %x\n", - __func__, spi->mode & ~MODEBITS); - return -EINVAL; - } - - retval = bcm63xx_spi_setup_transfer(spi, NULL); - if (retval < 0) { - dev_err(&spi->dev, "setup: unsupported mode bits %x\n", - spi->mode & ~MODEBITS); - return retval; - } - - dev_dbg(&spi->dev, "%s, mode %d, %u bits/w, %u nsec/bit\n", - __func__, spi->mode & MODEBITS, spi->bits_per_word, 0); - - return 0; -} - -/* Fill the TX FIFO with as many bytes as possible */ -static void bcm63xx_spi_fill_tx_fifo(struct bcm63xx_spi *bs) -{ - u8 tail; - - /* Fill the Tx FIFO with as many bytes as possible */ - tail = bcm_spi_readb(bs->regs, SPI_MSG_TAIL); - while ((tail < bs->fifo_size) && (bs->remaining_bytes > 0)) { - if (bs->tx_ptr) - bcm_spi_writeb(*bs->tx_ptr++, bs->regs, SPI_MSG_DATA); - else - bcm_spi_writeb(0, bs->regs, SPI_MSG_DATA); - bs->remaining_bytes--; - tail = bcm_spi_readb(bs->regs, SPI_MSG_TAIL); - } -} - -static int bcm63xx_txrx_bufs(struct spi_device *spi, struct spi_transfer *t) -{ - struct bcm63xx_spi *bs = spi_master_get_devdata(spi->master); - u8 msg_ctl; - u16 cmd; - - dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n", - t->tx_buf, t->rx_buf, t->len); - - /* Transmitter is inhibited */ - bs->tx_ptr = t->tx_buf; - bs->rx_ptr = t->rx_buf; - bs->remaining_bytes = t->len; - init_completion(&bs->done); - - bcm63xx_spi_fill_tx_fifo(bs); - - /* Enable the command done interrupt which - * we use to determine completion of a command */ - bcm_spi_writeb(SPI_INTR_CMD_DONE, bs->regs, SPI_INT_MASK); - - /* Fill in the Message control register */ - msg_ctl = bcm_spi_readb(bs->regs, SPI_MSG_CTL); - msg_ctl |= (t->len << SPI_BYTE_CNT_SHIFT); - msg_ctl |= (SPI_FD_RW << SPI_MSG_TYPE_SHIFT); - bcm_spi_writeb(msg_ctl, bs->regs, SPI_MSG_CTL); - - /* Issue the transfer */ - cmd = bcm_spi_readb(bs->regs, SPI_CMD); - cmd |= SPI_CMD_START_IMMEDIATE; - cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT); - bcm_spi_writeb(cmd, bs->regs, SPI_CMD); - - wait_for_completion(&bs->done); - - /* Disable the CMD_DONE interrupt */ - bcm_spi_writeb(~(SPI_INTR_CMD_DONE), bs->regs, SPI_INT_MASK); - - return t->len - bs->remaining_bytes; -} - -/* This driver supports single master mode only. Hence - * CMD_DONE is the only interrupt we care about - */ -static irqreturn_t bcm63xx_spi_interrupt(int irq, void *dev_id) -{ - struct spi_master *master = (struct spi_master *)dev_id; - struct bcm63xx_spi *bs = spi_master_get_devdata(master); - u8 intr; - u16 cmd; - - /* Read interupts and clear them immediately */ - intr = bcm_spi_readb(bs->regs, SPI_INT_STATUS); - bcm_spi_writeb(SPI_INTR_CLEAR_ALL, bs->regs, SPI_INT_MASK); - - /* A tansfer completed */ - if (intr & SPI_INTR_CMD_DONE) { - u8 rx_empty; - - rx_empty = bcm_spi_readb(bs->regs, SPI_ST); - /* Read out all the data */ - while ((rx_empty & SPI_RX_EMPTY) == 0) { - u8 data; - - data = bcm_spi_readb(bs->regs, SPI_RX_DATA); - if (bs->rx_ptr) - *bs->rx_ptr++ = data; - - rx_empty = bcm_spi_readb(bs->regs, SPI_RX_EMPTY); - } - - /* See if there is more data to send */ - if (bs->remaining_bytes > 0) { - bcm63xx_spi_fill_tx_fifo(bs); - - /* Start the transfer */ - cmd = bcm_spi_readb(bs->regs, SPI_CMD); - cmd |= SPI_CMD_START_IMMEDIATE; - cmd |= (0 << SPI_CMD_PREPEND_BYTE_CNT_SHIFT); - bcm_spi_writeb(cmd, bs->regs, SPI_CMD); - } else - complete(&bs->done); - } - - return IRQ_HANDLED; -} - - -static int __init bcm63xx_spi_probe(struct platform_device *pdev) -{ - struct resource *r; - struct bcm63xx_spi_pdata *pdata = pdev->dev.platform_data; - int irq; - struct spi_master *master; - struct clk *clk; - struct bcm63xx_spi *bs; - int ret; - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!r) { - ret = -ENXIO; - goto out; - } - - irq = platform_get_irq(pdev, 0); - if (irq < 0) { - ret = -ENXIO; - goto out; - } - - clk = clk_get(&pdev->dev, "spi"); - if (IS_ERR(clk)) { - dev_err(&pdev->dev, "No clock for device\n"); - ret = -ENODEV; - goto out; - } - - master = spi_alloc_master(&pdev->dev, sizeof(struct bcm63xx_spi)); - if (!master) { - ret = -ENOMEM; - goto out_free; - } - - bs = spi_master_get_devdata(master); - bs->bitbang.master = spi_master_get(master); - bs->bitbang.chipselect = bcm63xx_spi_chipselect; - bs->bitbang.setup_transfer = bcm63xx_spi_setup_transfer; - bs->bitbang.txrx_bufs = bcm63xx_txrx_bufs; - bs->bitbang.master->setup = bcm63xx_spi_setup; - init_completion(&bs->done); - - platform_set_drvdata(pdev, master); - bs->pdev = pdev; - - if (!request_mem_region(r->start, - r->end - r->start, PFX)) { - ret = -ENXIO; - goto out_free; - } - - bs->regs = ioremap_nocache(r->start, r->end - r->start); - if (!bs->regs) { - printk(KERN_ERR PFX " unable to ioremap regs\n"); - ret = -ENOMEM; - goto out_free; - } - bs->irq = irq; - bs->clk = clk; - bs->fifo_size = pdata->fifo_size; - - ret = request_irq(irq, bcm63xx_spi_interrupt, 0, - pdev->name, master); - if (ret) { - printk(KERN_ERR PFX " unable to request irq\n"); - goto out_unmap; - } - - master->bus_num = pdata->bus_num; - master->num_chipselect = pdata->num_chipselect; - bs->speed_hz = pdata->speed_hz; - - /* Initialize hardware */ - clk_enable(bs->clk); - bcm_spi_writeb(SPI_INTR_CLEAR_ALL, bs->regs, SPI_INT_MASK); - - dev_info(&pdev->dev, " at 0x%08x (irq %d, FIFOs size %d) v%s\n", - r->start, irq, bs->fifo_size, DRV_VER); - - ret = spi_bitbang_start(&bs->bitbang); - if (ret) { - dev_err(&pdev->dev, "spi_bitbang_start FAILED\n"); - goto out_reset_hw; - } - - return ret; - -out_reset_hw: - clk_disable(clk); - free_irq(irq, master); -out_unmap: - iounmap(bs->regs); -out_free: - clk_put(clk); - spi_master_put(master); -out: - return ret; -} - -static int __exit bcm63xx_spi_remove(struct platform_device *pdev) -{ - struct spi_master *master = platform_get_drvdata(pdev); - struct bcm63xx_spi *bs = spi_master_get_devdata(master); - - spi_bitbang_stop(&bs->bitbang); - clk_disable(bs->clk); - clk_put(bs->clk); - free_irq(bs->irq, master); - iounmap(bs->regs); - platform_set_drvdata(pdev, 0); - spi_master_put(bs->bitbang.master); - - return 0; -} - -#ifdef CONFIG_PM -static int bcm63xx_spi_suspend(struct platform_device *pdev, pm_message_t mesg) -{ - struct spi_master *master = platform_get_drvdata(pdev); - struct bcm63xx_spi *bs = spi_master_get_devdata(master); - - clk_disable(bs->clk); - - return 0; -} - -static int bcm63xx_spi_resume(struct platform_device *pdev) -{ - struct bcm63xx_spi *bs = spi_master_get_devdata(master); - struct bcm63xx_spi *bs = spi_master_get_devdata(master); - - clk_enable(bs->clk); - - return 0; -} -#else -#define bcm63xx_spi_suspend NULL -#define bcm63xx_spi_resume NULL -#endif - -static struct platform_driver bcm63xx_spi_driver = { - .driver = { - .name = "bcm63xx-spi", - .owner = THIS_MODULE, - }, - .probe = bcm63xx_spi_probe, - .remove = bcm63xx_spi_remove, - .suspend = bcm63xx_spi_suspend, - .resume = bcm63xx_spi_resume, -}; - - -static int __init bcm63xx_spi_init(void) -{ - return platform_driver_register(&bcm63xx_spi_driver); -} - -static void __exit bcm63xx_spi_exit(void) -{ - platform_driver_unregister(&bcm63xx_spi_driver); -} - -module_init(bcm63xx_spi_init); -module_exit(bcm63xx_spi_exit); - -MODULE_ALIAS("platform:bcm63xx_spi"); -MODULE_AUTHOR("Florian Fainelli "); -MODULE_DESCRIPTION("Broadcom BCM63xx SPI Controller driver"); -MODULE_LICENSE("GPL"); -MODULE_VERSION(DRV_VER); diff --git a/target/linux/brcm63xx/files-2.6.30/drivers/usb/host/ehci-bcm63xx.c b/target/linux/brcm63xx/files-2.6.30/drivers/usb/host/ehci-bcm63xx.c deleted file mode 100644 index 2fef5716e..000000000 --- a/target/linux/brcm63xx/files-2.6.30/drivers/usb/host/ehci-bcm63xx.c +++ /dev/null @@ -1,152 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include - -static int ehci_bcm63xx_setup(struct usb_hcd *hcd) -{ - struct ehci_hcd *ehci = hcd_to_ehci(hcd); - int retval; - - retval = ehci_halt(ehci); - if (retval) - return retval; - - retval = ehci_init(hcd); - if (retval) - return retval; - - hcd->has_tt = 1; - ehci_reset(ehci); - ehci_port_power(ehci, 0); - - return retval; -} - - -static const struct hc_driver ehci_bcm63xx_hc_driver = { - .description = hcd_name, - .product_desc = "BCM63XX integrated EHCI controller", - .hcd_priv_size = sizeof(struct ehci_hcd), - - .irq = ehci_irq, - .flags = HCD_MEMORY | HCD_USB2, - - .reset = ehci_bcm63xx_setup, - .start = ehci_run, - .stop = ehci_stop, - .shutdown = ehci_shutdown, - - .urb_enqueue = ehci_urb_enqueue, - .urb_dequeue = ehci_urb_dequeue, - .endpoint_disable = ehci_endpoint_disable, - - .get_frame_number = ehci_get_frame, - - .hub_status_data = ehci_hub_status_data, - .hub_control = ehci_hub_control, - .bus_suspend = ehci_bus_suspend, - .bus_resume = ehci_bus_resume, - .relinquish_port = ehci_relinquish_port, - .port_handed_over = ehci_port_handed_over, -}; - -static int __devinit ehci_hcd_bcm63xx_drv_probe(struct platform_device *pdev) -{ - struct resource *res_mem, *res_irq; - struct usb_hcd *hcd; - struct ehci_hcd *ehci; - u32 reg; - int ret; - - res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (!res_mem || !res_irq) - return -ENODEV; - - reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_REG); - reg &= ~USBH_PRIV_SWAP_EHCI_DATA_MASK; - reg |= USBH_PRIV_SWAP_EHCI_ENDN_MASK; - bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_REG); - - /* don't ask... */ - bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, USBH_PRIV_TEST_REG); - - hcd = usb_create_hcd(&ehci_bcm63xx_hc_driver, &pdev->dev, "bcm63xx"); - if (!hcd) - return -ENOMEM; - hcd->rsrc_start = res_mem->start; - hcd->rsrc_len = res_mem->end - res_mem->start + 1; - - if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { - pr_debug("request_mem_region failed\n"); - ret = -EBUSY; - goto out; - } - - hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); - if (!hcd->regs) { - pr_debug("ioremap failed\n"); - ret = -EIO; - goto out1; - } - - ehci = hcd_to_ehci(hcd); - ehci->big_endian_mmio = 1; - ehci->big_endian_desc = 0; - ehci->caps = hcd->regs; - ehci->regs = hcd->regs + - HC_LENGTH(ehci_readl(ehci, &ehci->caps->hc_capbase)); - ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params); - ehci->sbrn = 0x20; - - ret = usb_add_hcd(hcd, res_irq->start, IRQF_DISABLED); - if (ret) - goto out2; - - platform_set_drvdata(pdev, hcd); - return 0; - -out2: - iounmap(hcd->regs); -out1: - release_mem_region(hcd->rsrc_start, hcd->rsrc_len); -out: - usb_put_hcd(hcd); - return ret; -} - -static int __devexit ehci_hcd_bcm63xx_drv_remove(struct platform_device *pdev) -{ - struct usb_hcd *hcd; - - hcd = platform_get_drvdata(pdev); - usb_remove_hcd(hcd); - iounmap(hcd->regs); - usb_put_hcd(hcd); - release_mem_region(hcd->rsrc_start, hcd->rsrc_len); - platform_set_drvdata(pdev, NULL); - return 0; -} - -static struct platform_driver ehci_hcd_bcm63xx_driver = { - .probe = ehci_hcd_bcm63xx_drv_probe, - .remove = __devexit_p(ehci_hcd_bcm63xx_drv_remove), - .shutdown = usb_hcd_platform_shutdown, - .driver = { - .name = "bcm63xx_ehci", - .owner = THIS_MODULE, - .bus = &platform_bus_type - }, -}; - -MODULE_ALIAS("platform:bcm63xx_ehci"); diff --git a/target/linux/brcm63xx/files-2.6.30/drivers/usb/host/ohci-bcm63xx.c b/target/linux/brcm63xx/files-2.6.30/drivers/usb/host/ohci-bcm63xx.c deleted file mode 100644 index 08807d989..000000000 --- a/target/linux/brcm63xx/files-2.6.30/drivers/usb/host/ohci-bcm63xx.c +++ /dev/null @@ -1,159 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2008 Maxime Bizon - */ - -#include -#include -#include -#include -#include -#include - -static struct clk *usb_host_clock; - -static int __devinit ohci_bcm63xx_start(struct usb_hcd *hcd) -{ - struct ohci_hcd *ohci = hcd_to_ohci(hcd); - int ret; - - ret = ohci_init(ohci); - if (ret < 0) - return ret; - - /* FIXME: autodetected port 2 is shared with USB slave */ - - ret = ohci_run(ohci); - if (ret < 0) { - err("can't start %s", hcd->self.bus_name); - ohci_stop(hcd); - return ret; - } - return 0; -} - -static const struct hc_driver ohci_bcm63xx_hc_driver = { - .description = hcd_name, - .product_desc = "BCM63XX integrated OHCI controller", - .hcd_priv_size = sizeof(struct ohci_hcd), - - .irq = ohci_irq, - .flags = HCD_USB11 | HCD_MEMORY, - .start = ohci_bcm63xx_start, - .stop = ohci_stop, - .shutdown = ohci_shutdown, - .urb_enqueue = ohci_urb_enqueue, - .urb_dequeue = ohci_urb_dequeue, - .endpoint_disable = ohci_endpoint_disable, - .get_frame_number = ohci_get_frame, - .hub_status_data = ohci_hub_status_data, - .hub_control = ohci_hub_control, - .start_port_reset = ohci_start_port_reset, -}; - -static int __devinit ohci_hcd_bcm63xx_drv_probe(struct platform_device *pdev) -{ - struct resource *res_mem, *res_irq; - struct usb_hcd *hcd; - struct ohci_hcd *ohci; - u32 reg; - int ret; - - res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - if (!res_mem || !res_irq) - return -ENODEV; - - if (BCMCPU_IS_6348()) { - struct clk *clk; - /* enable USB host clock */ - clk = clk_get(&pdev->dev, "usbh"); - if (IS_ERR(clk)) - return -ENODEV; - - clk_enable(clk); - usb_host_clock = clk; - bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG); - - } else if (BCMCPU_IS_6358()) { - reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_REG); - reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK; - reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK; - bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_REG); - /* don't ask... */ - bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020, USBH_PRIV_TEST_REG); - } else - return 0; - - hcd = usb_create_hcd(&ohci_bcm63xx_hc_driver, &pdev->dev, "bcm63xx"); - if (!hcd) - return -ENOMEM; - hcd->rsrc_start = res_mem->start; - hcd->rsrc_len = res_mem->end - res_mem->start + 1; - - if (!request_mem_region(hcd->rsrc_start, hcd->rsrc_len, hcd_name)) { - pr_debug("request_mem_region failed\n"); - ret = -EBUSY; - goto out; - } - - hcd->regs = ioremap(hcd->rsrc_start, hcd->rsrc_len); - if (!hcd->regs) { - pr_debug("ioremap failed\n"); - ret = -EIO; - goto out1; - } - - ohci = hcd_to_ohci(hcd); - ohci->flags |= OHCI_QUIRK_BE_MMIO | OHCI_QUIRK_BE_DESC | - OHCI_QUIRK_FRAME_NO; - ohci_hcd_init(ohci); - - ret = usb_add_hcd(hcd, res_irq->start, IRQF_DISABLED); - if (ret) - goto out2; - - platform_set_drvdata(pdev, hcd); - return 0; - -out2: - iounmap(hcd->regs); -out1: - release_mem_region(hcd->rsrc_start, hcd->rsrc_len); -out: - usb_put_hcd(hcd); - return ret; -} - -static int __devexit ohci_hcd_bcm63xx_drv_remove(struct platform_device *pdev) -{ - struct usb_hcd *hcd; - - hcd = platform_get_drvdata(pdev); - usb_remove_hcd(hcd); - iounmap(hcd->regs); - usb_put_hcd(hcd); - release_mem_region(hcd->rsrc_start, hcd->rsrc_len); - if (usb_host_clock) { - clk_disable(usb_host_clock); - clk_put(usb_host_clock); - } - platform_set_drvdata(pdev, NULL); - return 0; -} - -static struct platform_driver ohci_hcd_bcm63xx_driver = { - .probe = ohci_hcd_bcm63xx_drv_probe, - .remove = __devexit_p(ohci_hcd_bcm63xx_drv_remove), - .shutdown = usb_hcd_platform_shutdown, - .driver = { - .name = "bcm63xx_ohci", - .owner = THIS_MODULE, - .bus = &platform_bus_type - }, -}; - -MODULE_ALIAS("platform:bcm63xx_ohci"); diff --git a/target/linux/brcm63xx/files-2.6.30/drivers/watchdog/bcm63xx_wdt.c b/target/linux/brcm63xx/files-2.6.30/drivers/watchdog/bcm63xx_wdt.c deleted file mode 100644 index 8d58ccd8b..000000000 --- a/target/linux/brcm63xx/files-2.6.30/drivers/watchdog/bcm63xx_wdt.c +++ /dev/null @@ -1,334 +0,0 @@ -/* - * Broadcom BCM63xx SoC watchdog driver - * - * Copyright (C) 2007, Miguel Gaio - * Copyright (C) 2008, Florian Fainelli - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include - -#define PFX KBUILD_MODNAME - -#define WDT_HZ 50000000 /* Fclk */ -#define WDT_DEFAULT_TIME 30 /* seconds */ -#define WDT_MAX_TIME 256 /* seconds */ - -static struct { - void __iomem *regs; - struct timer_list timer; - int default_ticks; - unsigned long inuse; - atomic_t ticks; -} bcm63xx_wdt_device; - -static int expect_close; -static int timeout; - -static int wdt_time = WDT_DEFAULT_TIME; -static int nowayout = WATCHDOG_NOWAYOUT; -module_param(nowayout, int, 0); -MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default=" - __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); - -/* HW functions */ -static void bcm63xx_wdt_hw_start(void) -{ - bcm_writel(0xfffffffe, bcm63xx_wdt_device.regs + WDT_DEFVAL_REG); - bcm_writel(WDT_START_1, bcm63xx_wdt_device.regs + WDT_CTL_REG); - bcm_writel(WDT_START_2, bcm63xx_wdt_device.regs + WDT_CTL_REG); -} - -static void bcm63xx_wdt_hw_stop(void) -{ - bcm_writel(WDT_STOP_1, bcm63xx_wdt_device.regs + WDT_CTL_REG); - bcm_writel(WDT_STOP_2, bcm63xx_wdt_device.regs + WDT_CTL_REG); -} - -static void bcm63xx_timer_tick(unsigned long unused) -{ - if (!atomic_dec_and_test(&bcm63xx_wdt_device.ticks)) { - bcm63xx_wdt_hw_start(); - mod_timer(&bcm63xx_wdt_device.timer, jiffies + HZ); - } else - printk(KERN_CRIT PFX ": watchdog will restart system\n"); -} - -static void bcm63xx_wdt_pet(void) -{ - atomic_set(&bcm63xx_wdt_device.ticks, wdt_time); -} - -static void bcm63xx_wdt_start(void) -{ - bcm63xx_wdt_pet(); - bcm63xx_timer_tick(0); -} - -static void bcm63xx_wdt_pause(void) -{ - del_timer_sync(&bcm63xx_wdt_device.timer); - bcm63xx_wdt_hw_stop(); -} - -static int bcm63xx_wdt_settimeout(int new_time) -{ - if ((new_time <= 0) || (new_time > WDT_MAX_TIME)) - return -EINVAL; - - wdt_time = new_time; - - return 0; -} - -static int bcm63xx_wdt_open(struct inode *inode, struct file *file) -{ - if (test_and_set_bit(0, &bcm63xx_wdt_device.inuse)) - return -EBUSY; - - bcm63xx_wdt_start(); - return nonseekable_open(inode, file); -} - -static int bcm63xx_wdt_release(struct inode *inode, struct file *file) -{ - if (expect_close == 42) - bcm63xx_wdt_pause(); - else { - printk(KERN_CRIT PFX - ": Unexpected close, not stopping watchdog!\n"); - bcm63xx_wdt_start(); - } - clear_bit(0, &bcm63xx_wdt_device.inuse); - expect_close = 0; - return 0; -} - -static ssize_t bcm63xx_wdt_write(struct file *file, const char *data, - size_t len, loff_t *ppos) -{ - if (len) { - if (!nowayout) { - size_t i; - - /* In case it was set long ago */ - expect_close = 0; - - for (i = 0; i != len; i++) { - char c; - if (get_user(c, data + i)) - return -EFAULT; - if (c == 'V') - expect_close = 42; - } - } - bcm63xx_wdt_pet(); - } - return len; -} - -static struct watchdog_info bcm63xx_wdt_info = { - .identity = PFX, - .options = WDIOF_SETTIMEOUT | - WDIOF_KEEPALIVEPING | - WDIOF_MAGICCLOSE, -}; - - -static long bcm63xx_wdt_ioctl(struct file *file, unsigned int cmd, - unsigned long arg) -{ - void __user *argp = (void __user *)arg; - int __user *p = argp; - int new_value, retval = -EINVAL; - - switch (cmd) { - case WDIOC_GETSUPPORT: - return copy_to_user(argp, &bcm63xx_wdt_info, - sizeof(bcm63xx_wdt_info)) ? -EFAULT : 0; - - case WDIOC_GETSTATUS: - case WDIOC_GETBOOTSTATUS: - return put_user(0, p); - - case WDIOC_SETOPTIONS: - if (get_user(new_value, p)) - return -EFAULT; - - if (new_value & WDIOS_DISABLECARD) { - bcm63xx_wdt_pause(); - retval = 0; - } - if (new_value & WDIOS_ENABLECARD) { - bcm63xx_wdt_start(); - retval = 0; - } - - return retval; - - case WDIOC_KEEPALIVE: - bcm63xx_wdt_pet(); - return 0; - - case WDIOC_SETTIMEOUT: - if (get_user(new_value, p)) - return -EFAULT; - - if (bcm63xx_wdt_settimeout(new_value)) - return -EINVAL; - - bcm63xx_wdt_pet(); - - case WDIOC_GETTIMEOUT: - return put_user(wdt_time, p); - - default: - return -ENOTTY; - - } -} - -static int bcm63xx_wdt_notify_sys(struct notifier_block *this, - unsigned long code, void *unused) -{ - if (code == SYS_DOWN || code == SYS_HALT) - bcm63xx_wdt_pause(); - return NOTIFY_DONE; -} - -static const struct file_operations bcm63xx_wdt_fops = { - .owner = THIS_MODULE, - .llseek = no_llseek, - .write = bcm63xx_wdt_write, - .unlocked_ioctl = bcm63xx_wdt_ioctl, - .open = bcm63xx_wdt_open, - .release = bcm63xx_wdt_release, -}; - -static struct miscdevice bcm63xx_wdt_miscdev = { - .minor = WATCHDOG_MINOR, - .name = "watchdog", - .fops = &bcm63xx_wdt_fops, -}; - -static struct notifier_block bcm63xx_wdt_notifier = { - .notifier_call = bcm63xx_wdt_notify_sys, -}; - - -static int bcm63xx_wdt_probe(struct platform_device *pdev) -{ - int ret; - struct resource *r; - - setup_timer(&bcm63xx_wdt_device.timer, bcm63xx_timer_tick, 0L); - - r = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!r) { - printk(KERN_ERR PFX - "failed to retrieve resources\n"); - return -ENODEV; - } - - bcm63xx_wdt_device.regs = ioremap_nocache(r->start, r->end - r->start); - if (!bcm63xx_wdt_device.regs) { - printk(KERN_ERR PFX - "failed to remap I/O resources\n"); - return -ENXIO; - } - - if (bcm63xx_wdt_settimeout(wdt_time)) { - bcm63xx_wdt_settimeout(WDT_DEFAULT_TIME); - printk(KERN_INFO PFX - ": wdt_time value must be 1 <= wdt_time <= 256, using %d\n", - wdt_time); - } - - ret = register_reboot_notifier(&bcm63xx_wdt_notifier); - if (ret) { - printk(KERN_ERR PFX - "failed to register reboot_notifier\n"); - return ret; - } - - ret = misc_register(&bcm63xx_wdt_miscdev); - if (ret < 0) { - printk(KERN_ERR PFX - "failed to register watchdog device\n"); - goto unmap; - } - - printk(KERN_INFO PFX " started, timer margin: %d sec\n", WDT_DEFAULT_TIME); - - return 0; - -unmap: - unregister_reboot_notifier(&bcm63xx_wdt_notifier); - iounmap(bcm63xx_wdt_device.regs); - return ret; -} - -static int bcm63xx_wdt_remove(struct platform_device *pdev) -{ - if (!nowayout) - bcm63xx_wdt_pause(); - - misc_deregister(&bcm63xx_wdt_miscdev); - - iounmap(bcm63xx_wdt_device.regs); - - unregister_reboot_notifier(&bcm63xx_wdt_notifier); - - return 0; -} - -static struct platform_driver bcm63xx_wdt = { - .probe = bcm63xx_wdt_probe, - .remove = bcm63xx_wdt_remove, - .driver = { - .name = "bcm63xx-wdt", - } -}; - -static int __init bcm63xx_wdt_init(void) -{ - return platform_driver_register(&bcm63xx_wdt); -} - -static void __exit bcm63xx_wdt_exit(void) -{ - platform_driver_unregister(&bcm63xx_wdt); -} - -module_init(bcm63xx_wdt_init); -module_exit(bcm63xx_wdt_exit); - -MODULE_AUTHOR("Miguel Gaio "); -MODULE_AUTHOR("Florian Fainelli "); -MODULE_DESCRIPTION("Driver for the Broadcom BCM63xx SoC watchdog"); -MODULE_LICENSE("GPL"); -MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); -MODULE_ALIAS("platform:bcm63xx-wdt"); diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_board.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_board.h deleted file mode 100644 index fa3e7e617..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_board.h +++ /dev/null @@ -1,12 +0,0 @@ -#ifndef BCM63XX_BOARD_H_ -#define BCM63XX_BOARD_H_ - -const char *board_get_name(void); - -void board_prom_init(void); - -void board_setup(void); - -int board_register_devices(void); - -#endif /* ! BCM63XX_BOARD_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_clk.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_clk.h deleted file mode 100644 index 8fcf8df44..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_clk.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef BCM63XX_CLK_H_ -#define BCM63XX_CLK_H_ - -struct clk { - void (*set)(struct clk *, int); - unsigned int rate; - unsigned int usage; - int id; -}; - -#endif /* ! BCM63XX_CLK_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h deleted file mode 100644 index e27bd5b3d..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_cpu.h +++ /dev/null @@ -1,673 +0,0 @@ -#ifndef BCM63XX_CPU_H_ -#define BCM63XX_CPU_H_ - -#include -#include - -#include - -/* - * Macro to fetch bcm63xx cpu id and revision, should be optimized at - * compile time if only one CPU support is enabled (idea stolen from - * arm mach-types) - */ -#define BCM6338_CPU_ID 0x6338 -#define BCM6345_CPU_ID 0x6345 -#define BCM6348_CPU_ID 0x6348 -#define BCM6358_CPU_ID 0x6358 - -void __init bcm63xx_cpu_init(void); -u16 __bcm63xx_get_cpu_id(void); -u16 bcm63xx_get_cpu_rev(void); -unsigned int bcm63xx_get_cpu_freq(void); - -#ifdef CONFIG_BCM63XX_CPU_6338 -# ifdef bcm63xx_get_cpu_id -# undef bcm63xx_get_cpu_id -# define bcm63xx_get_cpu_id() __bcm63xx_get_cpu_id() -# define BCMCPU_RUNTIME_DETECT -# else -# define bcm63xx_get_cpu_id() BCM6338_CPU_ID -# endif -# define BCMCPU_IS_6338() (bcm63xx_get_cpu_id() == BCM6338_CPU_ID) -#else -# define BCMCPU_IS_6338() (0) -#endif - -#ifdef CONFIG_BCM63XX_CPU_6345 -# ifdef bcm63xx_get_cpu_id -# undef bcm63xx_get_cpu_id -# define bcm63xx_get_cpu_id() __bcm63xx_get_cpu_id() -# define BCMCPU_RUNTIME_DETECT -# else -# define bcm63xx_get_cpu_id() BCM6345_CPU_ID -# endif -# define BCMCPU_IS_6345() (bcm63xx_get_cpu_id() == BCM6345_CPU_ID) -#else -# define BCMCPU_IS_6345() (0) -#endif - -#ifdef CONFIG_BCM63XX_CPU_6348 -# ifdef bcm63xx_get_cpu_id -# undef bcm63xx_get_cpu_id -# define bcm63xx_get_cpu_id() __bcm63xx_get_cpu_id() -# define BCMCPU_RUNTIME_DETECT -# else -# define bcm63xx_get_cpu_id() BCM6348_CPU_ID -# endif -# define BCMCPU_IS_6348() (bcm63xx_get_cpu_id() == BCM6348_CPU_ID) -#else -# define BCMCPU_IS_6348() (0) -#endif - -#ifdef CONFIG_BCM63XX_CPU_6358 -# ifdef bcm63xx_get_cpu_id -# undef bcm63xx_get_cpu_id -# define bcm63xx_get_cpu_id() __bcm63xx_get_cpu_id() -# define BCMCPU_RUNTIME_DETECT -# else -# define bcm63xx_get_cpu_id() BCM6358_CPU_ID -# endif -# define BCMCPU_IS_6358() (bcm63xx_get_cpu_id() == BCM6358_CPU_ID) -#else -# define BCMCPU_IS_6358() (0) -#endif - -#ifndef bcm63xx_get_cpu_id -#error "No CPU support configured" -#endif - -/* - * While registers sets are (mostly) the same across 63xx CPU, base - * address of these sets do change. - */ -enum bcm63xx_regs_set { - RSET_DSL_LMEM = 0, - RSET_PERF, - RSET_TIMER, - RSET_WDT, - RSET_UART0, - RSET_GPIO, - RSET_SPI, - RSET_UDC0, - RSET_OHCI0, - RSET_OHCI_PRIV, - RSET_USBH_PRIV, - RSET_MPI, - RSET_PCMCIA, - RSET_DSL, - RSET_ENET0, - RSET_ENET1, - RSET_ENETDMA, - RSET_EHCI0, - RSET_SDRAM, - RSET_MEMC, - RSET_DDR, -}; - -#define RSET_DSL_LMEM_SIZE (64 * 1024 * 4) -#define RSET_DSL_SIZE 4096 -#define RSET_WDT_SIZE 12 -#define RSET_ENET_SIZE 2048 -#define RSET_ENETDMA_SIZE 2048 -#define RSET_UART_SIZE 24 -#define RSET_SPI_SIZE 256 -#define RSET_UDC_SIZE 256 -#define RSET_OHCI_SIZE 256 -#define RSET_EHCI_SIZE 256 -#define RSET_PCMCIA_SIZE 12 - -/* - * 6338 register sets base address - */ - -#define BCM_6338_DSL_LMEM_BASE (0xfff00000) -#define BCM_6338_PERF_BASE (0xfffe0000) -#define BCM_6338_BB_BASE (0xfffe0100) -#define BCM_6338_TIMER_BASE (0xfffe0200) -#define BCM_6338_WDT_BASE (0xfffe021c) -#define BCM_6338_UART0_BASE (0xfffe0300) -#define BCM_6338_GPIO_BASE (0xfffe0400) -#define BCM_6338_SPI_BASE (0xfffe0c00) -#define BCM_6338_UDC0_BASE (0xfffe3000) -#define BCM_6338_USBDMA_BASE (0xfffe2400) -#define BCM_6338_OHCI0_BASE (0xdeadbeef) -#define BCM_6338_OHCI_PRIV_BASE (0xdeadbeef) -#define BCM_6338_USBH_PRIV_BASE (0xdeadbeef) -#define BCM_6338_MPI_BASE (0xfffe3160) -#define BCM_6338_PCMCIA_BASE (0xdeadbeef) -#define BCM_6338_SDRAM_REGS_BASE (0xfffe3100) -#define BCM_6338_DSL_BASE (0xfffe1000) -#define BCM_6338_SAR_BASE (0xfffe2000) -#define BCM_6338_UBUS_BASE (0xdeadbeef) -#define BCM_6338_ENET0_BASE (0xfffe2800) -#define BCM_6338_ENET1_BASE (0xdeadbeef) -#define BCM_6338_ENETDMA_BASE (0xfffe2400) -#define BCM_6338_EHCI0_BASE (0xdeadbeef) -#define BCM_6338_SDRAM_BASE (0xfffe3100) -#define BCM_6338_MEMC_BASE (0xdeadbeef) -#define BCM_6338_DDR_BASE (0xdeadbeef) - -/* - * 6345 register sets base address - */ -#define BCM_6345_DSL_LMEM_BASE (0xfff00000) -#define BCM_6345_PERF_BASE (0xfffe0000) -#define BCM_6345_BB_BASE (0xfffe0100) -#define BCM_6345_TIMER_BASE (0xfffe0200) -#define BCM_6345_WDT_BASE (0xfffe021c) -#define BCM_6345_UART0_BASE (0xfffe0300) -#define BCM_6345_GPIO_BASE (0xfffe0400) -#define BCM_6345_SPI_BASE (0xdeadbeef) -#define BCM_6345_UDC0_BASE (0xfffe2100) -#define BCM_6345_USBDMA_BASE (0xfffe2b00) -#define BCM_6345_ENET0_BASE (0xfffe1800) -#define BCM_6345_ENETDMA_BASE (0xfffe2800) -#define BCM_6345_PCMCIA_BASE (0xfffe2028) -#define BCM_6345_MPI_BASE (0xdeadbeef) -#define BCM_6345_OHCI0_BASE (0xdeadbeef) -#define BCM_6345_OHCI_PRIV_BASE (0xdeadbeef) -#define BCM_6345_USBH_PRIV_BASE (0xdeadbeef) -#define BCM_6345_SDRAM_REGS_BASE (0xfffe2300) -#define BCM_6345_DSL_BASE (0xdeadbeef) -#define BCM_6345_SAR_BASE (0xdeadbeef) -#define BCM_6345_UBUS_BASE (0xdeadbeef) -#define BCM_6345_ENET1_BASE (0xdeadbeef) -#define BCM_6345_EHCI0_BASE (0xdeadbeef) -#define BCM_6345_SDRAM_BASE (0xfffe2300) -#define BCM_6345_MEMC_BASE (0xdeadbeef) -#define BCM_6345_DDR_BASE (0xdeadbeef) - -/* - * 6348 register sets base address - */ -#define BCM_6348_DSL_LMEM_BASE (0xfff00000) -#define BCM_6348_PERF_BASE (0xfffe0000) -#define BCM_6348_BB_BASE (0xfffe0100) -#define BCM_6348_TIMER_BASE (0xfffe0200) -#define BCM_6348_WDT_BASE (0xfffe021c) -#define BCM_6348_UART0_BASE (0xfffe0300) -#define BCM_6348_GPIO_BASE (0xfffe0400) -#define BCM_6348_SPI_BASE (0xfffe0c00) -#define BCM_6348_UDC0_BASE (0xfffe1000) -#define BCM_6348_USBDMA_BASE (0xfffe1400) -#define BCM_6348_OHCI0_BASE (0xfffe1b00) -#define BCM_6348_OHCI_PRIV_BASE (0xfffe1c00) -#define BCM_6348_USBH_PRIV_BASE (0xdeadbeef) -#define BCM_6348_MPI_BASE (0xfffe2000) -#define BCM_6348_PCMCIA_BASE (0xfffe2054) -#define BCM_6348_SDRAM_REGS_BASE (0xfffe2300) -#define BCM_6348_DSL_BASE (0xfffe3000) -#define BCM_6348_SAR_BASE (0xfffe4000) -#define BCM_6348_UBUS_BASE (0xfffe5000) -#define BCM_6348_ENET0_BASE (0xfffe6000) -#define BCM_6348_ENET1_BASE (0xfffe6800) -#define BCM_6348_ENETDMA_BASE (0xfffe7000) -#define BCM_6348_EHCI0_BASE (0xdeadbeef) -#define BCM_6348_SDRAM_BASE (0xfffe2300) -#define BCM_6348_MEMC_BASE (0xdeadbeef) -#define BCM_6348_DDR_BASE (0xdeadbeef) - -/* - * 6358 register sets base address - */ -#define BCM_6358_DSL_LMEM_BASE (0xfff00000) -#define BCM_6358_PERF_BASE (0xfffe0000) -#define BCM_6358_TIMER_BASE (0xfffe0040) -#define BCM_6358_WDT_BASE (0xfffe005c) -#define BCM_6358_GPIO_BASE (0xfffe0080) -#define BCM_6358_UART0_BASE (0xfffe0100) -#define BCM_6358_UDC0_BASE (0xfffe0400) -#define BCM_6358_SPI_BASE (0xfffe0800) -#define BCM_6358_MPI_BASE (0xfffe1000) -#define BCM_6358_PCMCIA_BASE (0xfffe1054) -#define BCM_6358_OHCI0_BASE (0xfffe1400) -#define BCM_6358_OHCI_PRIV_BASE (0xdeadbeef) -#define BCM_6358_USBH_PRIV_BASE (0xfffe1500) -#define BCM_6358_SDRAM_REGS_BASE (0xfffe2300) -#define BCM_6358_DSL_BASE (0xfffe3000) -#define BCM_6358_ENET0_BASE (0xfffe4000) -#define BCM_6358_ENET1_BASE (0xfffe4800) -#define BCM_6358_ENETDMA_BASE (0xfffe5000) -#define BCM_6358_EHCI0_BASE (0xfffe1300) -#define BCM_6358_SDRAM_BASE (0xdeadbeef) -#define BCM_6358_MEMC_BASE (0xfffe1200) -#define BCM_6358_DDR_BASE (0xfffe12a0) - - -extern const unsigned long *bcm63xx_regs_base; - -static inline unsigned long bcm63xx_regset_address(enum bcm63xx_regs_set set) -{ -#ifdef BCMCPU_RUNTIME_DETECT - return bcm63xx_regs_base[set]; -#else -#ifdef CONFIG_BCM63XX_CPU_6338 - switch (set) { - case RSET_DSL_LMEM: - return BCM_6338_DSL_LMEM_BASE; - case RSET_PERF: - return BCM_6338_PERF_BASE; - case RSET_TIMER: - return BCM_6338_TIMER_BASE; - case RSET_WDT: - return BCM_6338_WDT_BASE; - case RSET_UART0: - return BCM_6338_UART0_BASE; - case RSET_GPIO: - return BCM_6338_GPIO_BASE; - case RSET_SPI: - return BCM_6338_SPI_BASE; - case RSET_UDC0: - return BCM_6338_UDC0_BASE; - case RSET_OHCI0: - return BCM_6338_OHCI0_BASE; - case RSET_OHCI_PRIV: - return BCM_6338_OHCI_PRIV_BASE; - case RSET_USBH_PRIV: - return BCM_6338_USBH_PRIV_BASE; - case RSET_MPI: - return BCM_6338_MPI_BASE; - case RSET_PCMCIA: - return BCM_6338_PCMCIA_BASE; - case RSET_DSL: - return BCM_6338_DSL_BASE; - case RSET_ENET0: - return BCM_6338_ENET0_BASE; - case RSET_ENET1: - return BCM_6338_ENET1_BASE; - case RSET_ENETDMA: - return BCM_6338_ENETDMA_BASE; - case RSET_EHCI0: - return BCM_6338_EHCI0_BASE; - case RSET_SDRAM: - return BCM_6338_SDRAM_BASE; - case RSET_MEMC: - return BCM_6338_MEMC_BASE; - case RSET_DDR: - return BCM_6338_DDR_BASE; - } -#endif -#ifdef CONFIG_BCM63XX_CPU_6345 - switch (set) { - case RSET_DSL_LMEM: - return BCM_6345_DSL_LMEM_BASE; - case RSET_PERF: - return BCM_6345_PERF_BASE; - case RSET_TIMER: - return BCM_6345_TIMER_BASE; - case RSET_WDT: - return BCM_6345_WDT_BASE; - case RSET_UART0: - return BCM_6345_UART0_BASE; - case RSET_GPIO: - return BCM_6345_GPIO_BASE; - case RSET_SPI: - return BCM_6345_SPI_BASE; - case RSET_UDC0: - return BCM_6345_UDC0_BASE; - case RSET_OHCI0: - return BCM_6345_OHCI0_BASE; - case RSET_OHCI_PRIV: - return BCM_6345_OHCI_PRIV_BASE; - case RSET_USBH_PRIV: - return BCM_6345_USBH_PRIV_BASE; - case RSET_MPI: - return BCM_6345_MPI_BASE; - case RSET_PCMCIA: - return BCM_6345_PCMCIA_BASE; - case RSET_DSL: - return BCM_6345_DSL_BASE; - case RSET_ENET0: - return BCM_6345_ENET0_BASE; - case RSET_ENET1: - return BCM_6345_ENET1_BASE; - case RSET_ENETDMA: - return BCM_6345_ENETDMA_BASE; - case RSET_EHCI0: - return BCM_6345_EHCI0_BASE; - case RSET_SDRAM: - return BCM_6345_SDRAM_BASE; - case RSET_MEMC: - return BCM_6345_MEMC_BASE; - case RSET_DDR: - return BCM_6345_DDR_BASE; - } -#endif -#ifdef CONFIG_BCM63XX_CPU_6348 - switch (set) { - case RSET_DSL_LMEM: - return BCM_6348_DSL_LMEM_BASE; - case RSET_PERF: - return BCM_6348_PERF_BASE; - case RSET_TIMER: - return BCM_6348_TIMER_BASE; - case RSET_WDT: - return BCM_6348_WDT_BASE; - case RSET_UART0: - return BCM_6348_UART0_BASE; - case RSET_GPIO: - return BCM_6348_GPIO_BASE; - case RSET_SPI: - return BCM_6348_SPI_BASE; - case RSET_UDC0: - return BCM_6348_UDC0_BASE; - case RSET_OHCI0: - return BCM_6348_OHCI0_BASE; - case RSET_OHCI_PRIV: - return BCM_6348_OHCI_PRIV_BASE; - case RSET_USBH_PRIV: - return BCM_6348_USBH_PRIV_BASE; - case RSET_MPI: - return BCM_6348_MPI_BASE; - case RSET_PCMCIA: - return BCM_6348_PCMCIA_BASE; - case RSET_DSL: - return BCM_6348_DSL_BASE; - case RSET_ENET0: - return BCM_6348_ENET0_BASE; - case RSET_ENET1: - return BCM_6348_ENET1_BASE; - case RSET_ENETDMA: - return BCM_6348_ENETDMA_BASE; - case RSET_EHCI0: - return BCM_6348_EHCI0_BASE; - case RSET_SDRAM: - return BCM_6348_SDRAM_BASE; - case RSET_MEMC: - return BCM_6348_MEMC_BASE; - case RSET_DDR: - return BCM_6348_DDR_BASE; - } -#endif -#ifdef CONFIG_BCM63XX_CPU_6358 - switch (set) { - case RSET_DSL_LMEM: - return BCM_6358_DSL_LMEM_BASE; - case RSET_PERF: - return BCM_6358_PERF_BASE; - case RSET_TIMER: - return BCM_6358_TIMER_BASE; - case RSET_WDT: - return BCM_6358_WDT_BASE; - case RSET_UART0: - return BCM_6358_UART0_BASE; - case RSET_GPIO: - return BCM_6358_GPIO_BASE; - case RSET_SPI: - return BCM_6358_SPI_BASE; - case RSET_UDC0: - return BCM_6358_UDC0_BASE; - case RSET_OHCI0: - return BCM_6358_OHCI0_BASE; - case RSET_OHCI_PRIV: - return BCM_6358_OHCI_PRIV_BASE; - case RSET_USBH_PRIV: - return BCM_6358_USBH_PRIV_BASE; - case RSET_MPI: - return BCM_6358_MPI_BASE; - case RSET_PCMCIA: - return BCM_6358_PCMCIA_BASE; - case RSET_ENET0: - return BCM_6358_ENET0_BASE; - case RSET_ENET1: - return BCM_6358_ENET1_BASE; - case RSET_ENETDMA: - return BCM_6358_ENETDMA_BASE; - case RSET_DSL: - return BCM_6358_DSL_BASE; - case RSET_EHCI0: - return BCM_6358_EHCI0_BASE; - case RSET_SDRAM: - return BCM_6358_SDRAM_BASE; - case RSET_MEMC: - return BCM_6358_MEMC_BASE; - case RSET_DDR: - return BCM_6358_DDR_BASE; - } -#endif -#endif - /* unreached */ - return 0; -} - -/* - * SPI register layout is not compatible - * accross CPU versions but it is software - * compatible - */ - -enum bcm63xx_regs_spi { - SPI_CMD, - SPI_INT_STATUS, - SPI_INT_MASK_ST, - SPI_INT_MASK, - SPI_ST, - SPI_CLK_CFG, - SPI_FILL_BYTE, - SPI_MSG_TAIL, - SPI_RX_TAIL, - SPI_MSG_CTL, - SPI_MSG_DATA, - SPI_RX_DATA, -}; - -extern const unsigned long *bcm63xx_regs_spi; - -static inline unsigned long bcm63xx_spireg(enum bcm63xx_regs_spi reg) -{ -#ifdef BCMCPU_RUNTIME_DETECT - return bcm63xx_regs_spi[reg]; -#else -#ifdef CONFIG_BCM63XX_CPU_6338 -switch (reg) { - case SPI_CMD: - return SPI_BCM_6338_SPI_CMD; - case SPI_INT_STATUS: - return SPI_BCM_6338_SPI_INT_STATUS; - case SPI_INT_MASK_ST: - return SPI_BCM_6338_SPI_MASK_INT_ST; - case SPI_INT_MASK: - return SPI_BCM_6338_SPI_INT_MASK; - case SPI_ST: - return SPI_BCM_6338_SPI_ST; - case SPI_CLK_CFG: - return SPI_BCM_6338_SPI_CLK_CFG; - case SPI_FILL_BYTE: - return SPI_BCM_6338_SPI_FILL_BYTE; - case SPI_MSG_TAIL: - return SPI_BCM_6338_SPI_MSG_TAIL; - case SPI_RX_TAIL: - return SPI_BCM_6338_SPI_RX_TAIL; - case SPI_MSG_CTL: - return SPI_BCM_6338_SPI_MSG_CTL; - case SPI_MSG_DATA: - return SPI_BCM_6338_SPI_MSG_DATA; - case SPI_RX_DATA: - return SPI_BCM_6338_SPI_RX_DATA; -} -#endif -#ifdef CONFIG_BCM63XX_CPU_6348 -switch (reg) { - case SPI_CMD: - return SPI_BCM_6348_SPI_CMD; - case SPI_INT_MASK_ST: - return SPI_BCM_6348_SPI_MASK_INT_ST; - case SPI_INT_MASK: - return SPI_BCM_6348_SPI_INT_MASK; - case SPI_INT_STATUS: - return SPI_BCM_6348_SPI_INT_STATUS; - case SPI_ST: - return SPI_BCM_6348_SPI_ST; - case SPI_CLK_CFG: - return SPI_BCM_6348_SPI_CLK_CFG; - case SPI_FILL_BYTE: - return SPI_BCM_6348_SPI_FILL_BYTE; - case SPI_MSG_TAIL: - return SPI_BCM_6348_SPI_MSG_TAIL; - case SPI_RX_TAIL: - return SPI_BCM_6348_SPI_RX_TAIL; - case SPI_MSG_CTL: - return SPI_BCM_6348_SPI_MSG_CTL; - case SPI_MSG_DATA: - return SPI_BCM_6348_SPI_MSG_DATA; - case SPI_RX_DATA: - return SPI_BCM_6348_SPI_RX_DATA; -} -#endif -#ifdef CONFIG_BCM63XX_CPU_6358 -switch (reg) { - case SPI_CMD: - return SPI_BCM_6358_SPI_CMD; - case SPI_INT_STATUS: - return SPI_BCM_6358_SPI_INT_STATUS; - case SPI_INT_MASK_ST: - return SPI_BCM_6358_SPI_MASK_INT_ST; - case SPI_INT_MASK: - return SPI_BCM_6358_SPI_INT_MASK; - case SPI_ST: - return SPI_BCM_6358_SPI_STATUS; - case SPI_CLK_CFG: - return SPI_BCM_6358_SPI_CLK_CFG; - case SPI_FILL_BYTE: - return SPI_BCM_6358_SPI_FILL_BYTE; - case SPI_MSG_TAIL: - return SPI_BCM_6358_SPI_MSG_TAIL; - case SPI_RX_TAIL: - return SPI_BCM_6358_SPI_RX_TAIL; - case SPI_MSG_CTL: - return SPI_BCM_6358_MSG_CTL; - case SPI_MSG_DATA: - return SPI_BCM_6358_SPI_MSG_DATA; - case SPI_RX_DATA: - return SPI_BCM_6358_SPI_RX_DATA; -} -#endif -#endif - return 0; -} - -/* - * IRQ number changes across CPU too - */ -enum bcm63xx_irq { - IRQ_TIMER = 0, - IRQ_UART0, - IRQ_SPI, - IRQ_DSL, - IRQ_UDC0, - IRQ_ENET0, - IRQ_ENET1, - IRQ_ENET_PHY, - IRQ_OHCI0, - IRQ_EHCI0, - IRQ_PCMCIA0, - IRQ_ENET0_RXDMA, - IRQ_ENET0_TXDMA, - IRQ_ENET1_RXDMA, - IRQ_ENET1_TXDMA, - IRQ_PCI, - IRQ_PCMCIA, -}; - -/* - * 6338 irqs - */ -#define BCM_6338_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) -#define BCM_6338_SPI_IRQ (IRQ_INTERNAL_BASE + 1) -#define BCM_6338_UART0_IRQ (IRQ_INTERNAL_BASE + 2) -#define BCM_6338_DG_IRQ (IRQ_INTERNAL_BASE + 4) -#define BCM_6338_DSL_IRQ (IRQ_INTERNAL_BASE + 5) -#define BCM_6338_ATM_IRQ (IRQ_INTERNAL_BASE + 6) -#define BCM_6338_UDC0_IRQ (IRQ_INTERNAL_BASE + 7) -#define BCM_6338_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) -#define BCM_6338_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) -#define BCM_6338_SDRAM_IRQ (IRQ_INTERNAL_BASE + 10) -#define BCM_6338_USB_CNTL_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 11) -#define BCM_6338_USB_CNTL_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 12) -#define BCM_6338_USB_BULK_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 13) -#define BCM_6338_USB_BULK_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 14) -#define BCM_6338_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15) -#define BCM_6338_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 16) -#define BCM_6338_SDIO_IRQ (IRQ_INTERNAL_BASE + 17) - -/* - * 6345 irqs - */ -#define BCM_6345_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) -#define BCM_6345_UART0_IRQ (IRQ_INTERNAL_BASE + 2) -#define BCM_6345_DSL_IRQ (IRQ_INTERNAL_BASE + 3) -#define BCM_6345_ATM_IRQ (IRQ_INTERNAL_BASE + 4) -#define BCM_6345_UDC0_IRQ (IRQ_INTERNAL_BASE + 5) -#define BCM_6345_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) -#define BCM_6345_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12) -#define BCM_6345_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 1) -#define BCM_6345_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 13 + 2) -#define BCM_6345_EBI_RX_IRQ (IRQ_INTERNAL_BASE + 13 + 5) -#define BCM_6345_EBI_TX_IRQ (IRQ_INTERNAL_BASE + 13 + 6) -#define BCM_6345_RESERVED_RX_IRQ (IRQ_INTERNAL_BASE + 13 + 9) -#define BCM_6345_RESERVED_TX_IRQ (IRQ_INTERNAL_BASE + 13 + 10) -#define BCM_6345_USB_BULK_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 13 + 13) -#define BCM_6345_USB_BULK_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 13 + 14) -#define BCM_6345_USB_CNTL_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 13 + 15) -#define BCM_6345_USB_CNTL_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 13 + 16) -#define BCM_6345_USB_ISO_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 13 + 17) -#define BCM_6345_USB_ISO_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 13 + 18) - -/* - * 6348 irqs - */ -#define BCM_6348_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) -#define BCM_6348_SPI_IRQ (IRQ_INTERNAL_BASE + 1) -#define BCM_6348_UART0_IRQ (IRQ_INTERNAL_BASE + 2) -#define BCM_6348_DSL_IRQ (IRQ_INTERNAL_BASE + 4) -#define BCM_6348_UDC0_IRQ (IRQ_INTERNAL_BASE + 6) -#define BCM_6348_ENET1_IRQ (IRQ_INTERNAL_BASE + 7) -#define BCM_6348_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) -#define BCM_6348_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) -#define BCM_6348_OHCI0_IRQ (IRQ_INTERNAL_BASE + 12) -#define BCM_6348_USB_CNTL_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 14) -#define BCM_6348_USB_CNTL_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 15) -#define BCM_6348_USB_BULK_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 16) -#define BCM_6348_USB_BULK_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 17) -#define BCM_6348_USB_ISO_RX_DMA_IRQ (IRQ_INTERNAL_BASE + 18) -#define BCM_6348_USB_ISO_TX_DMA_IRQ (IRQ_INTERNAL_BASE + 19) -#define BCM_6348_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 20) -#define BCM_6348_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 21) -#define BCM_6348_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 22) -#define BCM_6348_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 23) -#define BCM_6348_PCMCIA_IRQ (IRQ_INTERNAL_BASE + 24) -#define BCM_6348_PCI_IRQ (IRQ_INTERNAL_BASE + 24) - -/* - * 6358 irqs - */ -#define BCM_6358_TIMER_IRQ (IRQ_INTERNAL_BASE + 0) -#define BCM_6358_SPI_IRQ (IRQ_INTERNAL_BASE + 1) -#define BCM_6358_UART0_IRQ (IRQ_INTERNAL_BASE + 2) -#define BCM_6358_OHCI0_IRQ (IRQ_INTERNAL_BASE + 5) -#define BCM_6358_ENET1_IRQ (IRQ_INTERNAL_BASE + 6) -#define BCM_6358_ENET0_IRQ (IRQ_INTERNAL_BASE + 8) -#define BCM_6358_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 9) -#define BCM_6358_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10) -#define BCM_6358_ENET0_RXDMA_IRQ (IRQ_INTERNAL_BASE + 15) -#define BCM_6358_ENET0_TXDMA_IRQ (IRQ_INTERNAL_BASE + 16) -#define BCM_6358_ENET1_RXDMA_IRQ (IRQ_INTERNAL_BASE + 17) -#define BCM_6358_ENET1_TXDMA_IRQ (IRQ_INTERNAL_BASE + 18) -#define BCM_6358_DSL_IRQ (IRQ_INTERNAL_BASE + 29) -#define BCM_6358_PCI_IRQ (IRQ_INTERNAL_BASE + 31) -#define BCM_6358_PCMCIA_IRQ (IRQ_INTERNAL_BASE + 24) - -extern const int *bcm63xx_irqs; - -static inline int bcm63xx_get_irq_number(enum bcm63xx_irq irq) -{ - return bcm63xx_irqs[irq]; -} - -/* - * return installed memory size - */ -unsigned int bcm63xx_get_memory_size(void); - -#endif /* !BCM63XX_CPU_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_cs.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_cs.h deleted file mode 100644 index b1821c866..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_cs.h +++ /dev/null @@ -1,10 +0,0 @@ -#ifndef BCM63XX_CS_H -#define BCM63XX_CS_H - -int bcm63xx_set_cs_base(unsigned int cs, u32 base, unsigned int size); -int bcm63xx_set_cs_timing(unsigned int cs, unsigned int wait, - unsigned int setup, unsigned int hold); -int bcm63xx_set_cs_param(unsigned int cs, u32 flags); -int bcm63xx_set_cs_status(unsigned int cs, int enable); - -#endif /* !BCM63XX_CS_H */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_dsp.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_dsp.h deleted file mode 100644 index b587d45c3..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_dsp.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef __BCM63XX_DSP_H -#define __BCM63XX_DSP_H - -struct bcm63xx_dsp_platform_data { - unsigned gpio_rst; - unsigned gpio_int; - unsigned cs; - unsigned ext_irq; -}; - -int __init bcm63xx_dsp_register(const struct bcm63xx_dsp_platform_data *pd); - -#endif /* __BCM63XX_DSP_H */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_enet.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_enet.h deleted file mode 100644 index d53f61118..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_enet.h +++ /dev/null @@ -1,45 +0,0 @@ -#ifndef BCM63XX_DEV_ENET_H_ -#define BCM63XX_DEV_ENET_H_ - -#include -#include - -/* - * on board ethernet platform data - */ -struct bcm63xx_enet_platform_data { - char mac_addr[ETH_ALEN]; - - int has_phy; - - /* if has_phy, then set use_internal_phy */ - int use_internal_phy; - - /* or fill phy info to use an external one */ - int phy_id; - int has_phy_interrupt; - int phy_interrupt; - - /* if has_phy, use autonegociated pause parameters or force - * them */ - int pause_auto; - int pause_rx; - int pause_tx; - - /* if !has_phy, set desired forced speed/duplex */ - int force_speed_100; - int force_duplex_full; - - /* if !has_phy, set callback to perform mii device - * init/remove */ - int (*mii_config)(struct net_device *dev, int probe, - int (*mii_read)(struct net_device *dev, - int phy_id, int reg), - void (*mii_write)(struct net_device *dev, - int phy_id, int reg, int val)); -}; - -int __init bcm63xx_enet_register(int unit, - const struct bcm63xx_enet_platform_data *pd); - -#endif /* ! BCM63XX_DEV_ENET_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_pci.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_pci.h deleted file mode 100644 index c549344b7..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_pci.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef BCM63XX_DEV_PCI_H_ -#define BCM63XX_DEV_PCI_H_ - -extern int bcm63xx_pci_enabled; - -#endif /* BCM63XX_DEV_PCI_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_pcmcia.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_pcmcia.h deleted file mode 100644 index 2beb3969c..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_pcmcia.h +++ /dev/null @@ -1,13 +0,0 @@ -#ifndef BCM63XX_DEV_PCMCIA_H_ -#define BCM63XX_DEV_PCMCIA_H_ - -/* - * PCMCIA driver platform data - */ -struct bcm63xx_pcmcia_platform_data { - unsigned int ready_gpio; -}; - -int bcm63xx_pcmcia_register(void); - -#endif /* BCM63XX_DEV_PCMCIA_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_spi.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_spi.h deleted file mode 100644 index cfa79bf94..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_spi.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef BCM63XX_DEV_SPI_H -#define BCM63XX_DEV_SPI_H - -#include - -int __init bcm63xx_spi_register(void); - -struct bcm63xx_spi_pdata { - unsigned int fifo_size; - int bus_num; - int num_chipselect; - u32 speed_hz; -}; - -#endif /* BCM63XX_DEV_SPI_H */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h deleted file mode 100644 index bf348f573..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef BCM63XX_DEV_UART_H_ -#define BCM63XX_DEV_UART_H_ - -int bcm63xx_uart_register(void); - -#endif /* BCM63XX_DEV_UART_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ehci.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ehci.h deleted file mode 100644 index 17fb519dd..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ehci.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef BCM63XX_DEV_USB_EHCI_H_ -#define BCM63XX_DEV_USB_EHCI_H_ - -int bcm63xx_ehci_register(void); - -#endif /* BCM63XX_DEV_USB_EHCI_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ohci.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ohci.h deleted file mode 100644 index 518a04d03..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ohci.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef BCM63XX_DEV_USB_OHCI_H_ -#define BCM63XX_DEV_USB_OHCI_H_ - -int bcm63xx_ohci_register(void); - -#endif /* BCM63XX_DEV_USB_OHCI_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_udc.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_udc.h deleted file mode 100644 index 54d37f0bc..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_udc.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef BCM63XX_DEV_USB_UDC_H_ -#define BCM63XX_DEV_USB_UDC_H_ - -int bcm63xx_udc_register(void); - -#endif /* BCM63XX_DEV_USB_UDC_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_wdt.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_wdt.h deleted file mode 100644 index 4aae2c796..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_dev_wdt.h +++ /dev/null @@ -1,6 +0,0 @@ -#ifndef BCM63XX_DEV_WDT_H_ -#define BCM63XX_DEV_WDT_H_ - -int bcm63xx_wdt_register(void); - -#endif /* BCM63XX_DEV_WDT_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_gpio.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_gpio.h deleted file mode 100644 index 43d4da0b1..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_gpio.h +++ /dev/null @@ -1,26 +0,0 @@ -#ifndef BCM63XX_GPIO_H -#define BCM63XX_GPIO_H - -#include - -int __init bcm63xx_gpio_init(void); - -static inline unsigned long bcm63xx_gpio_count(void) -{ - switch (bcm63xx_get_cpu_id()) { - case BCM6358_CPU_ID: - return 40; - case BCM6338_CPU_ID: - return 8; - case BCM6345_CPU_ID: - return 16; - case BCM6348_CPU_ID: - default: - return 37; - } -} - -#define GPIO_DIR_OUT 0x0 -#define GPIO_DIR_IN 0x1 - -#endif /* !BCM63XX_GPIO_H */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_io.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_io.h deleted file mode 100644 index 31e950e11..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_io.h +++ /dev/null @@ -1,107 +0,0 @@ -#ifndef BCM63XX_IO_H_ -#define BCM63XX_IO_H_ - -#include "bcm63xx_cpu.h" - -/* - * Physical memory map, RAM is mapped at 0x0. - * - * Note that size MUST be a power of two. - */ -#define BCM_PCMCIA_COMMON_BASE_PA (0x20000000) -#define BCM_PCMCIA_COMMON_SIZE (16 * 1024 * 1024) -#define BCM_PCMCIA_COMMON_END_PA (BCM_PCMCIA_COMMON_BASE_PA + \ - BCM_PCMCIA_COMMON_SIZE - 1) - -#define BCM_PCMCIA_ATTR_BASE_PA (0x21000000) -#define BCM_PCMCIA_ATTR_SIZE (16 * 1024 * 1024) -#define BCM_PCMCIA_ATTR_END_PA (BCM_PCMCIA_ATTR_BASE_PA + \ - BCM_PCMCIA_ATTR_SIZE - 1) - -#define BCM_PCMCIA_IO_BASE_PA (0x22000000) -#define BCM_PCMCIA_IO_SIZE (64 * 1024) -#define BCM_PCMCIA_IO_END_PA (BCM_PCMCIA_IO_BASE_PA + \ - BCM_PCMCIA_IO_SIZE - 1) - -#define BCM_PCI_MEM_BASE_PA (0x30000000) -#define BCM_PCI_MEM_SIZE (128 * 1024 * 1024) -#define BCM_PCI_MEM_END_PA (BCM_PCI_MEM_BASE_PA + \ - BCM_PCI_MEM_SIZE - 1) - -#define BCM_PCI_IO_BASE_PA (0x08000000) -#define BCM_PCI_IO_SIZE (64 * 1024) -#define BCM_PCI_IO_END_PA (BCM_PCI_IO_BASE_PA + \ - BCM_PCI_IO_SIZE - 1) -#define BCM_PCI_IO_HALF_PA (BCM_PCI_IO_BASE_PA + \ - (BCM_PCI_IO_SIZE / 2) - 1) - -#define BCM_CB_MEM_BASE_PA (0x38000000) -#define BCM_CB_MEM_SIZE (128 * 1024 * 1024) -#define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \ - BCM_CB_MEM_SIZE - 1) - - -/* - * Internal registers are accessed through KSEG3 - */ -#define BCM_REGS_VA(x) ((void __iomem *)(x)) - -#define bcm_readb(a) (*(volatile unsigned char *) BCM_REGS_VA(a)) -#define bcm_readw(a) (*(volatile unsigned short *) BCM_REGS_VA(a)) -#define bcm_readl(a) (*(volatile unsigned int *) BCM_REGS_VA(a)) -#define bcm_writeb(v,a) (*(volatile unsigned char *) BCM_REGS_VA((a)) = (v)) -#define bcm_writew(v,a) (*(volatile unsigned short *) BCM_REGS_VA((a)) = (v)) -#define bcm_writel(v,a) (*(volatile unsigned int *) BCM_REGS_VA((a)) = (v)) - -/* - * IO helpers to access register set for current CPU - */ -#define bcm_rset_readb(s,o) bcm_readb(bcm63xx_regset_address(s) + (o)) -#define bcm_rset_readw(s,o) bcm_readw(bcm63xx_regset_address(s) + (o)) -#define bcm_rset_readl(s,o) bcm_readl(bcm63xx_regset_address(s) + (o)) -#define bcm_rset_writeb(s,v,o) bcm_writeb((v), \ - bcm63xx_regset_address(s) + (o)) -#define bcm_rset_writew(s,v,o) bcm_writew((v), \ - bcm63xx_regset_address(s) + (o)) -#define bcm_rset_writel(s,v,o) bcm_writel((v), \ - bcm63xx_regset_address(s) + (o)) - -/* - * helpers for frequently used register sets - */ -#define bcm_perf_readl(o) bcm_rset_readl(RSET_PERF, (o)) -#define bcm_perf_writel(v,o) bcm_rset_writel(RSET_PERF, (v), (o)) -#define bcm_timer_readl(o) bcm_rset_readl(RSET_TIMER, (o)) -#define bcm_timer_writel(v,o) bcm_rset_writel(RSET_TIMER, (v), (o)) -#define bcm_wdt_readl(o) bcm_rset_readl(RSET_WDT, (o)) -#define bcm_wdt_writel(v,o) bcm_rset_writel(RSET_WDT, (v), (o)) -#define bcm_gpio_readl(o) bcm_rset_readl(RSET_GPIO, (o)) -#define bcm_gpio_writel(v,o) bcm_rset_writel(RSET_GPIO, (v), (o)) -#define bcm_uart0_readl(o) bcm_rset_readl(RSET_UART0, (o)) -#define bcm_uart0_writel(v,o) bcm_rset_writel(RSET_UART0, (v), (o)) -#define bcm_mpi_readl(o) bcm_rset_readl(RSET_MPI, (o)) -#define bcm_mpi_writel(v,o) bcm_rset_writel(RSET_MPI, (v), (o)) -#define bcm_pcmcia_readl(o) bcm_rset_readl(RSET_PCMCIA, (o)) -#define bcm_pcmcia_writel(v,o) bcm_rset_writel(RSET_PCMCIA, (v), (o)) -#define bcm_sdram_readl(o) bcm_rset_readl(RSET_SDRAM, (o)) -#define bcm_sdram_writel(v,o) bcm_rset_writel(RSET_SDRAM, (v), (o)) -#define bcm_memc_readl(o) bcm_rset_readl(RSET_MEMC, (o)) -#define bcm_memc_writel(v,o) bcm_rset_writel(RSET_MEMC, (v), (o)) -#define bcm_ddr_readl(o) bcm_rset_readl(RSET_DDR, (o)) -#define bcm_ddr_writel(v,o) bcm_rset_writel(RSET_DDR, (v), (o)) - -/* - * helpers for the SPI register sets - */ -#define bcm_spi_readb(b,o) bcm_readb((b) + \ - bcm63xx_spireg(o)) -#define bcm_spi_readw(b,o) bcm_readw((b) + \ - bcm63xx_spireg(o)) -#define bcm_spi_writeb(v,b,o) bcm_writeb((v), \ - (b) + \ - bcm63xx_spireg(o)) -#define bcm_spi_writew(v,b,o) bcm_writew((v), \ - (b) + \ - bcm63xx_spireg(o)) - -#endif /* ! BCM63XX_IO_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_irq.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_irq.h deleted file mode 100644 index 5f95577c8..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_irq.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef BCM63XX_IRQ_H_ -#define BCM63XX_IRQ_H_ - -#include - -#define IRQ_MIPS_BASE 0 -#define IRQ_INTERNAL_BASE 8 - -#define IRQ_EXT_BASE (IRQ_MIPS_BASE + 3) -#define IRQ_EXT_0 (IRQ_EXT_BASE + 0) -#define IRQ_EXT_1 (IRQ_EXT_BASE + 1) -#define IRQ_EXT_2 (IRQ_EXT_BASE + 2) -#define IRQ_EXT_3 (IRQ_EXT_BASE + 3) - -#endif /* ! BCM63XX_IRQ_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_regs.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_regs.h deleted file mode 100644 index e2cc60758..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_regs.h +++ /dev/null @@ -1,886 +0,0 @@ -#ifndef BCM63XX_REGS_H_ -#define BCM63XX_REGS_H_ - -/************************************************************************* - * _REG relative to RSET_PERF - *************************************************************************/ - -/* Chip Identifier / Revision register */ -#define PERF_REV_REG 0x0 -#define REV_CHIPID_SHIFT 16 -#define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT) -#define REV_REVID_SHIFT 0 -#define REV_REVID_MASK (0xffff << REV_REVID_SHIFT) - -/* Clock Control register */ -#define PERF_CKCTL_REG 0x4 - -#define CKCTL_6338_ADSLPHY_EN (1 << 0) -#define CKCTL_6338_MPI_EN (1 << 1) -#define CKCTL_6338_DRAM_EN (1 << 2) -#define CKCTL_6338_ENET_EN (1 << 4) -#define CKCTL_6338_USBS_EN (1 << 4) -#define CKCTL_6338_SAR_EN (1 << 5) -#define CKCTL_6338_SPI_EN (1 << 9) - -#define CKCTL_6338_ALL_SAFE_EN (CKCTL_6338_ADSLPHY_EN | \ - CKCTL_6338_MPI_EN | \ - CKCTL_6338_ENET_EN | \ - CKCTL_6338_SAR_EN | \ - CKCTL_6338_SPI_EN) - -#define CKCTL_6345_CPU_EN (1 << 0) -#define CKCTL_6345_BUS_EN (1 << 1) -#define CKCTL_6345_EBI_EN (1 << 2) -#define CKCTL_6345_UART_EN (1 << 3) -#define CKCTL_6345_ADSLPHY_EN (1 << 4) -#define CKCTL_6345_ENET_EN (1 << 7) -#define CKCTL_6345_USBS_EN (1 << 8) - -#define CKCTL_6345_ALL_SAFE_EN (CKCTL_6345_ENET_EN | \ - CKCTL_6345_USBS_EN | \ - CKCTL_6345_ADSLPHY_EN) - -#define CKCTL_6348_ADSLPHY_EN (1 << 0) -#define CKCTL_6348_MPI_EN (1 << 1) -#define CKCTL_6348_SDRAM_EN (1 << 2) -#define CKCTL_6348_M2M_EN (1 << 3) -#define CKCTL_6348_ENET_EN (1 << 4) -#define CKCTL_6348_SAR_EN (1 << 5) -#define CKCTL_6348_USBS_EN (1 << 6) -#define CKCTL_6348_USBH_EN (1 << 8) -#define CKCTL_6348_SPI_EN (1 << 9) - -#define CKCTL_6348_ALL_SAFE_EN (CKCTL_6348_ADSLPHY_EN | \ - CKCTL_6348_M2M_EN | \ - CKCTL_6348_ENET_EN | \ - CKCTL_6348_SAR_EN | \ - CKCTL_6348_USBS_EN | \ - CKCTL_6348_USBH_EN | \ - CKCTL_6348_SPI_EN) - -#define CKCTL_6358_ENET_EN (1 << 4) -#define CKCTL_6358_ADSLPHY_EN (1 << 5) -#define CKCTL_6358_PCM_EN (1 << 8) -#define CKCTL_6358_SPI_EN (1 << 9) -#define CKCTL_6358_USBS_EN (1 << 10) -#define CKCTL_6358_SAR_EN (1 << 11) -#define CKCTL_6358_EMUSB_EN (1 << 17) -#define CKCTL_6358_ENET0_EN (1 << 18) -#define CKCTL_6358_ENET1_EN (1 << 19) -#define CKCTL_6358_USBSU_EN (1 << 20) -#define CKCTL_6358_EPHY_EN (1 << 21) - -#define CKCTL_6358_ALL_SAFE_EN (CKCTL_6358_ENET_EN | \ - CKCTL_6358_ADSLPHY_EN | \ - CKCTL_6358_PCM_EN | \ - CKCTL_6358_SPI_EN | \ - CKCTL_6358_USBS_EN | \ - CKCTL_6358_SAR_EN | \ - CKCTL_6358_EMUSB_EN | \ - CKCTL_6358_ENET0_EN | \ - CKCTL_6358_ENET1_EN | \ - CKCTL_6358_USBSU_EN | \ - CKCTL_6358_EPHY_EN) - -/* System PLL Control register */ -#define PERF_SYS_PLL_CTL_REG 0x8 -#define SYS_PLL_SOFT_RESET 0x1 - -/* Interrupt Mask register */ -#define PERF_IRQMASK_REG 0xc - -/* Interrupt Status register */ -#define PERF_IRQSTAT_REG 0x10 - -/* External Interrupt Configuration register */ -#define PERF_EXTIRQ_CFG_REG 0x14 -#define EXTIRQ_CFG_SENSE(x) (1 << (x)) -#define EXTIRQ_CFG_STAT(x) (1 << (x + 5)) -#define EXTIRQ_CFG_CLEAR(x) (1 << (x + 10)) -#define EXTIRQ_CFG_MASK(x) (1 << (x + 15)) -#define EXTIRQ_CFG_BOTHEDGE(x) (1 << (x + 20)) -#define EXTIRQ_CFG_LEVELSENSE(x) (1 << (x + 25)) - -#define EXTIRQ_CFG_CLEAR_ALL (0xf << 10) -#define EXTIRQ_CFG_MASK_ALL (0xf << 15) - -/* Soft Reset register */ -#define PERF_SOFTRESET_REG 0x28 - -#define SOFTRESET_6338_SPI_MASK (1 << 0) -#define SOFTRESET_6338_ENET_MASK (1 << 2) -#define SOFTRESET_6338_USBH_MASK (1 << 3) -#define SOFTRESET_6338_USBS_MASK (1 << 4) -#define SOFTRESET_6338_ADSL_MASK (1 << 5) -#define SOFTRESET_6338_DMAMEM_MASK (1 << 6) -#define SOFTRESET_6338_SAR_MASK (1 << 7) -#define SOFTRESET_6338_ACLC_MASK (1 << 8) -#define SOFTRESET_6338_ADSLMIPSPLL_MASK (1 << 10) -#define SOFTRESET_6338_ALL (SOFTRESET_6338_SPI_MASK | \ - SOFTRESET_6338_ENET_MASK | \ - SOFTRESET_6338_USBH_MASK | \ - SOFTRESET_6338_USBS_MASK | \ - SOFTRESET_6338_ADSL_MASK | \ - SOFTRESET_6338_DMAMEM_MASK | \ - SOFTRESET_6338_SAR_MASK | \ - SOFTRESET_6338_ACLC_MASK | \ - SOFTRESET_6338_ADSLMIPSPLL_MASK) - -#define SOFTRESET_6348_SPI_MASK (1 << 0) -#define SOFTRESET_6348_ENET_MASK (1 << 2) -#define SOFTRESET_6348_USBH_MASK (1 << 3) -#define SOFTRESET_6348_USBS_MASK (1 << 4) -#define SOFTRESET_6348_ADSL_MASK (1 << 5) -#define SOFTRESET_6348_DMAMEM_MASK (1 << 6) -#define SOFTRESET_6348_SAR_MASK (1 << 7) -#define SOFTRESET_6348_ACLC_MASK (1 << 8) -#define SOFTRESET_6348_ADSLMIPSPLL_MASK (1 << 10) - -#define SOFTRESET_6348_ALL (SOFTRESET_6348_SPI_MASK | \ - SOFTRESET_6348_ENET_MASK | \ - SOFTRESET_6348_USBH_MASK | \ - SOFTRESET_6348_USBS_MASK | \ - SOFTRESET_6348_ADSL_MASK | \ - SOFTRESET_6348_DMAMEM_MASK | \ - SOFTRESET_6348_SAR_MASK | \ - SOFTRESET_6348_ACLC_MASK | \ - SOFTRESET_6348_ADSLMIPSPLL_MASK) - -/* MIPS PLL control register */ -#define PERF_MIPSPLLCTL_REG 0x34 -#define MIPSPLLCTL_N1_SHIFT 20 -#define MIPSPLLCTL_N1_MASK (0x7 << MIPSPLLCTL_N1_SHIFT) -#define MIPSPLLCTL_N2_SHIFT 15 -#define MIPSPLLCTL_N2_MASK (0x1f << MIPSPLLCTL_N2_SHIFT) -#define MIPSPLLCTL_M1REF_SHIFT 12 -#define MIPSPLLCTL_M1REF_MASK (0x7 << MIPSPLLCTL_M1REF_SHIFT) -#define MIPSPLLCTL_M2REF_SHIFT 9 -#define MIPSPLLCTL_M2REF_MASK (0x7 << MIPSPLLCTL_M2REF_SHIFT) -#define MIPSPLLCTL_M1CPU_SHIFT 6 -#define MIPSPLLCTL_M1CPU_MASK (0x7 << MIPSPLLCTL_M1CPU_SHIFT) -#define MIPSPLLCTL_M1BUS_SHIFT 3 -#define MIPSPLLCTL_M1BUS_MASK (0x7 << MIPSPLLCTL_M1BUS_SHIFT) -#define MIPSPLLCTL_M2BUS_SHIFT 0 -#define MIPSPLLCTL_M2BUS_MASK (0x7 << MIPSPLLCTL_M2BUS_SHIFT) - -/* ADSL PHY PLL Control register */ -#define PERF_ADSLPLLCTL_REG 0x38 -#define ADSLPLLCTL_N1_SHIFT 20 -#define ADSLPLLCTL_N1_MASK (0x7 << ADSLPLLCTL_N1_SHIFT) -#define ADSLPLLCTL_N2_SHIFT 15 -#define ADSLPLLCTL_N2_MASK (0x1f << ADSLPLLCTL_N2_SHIFT) -#define ADSLPLLCTL_M1REF_SHIFT 12 -#define ADSLPLLCTL_M1REF_MASK (0x7 << ADSLPLLCTL_M1REF_SHIFT) -#define ADSLPLLCTL_M2REF_SHIFT 9 -#define ADSLPLLCTL_M2REF_MASK (0x7 << ADSLPLLCTL_M2REF_SHIFT) -#define ADSLPLLCTL_M1CPU_SHIFT 6 -#define ADSLPLLCTL_M1CPU_MASK (0x7 << ADSLPLLCTL_M1CPU_SHIFT) -#define ADSLPLLCTL_M1BUS_SHIFT 3 -#define ADSLPLLCTL_M1BUS_MASK (0x7 << ADSLPLLCTL_M1BUS_SHIFT) -#define ADSLPLLCTL_M2BUS_SHIFT 0 -#define ADSLPLLCTL_M2BUS_MASK (0x7 << ADSLPLLCTL_M2BUS_SHIFT) - -#define ADSLPLLCTL_VAL(n1,n2,m1ref,m2ref,m1cpu,m1bus,m2bus) \ - (((n1) << ADSLPLLCTL_N1_SHIFT) | \ - ((n2) << ADSLPLLCTL_N2_SHIFT) | \ - ((m1ref) << ADSLPLLCTL_M1REF_SHIFT) | \ - ((m2ref) << ADSLPLLCTL_M2REF_SHIFT) | \ - ((m1cpu) << ADSLPLLCTL_M1CPU_SHIFT) | \ - ((m1bus) << ADSLPLLCTL_M1BUS_SHIFT) | \ - ((m2bus) << ADSLPLLCTL_M2BUS_SHIFT)) - - -/************************************************************************* - * _REG relative to RSET_TIMER - *************************************************************************/ - -#define BCM63XX_TIMER_COUNT 4 -#define TIMER_T0_ID 0 -#define TIMER_T1_ID 1 -#define TIMER_T2_ID 2 -#define TIMER_WDT_ID 3 - -/* Timer irqstat register */ -#define TIMER_IRQSTAT_REG 0 -#define TIMER_IRQSTAT_TIMER_CAUSE(x) (1 << (x)) -#define TIMER_IRQSTAT_TIMER0_CAUSE (1 << 0) -#define TIMER_IRQSTAT_TIMER1_CAUSE (1 << 1) -#define TIMER_IRQSTAT_TIMER2_CAUSE (1 << 2) -#define TIMER_IRQSTAT_WDT_CAUSE (1 << 3) -#define TIMER_IRQSTAT_TIMER_IR_EN(x) (1 << ((x) + 8)) -#define TIMER_IRQSTAT_TIMER0_IR_EN (1 << 8) -#define TIMER_IRQSTAT_TIMER1_IR_EN (1 << 9) -#define TIMER_IRQSTAT_TIMER2_IR_EN (1 << 10) - -/* Timer control register */ -#define TIMER_CTLx_REG(x) (0x4 + (x * 4)) -#define TIMER_CTL0_REG 0x4 -#define TIMER_CTL1_REG 0x8 -#define TIMER_CTL2_REG 0xC -#define TIMER_CTL_COUNTDOWN_MASK (0x3fffffff) -#define TIMER_CTL_MONOTONIC_MASK (1 << 30) -#define TIMER_CTL_ENABLE_MASK (1 << 31) - - -/************************************************************************* - * _REG relative to RSET_WDT - *************************************************************************/ - -/* Watchdog default count register */ -#define WDT_DEFVAL_REG 0x0 - -/* Watchdog control register */ -#define WDT_CTL_REG 0x4 - -/* Watchdog control register constants */ -#define WDT_START_1 (0xff00) -#define WDT_START_2 (0x00ff) -#define WDT_STOP_1 (0xee00) -#define WDT_STOP_2 (0x00ee) - -/* Watchdog reset length register */ -#define WDT_RSTLEN_REG 0x8 - - -/************************************************************************* - * _REG relative to RSET_UARTx - *************************************************************************/ - -/* UART Control Register */ -#define UART_CTL_REG 0x0 -#define UART_CTL_RXTMOUTCNT_SHIFT 0 -#define UART_CTL_RXTMOUTCNT_MASK (0x1f << UART_CTL_RXTMOUTCNT_SHIFT) -#define UART_CTL_RSTTXDN_SHIFT 5 -#define UART_CTL_RSTTXDN_MASK (1 << UART_CTL_RSTTXDN_SHIFT) -#define UART_CTL_RSTRXFIFO_SHIFT 6 -#define UART_CTL_RSTRXFIFO_MASK (1 << UART_CTL_RSTRXFIFO_SHIFT) -#define UART_CTL_RSTTXFIFO_SHIFT 7 -#define UART_CTL_RSTTXFIFO_MASK (1 << UART_CTL_RSTTXFIFO_SHIFT) -#define UART_CTL_STOPBITS_SHIFT 8 -#define UART_CTL_STOPBITS_MASK (0xf << UART_CTL_STOPBITS_SHIFT) -#define UART_CTL_STOPBITS_1 (0x7 << UART_CTL_STOPBITS_SHIFT) -#define UART_CTL_STOPBITS_2 (0xf << UART_CTL_STOPBITS_SHIFT) -#define UART_CTL_BITSPERSYM_SHIFT 12 -#define UART_CTL_BITSPERSYM_MASK (0x3 << UART_CTL_BITSPERSYM_SHIFT) -#define UART_CTL_XMITBRK_SHIFT 14 -#define UART_CTL_XMITBRK_MASK (1 << UART_CTL_XMITBRK_SHIFT) -#define UART_CTL_RSVD_SHIFT 15 -#define UART_CTL_RSVD_MASK (1 << UART_CTL_RSVD_SHIFT) -#define UART_CTL_RXPAREVEN_SHIFT 16 -#define UART_CTL_RXPAREVEN_MASK (1 << UART_CTL_RXPAREVEN_SHIFT) -#define UART_CTL_RXPAREN_SHIFT 17 -#define UART_CTL_RXPAREN_MASK (1 << UART_CTL_RXPAREN_SHIFT) -#define UART_CTL_TXPAREVEN_SHIFT 18 -#define UART_CTL_TXPAREVEN_MASK (1 << UART_CTL_TXPAREVEN_SHIFT) -#define UART_CTL_TXPAREN_SHIFT 18 -#define UART_CTL_TXPAREN_MASK (1 << UART_CTL_TXPAREN_SHIFT) -#define UART_CTL_LOOPBACK_SHIFT 20 -#define UART_CTL_LOOPBACK_MASK (1 << UART_CTL_LOOPBACK_SHIFT) -#define UART_CTL_RXEN_SHIFT 21 -#define UART_CTL_RXEN_MASK (1 << UART_CTL_RXEN_SHIFT) -#define UART_CTL_TXEN_SHIFT 22 -#define UART_CTL_TXEN_MASK (1 << UART_CTL_TXEN_SHIFT) -#define UART_CTL_BRGEN_SHIFT 23 -#define UART_CTL_BRGEN_MASK (1 << UART_CTL_BRGEN_SHIFT) - -/* UART Baudword register */ -#define UART_BAUD_REG 0x4 - -/* UART Misc Control register */ -#define UART_MCTL_REG 0x8 -#define UART_MCTL_DTR_SHIFT 0 -#define UART_MCTL_DTR_MASK (1 << UART_MCTL_DTR_SHIFT) -#define UART_MCTL_RTS_SHIFT 1 -#define UART_MCTL_RTS_MASK (1 << UART_MCTL_RTS_SHIFT) -#define UART_MCTL_RXFIFOTHRESH_SHIFT 8 -#define UART_MCTL_RXFIFOTHRESH_MASK (0xf << UART_MCTL_RXFIFOTHRESH_SHIFT) -#define UART_MCTL_TXFIFOTHRESH_SHIFT 12 -#define UART_MCTL_TXFIFOTHRESH_MASK (0xf << UART_MCTL_TXFIFOTHRESH_SHIFT) -#define UART_MCTL_RXFIFOFILL_SHIFT 16 -#define UART_MCTL_RXFIFOFILL_MASK (0x1f << UART_MCTL_RXFIFOFILL_SHIFT) -#define UART_MCTL_TXFIFOFILL_SHIFT 24 -#define UART_MCTL_TXFIFOFILL_MASK (0x1f << UART_MCTL_TXFIFOFILL_SHIFT) - -/* UART External Input Configuration register */ -#define UART_EXTINP_REG 0xc -#define UART_EXTINP_RI_SHIFT 0 -#define UART_EXTINP_RI_MASK (1 << UART_EXTINP_RI_SHIFT) -#define UART_EXTINP_CTS_SHIFT 1 -#define UART_EXTINP_CTS_MASK (1 << UART_EXTINP_CTS_SHIFT) -#define UART_EXTINP_DCD_SHIFT 2 -#define UART_EXTINP_DCD_MASK (1 << UART_EXTINP_DCD_SHIFT) -#define UART_EXTINP_DSR_SHIFT 3 -#define UART_EXTINP_DSR_MASK (1 << UART_EXTINP_DSR_SHIFT) -#define UART_EXTINP_IRSTAT(x) (1 << (x + 4)) -#define UART_EXTINP_IRMASK(x) (1 << (x + 8)) -#define UART_EXTINP_IR_RI 0 -#define UART_EXTINP_IR_CTS 1 -#define UART_EXTINP_IR_DCD 2 -#define UART_EXTINP_IR_DSR 3 -#define UART_EXTINP_RI_NOSENSE_SHIFT 16 -#define UART_EXTINP_RI_NOSENSE_MASK (1 << UART_EXTINP_RI_NOSENSE_SHIFT) -#define UART_EXTINP_CTS_NOSENSE_SHIFT 17 -#define UART_EXTINP_CTS_NOSENSE_MASK (1 << UART_EXTINP_CTS_NOSENSE_SHIFT) -#define UART_EXTINP_DCD_NOSENSE_SHIFT 18 -#define UART_EXTINP_DCD_NOSENSE_MASK (1 << UART_EXTINP_DCD_NOSENSE_SHIFT) -#define UART_EXTINP_DSR_NOSENSE_SHIFT 19 -#define UART_EXTINP_DSR_NOSENSE_MASK (1 << UART_EXTINP_DSR_NOSENSE_SHIFT) - -/* UART Interrupt register */ -#define UART_IR_REG 0x10 -#define UART_IR_MASK(x) (1 << (x + 16)) -#define UART_IR_STAT(x) (1 << (x)) -#define UART_IR_EXTIP 0 -#define UART_IR_TXUNDER 1 -#define UART_IR_TXOVER 2 -#define UART_IR_TXTRESH 3 -#define UART_IR_TXRDLATCH 4 -#define UART_IR_TXEMPTY 5 -#define UART_IR_RXUNDER 6 -#define UART_IR_RXOVER 7 -#define UART_IR_RXTIMEOUT 8 -#define UART_IR_RXFULL 9 -#define UART_IR_RXTHRESH 10 -#define UART_IR_RXNOTEMPTY 11 -#define UART_IR_RXFRAMEERR 12 -#define UART_IR_RXPARERR 13 -#define UART_IR_RXBRK 14 -#define UART_IR_TXDONE 15 - -/* UART Fifo register */ -#define UART_FIFO_REG 0x14 -#define UART_FIFO_VALID_SHIFT 0 -#define UART_FIFO_VALID_MASK 0xff -#define UART_FIFO_FRAMEERR_SHIFT 8 -#define UART_FIFO_FRAMEERR_MASK (1 << UART_FIFO_FRAMEERR_SHIFT) -#define UART_FIFO_PARERR_SHIFT 9 -#define UART_FIFO_PARERR_MASK (1 << UART_FIFO_PARERR_SHIFT) -#define UART_FIFO_BRKDET_SHIFT 10 -#define UART_FIFO_BRKDET_MASK (1 << UART_FIFO_BRKDET_SHIFT) -#define UART_FIFO_ANYERR_MASK (UART_FIFO_FRAMEERR_MASK | \ - UART_FIFO_PARERR_MASK | \ - UART_FIFO_BRKDET_MASK) - - -/************************************************************************* - * _REG relative to RSET_GPIO - *************************************************************************/ - -/* GPIO registers */ -#define GPIO_CTL_HI_REG 0x0 -#define GPIO_CTL_LO_REG 0x4 -#define GPIO_DATA_HI_REG 0x8 -#define GPIO_DATA_LO_REG 0xC - -/* GPIO mux registers and constants */ -#define GPIO_MODE_REG 0x18 - -#define GPIO_MODE_6348_G4_DIAG 0x00090000 -#define GPIO_MODE_6348_G4_UTOPIA 0x00080000 -#define GPIO_MODE_6348_G4_LEGACY_LED 0x00030000 -#define GPIO_MODE_6348_G4_MII_SNOOP 0x00020000 -#define GPIO_MODE_6348_G4_EXT_EPHY 0x00010000 -#define GPIO_MODE_6348_G3_DIAG 0x00009000 -#define GPIO_MODE_6348_G3_UTOPIA 0x00008000 -#define GPIO_MODE_6348_G3_EXT_MII 0x00007000 -#define GPIO_MODE_6348_G2_DIAG 0x00000900 -#define GPIO_MODE_6348_G2_PCI 0x00000500 -#define GPIO_MODE_6348_G1_DIAG 0x00000090 -#define GPIO_MODE_6348_G1_UTOPIA 0x00000080 -#define GPIO_MODE_6348_G1_SPI_UART 0x00000060 -#define GPIO_MODE_6348_G1_SPI_MASTER 0x00000060 -#define GPIO_MODE_6348_G1_MII_PCCARD 0x00000040 -#define GPIO_MODE_6348_G1_MII_SNOOP 0x00000020 -#define GPIO_MODE_6348_G1_EXT_EPHY 0x00000010 -#define GPIO_MODE_6348_G0_DIAG 0x00000009 -#define GPIO_MODE_6348_G0_EXT_MII 0x00000007 - -#define GPIO_MODE_6358_EXTRACS (1 << 5) -#define GPIO_MODE_6358_UART1 (1 << 6) -#define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7) -#define GPIO_MODE_6358_SERIAL_LED (1 << 10) -#define GPIO_MODE_6358_UTOPIA (1 << 12) - - -/************************************************************************* - * _REG relative to RSET_ENET - *************************************************************************/ - -/* Receiver Configuration register */ -#define ENET_RXCFG_REG 0x0 -#define ENET_RXCFG_ALLMCAST_SHIFT 1 -#define ENET_RXCFG_ALLMCAST_MASK (1 << ENET_RXCFG_ALLMCAST_SHIFT) -#define ENET_RXCFG_PROMISC_SHIFT 3 -#define ENET_RXCFG_PROMISC_MASK (1 << ENET_RXCFG_PROMISC_SHIFT) -#define ENET_RXCFG_LOOPBACK_SHIFT 4 -#define ENET_RXCFG_LOOPBACK_MASK (1 << ENET_RXCFG_LOOPBACK_SHIFT) -#define ENET_RXCFG_ENFLOW_SHIFT 5 -#define ENET_RXCFG_ENFLOW_MASK (1 << ENET_RXCFG_ENFLOW_SHIFT) - -/* Receive Maximum Length register */ -#define ENET_RXMAXLEN_REG 0x4 -#define ENET_RXMAXLEN_SHIFT 0 -#define ENET_RXMAXLEN_MASK (0x7ff << ENET_RXMAXLEN_SHIFT) - -/* Transmit Maximum Length register */ -#define ENET_TXMAXLEN_REG 0x8 -#define ENET_TXMAXLEN_SHIFT 0 -#define ENET_TXMAXLEN_MASK (0x7ff << ENET_TXMAXLEN_SHIFT) - -/* MII Status/Control register */ -#define ENET_MIISC_REG 0x10 -#define ENET_MIISC_MDCFREQDIV_SHIFT 0 -#define ENET_MIISC_MDCFREQDIV_MASK (0x7f << ENET_MIISC_MDCFREQDIV_SHIFT) -#define ENET_MIISC_PREAMBLEEN_SHIFT 7 -#define ENET_MIISC_PREAMBLEEN_MASK (1 << ENET_MIISC_PREAMBLEEN_SHIFT) - -/* MII Data register */ -#define ENET_MIIDATA_REG 0x14 -#define ENET_MIIDATA_DATA_SHIFT 0 -#define ENET_MIIDATA_DATA_MASK (0xffff << ENET_MIIDATA_DATA_SHIFT) -#define ENET_MIIDATA_TA_SHIFT 16 -#define ENET_MIIDATA_TA_MASK (0x3 << ENET_MIIDATA_TA_SHIFT) -#define ENET_MIIDATA_REG_SHIFT 18 -#define ENET_MIIDATA_REG_MASK (0x1f << ENET_MIIDATA_REG_SHIFT) -#define ENET_MIIDATA_PHYID_SHIFT 23 -#define ENET_MIIDATA_PHYID_MASK (0x1f << ENET_MIIDATA_PHYID_SHIFT) -#define ENET_MIIDATA_OP_READ_MASK (0x6 << 28) -#define ENET_MIIDATA_OP_WRITE_MASK (0x5 << 28) - -/* Ethernet Interrupt Mask register */ -#define ENET_IRMASK_REG 0x18 - -/* Ethernet Interrupt register */ -#define ENET_IR_REG 0x1c -#define ENET_IR_MII (1 << 0) -#define ENET_IR_MIB (1 << 1) -#define ENET_IR_FLOWC (1 << 2) - -/* Ethernet Control register */ -#define ENET_CTL_REG 0x2c -#define ENET_CTL_ENABLE_SHIFT 0 -#define ENET_CTL_ENABLE_MASK (1 << ENET_CTL_ENABLE_SHIFT) -#define ENET_CTL_DISABLE_SHIFT 1 -#define ENET_CTL_DISABLE_MASK (1 << ENET_CTL_DISABLE_SHIFT) -#define ENET_CTL_SRESET_SHIFT 2 -#define ENET_CTL_SRESET_MASK (1 << ENET_CTL_SRESET_SHIFT) -#define ENET_CTL_EPHYSEL_SHIFT 3 -#define ENET_CTL_EPHYSEL_MASK (1 << ENET_CTL_EPHYSEL_SHIFT) - -/* Transmit Control register */ -#define ENET_TXCTL_REG 0x30 -#define ENET_TXCTL_FD_SHIFT 0 -#define ENET_TXCTL_FD_MASK (1 << ENET_TXCTL_FD_SHIFT) - -/* Transmit Watermask register */ -#define ENET_TXWMARK_REG 0x34 -#define ENET_TXWMARK_WM_SHIFT 0 -#define ENET_TXWMARK_WM_MASK (0x3f << ENET_TXWMARK_WM_SHIFT) - -/* MIB Control register */ -#define ENET_MIBCTL_REG 0x38 -#define ENET_MIBCTL_RDCLEAR_SHIFT 0 -#define ENET_MIBCTL_RDCLEAR_MASK (1 << ENET_MIBCTL_RDCLEAR_SHIFT) - -/* Perfect Match Data Low register */ -#define ENET_PML_REG(x) (0x58 + (x) * 8) -#define ENET_PMH_REG(x) (0x5c + (x) * 8) -#define ENET_PMH_DATAVALID_SHIFT 16 -#define ENET_PMH_DATAVALID_MASK (1 << ENET_PMH_DATAVALID_SHIFT) - -/* MIB register */ -#define ENET_MIB_REG(x) (0x200 + (x) * 4) -#define ENET_MIB_REG_COUNT 55 - - -/************************************************************************* - * _REG relative to RSET_ENETDMA - *************************************************************************/ - -/* Controller Configuration Register */ -#define ENETDMA_CFG_REG (0x0) -#define ENETDMA_CFG_EN_SHIFT 0 -#define ENETDMA_CFG_EN_MASK (1 << ENETDMA_CFG_EN_SHIFT) -#define ENETDMA_CFG_FLOWCH_MASK(x) (1 << ((x >> 1) + 1)) - -/* Flow Control Descriptor Low Threshold register */ -#define ENETDMA_FLOWCL_REG(x) (0x4 + (x) * 6) - -/* Flow Control Descriptor High Threshold register */ -#define ENETDMA_FLOWCH_REG(x) (0x8 + (x) * 6) - -/* Flow Control Descriptor Buffer Alloca Threshold register */ -#define ENETDMA_BUFALLOC_REG(x) (0xc + (x) * 6) -#define ENETDMA_BUFALLOC_FORCE_SHIFT 31 -#define ENETDMA_BUFALLOC_FORCE_MASK (1 << ENETDMA_BUFALLOC_FORCE_SHIFT) - -/* Channel Configuration register */ -#define ENETDMA_CHANCFG_REG(x) (0x100 + (x) * 0x10) -#define ENETDMA_CHANCFG_EN_SHIFT 0 -#define ENETDMA_CHANCFG_EN_MASK (1 << ENETDMA_CHANCFG_EN_SHIFT) -#define ENETDMA_CHANCFG_PKTHALT_SHIFT 1 -#define ENETDMA_CHANCFG_PKTHALT_MASK (1 << ENETDMA_CHANCFG_PKTHALT_SHIFT) - -/* Interrupt Control/Status register */ -#define ENETDMA_IR_REG(x) (0x104 + (x) * 0x10) -#define ENETDMA_IR_BUFDONE_MASK (1 << 0) -#define ENETDMA_IR_PKTDONE_MASK (1 << 1) -#define ENETDMA_IR_NOTOWNER_MASK (1 << 2) - -/* Interrupt Mask register */ -#define ENETDMA_IRMASK_REG(x) (0x108 + (x) * 0x10) - -/* Maximum Burst Length */ -#define ENETDMA_MAXBURST_REG(x) (0x10C + (x) * 0x10) - -/* Ring Start Address register */ -#define ENETDMA_RSTART_REG(x) (0x200 + (x) * 0x10) - -/* State Ram Word 2 */ -#define ENETDMA_SRAM2_REG(x) (0x204 + (x) * 0x10) - -/* State Ram Word 3 */ -#define ENETDMA_SRAM3_REG(x) (0x208 + (x) * 0x10) - -/* State Ram Word 4 */ -#define ENETDMA_SRAM4_REG(x) (0x20c + (x) * 0x10) - - -/************************************************************************* - * _REG relative to RSET_OHCI_PRIV - *************************************************************************/ - -#define OHCI_PRIV_REG 0x0 -#define OHCI_PRIV_PORT1_HOST_SHIFT 0 -#define OHCI_PRIV_PORT1_HOST_MASK (1 << OHCI_PRIV_PORT1_HOST_SHIFT) -#define OHCI_PRIV_REG_SWAP_SHIFT 3 -#define OHCI_PRIV_REG_SWAP_MASK (1 << OHCI_PRIV_REG_SWAP_SHIFT) - - -/************************************************************************* - * _REG relative to RSET_USBH_PRIV - *************************************************************************/ - -#define USBH_PRIV_SWAP_REG 0x0 -#define USBH_PRIV_SWAP_EHCI_ENDN_SHIFT 4 -#define USBH_PRIV_SWAP_EHCI_ENDN_MASK (1 << USBH_PRIV_SWAP_EHCI_ENDN_SHIFT) -#define USBH_PRIV_SWAP_EHCI_DATA_SHIFT 3 -#define USBH_PRIV_SWAP_EHCI_DATA_MASK (1 << USBH_PRIV_SWAP_EHCI_DATA_SHIFT) -#define USBH_PRIV_SWAP_OHCI_ENDN_SHIFT 1 -#define USBH_PRIV_SWAP_OHCI_ENDN_MASK (1 << USBH_PRIV_SWAP_OHCI_ENDN_SHIFT) -#define USBH_PRIV_SWAP_OHCI_DATA_SHIFT 0 -#define USBH_PRIV_SWAP_OHCI_DATA_MASK (1 << USBH_PRIV_SWAP_OHCI_DATA_SHIFT) - -#define USBH_PRIV_TEST_REG 0x24 - - -/************************************************************************* - * _REG relative to RSET_MPI - *************************************************************************/ - -/* well known (hard wired) chip select */ -#define MPI_CS_PCMCIA_COMMON 4 -#define MPI_CS_PCMCIA_ATTR 5 -#define MPI_CS_PCMCIA_IO 6 - -/* Chip select base register */ -#define MPI_CSBASE_REG(x) (0x0 + (x) * 8) -#define MPI_CSBASE_BASE_SHIFT 13 -#define MPI_CSBASE_BASE_MASK (0x1ffff << MPI_CSBASE_BASE_SHIFT) -#define MPI_CSBASE_SIZE_SHIFT 0 -#define MPI_CSBASE_SIZE_MASK (0xf << MPI_CSBASE_SIZE_SHIFT) - -#define MPI_CSBASE_SIZE_8K 0 -#define MPI_CSBASE_SIZE_16K 1 -#define MPI_CSBASE_SIZE_32K 2 -#define MPI_CSBASE_SIZE_64K 3 -#define MPI_CSBASE_SIZE_128K 4 -#define MPI_CSBASE_SIZE_256K 5 -#define MPI_CSBASE_SIZE_512K 6 -#define MPI_CSBASE_SIZE_1M 7 -#define MPI_CSBASE_SIZE_2M 8 -#define MPI_CSBASE_SIZE_4M 9 -#define MPI_CSBASE_SIZE_8M 10 -#define MPI_CSBASE_SIZE_16M 11 -#define MPI_CSBASE_SIZE_32M 12 -#define MPI_CSBASE_SIZE_64M 13 -#define MPI_CSBASE_SIZE_128M 14 -#define MPI_CSBASE_SIZE_256M 15 - -/* Chip select control register */ -#define MPI_CSCTL_REG(x) (0x4 + (x) * 8) -#define MPI_CSCTL_ENABLE_MASK (1 << 0) -#define MPI_CSCTL_WAIT_SHIFT 1 -#define MPI_CSCTL_WAIT_MASK (0x7 << MPI_CSCTL_WAIT_SHIFT) -#define MPI_CSCTL_DATA16_MASK (1 << 4) -#define MPI_CSCTL_SYNCMODE_MASK (1 << 7) -#define MPI_CSCTL_TSIZE_MASK (1 << 8) -#define MPI_CSCTL_ENDIANSWAP_MASK (1 << 10) -#define MPI_CSCTL_SETUP_SHIFT 16 -#define MPI_CSCTL_SETUP_MASK (0xf << MPI_CSCTL_SETUP_SHIFT) -#define MPI_CSCTL_HOLD_SHIFT 20 -#define MPI_CSCTL_HOLD_MASK (0xf << MPI_CSCTL_HOLD_SHIFT) - -/* PCI registers */ -#define MPI_SP0_RANGE_REG 0x100 -#define MPI_SP0_REMAP_REG 0x104 -#define MPI_SP0_REMAP_ENABLE_MASK (1 << 0) -#define MPI_SP1_RANGE_REG 0x10C -#define MPI_SP1_REMAP_REG 0x110 -#define MPI_SP1_REMAP_ENABLE_MASK (1 << 0) - -#define MPI_L2PCFG_REG 0x11C -#define MPI_L2PCFG_CFG_TYPE_SHIFT 0 -#define MPI_L2PCFG_CFG_TYPE_MASK (0x3 << MPI_L2PCFG_CFG_TYPE_SHIFT) -#define MPI_L2PCFG_REG_SHIFT 2 -#define MPI_L2PCFG_REG_MASK (0x3f << MPI_L2PCFG_REG_SHIFT) -#define MPI_L2PCFG_FUNC_SHIFT 8 -#define MPI_L2PCFG_FUNC_MASK (0x7 << MPI_L2PCFG_FUNC_SHIFT) -#define MPI_L2PCFG_DEVNUM_SHIFT 11 -#define MPI_L2PCFG_DEVNUM_MASK (0x1f << MPI_L2PCFG_DEVNUM_SHIFT) -#define MPI_L2PCFG_CFG_USEREG_MASK (1 << 30) -#define MPI_L2PCFG_CFG_SEL_MASK (1 << 31) - -#define MPI_L2PMEMRANGE1_REG 0x120 -#define MPI_L2PMEMBASE1_REG 0x124 -#define MPI_L2PMEMREMAP1_REG 0x128 -#define MPI_L2PMEMRANGE2_REG 0x12C -#define MPI_L2PMEMBASE2_REG 0x130 -#define MPI_L2PMEMREMAP2_REG 0x134 -#define MPI_L2PIORANGE_REG 0x138 -#define MPI_L2PIOBASE_REG 0x13C -#define MPI_L2PIOREMAP_REG 0x140 -#define MPI_L2P_BASE_MASK (0xffff8000) -#define MPI_L2PREMAP_ENABLED_MASK (1 << 0) -#define MPI_L2PREMAP_IS_CARDBUS_MASK (1 << 2) - -#define MPI_PCIMODESEL_REG 0x144 -#define MPI_PCIMODESEL_BAR1_NOSWAP_MASK (1 << 0) -#define MPI_PCIMODESEL_BAR2_NOSWAP_MASK (1 << 1) -#define MPI_PCIMODESEL_EXT_ARB_MASK (1 << 2) -#define MPI_PCIMODESEL_PREFETCH_SHIFT 4 -#define MPI_PCIMODESEL_PREFETCH_MASK (0xf << MPI_PCIMODESEL_PREFETCH_SHIFT) - -#define MPI_LOCBUSCTL_REG 0x14C -#define MPI_LOCBUSCTL_EN_PCI_GPIO_MASK (1 << 0) -#define MPI_LOCBUSCTL_U2P_NOSWAP_MASK (1 << 1) - -#define MPI_LOCINT_REG 0x150 -#define MPI_LOCINT_MASK(x) (1 << (x + 16)) -#define MPI_LOCINT_STAT(x) (1 << (x)) -#define MPI_LOCINT_DIR_FAILED 6 -#define MPI_LOCINT_EXT_PCI_INT 7 -#define MPI_LOCINT_SERR 8 -#define MPI_LOCINT_CSERR 9 - -#define MPI_PCICFGCTL_REG 0x178 -#define MPI_PCICFGCTL_CFGADDR_SHIFT 2 -#define MPI_PCICFGCTL_CFGADDR_MASK (0x1f << MPI_PCICFGCTL_CFGADDR_SHIFT) -#define MPI_PCICFGCTL_WRITEEN_MASK (1 << 7) - -#define MPI_PCICFGDATA_REG 0x17C - -/* PCI host bridge custom register */ -#define BCMPCI_REG_TIMERS 0x40 -#define REG_TIMER_TRDY_SHIFT 0 -#define REG_TIMER_TRDY_MASK (0xff << REG_TIMER_TRDY_SHIFT) -#define REG_TIMER_RETRY_SHIFT 8 -#define REG_TIMER_RETRY_MASK (0xff << REG_TIMER_RETRY_SHIFT) - - -/************************************************************************* - * _REG relative to RSET_PCMCIA - *************************************************************************/ - -#define PCMCIA_C1_REG 0x0 -#define PCMCIA_C1_CD1_MASK (1 << 0) -#define PCMCIA_C1_CD2_MASK (1 << 1) -#define PCMCIA_C1_VS1_MASK (1 << 2) -#define PCMCIA_C1_VS2_MASK (1 << 3) -#define PCMCIA_C1_VS1OE_MASK (1 << 6) -#define PCMCIA_C1_VS2OE_MASK (1 << 7) -#define PCMCIA_C1_CBIDSEL_SHIFT (8) -#define PCMCIA_C1_CBIDSEL_MASK (0x1f << PCMCIA_C1_CBIDSEL_SHIFT) -#define PCMCIA_C1_EN_PCMCIA_GPIO_MASK (1 << 13) -#define PCMCIA_C1_EN_PCMCIA_MASK (1 << 14) -#define PCMCIA_C1_EN_CARDBUS_MASK (1 << 15) -#define PCMCIA_C1_RESET_MASK (1 << 18) - -#define PCMCIA_C2_REG 0x8 -#define PCMCIA_C2_DATA16_MASK (1 << 0) -#define PCMCIA_C2_BYTESWAP_MASK (1 << 1) -#define PCMCIA_C2_RWCOUNT_SHIFT 2 -#define PCMCIA_C2_RWCOUNT_MASK (0x3f << PCMCIA_C2_RWCOUNT_SHIFT) -#define PCMCIA_C2_INACTIVE_SHIFT 8 -#define PCMCIA_C2_INACTIVE_MASK (0x3f << PCMCIA_C2_INACTIVE_SHIFT) -#define PCMCIA_C2_SETUP_SHIFT 16 -#define PCMCIA_C2_SETUP_MASK (0x3f << PCMCIA_C2_SETUP_SHIFT) -#define PCMCIA_C2_HOLD_SHIFT 24 -#define PCMCIA_C2_HOLD_MASK (0x3f << PCMCIA_C2_HOLD_SHIFT) - - -/************************************************************************* - * _REG relative to RSET_SDRAM - *************************************************************************/ - -#define SDRAM_CFG_REG 0x0 -#define SDRAM_CFG_ROW_SHIFT 4 -#define SDRAM_CFG_ROW_MASK (0x3 << SDRAM_CFG_ROW_SHIFT) -#define SDRAM_CFG_COL_SHIFT 6 -#define SDRAM_CFG_COL_MASK (0x3 << SDRAM_CFG_COL_SHIFT) -#define SDRAM_CFG_32B_SHIFT 10 -#define SDRAM_CFG_32B_MASK (1 << SDRAM_CFG_32B_SHIFT) -#define SDRAM_CFG_BANK_SHIFT 13 -#define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT) - -#define SDRAM_MEM_REG 0xc - -#define SDRAM_PRIO_REG 0x2C -#define SDRAM_PRIO_MIPS_SHIFT 29 -#define SDRAM_PRIO_MIPS_MASK (1 << SDRAM_PRIO_MIPS_SHIFT) -#define SDRAM_PRIO_ADSL_SHIFT 30 -#define SDRAM_PRIO_ADSL_MASK (1 << SDRAM_PRIO_ADSL_SHIFT) -#define SDRAM_PRIO_EN_SHIFT 31 -#define SDRAM_PRIO_EN_MASK (1 << SDRAM_PRIO_EN_SHIFT) - - -/************************************************************************* - * _REG relative to RSET_MEMC - *************************************************************************/ - -#define MEMC_CFG_REG 0x4 -#define MEMC_CFG_32B_SHIFT 1 -#define MEMC_CFG_32B_MASK (1 << MEMC_CFG_32B_SHIFT) -#define MEMC_CFG_COL_SHIFT 3 -#define MEMC_CFG_COL_MASK (0x3 << MEMC_CFG_COL_SHIFT) -#define MEMC_CFG_ROW_SHIFT 6 -#define MEMC_CFG_ROW_MASK (0x3 << MEMC_CFG_ROW_SHIFT) - - -/************************************************************************* - * _REG relative to RSET_DDR - *************************************************************************/ - -#define DDR_DMIPSPLLCFG_REG 0x18 -#define DMIPSPLLCFG_M1_SHIFT 0 -#define DMIPSPLLCFG_M1_MASK (0xff << DMIPSPLLCFG_M1_SHIFT) -#define DMIPSPLLCFG_N1_SHIFT 23 -#define DMIPSPLLCFG_N1_MASK (0x3f << DMIPSPLLCFG_N1_SHIFT) -#define DMIPSPLLCFG_N2_SHIFT 29 -#define DMIPSPLLCFG_N2_MASK (0x7 << DMIPSPLLCFG_N2_SHIFT) - -/************************************************************************* - * _REG relative to RSET_SPI - *************************************************************************/ - -/* BCM 6338 SPI core */ -#define SPI_BCM_6338_SPI_CMD 0x00 /* 16-bits register */ -#define SPI_BCM_6338_SPI_INT_STATUS 0x02 -#define SPI_BCM_6338_SPI_MASK_INT_ST 0x03 -#define SPI_BCM_6338_SPI_INT_MASK 0x04 -#define SPI_BCM_6338_SPI_ST 0x05 -#define SPI_BCM_6338_SPI_CLK_CFG 0x06 -#define SPI_BCM_6338_SPI_FILL_BYTE 0x07 -#define SPI_BCM_6338_SPI_MSG_TAIL 0x09 -#define SPI_BCM_6338_SPI_RX_TAIL 0x0b -#define SPI_BCM_6338_SPI_MSG_CTL 0x40 -#define SPI_BCM_6338_SPI_MSG_DATA 0x41 -#define SPI_BCM_6338_SPI_MSG_DATA_SIZE 0x3f -#define SPI_BCM_6338_SPI_RX_DATA 0x80 -#define SPI_BCM_6338_SPI_RX_DATA_SIZE 0x3f - -/* BCM 6348 SPI core */ -#define SPI_BCM_6348_SPI_MASK_INT_ST 0x00 -#define SPI_BCM_6348_SPI_INT_STATUS 0x01 -#define SPI_BCM_6348_SPI_CMD 0x02 /* 16-bits register */ -#define SPI_BCM_6348_SPI_FILL_BYTE 0x04 -#define SPI_BCM_6348_SPI_CLK_CFG 0x05 -#define SPI_BCM_6348_SPI_ST 0x06 -#define SPI_BCM_6348_SPI_INT_MASK 0x07 -#define SPI_BCM_6348_SPI_RX_TAIL 0x08 -#define SPI_BCM_6348_SPI_MSG_TAIL 0x10 -#define SPI_BCM_6348_SPI_MSG_DATA 0x40 -#define SPI_BCM_6348_SPI_MSG_CTL 0x42 -#define SPI_BCM_6348_SPI_MSG_DATA_SIZE 0x3f -#define SPI_BCM_6348_SPI_RX_DATA 0x80 -#define SPI_BCM_6348_SPI_RX_DATA_SIZE 0x3f - -/* BCM 6358 SPI core */ -#define SPI_BCM_6358_MSG_CTL 0x00 /* 16-bits register */ - -#define SPI_BCM_6358_SPI_MSG_DATA 0x02 -#define SPI_BCM_6358_SPI_MSG_DATA_SIZE 0x21e - -#define SPI_BCM_6358_SPI_RX_DATA 0x400 -#define SPI_BCM_6358_SPI_RX_DATA_SIZE 0x220 - -#define SPI_BCM_6358_SPI_CMD 0x700 /* 16-bits register */ - -#define SPI_BCM_6358_SPI_INT_STATUS 0x702 -#define SPI_BCM_6358_SPI_MASK_INT_ST 0x703 - -#define SPI_BCM_6358_SPI_INT_MASK 0x704 - -#define SPI_BCM_6358_SPI_STATUS 0x705 - -#define SPI_BCM_6358_SPI_CLK_CFG 0x706 - -#define SPI_BCM_6358_SPI_FILL_BYTE 0x707 -#define SPI_BCM_6358_SPI_MSG_TAIL 0x709 -#define SPI_BCM_6358_SPI_RX_TAIL 0x70B - -/* Shared SPI definitions */ - -/* Message configuration */ -#define SPI_FD_RW 0x00 -#define SPI_HD_W 0x01 -#define SPI_HD_R 0x02 -#define SPI_BYTE_CNT_SHIFT 0 -#define SPI_MSG_TYPE_SHIFT 14 - -/* Command */ -#define SPI_CMD_NOOP 0x01 -#define SPI_CMD_SOFT_RESET 0x02 -#define SPI_CMD_HARD_RESET 0x04 -#define SPI_CMD_START_IMMEDIATE 0x08 -#define SPI_CMD_COMMAND_SHIFT 0 -#define SPI_CMD_COMMAND_MASK 0x000f -#define SPI_CMD_DEVICE_ID_SHIFT 4 -#define SPI_CMD_PREPEND_BYTE_CNT_SHIFT 8 -#define SPI_CMD_ONE_BYTE_SHIFT 11 -#define SPI_CMD_ONE_WIRE_SHIFT 12 -#define SPI_DEV_ID_0 0 -#define SPI_DEV_ID_1 1 -#define SPI_DEV_ID_2 2 -#define SPI_DEV_ID_3 3 - -/* Interrupt mask */ -#define SPI_INTR_CMD_DONE 0x01 -#define SPI_INTR_RX_OVERFLOW 0x02 -#define SPI_INTR_TX_UNDERFLOW 0x04 -#define SPI_INTR_TX_OVERFLOW 0x08 -#define SPI_INTR_RX_UNDERFLOW 0x10 -#define SPI_INTR_CLEAR_ALL 0x1f - -/* Status */ -#define SPI_RX_EMPTY 0x02 -#define SPI_CMD_BUSY 0x04 -#define SPI_SERIAL_BUSY 0x08 - -/* Clock configuration */ -#define SPI_CLK_20MHZ 0x00 -#define SPI_CLK_0_391MHZ 0x01 -#define SPI_CLK_0_781MHZ 0x02 /* default */ -#define SPI_CLK_1_563MHZ 0x03 -#define SPI_CLK_3_125MHZ 0x04 -#define SPI_CLK_6_250MHZ 0x05 -#define SPI_CLK_12_50MHZ 0x06 -#define SPI_CLK_25MHZ 0x07 -#define SPI_CLK_MASK 0x07 -#define SPI_SSOFFTIME_MASK 0x38 -#define SPI_SSOFFTIME_SHIFT 3 -#define SPI_BYTE_SWAP 0x80 - - -#endif /* BCM63XX_REGS_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_timer.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_timer.h deleted file mode 100644 index c0fce833c..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm63xx_timer.h +++ /dev/null @@ -1,11 +0,0 @@ -#ifndef BCM63XX_TIMER_H_ -#define BCM63XX_TIMER_H_ - -int bcm63xx_timer_register(int id, void (*callback)(void *data), void *data); -void bcm63xx_timer_unregister(int id); -int bcm63xx_timer_set(int id, int monotonic, unsigned int countdown_us); -int bcm63xx_timer_enable(int id); -int bcm63xx_timer_disable(int id); -unsigned int bcm63xx_timer_countdown(unsigned int countdown_us); - -#endif /* !BCM63XX_TIMER_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/board_bcm963xx.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/board_bcm963xx.h deleted file mode 100644 index e5b916036..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/board_bcm963xx.h +++ /dev/null @@ -1,64 +0,0 @@ -#ifndef BOARD_BCM963XX_H_ -#define BOARD_BCM963XX_H_ - -#include -#include -#include -#include -#include - -/* - * flash mapping - */ -#define BCM963XX_CFE_VERSION_OFFSET 0x570 -#define BCM963XX_NVRAM_OFFSET 0x580 - -/* - * nvram structure - */ -struct bcm963xx_nvram { - u32 version; - u8 reserved1[256]; - u8 name[16]; - u32 main_tp_number; - u32 psi_size; - u32 mac_addr_count; - u8 mac_addr_base[6]; - u8 reserved2[2]; - u32 checksum_old; - u8 reserved3[720]; - u32 checksum_high; -}; - -/* - * board definition - */ -struct board_info { - u8 name[16]; - unsigned int expected_cpu_id; - - /* enabled feature/device */ - unsigned int has_enet0:1; - unsigned int has_enet1:1; - unsigned int has_pci:1; - unsigned int has_pccard:1; - unsigned int has_ohci0:1; - unsigned int has_ehci0:1; - unsigned int has_udc0:1; - unsigned int has_dsp:1; - - /* ethernet config */ - struct bcm63xx_enet_platform_data enet0; - struct bcm63xx_enet_platform_data enet1; - - /* DSP config */ - struct bcm63xx_dsp_platform_data dsp; - - /* GPIO LEDs */ - struct gpio_led leds[8]; - - /* Reset button */ - struct gpio_button reset_buttons[1]; -}; - -#endif /* ! BOARD_BCM963XX_H_ */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/cpu-feature-overrides.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/cpu-feature-overrides.h deleted file mode 100644 index 71742bac9..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/cpu-feature-overrides.h +++ /dev/null @@ -1,51 +0,0 @@ -#ifndef __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H -#define __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H - -#include - -#define cpu_has_tlb 1 -#define cpu_has_4kex 1 -#define cpu_has_4k_cache 1 -#define cpu_has_fpu 0 -#define cpu_has_32fpr 0 -#define cpu_has_counter 1 -#define cpu_has_watch 0 -#define cpu_has_divec 1 -#define cpu_has_vce 0 -#define cpu_has_cache_cdex_p 0 -#define cpu_has_cache_cdex_s 0 -#define cpu_has_prefetch 1 -#define cpu_has_mcheck 1 -#define cpu_has_ejtag 1 -#define cpu_has_llsc 1 -#define cpu_has_mips16 0 -#define cpu_has_mdmx 0 -#define cpu_has_mips3d 0 -#define cpu_has_smartmips 0 -#define cpu_has_vtag_icache 0 - -#if !defined(BCMCPU_RUNTIME_DETECT) && (defined(CONFIG_BCMCPU_IS_6348) || defined(CONFIG_CPU_IS_6338) || defined(CONFIG_CPU_IS_BCM6345)) -#define cpu_has_dc_aliases 0 -#endif - -#define cpu_has_ic_fills_f_dc 0 -#define cpu_has_pindexed_dcache 0 - -#define cpu_has_mips32r1 1 -#define cpu_has_mips32r2 0 -#define cpu_has_mips64r1 0 -#define cpu_has_mips64r2 0 - -#define cpu_has_dsp 0 -#define cpu_has_mipsmt 0 -#define cpu_has_userlocal 0 - -#define cpu_has_nofpuex 0 -#define cpu_has_64bits 0 -#define cpu_has_64bit_zero_reg 0 - -#define cpu_dcache_line_size() 16 -#define cpu_icache_line_size() 16 -#define cpu_scache_line_size() 0 - -#endif /* __ASM_MACH_BCM963XX_CPU_FEATURE_OVERRIDES_H */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/gpio.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/gpio.h deleted file mode 100644 index 7cda8c0a3..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/gpio.h +++ /dev/null @@ -1,15 +0,0 @@ -#ifndef __ASM_MIPS_MACH_BCM63XX_GPIO_H -#define __ASM_MIPS_MACH_BCM63XX_GPIO_H - -#include - -#define gpio_to_irq(gpio) NULL - -#define gpio_get_value __gpio_get_value -#define gpio_set_value __gpio_set_value - -#define gpio_cansleep __gpio_cansleep - -#include - -#endif /* __ASM_MIPS_MACH_BCM63XX_GPIO_H */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/war.h b/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/war.h deleted file mode 100644 index 8e3f3fdf3..000000000 --- a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/war.h +++ /dev/null @@ -1,25 +0,0 @@ -/* - * This file is subject to the terms and conditions of the GNU General Public - * License. See the file "COPYING" in the main directory of this archive - * for more details. - * - * Copyright (C) 2002, 2004, 2007 by Ralf Baechle - */ -#ifndef __ASM_MIPS_MACH_BCM63XX_WAR_H -#define __ASM_MIPS_MACH_BCM63XX_WAR_H - -#define R4600_V1_INDEX_ICACHEOP_WAR 0 -#define R4600_V1_HIT_CACHEOP_WAR 0 -#define R4600_V2_HIT_CACHEOP_WAR 0 -#define R5432_CP0_INTERRUPT_WAR 0 -#define BCM1250_M3_WAR 0 -#define SIBYTE_1956_WAR 0 -#define MIPS4K_ICACHE_REFILL_WAR 0 -#define MIPS_CACHE_SYNC_WAR 0 -#define TX49XX_ICACHE_INDEX_INV_WAR 0 -#define RM9000_CDEX_SMP_WAR 0 -#define ICACHE_REFILLS_WORKAROUND_WAR 0 -#define R10000_LLSC_WAR 0 -#define MIPS34K_MISSED_ITLB_WAR 0 - -#endif /* __ASM_MIPS_MACH_BCM63XX_WAR_H */ diff --git a/target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm_tag.h b/target/linux/brcm63xx/files/arch/mips/include/asm/mach-bcm63xx/bcm_tag.h similarity index 100% rename from target/linux/brcm63xx/files-2.6.30/include/asm-mips/mach-bcm63xx/bcm_tag.h rename to target/linux/brcm63xx/files/arch/mips/include/asm/mach-bcm63xx/bcm_tag.h diff --git a/target/linux/brcm63xx/patches-2.6.30/001-add_broadcom_63xx_cpu_definitions.patch b/target/linux/brcm63xx/patches-2.6.30/001-add_broadcom_63xx_cpu_definitions.patch deleted file mode 100644 index 856413247..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/001-add_broadcom_63xx_cpu_definitions.patch +++ /dev/null @@ -1,95 +0,0 @@ -From a9f65413f9ea81ef2208da66a3db9cb8a9020eef Mon Sep 17 00:00:00 2001 -From: Maxime Bizon -Date: Fri, 18 Jul 2008 15:53:08 +0200 -Subject: [PATCH] [MIPS] BCM63XX: Add Broadcom 63xx CPU definitions. - -Signed-off-by: Maxime Bizon ---- - arch/mips/kernel/cpu-probe.c | 25 +++++++++++++++++++++++++ - arch/mips/mm/tlbex.c | 4 ++++ - arch/mips/include/asm/cpu.h | 7 +++++++ - 3 files changed, 36 insertions(+), 0 deletions(-) - ---- a/arch/mips/kernel/cpu-probe.c -+++ b/arch/mips/kernel/cpu-probe.c -@@ -158,6 +158,9 @@ void __init check_wait(void) - case CPU_25KF: - case CPU_PR4450: - case CPU_BCM3302: -+ case CPU_BCM6338: -+ case CPU_BCM6348: -+ case CPU_BCM6358: - case CPU_CAVIUM_OCTEON: - cpu_wait = r4k_wait; - break; -@@ -855,6 +858,7 @@ static inline void cpu_probe_broadcom(st - { - decode_configs(c); - switch (c->processor_id & 0xff00) { -+ /* same as PRID_IMP_BCM6338 */ - case PRID_IMP_BCM3302: - c->cputype = CPU_BCM3302; - __cpu_name[cpu] = "Broadcom BCM3302"; -@@ -863,6 +867,26 @@ static inline void cpu_probe_broadcom(st - c->cputype = CPU_BCM4710; - __cpu_name[cpu] = "Broadcom BCM4710"; - break; -+ case PRID_IMP_BCM6345: -+ c->cputype = CPU_BCM6345; -+ __cpu_name[cpu] = "Broadcom BCM6345"; -+ break; -+ case PRID_IMP_BCM6348: -+ c->cputype = CPU_BCM6348; -+ __cpu_name[cpu] = "Broadcom BCM6348"; -+ break; -+ case PRID_IMP_BCM4350: -+ switch (c->processor_id & 0xf0) { -+ case PRID_REV_BCM6358: -+ c->cputype = CPU_BCM6358; -+ __cpu_name[cpu] = "Broadcom BCM6358"; -+ break; -+ default: -+ c->cputype = CPU_UNKNOWN; -+ __cpu_name[cpu] = "Broadcom BCM63xx"; -+ break; -+ } -+ break; - } - } - ---- a/arch/mips/mm/tlbex.c -+++ b/arch/mips/mm/tlbex.c -@@ -310,6 +310,10 @@ static void __cpuinit build_tlb_write_en - case CPU_BCM3302: - case CPU_BCM4710: - case CPU_LOONGSON2: -+ case CPU_BCM6338: -+ case CPU_BCM6345: -+ case CPU_BCM6348: -+ case CPU_BCM6358: - case CPU_CAVIUM_OCTEON: - case CPU_R5500: - if (m4kc_tlbp_war()) ---- a/arch/mips/include/asm/cpu.h -+++ b/arch/mips/include/asm/cpu.h -@@ -113,6 +113,12 @@ - - #define PRID_IMP_BCM4710 0x4000 - #define PRID_IMP_BCM3302 0x9000 -+#define PRID_IMP_BCM6338 0x9000 -+#define PRID_IMP_BCM6345 0x8000 -+#define PRID_IMP_BCM6348 0x9100 -+#define PRID_IMP_BCM4350 0xA000 -+#define PRID_REV_BCM6358 0x0010 -+#define PRID_REV_BCM6368 0x0030 - - /* - * These are the PRID's for when 23:16 == PRID_COMP_CAVIUM -@@ -210,6 +216,7 @@ enum cpu_type_enum { - */ - CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K, - CPU_ALCHEMY, CPU_PR4450, CPU_BCM3302, CPU_BCM4710, -+ CPU_BCM6338, CPU_BCM6345, CPU_BCM6348, CPU_BCM6358, - - /* - * MIPS64 class processors diff --git a/target/linux/brcm63xx/patches-2.6.30/002-add_support_for_broadcom_63xx_cpus.patch b/target/linux/brcm63xx/patches-2.6.30/002-add_support_for_broadcom_63xx_cpus.patch deleted file mode 100644 index 9137889cf..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/002-add_support_for_broadcom_63xx_cpus.patch +++ /dev/null @@ -1,122 +0,0 @@ -From 0713aadd2a4e543b69022aa40bdec3e1dc5bc1e5 Mon Sep 17 00:00:00 2001 -From: Maxime Bizon -Date: Mon, 18 Aug 2008 13:56:57 +0200 -Subject: [PATCH] [MIPS] BCM63XX: Add support for Broadcom 63xx CPUs. - -Signed-off-by: Maxime Bizon ---- - arch/mips/Kconfig | 16 + - arch/mips/Makefile | 7 + - arch/mips/bcm63xx/Kconfig | 9 + - arch/mips/bcm63xx/Makefile | 2 + - arch/mips/bcm63xx/clk.c | 220 ++++++ - arch/mips/bcm63xx/cpu.c | 245 +++++++ - arch/mips/bcm63xx/cs.c | 144 ++++ - arch/mips/bcm63xx/early_printk.c | 30 + - arch/mips/bcm63xx/gpio.c | 98 +++ - arch/mips/bcm63xx/irq.c | 253 +++++++ - arch/mips/bcm63xx/prom.c | 43 ++ - arch/mips/bcm63xx/setup.c | 108 +++ - arch/mips/bcm63xx/timer.c | 205 ++++++ - arch/mips/include/asm/fixmap.h | 4 + - arch/mips/include/asm/mach-bcm63xx/bcm63xx_clk.h | 11 + - arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 314 +++++++++ - arch/mips/include/asm/mach-bcm63xx/bcm63xx_cs.h | 10 + - arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 14 + - arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 93 +++ - arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 15 + - arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 728 ++++++++++++++++++++ - arch/mips/include/asm/mach-bcm63xx/bcm63xx_timer.h | 11 + - .../asm-mips/mach-bcm63xx/cpu-feature-overrides.h | 51 ++ - arch/mips/include/asm/mach-bcm63xx/gpio.h | 52 ++ - arch/mips/include/asm/mach-bcm63xx/war.h | 25 + - 25 files changed, 2708 insertions(+), 0 deletions(-) - create mode 100644 arch/mips/bcm63xx/Kconfig - create mode 100644 arch/mips/bcm63xx/Makefile - create mode 100644 arch/mips/bcm63xx/clk.c - create mode 100644 arch/mips/bcm63xx/cpu.c - create mode 100644 arch/mips/bcm63xx/cs.c - create mode 100644 arch/mips/bcm63xx/early_printk.c - create mode 100644 arch/mips/bcm63xx/gpio.c - create mode 100644 arch/mips/bcm63xx/irq.c - create mode 100644 arch/mips/bcm63xx/prom.c - create mode 100644 arch/mips/bcm63xx/setup.c - create mode 100644 arch/mips/bcm63xx/timer.c - create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_clk.h - create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h - create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_cs.h - create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h - create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h - create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h - create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h - create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_timer.h - create mode 100644 arch/mips/include/asm/mach-bcm63xx/cpu-feature-overrides.h - create mode 100644 arch/mips/include/asm/mach-bcm63xx/gpio.h - create mode 100644 arch/mips/include/asm/mach-bcm63xx/war.h - ---- a/arch/mips/Kconfig -+++ b/arch/mips/Kconfig -@@ -60,6 +60,21 @@ config BCM47XX - help - Support for BCM47XX based boards - -+config BCM63XX -+ bool "Broadcom 63xx based boards" -+ select CEVT_R4K -+ select CSRC_R4K -+ select DMA_NONCOHERENT -+ select IRQ_CPU -+ select SYS_HAS_CPU_MIPS32_R1 -+ select SYS_SUPPORTS_32BIT_KERNEL -+ select SYS_SUPPORTS_BIG_ENDIAN -+ select SYS_HAS_EARLY_PRINTK -+ select SWAP_IO_SPACE -+ select ARCH_REQUIRE_GPIOLIB -+ help -+ Support for BCM63XX based boards -+ - config MIPS_COBALT - bool "Cobalt Server" - select CEVT_R4K -@@ -635,6 +650,7 @@ endchoice - - source "arch/mips/alchemy/Kconfig" - source "arch/mips/basler/excite/Kconfig" -+source "arch/mips/bcm63xx/Kconfig" - source "arch/mips/jazz/Kconfig" - source "arch/mips/lasat/Kconfig" - source "arch/mips/pmc-sierra/Kconfig" ---- a/arch/mips/Makefile -+++ b/arch/mips/Makefile -@@ -551,6 +551,13 @@ cflags-$(CONFIG_BCM47XX) += -I$(srctree) - load-$(CONFIG_BCM47XX) := 0xffffffff80001000 - - # -+# Broadcom BCM63XX boards -+# -+core-$(CONFIG_BCM63XX) += arch/mips/bcm63xx/ -+cflags-$(CONFIG_BCM63XX) += -Iarch/mips/include/asm/mach-bcm63xx/ -+load-$(CONFIG_BCM63XX) := 0xffffffff80010000 -+ -+# - # SNI RM - # - core-$(CONFIG_SNI_RM) += arch/mips/sni/ ---- a/arch/mips/include/asm/fixmap.h -+++ b/arch/mips/include/asm/fixmap.h -@@ -67,11 +67,15 @@ enum fixed_addresses { - * the start of the fixmap, and leave one page empty - * at the top of mem.. - */ -+#ifdef CONFIG_BCM63XX -+#define FIXADDR_TOP ((unsigned long)(long)(int)0xff000000) -+#else - #if defined(CONFIG_CPU_TX39XX) || defined(CONFIG_CPU_TX49XX) - #define FIXADDR_TOP ((unsigned long)(long)(int)(0xff000000 - 0x20000)) - #else - #define FIXADDR_TOP ((unsigned long)(long)(int)0xfffe0000) - #endif -+#endif - #define FIXADDR_SIZE (__end_of_fixed_addresses << PAGE_SHIFT) - #define FIXADDR_START (FIXADDR_TOP - FIXADDR_SIZE) - diff --git a/target/linux/brcm63xx/patches-2.6.30/003-add_serial_driver_for_bcm63xx_integr.patch b/target/linux/brcm63xx/patches-2.6.30/003-add_serial_driver_for_bcm63xx_integr.patch deleted file mode 100644 index 478147d30..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/003-add_serial_driver_for_bcm63xx_integr.patch +++ /dev/null @@ -1,66 +0,0 @@ -From 6c489656b09998ed6a6f857e01ccf630e29358dd Mon Sep 17 00:00:00 2001 -From: Maxime Bizon -Date: Fri, 18 Jul 2008 19:35:55 +0200 -Subject: [PATCH] [MIPS] BCM63XX: Add serial driver for bcm63xx integrated UART. - -Signed-off-by: Maxime Bizon ---- - arch/mips/bcm63xx/Makefile | 1 + - arch/mips/bcm63xx/dev-uart.c | 41 + - drivers/serial/Kconfig | 19 + - drivers/serial/Makefile | 1 + - drivers/serial/bcm63xx_uart.c | 890 ++++++++++++++++++++++ - include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h | 6 + - include/linux/serial_core.h | 2 + - 7 files changed, 960 insertions(+), 0 deletions(-) - create mode 100644 arch/mips/bcm63xx/dev-uart.c - create mode 100644 drivers/serial/bcm63xx_uart.c - create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_uart.h - ---- a/drivers/serial/Kconfig -+++ b/drivers/serial/Kconfig -@@ -1433,4 +1433,23 @@ config SPORT_BAUD_RATE - default 19200 if (SERIAL_SPORT_BAUD_RATE_19200) - default 9600 if (SERIAL_SPORT_BAUD_RATE_9600) - -+config SERIAL_BCM63XX -+ tristate "bcm63xx serial port support" -+ select SERIAL_CORE -+ depends on BCM63XX -+ help -+ If you have a bcm63xx CPU, you can enable its onboard -+ serial port by enabling this options. -+ -+ To compile this driver as a module, choose M here: the -+ module will be called bcm963xx_uart. -+ -+config SERIAL_BCM63XX_CONSOLE -+ bool "Console on bcm63xx serial port" -+ depends on SERIAL_BCM63XX -+ select SERIAL_CORE_CONSOLE -+ help -+ If you have enabled the serial port on the bcm63xx CPU -+ you can make it the console by answering Y to this option. -+ - endmenu ---- a/drivers/serial/Makefile -+++ b/drivers/serial/Makefile -@@ -34,6 +34,7 @@ obj-$(CONFIG_SERIAL_CLPS711X) += clps711 - obj-$(CONFIG_SERIAL_PXA) += pxa.o - obj-$(CONFIG_SERIAL_PNX8XXX) += pnx8xxx_uart.o - obj-$(CONFIG_SERIAL_SA1100) += sa1100.o -+obj-$(CONFIG_SERIAL_BCM63XX) += bcm63xx_uart.o - obj-$(CONFIG_SERIAL_BFIN) += bfin_5xx.o - obj-$(CONFIG_SERIAL_BFIN_SPORT) += bfin_sport_uart.o - obj-$(CONFIG_SERIAL_SAMSUNG) += samsung.o ---- a/include/linux/serial_core.h -+++ b/include/linux/serial_core.h -@@ -167,6 +167,8 @@ - /* MAX3100 */ - #define PORT_MAX3100 86 - -+#define PORT_BCM63XX 83 -+ - #ifdef __KERNEL__ - - #include diff --git a/target/linux/brcm63xx/patches-2.6.30/004_add_pci_support.patch b/target/linux/brcm63xx/patches-2.6.30/004_add_pci_support.patch deleted file mode 100644 index 4e65c41d4..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/004_add_pci_support.patch +++ /dev/null @@ -1,33 +0,0 @@ -From 2a7fa2dbbf68650644f807a50cc2d84ca30835c1 Mon Sep 17 00:00:00 2001 -From: Maxime Bizon -Date: Sun, 21 Sep 2008 04:47:13 +0200 -Subject: [PATCH] [MIPS] BCM63XX: Add PCI support. - -Signed-off-by: Maxime Bizon ---- - arch/mips/bcm63xx/Kconfig | 2 + - arch/mips/bcm63xx/setup.c | 2 + - arch/mips/pci/Makefile | 2 + - arch/mips/pci/fixup-bcm63xx.c | 21 +++ - arch/mips/pci/ops-bcm63xx.c | 179 +++++++++++++++++++++++ - arch/mips/pci/pci-bcm63xx.c | 178 ++++++++++++++++++++++ - arch/mips/pci/pci-bcm63xx.h | 27 ++++ - include/asm-mips/mach-bcm63xx/bcm63xx_dev_pci.h | 6 + - 8 files changed, 417 insertions(+), 0 deletions(-) - create mode 100644 arch/mips/pci/fixup-bcm63xx.c - create mode 100644 arch/mips/pci/ops-bcm63xx.c - create mode 100644 arch/mips/pci/pci-bcm63xx.c - create mode 100644 arch/mips/pci/pci-bcm63xx.h - create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_pci.h - ---- a/arch/mips/pci/Makefile -+++ b/arch/mips/pci/Makefile -@@ -16,6 +16,8 @@ obj-$(CONFIG_PCI_VR41XX) += ops-vr41xx.o - obj-$(CONFIG_NEC_MARKEINS) += ops-emma2rh.o pci-emma2rh.o fixup-emma2rh.o - obj-$(CONFIG_PCI_TX4927) += ops-tx4927.o - obj-$(CONFIG_BCM47XX) += pci-bcm47xx.o -+obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \ -+ ops-bcm63xx.o - - # - # These are still pretty much in the old state, watch, go blind. diff --git a/target/linux/brcm63xx/patches-2.6.30/006-pcmcia_cardbus_support.patch b/target/linux/brcm63xx/patches-2.6.30/006-pcmcia_cardbus_support.patch deleted file mode 100644 index e6e867f17..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/006-pcmcia_cardbus_support.patch +++ /dev/null @@ -1,43 +0,0 @@ -From b17597be763621ba63534fda6e1ea0a802be2087 Mon Sep 17 00:00:00 2001 -From: Maxime Bizon -Date: Fri, 18 Jul 2008 21:18:51 +0200 -Subject: [PATCH] [MIPS] BCM63XX: Add PCMCIA & Cardbus support. - -Signed-off-by: Maxime Bizon ---- - arch/mips/bcm63xx/Makefile | 1 + - arch/mips/bcm63xx/dev-pcmcia.c | 135 +++++ - drivers/pcmcia/Kconfig | 4 + - drivers/pcmcia/Makefile | 1 + - drivers/pcmcia/bcm63xx_pcmcia.c | 521 ++++++++++++++++++++ - drivers/pcmcia/bcm63xx_pcmcia.h | 65 +++ - include/asm-mips/mach-bcm63xx/bcm63xx_dev_pcmcia.h | 13 + - 7 files changed, 740 insertions(+), 0 deletions(-) - create mode 100644 arch/mips/bcm63xx/dev-pcmcia.c - create mode 100644 drivers/pcmcia/bcm63xx_pcmcia.c - create mode 100644 drivers/pcmcia/bcm63xx_pcmcia.h - create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_pcmcia.h - ---- a/drivers/pcmcia/Kconfig -+++ b/drivers/pcmcia/Kconfig -@@ -192,6 +192,10 @@ config PCMCIA_AU1X00 - tristate "Au1x00 pcmcia support" - depends on SOC_AU1X00 && PCMCIA - -+config PCMCIA_BCM63XX -+ tristate "bcm63xx pcmcia support" -+ depends on BCM63XX && PCMCIA -+ - config PCMCIA_SA1100 - tristate "SA1100 support" - depends on ARM && ARCH_SA1100 && PCMCIA ---- a/drivers/pcmcia/Makefile -+++ b/drivers/pcmcia/Makefile -@@ -27,6 +27,7 @@ obj-$(CONFIG_PCMCIA_SA1111) += sa11xx_ - obj-$(CONFIG_M32R_PCC) += m32r_pcc.o - obj-$(CONFIG_M32R_CFC) += m32r_cfc.o - obj-$(CONFIG_PCMCIA_AU1X00) += au1x00_ss.o -+obj-$(CONFIG_PCMCIA_BCM63XX) += bcm63xx_pcmcia.o - obj-$(CONFIG_PCMCIA_VRC4171) += vrc4171_card.o - obj-$(CONFIG_PCMCIA_VRC4173) += vrc4173_cardu.o - obj-$(CONFIG_OMAP_CF) += omap_cf.o diff --git a/target/linux/brcm63xx/patches-2.6.30/007-usb_ohci_support.patch b/target/linux/brcm63xx/patches-2.6.30/007-usb_ohci_support.patch deleted file mode 100644 index a43c06a47..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/007-usb_ohci_support.patch +++ /dev/null @@ -1,56 +0,0 @@ -From f7416412febd7efc1d33c7506c81265719368667 Mon Sep 17 00:00:00 2001 -From: Maxime Bizon -Date: Mon, 21 Jul 2008 14:58:19 +0200 -Subject: [PATCH] [MIPS] BCM63XX: Add USB OHCI support. - -Signed-off-by: Maxime Bizon ---- - arch/mips/bcm63xx/Kconfig | 6 + - arch/mips/bcm63xx/Makefile | 1 + - arch/mips/bcm63xx/dev-usb-ohci.c | 50 ++++++ - drivers/usb/host/ohci-bcm63xx.c | 159 ++++++++++++++++++++ - drivers/usb/host/ohci-hcd.c | 5 + - drivers/usb/host/ohci.h | 7 +- - .../asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 + - 7 files changed, 233 insertions(+), 1 deletions(-) - create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c - create mode 100644 drivers/usb/host/ohci-bcm63xx.c - create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ohci.h - ---- a/drivers/usb/host/ohci-hcd.c -+++ b/drivers/usb/host/ohci-hcd.c -@@ -1047,6 +1047,11 @@ MODULE_LICENSE ("GPL"); - #define PLATFORM_DRIVER usb_hcd_pnx4008_driver - #endif - -+#ifdef CONFIG_BCM63XX -+#include "ohci-bcm63xx.c" -+#define PLATFORM_DRIVER ohci_hcd_bcm63xx_driver -+#endif -+ - #if defined(CONFIG_CPU_SUBTYPE_SH7720) || \ - defined(CONFIG_CPU_SUBTYPE_SH7721) || \ - defined(CONFIG_CPU_SUBTYPE_SH7763) || \ ---- a/drivers/usb/host/ohci.h -+++ b/drivers/usb/host/ohci.h -@@ -536,6 +536,11 @@ static inline struct usb_hcd *ohci_to_hc - #define big_endian_mmio(ohci) 0 /* only little endian */ - #endif - -+#if defined(CONFIG_MIPS) && defined(CONFIG_BCM63XX) -+#define readl_be(addr) __raw_readl((__force unsigned *)addr) -+#define writel_be(val, addr) __raw_writel(val, (__force unsigned *)addr) -+#endif -+ - /* - * Big-endian read/write functions are arch-specific. - * Other arches can be added if/when they're needed. -@@ -646,7 +651,7 @@ static inline u32 hc32_to_cpup (const st - * some big-endian SOC implementations. Same thing happens with PSW access. - */ - --#ifdef CONFIG_PPC_MPC52xx -+#if defined(CONFIG_PPC_MPC52xx) || defined(CONFIG_BCM63XX) - #define big_endian_frame_no_quirk(ohci) (ohci->flags & OHCI_QUIRK_FRAME_NO) - #else - #define big_endian_frame_no_quirk(ohci) 0 diff --git a/target/linux/brcm63xx/patches-2.6.30/008-usb_ehci_support.patch b/target/linux/brcm63xx/patches-2.6.30/008-usb_ehci_support.patch deleted file mode 100644 index 29433d94b..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/008-usb_ehci_support.patch +++ /dev/null @@ -1,58 +0,0 @@ -From 2940d1996c86c4c4dd7a82214f846d0c0b707165 Mon Sep 17 00:00:00 2001 -From: Maxime Bizon -Date: Mon, 21 Jul 2008 18:24:42 +0200 -Subject: [PATCH] [MIPS] BCM63XX: Add USB EHCI support. - -Signed-off-by: Maxime Bizon ---- - arch/mips/bcm63xx/Kconfig | 2 + - arch/mips/bcm63xx/Makefile | 1 + - arch/mips/bcm63xx/dev-usb-ehci.c | 50 +++++++ - drivers/usb/host/ehci-bcm63xx.c | 152 ++++++++++++++++++++ - drivers/usb/host/ehci-hcd.c | 5 + - drivers/usb/host/ehci.h | 5 + - .../asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ehci.h | 6 + - 7 files changed, 221 insertions(+), 0 deletions(-) - create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c - create mode 100644 drivers/usb/host/ehci-bcm63xx.c - create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_usb_ehci.h - ---- a/drivers/usb/host/ehci-hcd.c -+++ b/drivers/usb/host/ehci-hcd.c -@@ -1072,6 +1072,11 @@ MODULE_LICENSE ("GPL"); - #define PLATFORM_DRIVER ixp4xx_ehci_driver - #endif - -+#ifdef CONFIG_BCM63XX -+#include "ehci-bcm63xx.c" -+#define PLATFORM_DRIVER ehci_hcd_bcm63xx_driver -+#endif -+ - #if !defined(PCI_DRIVER) && !defined(PLATFORM_DRIVER) && \ - !defined(PS3_SYSTEM_BUS_DRIVER) && !defined(OF_PLATFORM_DRIVER) - #error "missing bus glue for ehci-hcd" ---- a/drivers/usb/host/ehci.h -+++ b/drivers/usb/host/ehci.h -@@ -597,6 +597,11 @@ ehci_port_speed(struct ehci_hcd *ehci, u - #define writel_be(val, addr) __raw_writel(val, (__force unsigned *)addr) - #endif - -+#if defined(CONFIG_MIPS) && defined(CONFIG_BCM63XX) -+#define readl_be(addr) __raw_readl((__force unsigned *)addr) -+#define writel_be(val, addr) __raw_writel(val, (__force unsigned *)addr) -+#endif -+ - static inline unsigned int ehci_readl(const struct ehci_hcd *ehci, - __u32 __iomem * regs) - { ---- a/drivers/usb/host/Kconfig -+++ b/drivers/usb/host/Kconfig -@@ -41,7 +41,7 @@ config USB_EHCI_HCD - - config USB_EHCI_ROOT_HUB_TT - bool "Root Hub Transaction Translators" -- depends on USB_EHCI_HCD -+ depends on USB_EHCI_HCD && !BCM63XX - ---help--- - Some EHCI chips have vendor-specific extensions to integrate - transaction translators, so that no OHCI or UHCI companion diff --git a/target/linux/brcm63xx/patches-2.6.30/009-add_integrated_ethernet_mac_support.patch b/target/linux/brcm63xx/patches-2.6.30/009-add_integrated_ethernet_mac_support.patch deleted file mode 100644 index 82015ae16..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/009-add_integrated_ethernet_mac_support.patch +++ /dev/null @@ -1,48 +0,0 @@ -From 49aa7ffcd9bd2d9a0af99fced7b8511160dbf345 Mon Sep 17 00:00:00 2001 -From: Maxime Bizon -Date: Sun, 21 Sep 2008 03:43:26 +0200 -Subject: [PATCH] [MIPS] BCM63XX: Add integrated ethernet mac support. - -Signed-off-by: Maxime Bizon ---- - arch/mips/bcm63xx/Makefile | 1 + - arch/mips/bcm63xx/dev-enet.c | 158 ++ - drivers/net/Kconfig | 9 + - drivers/net/Makefile | 1 + - drivers/net/bcm63xx_enet.c | 1894 ++++++++++++++++++++++ - drivers/net/bcm63xx_enet.h | 294 ++++ - include/asm-mips/mach-bcm63xx/bcm63xx_dev_enet.h | 45 + - 7 files changed, 2402 insertions(+), 0 deletions(-) - create mode 100644 arch/mips/bcm63xx/dev-enet.c - create mode 100644 drivers/net/bcm63xx_enet.c - create mode 100644 drivers/net/bcm63xx_enet.h - create mode 100644 include/asm-mips/mach-bcm63xx/bcm63xx_dev_enet.h - ---- a/drivers/net/Kconfig -+++ b/drivers/net/Kconfig -@@ -2035,6 +2035,15 @@ config ATL2 - To compile this driver as a module, choose M here. The module - will be called atl2. - -+config BCM63XX_ENET -+ tristate "Broadcom 63xx internal mac support" -+ depends on BCM63XX -+ select MII -+ select PHYLIB -+ help -+ This driver supports the ethernet MACs in the Broadcom 63xx -+ MIPS chipset family (BCM63XX). -+ - source "drivers/net/fs_enet/Kconfig" - - endif # NET_ETHERNET ---- a/drivers/net/Makefile -+++ b/drivers/net/Makefile -@@ -130,6 +130,7 @@ obj-$(CONFIG_SB1250_MAC) += sb1250-mac.o - obj-$(CONFIG_B44) += b44.o - obj-$(CONFIG_FORCEDETH) += forcedeth.o - obj-$(CONFIG_NE_H8300) += ne-h8300.o 8390.o -+obj-$(CONFIG_BCM63XX_ENET) += bcm63xx_enet.o - obj-$(CONFIG_AX88796) += ax88796.o - - obj-$(CONFIG_TSI108_ETH) += tsi108_eth.o diff --git a/target/linux/brcm63xx/patches-2.6.30/010-add_integrated_ethernet_phy_support.patch b/target/linux/brcm63xx/patches-2.6.30/010-add_integrated_ethernet_phy_support.patch deleted file mode 100644 index b2eace1c5..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/010-add_integrated_ethernet_phy_support.patch +++ /dev/null @@ -1,38 +0,0 @@ -From 7eefcb968019804e024c8243e28afb1eebd674a2 Mon Sep 17 00:00:00 2001 -From: Maxime Bizon -Date: Sun, 21 Sep 2008 02:20:53 +0200 -Subject: [PATCH] [MIPS] BCM63XX: Add integrated ethernet PHY support for phylib. - -Signed-off-by: Maxime Bizon ---- - drivers/net/phy/Kconfig | 6 ++ - drivers/net/phy/Makefile | 1 + - drivers/net/phy/bcm63xx.c | 132 +++++++++++++++++++++++++++++++++++++++++++++ - 3 files changed, 139 insertions(+), 0 deletions(-) - create mode 100644 drivers/net/phy/bcm63xx.c - ---- a/drivers/net/phy/Kconfig -+++ b/drivers/net/phy/Kconfig -@@ -62,6 +62,12 @@ config BROADCOM_PHY - Currently supports the BCM5411, BCM5421, BCM5461, BCM5464, BCM5481 - and BCM5482 PHYs. - -+config BCM63XX_PHY -+ tristate "Drivers for Broadcom 63xx SOCs internal PHY" -+ depends on BCM63XX -+ ---help--- -+ Currently supports the 6348 and 6358 PHYs. -+ - config ICPLUS_PHY - tristate "Drivers for ICPlus PHYs" - ---help--- ---- a/drivers/net/phy/Makefile -+++ b/drivers/net/phy/Makefile -@@ -12,6 +12,7 @@ obj-$(CONFIG_QSEMI_PHY) += qsemi.o - obj-$(CONFIG_SMSC_PHY) += smsc.o - obj-$(CONFIG_VITESSE_PHY) += vitesse.o - obj-$(CONFIG_BROADCOM_PHY) += broadcom.o -+obj-$(CONFIG_BCM63XX_PHY) += bcm63xx.o - obj-$(CONFIG_ICPLUS_PHY) += icplus.o - obj-$(CONFIG_ADM6996_PHY) += adm6996.o - obj-$(CONFIG_MVSWITCH_PHY) += mvswitch.o diff --git a/target/linux/brcm63xx/patches-2.6.30/020-watchdog.patch b/target/linux/brcm63xx/patches-2.6.30/020-watchdog.patch deleted file mode 100644 index 302c6c79b..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/020-watchdog.patch +++ /dev/null @@ -1,29 +0,0 @@ ---- a/drivers/watchdog/Makefile -+++ b/drivers/watchdog/Makefile -@@ -105,6 +105,7 @@ obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o - obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o - obj-$(CONFIG_AR7_WDT) += ar7_wdt.o - obj-$(CONFIG_TXX9_WDT) += txx9wdt.o -+obj-$(CONFIG_BCM63XX_WDT) += bcm63xx_wdt.o - - # PARISC Architecture - ---- a/drivers/watchdog/Kconfig -+++ b/drivers/watchdog/Kconfig -@@ -764,6 +764,16 @@ config TXX9_WDT - help - Hardware driver for the built-in watchdog timer on TXx9 MIPS SoCs. - -+config BCM63XX_WDT -+ tristate "Broadcom BCM63xx hardware watchdog" -+ depends on BCM63XX -+ help -+ Watchdog driver for the built in watchdog hardware in Broadcom -+ BCM63xx SoC. -+ -+ To compile thi driver as a loadable module, choose M here. -+ The module will be called bcm63xx_wdt. -+ - # PARISC Architecture - - # POWERPC Architecture diff --git a/target/linux/brcm63xx/patches-2.6.30/040-bcm963xx_flashmap.patch b/target/linux/brcm63xx/patches-2.6.30/040-bcm963xx_flashmap.patch deleted file mode 100644 index f8d37abd8..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/040-bcm963xx_flashmap.patch +++ /dev/null @@ -1,73 +0,0 @@ -From e734ace5baa04e0e8af1d4483475fbd6bd2b32a1 Mon Sep 17 00:00:00 2001 -From: Axel Gembe -Date: Mon, 12 May 2008 18:54:09 +0200 -Subject: [PATCH] bcm963xx: flashmap support - - -Signed-off-by: Axel Gembe ---- - drivers/mtd/maps/Kconfig | 7 +++++++ - drivers/mtd/maps/Makefile | 1 + - drivers/mtd/redboot.c | 13 ++++++++++--- - 3 files changed, 18 insertions(+), 3 deletions(-) - ---- a/drivers/mtd/maps/Kconfig -+++ b/drivers/mtd/maps/Kconfig -@@ -268,6 +268,13 @@ config MTD_ALCHEMY - help - Flash memory access on AMD Alchemy Pb/Db/RDK Reference Boards - -+config MTD_BCM963XX -+ tristate "BCM963xx Flash device" -+ depends on MIPS && BCM63XX -+ help -+ Flash memory access on BCM963xx boards. Currently only works with -+ RedBoot and CFE. -+ - config MTD_DILNETPC - tristate "CFI Flash device mapped on DIL/Net PC" - depends on X86 && MTD_CONCAT && MTD_PARTITIONS && MTD_CFI_INTELEXT ---- a/drivers/mtd/redboot.c -+++ b/drivers/mtd/redboot.c -@@ -39,7 +39,7 @@ static inline int redboot_checksum(struc - return 1; - } - --static int parse_redboot_partitions(struct mtd_info *master, -+int parse_redboot_partitions(struct mtd_info *master, - struct mtd_partition **pparts, - unsigned long fis_origin) - { -@@ -162,6 +162,14 @@ static int parse_redboot_partitions(stru - goto out; - } - -+ if (!fis_origin) { -+ for (i = 0; i < numslots; i++) { -+ if (!strncmp(buf[i].name, "RedBoot", 8)) { -+ fis_origin = (buf[i].flash_base & (master->size << 1) - 1); -+ } -+ } -+ } -+ - for (i = 0; i < numslots; i++) { - struct fis_list *new_fl, **prev; - -@@ -184,9 +192,8 @@ static int parse_redboot_partitions(stru - new_fl->img = &buf[i]; - if (fis_origin) { - buf[i].flash_base -= fis_origin; -- } else { -- buf[i].flash_base &= master->size-1; - } -+ buf[i].flash_base &= (master->size << 1) - 1; - - /* I'm sure the JFFS2 code has done me permanent damage. - * I now think the following is _normal_ ---- a/drivers/mtd/maps/Makefile -+++ b/drivers/mtd/maps/Makefile -@@ -62,3 +62,4 @@ obj-$(CONFIG_MTD_INTEL_VR_NOR) += intel_ - obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o - obj-$(CONFIG_MTD_RBTX4939) += rbtx4939-flash.o - obj-$(CONFIG_MTD_VMU) += vmu-flash.o -+obj-$(CONFIG_MTD_BCM963XX) += bcm963xx-flash.o diff --git a/target/linux/brcm63xx/patches-2.6.30/050-spi.patch b/target/linux/brcm63xx/patches-2.6.30/050-spi.patch deleted file mode 100644 index 64eb6a7d2..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/050-spi.patch +++ /dev/null @@ -1,26 +0,0 @@ ---- a/drivers/spi/Kconfig -+++ b/drivers/spi/Kconfig -@@ -229,6 +229,13 @@ config SPI_XILINX - See the "OPB Serial Peripheral Interface (SPI) (v1.00e)" - Product Specification document (DS464) for hardware details. - -+config SPI_BCM63XX -+ tristate "Broadcom BCM63xx SPI controller" -+ depends on BCM63XX -+ select SPI_BITBANG -+ help -+ SPI driver for the Broadcom BCM63xx SPI controller. -+ - # - # Add new SPI master controllers in alphabetical order above this line - # ---- a/drivers/spi/Makefile -+++ b/drivers/spi/Makefile -@@ -31,6 +31,7 @@ obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24x - obj-$(CONFIG_SPI_TXX9) += spi_txx9.o - obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o - obj-$(CONFIG_SPI_SH_SCI) += spi_sh_sci.o -+obj-$(CONFIG_SPI_BCM63XX) += bcm63xx_spi.o - # ... add above this line ... - - # SPI protocol drivers (device/link on bus) diff --git a/target/linux/brcm63xx/patches-2.6.30/060-bcm63xx_enet_upstream_fixes.patch b/target/linux/brcm63xx/patches-2.6.30/060-bcm63xx_enet_upstream_fixes.patch deleted file mode 100644 index e4c8026b3..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/060-bcm63xx_enet_upstream_fixes.patch +++ /dev/null @@ -1,448 +0,0 @@ ---- a/drivers/net/bcm63xx_enet.c 2009-07-31 22:06:20.000000000 +0200 -+++ b/drivers/net/bcm63xx_enet.c 2009-08-05 10:02:28.000000000 +0200 -@@ -28,7 +28,6 @@ - #include - #include - #include --#include - - #include - #include "bcm63xx_enet.h" -@@ -91,7 +90,7 @@ - if (enet_readl(priv, ENET_IR_REG) & ENET_IR_MII) - break; - udelay(1); -- } while (limit-- >= 0); -+ } while (limit-- > 0); - - return (limit < 0) ? 1 : 0; - } -@@ -321,7 +320,7 @@ - if (len < copybreak) { - struct sk_buff *nskb; - -- nskb = netdev_alloc_skb(dev, len + 2); -+ nskb = netdev_alloc_skb(dev, len + NET_IP_ALIGN); - if (!nskb) { - /* forget packet, just rearm desc */ - priv->stats.rx_dropped++; -@@ -452,11 +451,7 @@ - - /* no more packet in rx/tx queue, remove device from poll - * queue */ --#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) -- netif_rx_complete(dev, napi); --#else - napi_complete(napi); --#endif - - /* restore rx/tx interrupt */ - enet_dma_writel(priv, ENETDMA_IR_PKTDONE_MASK, -@@ -508,11 +503,7 @@ - enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan)); - enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan)); - --#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,30) -- netif_rx_schedule(dev, &priv->napi); --#else - napi_schedule(&priv->napi); --#endif - - return IRQ_HANDLED; - } -@@ -764,11 +755,11 @@ - pr_info("%s: link %s", dev->name, phydev->link ? - "UP" : "DOWN"); - if (phydev->link) -- printk(" - %d/%s - flow control %s", phydev->speed, -+ pr_cont(" - %d/%s - flow control %s", phydev->speed, - DUPLEX_FULL == phydev->duplex ? "full" : "half", - phydev->pause == 1 ? "rx&tx" : "off"); - -- printk("\n"); -+ pr_cont("\n"); - } - } - -@@ -782,6 +773,7 @@ - priv = netdev_priv(dev); - bcm_enet_set_duplex(priv, priv->force_duplex_full); - bcm_enet_set_flow(priv, priv->pause_rx, priv->pause_tx); -+ netif_carrier_on(dev); - - pr_info("%s: link forced UP - %d/%s - flow control %s/%s\n", - dev->name, -@@ -800,21 +792,18 @@ - struct sockaddr addr; - struct device *kdev; - struct phy_device *phydev; -- int irq_requested, i, ret; -+ int i, ret; - unsigned int size; -- char phy_id[BUS_ID_SIZE]; -+ char phy_id[MII_BUS_ID_SIZE + 3]; - void *p; - u32 val; - - priv = netdev_priv(dev); -- priv->rx_desc_cpu = priv->tx_desc_cpu = NULL; -- priv->rx_skb = priv->tx_skb = NULL; -- - kdev = &priv->pdev->dev; - - if (priv->has_phy) { - /* connect to PHY */ -- snprintf(phy_id, BUS_ID_SIZE, PHY_ID_FMT, -+ snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, - priv->mac_id ? "1" : "0", priv->phy_id); - - phydev = phy_connect(dev, phy_id, &bcm_enet_adjust_phy_link, 0, -@@ -854,23 +843,19 @@ - enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->rx_chan)); - enet_dma_writel(priv, 0, ENETDMA_IRMASK_REG(priv->tx_chan)); - -- irq_requested = 0; - ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev); - if (ret) -- goto out; -- irq_requested++; -+ goto out_phy_disconnect; - - ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, - IRQF_SAMPLE_RANDOM | IRQF_DISABLED, dev->name, dev); - if (ret) -- goto out; -- irq_requested++; -+ goto out_freeirq; - - ret = request_irq(priv->irq_tx, bcm_enet_isr_dma, - IRQF_DISABLED, dev->name, dev); - if (ret) -- goto out; -- irq_requested++; -+ goto out_freeirq_rx; - - /* initialize perfect match registers */ - for (i = 0; i < 4; i++) { -@@ -888,7 +873,7 @@ - if (!p) { - dev_err(kdev, "cannot allocate rx ring %u\n", size); - ret = -ENOMEM; -- goto out; -+ goto out_freeirq_tx; - } - - memset(p, 0, size); -@@ -901,7 +886,7 @@ - if (!p) { - dev_err(kdev, "cannot allocate tx ring\n"); - ret = -ENOMEM; -- goto out; -+ goto out_free_rx_ring; - } - - memset(p, 0, size); -@@ -913,7 +898,7 @@ - if (!priv->tx_skb) { - dev_err(kdev, "cannot allocate rx skb queue\n"); - ret = -ENOMEM; -- goto out; -+ goto out_free_tx_ring; - } - - priv->tx_desc_count = priv->tx_ring_size; -@@ -927,7 +912,7 @@ - if (!priv->rx_skb) { - dev_err(kdev, "cannot allocate rx skb queue\n"); - ret = -ENOMEM; -- goto out; -+ goto out_free_tx_skb; - } - - priv->rx_desc_count = 0; -@@ -1012,13 +997,6 @@ - return 0; - - out: -- phy_disconnect(priv->phydev); -- if (irq_requested > 2) -- free_irq(priv->irq_tx, dev); -- if (irq_requested > 1) -- free_irq(priv->irq_rx, dev); -- if (irq_requested > 0) -- free_irq(dev->irq, dev); - for (i = 0; i < priv->rx_ring_size; i++) { - struct bcm_enet_desc *desc; - -@@ -1030,14 +1008,31 @@ - DMA_FROM_DEVICE); - kfree_skb(priv->rx_skb[i]); - } -- if (priv->rx_desc_cpu) -- dma_free_coherent(kdev, priv->rx_desc_alloc_size, -- priv->rx_desc_cpu, priv->rx_desc_dma); -- if (priv->tx_desc_cpu) -- dma_free_coherent(kdev, priv->tx_desc_alloc_size, -- priv->tx_desc_cpu, priv->tx_desc_dma); - kfree(priv->rx_skb); -+ -+out_free_tx_skb: - kfree(priv->tx_skb); -+ -+out_free_tx_ring: -+ dma_free_coherent(kdev, priv->tx_desc_alloc_size, -+ priv->tx_desc_cpu, priv->tx_desc_dma); -+ -+out_free_rx_ring: -+ dma_free_coherent(kdev, priv->rx_desc_alloc_size, -+ priv->rx_desc_cpu, priv->rx_desc_dma); -+ -+out_freeirq_tx: -+ free_irq(priv->irq_tx, dev); -+ -+out_freeirq_rx: -+ free_irq(priv->irq_rx, dev); -+ -+out_freeirq: -+ free_irq(dev->irq, dev); -+ -+out_phy_disconnect: -+ phy_disconnect(priv->phydev); -+ - return ret; - } - -@@ -1606,6 +1601,20 @@ - enet_writel(priv, val, ENET_MIBCTL_REG); - } - -+static const struct net_device_ops bcm_enet_ops = { -+ .ndo_open = bcm_enet_open, -+ .ndo_stop = bcm_enet_stop, -+ .ndo_start_xmit = bcm_enet_start_xmit, -+ .ndo_get_stats = bcm_enet_get_stats, -+ .ndo_set_mac_address = bcm_enet_set_mac_address, -+ .ndo_set_multicast_list = bcm_enet_set_multicast_list, -+ .ndo_do_ioctl = bcm_enet_ioctl, -+ .ndo_change_mtu = bcm_enet_change_mtu, -+#ifdef CONFIG_NET_POLL_CONTROLLER -+ .ndo_poll_controller = bcm_enet_netpoll, -+#endif -+}; -+ - /* - * allocate netdevice, request register memory and register device. - */ -@@ -1618,15 +1627,13 @@ - struct mii_bus *bus; - const char *clk_name; - unsigned int iomem_size; -- int i, ret, mdio_registered, mem_requested; -+ int i, ret; - - /* stop if shared driver failed, assume driver->probe will be - * called in the same order we register devices (correct ?) */ - if (!bcm_enet_shared_base) - return -ENODEV; - -- mdio_registered = mem_requested = 0; -- - res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); - res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); - res_irq_rx = platform_get_resource(pdev, IORESOURCE_IRQ, 1); -@@ -1648,14 +1655,13 @@ - iomem_size = res_mem->end - res_mem->start + 1; - if (!request_mem_region(res_mem->start, iomem_size, "bcm63xx_enet")) { - ret = -EBUSY; -- goto err; -+ goto out; - } -- mem_requested = 1; - - priv->base = ioremap(res_mem->start, iomem_size); - if (priv->base == NULL) { - ret = -ENOMEM; -- goto err; -+ goto out_release_mem; - } - dev->irq = priv->irq = res_irq->start; - priv->irq_rx = res_irq_rx->start; -@@ -1676,8 +1682,7 @@ - priv->mac_clk = clk_get(&pdev->dev, clk_name); - if (IS_ERR(priv->mac_clk)) { - ret = PTR_ERR(priv->mac_clk); -- priv->mac_clk = NULL; -- goto err; -+ goto out_unmap; - } - clk_enable(priv->mac_clk); - -@@ -1706,7 +1711,7 @@ - if (IS_ERR(priv->phy_clk)) { - ret = PTR_ERR(priv->phy_clk); - priv->phy_clk = NULL; -- goto err; -+ goto out_put_clk_mac; - } - clk_enable(priv->phy_clk); - } -@@ -1716,13 +1721,16 @@ - - /* MII bus registration */ - if (priv->has_phy) { -- bus = &priv->mii_bus; -+ -+ priv->mii_bus = mdiobus_alloc(); -+ if (!priv->mii_bus) { -+ ret = -ENOMEM; -+ goto out_uninit_hw; -+ } -+ -+ bus = priv->mii_bus; - bus->name = "bcm63xx_enet MII bus"; --#if LINUX_VERSION_CODE < KERNEL_VERSION(2,6,28) -- bus->dev = &pdev->dev; --#else - bus->parent = &pdev->dev; --#endif - bus->priv = priv; - bus->read = bcm_enet_mdio_read_phylib; - bus->write = bcm_enet_mdio_write_phylib; -@@ -1736,7 +1744,7 @@ - bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL); - if (!bus->irq) { - ret = -ENOMEM; -- goto err; -+ goto out_free_mdio; - } - - if (priv->has_phy_interrupt) -@@ -1747,9 +1755,8 @@ - ret = mdiobus_register(bus); - if (ret) { - dev_err(&pdev->dev, "unable to register mdio bus\n"); -- goto err; -+ goto out_free_mdio; - } -- mdio_registered = 1; - } else { - - /* run platform code to initialize PHY device */ -@@ -1757,7 +1764,7 @@ - pd->mii_config(dev, 1, bcm_enet_mdio_read_mii, - bcm_enet_mdio_write_mii)) { - dev_err(&pdev->dev, "unable to configure mdio bus\n"); -- goto err; -+ goto out_uninit_hw; - } - } - -@@ -1777,51 +1784,50 @@ - enet_writel(priv, 0, ENET_MIB_REG(i)); - - /* register netdevice */ -- dev->open = bcm_enet_open; -- dev->stop = bcm_enet_stop; -- dev->hard_start_xmit = bcm_enet_start_xmit; -- dev->get_stats = bcm_enet_get_stats; -- dev->set_mac_address = bcm_enet_set_mac_address; -- dev->set_multicast_list = bcm_enet_set_multicast_list; -+ dev->netdev_ops = &bcm_enet_ops; - netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16); -- dev->do_ioctl = bcm_enet_ioctl; --#ifdef CONFIG_NET_POLL_CONTROLLER -- dev->poll_controller = bcm_enet_netpoll; --#endif -- dev->change_mtu = bcm_enet_change_mtu; - - SET_ETHTOOL_OPS(dev, &bcm_enet_ethtool_ops); -- SET_NETDEV_DEV(dev, &pdev->dev); - - ret = register_netdev(dev); - if (ret) -- goto err; -+ goto out_unregister_mdio; - -+ netif_carrier_off(dev); - platform_set_drvdata(pdev, dev); - priv->pdev = pdev; - priv->net_dev = dev; -+ SET_NETDEV_DEV(dev, &pdev->dev); - - return 0; - --err: -- if (mem_requested) -- release_mem_region(res_mem->start, iomem_size); -- if (mdio_registered) -- mdiobus_unregister(&priv->mii_bus); -- kfree(priv->mii_bus.irq); -- if (priv->mac_clk) { -- clk_disable(priv->mac_clk); -- clk_put(priv->mac_clk); -+out_unregister_mdio: -+ if (priv->mii_bus) { -+ mdiobus_unregister(priv->mii_bus); -+ kfree(priv->mii_bus->irq); - } -+ -+out_free_mdio: -+ if (priv->mii_bus) -+ mdiobus_free(priv->mii_bus); -+ -+out_uninit_hw: -+ /* turn off mdc clock */ -+ enet_writel(priv, 0, ENET_MIISC_REG); - if (priv->phy_clk) { - clk_disable(priv->phy_clk); - clk_put(priv->phy_clk); - } -- if (priv->base) { -- /* turn off mdc clock */ -- enet_writel(priv, 0, ENET_MIISC_REG); -- iounmap(priv->base); -- } -+ -+out_put_clk_mac: -+ clk_disable(priv->mac_clk); -+ clk_put(priv->mac_clk); -+ -+out_unmap: -+ iounmap(priv->base); -+ -+out_release_mem: -+ release_mem_region(res_mem->start, iomem_size); - out: - free_netdev(dev); - return ret; -@@ -1846,8 +1852,9 @@ - enet_writel(priv, 0, ENET_MIISC_REG); - - if (priv->has_phy) { -- mdiobus_unregister(&priv->mii_bus); -- kfree(priv->mii_bus.irq); -+ mdiobus_unregister(priv->mii_bus); -+ kfree(priv->mii_bus->irq); -+ mdiobus_free(priv->mii_bus); - } else { - struct bcm63xx_enet_platform_data *pd; - -@@ -1870,7 +1877,6 @@ - clk_disable(priv->mac_clk); - clk_put(priv->mac_clk); - -- platform_set_drvdata(pdev, NULL); - free_netdev(dev); - return 0; - } ---- a/drivers/net/bcm63xx_enet.h 2009-06-07 11:25:51.000000000 +0200 -+++ b/drivers/net/bcm63xx_enet.h 2009-08-05 10:02:28.000000000 +0200 -@@ -258,7 +258,7 @@ - int phy_interrupt; - - /* used when a phy is connected (phylib used) */ -- struct mii_bus mii_bus; -+ struct mii_bus *mii_bus; - struct phy_device *phydev; - int old_link; - int old_duplex; diff --git a/target/linux/brcm63xx/patches-2.6.30/070_bcm63xx_enet_vlan_incoming_fixed.patch b/target/linux/brcm63xx/patches-2.6.30/070_bcm63xx_enet_vlan_incoming_fixed.patch deleted file mode 100644 index f18830ff2..000000000 --- a/target/linux/brcm63xx/patches-2.6.30/070_bcm63xx_enet_vlan_incoming_fixed.patch +++ /dev/null @@ -1,13 +0,0 @@ -Index: linux-2.6.30.10/drivers/net/bcm63xx_enet.c -=================================================================== ---- linux-2.6.30.10.orig/drivers/net/bcm63xx_enet.c 2010-02-18 12:57:05.332799586 -0500 -+++ linux-2.6.30.10/drivers/net/bcm63xx_enet.c 2010-02-18 12:57:53.954051082 -0500 -@@ -1520,7 +1520,7 @@ - actual_mtu = mtu; - - /* add ethernet header + vlan tag size */ -- actual_mtu += VLAN_ETH_HLEN; -+ actual_mtu += VLAN_ETH_HLEN + VLAN_HLEN; - - if (actual_mtu < 64 || actual_mtu > BCMENET_MAX_MTU) - return -EINVAL; diff --git a/target/linux/brcm63xx/patches-2.6.32/040-bcm963xx_flashmap.patch b/target/linux/brcm63xx/patches-2.6.32/040-bcm963xx_flashmap.patch index 6bedfe328..556e8cb85 100644 --- a/target/linux/brcm63xx/patches-2.6.32/040-bcm963xx_flashmap.patch +++ b/target/linux/brcm63xx/patches-2.6.32/040-bcm963xx_flashmap.patch @@ -473,187 +473,6 @@ Signed-off-by: Axel Gembe +MODULE_DESCRIPTION("Broadcom BCM63xx MTD partition parser/mapping for CFE and RedBoot"); +MODULE_AUTHOR("Florian Fainelli "); +MODULE_AUTHOR("Mike Albon "); ---- /dev/null -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm_tag.h -@@ -0,0 +1,178 @@ -+#ifndef __BCM63XX_TAG_H -+#define __BCM63XX_TAG_H -+ -+#define IMAGE_LEN 10 /* Length of Length Field */ -+#define ADDRESS_LEN 12 /* Length of Address field */ -+#define TAGID_LEN 6 /* Length of tag ID */ -+#define TAGINFO_LEN 20 /* Length of vendor information field in tag */ -+#define TAGVER_LEN 4 /* Length of Tag Version */ -+#define TAGLAYOUT_LEN 4 /* Length of FlashLayoutVer */ -+ -+#define NUM_TAGID 5 -+#define IMAGETAG_CRC_START 0xFFFFFFFF -+ -+struct tagiddesc_t { -+ char tagid[TAGID_LEN + 1]; -+ char tagiddesc[80]; -+}; -+ -+ // bc221 is used by BT Voyager and should be right -+ // bc310 should be right, and may apply to 3.08 code as well -+#define TAGID_DEFINITIONS { \ -+ { "bccfe", "Broadcom CFE flash image" }, \ -+ { "bc300", "Broadcom code version 3.00-3.06 and all ftp/tftp flash" }, \ -+ { "ag306", "Alice Gate (Pirelli, based on Broadcom 3.06)" }, \ -+ { "bc221", "Broadcom code version 2.21" }, \ -+ { "bc310", "Broadcom code version 3.10-3.12" }, \ -+} -+ -+struct bcm_tag_bccfe { -+ unsigned char tagVersion[TAGVER_LEN]; // 0-3: Version of the image tag -+ unsigned char sig_1[20]; // 4-23: Company Line 1 -+ unsigned char sig_2[14]; // 24-37: Company Line 2 -+ unsigned char chipid[6]; // 38-43: Chip this image is for -+ unsigned char boardid[16]; // 44-59: Board name -+ unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE -+ unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image -+ unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE -+ unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE -+ unsigned char rootAddress[ADDRESS_LEN]; // 94-105: Address in memory of rootfs -+ unsigned char rootLength[IMAGE_LEN]; // 106-115: Size of rootfs -+ unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel -+ unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel -+ unsigned char dualImage[2]; // 138-139: Unused at present -+ unsigned char inactiveFlag[2]; // 140-141: Unused at present -+ unsigned char information1[TAGINFO_LEN]; // 142-161: Unused at present -+ unsigned char tagId[TAGID_LEN]; // 162-167: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced -+ unsigned char tagIdCRC[4]; // 168-171: CRC32 of tagId -+ unsigned char reserved1[44]; // 172-215: Reserved area not in use -+ unsigned char imageCRC[4]; // 216-219: CRC32 of images -+ unsigned char reserved2[16]; // 220-235: Unused at present -+ unsigned char headerCRC[4]; // 236-239: CRC32 of header excluding tagVersion -+ unsigned char reserved3[16]; // 240-255: Unused at present -+}; -+ -+struct bcm_tag_bc300 { -+ unsigned char tagVersion[TAGVER_LEN]; // 0-3: Version of the image tag -+ unsigned char sig_1[20]; // 4-23: Company Line 1 -+ unsigned char sig_2[14]; // 24-37: Company Line 2 -+ unsigned char chipid[6]; // 38-43: Chip this image is for -+ unsigned char boardid[16]; // 44-59: Board name -+ unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE -+ unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image -+ unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE -+ unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE -+ unsigned char flashImageStart[ADDRESS_LEN]; // 94-105: Address in memory of kernel (start of image) -+ unsigned char flashRootLength[IMAGE_LEN]; // 106-115: Size of rootfs + deadcode (web flash uses this + kernelLength to determine the size of the kernel+rootfs flash image) -+ unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel -+ unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel -+ unsigned char dualImage[2]; // 138-139: Unused at present -+ unsigned char inactiveFlag[2]; // 140-141: Unused at present -+ unsigned char information1[TAGINFO_LEN]; // 142-161: Unused at present -+ unsigned char tagId[TAGID_LEN]; // 162-167: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced -+ unsigned char tagIdCRC[4]; // 168-173: CRC32 to ensure validity of tagId -+ unsigned char rootAddress[ADDRESS_LEN]; // 174-183: Address in memory of rootfs partition -+ unsigned char rootLength[IMAGE_LEN]; // 184-193: Size of rootfs partition -+ unsigned char reserved1[22]; // 194-215: Reserved area not in use -+ unsigned char imageCRC[4]; // 216-219: CRC32 of images -+ unsigned char reserved2[16]; // 220-235: Unused at present -+ unsigned char headerCRC[4]; // 236-239: CRC32 of header excluding tagVersion -+ unsigned char reserved3[16]; // 240-255: Unused at present -+}; -+ -+struct bcm_tag_ag306 { -+ unsigned char tagVersion[TAGVER_LEN]; // 0-3: Version of the image tag -+ unsigned char sig_1[20]; // 4-23: Company Line 1 -+ unsigned char sig_2[14]; // 24-37: Company Line 2 -+ unsigned char chipid[6]; // 38-43: Chip this image is for -+ unsigned char boardid[16]; // 44-59: Board name -+ unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE -+ unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image -+ unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE -+ unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE -+ unsigned char flashImageStart[ADDRESS_LEN]; // 94-105: Address in memory of kernel (start of image) -+ unsigned char flashRootLength[IMAGE_LEN]; // 106-115: Size of rootfs + deadcode (web flash uses this + kernelLength to determine the size of the kernel+rootfs flash image) -+ unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel -+ unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel -+ unsigned char dualImage[2]; // 138-139: Unused at present -+ unsigned char inactiveFlag[2]; // 140-141: Unused at present -+ unsigned char information1[TAGINFO_LEN]; // 142-161: Unused at present -+ unsigned char information2[54]; // 162-215: Compilation and related information (not generated/used by OpenWRT) -+ unsigned char kernelCRC[4] ; // 216-219: CRC32 of images -+ unsigned char rootAddress[ADDRESS_LEN]; // 220-231: Address in memory of rootfs partition -+ unsigned char tagIdCRC[4]; // 232-235: Checksum to ensure validity of tagId -+ unsigned char headerCRC[4]; // 236-239: CRC32 of header excluding tagVersion -+ unsigned char rootLength[IMAGE_LEN]; // 240-249: Size of rootfs -+ unsigned char tagId[TAGID_LEN]; // 250-255: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced -+}; -+ -+struct bcm_tag_bc221 { -+ unsigned char tagVersion[TAGVER_LEN]; // 0-3: Version of the image tag -+ unsigned char sig_1[20]; // 4-23: Company Line 1 -+ unsigned char sig_2[14]; // 24-37: Company Line 2 -+ unsigned char chipid[6]; // 38-43: Chip this image is for -+ unsigned char boardid[16]; // 44-59: Board name -+ unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE -+ unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image -+ unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE -+ unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE -+ unsigned char flashImageStart[ADDRESS_LEN]; // 94-105: Address in memory of kernel (start of image) -+ unsigned char flashRootLength[IMAGE_LEN]; // 106-115: Size of rootfs + deadcode (web flash uses this + kernelLength to determine the size of the kernel+rootfs flash image) -+ unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel -+ unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel -+ unsigned char dualImage[2]; // 138-139: Unused at present -+ unsigned char inactiveFlag[2]; // 140-141: Unused at present -+ unsigned char rsa_signature[TAGINFO_LEN]; // 142-161: RSA Signature (unused at present; some vendors may use this) -+ unsigned char reserved5[2]; // 162-163: Unused at present -+ unsigned char tagId[TAGID_LEN]; // 164-169: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced -+ unsigned char rootAddress[ADDRESS_LEN]; // 170-181: Address in memory of rootfs partition -+ unsigned char rootLength[IMAGE_LEN]; // 182-191: Size of rootfs partition -+ unsigned char flashLayoutVer[4]; // 192-195: Version flash layout -+ unsigned char fskernelCRC[4]; // 196-199: Guessed to be kernel CRC -+ unsigned char reserved4[16]; // 200-215: Reserved area; unused at present -+ unsigned char imageCRC[4]; // 216-219: CRC32 of images -+ unsigned char reserved2[12]; // 220-231: Unused at present -+ unsigned char tagIdCRC[4]; // 232-235: CRC32 to ensure validity of tagId -+ unsigned char headerCRC[4]; // 236-239: CRC32 of header excluding tagVersion -+ unsigned char reserved3[16]; // 240-255: Unused at present -+}; -+ -+struct bcm_tag_bc310 { -+ unsigned char tagVersion[4]; // 0-3: Version of the image tag -+ unsigned char sig_1[20]; // 4-23: Company Line 1 -+ unsigned char sig_2[14]; // 24-37: Company Line 2 -+ unsigned char chipid[6]; // 38-43: Chip this image is for -+ unsigned char boardid[16]; // 44-59: Board name -+ unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE -+ unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image -+ unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE -+ unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE -+ unsigned char flashImageStart[ADDRESS_LEN]; // 94-105: Address in memory of kernel (start of image) -+ unsigned char flashRootLength[IMAGE_LEN]; // 106-115: Size of rootfs + deadcode (web flash uses this + kernelLength to determine the size of the kernel+rootfs flash image) -+ unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel -+ unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel -+ unsigned char dualImage[2]; // 138-139: Unused at present -+ unsigned char inactiveFlag[2]; // 140-141: Unused at present -+ unsigned char information1[TAGINFO_LEN]; // 142-161: Unused at present; Some vendors use this for optional information -+ unsigned char tagId[6]; // 162-167: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced -+ unsigned char tagIdCRC[4]; // 168-171: CRC32 to ensure validity of tagId -+ unsigned char rootAddress[ADDRESS_LEN]; // 172-183: Address in memory of rootfs partition -+ unsigned char rootLength[IMAGE_LEN]; // 184-193: Size of rootfs partition -+ unsigned char reserved1[22]; // 193-215: Reserved area not in use -+ unsigned char imageCRC[4]; // 216-219: CRC32 of images -+ unsigned char rootfsCRC[4]; // 220-227: CRC32 of rootfs partition -+ unsigned char kernelCRC[4]; // 224-227: CRC32 of kernel partition -+ unsigned char reserved2[8]; // 228-235: Unused at present -+ unsigned char headerCRC[4]; // 235-239: CRC32 of header excluding tagVersion -+ unsigned char reserved3[16]; // 240-255: Unused at present -+}; -+ -+union bcm_tag { -+ struct bcm_tag_bccfe bccfe; -+ struct bcm_tag_bc300 bc300; -+ struct bcm_tag_ag306 ag306; -+ struct bcm_tag_bc221 bc221; -+ struct bcm_tag_bc310 bc310; -+}; -+ -+#endif /* __BCM63XX_TAG_H */ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c @@ -722,20 +722,6 @@ static int board_get_mac_address(u8 *mac diff --git a/target/linux/brcm63xx/patches-2.6.32/220-board-D4PW.patch b/target/linux/brcm63xx/patches-2.6.32/220-board-D4PW.patch new file mode 100644 index 000000000..46e2595ea --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.32/220-board-D4PW.patch @@ -0,0 +1,60 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -467,6 +467,49 @@ static struct board_info __initdata boar + + .has_ohci0 = 1, + }; ++ ++static struct board_info __initdata board_96348_D4PW = { ++ .name = "D-4P-W", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ .enet1 = { ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .leds = { ++ { ++ .name = "ppp", ++ .gpio = 4, ++ .active_low = 1, ++ }, ++ { ++ .name = "ppp-fail", ++ .gpio = 5, ++ .active_low = 1, ++ }, ++ { ++ .name = "power", ++ .gpio = 0, ++ .active_low = 1, ++ .default_trigger = "default-on", ++ ++ }, ++ }, ++ ++}; ++ + #endif + + /* +@@ -692,6 +735,7 @@ static const struct board_info __initdat + &board_DV201AMR, + &board_96348gw_a, + &board_rta1025w_16, ++ &board_96348_D4PW, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 diff --git a/target/linux/brcm63xx/patches-2.6.33/040-bcm963xx_flashmap.patch b/target/linux/brcm63xx/patches-2.6.33/040-bcm963xx_flashmap.patch index c4631c868..cd0ec549d 100644 --- a/target/linux/brcm63xx/patches-2.6.33/040-bcm963xx_flashmap.patch +++ b/target/linux/brcm63xx/patches-2.6.33/040-bcm963xx_flashmap.patch @@ -473,187 +473,6 @@ Signed-off-by: Axel Gembe +MODULE_DESCRIPTION("Broadcom BCM63xx MTD partition parser/mapping for CFE and RedBoot"); +MODULE_AUTHOR("Florian Fainelli "); +MODULE_AUTHOR("Mike Albon "); ---- /dev/null -+++ b/arch/mips/include/asm/mach-bcm63xx/bcm_tag.h -@@ -0,0 +1,178 @@ -+#ifndef __BCM63XX_TAG_H -+#define __BCM63XX_TAG_H -+ -+#define IMAGE_LEN 10 /* Length of Length Field */ -+#define ADDRESS_LEN 12 /* Length of Address field */ -+#define TAGID_LEN 6 /* Length of tag ID */ -+#define TAGINFO_LEN 20 /* Length of vendor information field in tag */ -+#define TAGVER_LEN 4 /* Length of Tag Version */ -+#define TAGLAYOUT_LEN 4 /* Length of FlashLayoutVer */ -+ -+#define NUM_TAGID 5 -+#define IMAGETAG_CRC_START 0xFFFFFFFF -+ -+struct tagiddesc_t { -+ char tagid[TAGID_LEN + 1]; -+ char tagiddesc[80]; -+}; -+ -+ // bc221 is used by BT Voyager and should be right -+ // bc310 should be right, and may apply to 3.08 code as well -+#define TAGID_DEFINITIONS { \ -+ { "bccfe", "Broadcom CFE flash image" }, \ -+ { "bc300", "Broadcom code version 3.00-3.06 and all ftp/tftp flash" }, \ -+ { "ag306", "Alice Gate (Pirelli, based on Broadcom 3.06)" }, \ -+ { "bc221", "Broadcom code version 2.21" }, \ -+ { "bc310", "Broadcom code version 3.10-3.12" }, \ -+} -+ -+struct bcm_tag_bccfe { -+ unsigned char tagVersion[TAGVER_LEN]; // 0-3: Version of the image tag -+ unsigned char sig_1[20]; // 4-23: Company Line 1 -+ unsigned char sig_2[14]; // 24-37: Company Line 2 -+ unsigned char chipid[6]; // 38-43: Chip this image is for -+ unsigned char boardid[16]; // 44-59: Board name -+ unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE -+ unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image -+ unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE -+ unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE -+ unsigned char rootAddress[ADDRESS_LEN]; // 94-105: Address in memory of rootfs -+ unsigned char rootLength[IMAGE_LEN]; // 106-115: Size of rootfs -+ unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel -+ unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel -+ unsigned char dualImage[2]; // 138-139: Unused at present -+ unsigned char inactiveFlag[2]; // 140-141: Unused at present -+ unsigned char information1[TAGINFO_LEN]; // 142-161: Unused at present -+ unsigned char tagId[TAGID_LEN]; // 162-167: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced -+ unsigned char tagIdCRC[4]; // 168-171: CRC32 of tagId -+ unsigned char reserved1[44]; // 172-215: Reserved area not in use -+ unsigned char imageCRC[4]; // 216-219: CRC32 of images -+ unsigned char reserved2[16]; // 220-235: Unused at present -+ unsigned char headerCRC[4]; // 236-239: CRC32 of header excluding tagVersion -+ unsigned char reserved3[16]; // 240-255: Unused at present -+}; -+ -+struct bcm_tag_bc300 { -+ unsigned char tagVersion[TAGVER_LEN]; // 0-3: Version of the image tag -+ unsigned char sig_1[20]; // 4-23: Company Line 1 -+ unsigned char sig_2[14]; // 24-37: Company Line 2 -+ unsigned char chipid[6]; // 38-43: Chip this image is for -+ unsigned char boardid[16]; // 44-59: Board name -+ unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE -+ unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image -+ unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE -+ unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE -+ unsigned char flashImageStart[ADDRESS_LEN]; // 94-105: Address in memory of kernel (start of image) -+ unsigned char flashRootLength[IMAGE_LEN]; // 106-115: Size of rootfs + deadcode (web flash uses this + kernelLength to determine the size of the kernel+rootfs flash image) -+ unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel -+ unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel -+ unsigned char dualImage[2]; // 138-139: Unused at present -+ unsigned char inactiveFlag[2]; // 140-141: Unused at present -+ unsigned char information1[TAGINFO_LEN]; // 142-161: Unused at present -+ unsigned char tagId[TAGID_LEN]; // 162-167: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced -+ unsigned char tagIdCRC[4]; // 168-173: CRC32 to ensure validity of tagId -+ unsigned char rootAddress[ADDRESS_LEN]; // 174-183: Address in memory of rootfs partition -+ unsigned char rootLength[IMAGE_LEN]; // 184-193: Size of rootfs partition -+ unsigned char reserved1[22]; // 194-215: Reserved area not in use -+ unsigned char imageCRC[4]; // 216-219: CRC32 of images -+ unsigned char reserved2[16]; // 220-235: Unused at present -+ unsigned char headerCRC[4]; // 236-239: CRC32 of header excluding tagVersion -+ unsigned char reserved3[16]; // 240-255: Unused at present -+}; -+ -+struct bcm_tag_ag306 { -+ unsigned char tagVersion[TAGVER_LEN]; // 0-3: Version of the image tag -+ unsigned char sig_1[20]; // 4-23: Company Line 1 -+ unsigned char sig_2[14]; // 24-37: Company Line 2 -+ unsigned char chipid[6]; // 38-43: Chip this image is for -+ unsigned char boardid[16]; // 44-59: Board name -+ unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE -+ unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image -+ unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE -+ unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE -+ unsigned char flashImageStart[ADDRESS_LEN]; // 94-105: Address in memory of kernel (start of image) -+ unsigned char flashRootLength[IMAGE_LEN]; // 106-115: Size of rootfs + deadcode (web flash uses this + kernelLength to determine the size of the kernel+rootfs flash image) -+ unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel -+ unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel -+ unsigned char dualImage[2]; // 138-139: Unused at present -+ unsigned char inactiveFlag[2]; // 140-141: Unused at present -+ unsigned char information1[TAGINFO_LEN]; // 142-161: Unused at present -+ unsigned char information2[54]; // 162-215: Compilation and related information (not generated/used by OpenWRT) -+ unsigned char kernelCRC[4] ; // 216-219: CRC32 of images -+ unsigned char rootAddress[ADDRESS_LEN]; // 220-231: Address in memory of rootfs partition -+ unsigned char tagIdCRC[4]; // 232-235: Checksum to ensure validity of tagId -+ unsigned char headerCRC[4]; // 236-239: CRC32 of header excluding tagVersion -+ unsigned char rootLength[IMAGE_LEN]; // 240-249: Size of rootfs -+ unsigned char tagId[TAGID_LEN]; // 250-255: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced -+}; -+ -+struct bcm_tag_bc221 { -+ unsigned char tagVersion[TAGVER_LEN]; // 0-3: Version of the image tag -+ unsigned char sig_1[20]; // 4-23: Company Line 1 -+ unsigned char sig_2[14]; // 24-37: Company Line 2 -+ unsigned char chipid[6]; // 38-43: Chip this image is for -+ unsigned char boardid[16]; // 44-59: Board name -+ unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE -+ unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image -+ unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE -+ unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE -+ unsigned char flashImageStart[ADDRESS_LEN]; // 94-105: Address in memory of kernel (start of image) -+ unsigned char flashRootLength[IMAGE_LEN]; // 106-115: Size of rootfs + deadcode (web flash uses this + kernelLength to determine the size of the kernel+rootfs flash image) -+ unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel -+ unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel -+ unsigned char dualImage[2]; // 138-139: Unused at present -+ unsigned char inactiveFlag[2]; // 140-141: Unused at present -+ unsigned char rsa_signature[TAGINFO_LEN]; // 142-161: RSA Signature (unused at present; some vendors may use this) -+ unsigned char reserved5[2]; // 162-163: Unused at present -+ unsigned char tagId[TAGID_LEN]; // 164-169: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced -+ unsigned char rootAddress[ADDRESS_LEN]; // 170-181: Address in memory of rootfs partition -+ unsigned char rootLength[IMAGE_LEN]; // 182-191: Size of rootfs partition -+ unsigned char flashLayoutVer[4]; // 192-195: Version flash layout -+ unsigned char fskernelCRC[4]; // 196-199: Guessed to be kernel CRC -+ unsigned char reserved4[16]; // 200-215: Reserved area; unused at present -+ unsigned char imageCRC[4]; // 216-219: CRC32 of images -+ unsigned char reserved2[12]; // 220-231: Unused at present -+ unsigned char tagIdCRC[4]; // 232-235: CRC32 to ensure validity of tagId -+ unsigned char headerCRC[4]; // 236-239: CRC32 of header excluding tagVersion -+ unsigned char reserved3[16]; // 240-255: Unused at present -+}; -+ -+struct bcm_tag_bc310 { -+ unsigned char tagVersion[4]; // 0-3: Version of the image tag -+ unsigned char sig_1[20]; // 4-23: Company Line 1 -+ unsigned char sig_2[14]; // 24-37: Company Line 2 -+ unsigned char chipid[6]; // 38-43: Chip this image is for -+ unsigned char boardid[16]; // 44-59: Board name -+ unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE -+ unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image -+ unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE -+ unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE -+ unsigned char flashImageStart[ADDRESS_LEN]; // 94-105: Address in memory of kernel (start of image) -+ unsigned char flashRootLength[IMAGE_LEN]; // 106-115: Size of rootfs + deadcode (web flash uses this + kernelLength to determine the size of the kernel+rootfs flash image) -+ unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel -+ unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel -+ unsigned char dualImage[2]; // 138-139: Unused at present -+ unsigned char inactiveFlag[2]; // 140-141: Unused at present -+ unsigned char information1[TAGINFO_LEN]; // 142-161: Unused at present; Some vendors use this for optional information -+ unsigned char tagId[6]; // 162-167: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced -+ unsigned char tagIdCRC[4]; // 168-171: CRC32 to ensure validity of tagId -+ unsigned char rootAddress[ADDRESS_LEN]; // 172-183: Address in memory of rootfs partition -+ unsigned char rootLength[IMAGE_LEN]; // 184-193: Size of rootfs partition -+ unsigned char reserved1[22]; // 193-215: Reserved area not in use -+ unsigned char imageCRC[4]; // 216-219: CRC32 of images -+ unsigned char rootfsCRC[4]; // 220-227: CRC32 of rootfs partition -+ unsigned char kernelCRC[4]; // 224-227: CRC32 of kernel partition -+ unsigned char reserved2[8]; // 228-235: Unused at present -+ unsigned char headerCRC[4]; // 235-239: CRC32 of header excluding tagVersion -+ unsigned char reserved3[16]; // 240-255: Unused at present -+}; -+ -+union bcm_tag { -+ struct bcm_tag_bccfe bccfe; -+ struct bcm_tag_bc300 bc300; -+ struct bcm_tag_ag306 ag306; -+ struct bcm_tag_bc221 bc221; -+ struct bcm_tag_bc310 bc310; -+}; -+ -+#endif /* __BCM63XX_TAG_H */ --- a/arch/mips/bcm63xx/boards/board_bcm963xx.c +++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c @@ -721,20 +721,6 @@ static int board_get_mac_address(u8 *mac diff --git a/target/linux/brcm63xx/patches-2.6.33/220-board-D4PW.patch b/target/linux/brcm63xx/patches-2.6.33/220-board-D4PW.patch new file mode 100644 index 000000000..528b6fdb8 --- /dev/null +++ b/target/linux/brcm63xx/patches-2.6.33/220-board-D4PW.patch @@ -0,0 +1,60 @@ +--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c ++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c +@@ -467,6 +467,49 @@ + + .has_ohci0 = 1, + }; ++ ++static struct board_info __initdata board_96348_D4PW = { ++ .name = "D-4P-W", ++ .expected_cpu_id = 0x6348, ++ ++ .has_enet0 = 1, ++ .has_enet1 = 1, ++ .has_pci = 1, ++ ++ .enet0 = { ++ .has_phy = 1, ++ .use_internal_phy = 1, ++ }, ++ .enet1 = { ++ .force_speed_100 = 1, ++ .force_duplex_full = 1, ++ }, ++ ++ .has_ohci0 = 1, ++ .has_ehci0 = 1, ++ ++ .leds = { ++ { ++ .name = "ppp", ++ .gpio = 4, ++ .active_low = 1, ++ }, ++ { ++ .name = "ppp-fail", ++ .gpio = 5, ++ .active_low = 1, ++ }, ++ { ++ .name = "power", ++ .gpio = 0, ++ .active_low = 1, ++ .default_trigger = "default-on", ++ ++ }, ++ }, ++ ++}; ++ + #endif + + /* +@@ -692,6 +735,7 @@ + &board_DV201AMR, + &board_96348gw_a, + &board_rta1025w_16, ++ &board_96348_D4PW, + #endif + + #ifdef CONFIG_BCM63XX_CPU_6358 diff --git a/target/linux/cobalt/Makefile b/target/linux/cobalt/Makefile index 3ffa0cf81..d09117764 100644 --- a/target/linux/cobalt/Makefile +++ b/target/linux/cobalt/Makefile @@ -12,7 +12,7 @@ BOARDNAME:=Cobalt Microservers FEATURES:=tgz pci ext2 CFLAGS:=-O2 -pipe -mtune=r5000 -funit-at-a-time -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/cobalt/config-2.6.30 b/target/linux/cobalt/config-2.6.30 deleted file mode 100644 index 078d2ddf8..000000000 --- a/target/linux/cobalt/config-2.6.30 +++ /dev/null @@ -1,233 +0,0 @@ -# CONFIG_32BIT is not set -CONFIG_64BIT=y -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_POPULATES_NODE_MAP=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -# CONFIG_ARPD is not set -CONFIG_ATA=y -# CONFIG_BCM47XX is not set -# CONFIG_BINARY_PRINTF is not set -CONFIG_BINFMT_ELF32=y -CONFIG_BITREVERSE=y -# CONFIG_BLK_DEV_INITRD is not set -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_SD=y -CONFIG_BLOCK_COMPAT=y -# CONFIG_BRIDGE is not set -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set -# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set -CONFIG_CEVT_GT641XX=y -CONFIG_CEVT_R4K_LIB=y -CONFIG_CEVT_R4K=y -CONFIG_COMPAT_BRK=y -CONFIG_COMPAT=y -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_CAVIUM_OCTEON is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_LITTLE_ENDIAN=y -# CONFIG_CPU_LOONGSON2 is not set -# CONFIG_CPU_MIPS32_R1 is not set -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_NEVADA=y -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5500 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -CONFIG_CRC16=y -CONFIG_CSRC_R4K_LIB=y -CONFIG_CSRC_R4K=y -CONFIG_DE2104X=y -# CONFIG_DE4X5 is not set -# CONFIG_DEBUG_FS is not set -CONFIG_DEVKMEM=y -CONFIG_DEVPORT=y -# CONFIG_DM9000 is not set -# CONFIG_DM9102 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -CONFIG_DNOTIFY=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_EARLY_PRINTK=y -CONFIG_ELF_CORE=y -CONFIG_ENABLE_MUST_CHECK=y -CONFIG_FB_COBALT=y -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -CONFIG_FIRMWARE_IN_KERNEL=y -# CONFIG_FRAMEBUFFER_CONSOLE is not set -CONFIG_FS_POSIX_ACL=y -CONFIG_GENERIC_ACL=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -# CONFIG_HAMRADIO is not set -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_HAVE_IDE=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_SYSCALL_WRAPPERS=y -CONFIG_HID=m -CONFIG_HID_SUPPORT=y -# CONFIG_HIGH_RES_TIMERS is not set -CONFIG_HW_CONSOLE=y -CONFIG_HW_HAS_PCI=y -# CONFIG_HW_RANDOM is not set -# CONFIG_HZ_100 is not set -CONFIG_HZ=250 -CONFIG_HZ_250=y -CONFIG_I8253=y -CONFIG_I8259=y -CONFIG_INOTIFY_USER=y -CONFIG_INOTIFY=y -CONFIG_INPUT_COBALT_BTNS=y -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_POLLDEV=y -CONFIG_INPUT=y -# CONFIG_INPUT_YEALINK is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IP_MULTICAST is not set -CONFIG_IRQ_CPU=y -CONFIG_IRQ_GT641XX=y -# CONFIG_JFFS2_FS is not set -CONFIG_KEXEC=y -CONFIG_LEDS_COBALT_QUBE=y -CONFIG_LEDS_COBALT_RAQ=y -# CONFIG_LEDS_TRIGGER_DEFAULT_ON is not set -# CONFIG_LEDS_TRIGGER_HEARTBEAT is not set -# CONFIG_LEDS_TRIGGER_TIMER is not set -CONFIG_LEGACY_PTY_COUNT=256 -CONFIG_LEGACY_PTYS=y -# CONFIG_LEMOTE_FULONG is not set -# CONFIG_LOGO is not set -# CONFIG_MACH_ALCHEMY is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MACH_VR41XX is not set -# CONFIG_MII is not set -# CONFIG_MIKROTIK_RB532 is not set -CONFIG_MIPS32_COMPAT=y -CONFIG_MIPS32_N32=y -CONFIG_MIPS32_O32=y -CONFIG_MIPS_COBALT=y -CONFIG_MIPS_L1_CACHE_SHIFT=5 -# CONFIG_MIPS_MACHINE is not set -# CONFIG_MIPS_MALTA is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_SIM is not set -CONFIG_MIPS=y -# CONFIG_MISC_DEVICES is not set -# CONFIG_MTD_BLOCK is not set -# CONFIG_MTD_BLOCK_RO is not set -# CONFIG_MTD_CFI_INTELEXT is not set -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_JEDECPROBE=y -CONFIG_MTD_PHYSMAP=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NET_PCI is not set -CONFIG_NET_TULIP=y -# CONFIG_NO_IOPORT is not set -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set -# CONFIG_PACKET_MMAP is not set -CONFIG_PAGEFLAGS_EXTENDED=y -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_PATA_VIA=y -CONFIG_PCI=y -CONFIG_PCI_DISABLE_COMMON_QUIRKS=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCI_GT64XXX_PCI0=y -CONFIG_PCI_LEGACY=y -CONFIG_PCSPKR_PLATFORM=y -CONFIG_PHYS_ADDR_T_64BIT=y -# CONFIG_PMC_MSP is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_RAID_ATTRS=y -CONFIG_RELAY=y -CONFIG_RTC_CLASS=y -CONFIG_RTC_INTF_DEV_UIE_EMUL=y -CONFIG_SATA_PMP=y -CONFIG_SCHED_OMIT_FRAME_POINTER=y -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_MULTI_LUN is not set -CONFIG_SCSI=y -CONFIG_SECCOMP=y -# CONFIG_SERIAL_8250_EXTENDED is not set -CONFIG_SERIAL_8250_NR_UARTS=4 -CONFIG_SERIAL_8250_RUNTIME_UARTS=4 -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SLAB is not set -# CONFIG_SLOW_WORK is not set -CONFIG_SLUB=y -CONFIG_SYS_HAS_CPU_NEVADA=y -CONFIG_SYS_HAS_EARLY_PRINTK=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -CONFIG_SYSVIPC_COMPAT=y -CONFIG_TMPFS_POSIX_ACL=y -CONFIG_TRACING_SUPPORT=y -CONFIG_TULIP_MMIO=y -CONFIG_TULIP_MWI=y -CONFIG_TULIP_NAPI_HW_MITIGATION=y -CONFIG_TULIP_NAPI=y -CONFIG_TULIP=y -# CONFIG_ULI526X is not set -CONFIG_USB_SUPPORT=y -# CONFIG_VGA_CONSOLE is not set -# CONFIG_VLAN_8021Q is not set -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_VT_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_VT=y -# CONFIG_WATCHDOG is not set -# CONFIG_WINBOND_840 is not set -# CONFIG_WLAN_80211 is not set -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/cobalt/patches-2.6.30/001-no_module_reloc.patch b/target/linux/cobalt/patches-2.6.30/001-no_module_reloc.patch deleted file mode 100644 index 449bda756..000000000 --- a/target/linux/cobalt/patches-2.6.30/001-no_module_reloc.patch +++ /dev/null @@ -1,372 +0,0 @@ -diff -urN linux-2.6.30.10/arch/mips/Makefile linux-2.6.30.10.new//arch/mips/Makefile ---- linux-2.6.30.10/arch/mips/Makefile 2010-01-29 16:12:01.000000000 +0100 -+++ linux-2.6.30.10.new//arch/mips/Makefile 2009-12-04 07:00:07.000000000 +0100 -@@ -83,7 +83,7 @@ - cflags-y += -G 0 -mno-abicalls -fno-pic -pipe - cflags-y += -msoft-float - LDFLAGS_vmlinux += -G 0 -static -n -nostdlib --MODFLAGS += -mno-long-calls -+MODFLAGS += -mlong-calls - - cflags-y += -ffreestanding - -diff -urN linux-2.6.30.10/arch/mips/include/asm/module.h linux-2.6.30.10.new//arch/mips/include/asm/module.h ---- linux-2.6.30.10/arch/mips/include/asm/module.h 2010-01-29 16:12:01.000000000 +0100 -+++ linux-2.6.30.10.new//arch/mips/include/asm/module.h 2009-12-04 07:00:07.000000000 +0100 -@@ -9,11 +9,6 @@ - struct list_head dbe_list; - const struct exception_table_entry *dbe_start; - const struct exception_table_entry *dbe_end; -- -- void *phys_plt_tbl; -- void *virt_plt_tbl; -- unsigned int phys_plt_offset; -- unsigned int virt_plt_offset; - }; - - typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */ -diff -urN linux-2.6.30.10/arch/mips/kernel/module.c linux-2.6.30.10.new//arch/mips/kernel/module.c ---- linux-2.6.30.10/arch/mips/kernel/module.c 2010-01-29 16:12:01.000000000 +0100 -+++ linux-2.6.30.10.new//arch/mips/kernel/module.c 2009-12-04 07:00:07.000000000 +0100 -@@ -43,116 +43,6 @@ - static LIST_HEAD(dbe_list); - static DEFINE_SPINLOCK(dbe_lock); - --/* -- * Get the potential max trampolines size required of the init and -- * non-init sections. Only used if we cannot find enough contiguous -- * physically mapped memory to put the module into. -- */ --static unsigned int --get_plt_size(const Elf_Ehdr *hdr, const Elf_Shdr *sechdrs, -- const char *secstrings, unsigned int symindex, bool is_init) --{ -- unsigned long ret = 0; -- unsigned int i, j; -- Elf_Sym *syms; -- -- /* Everything marked ALLOC (this includes the exported symbols) */ -- for (i = 1; i < hdr->e_shnum; ++i) { -- unsigned int info = sechdrs[i].sh_info; -- -- if (sechdrs[i].sh_type != SHT_REL -- && sechdrs[i].sh_type != SHT_RELA) -- continue; -- -- /* Not a valid relocation section? */ -- if (info >= hdr->e_shnum) -- continue; -- -- /* Don't bother with non-allocated sections */ -- if (!(sechdrs[info].sh_flags & SHF_ALLOC)) -- continue; -- -- /* If it's called *.init*, and we're not init, we're -- not interested */ -- if ((strstr(secstrings + sechdrs[i].sh_name, ".init") != 0) -- != is_init) -- continue; -- -- syms = (Elf_Sym *) sechdrs[symindex].sh_addr; -- if (sechdrs[i].sh_type == SHT_REL) { -- Elf_Mips_Rel *rel = (void *) sechdrs[i].sh_addr; -- unsigned int size = sechdrs[i].sh_size / sizeof(*rel); -- -- for (j = 0; j < size; ++j) { -- Elf_Sym *sym; -- -- if (ELF_MIPS_R_TYPE(rel[j]) != R_MIPS_26) -- continue; -- -- sym = syms + ELF_MIPS_R_SYM(rel[j]); -- if (!is_init && sym->st_shndx != SHN_UNDEF) -- continue; -- -- ret += 4 * sizeof(int); -- } -- } else { -- Elf_Mips_Rela *rela = (void *) sechdrs[i].sh_addr; -- unsigned int size = sechdrs[i].sh_size / sizeof(*rela); -- -- for (j = 0; j < size; ++j) { -- Elf_Sym *sym; -- -- if (ELF_MIPS_R_TYPE(rela[j]) != R_MIPS_26) -- continue; -- -- sym = syms + ELF_MIPS_R_SYM(rela[j]); -- if (!is_init && sym->st_shndx != SHN_UNDEF) -- continue; -- -- ret += 4 * sizeof(int); -- } -- } -- } -- -- return ret; --} -- --#ifndef MODULE_START --static void *alloc_phys(unsigned long size) --{ -- unsigned order; -- struct page *page; -- struct page *p; -- -- size = PAGE_ALIGN(size); -- order = get_order(size); -- -- page = alloc_pages(GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN | -- __GFP_THISNODE, order); -- if (!page) -- return NULL; -- -- split_page(page, order); -- -- for (p = page + (size >> PAGE_SHIFT); p < page + (1 << order); ++p) -- __free_page(p); -- -- return page_address(page); --} --#endif -- --static void free_phys(void *ptr, unsigned long size) --{ -- struct page *page; -- struct page *end; -- -- page = virt_to_page(ptr); -- end = page + (PAGE_ALIGN(size) >> PAGE_SHIFT); -- -- for (; page < end; ++page) -- __free_page(page); --} -- - void *module_alloc(unsigned long size) - { - #ifdef MODULE_START -@@ -168,101 +58,23 @@ - - return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL); - #else -- void *ptr; -- - if (size == 0) - return NULL; -- -- ptr = alloc_phys(size); -- -- /* If we failed to allocate physically contiguous memory, -- * fall back to regular vmalloc. The module loader code will -- * create jump tables to handle long jumps */ -- if (!ptr) -- return vmalloc(size); -- -- return ptr; --#endif --} -- --static inline bool is_phys_addr(void *ptr) --{ --#ifdef CONFIG_64BIT -- return (KSEGX((unsigned long)ptr) == CKSEG0); --#else -- return (KSEGX(ptr) == KSEG0); -+ return vmalloc(size); - #endif - } - - /* Free memory returned from module_alloc */ - void module_free(struct module *mod, void *module_region) - { -- if (is_phys_addr(module_region)) { -- if (mod->module_init == module_region) -- free_phys(module_region, mod->init_size); -- else if (mod->module_core == module_region) -- free_phys(module_region, mod->core_size); -- else -- BUG(); -- } else { -- vfree(module_region); -- } -+ vfree(module_region); - /* FIXME: If module_region == mod->init_region, trim exception - table entries. */ - } - --static void *__module_alloc(int size, bool phys) --{ -- void *ptr; -- -- if (phys) -- ptr = kmalloc(size, GFP_KERNEL); -- else -- ptr = vmalloc(size); -- return ptr; --} -- --static void __module_free(void *ptr) --{ -- if (is_phys_addr(ptr)) -- kfree(ptr); -- else -- vfree(ptr); --} -- - int module_frob_arch_sections(Elf_Ehdr *hdr, Elf_Shdr *sechdrs, - char *secstrings, struct module *mod) - { -- unsigned int symindex = 0; -- unsigned int core_size, init_size; -- int i; -- -- for (i = 1; i < hdr->e_shnum; i++) -- if (sechdrs[i].sh_type == SHT_SYMTAB) -- symindex = i; -- -- core_size = get_plt_size(hdr, sechdrs, secstrings, symindex, false); -- init_size = get_plt_size(hdr, sechdrs, secstrings, symindex, true); -- -- mod->arch.phys_plt_offset = 0; -- mod->arch.virt_plt_offset = 0; -- mod->arch.phys_plt_tbl = NULL; -- mod->arch.virt_plt_tbl = NULL; -- -- if ((core_size + init_size) == 0) -- return 0; -- -- mod->arch.phys_plt_tbl = __module_alloc(core_size + init_size, 1); -- if (!mod->arch.phys_plt_tbl) -- return -ENOMEM; -- -- mod->arch.virt_plt_tbl = __module_alloc(core_size + init_size, 0); -- if (!mod->arch.virt_plt_tbl) { -- __module_free(mod->arch.phys_plt_tbl); -- mod->arch.phys_plt_tbl = NULL; -- return -ENOMEM; -- } -- - return 0; - } - -@@ -285,37 +97,27 @@ - return 0; - } - --static Elf_Addr add_plt_entry_to(unsigned *plt_offset, -- void *start, Elf_Addr v) -+static int apply_r_mips_26_rel(struct module *me, u32 *location, Elf_Addr v) - { -- unsigned *tramp = start + *plt_offset; -- -- *plt_offset += 4 * sizeof(int); -- -- /* adjust carry for addiu */ -- if (v & 0x00008000) -- v += 0x10000; -- -- tramp[0] = 0x3c190000 | (v >> 16); /* lui t9, hi16 */ -- tramp[1] = 0x27390000 | (v & 0xffff); /* addiu t9, t9, lo16 */ -- tramp[2] = 0x03200008; /* jr t9 */ -- tramp[3] = 0x00000000; /* nop */ -+ if (v % 4) { -+ printk(KERN_ERR "module %s: dangerous relocation\n", me->name); -+ return -ENOEXEC; -+ } - -- return (Elf_Addr) tramp; --} -+ if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) { -+ printk(KERN_ERR -+ "module %s: relocation overflow\n", -+ me->name); -+ return -ENOEXEC; -+ } - --static Elf_Addr add_plt_entry(struct module *me, void *location, Elf_Addr v) --{ -- if (is_phys_addr(location)) -- return add_plt_entry_to(&me->arch.phys_plt_offset, -- me->arch.phys_plt_tbl, v); -- else -- return add_plt_entry_to(&me->arch.virt_plt_offset, -- me->arch.virt_plt_tbl, v); -+ *location = (*location & ~0x03ffffff) | -+ ((*location + (v >> 2)) & 0x03ffffff); - -+ return 0; - } - --static int set_r_mips_26(struct module *me, u32 *location, u32 ofs, Elf_Addr v) -+static int apply_r_mips_26_rela(struct module *me, u32 *location, Elf_Addr v) - { - if (v % 4) { - printk(KERN_ERR "module %s: dangerous relocation\n", me->name); -@@ -323,31 +125,17 @@ - } - - if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) { -- v = add_plt_entry(me, location, v + (ofs << 2)); -- if (!v) { -- printk(KERN_ERR -+ printk(KERN_ERR - "module %s: relocation overflow\n", - me->name); -- return -ENOEXEC; -- } -- ofs = 0; -+ return -ENOEXEC; - } - -- *location = (*location & ~0x03ffffff) | ((ofs + (v >> 2)) & 0x03ffffff); -+ *location = (*location & ~0x03ffffff) | ((v >> 2) & 0x03ffffff); - - return 0; - } - --static int apply_r_mips_26_rel(struct module *me, u32 *location, Elf_Addr v) --{ -- return set_r_mips_26(me, location, *location & 0x03ffffff, v); --} -- --static int apply_r_mips_26_rela(struct module *me, u32 *location, Elf_Addr v) --{ -- return set_r_mips_26(me, location, 0, v); --} -- - static int apply_r_mips_hi16_rel(struct module *me, u32 *location, Elf_Addr v) - { - struct mips_hi16 *n; -@@ -612,32 +400,11 @@ - list_add(&me->arch.dbe_list, &dbe_list); - spin_unlock_irq(&dbe_lock); - } -- -- /* Get rid of the fixup trampoline if we're running the module -- * from physically mapped address space */ -- if (me->arch.phys_plt_offset == 0) { -- __module_free(me->arch.phys_plt_tbl); -- me->arch.phys_plt_tbl = NULL; -- } -- if (me->arch.virt_plt_offset == 0) { -- __module_free(me->arch.virt_plt_tbl); -- me->arch.virt_plt_tbl = NULL; -- } -- - return 0; - } - - void module_arch_cleanup(struct module *mod) - { -- if (mod->arch.phys_plt_tbl) { -- __module_free(mod->arch.phys_plt_tbl); -- mod->arch.phys_plt_tbl = NULL; -- } -- if (mod->arch.virt_plt_tbl) { -- __module_free(mod->arch.virt_plt_tbl); -- mod->arch.virt_plt_tbl = NULL; -- } -- - spin_lock_irq(&dbe_lock); - list_del(&mod->arch.dbe_list); - spin_unlock_irq(&dbe_lock); diff --git a/target/linux/cobalt/patches-2.6.32/001-no_module_reloc.patch b/target/linux/cobalt/patches-2.6.32/001-no_module_reloc.patch index d871dd137..3b1f12427 100644 --- a/target/linux/cobalt/patches-2.6.32/001-no_module_reloc.patch +++ b/target/linux/cobalt/patches-2.6.32/001-no_module_reloc.patch @@ -1,7 +1,6 @@ -diff -urN linux-2.6.32.7/arch/mips/Makefile linux-2.6.32.7.new/arch/mips/Makefile ---- linux-2.6.32.7/arch/mips/Makefile 2010-02-01 18:06:35.000000000 +0100 -+++ linux-2.6.32.7.new/arch/mips/Makefile 2010-01-29 00:06:20.000000000 +0100 -@@ -83,7 +83,7 @@ +--- a/arch/mips/Makefile ++++ b/arch/mips/Makefile +@@ -85,7 +85,7 @@ all-$(CONFIG_BOOT_ELF64) := $(vmlinux-64 cflags-y += -G 0 -mno-abicalls -fno-pic -pipe cflags-y += -msoft-float LDFLAGS_vmlinux += -G 0 -static -n -nostdlib @@ -10,10 +9,9 @@ diff -urN linux-2.6.32.7/arch/mips/Makefile linux-2.6.32.7.new/arch/mips/Makefil cflags-y += -ffreestanding -diff -urN linux-2.6.32.7/arch/mips/include/asm/module.h linux-2.6.32.7.new/arch/mips/include/asm/module.h ---- linux-2.6.32.7/arch/mips/include/asm/module.h 2010-02-01 18:06:35.000000000 +0100 -+++ linux-2.6.32.7.new/arch/mips/include/asm/module.h 2010-01-29 00:06:20.000000000 +0100 -@@ -9,11 +9,6 @@ +--- a/arch/mips/include/asm/module.h ++++ b/arch/mips/include/asm/module.h +@@ -9,11 +9,6 @@ struct mod_arch_specific { struct list_head dbe_list; const struct exception_table_entry *dbe_start; const struct exception_table_entry *dbe_end; @@ -25,10 +23,9 @@ diff -urN linux-2.6.32.7/arch/mips/include/asm/module.h linux-2.6.32.7.new/arch/ }; typedef uint8_t Elf64_Byte; /* Type for a 8-bit quantity. */ -diff -urN linux-2.6.32.7/arch/mips/kernel/module.c linux-2.6.32.7.new/arch/mips/kernel/module.c ---- linux-2.6.32.7/arch/mips/kernel/module.c 2010-02-01 18:06:35.000000000 +0100 -+++ linux-2.6.32.7.new/arch/mips/kernel/module.c 2010-01-29 00:06:20.000000000 +0100 -@@ -43,117 +43,6 @@ +--- a/arch/mips/kernel/module.c ++++ b/arch/mips/kernel/module.c +@@ -43,117 +43,6 @@ static struct mips_hi16 *mips_hi16_list; static LIST_HEAD(dbe_list); static DEFINE_SPINLOCK(dbe_lock); @@ -146,7 +143,7 @@ diff -urN linux-2.6.32.7/arch/mips/kernel/module.c linux-2.6.32.7.new/arch/mips/ void *module_alloc(unsigned long size) { #ifdef MODULE_START -@@ -169,99 +58,21 @@ +@@ -169,99 +58,21 @@ void *module_alloc(unsigned long size) return __vmalloc_area(area, GFP_KERNEL, PAGE_KERNEL); #else @@ -248,7 +245,7 @@ diff -urN linux-2.6.32.7/arch/mips/kernel/module.c linux-2.6.32.7.new/arch/mips/ return 0; } -@@ -284,36 +95,28 @@ +@@ -284,36 +95,28 @@ static int apply_r_mips_32_rela(struct m return 0; } @@ -301,7 +298,7 @@ diff -urN linux-2.6.32.7/arch/mips/kernel/module.c linux-2.6.32.7.new/arch/mips/ { if (v % 4) { pr_err("module %s: dangerous R_MIPS_26 RELArelocation\n", -@@ -322,31 +125,17 @@ +@@ -322,31 +125,17 @@ static int set_r_mips_26(struct module * } if ((v & 0xf0000000) != (((unsigned long)location + 4) & 0xf0000000)) { @@ -336,7 +333,7 @@ diff -urN linux-2.6.32.7/arch/mips/kernel/module.c linux-2.6.32.7.new/arch/mips/ static int apply_r_mips_hi16_rel(struct module *me, u32 *location, Elf_Addr v) { struct mips_hi16 *n; -@@ -611,32 +400,11 @@ +@@ -611,32 +400,11 @@ int module_finalize(const Elf_Ehdr *hdr, list_add(&me->arch.dbe_list, &dbe_list); spin_unlock_irq(&dbe_lock); } diff --git a/target/linux/etrax/Makefile b/target/linux/etrax/Makefile index fd4615e66..875034cb6 100644 --- a/target/linux/etrax/Makefile +++ b/target/linux/etrax/Makefile @@ -10,7 +10,7 @@ ARCH:=cris BOARD:=etrax BOARDNAME:=Foxboard (ETRAX 100LX) FEATURES:=squashfs jffs2 -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 DEVICE_TYPE= include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/etrax/patches-2.6.32/100-cris-makefiles.patch b/target/linux/etrax/patches-2.6.32/100-cris-makefiles.patch index f837ff58f..fbcb7fa05 100644 --- a/target/linux/etrax/patches-2.6.32/100-cris-makefiles.patch +++ b/target/linux/etrax/patches-2.6.32/100-cris-makefiles.patch @@ -49,5 +49,5 @@ -OBJCOPYFLAGS := -O binary -R .note -R .comment -S +OBJCOPYFLAGS := -O binary -R .bss -R .note -R .note.gnu.build-id -R .comment -S - CPPFLAGS_vmlinux.lds = -DDRAM_VIRTUAL_BASE=0x$(CONFIG_ETRAX_DRAM_VIRTUAL_BASE) - + KBUILD_AFLAGS += -mlinux -march=$(arch-y) $(inc) + KBUILD_CFLAGS += -mlinux -march=$(arch-y) -pipe $(inc) diff --git a/target/linux/etrax/patches-2.6.32/200-samsung_flash.patch b/target/linux/etrax/patches-2.6.32/200-samsung_flash.patch index 4176ec395..eab03db50 100644 --- a/target/linux/etrax/patches-2.6.32/200-samsung_flash.patch +++ b/target/linux/etrax/patches-2.6.32/200-samsung_flash.patch @@ -1,6 +1,6 @@ --- a/drivers/mtd/chips/cfi_cmdset_0002.c +++ b/drivers/mtd/chips/cfi_cmdset_0002.c -@@ -385,7 +385,7 @@ struct mtd_info *cfi_cmdset_0002(struct +@@ -374,7 +374,7 @@ struct mtd_info *cfi_cmdset_0002(struct cfi_fixup_major_minor(cfi, extp); diff --git a/target/linux/etrax/patches-2.6.32/300-usb_support.patch b/target/linux/etrax/patches-2.6.32/300-usb_support.patch index 7b2972656..0a0f81f98 100644 --- a/target/linux/etrax/patches-2.6.32/300-usb_support.patch +++ b/target/linux/etrax/patches-2.6.32/300-usb_support.patch @@ -1,7 +1,7 @@ --- a/drivers/usb/host/Makefile +++ b/drivers/usb/host/Makefile -@@ -25,6 +25,7 @@ obj-$(CONFIG_USB_UHCI_HCD) += uhci-hcd.o - obj-$(CONFIG_USB_FHCI_HCD) += fhci.o +@@ -28,6 +28,7 @@ obj-$(CONFIG_USB_FHCI_HCD) += fhci.o + obj-$(CONFIG_USB_XHCI_HCD) += xhci.o obj-$(CONFIG_USB_SL811_HCD) += sl811-hcd.o obj-$(CONFIG_USB_SL811_CS) += sl811_cs.o +obj-$(CONFIG_ETRAX_USB_HOST) += hc-crisv10.o @@ -10,7 +10,7 @@ obj-$(CONFIG_USB_ISP1760_HCD) += isp1760.o --- a/drivers/usb/Makefile +++ b/drivers/usb/Makefile -@@ -19,6 +19,7 @@ obj-$(CONFIG_USB_U132_HCD) += host/ +@@ -21,6 +21,7 @@ obj-$(CONFIG_USB_U132_HCD) += host/ obj-$(CONFIG_USB_R8A66597_HCD) += host/ obj-$(CONFIG_USB_HWA_HCD) += host/ obj-$(CONFIG_USB_ISP1760_HCD) += host/ diff --git a/target/linux/etrax/patches-2.6.32/600-create-device-serial.patch b/target/linux/etrax/patches-2.6.32/600-create-device-serial.patch index 516b98471..58817e0de 100644 --- a/target/linux/etrax/patches-2.6.32/600-create-device-serial.patch +++ b/target/linux/etrax/patches-2.6.32/600-create-device-serial.patch @@ -1,6 +1,6 @@ --- a/drivers/serial/crisv10.c +++ b/drivers/serial/crisv10.c -@@ -31,6 +31,7 @@ static char *serial_version = "$Revision +@@ -32,6 +32,7 @@ static char *serial_version = "$Revision #include #include #include @@ -8,7 +8,7 @@ #include #include -@@ -4414,6 +4415,8 @@ static const struct tty_operations rs_op +@@ -4415,6 +4416,8 @@ static const struct tty_operations rs_op #endif }; @@ -17,7 +17,7 @@ static int __init rs_init(void) { int i; -@@ -4547,6 +4550,24 @@ static int __init rs_init(void) +@@ -4548,6 +4551,24 @@ static int __init rs_init(void) #endif #endif /* CONFIG_SVINTO_SIM */ diff --git a/target/linux/gemini/Makefile b/target/linux/gemini/Makefile index 1fdbc5253..0b1d8896a 100644 --- a/target/linux/gemini/Makefile +++ b/target/linux/gemini/Makefile @@ -12,7 +12,7 @@ BOARDNAME:=Cortina Systems CS351x FEATURES:=squashfs CFLAGS:=-Os -pipe -march=armv4 -mtune=arm9tdmi -funit-at-a-time -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/generic-2.4/patches/629-netlink_types_h.patch b/target/linux/generic-2.4/patches/629-netlink_types_h.patch new file mode 100644 index 000000000..8347d170b --- /dev/null +++ b/target/linux/generic-2.4/patches/629-netlink_types_h.patch @@ -0,0 +1,11 @@ +--- a/include/linux/netlink.h ++++ b/include/linux/netlink.h +@@ -1,6 +1,8 @@ + #ifndef __LINUX_NETLINK_H + #define __LINUX_NETLINK_H + ++#include ++ + #define NETLINK_ROUTE 0 /* Routing/device hook */ + #define NETLINK_SKIP 1 /* Reserved for ENskip */ + #define NETLINK_USERSOCK 2 /* Reserved for user mode socket protocols */ diff --git a/target/linux/generic-2.6/config-2.6.30 b/target/linux/generic-2.6/config-2.6.30 index 1cbb6abca..0ae82935c 100644 --- a/target/linux/generic-2.6/config-2.6.30 +++ b/target/linux/generic-2.6/config-2.6.30 @@ -2268,6 +2268,7 @@ CONFIG_TRACE_IRQFLAGS_SUPPORT=y # CONFIG_TUNER_TEA5761 is not set # CONFIG_TUN is not set # CONFIG_TWL4030_CORE is not set +# CONFIG_UCB1400_CORE is not set # CONFIG_UDF_FS is not set CONFIG_UDF_NLS=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" diff --git a/target/linux/generic-2.6/config-2.6.31 b/target/linux/generic-2.6/config-2.6.31 index f42f7d668..585f2a506 100644 --- a/target/linux/generic-2.6/config-2.6.31 +++ b/target/linux/generic-2.6/config-2.6.31 @@ -2280,6 +2280,7 @@ CONFIG_TRACING_SUPPORT=y # CONFIG_TUN is not set # CONFIG_TWL4030_CORE is not set # CONFIG_UACCESS_WITH_MEMCPY is not set +# CONFIG_UCB1400_CORE is not set # CONFIG_UDF_FS is not set CONFIG_UDF_NLS=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" diff --git a/target/linux/generic-2.6/config-2.6.32 b/target/linux/generic-2.6/config-2.6.32 index 3fdf530a9..a9c4bfb82 100644 --- a/target/linux/generic-2.6/config-2.6.32 +++ b/target/linux/generic-2.6/config-2.6.32 @@ -655,6 +655,7 @@ CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_TIME=y +# CONFIG_GIGASET_CAPI is not set # CONFIG_GIGASET_DEBUG is not set # CONFIG_GFS2_FS is not set # CONFIG_GPIO_BT8XX is not set @@ -2391,6 +2392,7 @@ CONFIG_TRACING_SUPPORT=y # CONFIG_TUN is not set # CONFIG_TWL4030_CORE is not set # CONFIG_UACCESS_WITH_MEMCPY is not set +# CONFIG_UCB1400_CORE is not set # CONFIG_UDF_FS is not set CONFIG_UDF_NLS=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" diff --git a/target/linux/generic-2.6/config-2.6.33 b/target/linux/generic-2.6/config-2.6.33 index 80fdf4c26..e154e922f 100644 --- a/target/linux/generic-2.6/config-2.6.33 +++ b/target/linux/generic-2.6/config-2.6.33 @@ -661,6 +661,7 @@ CONFIG_GENERIC_HARDIRQS=y CONFIG_GENERIC_HWEIGHT=y CONFIG_GENERIC_IRQ_PROBE=y CONFIG_GENERIC_TIME=y +# CONFIG_GIGASET_CAPI is not set # CONFIG_GIGASET_DEBUG is not set # CONFIG_GFS2_FS is not set # CONFIG_GPIO_ADP5588 is not set @@ -2417,6 +2418,7 @@ CONFIG_TRACING_SUPPORT=y # CONFIG_TUN is not set # CONFIG_TWL4030_CORE is not set # CONFIG_UACCESS_WITH_MEMCPY is not set +# CONFIG_UCB1400_CORE is not set # CONFIG_UDF_FS is not set CONFIG_UDF_NLS=y CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" diff --git a/target/linux/generic-2.6/files/drivers/net/phy/ip175c.c b/target/linux/generic-2.6/files/drivers/net/phy/ip175c.c index b780f8656..1e83477bc 100644 --- a/target/linux/generic-2.6/files/drivers/net/phy/ip175c.c +++ b/target/linux/generic-2.6/files/drivers/net/phy/ip175c.c @@ -195,20 +195,23 @@ static const struct register_mappings IP175A = { .ADD_TAG_REG = {0,23}, .REMOVE_TAG_REG = {0,23}, - .ADD_TAG_BIT = {11,12,13,14,15,1,-1,-1,-1}, - .REMOVE_TAG_BIT = {6,7,8,9,10,0,-1,-1,-1}, + .ADD_TAG_BIT = {11,12,13,14,15,-1,-1,-1,-1}, + .REMOVE_TAG_BIT = {6,7,8,9,10,-1,-1,-1,-1}, - .SIMPLE_VLAN_REGISTERS = 1, + .SIMPLE_VLAN_REGISTERS = 0, - // Only programmable via. EEPROM - .VLAN_LOOKUP_REG = NOTSUPPORTED,// +N/2 + // Register 19-21 documentation is missing/contradictory. + // For registers 19-21 ports need to be: even numbers to MSB, odd to LSB. + // This contradicts text for ROM registers, but follows logic of CoS bits. + + .VLAN_LOOKUP_REG = {0,19},// +N/2 .VLAN_LOOKUP_REG_5 = NOTSUPPORTED, - .VLAN_LOOKUP_EVEN_BIT = {8,9,10,11,12,15,-1,-1,-1}, - .VLAN_LOOKUP_ODD_BIT = {0,1,2,3,4,7,-1,-1,-1}, + .VLAN_LOOKUP_EVEN_BIT = {8,9,10,11,12,-1,-1,-1,-1}, + .VLAN_LOOKUP_ODD_BIT = {0,1,2,3,4,-1,-1,-1,-1}, - .TAG_VLAN_MASK_REG = NOTSUPPORTED, // +N/2 - .TAG_VLAN_MASK_EVEN_BIT = {0,1,2,3,4,5,-1,-1,-1}, - .TAG_VLAN_MASK_ODD_BIT = {8,9,10,11,12,13,-1,-1,-1}, + .TAG_VLAN_MASK_REG = NOTSUPPORTED, // +N/2, + .TAG_VLAN_MASK_EVEN_BIT = {-1,-1,-1,-1,-1,-1,-1,-1,-1}, + .TAG_VLAN_MASK_ODD_BIT = {-1,-1,-1,-1,-1,-1,-1,-1,-1}, .RESET_VAL = -1, .RESET_REG = NOTSUPPORTED, @@ -222,13 +225,14 @@ static const struct register_mappings IP175A = { .NUMLAN_GROUPS_MAX = -1, .NUMLAN_GROUPS_BIT = -1, // {0-2} - .NUM_PORTS = 6, - .CPU_PORT = 5, + .NUM_PORTS = 5, + .CPU_PORT = 4, - .MII_REGISTER_EN = {0, 12}, + .MII_REGISTER_EN = {0, 18}, .MII_REGISTER_EN_BIT = 7, }; + struct ip175c_state { struct switch_dev dev; struct mii_bus *mii_bus; @@ -435,7 +439,7 @@ static int get_state(struct ip175c_state *state) if (state->vlan_enabled == -1) { // not sure how to get this... - state->vlan_enabled = (!state->remove_tag && !state->add_tag); + state->vlan_enabled = (state->remove_tag || state->add_tag); } if (REG_SUPP(state->regs->VLAN_LOOKUP_REG)) { @@ -829,12 +833,14 @@ static int ip175c_reset(struct switch_dev *dev) err = getPhy(state, state->regs->MODE_REG); } - /* reset switch ports */ - for (i = 0; i < 5; i++) { - err = state->mii_bus->write(state->mii_bus, i, - MII_BMCR, BMCR_RESET); - if (err < 0) - return err; + if (REG_SUPP(state->regs->RESET_REG)) { + /* reset external phy ports, except on IP175A */ + for (i = 0; i < state->regs->NUM_PORTS-1; i++) { + err = state->mii_bus->write(state->mii_bus, i, + MII_BMCR, BMCR_RESET); + if (err < 0) + return err; + } } return 0; @@ -1300,15 +1306,35 @@ static struct phy_driver ip175c_driver = { .driver = { .owner = THIS_MODULE }, }; +static struct phy_driver ip175a_driver = { + .name = "IC+ IP175A", + .phy_id = 0x02430c50, + .phy_id_mask = 0x0ffffff0, + .features = PHY_BASIC_FEATURES, + .probe = ip175c_probe, + .remove = ip175c_remove, + .config_init = ip175c_config_init, + .config_aneg = ip175c_config_aneg, + .read_status = ip175c_read_status, + .driver = { .owner = THIS_MODULE }, +}; + int __init ip175c_init(void) { + int ret; + + ret = phy_driver_register(&ip175a_driver); + if (ret < 0) + return ret; + return phy_driver_register(&ip175c_driver); } void __exit ip175c_exit(void) { phy_driver_unregister(&ip175c_driver); + phy_driver_unregister(&ip175a_driver); } MODULE_AUTHOR("Patrick Horn "); diff --git a/target/linux/generic-2.6/patches-2.6.30/110-netfilter_match_speedup.patch b/target/linux/generic-2.6/patches-2.6.30/110-netfilter_match_speedup.patch index 950a43295..926966ced 100644 --- a/target/linux/generic-2.6/patches-2.6.30/110-netfilter_match_speedup.patch +++ b/target/linux/generic-2.6/patches-2.6.30/110-netfilter_match_speedup.patch @@ -119,3 +119,26 @@ /* For return from builtin chain */ back = get_entry(table_base, private->underflow[hook]); +@@ -976,6 +1015,7 @@ copy_entries_to_user(unsigned int total_ + unsigned int i; + const struct ipt_entry_match *m; + const struct ipt_entry_target *t; ++ u8 flags; + + e = (struct ipt_entry *)(loc_cpu_entry + off); + if (copy_to_user(userptr + off +@@ -986,6 +1026,14 @@ copy_entries_to_user(unsigned int total_ + goto free_counters; + } + ++ flags = e->ip.flags & ~IPT_F_NO_DEF_MATCH; ++ if (copy_to_user(userptr + off ++ + offsetof(struct ipt_entry, ip.flags), ++ &flags, sizeof(flags)) != 0) { ++ ret = -EFAULT; ++ goto free_counters; ++ } ++ + for (i = sizeof(struct ipt_entry); + i < e->target_offset; + i += m->u.match_size) { diff --git a/target/linux/generic-2.6/patches-2.6.31/110-netfilter_match_speedup.patch b/target/linux/generic-2.6/patches-2.6.31/110-netfilter_match_speedup.patch index 3dd114522..d6c113aa3 100644 --- a/target/linux/generic-2.6/patches-2.6.31/110-netfilter_match_speedup.patch +++ b/target/linux/generic-2.6/patches-2.6.31/110-netfilter_match_speedup.patch @@ -119,3 +119,26 @@ /* For return from builtin chain */ back = get_entry(table_base, private->underflow[hook]); +@@ -978,6 +1017,7 @@ copy_entries_to_user(unsigned int total_ + unsigned int i; + const struct ipt_entry_match *m; + const struct ipt_entry_target *t; ++ u8 flags; + + e = (struct ipt_entry *)(loc_cpu_entry + off); + if (copy_to_user(userptr + off +@@ -988,6 +1028,14 @@ copy_entries_to_user(unsigned int total_ + goto free_counters; + } + ++ flags = e->ip.flags & ~IPT_F_NO_DEF_MATCH; ++ if (copy_to_user(userptr + off ++ + offsetof(struct ipt_entry, ip.flags), ++ &flags, sizeof(flags)) != 0) { ++ ret = -EFAULT; ++ goto free_counters; ++ } ++ + for (i = sizeof(struct ipt_entry); + i < e->target_offset; + i += m->u.match_size) { diff --git a/target/linux/generic-2.6/patches-2.6.32/110-netfilter_match_speedup.patch b/target/linux/generic-2.6/patches-2.6.32/110-netfilter_match_speedup.patch index 2f4c7a292..a9eb1089f 100644 --- a/target/linux/generic-2.6/patches-2.6.32/110-netfilter_match_speedup.patch +++ b/target/linux/generic-2.6/patches-2.6.32/110-netfilter_match_speedup.patch @@ -119,3 +119,26 @@ /* For return from builtin chain */ back = get_entry(table_base, private->underflow[hook]); +@@ -992,6 +1031,7 @@ copy_entries_to_user(unsigned int total_ + unsigned int i; + const struct ipt_entry_match *m; + const struct ipt_entry_target *t; ++ u8 flags; + + e = (struct ipt_entry *)(loc_cpu_entry + off); + if (copy_to_user(userptr + off +@@ -1002,6 +1042,14 @@ copy_entries_to_user(unsigned int total_ + goto free_counters; + } + ++ flags = e->ip.flags & ~IPT_F_NO_DEF_MATCH; ++ if (copy_to_user(userptr + off ++ + offsetof(struct ipt_entry, ip.flags), ++ &flags, sizeof(flags)) != 0) { ++ ret = -EFAULT; ++ goto free_counters; ++ } ++ + for (i = sizeof(struct ipt_entry); + i < e->target_offset; + i += m->u.match_size) { diff --git a/target/linux/generic-2.6/patches-2.6.32/980-vm_exports.patch b/target/linux/generic-2.6/patches-2.6.32/980-vm_exports.patch index efaa20976..616bb2d54 100644 --- a/target/linux/generic-2.6/patches-2.6.32/980-vm_exports.patch +++ b/target/linux/generic-2.6/patches-2.6.32/980-vm_exports.patch @@ -68,7 +68,7 @@ * macro override instead of weak attribute alias, to workaround --- a/kernel/sched.c +++ b/kernel/sched.c -@@ -6093,6 +6093,7 @@ int can_nice(const struct task_struct *p +@@ -6105,6 +6105,7 @@ int can_nice(const struct task_struct *p return (nice_rlim <= p->signal->rlim[RLIMIT_NICE].rlim_cur || capable(CAP_SYS_NICE)); } diff --git a/target/linux/generic-2.6/patches-2.6.33/110-netfilter_match_speedup.patch b/target/linux/generic-2.6/patches-2.6.33/110-netfilter_match_speedup.patch index 69344a91f..e99c6db4d 100644 --- a/target/linux/generic-2.6/patches-2.6.33/110-netfilter_match_speedup.patch +++ b/target/linux/generic-2.6/patches-2.6.33/110-netfilter_match_speedup.patch @@ -119,3 +119,26 @@ /* For return from builtin chain */ back = get_entry(table_base, private->underflow[hook]); +@@ -992,6 +1031,7 @@ copy_entries_to_user(unsigned int total_ + unsigned int i; + const struct ipt_entry_match *m; + const struct ipt_entry_target *t; ++ u8 flags; + + e = (struct ipt_entry *)(loc_cpu_entry + off); + if (copy_to_user(userptr + off +@@ -1002,6 +1042,14 @@ copy_entries_to_user(unsigned int total_ + goto free_counters; + } + ++ flags = e->ip.flags & ~IPT_F_NO_DEF_MATCH; ++ if (copy_to_user(userptr + off ++ + offsetof(struct ipt_entry, ip.flags), ++ &flags, sizeof(flags)) != 0) { ++ ret = -EFAULT; ++ goto free_counters; ++ } ++ + for (i = sizeof(struct ipt_entry); + i < e->target_offset; + i += m->u.match_size) { diff --git a/target/linux/generic-2.6/patches-2.6.34/110-netfilter_match_speedup.patch b/target/linux/generic-2.6/patches-2.6.34/110-netfilter_match_speedup.patch index 69344a91f..e99c6db4d 100644 --- a/target/linux/generic-2.6/patches-2.6.34/110-netfilter_match_speedup.patch +++ b/target/linux/generic-2.6/patches-2.6.34/110-netfilter_match_speedup.patch @@ -119,3 +119,26 @@ /* For return from builtin chain */ back = get_entry(table_base, private->underflow[hook]); +@@ -992,6 +1031,7 @@ copy_entries_to_user(unsigned int total_ + unsigned int i; + const struct ipt_entry_match *m; + const struct ipt_entry_target *t; ++ u8 flags; + + e = (struct ipt_entry *)(loc_cpu_entry + off); + if (copy_to_user(userptr + off +@@ -1002,6 +1042,14 @@ copy_entries_to_user(unsigned int total_ + goto free_counters; + } + ++ flags = e->ip.flags & ~IPT_F_NO_DEF_MATCH; ++ if (copy_to_user(userptr + off ++ + offsetof(struct ipt_entry, ip.flags), ++ &flags, sizeof(flags)) != 0) { ++ ret = -EFAULT; ++ goto free_counters; ++ } ++ + for (i = sizeof(struct ipt_entry); + i < e->target_offset; + i += m->u.match_size) { diff --git a/target/linux/ifxmips/config-2.6.30 b/target/linux/ifxmips/config-2.6.30 index e41b2881b..27e4b8096 100644 --- a/target/linux/ifxmips/config-2.6.30 +++ b/target/linux/ifxmips/config-2.6.30 @@ -4,17 +4,17 @@ CONFIG_ADM6996_PHY=y # CONFIG_ARCH_HAS_ILOG2_U32 is not set # CONFIG_ARCH_HAS_ILOG2_U64 is not set CONFIG_ARCH_POPULATES_NODE_MAP=y +CONFIG_ARCH_REQUIRE_GPIOLIB=y # CONFIG_ARCH_SUPPORTS_MSI is not set CONFIG_ARCH_SUPPORTS_OPROFILE=y CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_BCM47XX is not set # CONFIG_BINARY_PRINTF is not set CONFIG_BITREVERSE=y # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set -CONFIG_CEVT_R4K_LIB=y CONFIG_CEVT_R4K=y +CONFIG_CEVT_R4K_LIB=y CONFIG_CMDLINE="console=ttyS0,9600 rootfstype=squashfs,jffs2" CONFIG_CPU_BIG_ENDIAN=y # CONFIG_CPU_CAVIUM_OCTEON is not set @@ -23,9 +23,9 @@ CONFIG_CPU_HAS_PREFETCH=y CONFIG_CPU_HAS_SYNC=y # CONFIG_CPU_LITTLE_ENDIAN is not set # CONFIG_CPU_LOONGSON2 is not set +CONFIG_CPU_MIPS32=y # CONFIG_CPU_MIPS32_R1 is not set CONFIG_CPU_MIPS32_R2=y -CONFIG_CPU_MIPS32=y # CONFIG_CPU_MIPS64_R1 is not set # CONFIG_CPU_MIPS64_R2 is not set CONFIG_CPU_MIPSR2=y @@ -47,21 +47,24 @@ CONFIG_CPU_SUPPORTS_HIGHMEM=y # CONFIG_CPU_TX39XX is not set # CONFIG_CPU_TX49XX is not set # CONFIG_CPU_VR41XX is not set -CONFIG_CSRC_R4K_LIB=y CONFIG_CSRC_R4K=y +CONFIG_CSRC_R4K_LIB=y CONFIG_DECOMPRESS_LZMA=y CONFIG_DEVPORT=y # CONFIG_DM9000 is not set CONFIG_DMA_NEED_PCI_MAP_STATE=y CONFIG_DMA_NONCOHERENT=y CONFIG_EARLY_PRINTK=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y CONFIG_GENERIC_CLOCKEVENTS=y +CONFIG_GENERIC_CLOCKEVENTS_BUILD=y CONFIG_GENERIC_CMOS_UPDATE=y CONFIG_GENERIC_FIND_LAST_BIT=y CONFIG_GENERIC_FIND_NEXT_BIT=y CONFIG_GENERIC_GPIO=y CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y +CONFIG_GPIOLIB=y +CONFIG_GPIO_IFXMIPS_EBU=y +CONFIG_GPIO_SYSFS=y CONFIG_HARDWARE_WATCHPOINTS=y CONFIG_HAS_DMA=y CONFIG_HAS_IOMEM=y @@ -75,15 +78,15 @@ CONFIG_HAVE_STD_PC_SERIAL_PORT=y # CONFIG_HIGH_RES_TIMERS is not set CONFIG_HW_HAS_PCI=y CONFIG_HW_RANDOM=y -# CONFIG_HZ_100 is not set CONFIG_HZ=250 +# CONFIG_HZ_100 is not set CONFIG_HZ_250=y +CONFIG_IFXMIPS=y CONFIG_IFXMIPS_GPIO_RST_BTN=y CONFIG_IFXMIPS_MII0=y # CONFIG_IFXMIPS_PROM_ASC0 is not set CONFIG_IFXMIPS_PROM_ASC1=y CONFIG_IFXMIPS_WDT=y -CONFIG_IFXMIPS=y CONFIG_INITRAMFS_SOURCE="" CONFIG_IRQ_CPU=y CONFIG_KALLSYMS=y @@ -97,6 +100,7 @@ CONFIG_LEDS_IFXMIPS=y # CONFIG_MACH_TX49XX is not set # CONFIG_MACH_VR41XX is not set # CONFIG_MIKROTIK_RB532 is not set +CONFIG_MIPS=y # CONFIG_MIPS_COBALT is not set CONFIG_MIPS_L1_CACHE_SHIFT=5 # CONFIG_MIPS_MACHINE is not set @@ -106,10 +110,8 @@ CONFIG_MIPS_MT_DISABLED=y # CONFIG_MIPS_MT_SMTC is not set # CONFIG_MIPS_SIM is not set # CONFIG_MIPS_VPE_LOADER is not set -CONFIG_MIPS=y CONFIG_MTD_CFI_ADV_OPTIONS=y CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_CFI_INTELEXT is not set CONFIG_MTD_CMDLINE_PARTS=y CONFIG_MTD_IFXMIPS=y # CONFIG_MTD_MAP_BANK_WIDTH_1 is not set @@ -126,6 +128,7 @@ CONFIG_PHYLIB=y # CONFIG_PNX8550_JBS is not set # CONFIG_PNX8550_STB810 is not set # CONFIG_PROBE_INITRD_HEADER is not set +CONFIG_RTL8306_PHY=y CONFIG_SCHED_OMIT_FRAME_POINTER=y # CONFIG_SCSI_DMA is not set # CONFIG_SERIAL_8250 is not set @@ -143,7 +146,6 @@ CONFIG_SERIAL_IFXMIPS=y # CONFIG_SIBYTE_SENTOSA is not set # CONFIG_SIBYTE_SWARM is not set # CONFIG_SLOW_WORK is not set -CONFIG_SQUASHFS_SUPPORT_LZMA=y CONFIG_SWAP_IO_SPACE=y CONFIG_SWCONFIG=y CONFIG_SYS_HAS_CPU_MIPS32_R1=y diff --git a/target/linux/ifxmips/files/arch/mips/ifxmips/gpio.c b/target/linux/ifxmips/files/arch/mips/ifxmips/gpio.c index 3ef5100ab..1ac00ded5 100644 --- a/target/linux/ifxmips/files/arch/mips/ifxmips/gpio.c +++ b/target/linux/ifxmips/files/arch/mips/ifxmips/gpio.c @@ -36,6 +36,7 @@ #include #include #include +#include #include @@ -44,27 +45,13 @@ #define MAX_PORTS 2 #define PINS_PER_PORT 16 -#ifdef CONFIG_IFXMIPS_GPIO_RST_BTN - -unsigned int rst_port = 1; -unsigned int rst_pin = 15; -static struct timer_list rst_button_timer; - -extern struct sock *uevent_sock; -extern u64 uevent_next_seqnum(void); -static unsigned long seen; -static int pressed; - -struct event_t { - struct work_struct wq; - int set; - unsigned long jiffies; -}; -#endif - #define IFXMIPS_GPIO_SANITY {if (port > MAX_PORTS || pin > PINS_PER_PORT) return -EINVAL; } -int ifxmips_port_reserve_pin(unsigned int port, unsigned int pin) +#define GPIO_TO_PORT(x) ((x > 15) ? (1) : (0)) +#define GPIO_TO_GPIO(x) ((x > 15) ? (x - 16) : (x)) + +int +ifxmips_port_reserve_pin(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; printk(KERN_INFO "%s : call to obseleted function\n", __func__); @@ -72,7 +59,8 @@ int ifxmips_port_reserve_pin(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_reserve_pin); -int ifxmips_port_free_pin(unsigned int port, unsigned int pin) +int +ifxmips_port_free_pin(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; printk(KERN_INFO "%s : call to obseleted function\n", __func__); @@ -80,7 +68,8 @@ int ifxmips_port_free_pin(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_free_pin); -int ifxmips_port_set_open_drain(unsigned int port, unsigned int pin) +int +ifxmips_port_set_open_drain(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_OD + (port * 0xC)) | (1 << pin), @@ -89,7 +78,8 @@ int ifxmips_port_set_open_drain(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_set_open_drain); -int ifxmips_port_clear_open_drain(unsigned int port, unsigned int pin) +int +ifxmips_port_clear_open_drain(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_OD + (port * 0xC)) & ~(1 << pin), @@ -98,7 +88,8 @@ int ifxmips_port_clear_open_drain(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_clear_open_drain); -int ifxmips_port_set_pudsel(unsigned int port, unsigned int pin) +int +ifxmips_port_set_pudsel(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_PUDSEL + (port * 0xC)) | (1 << pin), @@ -107,7 +98,8 @@ int ifxmips_port_set_pudsel(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_set_pudsel); -int ifxmips_port_clear_pudsel(unsigned int port, unsigned int pin) +int +ifxmips_port_clear_pudsel(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_PUDSEL + (port * 0xC)) & ~(1 << pin), @@ -116,7 +108,8 @@ int ifxmips_port_clear_pudsel(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_clear_pudsel); -int ifxmips_port_set_puden(unsigned int port, unsigned int pin) +int +ifxmips_port_set_puden(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_PUDEN + (port * 0xC)) | (1 << pin), @@ -125,7 +118,8 @@ int ifxmips_port_set_puden(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_set_puden); -int ifxmips_port_clear_puden(unsigned int port, unsigned int pin) +int +ifxmips_port_clear_puden(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_PUDEN + (port * 0xC)) & ~(1 << pin), @@ -134,7 +128,8 @@ int ifxmips_port_clear_puden(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_clear_puden); -int ifxmips_port_set_stoff(unsigned int port, unsigned int pin) +int +ifxmips_port_set_stoff(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_STOFF + (port * 0xC)) | (1 << pin), @@ -143,7 +138,8 @@ int ifxmips_port_set_stoff(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_set_stoff); -int ifxmips_port_clear_stoff(unsigned int port, unsigned int pin) +int +ifxmips_port_clear_stoff(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_STOFF + (port * 0xC)) & ~(1 << pin), @@ -152,7 +148,8 @@ int ifxmips_port_clear_stoff(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_clear_stoff); -int ifxmips_port_set_dir_out(unsigned int port, unsigned int pin) +int +ifxmips_port_set_dir_out(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_DIR + (port * 0xC)) | (1 << pin), @@ -161,7 +158,8 @@ int ifxmips_port_set_dir_out(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_set_dir_out); -int ifxmips_port_set_dir_in(unsigned int port, unsigned int pin) +int +ifxmips_port_set_dir_in(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_DIR + (port * 0xC)) & ~(1 << pin), @@ -170,7 +168,8 @@ int ifxmips_port_set_dir_in(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_set_dir_in); -int ifxmips_port_set_output(unsigned int port, unsigned int pin) +int +ifxmips_port_set_output(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_OUT + (port * 0xC)) | (1 << pin), @@ -179,7 +178,8 @@ int ifxmips_port_set_output(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_set_output); -int ifxmips_port_clear_output(unsigned int port, unsigned int pin) +int +ifxmips_port_clear_output(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_OUT + (port * 0xC)) & ~(1 << pin), @@ -188,7 +188,8 @@ int ifxmips_port_clear_output(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_clear_output); -int ifxmips_port_get_input(unsigned int port, unsigned int pin) +int +ifxmips_port_get_input(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; if (ifxmips_r32(IFXMIPS_GPIO_P0_IN + (port * 0xC)) & (1 << pin)) @@ -198,7 +199,8 @@ int ifxmips_port_get_input(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_get_input); -int ifxmips_port_set_altsel0(unsigned int port, unsigned int pin) +int +ifxmips_port_set_altsel0(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_ALTSEL0 + (port * 0xC)) | (1 << pin), @@ -207,7 +209,8 @@ int ifxmips_port_set_altsel0(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_set_altsel0); -int ifxmips_port_clear_altsel0(unsigned int port, unsigned int pin) +int +ifxmips_port_clear_altsel0(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_ALTSEL0 + (port * 0xC)) & ~(1 << pin), @@ -216,7 +219,8 @@ int ifxmips_port_clear_altsel0(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_clear_altsel0); -int ifxmips_port_set_altsel1(unsigned int port, unsigned int pin) +int +ifxmips_port_set_altsel1(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_ALTSEL1 + (port * 0xC)) | (1 << pin), @@ -225,7 +229,8 @@ int ifxmips_port_set_altsel1(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_set_altsel1); -int ifxmips_port_clear_altsel1(unsigned int port, unsigned int pin) +int +ifxmips_port_clear_altsel1(unsigned int port, unsigned int pin) { IFXMIPS_GPIO_SANITY; ifxmips_w32(ifxmips_r32(IFXMIPS_GPIO_P0_ALTSEL1 + (port * 0xC)) & ~(1 << pin), @@ -234,105 +239,85 @@ int ifxmips_port_clear_altsel1(unsigned int port, unsigned int pin) } EXPORT_SYMBOL(ifxmips_port_clear_altsel1); -#ifdef CONFIG_IFXMIPS_GPIO_RST_BTN -static inline void add_msg(struct sk_buff *skb, char *msg) +static void +ifxmips_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) { - char *scratch; - scratch = skb_put(skb, strlen(msg) + 1); - sprintf(scratch, msg); + int port = GPIO_TO_PORT(offset); + int gpio = GPIO_TO_GPIO(offset); + if(value) + ifxmips_port_set_output(port, gpio); + else + ifxmips_port_clear_output(port, gpio); } -static void hotplug_button(struct work_struct *wq) +static int +ifxmips_gpio_get(struct gpio_chip *chip, unsigned int offset) { - struct sk_buff *skb; - struct event_t *event; - size_t len; - char *scratch, *s; - char buf[128]; - - event = container_of(wq, struct event_t, wq); - if (!uevent_sock) - goto done; - - s = event->set ? "pressed" : "released"; - len = strlen(s) + 2; - skb = alloc_skb(len + 2048, GFP_KERNEL); - if (!skb) - goto done; - - scratch = skb_put(skb, len); - sprintf(scratch, "%s@", s); - add_msg(skb, "HOME=/"); - add_msg(skb, "PATH=/sbin:/bin:/usr/sbin:/usr/bin"); - add_msg(skb, "SUBSYSTEM=button"); - add_msg(skb, "BUTTON=reset"); - add_msg(skb, (event->set ? "ACTION=pressed" : "ACTION=released")); - sprintf(buf, "SEEN=%ld", (event->jiffies - seen)/HZ); - add_msg(skb, buf); - snprintf(buf, 128, "SEQNUM=%llu", uevent_next_seqnum()); - add_msg(skb, buf); - - NETLINK_CB(skb).dst_group = 1; - netlink_broadcast(uevent_sock, skb, 0, 1, GFP_KERNEL); -done: - kfree(event); + int port = GPIO_TO_PORT(offset); + int gpio = GPIO_TO_GPIO(offset); + return ifxmips_port_get_input(port, gpio); } -static void reset_button_poll(unsigned long unused) +static int +ifxmips_gpio_direction_input(struct gpio_chip *chip, unsigned int offset) { - struct event_t *event; - - rst_button_timer.expires = jiffies + (HZ / 4); - add_timer(&rst_button_timer); - - if (pressed != ifxmips_port_get_input(rst_port, rst_pin)) { - if (pressed) - pressed = 0; - else - pressed = 1; - event = kzalloc(sizeof(struct event_t), GFP_ATOMIC); - if (!event) { - printk(KERN_INFO "Could not alloc hotplug event\n"); - return; - } - event->set = pressed; - event->jiffies = jiffies; - INIT_WORK(&event->wq, (void *)(void *)hotplug_button); - schedule_work(&event->wq); - seen = jiffies; - } -} -#endif - -static int ifxmips_gpio_probe(struct platform_device *dev) -{ - int retval = 0; - -#ifdef CONFIG_IFXMIPS_GPIO_RST_BTN - rst_port = dev->resource[0].start; - rst_pin = dev->resource[0].end; - ifxmips_port_set_open_drain(rst_port, rst_pin); - ifxmips_port_clear_altsel0(rst_port, rst_pin); - ifxmips_port_clear_altsel1(rst_port, rst_pin); - ifxmips_port_set_dir_in(rst_port, rst_pin); - seen = jiffies; - init_timer(&rst_button_timer); - rst_button_timer.function = reset_button_poll; - rst_button_timer.expires = jiffies + HZ; - add_timer(&rst_button_timer); -#endif - return retval; -} - -static int ifxmips_gpio_remove(struct platform_device *pdev) -{ -#ifdef CONFIG_IFXMIPS_GPIO_RST_BTN - del_timer_sync(&rst_button_timer); -#endif + int port = GPIO_TO_PORT(offset); + int gpio = GPIO_TO_GPIO(offset); + ifxmips_port_set_open_drain(port, gpio); + ifxmips_port_clear_altsel0(port, gpio); + ifxmips_port_clear_altsel1(port, gpio); + ifxmips_port_set_dir_in(port, gpio); return 0; } -static struct platform_driver ifxmips_gpio_driver = { +static int +ifxmips_gpio_direction_output(struct gpio_chip *chip, unsigned int offset, int value) +{ + int port = GPIO_TO_PORT(offset); + int gpio = GPIO_TO_GPIO(offset); + ifxmips_port_clear_open_drain(port, gpio); + ifxmips_port_clear_altsel0(port, gpio); + ifxmips_port_clear_altsel1(port, gpio); + ifxmips_port_set_dir_out(port, gpio); + ifxmips_gpio_set(chip, offset, value); + return 0; +} + +int +gpio_to_irq(unsigned int gpio) +{ + return -EINVAL; +} +EXPORT_SYMBOL(gpio_to_irq); + +struct gpio_chip +ifxmips_gpio_chip = +{ + .label = "ifxmips-gpio", + .direction_input = ifxmips_gpio_direction_input, + .direction_output = ifxmips_gpio_direction_output, + .get = ifxmips_gpio_get, + .set = ifxmips_gpio_set, + .base = 0, + .ngpio = 32, +}; + +static int +ifxmips_gpio_probe(struct platform_device *dev) +{ + gpiochip_add(&ifxmips_gpio_chip); + return 0; +} + +static int +ifxmips_gpio_remove(struct platform_device *pdev) +{ + gpiochip_remove(&ifxmips_gpio_chip); + return 0; +} + +static struct platform_driver +ifxmips_gpio_driver = { .probe = ifxmips_gpio_probe, .remove = ifxmips_gpio_remove, .driver = { @@ -341,7 +326,8 @@ static struct platform_driver ifxmips_gpio_driver = { }, }; -int __init ifxmips_gpio_init(void) +int __init +ifxmips_gpio_init(void) { int ret = platform_driver_register(&ifxmips_gpio_driver); if (ret) @@ -349,7 +335,8 @@ int __init ifxmips_gpio_init(void) return ret; } -void __exit ifxmips_gpio_exit(void) +void __exit +ifxmips_gpio_exit(void) { platform_driver_unregister(&ifxmips_gpio_driver); } diff --git a/target/linux/ifxmips/files/arch/mips/include/asm/mach-ifxmips/gpio.h b/target/linux/ifxmips/files/arch/mips/include/asm/mach-ifxmips/gpio.h deleted file mode 100644 index 4176bfd80..000000000 --- a/target/linux/ifxmips/files/arch/mips/include/asm/mach-ifxmips/gpio.h +++ /dev/null @@ -1,105 +0,0 @@ -/* - * include/asm-mips/mach-ifxmips/gpio.h - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. - * - * Copyright (C) 2007 John Crispin - * - */ - -#ifndef _IFXMIPS_GPIO_H_ -#define _IFXMIPS_GPIO_H_ - -#include -#include - -#define GPIO_TO_PORT(x) ((x > 15) ? (1) : (0)) -#define GPIO_TO_GPIO(x) ((x > 15) ? (x-16) : (x)) - -static inline int gpio_direction_input(unsigned gpio) -{ - ifxmips_port_set_open_drain(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio)); - ifxmips_port_clear_altsel0(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio)); - ifxmips_port_clear_altsel1(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio)); - ifxmips_port_set_dir_in(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio)); - return 0; -} - -static inline int gpio_direction_output(unsigned gpio, int value) -{ - ifxmips_port_clear_open_drain(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio)); - ifxmips_port_clear_altsel0(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio)); - ifxmips_port_clear_altsel1(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio)); - ifxmips_port_set_dir_out(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio)); - return 0; -} - -static inline int gpio_get_value(unsigned gpio) -{ - ifxmips_port_get_input(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio)); - return 0; -} - -static inline void gpio_set_value(unsigned gpio, int value) -{ - if (value) - ifxmips_port_set_output(GPIO_TO_PORT(gpio), GPIO_TO_GPIO(gpio)); - else - ifxmips_port_clear_output(GPIO_TO_PORT(gpio), - GPIO_TO_GPIO(gpio)); -} - -static inline int gpio_request(unsigned gpio, const char *label) -{ - return 0; -} - -static inline void gpio_free(unsigned gpio) -{ -} - -static inline int gpio_to_irq(unsigned gpio) -{ - return 0; -} - -static inline int irq_to_gpio(unsigned irq) -{ - return 0; -} - -static inline int gpio_cansleep(unsigned gpio) -{ - return 0; -} - -static inline int gpio_get_value_cansleep(unsigned gpio) -{ - might_sleep(); - return gpio_get_value(gpio); -} - -static inline void gpio_set_value_cansleep(unsigned gpio, int value) -{ - might_sleep(); - gpio_set_value(gpio, value); -} - -static inline int gpio_is_valid(int number) -{ - return ((unsigned)number) < 32; -} - -#endif diff --git a/target/linux/ifxmips/files/arch/mips/include/asm/mach-ifxmips/ifxmips_irq.h b/target/linux/ifxmips/files/arch/mips/include/asm/mach-ifxmips/ifxmips_irq.h index f3cb99c2b..e6ca59baf 100644 --- a/target/linux/ifxmips/files/arch/mips/include/asm/mach-ifxmips/ifxmips_irq.h +++ b/target/linux/ifxmips/files/arch/mips/include/asm/mach-ifxmips/ifxmips_irq.h @@ -66,8 +66,11 @@ #define IFXMIPS_PPE_MBOX_INT (INT_NUM_IM2_IRL0 + 24) -#define IFXMIPS_USB_INT (INT_NUM_IM4_IRL0 + 22) -#define IFXMIPS_USB_OC_INT (INT_NUM_IM4_IRL0 + 23) +#define INT_NUM_IM4_IRL14 (INT_NUM_IM4_IRL0 + 14) +#define INT_NUM_IM4_IRL18 (INT_NUM_IM4_IRL0 + 18) +#define INT_NUM_IM4_IRL19 (INT_NUM_IM4_IRL0 + 19) +#define IFXMIPS_USB_INT (INT_NUM_IM4_IRL0 + 22) +#define IFXMIPS_USB_OC_INT (INT_NUM_IM4_IRL0 + 23) extern void ifxmips_mask_and_ack_irq(unsigned int irq_nr); diff --git a/target/linux/ifxmips/nfs/config-2.6.26 b/target/linux/ifxmips/nfs/config-2.6.26 deleted file mode 100644 index 19d7d2aa1..000000000 --- a/target/linux/ifxmips/nfs/config-2.6.26 +++ /dev/null @@ -1,16 +0,0 @@ -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MD5=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_DHCP is not set -# CONFIG_IP_PNP_RARP is not set -CONFIG_IP_PNP=y -CONFIG_LOCKD=y -CONFIG_NFS_FS=y -CONFIG_ROOT_NFS=y -CONFIG_RPCSEC_GSS_KRB5=y -CONFIG_SUNRPC_GSS=y -CONFIG_SUNRPC=y diff --git a/target/linux/ifxmips/nfs/config-2.6.27 b/target/linux/ifxmips/nfs/config-2.6.27 deleted file mode 100644 index 19d7d2aa1..000000000 --- a/target/linux/ifxmips/nfs/config-2.6.27 +++ /dev/null @@ -1,16 +0,0 @@ -CONFIG_CRYPTO_ALGAPI=y -CONFIG_CRYPTO_BLKCIPHER=y -CONFIG_CRYPTO_CBC=y -CONFIG_CRYPTO_DES=y -CONFIG_CRYPTO_MANAGER=y -CONFIG_CRYPTO_MD5=y -# CONFIG_IP_PNP_BOOTP is not set -# CONFIG_IP_PNP_DHCP is not set -# CONFIG_IP_PNP_RARP is not set -CONFIG_IP_PNP=y -CONFIG_LOCKD=y -CONFIG_NFS_FS=y -CONFIG_ROOT_NFS=y -CONFIG_RPCSEC_GSS_KRB5=y -CONFIG_SUNRPC_GSS=y -CONFIG_SUNRPC=y diff --git a/target/linux/ifxmips/patches-2.6.30/100-board.patch b/target/linux/ifxmips/patches-2.6.30/100-board.patch index 16272698e..5e7530ecd 100644 --- a/target/linux/ifxmips/patches-2.6.30/100-board.patch +++ b/target/linux/ifxmips/patches-2.6.30/100-board.patch @@ -1,8 +1,8 @@ -Index: linux-2.6.30.5/arch/mips/Kconfig +Index: linux-2.6.30.10/arch/mips/Kconfig =================================================================== ---- linux-2.6.30.5.orig/arch/mips/Kconfig 2009-09-02 22:12:48.000000000 +0200 -+++ linux-2.6.30.5/arch/mips/Kconfig 2009-09-03 01:18:31.000000000 +0200 -@@ -79,6 +79,24 @@ +--- linux-2.6.30.10.orig/arch/mips/Kconfig 2010-03-24 15:32:02.000000000 +0100 ++++ linux-2.6.30.10/arch/mips/Kconfig 2010-03-24 21:56:29.000000000 +0100 +@@ -79,6 +79,23 @@ select SYS_SUPPORTS_64BIT_KERNEL select SYS_SUPPORTS_LITTLE_ENDIAN @@ -20,14 +20,13 @@ Index: linux-2.6.30.5/arch/mips/Kconfig + select SYS_SUPPORTS_MULTITHREADING + select SYS_HAS_EARLY_PRINTK + select HW_HAS_PCI -+ select GENERIC_GPIO -+ select ARCH_WANT_OPTIONAL_GPIOLIB ++ select ARCH_REQUIRE_GPIOLIB + select SWAP_IO_SPACE + config MACH_DECSTATION bool "DECstations" select BOOT_ELF32 -@@ -643,6 +661,7 @@ +@@ -643,6 +660,7 @@ source "arch/mips/txx9/Kconfig" source "arch/mips/vr41xx/Kconfig" source "arch/mips/cavium-octeon/Kconfig" @@ -35,10 +34,10 @@ Index: linux-2.6.30.5/arch/mips/Kconfig endmenu -Index: linux-2.6.30.5/arch/mips/Makefile +Index: linux-2.6.30.10/arch/mips/Makefile =================================================================== ---- linux-2.6.30.5.orig/arch/mips/Makefile 2009-09-02 22:12:48.000000000 +0200 -+++ linux-2.6.30.5/arch/mips/Makefile 2009-09-02 22:12:53.000000000 +0200 +--- linux-2.6.30.10.orig/arch/mips/Makefile 2010-03-24 15:32:02.000000000 +0100 ++++ linux-2.6.30.10/arch/mips/Makefile 2010-03-24 15:32:04.000000000 +0100 @@ -290,6 +290,13 @@ load-$(CONFIG_MIPS_COBALT) += 0xffffffff80080000 @@ -53,10 +52,10 @@ Index: linux-2.6.30.5/arch/mips/Makefile # DECstation family # core-$(CONFIG_MACH_DECSTATION) += arch/mips/dec/ -Index: linux-2.6.30.5/arch/mips/include/asm/bootinfo.h +Index: linux-2.6.30.10/arch/mips/include/asm/bootinfo.h =================================================================== ---- linux-2.6.30.5.orig/arch/mips/include/asm/bootinfo.h 2009-09-02 22:12:48.000000000 +0200 -+++ linux-2.6.30.5/arch/mips/include/asm/bootinfo.h 2009-09-02 22:13:05.000000000 +0200 +--- linux-2.6.30.10.orig/arch/mips/include/asm/bootinfo.h 2009-12-04 07:00:07.000000000 +0100 ++++ linux-2.6.30.10/arch/mips/include/asm/bootinfo.h 2010-03-24 15:32:04.000000000 +0100 @@ -57,6 +57,8 @@ #define MACH_MIKROTIK_RB532 0 /* Mikrotik RouterBoard 532 */ #define MACH_MIKROTIK_RB532A 1 /* Mikrotik RouterBoard 532A */ diff --git a/target/linux/ifxmips/patches-2.6.30/130-ethernet.patch b/target/linux/ifxmips/patches-2.6.30/130-ethernet.patch index b49589dd9..30f169304 100644 --- a/target/linux/ifxmips/patches-2.6.30/130-ethernet.patch +++ b/target/linux/ifxmips/patches-2.6.30/130-ethernet.patch @@ -29,9 +29,9 @@ Index: linux-2.6.30.8/drivers/net/Makefile Index: linux-2.6.30.8/drivers/net/ifxmips_mii0.c =================================================================== ---- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ linux-2.6.30.8/drivers/net/ifxmips_mii0.c 2009-10-19 21:41:10.000000000 +0200 -@@ -0,0 +1,389 @@ +--- /dev/null 2010-01-25 20:01:36.843225078 +0100 ++++ linux-2.6.30.10/drivers/net/ifxmips_mii0.c 2010-03-13 19:04:25.000000000 +0100 +@@ -0,0 +1,489 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by @@ -60,6 +60,7 @@ Index: linux-2.6.30.8/drivers/net/ifxmips_mii0.c +#include +#include +#include ++#include +#include +#include +#include @@ -79,12 +80,17 @@ Index: linux-2.6.30.8/drivers/net/ifxmips_mii0.c + struct net_device_stats stats; + struct dma_device_info *dma_device; + struct sk_buff *skb; ++ ++ struct mii_bus *mii_bus; ++ struct phy_device *phydev; ++ int oldlink, oldspeed, oldduplex; +}; + +static struct net_device *ifxmips_mii0_dev; +static unsigned char mac_addr[MAX_ADDR_LEN]; + -+void ifxmips_write_mdio(u32 phy_addr, u32 phy_reg, u16 phy_data) ++static int ifxmips_mdiobus_write(struct mii_bus *bus, int phy_addr, ++ int phy_reg, u16 phy_data) +{ + u32 val = MDIO_ACC_REQUEST | + ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) | @@ -94,10 +100,11 @@ Index: linux-2.6.30.8/drivers/net/ifxmips_mii0.c + while (ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_REQUEST) + ; + ifxmips_w32(val, IFXMIPS_PPE32_MDIO_ACC); -+} -+EXPORT_SYMBOL(ifxmips_write_mdio); + -+unsigned short ifxmips_read_mdio(u32 phy_addr, u32 phy_reg) ++ return 0; ++} ++ ++static int ifxmips_mdiobus_read(struct mii_bus *bus, int phy_addr, int phy_reg) +{ + u32 val = MDIO_ACC_REQUEST | MDIO_ACC_READ | + ((phy_addr & MDIO_ACC_ADDR_MASK) << MDIO_ACC_ADDR_OFFSET) | @@ -111,7 +118,6 @@ Index: linux-2.6.30.8/drivers/net/ifxmips_mii0.c + val = ifxmips_r32(IFXMIPS_PPE32_MDIO_ACC) & MDIO_ACC_VAL_MASK; + return val; +} -+EXPORT_SYMBOL(ifxmips_read_mdio); + +int ifxmips_ifxmips_mii_open(struct net_device *dev) +{ @@ -300,12 +306,91 @@ Index: linux-2.6.30.8/drivers/net/ifxmips_mii0.c + return &((struct ifxmips_mii_priv *)netdev_priv(dev))->stats; +} + ++static void ++ifxmips_adjust_link(struct net_device *dev) ++{ ++ struct ifxmips_mii_priv *priv = netdev_priv(dev); ++ struct phy_device *phydev = priv->phydev; ++ int new_state = 0; ++ ++ /* Did anything change? */ ++ if (priv->oldlink != phydev->link || ++ priv->oldduplex != phydev->duplex || ++ priv->oldspeed != phydev->speed) { ++ /* Yes, so update status and mark as changed */ ++ new_state = 1; ++ priv->oldduplex = phydev->duplex; ++ priv->oldspeed = phydev->speed; ++ priv->oldlink = phydev->link; ++ } ++ ++ /* If link status changed, show new status */ ++ if (new_state) ++ phy_print_status(phydev); ++} ++ ++static int mii_probe(struct net_device *dev) ++{ ++ struct ifxmips_mii_priv *priv = netdev_priv(dev); ++ struct phy_device *phydev = NULL; ++ int phy_addr; ++ ++ priv->oldlink = 0; ++ priv->oldspeed = 0; ++ priv->oldduplex = -1; ++ ++ /* find the first (lowest address) PHY on the current MAC's MII bus */ ++ for (phy_addr = 0; phy_addr < PHY_MAX_ADDR; phy_addr++) { ++ if (priv->mii_bus->phy_map[phy_addr]) { ++ phydev = priv->mii_bus->phy_map[phy_addr]; ++ break; /* break out with first one found */ ++ } ++ } ++ ++ if (!phydev) { ++ printk (KERN_ERR "%s: no PHY found\n", dev->name); ++ return -ENODEV; ++ } ++ ++ /* now we are supposed to have a proper phydev, to attach to... */ ++ BUG_ON(!phydev); ++ BUG_ON(phydev->attached_dev); ++ ++ phydev = phy_connect(dev, dev_name(&phydev->dev), &ifxmips_adjust_link, ++ 0, PHY_INTERFACE_MODE_MII); ++ ++ if (IS_ERR(phydev)) { ++ printk(KERN_ERR "%s: Could not attach to PHY\n", dev->name); ++ return PTR_ERR(phydev); ++ } ++ ++ /* mask with MAC supported features */ ++ phydev->supported &= (SUPPORTED_10baseT_Half ++ | SUPPORTED_10baseT_Full ++ | SUPPORTED_100baseT_Half ++ | SUPPORTED_100baseT_Full ++ | SUPPORTED_Autoneg ++ /* | SUPPORTED_Pause | SUPPORTED_Asym_Pause */ ++ | SUPPORTED_MII ++ | SUPPORTED_TP); ++ ++ phydev->advertising = phydev->supported; ++ ++ priv->phydev = phydev; ++ ++ printk(KERN_INFO "%s: attached PHY driver [%s] " ++ "(mii_bus:phy_addr=%s, irq=%d)\n", ++ dev->name, phydev->drv->name, dev_name(&phydev->dev), phydev->irq); ++ ++ return 0; ++} ++ ++ +static int ifxmips_mii_dev_init(struct net_device *dev) +{ + int i; + struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev); + ether_setup(dev); -+ printk(KERN_INFO "ifxmips_mii0: %s is up\n", dev->name); + dev->open = ifxmips_ifxmips_mii_open; + dev->stop = ifxmips_mii_release; + dev->hard_start_xmit = ifxmips_mii_tx; @@ -336,12 +421,28 @@ Index: linux-2.6.30.8/drivers/net/ifxmips_mii0.c + + dma_device_register(priv->dma_device); + -+ printk(KERN_INFO "ifxmips_mii0: using mac="); ++ printk(KERN_INFO "%s: using mac=", dev->name); + for (i = 0; i < 6; i++) { + dev->dev_addr[i] = mac_addr[i]; + printk("%02X%c", dev->dev_addr[i], (i == 5) ? ('\n') : (':')); + } -+ return 0; ++ ++ priv->mii_bus = mdiobus_alloc(); ++ if (priv->mii_bus == NULL) ++ return -ENOMEM; ++ ++ priv->mii_bus->priv = dev; ++ priv->mii_bus->read = ifxmips_mdiobus_read; ++ priv->mii_bus->write = ifxmips_mdiobus_write; ++ priv->mii_bus->name = "ifxmips_mii"; ++ snprintf(priv->mii_bus->id, MII_BUS_ID_SIZE, "%x", 0); ++ priv->mii_bus->irq = kmalloc(sizeof(int) * PHY_MAX_ADDR, GFP_KERNEL); ++ for(i = 0; i < PHY_MAX_ADDR; ++i) ++ priv->mii_bus->irq[i] = PHY_POLL; ++ ++ mdiobus_register(priv->mii_bus); ++ ++ return mii_probe(dev); +} + +static void ifxmips_mii_chip_init(int mode) diff --git a/target/linux/ifxmips/patches-2.6.30/140-mtd.patch b/target/linux/ifxmips/patches-2.6.30/140-mtd.patch index 294d97335..184c78ca9 100644 --- a/target/linux/ifxmips/patches-2.6.30/140-mtd.patch +++ b/target/linux/ifxmips/patches-2.6.30/140-mtd.patch @@ -1,7 +1,7 @@ Index: linux-2.6.30.10/drivers/mtd/maps/Makefile =================================================================== ---- linux-2.6.30.10.orig/drivers/mtd/maps/Makefile 2010-03-18 14:27:04.000000000 +0100 -+++ linux-2.6.30.10/drivers/mtd/maps/Makefile 2010-03-18 14:27:07.000000000 +0100 +--- linux-2.6.30.10.orig/drivers/mtd/maps/Makefile 2009-12-04 07:00:07.000000000 +0100 ++++ linux-2.6.30.10/drivers/mtd/maps/Makefile 2010-03-24 15:32:04.000000000 +0100 @@ -62,3 +62,4 @@ obj-$(CONFIG_MTD_BFIN_ASYNC) += bfin-async-flash.o obj-$(CONFIG_MTD_RBTX4939) += rbtx4939-flash.o @@ -10,8 +10,8 @@ Index: linux-2.6.30.10/drivers/mtd/maps/Makefile Index: linux-2.6.30.10/drivers/mtd/maps/ifxmips.c =================================================================== --- /dev/null 1970-01-01 00:00:00.000000000 +0000 -+++ linux-2.6.30.10/drivers/mtd/maps/ifxmips.c 2010-03-18 14:27:17.000000000 +0100 -@@ -0,0 +1,281 @@ ++++ linux-2.6.30.10/drivers/mtd/maps/ifxmips.c 2010-03-24 16:46:26.000000000 +0100 +@@ -0,0 +1,282 @@ +/* + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by @@ -253,6 +253,7 @@ Index: linux-2.6.30.10/drivers/mtd/maps/ifxmips.c + parts[3].size -= ifxmips_mtd->erasesize; + parts[4].offset = ifxmips_mtd->size - ifxmips_mtd->erasesize; + parts[4].size = ifxmips_mtd->erasesize; ++ ifxmips_meta_partition.size -= ifxmips_mtd->erasesize; + } else { + num_parts--; + } diff --git a/target/linux/ifxmips/patches-2.6.30/500-arv452.patch b/target/linux/ifxmips/patches-2.6.30/500-arv452.patch new file mode 100644 index 000000000..3ceeb2ca5 --- /dev/null +++ b/target/linux/ifxmips/patches-2.6.30/500-arv452.patch @@ -0,0 +1,79 @@ +Index: linux-2.6.30.10/arch/mips/ifxmips/board.c +=================================================================== +--- linux-2.6.30.10.orig/arch/mips/ifxmips/board.c 2010-03-24 16:45:31.000000000 +0100 ++++ linux-2.6.30.10/arch/mips/ifxmips/board.c 2010-03-24 17:16:53.000000000 +0100 +@@ -52,6 +52,7 @@ + EASY50712, + EASY4010, + ARV4519, ++ ARV452, + }; + + extern int ifxmips_pci_external_clock; +@@ -141,6 +142,15 @@ + { .name = "ifx:green:usb", .gpio = 19, .active_low = 1, }, + }; + ++static struct gpio_led arv452_gpio_leds[] = { ++ { .name = "ifx:blue:power", .gpio = 3, .active_low = 1, }, ++ { .name = "ifx:blue:adsl", .gpio = 4, .active_low = 1, }, ++ { .name = "ifx:pink:internet", .gpio = 5, .active_low = 1, }, ++ { .name = "ifx:red:power", .gpio = 6, .active_low = 1, }, ++ { .name = "ifx:yello:wps", .gpio = 7, .active_low = 1, }, ++ { .name = "ifx:red:wps", .gpio = 9, .active_low = 1, }, ++}; ++ + static struct gpio_led_platform_data ifxmips_gpio_led_data; + + static struct platform_device ifxmips_gpio_leds = { +@@ -192,6 +202,14 @@ + #endif + }; + ++struct platform_device *arv452_devs[] = { ++ &ifxmips_gpio, &ifxmips_mii, &ifxmips_mtd, ++ &ifxmips_gpio_dev, &ifxmips_wdt, &dwc_usb, ++#ifdef CONFIG_LEDS_GPIO ++ &ifxmips_gpio_leds, ++#endif ++}; ++ + static struct gpio_led easy50712_leds[] = { + { .name = "ifx:green:test0", .gpio = 0,}, + { .name = "ifx:green:test1", .gpio = 1,}, +@@ -237,7 +255,20 @@ + .devs = arv5419_devs, + .reset_resource = {.name = "reset", .start = 1, .end = 14}, + .pci_external_clock = 1, ++#ifdef CONFIG_LEDS_GPIO + .gpio_leds = arv4519_gpio_leds, ++#endif ++ }, { ++ /* arcaydian annex-b board used by airties, arcor */ ++ .type = ARV452, ++ .name = "ARV452", ++ .system_type = SYSTEM_DANUBE_CHIPID2, ++ .devs = arv452_devs, ++ .reset_resource = {.name = "reset", .start = 1, .end = 14}, ++ .pci_external_clock = 1, ++#ifdef CONFIG_LEDS_GPIO ++ .gpio_leds = arv452_gpio_leds, ++#endif + }, + }; + +@@ -382,6 +413,14 @@ + ifxmips_gpio_led_data.num_leds = ARRAY_SIZE(arv4519_gpio_leds); + #endif + break; ++ case ARV452: ++ /* set some sane defaults for the gpios */ ++ board->num_devs = ARRAY_SIZE(arv452_devs); ++ ifxmips_w32(0x8001e7ff, IFXMIPS_EBU_BUSCON1); ++#ifdef CONFIG_LEDS_GPIO ++ ifxmips_gpio_led_data.num_leds = ARRAY_SIZE(arv452_gpio_leds); ++#endif ++ break; + } + #ifdef CONFIG_LEDS_GPIO + ifxmips_gpio_led_data.leds = board->gpio_leds; diff --git a/target/linux/ifxmips/patches-2.6.30/600-ebu-gpio.patch b/target/linux/ifxmips/patches-2.6.30/600-ebu-gpio.patch new file mode 100644 index 000000000..01e428a18 --- /dev/null +++ b/target/linux/ifxmips/patches-2.6.30/600-ebu-gpio.patch @@ -0,0 +1,196 @@ +Index: linux-2.6.30.10/drivers/gpio/Kconfig +=================================================================== +--- linux-2.6.30.10.orig/drivers/gpio/Kconfig 2010-03-24 21:55:56.000000000 +0100 ++++ linux-2.6.30.10/drivers/gpio/Kconfig 2010-03-24 21:56:36.000000000 +0100 +@@ -176,4 +176,12 @@ + SPI driver for Microchip MCP23S08 I/O expander. This provides + a GPIO interface supporting inputs and outputs. + ++comment "EBU GPIO expanders:" ++ ++config GPIO_IFXMIPS_EBU ++ boolean "IFXMIPS EBU attached I/O expander" ++ depends on IFXMIPS ++ help ++ This driver allows you to drive latches attached to the SoCc External Bus Unit ++ + endif +Index: linux-2.6.30.10/drivers/gpio/Makefile +=================================================================== +--- linux-2.6.30.10.orig/drivers/gpio/Makefile 2010-03-24 21:55:56.000000000 +0100 ++++ linux-2.6.30.10/drivers/gpio/Makefile 2010-03-24 21:56:36.000000000 +0100 +@@ -12,3 +12,4 @@ + obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o + obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o + obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o ++obj-$(CONFIG_GPIO_IFXMIPS_EBU) += ifxmips_ebu_gpio.o +Index: linux-2.6.30.10/arch/mips/ifxmips/board.c +=================================================================== +--- linux-2.6.30.10.orig/arch/mips/ifxmips/board.c 2010-03-25 10:43:06.000000000 +0100 ++++ linux-2.6.30.10/arch/mips/ifxmips/board.c 2010-03-25 12:40:54.000000000 +0100 +@@ -111,6 +111,11 @@ + .name = "ifxmips_wdt", + }; + ++static struct platform_device ifxmips_ebu = { ++ .id = 0, ++ .name = "ifxmips_ebu", ++}; ++ + static struct resource ifxmips_mtd_resource = { + .start = IFXMIPS_FLASH_START, + .end = IFXMIPS_FLASH_START + IFXMIPS_FLASH_MAX - 1, +@@ -145,10 +150,18 @@ + static struct gpio_led arv452_gpio_leds[] = { + { .name = "ifx:blue:power", .gpio = 3, .active_low = 1, }, + { .name = "ifx:blue:adsl", .gpio = 4, .active_low = 1, }, +- { .name = "ifx:pink:internet", .gpio = 5, .active_low = 1, }, ++ { .name = "ifx:blue:internet", .gpio = 5, .active_low = 1, }, + { .name = "ifx:red:power", .gpio = 6, .active_low = 1, }, + { .name = "ifx:yello:wps", .gpio = 7, .active_low = 1, }, + { .name = "ifx:red:wps", .gpio = 9, .active_low = 1, }, ++ { .name = "ifx:blue:voip", .gpio = 32, .active_low = 1, }, ++ { .name = "ifx:blue:fxs1", .gpio = 33, .active_low = 1, }, ++ { .name = "ifx:blue:fxs2", .gpio = 34, .active_low = 1, }, ++ { .name = "ifx:blue:fxo", .gpio = 35, .active_low = 1, }, ++ { .name = "ifx:blue:voice", .gpio = 36, .active_low = 1, }, ++ { .name = "ifx:blue:usb", .gpio = 37, .active_low = 1, }, ++ { .name = "ifx:blue:wlan", .gpio = 38, .active_low = 1, }, ++ { .name = "ifx:red:internet", .gpio = 41, .active_low = 1, }, + }; + + static struct gpio_led_platform_data ifxmips_gpio_led_data; +@@ -205,6 +218,7 @@ + struct platform_device *arv452_devs[] = { + &ifxmips_gpio, &ifxmips_mii, &ifxmips_mtd, + &ifxmips_gpio_dev, &ifxmips_wdt, &dwc_usb, ++ &ifxmips_ebu, + #ifdef CONFIG_LEDS_GPIO + &ifxmips_gpio_leds, + #endif +Index: linux-2.6.30.10/drivers/gpio/ifxmips_ebu_gpio.c +=================================================================== +--- /dev/null 1970-01-01 00:00:00.000000000 +0000 ++++ linux-2.6.30.10/drivers/gpio/ifxmips_ebu_gpio.c 2010-03-25 12:47:07.000000000 +0100 +@@ -0,0 +1,121 @@ ++/* ++ * This program is free software; you can redistribute it and/or modify ++ * it under the terms of the GNU General Public License as published by ++ * the Free Software Foundation; either version 2 of the License, or ++ * (at your option) any later version. ++ * ++ * This program is distributed in the hope that it will be useful, ++ * but WITHOUT ANY WARRANTY; without even the implied warranty of ++ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the ++ * GNU General Public License for more details. ++ * ++ * You should have received a copy of the GNU General Public License ++ * along with this program; if not, write to the Free Software ++ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA. ++ * ++ * Copyright (C) 2010 John Crispin ++ */ ++ ++#include ++#include ++#include ++#include ++#include ++ ++#define IFXMIPS_EBU_START 0x14000000 ++#define IFXMIPS_EBU_MAX 0x00001000 ++#define IFXMIPS_EBU_BUSCON 0x1e7ff ++#define IFXMIPS_EBU_WP 0x80000000 ++ ++static int shadow = (1 << 10) | (1 << 8); ++static void __iomem *virt; ++ ++static int ++ifxmips_ebu_direction_input(struct gpio_chip *chip, unsigned offset) ++{ ++ return -EINVAL; ++} ++ ++static int ++ifxmips_ebu_direction_output(struct gpio_chip *chip, unsigned offset, int value) ++{ ++ return 0; ++} ++ ++static int ++ifxmips_ebu_get(struct gpio_chip *chip, unsigned offset) ++{ ++ return -EINVAL; ++} ++ ++static void ++ifxmips_ebu_set(struct gpio_chip *chip, unsigned offset, int value) ++{ ++ if(value) ++ shadow |= (1 << offset); ++ else ++ shadow &= ~(1 << offset); ++ ifxmips_w32(IFXMIPS_EBU_BUSCON, IFXMIPS_EBU_BUSCON1); ++ *((__u16*)virt) = shadow; ++ ifxmips_w32(IFXMIPS_EBU_BUSCON | IFXMIPS_EBU_WP, IFXMIPS_EBU_BUSCON1); ++} ++ ++static struct gpio_chip ++ifxmips_ebu_chip = ++{ ++ .label = "ifxmips_ebu", ++ .direction_input = ifxmips_ebu_direction_input, ++ .direction_output = ifxmips_ebu_direction_output, ++ .set = ifxmips_ebu_set, ++ .get = ifxmips_ebu_get, ++ .base = 32, ++ .ngpio = 16, ++ .can_sleep = 1, ++ .owner = THIS_MODULE, ++}; ++ ++static int __devinit ++ifxmips_ebu_probe(struct platform_device *dev) ++{ ++ ifxmips_w32(IFXMIPS_EBU_START | 0x1, IFXMIPS_EBU_ADDRSEL1); ++ ifxmips_w32(IFXMIPS_EBU_BUSCON | IFXMIPS_EBU_WP, IFXMIPS_EBU_BUSCON1); ++ virt = ioremap_nocache(IFXMIPS_EBU_START, IFXMIPS_EBU_MAX); ++ if(gpiochip_add(&ifxmips_ebu_chip)) ++ return -EINVAL; ++ return 0; ++} ++ ++static int ++ifxmips_ebu_remove(struct platform_device *dev) ++{ ++ return gpiochip_remove(&ifxmips_ebu_chip); ++} ++ ++static struct platform_driver ++ifxmips_ebu_driver = { ++ .probe = ifxmips_ebu_probe, ++ .remove = ifxmips_ebu_remove, ++ .driver = { ++ .name = "ifxmips_ebu", ++ .owner = THIS_MODULE, ++ }, ++}; ++ ++static int __init ++ifxmips_ebu_init(void) ++{ ++ return platform_driver_register(&ifxmips_ebu_driver); ++} ++ ++static void __exit ++ifxmips_ebu_exit(void) ++{ ++ platform_driver_unregister(&ifxmips_ebu_driver); ++} ++ ++module_init(ifxmips_ebu_init); ++module_exit(ifxmips_ebu_exit); ++ ++MODULE_AUTHOR("John Crispin "); ++MODULE_LICENSE("GPL v2"); ++MODULE_DESCRIPTION("ifxmips - EBU Latch GPIO-Expander"); diff --git a/target/linux/iop32x/Makefile b/target/linux/iop32x/Makefile index b31ca0a0e..8dd2c1b01 100644 --- a/target/linux/iop32x/Makefile +++ b/target/linux/iop32x/Makefile @@ -11,7 +11,7 @@ BOARD:=iop32x BOARDNAME:=Intel IOP32x FEATURES:=squashfs -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/ixp4xx/Makefile b/target/linux/ixp4xx/Makefile index ba4e41f8f..6f822e6b9 100644 --- a/target/linux/ixp4xx/Makefile +++ b/target/linux/ixp4xx/Makefile @@ -12,7 +12,7 @@ BOARDNAME:=Intel IXP4xx FEATURES:=squashfs SUBTARGETS=generic harddisk -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/ixp4xx/patches-2.6.32/191-cambria_optional_uart.patch b/target/linux/ixp4xx/patches-2.6.32/191-cambria_optional_uart.patch index 0e12f6e87..0b694c3bf 100644 --- a/target/linux/ixp4xx/patches-2.6.32/191-cambria_optional_uart.patch +++ b/target/linux/ixp4xx/patches-2.6.32/191-cambria_optional_uart.patch @@ -124,7 +124,7 @@ unsigned int custom_divisor; --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c -@@ -406,6 +406,20 @@ static void mem_serial_out(struct uart_p +@@ -409,6 +409,20 @@ static void mem_serial_out(struct uart_p writeb(value, p->membase + offset); } @@ -145,7 +145,7 @@ static void mem32_serial_out(struct uart_port *p, int offset, int value) { offset = map_8250_out_reg(p, offset) << p->regshift; -@@ -499,6 +513,11 @@ static void set_io_from_upio(struct uart +@@ -502,6 +516,11 @@ static void set_io_from_upio(struct uart p->serial_out = mem32_serial_out; break; @@ -157,7 +157,7 @@ #ifdef CONFIG_SERIAL_8250_AU1X00 case UPIO_AU: p->serial_in = au_serial_in; -@@ -531,6 +550,7 @@ serial_out_sync(struct uart_8250_port *u +@@ -534,6 +553,7 @@ serial_out_sync(struct uart_8250_port *u switch (p->iotype) { case UPIO_MEM: case UPIO_MEM32: @@ -165,7 +165,7 @@ #ifdef CONFIG_SERIAL_8250_AU1X00 case UPIO_AU: #endif -@@ -2449,6 +2469,7 @@ static int serial8250_request_std_resour +@@ -2450,6 +2470,7 @@ static int serial8250_request_std_resour case UPIO_MEM32: case UPIO_MEM: case UPIO_DWAPB: @@ -173,7 +173,7 @@ if (!up->port.mapbase) break; -@@ -2486,6 +2507,7 @@ static void serial8250_release_std_resou +@@ -2487,6 +2508,7 @@ static void serial8250_release_std_resou case UPIO_MEM32: case UPIO_MEM: case UPIO_DWAPB: @@ -181,7 +181,7 @@ if (!up->port.mapbase) break; -@@ -2958,6 +2980,7 @@ static int __devinit serial8250_probe(st +@@ -2959,6 +2981,7 @@ static int __devinit serial8250_probe(st port.serial_in = p->serial_in; port.serial_out = p->serial_out; port.dev = &dev->dev; @@ -189,7 +189,7 @@ if (share_irqs) port.irqflags |= IRQF_SHARED; ret = serial8250_register_port(&port); -@@ -3108,6 +3131,7 @@ int serial8250_register_port(struct uart +@@ -3109,6 +3132,7 @@ int serial8250_register_port(struct uart uart->port.iotype = port->iotype; uart->port.flags = port->flags | UPF_BOOT_AUTOCONF; uart->port.mapbase = port->mapbase; diff --git a/target/linux/malta/Makefile b/target/linux/malta/Makefile index 17b1790e8..bcd2526fa 100644 --- a/target/linux/malta/Makefile +++ b/target/linux/malta/Makefile @@ -12,7 +12,7 @@ BOARDNAME:=MIPS Malta CoreLV board (qemu) FEATURES:=ramdisk CFLAGS:=-Os -pipe -mips32r2 -mtune=mips32r2 -funit-at-a-time -LINUX_VERSION:=2.6.32.8 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/omap35xx/Makefile b/target/linux/omap35xx/Makefile index 11b25f4d9..3a13edbe1 100644 --- a/target/linux/omap35xx/Makefile +++ b/target/linux/omap35xx/Makefile @@ -12,7 +12,7 @@ BOARDNAME:=TI OMAP35xx FEATURES:=broken SUBTARGETS=generic -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 KERNELNAME:="uImage" DEVICE_TYPE=developerboard diff --git a/target/linux/orion/Makefile b/target/linux/orion/Makefile index 196e93f84..ea7cee3a7 100644 --- a/target/linux/orion/Makefile +++ b/target/linux/orion/Makefile @@ -13,7 +13,7 @@ FEATURES:=squashfs SUBTARGETS=generic harddisk CFLAGS=-Os -pipe -march=armv5t -mtune=xscale -funit-at-a-time -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/orion/patches/090-wrt350nv2_gpio_leds_buttons.patch b/target/linux/orion/patches/090-wrt350nv2_gpio_leds_buttons.patch index e18569328..30f75fc8a 100644 --- a/target/linux/orion/patches/090-wrt350nv2_gpio_leds_buttons.patch +++ b/target/linux/orion/patches/090-wrt350nv2_gpio_leds_buttons.patch @@ -1,5 +1,5 @@ ---- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c 2009-12-08 02:39:46.000000000 +0100 -+++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c 2010-01-13 15:25:17.000000000 +0100 +--- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c ++++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c @@ -15,6 +15,9 @@ #include #include @@ -91,7 +91,7 @@ static struct orion5x_mpp_mode wrt350n_v2_mpp_modes[] __initdata = { { 0, MPP_GPIO }, /* Power LED green (0=on) */ { 1, MPP_GPIO }, /* Security LED (0=on) */ -@@ -140,6 +217,8 @@ +@@ -140,6 +217,8 @@ static void __init wrt350n_v2_init(void) orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE, WRT350N_V2_NOR_BOOT_SIZE); platform_device_register(&wrt350n_v2_nor_flash); diff --git a/target/linux/orion/patches/100-openwrt_partition_map.patch b/target/linux/orion/patches/100-openwrt_partition_map.patch index 79e1be7ee..f179a053d 100644 --- a/target/linux/orion/patches/100-openwrt_partition_map.patch +++ b/target/linux/orion/patches/100-openwrt_partition_map.patch @@ -1,6 +1,6 @@ --- a/arch/arm/mach-orion5x/wrt350n-v2-setup.c +++ b/arch/arm/mach-orion5x/wrt350n-v2-setup.c -@@ -135,11 +135,11 @@ static struct mtd_partition wrt350n_v2_nor_flash_partitions +@@ -135,11 +135,11 @@ static struct mtd_partition wrt350n_v2_n { .name = "kernel", .offset = 0x00000000, @@ -9,13 +9,13 @@ }, { .name = "rootfs", - .offset = 0x001a0000, -+ .offset = 0x00100000, // change to kernel mtd size here (2/3) - .size = 0x005c0000, ++ .offset = 0x00100000, // change to kernel mtd size here (2/3) + .size = 0x00650000, // adopt to kernel mtd size here (3/3) = 0x00750000 - }, { .name = "lang", .offset = 0x00760000, -@@ -152,6 +152,14 @@ static struct mtd_partition wrt350n_v2_nor_flash_partitions +@@ -152,6 +152,14 @@ static struct mtd_partition wrt350n_v2_n .name = "u-boot", .offset = 0x007c0000, .size = 0x00040000, diff --git a/target/linux/orion/patches/101-wnr854t_partition_map.patch b/target/linux/orion/patches/101-wnr854t_partition_map.patch index 4e96038ed..c754106d2 100644 --- a/target/linux/orion/patches/101-wnr854t_partition_map.patch +++ b/target/linux/orion/patches/101-wnr854t_partition_map.patch @@ -1,6 +1,6 @@ --- a/arch/arm/mach-orion5x/wnr854t-setup.c +++ b/arch/arm/mach-orion5x/wnr854t-setup.c -@@ -67,6 +67,10 @@ static struct mtd_partition wnr854t_nor_flash_partitions +@@ -67,6 +67,10 @@ static struct mtd_partition wnr854t_nor_ .name = "uboot", .offset = 0x00760000, .size = 0x00040000, diff --git a/target/linux/ppc40x/Makefile b/target/linux/ppc40x/Makefile index f581569c1..905574b99 100644 --- a/target/linux/ppc40x/Makefile +++ b/target/linux/ppc40x/Makefile @@ -12,7 +12,7 @@ BOARDNAME:=AMCC/IBM PPC40x FEATURES:=squashfs CFLAGS:=-Os -pipe -funit-at-a-time -mcpu=405 -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/ppc44x/Makefile b/target/linux/ppc44x/Makefile index da576ce08..df67306ec 100644 --- a/target/linux/ppc44x/Makefile +++ b/target/linux/ppc44x/Makefile @@ -12,7 +12,7 @@ BOARDNAME:=AMCC/IBM PPC44x FEATURES:=squashfs CFLAGS:=-Os -pipe -funit-at-a-time -mcpu=440 -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/ps3/modules.mk b/target/linux/ps3/modules.mk new file mode 100644 index 000000000..f38ccc413 --- /dev/null +++ b/target/linux/ps3/modules.mk @@ -0,0 +1,16 @@ +define KernelPackage/ps3lan + SUBMENU:=Network Devices + TITLE:=PS3-Lan support + DEPENDS:=@LINUX_2_6 @TARGET_ps3 + KCONFIG:= \ + CONFIG_GELIC_NET \ + CONFIG_GELIC_WIRELESS=y + FILES:=$(LINUX_DIR)/drivers/net/ps3_gelic.$(LINUX_KMOD_SUFFIX) + AUTOLOAD:=$(call AutoLoad,50,ps3_gelic) +endef + +define KernelPackage/ps3lan/description + Kernel module for PS3 Networking. Includes Gb Ethernet and WLAN +endef + +$(eval $(call KernelPackage,ps3lan)) diff --git a/target/linux/pxa/Makefile b/target/linux/pxa/Makefile index d728e776c..ba05bef84 100644 --- a/target/linux/pxa/Makefile +++ b/target/linux/pxa/Makefile @@ -11,7 +11,7 @@ BOARD:=pxa BOARDNAME:=Marvell/Intel PXA2xx FEATURES:=squashfs -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/pxcab/config-2.6.31 b/target/linux/pxcab/config-2.6.31 deleted file mode 100644 index 3221b038e..000000000 --- a/target/linux/pxcab/config-2.6.31 +++ /dev/null @@ -1,466 +0,0 @@ -CONFIG_64BIT=y -CONFIG_ALTIVEC=y -CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y -CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y -CONFIG_ARCH_HAS_ILOG2_U32=y -CONFIG_ARCH_HAS_ILOG2_U64=y -CONFIG_ARCH_HAS_WALK_MEMORY=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -CONFIG_ARCH_MEMORY_PROBE=y -CONFIG_ARCH_NO_VIRT_TO_BUS=y -CONFIG_ARCH_PHYS_ADDR_T_64BIT=y -CONFIG_ARCH_POPULATES_NODE_MAP=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_DEFAULT=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_MSI=y -CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y -# CONFIG_ARPD is not set -CONFIG_AUDIT_ARCH=y -CONFIG_AXON_RAM=m -# CONFIG_BACKTRACE_SELF_TEST is not set -# CONFIG_BINARY_PRINTF is not set -CONFIG_BITREVERSE=y -CONFIG_BLK_DEV_LOOP=y -CONFIG_BLK_DEV_RAM_COUNT=16 -CONFIG_BLK_DEV_RAM_SIZE=65535 -CONFIG_BLK_DEV_RAM=y -CONFIG_BLK_DEV_SD=y -# CONFIG_BLK_DEV_SR_VENDOR is not set -CONFIG_BLK_DEV_SR=y -CONFIG_BLOCK_COMPAT=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -# CONFIG_BOOTX_TEXT is not set -CONFIG_BOUNCE=y -# CONFIG_BSD_PROCESS_ACCT is not set -# CONFIG_CBE_CPUFREQ_PMI_ENABLE is not set -CONFIG_CBE_CPUFREQ_SPU_GOVERNOR=y -CONFIG_CBE_CPUFREQ=y -CONFIG_CBE_RAS=y -CONFIG_CBE_THERM=y -# CONFIG_CGROUP_SCHED is not set -CONFIG_CMDLINE_BOOL=y -# CONFIG_CNIC is not set -# CONFIG_CODE_PATCHING_SELFTEST is not set -CONFIG_COMPAT_BINFMT_ELF=y -CONFIG_COMPAT_BRK=y -CONFIG_COMPAT=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_CONSTRUCTORS=y -# CONFIG_CPU_FREQ_DEBUG is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ=y -CONFIG_CRC16=y -CONFIG_CRC_CCITT=m -# CONFIG_CRYPTO is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_FS is not set -CONFIG_DEBUG_INFO=y -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_PAGEALLOC is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_SHIRQ is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_STACKOVERFLOW is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 -# CONFIG_DEFAULT_UIMAGE is not set -CONFIG_DETECT_HUNG_TASK=y -CONFIG_DETECT_SOFTLOCKUP=y -CONFIG_DEVKMEM=y -CONFIG_DEVPORT=y -CONFIG_DNOTIFY=y -CONFIG_DTC=y -CONFIG_DUMMY_CONSOLE=y -CONFIG_EARLY_PRINTK=y -# CONFIG_EEH is not set -CONFIG_ELF_CORE=y -# CONFIG_ENABLE_WARN_DEPRECATED is not set -CONFIG_EXT2_FS=y -CONFIG_EXT3_FS=y -# CONFIG_EXT4DEV_COMPAT is not set -# CONFIG_EXT4_FS_XATTR is not set -CONFIG_EXT4_FS=y -CONFIG_FAIR_GROUP_SCHED=y -CONFIG_FAT_FS=y -# CONFIG_FAULT_INJECTION is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -CONFIG_FIRMWARE_IN_KERNEL=y -# CONFIG_FLATMEM_MANUAL is not set -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -# CONFIG_FONTS is not set -CONFIG_FORCE_MAX_ZONEORDER=13 -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FRAMEBUFFER_CONSOLE=y -CONFIG_FRAME_WARN=2048 -# CONFIG_FSL_ULI1575 is not set -CONFIG_FSNOTIFY=y -# CONFIG_FTR_FIXUP_SELFTEST is not set -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_ISA_DMA=y -# CONFIG_GENERIC_TBSYNC is not set -CONFIG_GENERIC_TIME_VSYSCALL=y -# CONFIG_GEN_RTC is not set -CONFIG_GROUP_SCHED=y -# CONFIG_HAMRADIO is not set -# CONFIG_HANGCHECK_TIMER is not set -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -# CONFIG_HAS_RAPIDIO is not set -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_DMA_ATTRS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACER=y -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IOREMAP_PROT=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_HAVE_LMB=y -CONFIG_HAVE_MEMORY_PRESENT=y -CONFIG_HAVE_MLOCKED_PAGE_BIT=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PERF_COUNTERS=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_HAVE_SYSCALL_WRAPPERS=y -CONFIG_HID_APPLE=y -CONFIG_HID_BELKIN=y -CONFIG_HID_CHERRY=y -# CONFIG_HID_DRAGONRISE is not set -CONFIG_HID_EZKEY=y -# CONFIG_HID_GREENASIA is not set -# CONFIG_HID_KENSINGTON is not set -# CONFIG_HID_KYE is not set -CONFIG_HID_LOGITECH=y -CONFIG_HID_MICROSOFT=y -# CONFIG_HID_NTRIG is not set -# CONFIG_HID_SMARTJOYPLUS is not set -CONFIG_HID_SONY=y -CONFIG_HID_SUNPLUS=y -CONFIG_HID_SUPPORT=y -# CONFIG_HID_THRUSTMASTER is not set -# CONFIG_HID_TOPSEED is not set -CONFIG_HID=y -# CONFIG_HID_ZEROPLUS is not set -# CONFIG_HIGH_RES_TIMERS is not set -# CONFIG_HUGETLBFS is not set -CONFIG_HVC_CONSOLE=y -CONFIG_HVC_DRIVER=y -CONFIG_HVC_IRQ=y -# CONFIG_HVC_RTAS is not set -# CONFIG_HVCS is not set -# CONFIG_HVC_UDBG is not set -CONFIG_HW_CONSOLE=y -# CONFIG_HW_RANDOM is not set -# CONFIG_HZ_100 is not set -CONFIG_HZ=250 -CONFIG_HZ_250=y -# CONFIG_IBM_BSR is not set -# CONFIG_IBMEBUS is not set -CONFIG_IBM_NEW_EMAC_EMAC4=y -CONFIG_IBM_NEW_EMAC_RGMII=y -CONFIG_IBM_NEW_EMAC_TAH=y -CONFIG_IBM_NEW_EMAC_ZMII=y -CONFIG_IBMVIO=y -# CONFIG_IEEE802154 is not set -# CONFIG_INITRAMFS_COMPRESSION_NONE is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INOTIFY_USER=y -CONFIG_INOTIFY=y -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_JOYSTICK=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT=y -# CONFIG_INPUT_YEALINK is not set -CONFIG_IOMMU_HELPER=y -# CONFIG_IOMMU_VMERGE is not set -# CONFIG_IP_ADVANCED_ROUTER is not set -# CONFIG_IPIC is not set -# CONFIG_IP_MULTICAST is not set -# CONFIG_IRQ_ALL_CPUS is not set -CONFIG_IRQ_PER_CPU=y -# CONFIG_IRQSTACKS is not set -CONFIG_ISA_DMA_API=y -CONFIG_ISO9660_FS=y -CONFIG_JBD2=y -CONFIG_JBD=y -# CONFIG_JOYSTICK_A3D is not set -# CONFIG_JOYSTICK_ADI is not set -# CONFIG_JOYSTICK_ANALOG is not set -# CONFIG_JOYSTICK_COBRA is not set -# CONFIG_JOYSTICK_GF2K is not set -# CONFIG_JOYSTICK_GRIP is not set -# CONFIG_JOYSTICK_GRIP_MP is not set -# CONFIG_JOYSTICK_GUILLEMOT is not set -# CONFIG_JOYSTICK_IFORCE is not set -# CONFIG_JOYSTICK_INTERACT is not set -# CONFIG_JOYSTICK_JOYDUMP is not set -# CONFIG_JOYSTICK_MAGELLAN is not set -# CONFIG_JOYSTICK_SIDEWINDER is not set -# CONFIG_JOYSTICK_SPACEBALL is not set -# CONFIG_JOYSTICK_SPACEORB is not set -# CONFIG_JOYSTICK_STINGER is not set -# CONFIG_JOYSTICK_TMDC is not set -# CONFIG_JOYSTICK_TWIDJOY is not set -# CONFIG_JOYSTICK_WARRIOR is not set -# CONFIG_JOYSTICK_XPAD is not set -# CONFIG_JOYSTICK_ZHENHUA is not set -# CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS=y -CONFIG_KERNEL_START=0xc000000000000000 -CONFIG_KEXEC=y -# CONFIG_KGDB is not set -# CONFIG_KMEMCHECK is not set -# CONFIG_LEDS_TRIGGERS is not set -CONFIG_LOCK_KERNEL=y -# CONFIG_LOCK_STAT is not set -CONFIG_LOG_BUF_SHIFT=15 -# CONFIG_LOGO is not set -# CONFIG_LPARCFG is not set -# CONFIG_MEDIA_SUPPORT is not set -CONFIG_MEMORY_HOTPLUG_SPARSE=y -CONFIG_MEMORY_HOTPLUG=y -# CONFIG_MEMORY_HOTREMOVE is not set -CONFIG_MIGRATION=y -# CONFIG_MINI_FO is not set -# CONFIG_MISC_DEVICES is not set -CONFIG_MMIO_NVRAM=y -# CONFIG_MPIC_WEIRD is not set -CONFIG_MPIC=y -CONFIG_MSDOS_FS=y -# CONFIG_MSI_BITMAP_SELFTEST is not set -CONFIG_MTD_OF_PARTS=y -CONFIG_MTD_PHYSMAP_OF=y -CONFIG_NEED_MULTIPLE_NODES=y -# CONFIG_NET_ETHERNET is not set -# CONFIG_NETFILTER is not set -# CONFIG_NETWORK_FILESYSTEMS is not set -CONFIG_NLS_CODEPAGE_437=y -CONFIG_NLS_ISO8859_1=y -CONFIG_NLS=y -CONFIG_NODES_SHIFT=4 -CONFIG_NODES_SPAN_OTHER_NODES=y -CONFIG_NR_CPUS=2 -CONFIG_NUMA=y -CONFIG_OF_DEVICE=y -CONFIG_OF_MDIO=y -CONFIG_OF=y -# CONFIG_PACKET_MMAP is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PAGE_OFFSET=0xc000000000000000 -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_PCI=y -# CONFIG_PCI_DEBUG is not set -CONFIG_PCI_DOMAINS=y -# CONFIG_PCIEPORTBUS is not set -CONFIG_PCSPKR_PLATFORM=y -# CONFIG_PERF_COUNTERS is not set -CONFIG_PHYLIB=y -# CONFIG_PHYP_DUMP is not set -CONFIG_PHYS_ADDR_T_64BIT=y -CONFIG_PHYSICAL_START=0x00000000 -CONFIG_POWER3=y -# CONFIG_POWER4_ONLY is not set -CONFIG_POWER4=y -# CONFIG_PPC_16K_PAGES is not set -# CONFIG_PPC_256K_PAGES is not set -CONFIG_PPC_4K_PAGES=y -# CONFIG_PPC_64K_PAGES is not set -CONFIG_PPC64=y -# CONFIG_PPC_970_NAP is not set -CONFIG_PPC_BOOK3S_64=y -CONFIG_PPC_BOOK3S=y -CONFIG_PPC_CELL_COMMON=y -# CONFIG_PPC_CELLEB is not set -CONFIG_PPC_CELL_NATIVE=y -# CONFIG_PPC_CELL_QPACE is not set -CONFIG_PPC_CELL=y -# CONFIG_PPC_CLOCK is not set -CONFIG_PPC_DCR_MMIO=y -# CONFIG_PPC_DCR_NATIVE is not set -CONFIG_PPC_DCR=y -# CONFIG_PPC_DISABLE_WERROR is not set -# CONFIG_PPC_EARLY_DEBUG is not set -CONFIG_PPC_FPU=y -# CONFIG_PPC_HAS_HASH_64K is not set -CONFIG_PPC_HAVE_PMU_SUPPORT=y -CONFIG_PPC_I8259=y -CONFIG_PPC_IBM_CELL_BLADE=y -# CONFIG_PPC_IBM_CELL_POWERBUTTON is not set -CONFIG_PPC_IBM_CELL_RESETBUTTON=y -CONFIG_PPC_INDIRECT_IO=y -# CONFIG_PPC_INDIRECT_PCI is not set -# CONFIG_PPC_ISERIES is not set -# CONFIG_PPC_MAPLE is not set -# CONFIG_PPC_MM_SLICES is not set -# CONFIG_PPC_MPC106 is not set -CONFIG_PPC_NATIVE=y -CONFIG_PPC_OF_BOOT_TRAMPOLINE=y -CONFIG_PPC_OF_PLATFORM_PCI=y -CONFIG_PPC_OF=y -# CONFIG_PPC_PASEMI is not set -CONFIG_PPC_PCI_CHOICE=y -# CONFIG_PPC_PMAC is not set -# CONFIG_PPC_PS3 is not set -CONFIG_PPC_PSERIES=y -CONFIG_PPC_RTAS=y -# CONFIG_PPC_SMLPAR is not set -# CONFIG_PPC_SPLPAR is not set -CONFIG_PPC_STD_MMU_64=y -CONFIG_PPC_STD_MMU=y -CONFIG_PPC_UDBG_16550=y -CONFIG_PPC_WERROR=y -CONFIG_PPC=y -CONFIG_PPP_ASYNC=m -CONFIG_PPP=m -CONFIG_PPPOE=m -# CONFIG_PPS is not set -# CONFIG_PQ2ADS is not set -CONFIG_PRINT_STACK_DEPTH=64 -CONFIG_PROC_DEVICETREE=y -CONFIG_PROC_PAGE_MONITOR=y -# CONFIG_PROVE_LOCKING is not set -# CONFIG_RCU_TORTURE_TEST is not set -# CONFIG_RELOCATABLE is not set -CONFIG_RTAS_ERROR_LOGGING=y -CONFIG_RTAS_FLASH=y -CONFIG_RTAS_PROC=y -# CONFIG_RT_GROUP_SCHED is not set -# CONFIG_RTL8306_PHY is not set -# CONFIG_RT_MUTEX_TESTER is not set -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -# CONFIG_SCANLOG is not set -CONFIG_SCHED_DEBUG=y -# CONFIG_SCHED_HRTICK is not set -CONFIG_SCHED_OMIT_FRAME_POINTER=y -# CONFIG_SCHED_SMT is not set -# CONFIG_SCHEDSTATS is not set -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_PROC_FS is not set -CONFIG_SCSI=y -# CONFIG_SERIAL_8250_EXTENDED is not set -# CONFIG_SERIAL_ICOM is not set -# CONFIG_SERIAL_OF_PLATFORM is not set -# CONFIG_SERIAL_OF_PLATFORM_NWPSERIAL is not set -# CONFIG_SIMPLE_GPIO is not set -# CONFIG_SLAB is not set -CONFIG_SLHC=m -# CONFIG_SLOW_WORK is not set -CONFIG_SLUB=y -CONFIG_SMP=y -CONFIG_SPARSEMEM_EXTREME=y -CONFIG_SPARSEMEM_MANUAL=y -CONFIG_SPARSEMEM_VMEMMAP_ENABLE=y -# CONFIG_SPARSEMEM_VMEMMAP is not set -CONFIG_SPARSEMEM=y -# CONFIG_SPIDER_NET is not set -CONFIG_SPU_BASE=y -CONFIG_SPU_FS=y -# CONFIG_SQUASHFS is not set -CONFIG_STOP_MACHINE=y -# CONFIG_SWAP is not set -# CONFIG_SWIOTLB is not set -# CONFIG_SYSCTL_SYSCALL_CHECK is not set -CONFIG_SYSVIPC_COMPAT=y -# CONFIG_TEXTSEARCH is not set -CONFIG_TIGON3=y -# CONFIG_TIMER_STATS is not set -CONFIG_TRACING_SUPPORT=y -CONFIG_TUNE_CELL=y -# CONFIG_U3_DART is not set -CONFIG_UDBG_RTAS_CONSOLE=y -CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug2" -# CONFIG_USB_DEVICEFS is not set -CONFIG_USB_EHCI_HCD_PPC_OF=y -CONFIG_USB_EHCI_HCD=y -# CONFIG_USB_EHCI_ROOT_HUB_TT is not set -CONFIG_USB_HID=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -# CONFIG_USB_OHCI_HCD_PPC_OF_BE is not set -# CONFIG_USB_OHCI_HCD_PPC_OF is not set -# CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set -CONFIG_USB_OHCI_HCD=y -# CONFIG_USB_STORAGE_ALAUDA is not set -# CONFIG_USB_STORAGE_DATAFAB is not set -# CONFIG_USB_STORAGE_FREECOM is not set -# CONFIG_USB_STORAGE_JUMPSHOT is not set -# CONFIG_USB_STORAGE_KARMA is not set -# CONFIG_USB_STORAGE_SDDR09 is not set -# CONFIG_USB_STORAGE_SDDR55 is not set -# CONFIG_USB_STORAGE_USBAT is not set -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -# CONFIG_USB_UHCI_HCD is not set -# CONFIG_USB_XHCI_HCD is not set -CONFIG_USB=y -CONFIG_USE_GENERIC_SMP_HELPERS=y -CONFIG_USER_SCHED=y -CONFIG_VFAT_FS=y -# CONFIG_VGA_CONSOLE is not set -CONFIG_VIDEO_OUTPUT_CONTROL=y -CONFIG_VIRT_CPU_ACCOUNTING=y -# CONFIG_VLAN_8021Q is not set -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_VSX is not set -CONFIG_VT_CONSOLE=y -CONFIG_VT_HW_CONSOLE_BINDING=y -CONFIG_VT=y -# CONFIG_WATCHDOG is not set -# CONFIG_WIRELESS is not set -# CONFIG_WLAN_80211 is not set -CONFIG_WORD_SIZE=64 -CONFIG_XICS=y -# CONFIG_XMON is not set -# CONFIG_ZISOFS is not set diff --git a/target/linux/ramips/Makefile b/target/linux/ramips/Makefile index be1d122f5..8eac4f6ef 100644 --- a/target/linux/ramips/Makefile +++ b/target/linux/ramips/Makefile @@ -13,7 +13,7 @@ SUBTARGETS:=rt288x rt305x CFLAGS:=-Os -pipe -mips32r2 -mtune=mips32r2 -funit-at-a-time FEATURES:=squashfs broken -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk DEFAULT_PACKAGES+=kmod-leds-gpio diff --git a/target/linux/ramips/patches-2.6.32/101-rt288x_serial_driver_hack.patch b/target/linux/ramips/patches-2.6.32/101-rt288x_serial_driver_hack.patch index 06d921f21..8e47aa3f1 100644 --- a/target/linux/ramips/patches-2.6.32/101-rt288x_serial_driver_hack.patch +++ b/target/linux/ramips/patches-2.6.32/101-rt288x_serial_driver_hack.patch @@ -1,6 +1,6 @@ --- a/drivers/serial/8250.c +++ b/drivers/serial/8250.c -@@ -298,9 +298,9 @@ static const struct serial8250_config ua +@@ -301,9 +301,9 @@ static const struct serial8250_config ua }, }; @@ -12,7 +12,7 @@ static const u8 au_io_in_map[] = { [UART_RX] = 0, [UART_IER] = 2, -@@ -418,7 +418,7 @@ static unsigned int mem32_serial_in(stru +@@ -421,7 +421,7 @@ static unsigned int mem32_serial_in(stru return readl(p->membase + offset); } @@ -21,7 +21,7 @@ static unsigned int au_serial_in(struct uart_port *p, int offset) { offset = map_8250_in_reg(p, offset) << p->regshift; -@@ -499,7 +499,7 @@ static void set_io_from_upio(struct uart +@@ -502,7 +502,7 @@ static void set_io_from_upio(struct uart p->serial_out = mem32_serial_out; break; @@ -30,7 +30,7 @@ case UPIO_AU: p->serial_in = au_serial_in; p->serial_out = au_serial_out; -@@ -531,7 +531,7 @@ serial_out_sync(struct uart_8250_port *u +@@ -534,7 +534,7 @@ serial_out_sync(struct uart_8250_port *u switch (p->iotype) { case UPIO_MEM: case UPIO_MEM32: @@ -39,7 +39,7 @@ case UPIO_AU: #endif case UPIO_DWAPB: -@@ -569,8 +569,8 @@ static inline void _serial_dl_write(stru +@@ -572,8 +572,8 @@ static inline void _serial_dl_write(stru serial_outp(up, UART_DLM, value >> 8 & 0xff); } @@ -50,7 +50,7 @@ static int serial_dl_read(struct uart_8250_port *up) { if (up->port.iotype == UPIO_AU) -@@ -777,22 +777,19 @@ static int size_fifo(struct uart_8250_po +@@ -780,22 +780,19 @@ static int size_fifo(struct uart_8250_po */ static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p) { @@ -79,7 +79,7 @@ serial_outp(p, UART_LCR, old_lcr); return id; -@@ -1214,7 +1211,7 @@ static void autoconfig(struct uart_8250_ +@@ -1217,7 +1214,7 @@ static void autoconfig(struct uart_8250_ } #endif diff --git a/target/linux/rb532/Makefile b/target/linux/rb532/Makefile index fa8a491c6..3b2716d8a 100644 --- a/target/linux/rb532/Makefile +++ b/target/linux/rb532/Makefile @@ -11,7 +11,7 @@ BOARD:=rb532 BOARDNAME:=Mikrotik RouterBoard 532 FEATURES:=jffs2 pci tgz -LINUX_VERSION:=2.6.33.1 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk DEFAULT_PACKAGES += wpad-mini kmod-madwifi kmod-input-rb532 diff --git a/target/linux/rb532/config-2.6.30 b/target/linux/rb532/config-2.6.30 deleted file mode 100644 index f6f0db272..000000000 --- a/target/linux/rb532/config-2.6.30 +++ /dev/null @@ -1,181 +0,0 @@ -CONFIG_32BIT=y -# CONFIG_64BIT is not set -# CONFIG_ARCH_HAS_ILOG2_U32 is not set -# CONFIG_ARCH_HAS_ILOG2_U64 is not set -CONFIG_ARCH_POPULATES_NODE_MAP=y -CONFIG_ARCH_REQUIRE_GPIOLIB=y -# CONFIG_ARCH_SUPPORTS_MSI is not set -CONFIG_ARCH_SUPPORTS_OPROFILE=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ATA=y -# CONFIG_BCM47XX is not set -# CONFIG_BINARY_PRINTF is not set -CONFIG_BITREVERSE=y -CONFIG_BLK_DEV_SD=y -CONFIG_BOOT_RAW=y -# CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set -# CONFIG_CAVIUM_OCTEON_SIMULATOR is not set -CONFIG_CC_OPTIMIZE_FOR_SIZE=y -CONFIG_CEVT_R4K=y -CONFIG_CEVT_R4K_LIB=y -# CONFIG_CLASSIC_RCU is not set -# CONFIG_CPU_BIG_ENDIAN is not set -# CONFIG_CPU_CAVIUM_OCTEON is not set -CONFIG_CPU_HAS_LLSC=y -CONFIG_CPU_HAS_PREFETCH=y -CONFIG_CPU_HAS_SYNC=y -CONFIG_CPU_LITTLE_ENDIAN=y -# CONFIG_CPU_LOONGSON2 is not set -CONFIG_CPU_MIPS32=y -CONFIG_CPU_MIPS32_R1=y -# CONFIG_CPU_MIPS32_R2 is not set -# CONFIG_CPU_MIPS64_R1 is not set -# CONFIG_CPU_MIPS64_R2 is not set -CONFIG_CPU_MIPSR1=y -# CONFIG_CPU_NEVADA is not set -# CONFIG_CPU_R10000 is not set -# CONFIG_CPU_R3000 is not set -# CONFIG_CPU_R4300 is not set -# CONFIG_CPU_R4X00 is not set -# CONFIG_CPU_R5000 is not set -# CONFIG_CPU_R5432 is not set -# CONFIG_CPU_R5500 is not set -# CONFIG_CPU_R6000 is not set -# CONFIG_CPU_R8000 is not set -# CONFIG_CPU_RM7000 is not set -# CONFIG_CPU_RM9000 is not set -# CONFIG_CPU_SB1 is not set -CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y -CONFIG_CPU_SUPPORTS_HIGHMEM=y -# CONFIG_CPU_TX39XX is not set -# CONFIG_CPU_TX49XX is not set -# CONFIG_CPU_VR41XX is not set -CONFIG_CSRC_R4K=y -CONFIG_CSRC_R4K_LIB=y -# CONFIG_DEBUG_FS is not set -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DEVPORT=y -# CONFIG_DM9000 is not set -CONFIG_DMA_NEED_PCI_MAP_STATE=y -CONFIG_DMA_NONCOHERENT=y -# CONFIG_ENABLE_WARN_DEPRECATED is not set -CONFIG_EXT2_FS=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CMOS_UPDATE=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_GPIO=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_GPIOLIB=y -CONFIG_GPIO_SYSFS=y -CONFIG_HARDWARE_WATCHPOINTS=y -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_ARCH_KGDB=y -# CONFIG_HAVE_GENERIC_DMA_COHERENT is not set -CONFIG_HAVE_IDE=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_OPROFILE=y -# CONFIG_HIGH_RES_TIMERS is not set -CONFIG_HW_HAS_PCI=y -CONFIG_HW_RANDOM=y -CONFIG_HZ=250 -# CONFIG_HZ_100 is not set -CONFIG_HZ_250=y -CONFIG_IMAGE_CMDLINE_HACK=y -CONFIG_INITRAMFS_SOURCE="" -CONFIG_IRQ_CPU=y -CONFIG_KEXEC=y -CONFIG_KORINA=y -# CONFIG_LEDS_GPIO is not set -CONFIG_LEDS_MIKROTIK_RB532=y -# CONFIG_LEMOTE_FULONG is not set -# CONFIG_MACH_ALCHEMY is not set -# CONFIG_MACH_DECSTATION is not set -# CONFIG_MACH_JAZZ is not set -# CONFIG_MACH_TX39XX is not set -# CONFIG_MACH_TX49XX is not set -# CONFIG_MACH_VR41XX is not set -CONFIG_MIKROTIK_RB532=y -CONFIG_MIPS=y -# CONFIG_MIPS_COBALT is not set -CONFIG_MIPS_L1_CACHE_SHIFT=4 -# CONFIG_MIPS_MACHINE is not set -# CONFIG_MIPS_MALTA is not set -CONFIG_MIPS_MT_DISABLED=y -# CONFIG_MIPS_MT_SMP is not set -# CONFIG_MIPS_MT_SMTC is not set -# CONFIG_MIPS_SIM is not set -CONFIG_MTD_BLOCK2MTD=y -CONFIG_MTD_CFI_ADV_OPTIONS=y -# CONFIG_MTD_CFI_AMDSTD is not set -CONFIG_MTD_CFI_GEOMETRY=y -# CONFIG_MTD_CFI_INTELEXT is not set -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -CONFIG_MTD_NAND=y -CONFIG_MTD_NAND_PLATFORM=y -CONFIG_MTD_NAND_VERIFY_WRITE=y -CONFIG_MTD_PHYSMAP=y -# CONFIG_MTD_ROOTFS_ROOT_DEV is not set -# CONFIG_MTD_ROOTFS_SPLIT is not set -CONFIG_NF_CONNTRACK=y -CONFIG_NF_CT_ACCT=y -# CONFIG_NO_IOPORT is not set -# CONFIG_NXP_STB220 is not set -# CONFIG_NXP_STB225 is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PATA_RB532=y -CONFIG_PCI=y -CONFIG_PCI_DOMAINS=y -CONFIG_PCSPKR_PLATFORM=y -# CONFIG_PMC_MSP is not set -# CONFIG_PMC_YOSEMITE is not set -# CONFIG_PNX8550_JBS is not set -# CONFIG_PNX8550_STB810 is not set -# CONFIG_PROBE_INITRD_HEADER is not set -CONFIG_RC32434_WDT=y -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_RCU_TRACE is not set -CONFIG_SCHED_OMIT_FRAME_POINTER=y -CONFIG_SCSI=y -# CONFIG_SCSI_LOWLEVEL is not set -# CONFIG_SCSI_MULTI_LUN is not set -# CONFIG_SCSI_PROC_FS is not set -# CONFIG_SERIAL_8250_EXTENDED is not set -# CONFIG_SGI_IP22 is not set -# CONFIG_SGI_IP27 is not set -# CONFIG_SGI_IP28 is not set -# CONFIG_SGI_IP32 is not set -# CONFIG_SIBYTE_BIGSUR is not set -# CONFIG_SIBYTE_CARMEL is not set -# CONFIG_SIBYTE_CRHINE is not set -# CONFIG_SIBYTE_CRHONE is not set -# CONFIG_SIBYTE_LITTLESUR is not set -# CONFIG_SIBYTE_RHONE is not set -# CONFIG_SIBYTE_SENTOSA is not set -# CONFIG_SIBYTE_SWARM is not set -# CONFIG_SLOW_WORK is not set -CONFIG_SWAP_IO_SPACE=y -CONFIG_SYS_HAS_CPU_MIPS32_R1=y -CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y -CONFIG_SYS_SUPPORTS_ARBIT_HZ=y -CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y -# CONFIG_TC35815 is not set -CONFIG_TRACING_SUPPORT=y -CONFIG_TRAD_SIGNALS=y -CONFIG_TREE_RCU=y -CONFIG_VIA_RHINE=y -CONFIG_VIA_RHINE_MMIO=y -CONFIG_YAFFS_9BYTE_TAGS=y -# CONFIG_YAFFS_ALWAYS_CHECK_CHUNK_ERASED is not set -CONFIG_YAFFS_AUTO_YAFFS2=y -# CONFIG_YAFFS_DISABLE_LAZY_LOAD is not set -# CONFIG_YAFFS_DISABLE_WIDE_TNODES is not set -CONFIG_YAFFS_FS=y -CONFIG_YAFFS_SHORT_NAMES_IN_RAM=y -CONFIG_YAFFS_YAFFS1=y -CONFIG_YAFFS_YAFFS2=y -CONFIG_ZONE_DMA_FLAG=0 diff --git a/target/linux/rb532/patches-2.6.30/001-cmdline_hack.patch b/target/linux/rb532/patches-2.6.30/001-cmdline_hack.patch deleted file mode 100644 index 246e502b7..000000000 --- a/target/linux/rb532/patches-2.6.30/001-cmdline_hack.patch +++ /dev/null @@ -1,20 +0,0 @@ ---- a/arch/mips/rb532/prom.c -+++ b/arch/mips/rb532/prom.c -@@ -67,6 +67,7 @@ static inline unsigned long tag2ul(char - return simple_strtoul(num, 0, 10); - } - -+extern char __image_cmdline[]; - void __init prom_setup_cmdline(void) - { - char cmd_line[CL_SIZE]; -@@ -109,6 +110,9 @@ void __init prom_setup_cmdline(void) - } - *(cp++) = ' '; - -+ strcpy(cp,(__image_cmdline)); -+ cp += strlen(__image_cmdline); -+ - i = strlen(arcs_cmdline); - if (i > 0) { - *(cp++) = ' '; diff --git a/target/linux/rb532/patches-2.6.30/002-rb532_nand_fixup.patch b/target/linux/rb532/patches-2.6.30/002-rb532_nand_fixup.patch deleted file mode 100644 index 82c191295..000000000 --- a/target/linux/rb532/patches-2.6.30/002-rb532_nand_fixup.patch +++ /dev/null @@ -1,48 +0,0 @@ ---- a/arch/mips/rb532/devices.c -+++ b/arch/mips/rb532/devices.c -@@ -140,6 +140,19 @@ static struct platform_device cf_slot0 = - }; - - /* Resources and device for NAND */ -+ -+/* -+ * We need to use the OLD Yaffs-1 OOB layout, otherwise the RB bootloader -+ * will not be able to find the kernel that we load. So set the oobinfo -+ * when creating the partitions -+ */ -+static struct nand_ecclayout rb532_nand_ecclayout = { -+ .eccbytes = 6, -+ .eccpos = { 8, 9, 10, 13, 14, 15 }, -+ .oobavail = 9, -+ .oobfree = { { 0, 4 }, { 6, 2 }, { 11, 2 }, { 4, 1 } } -+}; -+ - static int rb532_dev_ready(struct mtd_info *mtd) - { - return gpio_get_value(GPIO_RDY); -@@ -281,6 +294,16 @@ static void __init parse_mac_addr(char * - /* NAND definitions */ - #define NAND_CHIP_DELAY 25 - -+static int rb532_nand_fixup(struct mtd_info *mtd) -+{ -+ struct nand_chip *chip = mtd->priv; -+ -+ if (mtd->writesize == 512) -+ chip->ecc.layout = &rb532_nand_ecclayout; -+ -+ return 0; -+} -+ - static void __init rb532_nand_setup(void) - { - switch (mips_machtype) { -@@ -300,6 +323,8 @@ static void __init rb532_nand_setup(void - rb532_nand_data.chip.partitions = rb532_partition_info; - rb532_nand_data.chip.chip_delay = NAND_CHIP_DELAY; - rb532_nand_data.chip.options = NAND_NO_AUTOINCR; -+ -+ rb532_nand_data.chip.chip_fixup = &rb532_nand_fixup; - } - - diff --git a/target/linux/rb532/patches-2.6.30/100-check_media.patch b/target/linux/rb532/patches-2.6.30/100-check_media.patch deleted file mode 100644 index 66e731dac..000000000 --- a/target/linux/rb532/patches-2.6.30/100-check_media.patch +++ /dev/null @@ -1,51 +0,0 @@ ---- a/drivers/net/korina.c -+++ b/drivers/net/korina.c -@@ -133,6 +133,7 @@ struct korina_private { - int dma_halt_cnt; - int dma_run_cnt; - struct napi_struct napi; -+ struct timer_list media_check_timer; - struct mii_if_info mii_if; - struct net_device *dev; - int phy_addr; -@@ -664,6 +665,15 @@ static void korina_check_media(struct ne - &lp->eth_regs->ethmac2); - } - -+static void korina_poll_media(unsigned long data) -+{ -+ struct net_device *dev = (struct net_device *) data; -+ struct korina_private *lp = netdev_priv(dev); -+ -+ korina_check_media(dev, 0); -+ mod_timer(&lp->media_check_timer, jiffies + HZ); -+} -+ - static void korina_set_carrier(struct mii_if_info *mii) - { - if (mii->force_media) { -@@ -1034,6 +1044,7 @@ static int korina_open(struct net_device - dev->name, lp->und_irq); - goto err_free_ovr_irq; - } -+ mod_timer(&lp->media_check_timer, jiffies + 1); - out: - return ret; - -@@ -1053,6 +1064,8 @@ static int korina_close(struct net_devic - struct korina_private *lp = netdev_priv(dev); - u32 tmp; - -+ del_timer(&lp->media_check_timer); -+ - /* Disable interrupts */ - disable_irq(lp->rx_irq); - disable_irq(lp->tx_irq); -@@ -1176,6 +1189,7 @@ static int korina_probe(struct platform_ - ": cannot register net device %d\n", rc); - goto probe_err_register; - } -+ setup_timer(&lp->media_check_timer, korina_poll_media, (unsigned long) dev); - out: - return rc; - diff --git a/target/linux/rdc/Makefile b/target/linux/rdc/Makefile index 2144ec71f..273b65b84 100644 --- a/target/linux/rdc/Makefile +++ b/target/linux/rdc/Makefile @@ -1,5 +1,5 @@ # -# Copyright (C) 2006-2009 OpenWrt.org +# Copyright (C) 2006-2010 OpenWrt.org # # This is free software, licensed under the GNU General Public License v2. # See /LICENSE for more information. @@ -10,8 +10,7 @@ ARCH:=i386 BOARD:=rdc BOARDNAME:=RDC 321x FEATURES:=squashfs jffs2 pci usb pcmcia -CFLAGS:=-Os -pipe -march=i486 -funit-at-a-time -SUBTARGETS:=ar525w r8610 sitecom bifferboard +CFLAGS:=-Os -pipe -march=i486 -mtune=i486 -funit-at-a-time LINUX_VERSION:=2.6.30.10 diff --git a/target/linux/rdc/amit/config-2.6.30 b/target/linux/rdc/amit/config-2.6.30 deleted file mode 100644 index edda24234..000000000 --- a/target/linux/rdc/amit/config-2.6.30 +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_MTD_PHYSMAP=y -# CONFIG_MTD_R8610 is not set -# CONFIG_MTD_RDC3210 is not set diff --git a/target/linux/rdc/amit/target.mk b/target/linux/rdc/amit/target.mk deleted file mode 100644 index 36fb97e1c..000000000 --- a/target/linux/rdc/amit/target.mk +++ /dev/null @@ -1,2 +0,0 @@ -BOARDNAME:=Devices from AMIT -DEFAULT_PACKAGE+= kmod-usb-core kmod-usb-ohci kmod-usb2 diff --git a/target/linux/rdc/ar525w/config-2.6.30 b/target/linux/rdc/ar525w/config-2.6.30 deleted file mode 100644 index e69de29bb..000000000 diff --git a/target/linux/rdc/ar525w/target.mk b/target/linux/rdc/ar525w/target.mk deleted file mode 100644 index b3a61ef43..000000000 --- a/target/linux/rdc/ar525w/target.mk +++ /dev/null @@ -1,2 +0,0 @@ -BOARDNAME:=Airlink AR525W -DEFAULT_PACKAGES += kmod-rt61-pci diff --git a/target/linux/rdc/base-files/lib/preinit/05_set_ether_mac_rdc b/target/linux/rdc/base-files/lib/preinit/05_set_ether_mac_rdc index afb3cb49b..1fe110998 100644 --- a/target/linux/rdc/base-files/lib/preinit/05_set_ether_mac_rdc +++ b/target/linux/rdc/base-files/lib/preinit/05_set_ether_mac_rdc @@ -8,7 +8,7 @@ r6040_module() { } set_ether_mac() { - kernel=$(grep magic /proc/mtd | awk -F: '{print $1}') + kernel=$(grep firmware /proc/mtd | awk -F: '{print $1}') [ -n $kernel ] && hdr=$(dd if=/dev/$kernel count=4 bs=1 2> /dev/null) [ "$hdr" = "CSYS" ] && config=$(find_mtd_part config) if [ -n "$config" ]; then diff --git a/target/linux/rdc/bifferboard/config-2.6.30 b/target/linux/rdc/bifferboard/config-2.6.30 deleted file mode 100644 index e69de29bb..000000000 diff --git a/target/linux/rdc/bifferboard/target.mk b/target/linux/rdc/bifferboard/target.mk deleted file mode 100644 index 24dd13f5a..000000000 --- a/target/linux/rdc/bifferboard/target.mk +++ /dev/null @@ -1 +0,0 @@ -BOARDNAME:=Bifferboard diff --git a/target/linux/rdc/dir-450/config-2.6.30 b/target/linux/rdc/dir-450/config-2.6.30 deleted file mode 100644 index edda24234..000000000 --- a/target/linux/rdc/dir-450/config-2.6.30 +++ /dev/null @@ -1,3 +0,0 @@ -CONFIG_MTD_PHYSMAP=y -# CONFIG_MTD_R8610 is not set -# CONFIG_MTD_RDC3210 is not set diff --git a/target/linux/rdc/dir-450/target.mk b/target/linux/rdc/dir-450/target.mk deleted file mode 100644 index 2b1bffb01..000000000 --- a/target/linux/rdc/dir-450/target.mk +++ /dev/null @@ -1,2 +0,0 @@ -BOARDNAME:=D-Link DIR-450 -DEFAULT_PACKAGES+= kmod-madwifi kmod-pcmcia-core kmod-nozomi diff --git a/target/linux/rdc/files/drivers/mtd/maps/bifferboard-flash.c b/target/linux/rdc/files/drivers/mtd/maps/bifferboard-flash.c deleted file mode 100644 index e732334e9..000000000 --- a/target/linux/rdc/files/drivers/mtd/maps/bifferboard-flash.c +++ /dev/null @@ -1,243 +0,0 @@ -/* Flash mapping for Bifferboard, (c) bifferos@yahoo.co.uk - * Works with 1, 4 and 8MB flash versions - */ - -#include -#include -#include -#include - -#define DRV "bifferboard-flash: " - -static struct mtd_info *bb_mtd = NULL; - -#define SIZE_BIFFBOOT 0x10000 -#define SIZE_SECTOR 0x10000 -#define SIZE_CONFIG 0x02000 -#define SIZE_1MB 0x00100000 -#define SIZE_4MB 0x00400000 -#define SIZE_8MB 0x00800000 - -#define BASE_1MB 0xfff00000 -#define BASE_4MB 0xffc00000 -#define BASE_8MB 0xff800000 - -#define OFFS_KERNEL 0x6000 -#define OFFS_CONFIG 0x4000 - -/* - * Flash detection code. This is needed because the cfi_probe doesn't probe - * for the size correctly. You actually have to know the flash size before you - * call it, or so it seems. It does work correctly if you map the entire flash - * chip, but unsure of the implications for mapping more mem than exists. - */ - -static unsigned char ReadFlash(void* base, u32 addr) -{ - unsigned char val = *(volatile unsigned char *)(base+addr); - udelay(1); - return val; -} - -static void WriteFlash(void* base, u32 addr, unsigned short data) -{ - *(volatile unsigned short *)(base+addr) = data; -} - -static DEFINE_SPINLOCK(flash_lock); - -static u32 bb_detect(void) -{ - u32 ret = 0; - ulong flags; - - /* for detection, map in just the 1MB device, 1st 64k is enough */ - void* base = ioremap_nocache(BASE_1MB, 0x10000); - - if (!base) - { - pr_err(DRV "Failed to map flash for probing\n"); - return 0; - } - - spin_lock_irqsave(&flash_lock, flags); - - /* put flash in auto-detect mode */ - WriteFlash(base, 0xaaaa, 0xaaaa); - WriteFlash(base, 0x5554, 0x5555); - WriteFlash(base, 0xaaaa, 0x9090); - - /* Read the auto-config data - 4 values in total */ - ret = ReadFlash(base, 0x0000); ret <<= 8; - ret |= ReadFlash(base, 0x0200); ret <<= 8; - ret |= ReadFlash(base, 0x0003); ret <<= 8; - ret |= ReadFlash(base, 0x0002); - - /* exit the autodetect state */ - WriteFlash(base, 0x0000, 0xf0f0); - - spin_unlock_irqrestore(&flash_lock, flags); - - /* unmap it, it'll be re-mapped based on the detection */ - iounmap(base); - - return ret; -} - - -static struct map_info bb_map; - -/* Update the map, using the detected flash signature. */ -static int bb_adjust_map(unsigned long sig, struct map_info* m) -{ - m->bankwidth = 2; - switch (sig) - { - case 0x7f1c225b : - m->name = "ENLV800B"; - m->phys = BASE_1MB; - m->size = SIZE_1MB; - break; - case 0x7f1c22f9 : - m->name = "ENLV320B"; - m->phys = BASE_4MB; - m->size = SIZE_4MB; - break; - case 0x7f1c22cb : - m->name = "ENLV640B"; - m->phys = BASE_8MB; - m->size = SIZE_8MB; - break; - default: - return -ENXIO; - } - return 0; -} - - -/* adjust partition sizes, prior to adding the partition - * Values not specified by defines here are subject to replacement based on - * the real flash size. (0x00000000 being the exception, of course) */ - -static struct mtd_partition bb_parts[] = -{ -/* 0 */ { name: "kernel", offset: 0x00000000, size: 0x000fa000 }, -/* 1 */ { name: "rootfs", offset: MTDPART_OFS_APPEND, size: 0x002F0000 }, -/* 2 */ { name: "biffboot", offset: MTDPART_OFS_APPEND, size: MTDPART_SIZ_FULL, mask_flags: MTD_WRITEABLE }, -}; - - -/* returns the count of partitions to be used */ -static ulong bb_adjust_partitions(struct map_info* m) -{ - /* Read the kernel offset value, 1036 bytes into the config block. */ - u16 km_units = *((u16*)(m->virt + OFFS_CONFIG + 1036)); - u32 kernelmax = 0x200000; /* Biffboot 2.7 or earlier default */ - - /* special-case 1MB devices, because there are fewer partitions */ - if (m->size == SIZE_1MB) - { - bb_parts[0].size = SIZE_1MB - SIZE_BIFFBOOT; /* kernel */ - bb_parts[1].name = "biffboot"; /* biffboot */ - bb_parts[1].offset = MTDPART_OFS_APPEND; /* biffboot */ - bb_parts[1].size = MTDPART_SIZ_FULL; /* biffboot */ - bb_parts[1].mask_flags = MTD_WRITEABLE; - return 2; /* because there's no rootfs now */ - } - - /* sanity check */ - if (km_units > ((m->size-SIZE_BIFFBOOT)/SIZE_SECTOR)) - { - pr_err(DRV "config block has invalid kernelmax\n"); - return 0; - } - - kernelmax = km_units * SIZE_SECTOR; - - /* Kernel */ - bb_parts[0].size = kernelmax; - - /* rootfs */ - bb_parts[1].size = m->size - kernelmax - SIZE_BIFFBOOT; - - return 3; /* 3 partitions */ -} - - -static int __init init_bb_map(void) -{ - int ret; - ulong signature = bb_detect(); - ulong part_len; - - if (!signature) - { - pr_err(DRV "Undetected flash chip"); - return -ENXIO; - } - - ret = bb_adjust_map(signature, &bb_map); - - if (ret) - { - pr_err(DRV "Unrecognised flash chip (signature: 0x%lx)\n", signature); - return ret; - } - - bb_map.virt = ioremap_nocache(bb_map.phys, bb_map.size); - if (!bb_map.virt) - { - pr_err(DRV "ioremap\n"); - return -EIO; - } - - bb_mtd = do_map_probe("cfi_probe", &bb_map); - if (!bb_mtd) - { - /* cfi_probe fails here for 1MB devices */ - pr_err(DRV "cfi_probe\n"); - ret = -ENXIO; - goto err; - } - - part_len = bb_adjust_partitions(&bb_map); - if (!part_len) - { - pr_err(DRV "no partitions established"); - ret = -ENXIO; - goto err2; - } - - bb_mtd->owner = THIS_MODULE; - ret = add_mtd_partitions(bb_mtd, bb_parts, part_len); - if (ret) - { - pr_err(DRV "add_mtd_partitions\n"); - ret = -ENXIO; - goto err2; - } - - return 0; - -err2: - map_destroy(bb_mtd); -err: - iounmap(bb_map.virt); - - return ret; -} - -static void __exit exit_bb_map(void) -{ - del_mtd_partitions(bb_mtd); - map_destroy(bb_mtd); - iounmap(bb_map.virt); -} - -module_init(init_bb_map); -module_exit(exit_bb_map); - -MODULE_LICENSE("GPL"); -MODULE_AUTHOR("Bifferos "); -MODULE_DESCRIPTION("MTD map driver for Bifferboard"); - diff --git a/target/linux/rdc/files/drivers/mtd/maps/imghdr.h b/target/linux/rdc/files/drivers/mtd/maps/imghdr.h deleted file mode 100644 index 7232b7061..000000000 --- a/target/linux/rdc/files/drivers/mtd/maps/imghdr.h +++ /dev/null @@ -1,25 +0,0 @@ -#ifndef GT_IMGHDR_H -#define GT_IMGHDR_H - -#define GTIMG_MAGIC "GMTK" - -/* Product ID */ -#define PID_RTL_AIRGO 1 -#define PID_RTL_RALINK 2 -#define PID_RDC_AIRGO 3 -#define PID_RDC_RALINK 5 /* White Lable */ - -/* Gemtek */ -typedef struct -{ - u8 magic[4]; /* ASICII: GMTK */ - u32 checksum; /* CRC32 */ - u32 version; /* x.x.x.x */ - u32 kernelsz; /* The size of the kernel image */ - u32 imagesz; /* The length of this image file ( kernel + romfs + this header) */ - u32 pid; /* Product ID */ - u32 fastcksum; /* Partial CRC32 on (First(256), medium(256), last(512)) */ - u32 reserved; -}gt_imghdr_t; - -#endif diff --git a/target/linux/rdc/files/drivers/mtd/maps/r8610.c b/target/linux/rdc/files/drivers/mtd/maps/r8610.c deleted file mode 100644 index 4401bfff1..000000000 --- a/target/linux/rdc/files/drivers/mtd/maps/r8610.c +++ /dev/null @@ -1,97 +0,0 @@ -/* - * Flash memory access on RDC R8610 Evaluation board - * - * (C) 2009, Florian Fainelli - */ - -#include -#include -#include -#include - -#include -#include -#include - -#include - -static struct map_info r8610_map = { - .name = "r8610", - .size = CONFIG_MTD_RDC3210_SIZE, - .bankwidth = CONFIG_MTD_RDC3210_BUSWIDTH, -}; - -static struct mtd_partition r8610_partitions[] = { - { - .name = "Kernel", - .size = 0x001f0000, - .offset = 0 - },{ - .name = "Config", - .size = 0x10000, - .offset = MTDPART_OFS_APPEND, - },{ - .name = "Initrd", - .size = 0x1E0000, - .offset = MTDPART_OFS_APPEND, - },{ - .name = "Redboot", - .size = 0x20000, - .offset = MTDPART_OFS_APPEND, - .mask_flags = MTD_WRITEABLE - } -}; - -static struct mtd_info *mymtd; - -int __init r8610_mtd_init(void) -{ - struct mtd_partition *parts; - int nb_parts = 0; - - /* - * Static partition definition selection - */ - parts = r8610_partitions; - nb_parts = ARRAY_SIZE(r8610_partitions); - - /* - * Now let's probe for the actual flash. Do it here since - * specific machine settings might have been set above. - */ - r8610_map.phys = -r8610_map.size; - printk(KERN_NOTICE "r8610: flash device: %lx at %x\n", r8610_map.size, r8610_map.phys); - - r8610_map.map_priv_1 = (unsigned long)(r8610_map.virt = ioremap_nocache(r8610_map.phys, r8610_map.size)); - if (!r8610_map.map_priv_1) { - printk(KERN_ERR "Failed to ioremap\n"); - return -EIO; - } - - mymtd = do_map_probe("cfi_probe", &r8610_map); - if (!mymtd) { - iounmap(r8610_map.virt); - return -ENXIO; - } - mymtd->owner = THIS_MODULE; - - add_mtd_partitions(mymtd, parts, nb_parts); - - return 0; -} - -static void __exit r8610_mtd_cleanup(void) -{ - if (mymtd) { - del_mtd_partitions(mymtd); - map_destroy(mymtd); - iounmap(r8610_map.virt); - } -} - -module_init(r8610_mtd_init); -module_exit(r8610_mtd_cleanup); - -MODULE_AUTHOR("Florian Fainelli "); -MODULE_DESCRIPTION("RDC R8610 MTD driver"); -MODULE_LICENSE("GPL"); diff --git a/target/linux/rdc/files/drivers/mtd/maps/rdc3210.c b/target/linux/rdc/files/drivers/mtd/maps/rdc3210.c deleted file mode 100644 index 2c536ce70..000000000 --- a/target/linux/rdc/files/drivers/mtd/maps/rdc3210.c +++ /dev/null @@ -1,392 +0,0 @@ -/******************************************************************* - * Simple Flash mapping for RDC3210 * - * * - * 2005.03.23 * - * Dante Su (dante_su@gemtek.com.tw) * - * Copyright (C) 2005 Gemtek Corporation * - *******************************************************************/ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -static struct mtd_info *rdc3210_mtd; - -struct map_info rdc3210_map = -{ - .name = "RDC3210 Flash", - .size = CONFIG_MTD_RDC3210_SIZE, - .bankwidth = CONFIG_MTD_RDC3210_BUSWIDTH, -}; - -/* Dante: This is the default static mapping, however this is nothing but a hint. (Say dynamic mapping) */ -static struct mtd_partition rdc3210_parts[] = -{ -#if CONFIG_MTD_RDC3210_SIZE == 0x400000 - { name: "linux", offset: 0, size: 0x003C0000 }, /* 3840 KB = (Kernel + ROMFS) = (768 KB + 3072 KB) */ - { name: "romfs", offset: 0x000C0000, size: 0x00300000 }, /* 3072 KB */ - { name: "nvram", offset: 0x003C0000, size: 0x00010000 }, /* 64 KB */ -#ifdef CONFIG_MTD_RDC3210_FACTORY_PRESENT - { name: "factory", offset: 0x003D0000, size: 0x00010000 }, /* 64 KB */ -#endif - { name: "bootldr", offset: 0x003E0000, size: 0x00020000 }, /* 128 KB */ -#elif CONFIG_MTD_RDC3210_SIZE == 0x200000 - { name: "linux", offset: 0x00008000, size: 0x001E8000 }, - { name: "romfs", offset: 0x000C8000, size: 0x00128000 }, - { name: "nvram", offset: 0x00000000, size: 0x00008000 }, /* 64 KB */ -#ifdef CONFIG_MTD_RDC3210_FACTORY_PRESENT -#error Unsupported configuration! -#endif - { name: "bootldr", offset: 0x001F0000, size: 0x00010000 }, - -#elif CONFIG_MTD_RDC3210_SIZE == 0x800000 - { name: "linux", offset: 0, size: 0x001F0000 }, /* 1984 KB */ - { name: "config", offset: 0x001F0000, size: 0x00010000 }, /* 64 KB */ - { name: "romfs", offset: 0x00200000, size: 0x005D0000 }, /* 5952 KB */ -#ifdef CONFIG_MTD_RDC3210_FACTORY_PRESENT - { name: "factory", offset: 0x007D0000, size: 0x00010000 }, /* 64 KB */ -#endif - { name: "bootldr", offset: 0x007E0000, size: 0x00010000 }, /* 64 KB */ -#else -#error Unsupported configuration! -#endif -}; - -static __u32 crctab[257] = { - 0x00000000, 0x77073096, 0xee0e612c, 0x990951ba, - 0x076dc419, 0x706af48f, 0xe963a535, 0x9e6495a3, - 0x0edb8832, 0x79dcb8a4, 0xe0d5e91e, 0x97d2d988, - 0x09b64c2b, 0x7eb17cbd, 0xe7b82d07, 0x90bf1d91, - 0x1db71064, 0x6ab020f2, 0xf3b97148, 0x84be41de, - 0x1adad47d, 0x6ddde4eb, 0xf4d4b551, 0x83d385c7, - 0x136c9856, 0x646ba8c0, 0xfd62f97a, 0x8a65c9ec, - 0x14015c4f, 0x63066cd9, 0xfa0f3d63, 0x8d080df5, - 0x3b6e20c8, 0x4c69105e, 0xd56041e4, 0xa2677172, - 0x3c03e4d1, 0x4b04d447, 0xd20d85fd, 0xa50ab56b, - 0x35b5a8fa, 0x42b2986c, 0xdbbbc9d6, 0xacbcf940, - 0x32d86ce3, 0x45df5c75, 0xdcd60dcf, 0xabd13d59, - 0x26d930ac, 0x51de003a, 0xc8d75180, 0xbfd06116, - 0x21b4f4b5, 0x56b3c423, 0xcfba9599, 0xb8bda50f, - 0x2802b89e, 0x5f058808, 0xc60cd9b2, 0xb10be924, - 0x2f6f7c87, 0x58684c11, 0xc1611dab, 0xb6662d3d, - 0x76dc4190, 0x01db7106, 0x98d220bc, 0xefd5102a, - 0x71b18589, 0x06b6b51f, 0x9fbfe4a5, 0xe8b8d433, - 0x7807c9a2, 0x0f00f934, 0x9609a88e, 0xe10e9818, - 0x7f6a0dbb, 0x086d3d2d, 0x91646c97, 0xe6635c01, - 0x6b6b51f4, 0x1c6c6162, 0x856530d8, 0xf262004e, - 0x6c0695ed, 0x1b01a57b, 0x8208f4c1, 0xf50fc457, - 0x65b0d9c6, 0x12b7e950, 0x8bbeb8ea, 0xfcb9887c, - 0x62dd1ddf, 0x15da2d49, 0x8cd37cf3, 0xfbd44c65, - 0x4db26158, 0x3ab551ce, 0xa3bc0074, 0xd4bb30e2, - 0x4adfa541, 0x3dd895d7, 0xa4d1c46d, 0xd3d6f4fb, - 0x4369e96a, 0x346ed9fc, 0xad678846, 0xda60b8d0, - 0x44042d73, 0x33031de5, 0xaa0a4c5f, 0xdd0d7cc9, - 0x5005713c, 0x270241aa, 0xbe0b1010, 0xc90c2086, - 0x5768b525, 0x206f85b3, 0xb966d409, 0xce61e49f, - 0x5edef90e, 0x29d9c998, 0xb0d09822, 0xc7d7a8b4, - 0x59b33d17, 0x2eb40d81, 0xb7bd5c3b, 0xc0ba6cad, - 0xedb88320, 0x9abfb3b6, 0x03b6e20c, 0x74b1d29a, - 0xead54739, 0x9dd277af, 0x04db2615, 0x73dc1683, - 0xe3630b12, 0x94643b84, 0x0d6d6a3e, 0x7a6a5aa8, - 0xe40ecf0b, 0x9309ff9d, 0x0a00ae27, 0x7d079eb1, - 0xf00f9344, 0x8708a3d2, 0x1e01f268, 0x6906c2fe, - 0xf762575d, 0x806567cb, 0x196c3671, 0x6e6b06e7, - 0xfed41b76, 0x89d32be0, 0x10da7a5a, 0x67dd4acc, - 0xf9b9df6f, 0x8ebeeff9, 0x17b7be43, 0x60b08ed5, - 0xd6d6a3e8, 0xa1d1937e, 0x38d8c2c4, 0x4fdff252, - 0xd1bb67f1, 0xa6bc5767, 0x3fb506dd, 0x48b2364b, - 0xd80d2bda, 0xaf0a1b4c, 0x36034af6, 0x41047a60, - 0xdf60efc3, 0xa867df55, 0x316e8eef, 0x4669be79, - 0xcb61b38c, 0xbc66831a, 0x256fd2a0, 0x5268e236, - 0xcc0c7795, 0xbb0b4703, 0x220216b9, 0x5505262f, - 0xc5ba3bbe, 0xb2bd0b28, 0x2bb45a92, 0x5cb36a04, - 0xc2d7ffa7, 0xb5d0cf31, 0x2cd99e8b, 0x5bdeae1d, - 0x9b64c2b0, 0xec63f226, 0x756aa39c, 0x026d930a, - 0x9c0906a9, 0xeb0e363f, 0x72076785, 0x05005713, - 0x95bf4a82, 0xe2b87a14, 0x7bb12bae, 0x0cb61b38, - 0x92d28e9b, 0xe5d5be0d, 0x7cdcefb7, 0x0bdbdf21, - 0x86d3d2d4, 0xf1d4e242, 0x68ddb3f8, 0x1fda836e, - 0x81be16cd, 0xf6b9265b, 0x6fb077e1, 0x18b74777, - 0x88085ae6, 0xff0f6a70, 0x66063bca, 0x11010b5c, - 0x8f659eff, 0xf862ae69, 0x616bffd3, 0x166ccf45, - 0xa00ae278, 0xd70dd2ee, 0x4e048354, 0x3903b3c2, - 0xa7672661, 0xd06016f7, 0x4969474d, 0x3e6e77db, - 0xaed16a4a, 0xd9d65adc, 0x40df0b66, 0x37d83bf0, - 0xa9bcae53, 0xdebb9ec5, 0x47b2cf7f, 0x30b5ffe9, - 0xbdbdf21c, 0xcabac28a, 0x53b39330, 0x24b4a3a6, - 0xbad03605, 0xcdd70693, 0x54de5729, 0x23d967bf, - 0xb3667a2e, 0xc4614ab8, 0x5d681b02, 0x2a6f2b94, - 0xb40bbe37, 0xc30c8ea1, 0x5a05df1b, 0x2d02ef8d, - 0 -}; - -static __u32 crc32(__u8 * buf, __u32 len) -{ - register int i; - __u32 sum; - register __u32 s0; - s0 = ~0; - for (i = 0; i < len; i++) { - s0 = (s0 >> 8) ^ crctab[(__u8) (s0 & 0xFF) ^ buf[i]]; - } - sum = ~s0; - return sum; -} - -static void erase_callback(struct erase_info *done) -{ - wait_queue_head_t *wait_q = (wait_queue_head_t *)done->priv; - wake_up(wait_q); -} - -static int erase_write (struct mtd_info *mtd, unsigned long pos, - int len, const char *buf) -{ - struct erase_info erase; - DECLARE_WAITQUEUE(wait, current); - wait_queue_head_t wait_q; - size_t retlen; - int ret; - - /* - * First, let's erase the flash block. - */ - - init_waitqueue_head(&wait_q); - erase.mtd = mtd; - erase.callback = erase_callback; - erase.addr = pos; - erase.len = len; - erase.priv = (u_long)&wait_q; - - set_current_state(TASK_INTERRUPTIBLE); - add_wait_queue(&wait_q, &wait); - - ret = mtd->erase(mtd, &erase); - if (ret) { - set_current_state(TASK_RUNNING); - remove_wait_queue(&wait_q, &wait); - printk (KERN_WARNING "erase of region [0x%lx, 0x%x] " - "on \"%s\" failed\n", - pos, len, mtd->name); - return ret; - } - - schedule(); /* Wait for erase to finish. */ - remove_wait_queue(&wait_q, &wait); - - /* - * Next, writhe data to flash. - */ - - ret = mtd->write (mtd, pos, len, &retlen, buf); - if (ret) - return ret; - if (retlen != len) - return -EIO; - return 0; -} - -static int __init init_rdc3210_map(void) -{ - rdc3210_map.phys = -rdc3210_map.size; - printk(KERN_NOTICE "flash device: %lx at %x\n", rdc3210_map.size, rdc3210_map.phys); - -#if CONFIG_MTD_RDC3210_SIZE == 0x800000 - simple_map_init(&rdc3210_map); -#endif - - rdc3210_map.map_priv_1 = (unsigned long)(rdc3210_map.virt = ioremap_nocache(rdc3210_map.phys, rdc3210_map.size)); - - if (!rdc3210_map.map_priv_1) - { - printk("Failed to ioremap\n"); - return -EIO; - } - rdc3210_mtd = do_map_probe("cfi_probe", &rdc3210_map); -#ifdef CONFIG_MTD_RDC3210_STATIC_MAP /* Dante: This is for fixed map */ - if (rdc3210_mtd) - { - rdc3210_mtd->owner = THIS_MODULE; - add_mtd_partitions(rdc3210_mtd, rdc3210_parts, sizeof(rdc3210_parts)/sizeof(rdc3210_parts[0])); - return 0; - } -#else /* Dante: This is for dynamic mapping */ - -#include "imghdr.h" - - typedef struct { - u8 magic[4]; - u32 kernelsz, ramdisksz; - u8 magic2[4]; - u32 sz2; - }sc_imghdr_t; - - if (rdc3210_mtd) - { // Dante - sc_imghdr_t *hdr2= (sc_imghdr_t *)(rdc3210_map.map_priv_1); - gt_imghdr_t *hdr = (gt_imghdr_t *)hdr2 -#ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2 - , *ptmp -#endif - ; - int len, tmp, tmp2, tmp3, tmp4, hdr_type = 0; - - if(!memcmp(hdr->magic, GTIMG_MAGIC, 4)) - { - hdr_type = 1; - tmp = hdr->kernelsz + sizeof(gt_imghdr_t); - tmp2 = rdc3210_mtd->erasesize; - tmp3 = ((tmp / 32) + ((tmp % 32) ? 1 : 0)) * 32; - tmp4 = ((tmp / tmp2) + ((tmp % tmp2) ? 1 : 0)) * tmp2; - } -#ifndef CONFIG_MTD_RDC3210_ALLOW_JFFS2 - else if (!memcmp(hdr2->magic, "CSYS", 4)) - { - hdr_type = 2; - tmp = hdr2->ramdisksz + hdr2->kernelsz + sizeof(sc_imghdr_t); - tmp2 = rdc3210_mtd->erasesize; - tmp3 = ((tmp / 32) + ((tmp % 32) ? 1 : 0)) * 32; - tmp4 = ((tmp / tmp2) + ((tmp % tmp2) ? 1 : 0)) * tmp2; - } -#endif - else - { - iounmap((void *)rdc3210_map.map_priv_1); - rdc3210_map.map_priv_1 = 0L; - rdc3210_map.virt = NULL; - printk("Invalid MAGIC for Firmware Image!!!\n"); - return -EIO; - } -#ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2 - tmp = (tmp3 == tmp4) ? tmp4 + tmp2 : tmp4; - if ((ptmp = (gt_imghdr_t *)vmalloc(tmp)) == NULL) - { - iounmap((void *)rdc3210_map.map_priv_1); - rdc3210_map.map_priv_1 = 0L; - rdc3210_map.virt = NULL; - printk("Can't allocate 0x%08x for flash-reading buffer!\n", tmp); - return -ENOMEM; - } - if (rdc3210_mtd->read(rdc3210_mtd, 0, tmp, &len, (__u8 *)ptmp) || len != tmp) - { - vfree(ptmp); - iounmap((void *)rdc3210_map.map_priv_1); - rdc3210_map.map_priv_1 = 0L; - rdc3210_map.virt = NULL; - printk("Can't read that much flash! Read 0x%08x of it.\n", len); - return -EIO; - } -#endif -#ifdef CONFIG_MTD_RDC3210_FACTORY_PRESENT - /* 1. Adjust Redboot */ - tmp = rdc3210_mtd->size - rdc3210_parts[4].size; - rdc3210_parts[4].offset = tmp - (tmp % tmp2); - rdc3210_parts[4].size = rdc3210_mtd->size - rdc3210_parts[4].offset; - - /* 2. Adjust Factory Default */ - tmp -= rdc3210_parts[3].size; - rdc3210_parts[3].offset = tmp - (tmp % tmp2); - rdc3210_parts[3].size = rdc3210_parts[4].offset - rdc3210_parts[3].offset; -#else - /* 1. Adjust Redboot */ - tmp = rdc3210_mtd->size - rdc3210_parts[3].size; - rdc3210_parts[3].offset = tmp - (tmp % tmp2); - rdc3210_parts[3].size = rdc3210_mtd->size - rdc3210_parts[3].offset; -#endif - if (hdr_type == 1) { - /* 3. Adjust NVRAM */ -#ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2 - if (*(__u32 *)(((unsigned char *)ptmp)+tmp3) == SQUASHFS_MAGIC) - { - len = 1; - tmp4 = tmp3; - tmp = hdr->imagesz; - rdc3210_parts[2].name = "rootfs_data"; - rdc3210_parts[2].offset = rdc3210_parts[0].offset + (((tmp / tmp2) + ((tmp % tmp2) ? 1 : 0)) * tmp2); - } - else -#else - tmp4 = tmp3; -#endif - { - len = 0; - tmp -= rdc3210_parts[2].size; - rdc3210_parts[2].offset = tmp - (tmp % tmp2); - } - rdc3210_parts[2].size = rdc3210_parts[3].offset - rdc3210_parts[2].offset; - } - else if (hdr_type == 2) - { - len = 0; - tmp4 = tmp3; - } - - /* 4. Adjust Linux (Kernel + ROMFS) */ - rdc3210_parts[0].size = rdc3210_parts[len + hdr_type + 1].offset - rdc3210_parts[0].offset; - - /* 5. Adjust ROMFS */ - rdc3210_parts[1].offset = rdc3210_parts[0].offset + tmp4; - rdc3210_parts[1].size = rdc3210_parts[hdr_type + 1].offset - rdc3210_parts[1].offset; -#ifdef CONFIG_MTD_RDC3210_ALLOW_JFFS2 - if (!(hdr->reserved || len)) - { - __u8 buf[1024]; - ptmp->reserved = hdr->imagesz; - ptmp->imagesz = tmp4; - ptmp->checksum = ptmp->fastcksum = 0; - memcpy(buf, ptmp, 0x100); - memcpy(buf + 0x100, ((__u8 *)ptmp) + ((tmp4 >> 1) - ((tmp4 & 0x6) >> 1)), 0x100); - memcpy(buf + 0x200, ((__u8 *)ptmp) + (tmp4 - 0x200), 0x200); - ptmp->fastcksum = crc32(buf, sizeof(buf)); - ptmp->checksum = crc32((__u8 *)ptmp, tmp4); - if (rdc3210_mtd->unlock) rdc3210_mtd->unlock(rdc3210_mtd, 0, tmp2); - if ((len = erase_write(rdc3210_mtd, 0, tmp2, (char *)ptmp))) - { - vfree(ptmp); - iounmap((void *)rdc3210_map.map_priv_1); - rdc3210_map.map_priv_1 = 0L; - rdc3210_map.virt = NULL; - printk("Couldn't erase! Got %d.\n", len); - return len; - } - if (rdc3210_mtd->sync) rdc3210_mtd->sync(rdc3210_mtd); - } - vfree(ptmp); -#endif - rdc3210_mtd->owner = THIS_MODULE; - add_mtd_partitions(rdc3210_mtd, rdc3210_parts, sizeof(rdc3210_parts)/sizeof(rdc3210_parts[0])); - return 0; - } -#endif - iounmap((void *)rdc3210_map.map_priv_1); - rdc3210_map.map_priv_1 = 0L; - rdc3210_map.virt = NULL; - return -ENXIO; -} - -static void __exit cleanup_rdc3210_map(void) -{ - if (rdc3210_mtd) - { - del_mtd_partitions(rdc3210_mtd); - map_destroy(rdc3210_mtd); - } - - if (rdc3210_map.map_priv_1) - { - iounmap((void *)rdc3210_map.map_priv_1); - rdc3210_map.map_priv_1 = 0L; - rdc3210_map.virt = NULL; - } -} - -module_init(init_rdc3210_map); -module_exit(cleanup_rdc3210_map); diff --git a/target/linux/rdc/image/Makefile b/target/linux/rdc/image/Makefile index 59d59b4a7..13e9da1fa 100644 --- a/target/linux/rdc/image/Makefile +++ b/target/linux/rdc/image/Makefile @@ -11,20 +11,6 @@ define Image/Prepare $(CP) $(LINUX_DIR)/arch/x86/boot/bzImage $(KDIR)/bzImage endef -define trxalign/jffs2-128k -bs=128k -endef -define trxalign/jffs2-64k -bs=64k -endef -define trxalign/squashfs -bs=1024 -endef - -define Image/Prepare/squashfs - $(call prepare_generic_squashfs,$(KDIR)/root.squashfs) -endef - define Image/Build/ar525w cp $(KDIR)/bzImage $(KDIR)/bzImage.tmp $(SCRIPT_DIR)/pad_image $(1) $(KDIR)/bzImage.tmp $(KDIR)/root.$(1) 32 @@ -53,7 +39,7 @@ endef define Image/Build $(CP) $(KDIR)/bzImage $(BIN_DIR)/openwrt-$(BOARD).bzImage - $(call Image/Build/$(SUBTARGET),$(1),$(SUBTARGET),$(patsubst jffs2-%k,%,$(1))) + $(call Image/Build/$(PROFILE),$(1),$(PROFILE),$(patsubst jffs2-%k,%,$(1))) ifeq ($(CONFIG_TARGET_ROOTFS_INITRAMFS),y) $(call Image/Build/Initramfs) endif diff --git a/target/linux/rdc/patches-2.6.30/001-rdc3210_flash_map.patch b/target/linux/rdc/patches-2.6.30/001-rdc3210_flash_map.patch deleted file mode 100644 index d1ac2e7b6..000000000 --- a/target/linux/rdc/patches-2.6.30/001-rdc3210_flash_map.patch +++ /dev/null @@ -1,63 +0,0 @@ ---- a/drivers/mtd/maps/Kconfig -+++ b/drivers/mtd/maps/Kconfig -@@ -123,6 +123,50 @@ config MTD_SUN_UFLASH - Sun Microsystems boardsets. This driver will require CFI support - in the kernel, so if you did not enable CFI previously, do that now. - -+config MTD_RDC3210 -+ tristate "CFI Flash device mapped on RDC3210" -+ depends on X86 && MTD_CFI && MTD_PARTITIONS -+ help -+ RDC-3210 is the flash device we find on Ralink reference board. -+ -+config MTD_RDC3210_STATIC_MAP -+ bool "Partitions on RDC3210 mapped statically" if MTD_RDC3210 -+ select MTD_RDC3210_FACTORY_PRESENT -+ help -+ The mapping driver will use the static partition map for the -+ RDC-3210 flash device. -+ -+config MTD_RDC3210_FACTORY_PRESENT -+ bool "Reserve a partition on RDC3210 for factory presets" -+ depends on MTD_RDC3210 -+ default y -+ help -+ The mapping driver will reserve a partition on the RDC-3210 flash -+ device for resetting flash contents to factory defaults. -+ -+config MTD_RDC3210_ALLOW_JFFS2 -+ bool "JFFS2 filesystem usable in a partition on RDC3210" -+ depends on MTD_RDC3210 && !MTD_RDC3210_STATIC_MAP -+ help -+ The mapping driver will align a partition on the RDC-3210 flash -+ device to an erase-block boundary so that a JFFS2 filesystem may -+ reside on it. -+ -+config MTD_RDC3210_SIZE -+ hex "Amount of flash memory on RDC3210" -+ depends on MTD_RDC3210 -+ default "0x400000" -+ help -+ Total size in bytes of the RDC-3210 flash device -+ -+config MTD_RDC3210_BUSWIDTH -+ int "Width of CFI Flash device mapped on RDC3210" -+ depends on MTD_RDC3210 -+ default "2" -+ help -+ Number of bytes addressed on the RDC-3210 flash device before -+ addressing the same chip again -+ - config MTD_SC520CDP - tristate "CFI Flash device mapped on AMD SC520 CDP" - depends on X86 && MTD_CFI && MTD_CONCAT ---- a/drivers/mtd/maps/Makefile -+++ b/drivers/mtd/maps/Makefile -@@ -27,6 +27,7 @@ obj-$(CONFIG_MTD_PHYSMAP_OF) += physmap_ - obj-$(CONFIG_MTD_PMC_MSP_EVM) += pmcmsp-flash.o - obj-$(CONFIG_MTD_PMC_MSP_RAMROOT)+= pmcmsp-ramroot.o - obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o -+obj-$(CONFIG_MTD_RDC3210) += rdc3210.o - obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o - obj-$(CONFIG_MTD_TQM8XXL) += tqm8xxl.o - obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o diff --git a/target/linux/rdc/patches-2.6.30/008-r8610_flash_map.patch b/target/linux/rdc/patches-2.6.30/008-r8610_flash_map.patch deleted file mode 100644 index b374c0616..000000000 --- a/target/linux/rdc/patches-2.6.30/008-r8610_flash_map.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/mtd/maps/Kconfig -+++ b/drivers/mtd/maps/Kconfig -@@ -167,6 +167,12 @@ config MTD_RDC3210_BUSWIDTH - Number of bytes addressed on the RDC-3210 flash device before - addressing the same chip again - -+config MTD_R8610 -+ tristate "CFI flash device mapped on R8610" -+ depends on X86 && MTD_CFI && MTD_PARTITIONS -+ help -+ Flash support for the RDC R8610 evaluation board. -+ - config MTD_SC520CDP - tristate "CFI Flash device mapped on AMD SC520 CDP" - depends on X86 && MTD_CFI && MTD_CONCAT ---- a/drivers/mtd/maps/Makefile -+++ b/drivers/mtd/maps/Makefile -@@ -28,6 +28,7 @@ obj-$(CONFIG_MTD_PMC_MSP_EVM) += pmcms - obj-$(CONFIG_MTD_PMC_MSP_RAMROOT)+= pmcmsp-ramroot.o - obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o - obj-$(CONFIG_MTD_RDC3210) += rdc3210.o -+obj-$(CONFIG_MTD_R8610) += r8610.o - obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o - obj-$(CONFIG_MTD_TQM8XXL) += tqm8xxl.o - obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o diff --git a/target/linux/rdc/patches-2.6.32/001-rdc3210_flash_map.patch b/target/linux/rdc/patches-2.6.32/001-rdc3210_flash_map.patch deleted file mode 100644 index 01b416260..000000000 --- a/target/linux/rdc/patches-2.6.32/001-rdc3210_flash_map.patch +++ /dev/null @@ -1,63 +0,0 @@ ---- a/drivers/mtd/maps/Kconfig -+++ b/drivers/mtd/maps/Kconfig -@@ -114,6 +114,50 @@ config MTD_SUN_UFLASH - Sun Microsystems boardsets. This driver will require CFI support - in the kernel, so if you did not enable CFI previously, do that now. - -+config MTD_RDC3210 -+ tristate "CFI Flash device mapped on RDC3210" -+ depends on X86 && MTD_CFI && MTD_PARTITIONS -+ help -+ RDC-3210 is the flash device we find on Ralink reference board. -+ -+config MTD_RDC3210_STATIC_MAP -+ bool "Partitions on RDC3210 mapped statically" if MTD_RDC3210 -+ select MTD_RDC3210_FACTORY_PRESENT -+ help -+ The mapping driver will use the static partition map for the -+ RDC-3210 flash device. -+ -+config MTD_RDC3210_FACTORY_PRESENT -+ bool "Reserve a partition on RDC3210 for factory presets" -+ depends on MTD_RDC3210 -+ default y -+ help -+ The mapping driver will reserve a partition on the RDC-3210 flash -+ device for resetting flash contents to factory defaults. -+ -+config MTD_RDC3210_ALLOW_JFFS2 -+ bool "JFFS2 filesystem usable in a partition on RDC3210" -+ depends on MTD_RDC3210 && !MTD_RDC3210_STATIC_MAP -+ help -+ The mapping driver will align a partition on the RDC-3210 flash -+ device to an erase-block boundary so that a JFFS2 filesystem may -+ reside on it. -+ -+config MTD_RDC3210_SIZE -+ hex "Amount of flash memory on RDC3210" -+ depends on MTD_RDC3210 -+ default "0x400000" -+ help -+ Total size in bytes of the RDC-3210 flash device -+ -+config MTD_RDC3210_BUSWIDTH -+ int "Width of CFI Flash device mapped on RDC3210" -+ depends on MTD_RDC3210 -+ default "2" -+ help -+ Number of bytes addressed on the RDC-3210 flash device before -+ addressing the same chip again -+ - config MTD_SC520CDP - tristate "CFI Flash device mapped on AMD SC520 CDP" - depends on X86 && MTD_CFI && MTD_CONCAT ---- a/drivers/mtd/maps/Makefile -+++ b/drivers/mtd/maps/Makefile -@@ -26,6 +26,7 @@ obj-$(CONFIG_MTD_PHYSMAP) += physmap.o - obj-$(CONFIG_MTD_PHYSMAP_OF) += physmap_of.o - obj-$(CONFIG_MTD_PMC_MSP_EVM) += pmcmsp-flash.o - obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o -+obj-$(CONFIG_MTD_RDC3210) += rdc3210.o - obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o - obj-$(CONFIG_MTD_TQM8XXL) += tqm8xxl.o - obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o diff --git a/target/linux/rdc/patches-2.6.32/008-r8610_flash_map.patch b/target/linux/rdc/patches-2.6.32/008-r8610_flash_map.patch deleted file mode 100644 index 0f06beb09..000000000 --- a/target/linux/rdc/patches-2.6.32/008-r8610_flash_map.patch +++ /dev/null @@ -1,25 +0,0 @@ ---- a/drivers/mtd/maps/Kconfig -+++ b/drivers/mtd/maps/Kconfig -@@ -158,6 +158,12 @@ config MTD_RDC3210_BUSWIDTH - Number of bytes addressed on the RDC-3210 flash device before - addressing the same chip again - -+config MTD_R8610 -+ tristate "CFI flash device mapped on R8610" -+ depends on X86 && MTD_CFI && MTD_PARTITIONS -+ help -+ Flash support for the RDC R8610 evaluation board. -+ - config MTD_SC520CDP - tristate "CFI Flash device mapped on AMD SC520 CDP" - depends on X86 && MTD_CFI && MTD_CONCAT ---- a/drivers/mtd/maps/Makefile -+++ b/drivers/mtd/maps/Makefile -@@ -27,6 +27,7 @@ obj-$(CONFIG_MTD_PHYSMAP_OF) += physmap_ - obj-$(CONFIG_MTD_PMC_MSP_EVM) += pmcmsp-flash.o - obj-$(CONFIG_MTD_PCMCIA) += pcmciamtd.o - obj-$(CONFIG_MTD_RDC3210) += rdc3210.o -+obj-$(CONFIG_MTD_R8610) += r8610.o - obj-$(CONFIG_MTD_RPXLITE) += rpxlite.o - obj-$(CONFIG_MTD_TQM8XXL) += tqm8xxl.o - obj-$(CONFIG_MTD_SA1100) += sa1100-flash.o diff --git a/target/linux/rdc/profiles/ar525w.mk b/target/linux/rdc/profiles/ar525w.mk new file mode 100644 index 000000000..c2faee9da --- /dev/null +++ b/target/linux/rdc/profiles/ar525w.mk @@ -0,0 +1,12 @@ +# +# Copyright (C) 2010 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define Profile/ar525w + NAME:=Airlink AR525W + PACKAGES:=kmod-rt61-pci +endef +$(eval $(call Profile,ar525w)) diff --git a/target/linux/rdc/profiles/bifferboard.mk b/target/linux/rdc/profiles/bifferboard.mk new file mode 100644 index 000000000..0c12ac77f --- /dev/null +++ b/target/linux/rdc/profiles/bifferboard.mk @@ -0,0 +1,11 @@ +# +# Copyright (C) 2010 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define Profile/bifferboard + NAME:=Bifferboard +endef +$(eval $(call Profile,bifferboard)) diff --git a/target/linux/rdc/profiles/r8610.mk b/target/linux/rdc/profiles/r8610.mk new file mode 100644 index 000000000..67fef8a5a --- /dev/null +++ b/target/linux/rdc/profiles/r8610.mk @@ -0,0 +1,15 @@ +# +# Copyright (C) 2010 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define Profile/r8610 + NAME:=RDC R8610 Evaluation Board + PACKAGES:=kmod-usb-core kmod-usb-ohci kmod-usb2 \ + kmod-hwmon-core kmod-hwmon-w83627hf kmod-ide-core kmod-ide-it821x \ + kmod-rtc-core kmod-rtc-m48t86 \ + kmod-fs-ext2 kmod-fs-ext3 +endef +$(eval $(call Profile,r8610)) diff --git a/target/linux/rdc/profiles/sitecom.mk b/target/linux/rdc/profiles/sitecom.mk new file mode 100644 index 000000000..e3b2981ed --- /dev/null +++ b/target/linux/rdc/profiles/sitecom.mk @@ -0,0 +1,12 @@ +# +# Copyright (C) 2010 OpenWrt.org +# +# This is free software, licensed under the GNU General Public License v2. +# See /LICENSE for more information. +# + +define Profile/sitecom + NAME:=Devices from Sitecom (WL-153, DC-230) + PACKAGES:=kmod-rt61-pci kmod-usb-core kmod-usb-ohci kmod-usb2 +endef +$(eval $(call Profile,sitecom)) diff --git a/target/linux/rdc/r8610/config-2.6.30 b/target/linux/rdc/r8610/config-2.6.30 deleted file mode 100644 index e69de29bb..000000000 diff --git a/target/linux/rdc/r8610/target.mk b/target/linux/rdc/r8610/target.mk deleted file mode 100644 index f2c7f0d33..000000000 --- a/target/linux/rdc/r8610/target.mk +++ /dev/null @@ -1,5 +0,0 @@ -BOARDNAME:=RDC R8160 Evaluation Board -DEFAULT_PACKAGES += kmod-r6040 kmod-usb-core kmod-usb-ohci kmod-usb2 \ - kmod-hwmon-core kmod-hwmon-w83627hf kmod-ide-core kmod-ide-it821x \ - kmod-rtc-core kmod-rtc-m48t86 \ - kmod-fs-ext2 kmod-fs-ext3 diff --git a/target/linux/rdc/sitecom/config-2.6.30 b/target/linux/rdc/sitecom/config-2.6.30 deleted file mode 100644 index e69de29bb..000000000 diff --git a/target/linux/rdc/sitecom/target.mk b/target/linux/rdc/sitecom/target.mk deleted file mode 100644 index 83a8c957b..000000000 --- a/target/linux/rdc/sitecom/target.mk +++ /dev/null @@ -1,2 +0,0 @@ -BOARDNAME:=Devices from Sitecom (WL-153, DC-230) -DEFAULT_PACKAGE+= kmod-usb-core kmod-usb-ohci kmod-usb2 diff --git a/target/linux/sibyte/Makefile b/target/linux/sibyte/Makefile index 7f7867bd4..b21860ade 100644 --- a/target/linux/sibyte/Makefile +++ b/target/linux/sibyte/Makefile @@ -12,7 +12,7 @@ BOARDNAME:=Broadcom/SiByte SB-1 FEATURES:=fpu CFLAGS:=-Os -pipe -march=sb1 -funit-at-a-time -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/sibyte/patches/106-no_module_reloc.patch b/target/linux/sibyte/patches/106-no_module_reloc.patch index 20b707e25..3b1f12427 100644 --- a/target/linux/sibyte/patches/106-no_module_reloc.patch +++ b/target/linux/sibyte/patches/106-no_module_reloc.patch @@ -1,6 +1,6 @@ --- a/arch/mips/Makefile +++ b/arch/mips/Makefile -@@ -83,7 +83,7 @@ all-$(CONFIG_BOOT_ELF64) := $(vmlinux-64 +@@ -85,7 +85,7 @@ all-$(CONFIG_BOOT_ELF64) := $(vmlinux-64 cflags-y += -G 0 -mno-abicalls -fno-pic -pipe cflags-y += -msoft-float LDFLAGS_vmlinux += -G 0 -static -n -nostdlib diff --git a/target/linux/x86/Makefile b/target/linux/x86/Makefile index e9b7cba41..cd7c1b5c0 100644 --- a/target/linux/x86/Makefile +++ b/target/linux/x86/Makefile @@ -12,7 +12,7 @@ BOARDNAME:=x86 FEATURES:=squashfs jffs2 ext2 vdi vmdk pcmcia tgz SUBTARGETS=generic olpc xen_domu -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 include $(INCLUDE_DIR)/target.mk diff --git a/target/linux/x86/base-files/lib/preinit/45_failsafe_x86 b/target/linux/x86/base-files/lib/preinit/45_failsafe_x86 index dd7330d5d..2ca039cbd 100644 --- a/target/linux/x86/base-files/lib/preinit/45_failsafe_x86 +++ b/target/linux/x86/base-files/lib/preinit/45_failsafe_x86 @@ -7,7 +7,6 @@ failsafe_wait() { grep -q 'failsafe=' /proc/cmdline && FAILSAFE=true && export FAILSAFE if [ "$FAILSAFE" != "true" ]; then preinit_net_echo "Please press button now to enter failsafe" - echo -n "Press " fs_wait_for_key f 'to enter failsafe mode' $fs_failsafe_wait_timeout && FAILSAFE=true && export FAILSAFE fi } diff --git a/target/linux/x86/base-files/lib/upgrade/platform.sh b/target/linux/x86/base-files/lib/upgrade/platform.sh index 0f79a00cb..d765c5e6b 100644 --- a/target/linux/x86/base-files/lib/upgrade/platform.sh +++ b/target/linux/x86/base-files/lib/upgrade/platform.sh @@ -13,8 +13,12 @@ platform_check_image() { } platform_do_upgrade() { + local ROOTFS sync - get_image "$1" > /dev/hda + grep -q -e "jffs2" -e "squashfs" /proc/cmdline \ + && ROOTFS="$(awk 'BEGIN { RS=" "; FS="="; } ($1 == "block2mtd.block2mtd") { print substr($2,1,index($2, ",")-1) }' < /proc/cmdline)" \ + || ROOTFS="$(awk 'BEGIN { RS=" "; FS="="; } ($1 == "root") { print $2 ) }' < /proc/cmdline)" + [ -b ${ROOTFS%[0-9]} ] && get_image "$1" > ${ROOTFS%[0-9]} } x86_prepare_ext2() { diff --git a/target/linux/x86/config-2.6.30 b/target/linux/x86/config-2.6.30 deleted file mode 100644 index 24fcb1340..000000000 --- a/target/linux/x86/config-2.6.30 +++ /dev/null @@ -1,410 +0,0 @@ -# CONFIG_3C515 is not set -CONFIG_4KSTACKS=y -# CONFIG_60XX_WDT is not set -# CONFIG_64BIT is not set -# CONFIG_AC3200 is not set -# CONFIG_ACQUIRE_WDT is not set -# CONFIG_ADVANTECH_WDT is not set -# CONFIG_ALIM1535_WDT is not set -# CONFIG_APRICOT is not set -CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y -CONFIG_ARCH_HAS_CPU_RELAX=y -CONFIG_ARCH_HAS_DEFAULT_IDLE=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set -CONFIG_ARCH_POPULATES_NODE_MAP=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_MSI=y -CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y -# CONFIG_AT1700 is not set -CONFIG_ATA_GENERIC=y -CONFIG_ATA_PIIX=y -CONFIG_ATA=y -# CONFIG_AUDIT_ARCH is not set -# CONFIG_BINARY_PRINTF is not set -CONFIG_BINFMT_MISC=y -CONFIG_BITREVERSE=y -CONFIG_BLK_DEV_SD=y -# CONFIG_BLK_DEV_XD is not set -CONFIG_BOUNCE=y -# CONFIG_CC_STACKPROTECTOR is not set -CONFIG_CLOCKSOURCE_WATCHDOG=y -# CONFIG_CMDLINE_BOOL is not set -CONFIG_COMPAT_VDSO=y -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_CPU5_WDT is not set -# CONFIG_CPU_FREQ_DEBUG is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT_DETAILS=y -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_SUP_AMD=y -CONFIG_CPU_SUP_CENTAUR=y -CONFIG_CPU_SUP_CYRIX_32=y -CONFIG_CPU_SUP_INTEL=y -CONFIG_CPU_SUP_TRANSMETA_32=y -CONFIG_CPU_SUP_UMC_32=y -# CONFIG_CS5535_GPIO is not set -# CONFIG_CS89x0 is not set -# CONFIG_DCDBAS is not set -CONFIG_DEBUG_BUGVERBOSE=y -CONFIG_DEBUG_MEMORY_INIT=y -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DEFAULT_IO_DELAY_TYPE=0 -# CONFIG_DELL_RBU is not set -# CONFIG_DEPCA is not set -CONFIG_DEVPORT=y -# CONFIG_DMA_API_DEBUG is not set -# CONFIG_DMIID is not set -CONFIG_DMI=y -CONFIG_DNOTIFY=y -CONFIG_DOUBLEFAULT=y -CONFIG_DUMMY_CONSOLE=y -# CONFIG_EARLY_PRINTK_DBGP is not set -CONFIG_EARLY_PRINTK=y -# CONFIG_EDD is not set -# CONFIG_EISA is not set -# CONFIG_EL16 is not set -# CONFIG_EL1 is not set -# CONFIG_EL2 is not set -# CONFIG_EL3 is not set -CONFIG_ELF_CORE=y -# CONFIG_ELPLUS is not set -# CONFIG_EMBEDDED is not set -# CONFIG_EUROTECH_WDT is not set -CONFIG_EXT2_FS=y -CONFIG_FAST_CMPXCHG_LOCAL=y -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_FIRMWARE_MEMMAP=y -CONFIG_FIX_EARLYCON_MEM=y -# CONFIG_FRAME_POINTER is not set -# CONFIG_FTRACE_SYSCALLS is not set -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -# CONFIG_GENERIC_CPU is not set -CONFIG_GENERIC_FIND_FIRST_BIT=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_ISA_DMA=y -# CONFIG_GENERIC_TIME_VSYSCALL is not set -# CONFIG_HANGCHECK_TIMER is not set -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_AOUT=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ATOMIC_IOMAP=y -# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_PER_CPU_AREA=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FTRACE_SYSCALLS=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IOREMAP_PROT=y -CONFIG_HAVE_KERNEL_BZIP2=y -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_KVM_IRQCHIP=y -CONFIG_HAVE_KVM=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_MMIOTRACE_SUPPORT=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIGHMEM4G is not set -# CONFIG_HIGHMEM64G is not set -# CONFIG_HIGH_RES_TIMERS is not set -# CONFIG_HPET_TIMER is not set -# CONFIG_HP_WATCHDOG is not set -CONFIG_HT_IRQ=y -# CONFIG_HUGETLBFS is not set -CONFIG_HW_CONSOLE=y -# CONFIG_HW_RANDOM_AMD is not set -CONFIG_HW_RANDOM_GEODE=y -# CONFIG_HW_RANDOM_INTEL is not set -CONFIG_HW_RANDOM_VIA=y -CONFIG_HW_RANDOM=y -# CONFIG_I6300ESB_WDT is not set -# CONFIG_I8K is not set -# CONFIG_IB700_WDT is not set -# CONFIG_IBM_ASM is not set -# CONFIG_IBMASR is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INPUT_KEYBOARD=y -CONFIG_INPUT_MOUSEDEV_PSAUX=y -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSE=y -CONFIG_INPUT=y -# CONFIG_INPUT_YEALINK is not set -CONFIG_IO_DELAY_0X80=y -# CONFIG_IO_DELAY_0XED is not set -# CONFIG_IO_DELAY_NONE is not set -CONFIG_IO_DELAY_TYPE_0X80=0 -CONFIG_IO_DELAY_TYPE_0XED=1 -CONFIG_IO_DELAY_TYPE_NONE=3 -CONFIG_IO_DELAY_TYPE_UDELAY=2 -# CONFIG_IO_DELAY_UDELAY is not set -# CONFIG_IOMMU_API is not set -# CONFIG_IOMMU_HELPER is not set -CONFIG_ISA_DMA_API=y -CONFIG_ISAPNP=y -CONFIG_ISA=y -# CONFIG_ISCSI_IBFT_FIND is not set -# CONFIG_IT8712F_WDT is not set -# CONFIG_IT87_WDT is not set -# CONFIG_ITCO_WDT is not set -CONFIG_KALLSYMS=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_LZMA is not set -CONFIG_KEXEC=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -CONFIG_KTIME_SCALAR=y -# CONFIG_LANCE is not set -# CONFIG_LEDS_ALIX2 is not set -# CONFIG_LEDS_CLEVO_MAIL is not set -CONFIG_M386=y -# CONFIG_M486 is not set -# CONFIG_M586 is not set -# CONFIG_M586MMX is not set -# CONFIG_M586TSC is not set -# CONFIG_M686 is not set -# CONFIG_MACHZ_WDT is not set -CONFIG_MATH_EMULATION=y -# CONFIG_MCA is not set -# CONFIG_MCORE2 is not set -# CONFIG_MCRUSOE is not set -# CONFIG_MCYRIXIII is not set -# CONFIG_MDA_CONSOLE is not set -# CONFIG_MEFFICEON is not set -# CONFIG_MEMTEST is not set -# CONFIG_MGEODEGX1 is not set -# CONFIG_MGEODE_LX is not set -# CONFIG_MICROCODE_AMD is not set -CONFIG_MICROCODE_INTEL=y -CONFIG_MICROCODE_OLD_INTERFACE=y -CONFIG_MICROCODE=y -# CONFIG_MIXCOMWD is not set -# CONFIG_MK6 is not set -# CONFIG_MK7 is not set -# CONFIG_MK8 is not set -# CONFIG_MMIOTRACE is not set -# CONFIG_MOUSE_BCM5974 is not set -CONFIG_MOUSE_PS2_ALPS=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -CONFIG_MOUSE_PS2_LIFEBOOK=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -CONFIG_MOUSE_PS2_TRACKPOINT=y -CONFIG_MOUSE_PS2=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MPENTIUM4 is not set -# CONFIG_MPENTIUMIII is not set -# CONFIG_MPENTIUMII is not set -# CONFIG_MPENTIUMM is not set -# CONFIG_MPSC is not set -CONFIG_MTD_BLOCK2MTD=y -# CONFIG_MTD_CFI is not set -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_TS5500 is not set -# CONFIG_MTRR_SANITIZER is not set -CONFIG_MTRR=y -# CONFIG_MVIAC3_2 is not set -# CONFIG_MVIAC7 is not set -# CONFIG_MWINCHIP3D is not set -# CONFIG_MWINCHIPC6 is not set -CONFIG_NAMESPACES=y -# CONFIG_NET_NS is not set -CONFIG_NET_VENDOR_3COM=y -# CONFIG_NET_VENDOR_RACAL is not set -# CONFIG_NET_VENDOR_SMC is not set -CONFIG_NOHIGHMEM=y -CONFIG_NR_CPUS=1 -# CONFIG_NSC_GPIO is not set -CONFIG_NVRAM=y -# CONFIG_OLPC is not set -# CONFIG_OPTIMIZE_INLINING is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PARAVIRT_GUEST is not set -CONFIG_PATA_AMD=y -# CONFIG_PATA_CS5536 is not set -CONFIG_PATA_MPIIX=y -CONFIG_PATA_OLDPIIX=y -CONFIG_PATA_SC1200=y -CONFIG_PATA_VIA=y -# CONFIG_PC8736x_GPIO is not set -# CONFIG_PC87413_WDT is not set -CONFIG_PCI=y -CONFIG_PCI_BIOS=y -CONFIG_PCI_DIRECT=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCIEPORTBUS is not set -CONFIG_PCI_GOANY=y -# CONFIG_PCI_GOBIOS is not set -# CONFIG_PCI_GODIRECT is not set -# CONFIG_PCI_GOMMCONFIG is not set -# CONFIG_PCI_GOOLPC is not set -CONFIG_PCSPKR_PLATFORM=y -# CONFIG_PCWATCHDOG is not set -CONFIG_PHYSICAL_ALIGN=0x100000 -CONFIG_PHYSICAL_START=0x100000 -# CONFIG_PNPACPI is not set -# CONFIG_PNPBIOS is not set -CONFIG_PNP_DEBUG_MESSAGES=y -CONFIG_PNP=y -# CONFIG_POWER_TRACER is not set -CONFIG_PROC_PAGE_MONITOR=y -# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set -CONFIG_RD_BZIP2=y -CONFIG_RD_GZIP=y -# CONFIG_RELOCATABLE is not set -CONFIG_RTC=y -# CONFIG_RWSEM_XCHGADD_ALGORITHM is not set -# CONFIG_SBC7240_WDT is not set -# CONFIG_SBC8360_WDT is not set -# CONFIG_SBC_EPX_C3_WATCHDOG is not set -# CONFIG_SC1200_WDT is not set -# CONFIG_SC520_WDT is not set -# CONFIG_SCHED_HRTICK is not set -CONFIG_SCHED_OMIT_FRAME_POINTER=y -CONFIG_SCSI=y -# CONFIG_SCx200_GPIO is not set -CONFIG_SCx200HR_TIMER=y -# CONFIG_SCx200_WDT is not set -CONFIG_SCx200=y -# CONFIG_SERIAL_8250_EXTENDED is not set -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_PNP=y -# CONFIG_SERIO_CT82C710 is not set -CONFIG_SERIO_I8042=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_RAW is not set -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO=y -# CONFIG_SLAB is not set -# CONFIG_SLOW_WORK is not set -# CONFIG_SLUB_DEBUG_ON is not set -CONFIG_SLUB_DEBUG=y -# CONFIG_SLUB_STATS is not set -CONFIG_SLUB=y -# CONFIG_SMSC37B787_WDT is not set -# CONFIG_SMSC_SCH311X_WDT is not set -# CONFIG_SONYPI is not set -# CONFIG_SPARSE_IRQ is not set -CONFIG_SPARSEMEM_STATIC=y -CONFIG_STRICT_DEVMEM=y -# CONFIG_SYSPROF_TRACER is not set -# CONFIG_TELCLOCK is not set -# CONFIG_TOSHIBA is not set -CONFIG_TRACING_SUPPORT=y -# CONFIG_TYPHOON is not set -CONFIG_UID16=y -CONFIG_USB_SUPPORT=y -# CONFIG_USER_NS is not set -CONFIG_USER_STACKTRACE_SUPPORT=y -# CONFIG_VGACON_SOFT_SCROLLBACK is not set -CONFIG_VGA_CONSOLE=y -CONFIG_VM86=y -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_VORTEX is not set -CONFIG_VT_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_VT=y -# CONFIG_W83697UG_WDT is not set -# CONFIG_WAFER_WDT is not set -# CONFIG_WDT is not set -CONFIG_X86_32_LAZY_GS=y -CONFIG_X86_32=y -# CONFIG_X86_64 is not set -# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set -# CONFIG_X86_CMPXCHG is not set -# CONFIG_X86_CPU_DEBUG is not set -# CONFIG_X86_CPUFREQ_NFORCE2 is not set -# CONFIG_X86_CPUID is not set -CONFIG_X86_CPU=y -# CONFIG_X86_ELAN is not set -# CONFIG_X86_E_POWERSAVER is not set -CONFIG_X86_EXTENDED_PLATFORM=y -CONFIG_X86_F00F_BUG=y -CONFIG_X86_GENERIC=y -# CONFIG_X86_GX_SUSPMOD is not set -CONFIG_X86_INTEL_USERCOPY=y -CONFIG_X86_INTERNODE_CACHE_BYTES=64 -CONFIG_X86_IO_APIC=y -CONFIG_X86_L1_CACHE_BYTES=64 -CONFIG_X86_L1_CACHE_SHIFT=4 -CONFIG_X86_LOCAL_APIC=y -# CONFIG_X86_LONGRUN is not set -# CONFIG_X86_MCE_NONFATAL is not set -# CONFIG_X86_MCE_P4THERMAL is not set -CONFIG_X86_MCE=y -CONFIG_X86_MINIMUM_CPU_FAMILY=3 -CONFIG_X86_MPPARSE=y -# CONFIG_X86_MSR is not set -# CONFIG_X86_P4_CLOCKMOD is not set -# CONFIG_X86_PAE is not set -CONFIG_X86_PAT=y -CONFIG_X86_PLATFORM_DEVICES=y -# CONFIG_X86_POWERNOW_K6 is not set -# CONFIG_X86_POWERNOW_K7 is not set -CONFIG_X86_PPRO_FENCE=y -# CONFIG_X86_RDC321X is not set -# CONFIG_X86_REBOOTFIXUPS is not set -CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y -CONFIG_X86_RESERVE_LOW_64K=y -# CONFIG_X86_SPEEDSTEP_CENTRINO is not set -# CONFIG_X86_SPEEDSTEP_ICH is not set -# CONFIG_X86_SPEEDSTEP_LIB is not set -# CONFIG_X86_SPEEDSTEP_SMI is not set -CONFIG_X86_UP_APIC=y -CONFIG_X86_UP_IOAPIC=y -CONFIG_X86_VERBOSE_BOOTUP=y -CONFIG_X86=y -# CONFIG_ZONE_DMA32 is not set diff --git a/target/linux/x86/config-default b/target/linux/x86/config-default index 9b20f1eab..6310fc139 100644 --- a/target/linux/x86/config-default +++ b/target/linux/x86/config-default @@ -3,6 +3,7 @@ CONFIG_4KSTACKS=y # CONFIG_60XX_WDT is not set # CONFIG_64BIT is not set # CONFIG_AC3200 is not set +CONFIG_ACPI=y # CONFIG_ACPI_AC is not set # CONFIG_ACPI_ASUS is not set # CONFIG_ACPI_BATTERY is not set @@ -14,21 +15,19 @@ CONFIG_ACPI_BLACKLIST_YEAR=0 # CONFIG_ACPI_DOCK is not set # CONFIG_ACPI_FAN is not set # CONFIG_ACPI_PCI_SLOT is not set -# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set CONFIG_ACPI_PROCESSOR=y -# CONFIG_ACPI_PROC_EVENT is not set +# CONFIG_ACPI_PROCESSOR_AGGREGATOR is not set # CONFIG_ACPI_PROCFS is not set # CONFIG_ACPI_PROCFS_POWER is not set +# CONFIG_ACPI_PROC_EVENT is not set # CONFIG_ACPI_SBS is not set CONFIG_ACPI_SYSFS_POWER=y CONFIG_ACPI_THERMAL=y # CONFIG_ACPI_TOSHIBA is not set # CONFIG_ACPI_WMI is not set -CONFIG_ACPI=y # CONFIG_ACQUIRE_WDT is not set # CONFIG_ADVANTECH_WDT is not set # CONFIG_ALIM1535_WDT is not set -# CONFIG_APM is not set # CONFIG_APRICOT is not set CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y @@ -51,9 +50,9 @@ CONFIG_ARCH_WANT_FRAME_POINTERS=y CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y # CONFIG_ASUS_LAPTOP is not set # CONFIG_AT1700 is not set +CONFIG_ATA=y CONFIG_ATA_GENERIC=y CONFIG_ATA_PIIX=y -CONFIG_ATA=y # CONFIG_AUDIT_ARCH is not set CONFIG_BINFMT_MISC=y CONFIG_BITREVERSE=y @@ -67,6 +66,7 @@ CONFIG_CLOCKSOURCE_WATCHDOG=y CONFIG_COMPAT_VDSO=y CONFIG_CONSOLE_TRANSLATIONS=y # CONFIG_CPU5_WDT is not set +CONFIG_CPU_FREQ=y # CONFIG_CPU_FREQ_DEBUG is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set @@ -78,12 +78,11 @@ CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y CONFIG_CPU_FREQ_GOV_PERFORMANCE=y # CONFIG_CPU_FREQ_GOV_POWERSAVE is not set # CONFIG_CPU_FREQ_GOV_USERSPACE is not set -CONFIG_CPU_FREQ_STAT_DETAILS=y CONFIG_CPU_FREQ_STAT=y +CONFIG_CPU_FREQ_STAT_DETAILS=y CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_IDLE=y +CONFIG_CPU_IDLE_GOV_LADDER=y CONFIG_CPU_SUP_AMD=y CONFIG_CPU_SUP_CENTAUR=y CONFIG_CPU_SUP_CYRIX_32=y @@ -101,20 +100,19 @@ CONFIG_DEFAULT_IO_DELAY_TYPE=0 # CONFIG_DELL_RBU is not set # CONFIG_DEPCA is not set CONFIG_DEVPORT=y -# CONFIG_DMA_API_DEBUG is not set # CONFIG_DMAR is not set -# CONFIG_DMIID is not set CONFIG_DMI=y +# CONFIG_DMIID is not set CONFIG_DNOTIFY=y CONFIG_DOUBLEFAULT=y CONFIG_DUMMY_CONSOLE=y -# CONFIG_EARLY_PRINTK_DBGP is not set CONFIG_EARLY_PRINTK=y +# CONFIG_EARLY_PRINTK_DBGP is not set # CONFIG_EDD is not set # CONFIG_EFI is not set # CONFIG_EISA is not set -# CONFIG_EL16 is not set # CONFIG_EL1 is not set +# CONFIG_EL16 is not set # CONFIG_EL2 is not set # CONFIG_EL3 is not set CONFIG_ELF_CORE=y @@ -125,11 +123,10 @@ CONFIG_FIRMWARE_IN_KERNEL=y CONFIG_FIRMWARE_MEMMAP=y CONFIG_FIX_EARLYCON_MEM=y # CONFIG_FRAME_POINTER is not set -# CONFIG_FREEZER is not CONFIG_GENERIC_BUG=y +CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CLOCKEVENTS=y CONFIG_GENERIC_CMOS_UPDATE=y # CONFIG_GENERIC_CPU is not set CONFIG_GENERIC_FIND_FIRST_BIT=y @@ -138,7 +135,6 @@ CONFIG_GENERIC_FIND_NEXT_BIT=y CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y CONFIG_GENERIC_IOMAP=y CONFIG_GENERIC_ISA_DMA=y -# CONFIG_GENERIC_PENDING_IRQ is not set # CONFIG_GENERIC_TIME_VSYSCALL is not set # CONFIG_HANGCHECK_TIMER is not set CONFIG_HAS_DMA=y @@ -157,8 +153,8 @@ CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y CONFIG_HAVE_FUNCTION_TRACER=y +CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y CONFIG_HAVE_GENERIC_DMA_COHERENT=y CONFIG_HAVE_IDE=y CONFIG_HAVE_IOREMAP_PROT=y @@ -172,46 +168,44 @@ CONFIG_HAVE_KVM=y CONFIG_HAVE_LATENCYTOP_SUPPORT=y CONFIG_HAVE_MMIOTRACE_SUPPORT=y CONFIG_HAVE_OPROFILE=y -# CONFIG_HAVE_PERF_EVENTS is not set CONFIG_HAVE_SETUP_PER_CPU_AREA=y CONFIG_HAVE_SYSCALL_TRACEPOINTS=y CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y # CONFIG_HIBERNATION is not set -CONFIG_HID_SUPPORT=y CONFIG_HID=y +CONFIG_HID_SUPPORT=y # CONFIG_HIGHMEM4G is not set # CONFIG_HIGHMEM64G is not set # CONFIG_HIGH_RES_TIMERS is not set -# CONFIG_HOTPLUG_CPU is not set +CONFIG_HPET=y CONFIG_HPET_EMULATE_RTC=y CONFIG_HPET_MMAP=y CONFIG_HPET_TIMER=y -CONFIG_HPET=y # CONFIG_HP_WATCHDOG is not set CONFIG_HT_IRQ=y # CONFIG_HUGETLBFS is not set -# CONFIG_HVC_DRIVER is not set -# CONFIG_HVC_IRQ is not set -# CONFIG_HVC_XEN is not set CONFIG_HW_CONSOLE=y +CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_GEODE=y CONFIG_HW_RANDOM_VIA=y -CONFIG_HW_RANDOM=y # CONFIG_I6300ESB_WDT is not set # CONFIG_I8K is not set # CONFIG_IB700_WDT is not set # CONFIG_IBMASR is not set # CONFIG_IMA is not set CONFIG_INITRAMFS_SOURCE="" +CONFIG_INPUT=y CONFIG_INPUT_KEYBOARD=y +CONFIG_INPUT_MOUSE=y +CONFIG_INPUT_MOUSEDEV=y CONFIG_INPUT_MOUSEDEV_PSAUX=y CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSE=y -CONFIG_INPUT=y # CONFIG_INPUT_YEALINK is not set # CONFIG_INTEL_MENLOW is not set +# CONFIG_IOMMU_API is not set +# CONFIG_IOMMU_HELPER is not set +# CONFIG_IOMMU_STRESS is not set CONFIG_IO_DELAY_0X80=y # CONFIG_IO_DELAY_0XED is not set # CONFIG_IO_DELAY_NONE is not set @@ -220,13 +214,12 @@ CONFIG_IO_DELAY_TYPE_0XED=1 CONFIG_IO_DELAY_TYPE_NONE=3 CONFIG_IO_DELAY_TYPE_UDELAY=2 # CONFIG_IO_DELAY_UDELAY is not set -# CONFIG_IOMMU_API is not set -# CONFIG_IOMMU_HELPER is not set -# CONFIG_IOMMU_STRESS is not set -CONFIG_ISA_DMA_API=y -CONFIG_ISAPNP=y CONFIG_ISA=y +CONFIG_ISAPNP=y +CONFIG_ISA_DMA_API=y # CONFIG_ISCSI_IBFT_FIND is not set +# CONFIG_ISDN_CAPI is not set +# CONFIG_ISDN_I4L is not set # CONFIG_IT8712F_WDT is not set # CONFIG_IT87_WDT is not set # CONFIG_ITCO_WDT is not set @@ -241,15 +234,11 @@ CONFIG_KEYBOARD_ATKBD=y # CONFIG_KEYBOARD_SUNKBD is not set # CONFIG_KEYBOARD_XTKBD is not set CONFIG_KTIME_SCALAR=y -# CONFIG_KVM_CLOCK is not set -# CONFIG_KVM_GUEST is not set # CONFIG_LANCE is not set # CONFIG_LEDS_ALIX2 is not set # CONFIG_LEDS_CLEVO_MAIL is not set -# CONFIG_LGUEST_GUEST is not set -# CONFIG_LOCK_KERNEL is not set # CONFIG_M386 is not set -# CONFIG_M486 is not set +CONFIG_M486=y # CONFIG_M586 is not set # CONFIG_M586MMX is not set # CONFIG_M586TSC is not set @@ -266,15 +255,16 @@ CONFIG_MATH_EMULATION=y # CONFIG_MEMTEST is not set # CONFIG_MGEODEGX1 is not set # CONFIG_MGEODE_LX is not set +CONFIG_MICROCODE=y # CONFIG_MICROCODE_AMD is not set CONFIG_MICROCODE_INTEL=y CONFIG_MICROCODE_OLD_INTERFACE=y -CONFIG_MICROCODE=y # CONFIG_MIXCOMWD is not set # CONFIG_MK6 is not set # CONFIG_MK7 is not set # CONFIG_MK8 is not set # CONFIG_MOUSE_BCM5974 is not set +CONFIG_MOUSE_PS2=y CONFIG_MOUSE_PS2_ALPS=y # CONFIG_MOUSE_PS2_ELANTECH is not set CONFIG_MOUSE_PS2_LIFEBOOK=y @@ -282,20 +272,19 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y CONFIG_MOUSE_PS2_SYNAPTICS=y # CONFIG_MOUSE_PS2_TOUCHKIT is not set CONFIG_MOUSE_PS2_TRACKPOINT=y -CONFIG_MOUSE_PS2=y # CONFIG_MOUSE_SERIAL is not set # CONFIG_MOUSE_VSXXXAA is not set # CONFIG_MPENTIUM4 is not set -# CONFIG_MPENTIUMIII is not set # CONFIG_MPENTIUMII is not set +# CONFIG_MPENTIUMIII is not set # CONFIG_MPENTIUMM is not set # CONFIG_MPSC is not set CONFIG_MTD_BLOCK2MTD=y # CONFIG_MTD_CFI is not set # CONFIG_MTD_COMPLEX_MAPPINGS is not set # CONFIG_MTD_TS5500 is not set -# CONFIG_MTRR_SANITIZER is not set CONFIG_MTRR=y +# CONFIG_MTRR_SANITIZER is not set # CONFIG_MVIAC3_2 is not set # CONFIG_MVIAC7 is not set # CONFIG_MWINCHIP3D is not set @@ -307,9 +296,8 @@ CONFIG_NEED_PER_CPU_PAGE_FIRST_CHUNK=y CONFIG_NET_VENDOR_3COM=y # CONFIG_NET_VENDOR_RACAL is not set # CONFIG_NET_VENDOR_SMC is not set -CONFIG_NETWORK_FILESYSTEMS=y CONFIG_NOHIGHMEM=y -# CONFIG_NR_CPUS is not set +CONFIG_NR_CPUS=1 # CONFIG_NSC_GPIO is not set CONFIG_NVRAM=y # CONFIG_OLPC is not set @@ -317,10 +305,7 @@ CONFIG_NVRAM=y CONFIG_OUTPUT_FORMAT="elf32-i386" CONFIG_PAGEFLAGS_EXTENDED=y CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PARAVIRT_CLOCK is not set # CONFIG_PARAVIRT_GUEST is not set -# CONFIG_PARAVIRT is not set -# CONFIG_PARAVIRT_SPINLOCKS is not set CONFIG_PATA_AMD=y CONFIG_PATA_MPIIX=y CONFIG_PATA_OLDPIIX=y @@ -329,10 +314,10 @@ CONFIG_PATA_VIA=y # CONFIG_PC8736x_GPIO is not set # CONFIG_PC87413_WDT is not set CONFIG_PCI=y +# CONFIG_PCIEPORTBUS is not set CONFIG_PCI_BIOS=y CONFIG_PCI_DIRECT=y CONFIG_PCI_DOMAINS=y -# CONFIG_PCIEPORTBUS is not set CONFIG_PCI_GOANY=y # CONFIG_PCI_GOBIOS is not set # CONFIG_PCI_GODIRECT is not set @@ -343,28 +328,20 @@ CONFIG_PCI_MSI=y CONFIG_PCSPKR_PLATFORM=y # CONFIG_PCWATCHDOG is not set # CONFIG_PDA_POWER is not set -# CONFIG_PERF_COUNTERS is not set -# CONFIG_PERF_EVENTS is not set -# CONFIG_PHYS_ADDR_T_64BIT is not set CONFIG_PHYSICAL_ALIGN=0x100000 CONFIG_PHYSICAL_START=0x1000000 +CONFIG_PM=y # CONFIG_PM_DEBUG is not set # CONFIG_PM_RUNTIME is not set -# CONFIG_PM_SLEEP is not set -# CONFIG_PM_SLEEP_SMP is not set -CONFIG_PM=y +CONFIG_PNP=y CONFIG_PNPACPI=y # CONFIG_PNPBIOS is not set CONFIG_PNP_DEBUG_MESSAGES=y -CONFIG_PNP=y -# CONFIG_POWER_SUPPLY_DEBUG is not set CONFIG_POWER_SUPPLY=y +# CONFIG_POWER_SUPPLY_DEBUG is not set # CONFIG_PROCESSOR_SELECT is not set CONFIG_PROC_PAGE_MONITOR=y # CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set -CONFIG_RCU_FANOUT=32 -# CONFIG_RCU_FANOUT_EXACT is not set -# CONFIG_RCU_TRACE is not set CONFIG_RD_BZIP2=y CONFIG_RD_GZIP=y # CONFIG_RELOCATABLE is not set @@ -377,38 +354,33 @@ CONFIG_RWSEM_XCHGADD_ALGORITHM=y # CONFIG_SC1200_WDT is not set # CONFIG_SC520_WDT is not set # CONFIG_SCHED_HRTICK is not set -# CONFIG_SCHED_MC is not set CONFIG_SCHED_OMIT_FRAME_POINTER=y -# CONFIG_SCHED_SMT is not set CONFIG_SCSI=y -# CONFIG_SCx200_GPIO is not set -CONFIG_SCx200HR_TIMER=y -# CONFIG_SCx200_WDT is not set CONFIG_SCx200=y +CONFIG_SCx200HR_TIMER=y +# CONFIG_SCx200_GPIO is not set +# CONFIG_SCx200_WDT is not set # CONFIG_SERIAL_8250_EXTENDED is not set CONFIG_SERIAL_8250_PCI=y CONFIG_SERIAL_8250_PNP=y +CONFIG_SERIO=y # CONFIG_SERIO_CT82C710 is not set CONFIG_SERIO_I8042=y CONFIG_SERIO_LIBPS2=y # CONFIG_SERIO_PCIPS2 is not set # CONFIG_SERIO_RAW is not set CONFIG_SERIO_SERPORT=y -CONFIG_SERIO=y # CONFIG_SLAB is not set -# CONFIG_SLUB_DEBUG_ON is not set -CONFIG_SLUB_DEBUG=y -# CONFIG_SLUB_STATS is not set CONFIG_SLUB=y -# CONFIG_SMP is not set +CONFIG_SLUB_DEBUG=y +# CONFIG_SLUB_DEBUG_ON is not set +# CONFIG_SLUB_STATS is not set # CONFIG_SMSC37B787_WDT is not set # CONFIG_SMSC_SCH311X_WDT is not set -# CONFIG_SPARSE_IRQ is not set CONFIG_SPARSEMEM_STATIC=y -# CONFIG_STOP_MACHINE is not set +# CONFIG_SPARSE_IRQ is not set CONFIG_STRICT_DEVMEM=y # CONFIG_SUSPEND is not set -# CONFIG_SYS_HYPERVISOR is not set # CONFIG_TC1100_WMI is not set # CONFIG_TELCLOCK is not set CONFIG_THERMAL=y @@ -420,65 +392,54 @@ CONFIG_TREE_RCU=y # CONFIG_TYPHOON is not set CONFIG_UID16=y CONFIG_USB_SUPPORT=y -# CONFIG_USE_GENERIC_SMP_HELPERS is not set # CONFIG_USER_NS is not set CONFIG_USER_STACKTRACE_SUPPORT=y # CONFIG_VGACON_SOFT_SCROLLBACK is not set CONFIG_VGA_CONSOLE=y CONFIG_VM86=y CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_VMI is not set # CONFIG_VORTEX is not set +CONFIG_VT=y CONFIG_VT_CONSOLE=y # CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_VT=y # CONFIG_W83697UG_WDT is not set # CONFIG_WAFER_WDT is not set # CONFIG_WDT is not set -CONFIG_X86_32_LAZY_GS=y -# CONFIG_X86_32_SMP is not set +CONFIG_X86=y CONFIG_X86_32=y +CONFIG_X86_32_LAZY_GS=y # CONFIG_X86_64 is not set # CONFIG_X86_ACPI_CPUFREQ is not set +CONFIG_X86_ALIGNMENT_16=y # CONFIG_X86_ANCIENT_MCE is not set -# CONFIG_X86_BIGSMP is not set CONFIG_X86_BSWAP=y # CONFIG_X86_CHECK_BIOS_CORRUPTION is not set -# CONFIG_X86_CMOV is not set -# CONFIG_X86_CMPXCHG64 is not set CONFIG_X86_CMPXCHG=y -# CONFIG_X86_CPU_DEBUG is not set +CONFIG_X86_CPU=y # CONFIG_X86_CPUFREQ_NFORCE2 is not set # CONFIG_X86_CPUID is not set -CONFIG_X86_CPU=y -# CONFIG_X86_DEBUGCTLMSR is not set -# CONFIG_X86_DS is not set -# CONFIG_X86_ELAN is not set -# CONFIG_X86_E_POWERSAVER is not set # CONFIG_X86_EXTENDED_PLATFORM is not set +# CONFIG_X86_E_POWERSAVER is not set CONFIG_X86_F00F_BUG=y CONFIG_X86_GENERIC=y # CONFIG_X86_GX_SUSPMOD is not set -# CONFIG_X86_HT is not set CONFIG_X86_INTEL_USERCOPY=y CONFIG_X86_INTERNODE_CACHE_BYTES=64 CONFIG_X86_INVLPG=y CONFIG_X86_IO_APIC=y CONFIG_X86_L1_CACHE_BYTES=64 -CONFIG_X86_L1_CACHE_SHIFT=6 +CONFIG_X86_L1_CACHE_SHIFT=4 CONFIG_X86_LOCAL_APIC=y # CONFIG_X86_LONGHAUL is not set # CONFIG_X86_LONGRUN is not set +CONFIG_X86_MCE=y CONFIG_X86_MCE_AMD=y # CONFIG_X86_MCE_INJECT is not set CONFIG_X86_MCE_INTEL=y CONFIG_X86_MCE_THRESHOLD=y -CONFIG_X86_MCE=y CONFIG_X86_MINIMUM_CPU_FAMILY=4 CONFIG_X86_MPPARSE=y -# CONFIG_X86_MRST is not set # CONFIG_X86_MSR is not set -# CONFIG_X86_OLD_MCE is not set # CONFIG_X86_P4_CLOCKMOD is not set # CONFIG_X86_PAE is not set CONFIG_X86_PAT=y @@ -489,7 +450,6 @@ CONFIG_X86_POPAD_OK=y # CONFIG_X86_POWERNOW_K7 is not set # CONFIG_X86_POWERNOW_K8 is not set CONFIG_X86_PPRO_FENCE=y -# CONFIG_X86_RDC321X is not set # CONFIG_X86_REBOOTFIXUPS is not set CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS=y CONFIG_X86_RESERVE_LOW_64K=y @@ -499,24 +459,9 @@ CONFIG_X86_RESERVE_LOW_64K=y # CONFIG_X86_SPEEDSTEP_SMI is not set CONFIG_X86_SUPPORTS_MEMORY_FAILURE=y CONFIG_X86_THERMAL_VECTOR=y -# CONFIG_X86_TRAMPOLINE is not set -# CONFIG_X86_TSC is not set CONFIG_X86_UP_APIC=y CONFIG_X86_UP_IOAPIC=y -# CONFIG_X86_USE_PPRO_CHECKSUM is not set CONFIG_X86_VERBOSE_BOOTUP=y CONFIG_X86_WP_WORKS_OK=y CONFIG_X86_XADD=y -CONFIG_X86=y -# CONFIG_XEN_BALLOON is not set -# CONFIG_XEN_BLKDEV_FRONTEND is not set -# CONFIG_XEN_DEBUG_FS is not set -# CONFIG_XEN_DEV_EVTCHN is not set -# CONFIG_XENFS is not set -# CONFIG_XEN is not set -# CONFIG_XEN_MAX_DOMAIN_MEMORY is not set -# CONFIG_XEN_NETDEV_FRONTEND is not set -# CONFIG_XEN_SAVE_RESTORE is not set -# CONFIG_XEN_SCRUB_PAGES is not set -# CONFIG_XEN_SYS_HYPERVISOR is not set # CONFIG_ZONE_DMA32 is not set diff --git a/target/linux/x86/olpc/config-2.6.30 b/target/linux/x86/olpc/config-2.6.30 deleted file mode 100644 index 5926dbe07..000000000 --- a/target/linux/x86/olpc/config-2.6.30 +++ /dev/null @@ -1,517 +0,0 @@ -CONFIG_4KSTACKS=y -# CONFIG_64BIT is not set -CONFIG_ACPI_AC=y -# CONFIG_ACPI_ASUS is not set -CONFIG_ACPI_BATTERY=y -CONFIG_ACPI_BLACKLIST_YEAR=0 -CONFIG_ACPI_BUTTON=y -# CONFIG_ACPI_CONTAINER is not set -# CONFIG_ACPI_CUSTOM_DSDT is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_DOCK is not set -CONFIG_ACPI_FAN=y -# CONFIG_ACPI_PCI_SLOT is not set -CONFIG_ACPI_PROCESSOR=y -CONFIG_ACPI_PROC_EVENT=y -# CONFIG_ACPI_PROCFS is not set -CONFIG_ACPI_PROCFS_POWER=y -# CONFIG_ACPI_SBS is not set -CONFIG_ACPI_SLEEP=y -CONFIG_ACPI_SYSFS_POWER=y -CONFIG_ACPI_THERMAL=y -# CONFIG_ACPI_TOSHIBA is not set -# CONFIG_ACPI_WMI is not set -CONFIG_ACPI=y -# CONFIG_APM is not set -CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y -CONFIG_ARCH_HAS_CPU_RELAX=y -CONFIG_ARCH_HAS_DEFAULT_IDLE=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set -CONFIG_ARCH_POPULATES_NODE_MAP=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_MSI=y -CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y -# CONFIG_ASUS_LAPTOP is not set -# CONFIG_AUDIT_ARCH is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GENERIC=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -# CONFIG_BACKLIGHT_MBP_NVIDIA is not set -# CONFIG_BACKLIGHT_PROGEAR is not set -# CONFIG_BACKLIGHT_SAHARA is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -CONFIG_BATTERY_OLPC=y -CONFIG_BINARY_PRINTF=y -CONFIG_BINFMT_MISC=y -CONFIG_BITREVERSE=y -# CONFIG_BLK_DEV is not set -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_BLK_DEV_SR=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -# CONFIG_BOOT_PRINTK_DELAY is not set -CONFIG_BOUNCE=y -CONFIG_CAN_PM_TRACE=y -# CONFIG_CC_STACKPROTECTOR is not set -CONFIG_CHR_DEV_SG=y -CONFIG_CLOCKSOURCE_WATCHDOG=y -# CONFIG_CMDLINE_BOOL is not set -# CONFIG_COMPAL_LAPTOP is not set -CONFIG_COMPAT_VDSO=y -CONFIG_CONSOLE_TRANSLATIONS=y -# CONFIG_CPA_DEBUG is not set -# CONFIG_CPU_FREQ_DEBUG is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_SUP_AMD=y -# CONFIG_CPU_SUP_CENTAUR is not set -# CONFIG_CPU_SUP_CYRIX_32 is not set -# CONFIG_CPU_SUP_INTEL is not set -# CONFIG_CPU_SUP_TRANSMETA_32 is not set -# CONFIG_CPU_SUP_UMC_32 is not set -CONFIG_CRYPTO_AEAD2=y -CONFIG_CRYPTO_BLKCIPHER2=y -CONFIG_CRYPTO_HASH2=y -CONFIG_CRYPTO_MANAGER2=y -CONFIG_CRYPTO_RNG2=y -CONFIG_CRYPTO_WORKQUEUE=y -# CONFIG_CS5535_GPIO is not set -# CONFIG_DCDBAS is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_BOOT_PARAMS is not set -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_INFO is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_NX_TEST is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_PAGEALLOC is not set -# CONFIG_DEBUG_RODATA is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_SHIRQ is not set -# CONFIG_DEBUG_SLAB is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_STACKOVERFLOW is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_VIRTUAL is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DEFAULT_IO_DELAY_TYPE=0 -# CONFIG_DELL_RBU is not set -CONFIG_DETECT_HUNG_TASK=y -CONFIG_DETECT_SOFTLOCKUP=y -CONFIG_DEVPORT=y -CONFIG_DISPLAY_SUPPORT=y -# CONFIG_DMA_API_DEBUG is not set -CONFIG_DMIID=y -CONFIG_DMI=y -CONFIG_DOUBLEFAULT=y -CONFIG_DUMMY_CONSOLE=y -# CONFIG_EARLY_PRINTK_DBGP is not set -CONFIG_EARLY_PRINTK=y -# CONFIG_EDD is not set -# CONFIG_EEEPC_LAPTOP is not set -# CONFIG_EFI is not set -CONFIG_ELF_CORE=y -CONFIG_EXT2_FS=y -CONFIG_FAST_CMPXCHG_LOCAL=y -# CONFIG_FAULT_INJECTION is not set -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_GEODE_GX1 is not set -# CONFIG_FB_GEODE_GX is not set -CONFIG_FB_GEODE_LX=y -CONFIG_FB_GEODE=y -CONFIG_FB=y -# CONFIG_FCOE_FNIC is not set -# CONFIG_FIRMWARE_EDID is not set -# CONFIG_FIRMWARE_MEMMAP is not set -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -# CONFIG_FONTS is not set -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAME_POINTER is not set -CONFIG_FREEZER=y -# CONFIG_FTRACE_STARTUP_TEST is not set -# CONFIG_FTRACE_SYSCALLS is not set -# CONFIG_FUJITSU_LAPTOP is not set -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -# CONFIG_GENERIC_CPU is not set -CONFIG_GENERIC_FIND_FIRST_BIT=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_ISA_DMA=y -# CONFIG_GENERIC_TIME_VSYSCALL is not set -CONFIG_GEODE_MFGPT_TIMER=y -# CONFIG_HAMRADIO is not set -# CONFIG_HANGCHECK_TIMER is not set -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_AOUT=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ATOMIC_IOMAP=y -# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_PER_CPU_AREA=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FTRACE_SYSCALLS=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IOREMAP_PROT=y -CONFIG_HAVE_KERNEL_BZIP2=y -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_KVM_IRQCHIP=y -CONFIG_HAVE_KVM=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_HAVE_MLOCK=y -CONFIG_HAVE_MMIOTRACE_SUPPORT=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y -CONFIG_HIBERNATION=y -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIGHMEM4G is not set -# CONFIG_HIGHMEM64G is not set -CONFIG_HPET_EMULATE_RTC=y -# CONFIG_HPET is not set -CONFIG_HPET_TIMER=y -CONFIG_HT_IRQ=y -# CONFIG_HUGETLBFS is not set -CONFIG_HW_CONSOLE=y -# CONFIG_HW_RANDOM_AMD is not set -CONFIG_HW_RANDOM_GEODE=y -# CONFIG_HW_RANDOM_INTEL is not set -CONFIG_HW_RANDOM_VIA=y -CONFIG_HW_RANDOM=y -# CONFIG_I8K is not set -# CONFIG_IMA is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_KEYBOARD=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1200 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=900 -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSE=y -CONFIG_INPUT=y -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INTEL_MENLOW is not set -CONFIG_IO_DELAY_0X80=y -# CONFIG_IO_DELAY_0XED is not set -# CONFIG_IO_DELAY_NONE is not set -CONFIG_IO_DELAY_TYPE_0X80=0 -CONFIG_IO_DELAY_TYPE_0XED=1 -CONFIG_IO_DELAY_TYPE_NONE=3 -CONFIG_IO_DELAY_TYPE_UDELAY=2 -# CONFIG_IO_DELAY_UDELAY is not set -# CONFIG_IOMMU_API is not set -# CONFIG_IOMMU_HELPER is not set -CONFIG_ISA_DMA_API=y -# CONFIG_ISA is not set -# CONFIG_ISCSI_IBFT_FIND is not set -# CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KEXEC_JUMP is not set -CONFIG_KEXEC=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KGDB is not set -CONFIG_KTIME_SCALAR=y -CONFIG_LCD_CLASS_DEVICE=y -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_PLATFORM is not set -# CONFIG_LEDS_ALIX2 is not set -# CONFIG_LEDS_CLEVO_MAIL is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_LOGO is not set -# CONFIG_M386 is not set -# CONFIG_M486 is not set -# CONFIG_M586 is not set -# CONFIG_M586MMX is not set -# CONFIG_M586TSC is not set -# CONFIG_M686 is not set -CONFIG_MARKERS=y -# CONFIG_MATH_EMULATION is not set -# CONFIG_MCA is not set -# CONFIG_MCORE2 is not set -# CONFIG_MCRUSOE is not set -# CONFIG_MCYRIXIII is not set -# CONFIG_MEFFICEON is not set -# CONFIG_MEMTEST is not set -# CONFIG_MGEODEGX1 is not set -CONFIG_MGEODE_LX=y -# CONFIG_MICROCODE is not set -# CONFIG_MISC_DEVICES is not set -# CONFIG_MK6 is not set -# CONFIG_MK7 is not set -# CONFIG_MK8 is not set -CONFIG_MMC_BLOCK=y -CONFIG_MMC_SDHCI=y -CONFIG_MMC=y -# CONFIG_MMIOTRACE is not set -# CONFIG_MOUSE_BCM5974 is not set -CONFIG_MOUSE_PS2_ALPS=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -CONFIG_MOUSE_PS2_LIFEBOOK=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_OLPC=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -CONFIG_MOUSE_PS2_TRACKPOINT=y -CONFIG_MOUSE_PS2=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MPENTIUM4 is not set -# CONFIG_MPENTIUMIII is not set -# CONFIG_MPENTIUMII is not set -# CONFIG_MPENTIUMM is not set -# CONFIG_MPSC is not set -# CONFIG_MSI_LAPTOP is not set -CONFIG_MTD_BLOCK2MTD=y -# CONFIG_MTD_CFI is not set -CONFIG_MTD_CMDLINE_PARTS=y -CONFIG_MTD_PCI=y -# CONFIG_MTD_TS5500 is not set -# CONFIG_MTRR is not set -# CONFIG_MVIAC3_2 is not set -# CONFIG_MVIAC7 is not set -# CONFIG_MWINCHIP3D is not set -# CONFIG_MWINCHIPC6 is not set -# CONFIG_NETDEV_1000 is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_NET_ETHERNET is not set -# CONFIG_NETWORK_FILESYSTEMS is not set -CONFIG_NOHIGHMEM=y -CONFIG_NO_HZ=y -CONFIG_NOP_TRACER=y -CONFIG_NR_CPUS=1 -# CONFIG_NSC_GPIO is not set -CONFIG_NVRAM=y -CONFIG_OLPC=y -CONFIG_OPROFILE=y -# CONFIG_OPTIMIZE_INLINING is not set -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PANASONIC_LAPTOP is not set -# CONFIG_PARAVIRT_GUEST is not set -# CONFIG_PARTITION_ADVANCED is not set -# CONFIG_PC8736x_GPIO is not set -# CONFIG_PCI_DEBUG is not set -CONFIG_PCI_DIRECT=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCIEPORTBUS is not set -# CONFIG_PCI_GOANY is not set -# CONFIG_PCI_GOBIOS is not set -# CONFIG_PCI_GODIRECT is not set -# CONFIG_PCI_GOMMCONFIG is not set -CONFIG_PCI_GOOLPC=y -CONFIG_PCI_OLPC=y -CONFIG_PCSPKR_PLATFORM=y -# CONFIG_PDA_POWER is not set -CONFIG_PHYSICAL_ALIGN=0x100000 -CONFIG_PHYSICAL_START=0x100000 -CONFIG_PM_DEBUG=y -CONFIG_PM_SLEEP=y -CONFIG_PM_STD_PARTITION="" -# CONFIG_PM_TRACE_RTC is not set -# CONFIG_PM_VERBOSE is not set -CONFIG_PM=y -CONFIG_PNPACPI=y -CONFIG_PNP_DEBUG_MESSAGES=y -CONFIG_PNP=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -CONFIG_POWER_SUPPLY=y -# CONFIG_POWER_TRACER is not set -# CONFIG_PREEMPT_NONE is not set -CONFIG_PREEMPT_VOLUNTARY=y -CONFIG_PROCESSOR_SELECT=y -CONFIG_PROFILING=y -# CONFIG_PROVE_LOCKING is not set -# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set -# CONFIG_RCU_TORTURE_TEST is not set -CONFIG_RELAY=y -# CONFIG_RELOCATABLE is not set -CONFIG_RING_BUFFER=y -CONFIG_RTC=y -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_RWSEM_GENERIC_SPINLOCK is not set -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SCHED_DEBUG=y -CONFIG_SCHED_HRTICK=y -CONFIG_SCHED_OMIT_FRAME_POINTER=y -CONFIG_SCHEDSTATS=y -CONFIG_SCSI=y -# CONFIG_SCx200 is not set -# CONFIG_SDIO_UART is not set -# CONFIG_SERIAL_8250_EXTENDED is not set -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_PNP=y -# CONFIG_SERIO_CT82C710 is not set -CONFIG_SERIO_I8042=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_RAW is not set -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO=y -# CONFIG_SLOW_WORK is not set -# CONFIG_SONYPI is not set -# CONFIG_SPARSE_IRQ is not set -CONFIG_SPARSEMEM_STATIC=y -CONFIG_STACKTRACE=y -CONFIG_STRICT_DEVMEM=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SUSPEND=y -# CONFIG_SYSPROF_TRACER is not set -# CONFIG_TC1100_WMI is not set -# CONFIG_TELCLOCK is not set -CONFIG_THERMAL=y -# CONFIG_THINKPAD_ACPI is not set -CONFIG_TIMER_STATS=y -# CONFIG_TOSHIBA is not set -CONFIG_TRACEPOINTS=y -CONFIG_TRACING_SUPPORT=y -CONFIG_TRACING=y -CONFIG_UID16=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_SUSPEND=y -CONFIG_USB_UHCI_HCD=y -CONFIG_USB=y -CONFIG_USER_STACKTRACE_SUPPORT=y -CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 -CONFIG_VGACON_SOFT_SCROLLBACK=y -CONFIG_VGA_CONSOLE=y -CONFIG_VM86=y -CONFIG_VM_EVENT_COUNTERS=y -# CONFIG_VMSPLIT_2G_OPT is not set -# CONFIG_VMSPLIT_3G_OPT is not set -CONFIG_VT_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_VT=y -# CONFIG_WATCHDOG is not set -CONFIG_X86_32_LAZY_GS=y -CONFIG_X86_32=y -# CONFIG_X86_64 is not set -# CONFIG_X86_ACPI_CPUFREQ is not set -CONFIG_X86_BSWAP=y -# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set -CONFIG_X86_CMPXCHG=y -# CONFIG_X86_CPU_DEBUG is not set -# CONFIG_X86_CPUFREQ_NFORCE2 is not set -# CONFIG_X86_CPUID is not set -CONFIG_X86_CPU=y -CONFIG_X86_DEBUGCTLMSR=y -# CONFIG_X86_DS is not set -# CONFIG_X86_ELAN is not set -# CONFIG_X86_E_POWERSAVER is not set -CONFIG_X86_EXTENDED_PLATFORM=y -CONFIG_X86_GENERIC=y -# CONFIG_X86_GX_SUSPMOD is not set -CONFIG_X86_INTEL_USERCOPY=y -CONFIG_X86_INTERNODE_CACHE_BYTES=64 -CONFIG_X86_INVLPG=y -CONFIG_X86_IO_APIC=y -CONFIG_X86_L1_CACHE_BYTES=64 -CONFIG_X86_L1_CACHE_SHIFT=5 -CONFIG_X86_LOCAL_APIC=y -# CONFIG_X86_LONGHAUL is not set -# CONFIG_X86_LONGRUN is not set -# CONFIG_X86_MCE is not set -CONFIG_X86_MINIMUM_CPU_FAMILY=4 -CONFIG_X86_MPPARSE=y -# CONFIG_X86_MSR is not set -# CONFIG_X86_P4_CLOCKMOD is not set -# CONFIG_X86_PAE is not set -CONFIG_X86_PLATFORM_DEVICES=y -CONFIG_X86_PM_TIMER=y -CONFIG_X86_POPAD_OK=y -# CONFIG_X86_POWERNOW_K6 is not set -# CONFIG_X86_POWERNOW_K7 is not set -# CONFIG_X86_POWERNOW_K8 is not set -# CONFIG_X86_PTDUMP is not set -# CONFIG_X86_RDC321X is not set -# CONFIG_X86_REBOOTFIXUPS is not set -# CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set -# CONFIG_X86_RESERVE_LOW_64K is not set -# CONFIG_X86_SPEEDSTEP_CENTRINO is not set -# CONFIG_X86_SPEEDSTEP_ICH is not set -# CONFIG_X86_SPEEDSTEP_LIB is not set -# CONFIG_X86_SPEEDSTEP_SMI is not set -CONFIG_X86_TSC=y -CONFIG_X86_UP_APIC=y -CONFIG_X86_UP_IOAPIC=y -CONFIG_X86_USE_3DNOW=y -CONFIG_X86_USE_PPRO_CHECKSUM=y -CONFIG_X86_VERBOSE_BOOTUP=y -CONFIG_X86_WP_WORKS_OK=y -CONFIG_X86_XADD=y -CONFIG_X86=y -# CONFIG_ZONE_DMA32 is not set diff --git a/target/linux/x86/olpc/config-2.6.31 b/target/linux/x86/olpc/config-2.6.31 deleted file mode 100644 index 7db4baa7c..000000000 --- a/target/linux/x86/olpc/config-2.6.31 +++ /dev/null @@ -1,545 +0,0 @@ -CONFIG_4KSTACKS=y -# CONFIG_64BIT is not set -CONFIG_ACPI_AC=y -# CONFIG_ACPI_ASUS is not set -CONFIG_ACPI_BATTERY=y -CONFIG_ACPI_BLACKLIST_YEAR=0 -CONFIG_ACPI_BUTTON=y -# CONFIG_ACPI_CONTAINER is not set -# CONFIG_ACPI_CUSTOM_DSDT is not set -# CONFIG_ACPI_DEBUG is not set -# CONFIG_ACPI_DOCK is not set -CONFIG_ACPI_FAN=y -# CONFIG_ACPI_PCI_SLOT is not set -CONFIG_ACPI_PROCESSOR=y -CONFIG_ACPI_PROC_EVENT=y -# CONFIG_ACPI_PROCFS is not set -CONFIG_ACPI_PROCFS_POWER=y -# CONFIG_ACPI_SBS is not set -CONFIG_ACPI_SLEEP=y -CONFIG_ACPI_SYSFS_POWER=y -CONFIG_ACPI_THERMAL=y -# CONFIG_ACPI_TOSHIBA is not set -# CONFIG_ACPI_WMI is not set -CONFIG_ACPI=y -# CONFIG_APM is not set -CONFIG_ARCH_DEFCONFIG="arch/x86/configs/i386_defconfig" -CONFIG_ARCH_HAS_CACHE_LINE_SIZE=y -CONFIG_ARCH_HAS_CPU_IDLE_WAIT=y -CONFIG_ARCH_HAS_CPU_RELAX=y -CONFIG_ARCH_HAS_DEFAULT_IDLE=y -CONFIG_ARCH_HIBERNATION_POSSIBLE=y -CONFIG_ARCH_MAY_HAVE_PC_FDC=y -# CONFIG_ARCH_PHYS_ADDR_T_64BIT is not set -CONFIG_ARCH_POPULATES_NODE_MAP=y -CONFIG_ARCH_SELECT_MEMORY_MODEL=y -CONFIG_ARCH_SPARSEMEM_ENABLE=y -CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y -CONFIG_ARCH_SUPPORTS_MSI=y -CONFIG_ARCH_SUPPORTS_OPTIMIZED_INLINING=y -CONFIG_ARCH_SUSPEND_POSSIBLE=y -CONFIG_ARCH_WANT_FRAME_POINTERS=y -CONFIG_ARCH_WANT_OPTIONAL_GPIOLIB=y -# CONFIG_ASUS_LAPTOP is not set -CONFIG_ATA_GENERIC=y -CONFIG_ATA_PIIX=y -CONFIG_ATA=y -# CONFIG_AUDIT_ARCH is not set -CONFIG_BACKLIGHT_CLASS_DEVICE=y -CONFIG_BACKLIGHT_GENERIC=y -CONFIG_BACKLIGHT_LCD_SUPPORT=y -# CONFIG_BACKLIGHT_MBP_NVIDIA is not set -# CONFIG_BACKLIGHT_PROGEAR is not set -# CONFIG_BACKLIGHT_SAHARA is not set -# CONFIG_BACKTRACE_SELF_TEST is not set -CONFIG_BATTERY_OLPC=y -CONFIG_BINARY_PRINTF=y -CONFIG_BINFMT_MISC=y -CONFIG_BITREVERSE=y -# CONFIG_BLK_DEV is not set -CONFIG_BLK_DEV_SD=y -CONFIG_BLK_DEV_SR_VENDOR=y -CONFIG_BLK_DEV_SR=y -# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set -CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 -# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set -CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 -# CONFIG_BOOT_PRINTK_DELAY is not set -CONFIG_BOUNCE=y -CONFIG_CAN_PM_TRACE=y -# CONFIG_CC_STACKPROTECTOR is not set -CONFIG_CHR_DEV_SG=y -CONFIG_CLOCKSOURCE_WATCHDOG=y -# CONFIG_CMDLINE_BOOL is not set -# CONFIG_COMPAL_LAPTOP is not set -CONFIG_COMPAT_VDSO=y -CONFIG_CONSOLE_TRANSLATIONS=y -CONFIG_CONTEXT_SWITCH_TRACER=y -# CONFIG_CPA_DEBUG is not set -# CONFIG_CPU_FREQ_DEBUG is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set -# CONFIG_CPU_FREQ_GOV_ONDEMAND is not set -CONFIG_CPU_FREQ_GOV_PERFORMANCE=y -# CONFIG_CPU_FREQ_GOV_POWERSAVE is not set -# CONFIG_CPU_FREQ_GOV_USERSPACE is not set -# CONFIG_CPU_FREQ_STAT_DETAILS is not set -CONFIG_CPU_FREQ_STAT=y -CONFIG_CPU_FREQ_TABLE=y -CONFIG_CPU_FREQ=y -CONFIG_CPU_IDLE_GOV_LADDER=y -CONFIG_CPU_IDLE_GOV_MENU=y -CONFIG_CPU_IDLE=y -CONFIG_CPU_SUP_AMD=y -CONFIG_CPU_SUP_CENTAUR=y -CONFIG_CPU_SUP_CYRIX_32=y -CONFIG_CPU_SUP_INTEL=y -CONFIG_CPU_SUP_TRANSMETA_32=y -CONFIG_CPU_SUP_UMC_32=y -# CONFIG_CS5535_GPIO is not set -# CONFIG_DCDBAS is not set -# CONFIG_DEBUG_BLOCK_EXT_DEVT is not set -# CONFIG_DEBUG_BOOT_PARAMS is not set -CONFIG_DEBUG_BUGVERBOSE=y -# CONFIG_DEBUG_DEVRES is not set -# CONFIG_DEBUG_DRIVER is not set -# CONFIG_DEBUG_INFO is not set -CONFIG_DEBUG_KERNEL=y -# CONFIG_DEBUG_KMEMLEAK is not set -# CONFIG_DEBUG_KOBJECT is not set -# CONFIG_DEBUG_LIST is not set -# CONFIG_DEBUG_LOCK_ALLOC is not set -# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set -CONFIG_DEBUG_MEMORY_INIT=y -# CONFIG_DEBUG_MUTEXES is not set -# CONFIG_DEBUG_NOTIFIERS is not set -# CONFIG_DEBUG_NX_TEST is not set -# CONFIG_DEBUG_OBJECTS is not set -# CONFIG_DEBUG_PAGEALLOC is not set -# CONFIG_DEBUG_RODATA is not set -# CONFIG_DEBUG_RT_MUTEXES is not set -# CONFIG_DEBUG_SG is not set -# CONFIG_DEBUG_SHIRQ is not set -# CONFIG_DEBUG_SPINLOCK is not set -# CONFIG_DEBUG_SPINLOCK_SLEEP is not set -# CONFIG_DEBUG_STACKOVERFLOW is not set -# CONFIG_DEBUG_STACK_USAGE is not set -# CONFIG_DEBUG_VIRTUAL is not set -# CONFIG_DEBUG_VM is not set -# CONFIG_DEBUG_WRITECOUNT is not set -CONFIG_DECOMPRESS_BZIP2=y -CONFIG_DECOMPRESS_GZIP=y -CONFIG_DECOMPRESS_LZMA=y -CONFIG_DEFAULT_IO_DELAY_TYPE=0 -# CONFIG_DELL_RBU is not set -CONFIG_DETECT_HUNG_TASK=y -CONFIG_DETECT_SOFTLOCKUP=y -CONFIG_DEVPORT=y -CONFIG_DISPLAY_SUPPORT=y -# CONFIG_DMA_API_DEBUG is not set -CONFIG_DMIID=y -CONFIG_DMI=y -CONFIG_DNOTIFY=y -CONFIG_DOUBLEFAULT=y -CONFIG_DUMMY_CONSOLE=y -# CONFIG_EARLY_PRINTK_DBGP is not set -CONFIG_EARLY_PRINTK=y -# CONFIG_EDD is not set -# CONFIG_EFI is not set -CONFIG_ELF_CORE=y -# CONFIG_EMBEDDED is not set -CONFIG_EVENT_PROFILE=y -CONFIG_EVENT_TRACING=y -CONFIG_EXT2_FS=y -CONFIG_FAST_CMPXCHG_LOCAL=y -# CONFIG_FAULT_INJECTION is not set -CONFIG_FB_CFB_COPYAREA=y -CONFIG_FB_CFB_FILLRECT=y -CONFIG_FB_CFB_IMAGEBLIT=y -# CONFIG_FB_GEODE_GX1 is not set -# CONFIG_FB_GEODE_GX is not set -CONFIG_FB_GEODE_LX=y -CONFIG_FB_GEODE=y -# CONFIG_FB_HGA is not set -# CONFIG_FB_LE80578 is not set -# CONFIG_FB_N411 is not set -# CONFIG_FB_UDL is not set -# CONFIG_FB_VESA is not set -CONFIG_FB=y -# CONFIG_FIRMWARE_EDID is not set -CONFIG_FIRMWARE_IN_KERNEL=y -CONFIG_FIRMWARE_MEMMAP=y -CONFIG_FIX_EARLYCON_MEM=y -CONFIG_FONT_8x16=y -CONFIG_FONT_8x8=y -# CONFIG_FONTS is not set -CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y -CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y -CONFIG_FRAMEBUFFER_CONSOLE=y -# CONFIG_FRAME_POINTER is not set -CONFIG_FREEZER=y -# CONFIG_FUJITSU_LAPTOP is not set -CONFIG_GENERIC_BUG=y -CONFIG_GENERIC_CLOCKEVENTS_BROADCAST=y -CONFIG_GENERIC_CLOCKEVENTS_BUILD=y -CONFIG_GENERIC_CLOCKEVENTS=y -CONFIG_GENERIC_CMOS_UPDATE=y -# CONFIG_GENERIC_CPU is not set -CONFIG_GENERIC_FIND_FIRST_BIT=y -CONFIG_GENERIC_FIND_LAST_BIT=y -CONFIG_GENERIC_FIND_NEXT_BIT=y -CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y -CONFIG_GENERIC_IOMAP=y -CONFIG_GENERIC_ISA_DMA=y -# CONFIG_GENERIC_TIME_VSYSCALL is not set -CONFIG_GEODE_MFGPT_TIMER=y -# CONFIG_HAMRADIO is not set -# CONFIG_HANGCHECK_TIMER is not set -CONFIG_HAS_DMA=y -CONFIG_HAS_IOMEM=y -CONFIG_HAS_IOPORT=y -CONFIG_HAVE_AOUT=y -CONFIG_HAVE_ARCH_KGDB=y -CONFIG_HAVE_ARCH_KMEMCHECK=y -CONFIG_HAVE_ARCH_TRACEHOOK=y -CONFIG_HAVE_ATOMIC_IOMAP=y -# CONFIG_HAVE_CPUMASK_OF_CPU_MAP is not set -CONFIG_HAVE_DMA_API_DEBUG=y -CONFIG_HAVE_DMA_ATTRS=y -CONFIG_HAVE_DYNAMIC_FTRACE=y -CONFIG_HAVE_DYNAMIC_PER_CPU_AREA=y -CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y -CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y -CONFIG_HAVE_FTRACE_SYSCALLS=y -CONFIG_HAVE_FUNCTION_GRAPH_FP_TEST=y -CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y -CONFIG_HAVE_FUNCTION_TRACE_MCOUNT_TEST=y -CONFIG_HAVE_FUNCTION_TRACER=y -CONFIG_HAVE_GENERIC_DMA_COHERENT=y -CONFIG_HAVE_IDE=y -CONFIG_HAVE_IOREMAP_PROT=y -CONFIG_HAVE_KERNEL_BZIP2=y -CONFIG_HAVE_KERNEL_GZIP=y -CONFIG_HAVE_KERNEL_LZMA=y -CONFIG_HAVE_KPROBES=y -CONFIG_HAVE_KRETPROBES=y -CONFIG_HAVE_KVM_IRQCHIP=y -CONFIG_HAVE_KVM=y -CONFIG_HAVE_LATENCYTOP_SUPPORT=y -CONFIG_HAVE_MMIOTRACE_SUPPORT=y -CONFIG_HAVE_OPROFILE=y -CONFIG_HAVE_PERF_COUNTERS=y -CONFIG_HAVE_SETUP_PER_CPU_AREA=y -CONFIG_HAVE_UNSTABLE_SCHED_CLOCK=y -CONFIG_HIBERNATION_NVS=y -CONFIG_HIBERNATION=y -CONFIG_HID_SUPPORT=y -CONFIG_HID=y -# CONFIG_HIGHMEM4G is not set -# CONFIG_HIGHMEM64G is not set -# CONFIG_HIGH_RES_TIMERS is not set -CONFIG_HPET_EMULATE_RTC=y -# CONFIG_HPET is not set -CONFIG_HPET_TIMER=y -CONFIG_HT_IRQ=y -# CONFIG_HUGETLBFS is not set -CONFIG_HW_CONSOLE=y -CONFIG_HW_RANDOM_GEODE=y -CONFIG_HW_RANDOM_VIA=y -CONFIG_HW_RANDOM=y -# CONFIG_I8K is not set -# CONFIG_IMA is not set -CONFIG_INITRAMFS_SOURCE="" -CONFIG_INPUT_EVDEV=y -CONFIG_INPUT_KEYBOARD=y -# CONFIG_INPUT_MOUSEDEV_PSAUX is not set -CONFIG_INPUT_MOUSEDEV_SCREEN_X=1200 -CONFIG_INPUT_MOUSEDEV_SCREEN_Y=900 -CONFIG_INPUT_MOUSEDEV=y -CONFIG_INPUT_MOUSE=y -CONFIG_INPUT=y -# CONFIG_INPUT_YEALINK is not set -# CONFIG_INTEL_MENLOW is not set -CONFIG_IO_DELAY_0X80=y -# CONFIG_IO_DELAY_0XED is not set -# CONFIG_IO_DELAY_NONE is not set -CONFIG_IO_DELAY_TYPE_0X80=0 -CONFIG_IO_DELAY_TYPE_0XED=1 -CONFIG_IO_DELAY_TYPE_NONE=3 -CONFIG_IO_DELAY_TYPE_UDELAY=2 -# CONFIG_IO_DELAY_UDELAY is not set -# CONFIG_IOMMU_API is not set -# CONFIG_IOMMU_HELPER is not set -# CONFIG_IOMMU_STRESS is not set -CONFIG_ISA_DMA_API=y -# CONFIG_ISA is not set -# CONFIG_ISCSI_IBFT_FIND is not set -# CONFIG_KALLSYMS_ALL is not set -CONFIG_KALLSYMS=y -CONFIG_KERNEL_GZIP=y -# CONFIG_KERNEL_LZMA is not set -# CONFIG_KEXEC_JUMP is not set -CONFIG_KEXEC=y -CONFIG_KEYBOARD_ATKBD=y -# CONFIG_KEYBOARD_LKKBD is not set -# CONFIG_KEYBOARD_NEWTON is not set -# CONFIG_KEYBOARD_STOWAWAY is not set -# CONFIG_KEYBOARD_SUNKBD is not set -# CONFIG_KEYBOARD_XTKBD is not set -# CONFIG_KGDB is not set -CONFIG_KTIME_SCALAR=y -CONFIG_LCD_CLASS_DEVICE=y -# CONFIG_LCD_ILI9320 is not set -# CONFIG_LCD_PLATFORM is not set -# CONFIG_LEDS_ALIX2 is not set -# CONFIG_LEDS_CLEVO_MAIL is not set -# CONFIG_LOCK_STAT is not set -# CONFIG_LOGO is not set -# CONFIG_M386 is not set -# CONFIG_M486 is not set -# CONFIG_M586 is not set -# CONFIG_M586MMX is not set -# CONFIG_M586TSC is not set -# CONFIG_M686 is not set -CONFIG_MAC80211_DEFAULT_PS_VALUE=0 -CONFIG_MARKERS=y -# CONFIG_MATH_EMULATION is not set -# CONFIG_MCA is not set -# CONFIG_MCORE2 is not set -# CONFIG_MCRUSOE is not set -# CONFIG_MCYRIXIII is not set -# CONFIG_MEFFICEON is not set -# CONFIG_MEMTEST is not set -# CONFIG_MGEODEGX1 is not set -CONFIG_MGEODE_LX=y -# CONFIG_MICROCODE is not set -# CONFIG_MISC_DEVICES is not set -# CONFIG_MK6 is not set -# CONFIG_MK7 is not set -# CONFIG_MK8 is not set -CONFIG_MMC_BLOCK=y -# CONFIG_MMC_SDHCI_PCI is not set -# CONFIG_MMC_SDHCI_PLTFM is not set -CONFIG_MMC_SDHCI=y -# CONFIG_MMC_TIFM_SD is not set -# CONFIG_MMC_WBSD is not set -CONFIG_MMC=y -# CONFIG_MOUSE_BCM5974 is not set -CONFIG_MOUSE_PS2_ALPS=y -# CONFIG_MOUSE_PS2_ELANTECH is not set -CONFIG_MOUSE_PS2_LIFEBOOK=y -CONFIG_MOUSE_PS2_LOGIPS2PP=y -CONFIG_MOUSE_PS2_OLPC=y -CONFIG_MOUSE_PS2_SYNAPTICS=y -# CONFIG_MOUSE_PS2_TOUCHKIT is not set -CONFIG_MOUSE_PS2_TRACKPOINT=y -CONFIG_MOUSE_PS2=y -# CONFIG_MOUSE_SERIAL is not set -# CONFIG_MOUSE_VSXXXAA is not set -# CONFIG_MPENTIUM4 is not set -# CONFIG_MPENTIUMIII is not set -# CONFIG_MPENTIUMII is not set -# CONFIG_MPENTIUMM is not set -# CONFIG_MPSC is not set -# CONFIG_MSI_LAPTOP is not set -CONFIG_MTD_BLOCK2MTD=y -# CONFIG_MTD_CFI is not set -CONFIG_MTD_CMDLINE_PARTS=y -# CONFIG_MTD_COMPLEX_MAPPINGS is not set -# CONFIG_MTD_TS5500 is not set -# CONFIG_MTRR is not set -# CONFIG_MVIAC3_2 is not set -# CONFIG_MVIAC7 is not set -# CONFIG_MWINCHIP3D is not set -# CONFIG_MWINCHIPC6 is not set -CONFIG_NAMESPACES=y -# CONFIG_NETDEV_1000 is not set -# CONFIG_NET_DROP_MONITOR is not set -# CONFIG_NET_ETHERNET is not set -# CONFIG_NET_NS is not set -# CONFIG_NETWORK_FILESYSTEMS is not set -CONFIG_NLS=y -CONFIG_NOHIGHMEM=y -CONFIG_NO_HZ=y -CONFIG_NOP_TRACER=y -CONFIG_NR_CPUS=1 -# CONFIG_NSC_GPIO is not set -CONFIG_NVRAM=y -CONFIG_OLPC=y -CONFIG_OPROFILE=y -# CONFIG_OPTIMIZE_INLINING is not set -CONFIG_OUTPUT_FORMAT="elf32-i386" -CONFIG_PAGEFLAGS_EXTENDED=y -CONFIG_PAGE_OFFSET=0xC0000000 -# CONFIG_PANASONIC_LAPTOP is not set -# CONFIG_PARAVIRT_GUEST is not set -# CONFIG_PARTITION_ADVANCED is not set -CONFIG_PATA_AMD=y -CONFIG_PATA_MPIIX=y -CONFIG_PATA_OLDPIIX=y -CONFIG_PATA_SC1200=y -CONFIG_PATA_VIA=y -# CONFIG_PC8736x_GPIO is not set -# CONFIG_PCI_DEBUG is not set -CONFIG_PCI_DIRECT=y -CONFIG_PCI_DOMAINS=y -# CONFIG_PCIEPORTBUS is not set -# CONFIG_PCI_GOANY is not set -# CONFIG_PCI_GOBIOS is not set -# CONFIG_PCI_GODIRECT is not set -# CONFIG_PCI_GOMMCONFIG is not set -CONFIG_PCI_GOOLPC=y -CONFIG_PCI_OLPC=y -CONFIG_PCSPKR_PLATFORM=y -# CONFIG_PDA_POWER is not set -CONFIG_PERF_COUNTERS=y -CONFIG_PHYSICAL_ALIGN=0x100000 -CONFIG_PHYSICAL_START=0x1000000 -CONFIG_PM_DEBUG=y -CONFIG_PM_SLEEP=y -CONFIG_PM_STD_PARTITION="" -# CONFIG_PM_TRACE_RTC is not set -# CONFIG_PM_VERBOSE is not set -CONFIG_PM=y -CONFIG_PNPACPI=y -CONFIG_PNP_DEBUG_MESSAGES=y -CONFIG_PNP=y -# CONFIG_POWER_SUPPLY_DEBUG is not set -CONFIG_POWER_SUPPLY=y -# CONFIG_PREEMPT_NONE is not set -CONFIG_PREEMPT_VOLUNTARY=y -CONFIG_PROC_PAGE_MONITOR=y -CONFIG_PROFILING=y -# CONFIG_PROVE_LOCKING is not set -# CONFIG_PROVIDE_OHCI1394_DMA_INIT is not set -# CONFIG_RCU_TORTURE_TEST is not set -CONFIG_RD_BZIP2=y -CONFIG_RD_GZIP=y -CONFIG_RELAY=y -# CONFIG_RELOCATABLE is not set -CONFIG_RING_BUFFER=y -CONFIG_RTC=y -# CONFIG_RT_MUTEX_TESTER is not set -# CONFIG_RWSEM_GENERIC_SPINLOCK is not set -CONFIG_RWSEM_XCHGADD_ALGORITHM=y -CONFIG_SCHED_DEBUG=y -# CONFIG_SCHED_HRTICK is not set -CONFIG_SCHED_OMIT_FRAME_POINTER=y -CONFIG_SCHEDSTATS=y -CONFIG_SCSI=y -# CONFIG_SCx200 is not set -# CONFIG_SDIO_UART is not set -# CONFIG_SERIAL_8250_EXTENDED is not set -CONFIG_SERIAL_8250_PCI=y -CONFIG_SERIAL_8250_PNP=y -# CONFIG_SERIO_CT82C710 is not set -CONFIG_SERIO_I8042=y -CONFIG_SERIO_LIBPS2=y -# CONFIG_SERIO_PCIPS2 is not set -# CONFIG_SERIO_RAW is not set -CONFIG_SERIO_SERPORT=y -CONFIG_SERIO=y -# CONFIG_SLAB is not set -# CONFIG_SLUB_DEBUG_ON is not set -CONFIG_SLUB_DEBUG=y -# CONFIG_SLUB_STATS is not set -CONFIG_SLUB=y -# CONFIG_SPARSE_IRQ is not set -CONFIG_SPARSEMEM_STATIC=y -CONFIG_STACKTRACE=y -CONFIG_STRICT_DEVMEM=y -CONFIG_SUSPEND_FREEZER=y -CONFIG_SUSPEND=y -# CONFIG_TC1100_WMI is not set -# CONFIG_TELCLOCK is not set -CONFIG_THERMAL=y -# CONFIG_THINKPAD_ACPI is not set -CONFIG_TIMER_STATS=y -# CONFIG_TOSHIBA is not set -CONFIG_TRACEPOINTS=y -CONFIG_TRACING=y -CONFIG_UID16=y -CONFIG_USB_EHCI_HCD=y -CONFIG_USB_EHCI_TT_NEWSCHED=y -# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set -# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set -CONFIG_USB_OHCI_HCD=y -CONFIG_USB_STORAGE=y -CONFIG_USB_SUPPORT=y -CONFIG_USB_SUSPEND=y -CONFIG_USB_UHCI_HCD=y -CONFIG_USB=y -# CONFIG_USER_NS is not set -CONFIG_USER_STACKTRACE_SUPPORT=y -CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 -CONFIG_VGACON_SOFT_SCROLLBACK=y -CONFIG_VGA_CONSOLE=y -CONFIG_VM86=y -CONFIG_VM_EVENT_COUNTERS=y -CONFIG_VT_CONSOLE=y -# CONFIG_VT_HW_CONSOLE_BINDING is not set -CONFIG_VT=y -# CONFIG_WATCHDOG is not set -CONFIG_X86_32_LAZY_GS=y -CONFIG_X86_32=y -# CONFIG_X86_64 is not set -# CONFIG_X86_ACPI_CPUFREQ is not set -# CONFIG_X86_ANCIENT_MCE is not set -CONFIG_X86_BSWAP=y -# CONFIG_X86_CHECK_BIOS_CORRUPTION is not set -CONFIG_X86_CMPXCHG=y -# CONFIG_X86_CPU_DEBUG is not set -# CONFIG_X86_CPUFREQ_NFORCE2 is not set -# CONFIG_X86_CPUID is not set -CONFIG_X86_CPU=y -CONFIG_X86_DEBUGCTLMSR=y -# CONFIG_X86_DS is not set -# CONFIG_X86_ELAN is not set -# CONFIG_X86_E_POWERSAVER is not set -CONFIG_X86_EXTENDED_PLATFORM=y -CONFIG_X86_GENERIC=y -# CONFIG_X86_GX_SUSPMOD is not set -CONFIG_X86_INTEL_USERCOPY=y -CONFIG_X86_INTERNODE_CACHE_BYTES=64 -CONFIG_X86_INVLPG=y -CONFIG_X86_IO_APIC=y -CONFIG_X86_L1_CACHE_BYTES=64 -CONFIG_X86_L1_CACHE_SHIFT=5 -CONFIG_X86_LOCAL_APIC=y -# CONFIG_X86_LONGHAUL is not set -# CONFIG_X86_LONGRUN is not set -# CONFIG_X86_MCE is not set -CONFIG_X86_MINIMUM_CPU_FAMILY=4 -CONFIG_X86_MPPARSE=y -# CONFIG_X86_MSR is not set -# CONFIG_X86_P4_CLOCKMOD is not set -# CONFIG_X86_PAE is not set -CONFIG_X86_PLATFORM_DEVICES=y -CONFIG_X86_PM_TIMER=y -CONFIG_X86_POPAD_OK=y -# CONFIG_X86_POWERNOW_K6 is not set -# CONFIG_X86_POWERNOW_K7 is not set -# CONFIG_X86_POWERNOW_K8 is not set -# CONFIG_X86_PTDUMP is not set -# CONFIG_X86_RDC321X is not set -# CONFIG_X86_REBOOTFIXUPS is not set -# CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set -# CONFIG_X86_RESERVE_LOW_64K is not set -# CONFIG_X86_SPEEDSTEP_CENTRINO is not set -# CONFIG_X86_SPEEDSTEP_ICH is not set -# CONFIG_X86_SPEEDSTEP_LIB is not set -# CONFIG_X86_SPEEDSTEP_SMI is not set -CONFIG_X86_TSC=y -CONFIG_X86_UP_APIC=y -CONFIG_X86_UP_IOAPIC=y -CONFIG_X86_USE_3DNOW=y -CONFIG_X86_USE_PPRO_CHECKSUM=y -CONFIG_X86_VERBOSE_BOOTUP=y -CONFIG_X86_WP_WORKS_OK=y -CONFIG_X86_XADD=y -CONFIG_X86=y -# CONFIG_ZONE_DMA32 is not set diff --git a/target/linux/x86/olpc/config-default b/target/linux/x86/olpc/config-default new file mode 100644 index 000000000..e5440f5e6 --- /dev/null +++ b/target/linux/x86/olpc/config-default @@ -0,0 +1,156 @@ +# CONFIG_ACER_WMI is not set +CONFIG_ACPI_AC=y +CONFIG_ACPI_BATTERY=y +CONFIG_ACPI_BUTTON=y +CONFIG_ACPI_FAN=y +CONFIG_ACPI_PROCFS_POWER=y +CONFIG_ACPI_PROC_EVENT=y +CONFIG_ACPI_SLEEP=y +# CONFIG_APM is not set +CONFIG_BACKLIGHT_CLASS_DEVICE=y +CONFIG_BACKLIGHT_GENERIC=y +CONFIG_BACKLIGHT_LCD_SUPPORT=y +# CONFIG_BACKLIGHT_MBP_NVIDIA is not set +# CONFIG_BACKLIGHT_PROGEAR is not set +# CONFIG_BACKLIGHT_SAHARA is not set +CONFIG_BATTERY_OLPC=y +# CONFIG_BLK_DEV is not set +CONFIG_BLK_DEV_SR=y +CONFIG_BLK_DEV_SR_VENDOR=y +# CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set +CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 +# CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set +CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 +CONFIG_CAN_PM_TRACE=y +CONFIG_CHR_DEV_SG=y +# CONFIG_COMPAL_LAPTOP is not set +# CONFIG_CPA_DEBUG is not set +# CONFIG_CPU_FREQ_STAT_DETAILS is not set +CONFIG_CPU_IDLE_GOV_MENU=y +# CONFIG_DEBUG_BOOT_PARAMS is not set +CONFIG_DEBUG_BUGVERBOSE=y +CONFIG_DEBUG_KERNEL=y +# CONFIG_DEBUG_NX_TEST is not set +# CONFIG_DEBUG_PAGEALLOC is not set +# CONFIG_DEBUG_RODATA is not set +# CONFIG_DEBUG_STACKOVERFLOW is not set +# CONFIG_DEBUG_VIRTUAL is not set +CONFIG_DECOMPRESS_LZO=y +CONFIG_DETECT_HUNG_TASK=y +CONFIG_DETECT_SOFTLOCKUP=y +CONFIG_DISPLAY_SUPPORT=y +CONFIG_DMIID=y +# CONFIG_EMBEDDED is not set +CONFIG_FB=y +CONFIG_FB_CFB_COPYAREA=y +CONFIG_FB_CFB_FILLRECT=y +CONFIG_FB_CFB_IMAGEBLIT=y +CONFIG_FB_GEODE=y +# CONFIG_FB_GEODE_GX is not set +# CONFIG_FB_GEODE_GX1 is not set +CONFIG_FB_GEODE_LX=y +# CONFIG_FB_VESA is not set +# CONFIG_FIRMWARE_EDID is not set +# CONFIG_FONTS is not set +CONFIG_FONT_8x16=y +CONFIG_FONT_8x8=y +CONFIG_FRAMEBUFFER_CONSOLE=y +CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y +CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y +CONFIG_FREEZER=y +# CONFIG_FUJITSU_LAPTOP is not set +CONFIG_GEODE_MFGPT_TIMER=y +# CONFIG_HAMRADIO is not set +CONFIG_HAVE_PERF_EVENTS=y +CONFIG_HIBERNATION=y +CONFIG_HIBERNATION_NVS=y +# CONFIG_HPET is not set +CONFIG_INPUT_EVDEV=y +# CONFIG_INPUT_MOUSEDEV_PSAUX is not set +CONFIG_INPUT_MOUSEDEV_SCREEN_X=1200 +CONFIG_INPUT_MOUSEDEV_SCREEN_Y=900 +# CONFIG_ISA is not set +# CONFIG_KALLSYMS_ALL is not set +# CONFIG_KEXEC_JUMP is not set +CONFIG_LCD_CLASS_DEVICE=y +# CONFIG_LCD_ILI9320 is not set +# CONFIG_LCD_PLATFORM is not set +CONFIG_LZO_DECOMPRESS=y +# CONFIG_M486 is not set +# CONFIG_MATH_EMULATION is not set +CONFIG_MGEODE_LX=y +# CONFIG_MICROCODE is not set +# CONFIG_MISC_DEVICES is not set +CONFIG_MMC=y +# CONFIG_MMC_AT91 is not set +# CONFIG_MMC_ATMELMCI is not set +CONFIG_MMC_BLOCK=y +CONFIG_MMC_SDHCI=y +# CONFIG_MMC_SDHCI_PCI is not set +# CONFIG_MMC_SDHCI_PLTFM is not set +# CONFIG_MMC_TIFM_SD is not set +# CONFIG_MMC_WBSD is not set +CONFIG_MOUSE_PS2_OLPC=y +# CONFIG_MSI_LAPTOP is not set +CONFIG_MTD_CMDLINE_PARTS=y +# CONFIG_MTRR is not set +# CONFIG_NETDEV_1000 is not set +# CONFIG_NETWORK_FILESYSTEMS is not set +# CONFIG_NET_ETHERNET is not set +CONFIG_NLS=y +CONFIG_NO_HZ=y +CONFIG_OLPC=y +CONFIG_OPROFILE=y +# CONFIG_OPROFILE_EVENT_MULTIPLEX is not set +# CONFIG_PANASONIC_LAPTOP is not set +# CONFIG_PARTITION_ADVANCED is not set +# CONFIG_PCI_GOANY is not set +CONFIG_PCI_GOOLPC=y +CONFIG_PCI_OLPC=y +CONFIG_PERF_COUNTERS=y +CONFIG_PM_DEBUG=y +CONFIG_PM_SLEEP=y +CONFIG_PM_STD_PARTITION="" +# CONFIG_PM_TRACE_RTC is not set +# CONFIG_PM_VERBOSE is not set +# CONFIG_PREEMPT_NONE is not set +CONFIG_PREEMPT_VOLUNTARY=y +CONFIG_PROFILING=y +CONFIG_RD_LZO=y +CONFIG_RELAY=y +CONFIG_RING_BUFFER=y +CONFIG_RING_BUFFER_ALLOW_SWAP=y +CONFIG_SCHEDSTATS=y +CONFIG_SCHED_DEBUG=y +# CONFIG_SCx200 is not set +# CONFIG_SDIO_UART is not set +CONFIG_SUSPEND=y +CONFIG_SUSPEND_FREEZER=y +CONFIG_TIMER_STATS=y +CONFIG_USB=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_TT_NEWSCHED=y +# CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set +# CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_STORAGE=y +CONFIG_USB_SUSPEND=y +CONFIG_USB_UHCI_HCD=y +CONFIG_VGACON_SOFT_SCROLLBACK=y +CONFIG_VGACON_SOFT_SCROLLBACK_SIZE=64 +CONFIG_VGA_ARB=y +# CONFIG_WATCHDOG is not set +CONFIG_X86_DEBUGCTLMSR=y +# CONFIG_X86_DS is not set +# CONFIG_X86_ELAN is not set +CONFIG_X86_EXTENDED_PLATFORM=y +CONFIG_X86_L1_CACHE_SHIFT=5 +# CONFIG_X86_MCE is not set +# CONFIG_X86_MRST is not set +# CONFIG_X86_PTDUMP is not set +# CONFIG_X86_RDC321X is not set +# CONFIG_X86_REROUTE_FOR_BROKEN_BOOT_IRQS is not set +# CONFIG_X86_RESERVE_LOW_64K is not set +CONFIG_X86_TSC=y +CONFIG_X86_USE_3DNOW=y +CONFIG_X86_USE_PPRO_CHECKSUM=y diff --git a/target/linux/x86/patches-2.6.30/100-pata_sc1200-wrap.patch b/target/linux/x86/patches-2.6.30/100-pata_sc1200-wrap.patch deleted file mode 100644 index 066694b35..000000000 --- a/target/linux/x86/patches-2.6.30/100-pata_sc1200-wrap.patch +++ /dev/null @@ -1,11 +0,0 @@ ---- a/drivers/ata/pata_sc1200.c -+++ b/drivers/ata/pata_sc1200.c -@@ -236,7 +236,7 @@ static int sc1200_init_one(struct pci_de - .port_ops = &sc1200_port_ops - }; - /* Can't enable port 2 yet, see top comments */ -- const struct ata_port_info *ppi[] = { &info, }; -+ const struct ata_port_info *ppi[] = { &info, &ata_dummy_port_info }; - - return ata_pci_sff_init_one(dev, ppi, &sc1200_sht, NULL); - } diff --git a/target/linux/x86/patches-2.6.30/300-block2mtd_init.patch b/target/linux/x86/patches-2.6.30/300-block2mtd_init.patch deleted file mode 100644 index fdfb9d017..000000000 --- a/target/linux/x86/patches-2.6.30/300-block2mtd_init.patch +++ /dev/null @@ -1,210 +0,0 @@ ---- a/arch/x86/kernel/vmlinux_32.lds.S -+++ b/arch/x86/kernel/vmlinux_32.lds.S -@@ -136,6 +136,12 @@ SECTIONS - INITCALLS - __initcall_end = .; - } -+ .root_initcall.init : AT(ADDR(.root_initcall.init) - LOAD_OFFSET) { -+ __root_initcall_start = .; -+ INITCALLS_ROOT -+ __root_initcall_end = .; -+ } -+ - .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) { - __con_initcall_start = .; - *(.con_initcall.init) ---- a/drivers/mtd/devices/block2mtd.c -+++ b/drivers/mtd/devices/block2mtd.c -@@ -18,10 +18,18 @@ - #include - #include - #include -+#include -+#include - - #define ERROR(fmt, args...) printk(KERN_ERR "block2mtd: " fmt "\n" , ## args) - #define INFO(fmt, args...) printk(KERN_INFO "block2mtd: " fmt "\n" , ## args) - -+struct retry { -+ struct list_head list; -+ const char *val; -+}; -+ -+static LIST_HEAD(retry_list); - - /* Info for the block device */ - struct block2mtd_dev { -@@ -33,10 +41,34 @@ struct block2mtd_dev { - char devname[0]; - }; - -+static int block2mtd_setup2(const char *val); - - /* Static info about the MTD, used in cleanup_module */ - static LIST_HEAD(blkmtd_device_list); - -+static int add_retry(const char *val) { -+ struct retry *r = kmalloc(sizeof(struct retry), GFP_KERNEL); -+ -+ INIT_LIST_HEAD(&r->list); -+ r->val = val; -+ list_add(&r->list, &retry_list); -+ -+ return 0; -+} -+ -+static int __init process_retries(void) { -+ struct list_head *p, *tmp; -+ -+ list_for_each_safe(p, tmp, &retry_list) { -+ struct retry *r = list_entry(p, struct retry, list); -+ block2mtd_setup2(r->val); -+ msleep(100); -+ list_del(p); -+ kfree(r); -+ } -+ return 0; -+} -+rootfs_initcall(process_retries); - - static struct page *page_read(struct address_space *mapping, int index) - { -@@ -511,7 +543,9 @@ static int block2mtd_setup2(const char * - if (token[2] && (strlen(token[2]) + 1 > 80)) - parse_err("mtd device name too long"); - -- add_device(name, erase_size, token[2]); -+ if (add_device(name, erase_size, token[2]) == NULL) { -+ add_retry(val); -+ } - - return 0; - } ---- a/include/asm-generic/vmlinux.lds.h -+++ b/include/asm-generic/vmlinux.lds.h -@@ -474,12 +474,14 @@ - *(.initcall4s.init) \ - *(.initcall5.init) \ - *(.initcall5s.init) \ -- *(.initcallrootfs.init) \ - *(.initcall6.init) \ - *(.initcall6s.init) \ - *(.initcall7.init) \ - *(.initcall7s.init) - -+#define INITCALLS_ROOT \ -+ *(.initcallrootfs.init) -+ - /** - * PERCPU_VADDR - define output section for percpu area - * @vaddr: explicit base address (optional) ---- a/init/do_mounts.c -+++ b/init/do_mounts.c -@@ -176,16 +176,8 @@ static int __init fs_names_setup(char *s - return 1; - } - --static unsigned int __initdata root_delay; --static int __init root_delay_setup(char *str) --{ -- root_delay = simple_strtoul(str, NULL, 0); -- return 1; --} -- - __setup("rootflags=", root_data_setup); - __setup("rootfstype=", fs_names_setup); --__setup("rootdelay=", root_delay_setup); - - static void __init get_fs_names(char *page) - { -@@ -365,23 +357,6 @@ void __init prepare_namespace(void) - { - int is_floppy; - -- if (root_delay) { -- printk(KERN_INFO "Waiting %dsec before mounting root device...\n", -- root_delay); -- ssleep(root_delay); -- } -- -- /* -- * wait for the known devices to complete their probing -- * -- * Note: this is a potential source of long boot delays. -- * For example, it is not atypical to wait 5 seconds here -- * for the touchpad of a laptop to initialize. -- */ -- wait_for_device_probe(); -- -- md_run_setup(); -- - if (saved_root_name[0]) { - root_device_name = saved_root_name; - if (!strncmp(root_device_name, "mtd", 3) || ---- a/init/main.c -+++ b/init/main.c -@@ -76,6 +76,7 @@ - #ifdef CONFIG_X86_LOCAL_APIC - #include - #endif -+#include "do_mounts.h" - - static int kernel_init(void *); - -@@ -753,12 +754,13 @@ int do_one_initcall(initcall_t fn) - - - extern initcall_t __initcall_start[], __initcall_end[], __early_initcall_end[]; -+extern initcall_t __root_initcall_start[], __root_initcall_end[]; - --static void __init do_initcalls(void) -+static void __init do_initcalls(initcall_t *start, initcall_t *end) - { - initcall_t *call; - -- for (call = __early_initcall_end; call < __initcall_end; call++) -+ for (call = start; call < end; call++) - do_one_initcall(*call); - - /* Make sure there is no pending stuff from the initcall sequence */ -@@ -780,7 +782,7 @@ static void __init do_basic_setup(void) - usermodehelper_init(); - driver_init(); - init_irq_proc(); -- do_initcalls(); -+ do_initcalls(__early_initcall_end, __initcall_end); - } - - static void __init do_pre_smp_initcalls(void) -@@ -841,6 +843,13 @@ static noinline int init_post(void) - panic("No init found. Try passing init= option to kernel."); - } - -+static unsigned int __initdata root_delay; -+static int __init root_delay_setup(char *str) -+{ -+ root_delay = simple_strtoul(str, NULL, 0); -+ return 1; -+} -+__setup("rootdelay=", root_delay_setup); - static int __init kernel_init(void * unused) - { - lock_kernel(); -@@ -880,7 +889,16 @@ static int __init kernel_init(void * unu - - if (sys_access((const char __user *) ramdisk_execute_command, 0) != 0) { - ramdisk_execute_command = NULL; -- prepare_namespace(); -+ if (root_delay) { -+ printk(KERN_INFO "Waiting %desc before mounting root device...\n", -+ root_delay); -+ ssleep(root_delay); -+ } -+ while (driver_probe_done() != 0) -+ msleep(100); -+ do_initcalls(__root_initcall_start, __root_initcall_end); -+ md_run_setup(); -+ prepare_namespace(); - } - - /* diff --git a/target/linux/x86/patches-2.6.31/300-block2mtd_init.patch b/target/linux/x86/patches-2.6.31/300-block2mtd_init.patch deleted file mode 100644 index 3e6ff602d..000000000 --- a/target/linux/x86/patches-2.6.31/300-block2mtd_init.patch +++ /dev/null @@ -1,210 +0,0 @@ ---- a/arch/x86/kernel/vmlinux.lds.S -+++ b/arch/x86/kernel/vmlinux.lds.S -@@ -244,6 +244,12 @@ SECTIONS - __initcall_end = .; - } - -+ .root_initcall.init : AT(ADDR(.root_initcall.init) - LOAD_OFFSET) { -+ __root_initcall_start = .; -+ INITCALLS_ROOT -+ __root_initcall_end = .; -+ } -+ - .con_initcall.init : AT(ADDR(.con_initcall.init) - LOAD_OFFSET) { - __con_initcall_start = .; - *(.con_initcall.init) ---- a/drivers/mtd/devices/block2mtd.c -+++ b/drivers/mtd/devices/block2mtd.c -@@ -18,10 +18,18 @@ - #include - #include - #include -+#include -+#include - - #define ERROR(fmt, args...) printk(KERN_ERR "block2mtd: " fmt "\n" , ## args) - #define INFO(fmt, args...) printk(KERN_INFO "block2mtd: " fmt "\n" , ## args) - -+struct retry { -+ struct list_head list; -+ const char *val; -+}; -+ -+static LIST_HEAD(retry_list); - - /* Info for the block device */ - struct block2mtd_dev { -@@ -33,10 +41,34 @@ struct block2mtd_dev { - char devname[0]; - }; - -+static int block2mtd_setup2(const char *val); - - /* Static info about the MTD, used in cleanup_module */ - static LIST_HEAD(blkmtd_device_list); - -+static int add_retry(const char *val) { -+ struct retry *r = kmalloc(sizeof(struct retry), GFP_KERNEL); -+ -+ INIT_LIST_HEAD(&r->list); -+ r->val = val; -+ list_add(&r->list, &retry_list); -+ -+ return 0; -+} -+ -+static int __init process_retries(void) { -+ struct list_head *p, *tmp; -+ -+ list_for_each_safe(p, tmp, &retry_list) { -+ struct retry *r = list_entry(p, struct retry, list); -+ block2mtd_setup2(r->val); -+ msleep(100); -+ list_del(p); -+ kfree(r); -+ } -+ return 0; -+} -+rootfs_initcall(process_retries); - - static struct page *page_read(struct address_space *mapping, int index) - { -@@ -511,7 +543,9 @@ static int block2mtd_setup2(const char * - if (token[2] && (strlen(token[2]) + 1 > 80)) - parse_err("mtd device name too long"); - -- add_device(name, erase_size, token[2]); -+ if (add_device(name, erase_size, token[2]) == NULL) { -+ add_retry(val); -+ } - - return 0; - } ---- a/include/asm-generic/vmlinux.lds.h -+++ b/include/asm-generic/vmlinux.lds.h -@@ -622,12 +622,14 @@ - *(.initcall4s.init) \ - *(.initcall5.init) \ - *(.initcall5s.init) \ -- *(.initcallrootfs.init) \ - *(.initcall6.init) \ - *(.initcall6s.init) \ - *(.initcall7.init) \ - *(.initcall7s.init) - -+#define INITCALLS_ROOT \ -+ *(.initcallrootfs.init) -+ - #define INIT_CALLS \ - VMLINUX_SYMBOL(__initcall_start) = .; \ - INITCALLS \ ---- a/init/do_mounts.c -+++ b/init/do_mounts.c -@@ -176,16 +176,8 @@ static int __init fs_names_setup(char *s - return 1; - } - --static unsigned int __initdata root_delay; --static int __init root_delay_setup(char *str) --{ -- root_delay = simple_strtoul(str, NULL, 0); -- return 1; --} -- - __setup("rootflags=", root_data_setup); - __setup("rootfstype=", fs_names_setup); --__setup("rootdelay=", root_delay_setup); - - static void __init get_fs_names(char *page) - { -@@ -366,23 +358,6 @@ void __init prepare_namespace(void) - { - int is_floppy; - -- if (root_delay) { -- printk(KERN_INFO "Waiting %dsec before mounting root device...\n", -- root_delay); -- ssleep(root_delay); -- } -- -- /* -- * wait for the known devices to complete their probing -- * -- * Note: this is a potential source of long boot delays. -- * For example, it is not atypical to wait 5 seconds here -- * for the touchpad of a laptop to initialize. -- */ -- wait_for_device_probe(); -- -- md_run_setup(); -- - if (saved_root_name[0]) { - root_device_name = saved_root_name; - if (!strncmp(root_device_name, "mtd", 3) || ---- a/init/main.c -+++ b/init/main.c -@@ -79,6 +79,7 @@ - #ifdef CONFIG_X86_LOCAL_APIC - #include - #endif -+#include "do_mounts.h" - - static int kernel_init(void *); - -@@ -779,12 +780,13 @@ int do_one_initcall(initcall_t fn) - - - extern initcall_t __initcall_start[], __initcall_end[], __early_initcall_end[]; -+extern initcall_t __root_initcall_start[], __root_initcall_end[]; - --static void __init do_initcalls(void) -+static void __init do_initcalls(initcall_t *start, initcall_t *end) - { - initcall_t *call; - -- for (call = __early_initcall_end; call < __initcall_end; call++) -+ for (call = start; call < end; call++) - do_one_initcall(*call); - - /* Make sure there is no pending stuff from the initcall sequence */ -@@ -807,7 +809,7 @@ static void __init do_basic_setup(void) - driver_init(); - init_irq_proc(); - do_ctors(); -- do_initcalls(); -+ do_initcalls(__early_initcall_end, __initcall_end); - } - - static void __init do_pre_smp_initcalls(void) -@@ -868,6 +870,13 @@ static noinline int init_post(void) - panic("No init found. Try passing init= option to kernel."); - } - -+static unsigned int __initdata root_delay; -+static int __init root_delay_setup(char *str) -+{ -+ root_delay = simple_strtoul(str, NULL, 0); -+ return 1; -+} -+__setup("rootdelay=", root_delay_setup); - static int __init kernel_init(void * unused) - { - lock_kernel(); -@@ -912,7 +921,16 @@ static int __init kernel_init(void * unu - - if (sys_access((const char __user *) ramdisk_execute_command, 0) != 0) { - ramdisk_execute_command = NULL; -- prepare_namespace(); -+ if (root_delay) { -+ printk(KERN_INFO "Waiting %desc before mounting root device...\n", -+ root_delay); -+ ssleep(root_delay); -+ } -+ while (driver_probe_done() != 0) -+ msleep(100); -+ do_initcalls(__root_initcall_start, __root_initcall_end); -+ md_run_setup(); -+ prepare_namespace(); - } - - /* diff --git a/target/linux/xburst/Makefile b/target/linux/xburst/Makefile index 25255ed22..f118b7cdb 100644 --- a/target/linux/xburst/Makefile +++ b/target/linux/xburst/Makefile @@ -12,7 +12,7 @@ BOARDNAME:=Ingenic XBurst FEATURES:=jffs2 tgz ubifs audio SUBTARGETS:=qi_lb60 n516 n526 -LINUX_VERSION:=2.6.32.9 +LINUX_VERSION:=2.6.32.10 DEVICE_TYPE=other diff --git a/target/linux/xburst/modules.mk b/target/linux/xburst/modules.mk index 84dbb7c42..4604cd40d 100644 --- a/target/linux/xburst/modules.mk +++ b/target/linux/xburst/modules.mk @@ -10,7 +10,7 @@ define KernelPackage/sound-soc-jz4740 FILES:= \ $(LINUX_DIR)/sound/soc/jz4740/snd-soc-jz4740.$(LINUX_KMOD_SUFFIX) \ $(LINUX_DIR)/sound/soc/jz4740/snd-soc-jz4740-i2s.$(LINUX_KMOD_SUFFIX) - AUTOLOAD:=$(call AutoLoad,40,snd-soc-jz4740 snd-soc-jz4740-i2s) + AUTOLOAD:=$(call AutoLoad,60,snd-soc-jz4740 snd-soc-jz4740-i2s) endef define KernelPackage/sound-soc-jzcodec @@ -19,7 +19,7 @@ define KernelPackage/sound-soc-jzcodec TITLE:=JZ4740 SoC internal codec support KCONFIG:=CONFIG_SND_SOC_JZCODEC FILES:=$(LINUX_DIR)/sound/soc/codecs/snd-soc-jzcodec.$(LINUX_KMOD_SUFFIX) - AUTOLOAD:=$(call AutoLoad,40,snd-soc-jzcodec) + AUTOLOAD:=$(call AutoLoad,60,snd-soc-jzcodec) endef define KernelPackage/sound-soc-xburst/default @@ -28,7 +28,7 @@ define KernelPackage/sound-soc-xburst/default TITLE:=$(1) sound support KCONFIG:=CONFIG_SND_JZ4740_SOC_$(2) FILES:=$(LINUX_DIR)/sound/soc/jz4740/snd-soc-$(3).$(LINUX_KMOD_SUFFIX) - AUTOLOAD:=$(call AutoLoad,45,snd-soc-$(3)) + AUTOLOAD:=$(call AutoLoad,65,snd-soc-$(3)) endef define KernelPackage/sound-soc-qi_lb60 diff --git a/toolchain/uClibc/patches-0.9.30.1/902-Fix-use-after-free-bug-in-__dns_lookup.patch b/toolchain/uClibc/patches-0.9.30.1/902-Fix-use-after-free-bug-in-__dns_lookup.patch new file mode 100644 index 000000000..3a6f43d34 --- /dev/null +++ b/toolchain/uClibc/patches-0.9.30.1/902-Fix-use-after-free-bug-in-__dns_lookup.patch @@ -0,0 +1,45 @@ +From c602079e5b7ba998d1dd6cae4a305af80e6cba52 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos +Date: Tue, 23 Mar 2010 08:35:27 +0100 +Subject: [PATCH] Fix use-after-free bug in __dns_lookup. + +If the type of the first answer does not match with the requested type, +then the dotted name will be freed. If there are no further answers in +the DNS reply, this pointer will be used later on in the same function. +Additionally it is passed to the caller, and may cause strange behaviour. + +For example, the following busybox commands are triggering a segmentation +fault with uClibc 0.9.30.x + + - nslookup ipv6.google.com + - ping ipv6.google.com + - wget http//ipv6.google.com/ + +Signed-off-by: Gabor Juhos + +--- + +See https://dev.openwrt.org/ticket/6886 for a testcase +--- + libc/inet/resolv.c | 4 +--- + 1 files changed, 1 insertions(+), 3 deletions(-) + +diff --git a/libc/inet/resolv.c b/libc/inet/resolv.c +index 0a6fd7a..e76f0aa 100644 +--- a/libc/inet/resolv.c ++++ b/libc/inet/resolv.c +@@ -1501,10 +1501,8 @@ int attribute_hidden __dns_lookup(const char *name, + memcpy(a, &ma, sizeof(ma)); + if (a->atype != T_SIG && (NULL == a->buf || (type != T_A && type != T_AAAA))) + break; +- if (a->atype != type) { +- free(a->dotted); ++ if (a->atype != type) + continue; +- } + a->add_count = h.ancount - j - 1; + if ((a->rdlength + sizeof(struct in_addr*)) * a->add_count > a->buflen) + break; +-- +1.5.3.2 + diff --git a/toolchain/uClibc/patches-0.9.30.2/902-Fix-use-after-free-bug-in-__dns_lookup.patch b/toolchain/uClibc/patches-0.9.30.2/902-Fix-use-after-free-bug-in-__dns_lookup.patch new file mode 100644 index 000000000..3a6f43d34 --- /dev/null +++ b/toolchain/uClibc/patches-0.9.30.2/902-Fix-use-after-free-bug-in-__dns_lookup.patch @@ -0,0 +1,45 @@ +From c602079e5b7ba998d1dd6cae4a305af80e6cba52 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos +Date: Tue, 23 Mar 2010 08:35:27 +0100 +Subject: [PATCH] Fix use-after-free bug in __dns_lookup. + +If the type of the first answer does not match with the requested type, +then the dotted name will be freed. If there are no further answers in +the DNS reply, this pointer will be used later on in the same function. +Additionally it is passed to the caller, and may cause strange behaviour. + +For example, the following busybox commands are triggering a segmentation +fault with uClibc 0.9.30.x + + - nslookup ipv6.google.com + - ping ipv6.google.com + - wget http//ipv6.google.com/ + +Signed-off-by: Gabor Juhos + +--- + +See https://dev.openwrt.org/ticket/6886 for a testcase +--- + libc/inet/resolv.c | 4 +--- + 1 files changed, 1 insertions(+), 3 deletions(-) + +diff --git a/libc/inet/resolv.c b/libc/inet/resolv.c +index 0a6fd7a..e76f0aa 100644 +--- a/libc/inet/resolv.c ++++ b/libc/inet/resolv.c +@@ -1501,10 +1501,8 @@ int attribute_hidden __dns_lookup(const char *name, + memcpy(a, &ma, sizeof(ma)); + if (a->atype != T_SIG && (NULL == a->buf || (type != T_A && type != T_AAAA))) + break; +- if (a->atype != type) { +- free(a->dotted); ++ if (a->atype != type) + continue; +- } + a->add_count = h.ancount - j - 1; + if ((a->rdlength + sizeof(struct in_addr*)) * a->add_count > a->buflen) + break; +-- +1.5.3.2 + diff --git a/toolchain/uClibc/patches-0.9.30.3/902-Fix-use-after-free-bug-in-__dns_lookup.patch b/toolchain/uClibc/patches-0.9.30.3/902-Fix-use-after-free-bug-in-__dns_lookup.patch new file mode 100644 index 000000000..3a6f43d34 --- /dev/null +++ b/toolchain/uClibc/patches-0.9.30.3/902-Fix-use-after-free-bug-in-__dns_lookup.patch @@ -0,0 +1,45 @@ +From c602079e5b7ba998d1dd6cae4a305af80e6cba52 Mon Sep 17 00:00:00 2001 +From: Gabor Juhos +Date: Tue, 23 Mar 2010 08:35:27 +0100 +Subject: [PATCH] Fix use-after-free bug in __dns_lookup. + +If the type of the first answer does not match with the requested type, +then the dotted name will be freed. If there are no further answers in +the DNS reply, this pointer will be used later on in the same function. +Additionally it is passed to the caller, and may cause strange behaviour. + +For example, the following busybox commands are triggering a segmentation +fault with uClibc 0.9.30.x + + - nslookup ipv6.google.com + - ping ipv6.google.com + - wget http//ipv6.google.com/ + +Signed-off-by: Gabor Juhos + +--- + +See https://dev.openwrt.org/ticket/6886 for a testcase +--- + libc/inet/resolv.c | 4 +--- + 1 files changed, 1 insertions(+), 3 deletions(-) + +diff --git a/libc/inet/resolv.c b/libc/inet/resolv.c +index 0a6fd7a..e76f0aa 100644 +--- a/libc/inet/resolv.c ++++ b/libc/inet/resolv.c +@@ -1501,10 +1501,8 @@ int attribute_hidden __dns_lookup(const char *name, + memcpy(a, &ma, sizeof(ma)); + if (a->atype != T_SIG && (NULL == a->buf || (type != T_A && type != T_AAAA))) + break; +- if (a->atype != type) { +- free(a->dotted); ++ if (a->atype != type) + continue; +- } + a->add_count = h.ancount - j - 1; + if ((a->rdlength + sizeof(struct in_addr*)) * a->add_count > a->buflen) + break; +-- +1.5.3.2 + diff --git a/tools/firmware-utils/src/addpattern.c b/tools/firmware-utils/src/addpattern.c index dbd07e684..6eccb1bd9 100644 --- a/tools/firmware-utils/src/addpattern.c +++ b/tools/firmware-utils/src/addpattern.c @@ -74,6 +74,9 @@ #define SUPPORT_4712_CHIP 0x0001 #define SUPPORT_INTEL_FLASH 0x0002 #define SUPPORT_5325E_SWITCH 0x0004 +/* (from 3.00.24 firmware cyutils.h) */ +#define SUPPORT_4704_CHIP 0x0008 +#define SUPPORT_5352E_CHIP 0x0010 struct code_header { /* from cyutils.h */ char magic[4]; @@ -82,16 +85,21 @@ struct code_header { /* from cyutils.h */ char fwvern[3]; char id[4]; /* U2ND */ char hw_ver; /* 0: for 4702, 1: for 4712 -- new in 2.04.3 */ - char unused; - unsigned char flags[2]; /* SUPPORT_ flags new for 3.37.2 (WRT54G v2.2 and WRT54GS v1.1) */ - unsigned char res2[10]; + + unsigned char sn; // Serial Number + unsigned char flags[2]; /* SUPPORT_ flags new for 3.37.2 (WRT54G v2.2 and WRT54GS v1.1) */ + unsigned char stable[2]; // The image is stable (for dual image) + unsigned char try1[2]; // Try to boot image first time (for dual image) + unsigned char try2[2]; // Try to boot image second time (for dual image) + unsigned char try3[2]; // Try to boot image third time (for dual_image) + unsigned char res3[2]; } ; struct board_info { char *id; char *pattern; char hw_ver; - char unused; + char sn; char flags[2]; }; @@ -100,7 +108,7 @@ struct board_info boards[] = { .id = "WRT160NL", .pattern = "NL16", .hw_ver = 0x00, - .unused = 0x0f, + .sn = 0x0f, .flags = {0x3f, 0x00}, }, { /* Terminating entry */ @@ -114,7 +122,7 @@ void usage(void) __attribute__ (( __noreturn__ )); void usage(void) { - fprintf(stderr, "Usage: addpattern [-i trxfile] [-o binfile] [-B board_id] [-p pattern] [-g] [-b] [-v v#.#.#] [-r #.#] [-{0|1|2|4}] -h\n"); + fprintf(stderr, "Usage: addpattern [-i trxfile] [-o binfile] [-B board_id] [-p pattern] [-s serial] [-g] [-b] [-v v#.#.#] [-r #.#] [-{0|1|2|4|5}] -h\n"); exit(EXIT_FAILURE); } @@ -155,7 +163,7 @@ int main(int argc, char **argv) hdr = (struct code_header *) buf; memset(hdr, 0, sizeof(struct code_header)); - while ((c = getopt(argc, argv, "i:o:p:gbv:0124hr:B:")) != -1) { + while ((c = getopt(argc, argv, "i:o:p:s:gbv:01245hr:B:")) != -1) { switch (c) { case 'i': ifn = optarg; @@ -166,6 +174,9 @@ int main(int argc, char **argv) case 'p': pattern = optarg; break; + case 's': + hdr->sn = (unsigned char) atoi (optarg); + break; case 'g': gflag = 1; break; @@ -192,6 +203,13 @@ int main(int argc, char **argv) hdr->hw_ver = 0; hdr->flags[0] = 0x1f; break; + case '5': + /* V5 is appended to trxV2 image */ + hdr->stable[0] = hdr->stable[1] = 0xFF; + hdr->try1[0] = hdr->try1[1] = 0xFF; + hdr->try2[0] = hdr->try2[1] = 0xFF; + hdr->try3[0] = hdr->try3[1] = 0xFF; + break; case 'r': hdr->hw_ver = (char)(atof(optarg)*10)+0x30; break; @@ -218,7 +236,7 @@ int main(int argc, char **argv) } pattern = board->pattern; hdr->hw_ver = board->hw_ver; - hdr->unused = board->unused; + hdr->sn = board->sn; hdr->flags[0] = board->flags[0]; hdr->flags[1] = board->flags[1]; } diff --git a/tools/firmware-utils/src/bcm_tag.h b/tools/firmware-utils/src/bcm_tag.h deleted file mode 100644 index c06f66894..000000000 --- a/tools/firmware-utils/src/bcm_tag.h +++ /dev/null @@ -1,178 +0,0 @@ -#ifndef __BCM63XX_TAG_H -#define __BCM63XX_TAG_H - -#define IMAGE_LEN 10 /* Length of Length Field */ -#define ADDRESS_LEN 12 /* Length of Address field */ -#define TAGID_LEN 6 /* Length of tag ID */ -#define TAGINFO_LEN 20 /* Length of vendor information field in tag */ -#define TAGVER_LEN 4 /* Length of Tag Version */ -#define TAGLAYOUT_LEN 4 /* Length of FlashLayoutVer */ - -#define NUM_TAGID 5 -#define IMAGETAG_CRC_START 0xFFFFFFFF - -struct tagiddesc_t { - char tagid[TAGID_LEN + 1]; - char tagiddesc[80]; -}; - - // bc221 is used by BT Voyager and should be right - // bc310 should be right, and may apply to 3.08 code as well -#define TAGID_DEFINITIONS { \ - { "bccfe", "Broadcom CFE flash image" }, \ - { "bc300", "Broadcom code version 3.00-3.06 and all ftp/tftp flash" }, \ - { "ag306", "Alice Gate (Pirelli, based on Broadcom 3.06)" }, \ - { "bc221", "Broadcom code version 2.21" }, \ - { "bc310", "Broadcom code version 3.10-3.12" }, \ -} - -struct bcm_tag_bccfe { - unsigned char tagVersion[TAGVER_LEN]; // 0-3: Version of the image tag - unsigned char sig_1[20]; // 4-23: Company Line 1 - unsigned char sig_2[14]; // 24-37: Company Line 2 - unsigned char chipid[6]; // 38-43: Chip this image is for - unsigned char boardid[16]; // 44-59: Board name - unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE - unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image - unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE - unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE - unsigned char rootAddress[ADDRESS_LEN]; // 94-105: Address in memory of rootfs - unsigned char rootLength[IMAGE_LEN]; // 106-115: Size of rootfs - unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel - unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel - unsigned char dualImage[2]; // 138-139: Unused at present - unsigned char inactiveFlag[2]; // 140-141: Unused at present - unsigned char information1[TAGINFO_LEN]; // 142-161: Unused at present - unsigned char tagId[TAGID_LEN]; // 162-167: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced - unsigned char tagIdCRC[4]; // 168-171: CRC32 of tagId - unsigned char reserved1[44]; // 172-215: Reserved area not in use - unsigned char imageCRC[4]; // 216-219: CRC32 of images - unsigned char reserved2[16]; // 220-235: Unused at present - unsigned char headerCRC[4]; // 236-239: CRC32 of header excluding tagVersion - unsigned char reserved3[16]; // 240-255: Unused at present -}; - -struct bcm_tag_bc300 { - unsigned char tagVersion[TAGVER_LEN]; // 0-3: Version of the image tag - unsigned char sig_1[20]; // 4-23: Company Line 1 - unsigned char sig_2[14]; // 24-37: Company Line 2 - unsigned char chipid[6]; // 38-43: Chip this image is for - unsigned char boardid[16]; // 44-59: Board name - unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE - unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image - unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE - unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE - unsigned char flashImageStart[ADDRESS_LEN]; // 94-105: Address in memory of kernel (start of image) - unsigned char flashRootLength[IMAGE_LEN]; // 106-115: Size of rootfs + deadcode (web flash uses this + kernelLength to determine the size of the kernel+rootfs flash image) - unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel - unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel - unsigned char dualImage[2]; // 138-139: Unused at present - unsigned char inactiveFlag[2]; // 140-141: Unused at present - unsigned char information1[TAGINFO_LEN]; // 142-161: Unused at present - unsigned char tagId[TAGID_LEN]; // 162-167: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced - unsigned char tagIdCRC[4]; // 168-173: CRC32 to ensure validity of tagId - unsigned char rootAddress[ADDRESS_LEN]; // 174-183: Address in memory of rootfs partition - unsigned char rootLength[IMAGE_LEN]; // 184-193: Size of rootfs partition - unsigned char reserved1[22]; // 194-215: Reserved area not in use - unsigned char imageCRC[4]; // 216-219: CRC32 of images - unsigned char reserved2[16]; // 220-235: Unused at present - unsigned char headerCRC[4]; // 236-239: CRC32 of header excluding tagVersion - unsigned char reserved3[16]; // 240-255: Unused at present -}; - -struct bcm_tag_ag306 { - unsigned char tagVersion[TAGVER_LEN]; // 0-3: Version of the image tag - unsigned char sig_1[20]; // 4-23: Company Line 1 - unsigned char sig_2[14]; // 24-37: Company Line 2 - unsigned char chipid[6]; // 38-43: Chip this image is for - unsigned char boardid[16]; // 44-59: Board name - unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE - unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image - unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE - unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE - unsigned char flashImageStart[ADDRESS_LEN]; // 94-105: Address in memory of kernel (start of image) - unsigned char flashRootLength[IMAGE_LEN]; // 106-115: Size of rootfs + deadcode (web flash uses this + kernelLength to determine the size of the kernel+rootfs flash image) - unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel - unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel - unsigned char dualImage[2]; // 138-139: Unused at present - unsigned char inactiveFlag[2]; // 140-141: Unused at present - unsigned char information1[TAGINFO_LEN]; // 142-161: Unused at present - unsigned char information2[54]; // 162-215: Compilation and related information (not generated/used by OpenWRT) - unsigned char kernelCRC[4] ; // 216-219: CRC32 of images - unsigned char rootAddress[ADDRESS_LEN]; // 220-231: Address in memory of rootfs partition - unsigned char tagIdCRC[4]; // 232-235: Checksum to ensure validity of tagId - unsigned char headerCRC[4]; // 236-239: CRC32 of header excluding tagVersion - unsigned char rootLength[IMAGE_LEN]; // 240-249: Size of rootfs - unsigned char tagId[TAGID_LEN]; // 250-255: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced -}; - -struct bcm_tag_bc221 { - unsigned char tagVersion[TAGVER_LEN]; // 0-3: Version of the image tag - unsigned char sig_1[20]; // 4-23: Company Line 1 - unsigned char sig_2[14]; // 24-37: Company Line 2 - unsigned char chipid[6]; // 38-43: Chip this image is for - unsigned char boardid[16]; // 44-59: Board name - unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE - unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image - unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE - unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE - unsigned char flashImageStart[ADDRESS_LEN]; // 94-105: Address in memory of kernel (start of image) - unsigned char flashRootLength[IMAGE_LEN]; // 106-115: Size of rootfs + deadcode (web flash uses this + kernelLength to determine the size of the kernel+rootfs flash image) - unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel - unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel - unsigned char dualImage[2]; // 138-139: Unused at present - unsigned char inactiveFlag[2]; // 140-141: Unused at present - unsigned char rsa_signature[TAGINFO_LEN]; // 142-161: RSA Signature (unused at present; some vendors may use this) - unsigned char reserved5[2]; // 162-163: Unused at present - unsigned char tagId[TAGID_LEN]; // 164-169: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced - unsigned char rootAddress[ADDRESS_LEN]; // 170-181: Address in memory of rootfs partition - unsigned char rootLength[IMAGE_LEN]; // 182-191: Size of rootfs partition - unsigned char flashLayoutVer[4]; // 192-195: Version flash layout - unsigned char fskernelCRC[4]; // 196-199: Guessed to be kernel CRC - unsigned char reserved4[16]; // 200-215: Reserved area; unused at present - unsigned char imageCRC[4]; // 216-219: CRC32 of images - unsigned char reserved2[12]; // 220-231: Unused at present - unsigned char tagIdCRC[4]; // 232-235: CRC32 to ensure validity of tagId - unsigned char headerCRC[4]; // 236-239: CRC32 of header excluding tagVersion - unsigned char reserved3[16]; // 240-255: Unused at present -}; - -struct bcm_tag_bc310 { - unsigned char tagVersion[4]; // 0-3: Version of the image tag - unsigned char sig_1[20]; // 4-23: Company Line 1 - unsigned char sig_2[14]; // 24-37: Company Line 2 - unsigned char chipid[6]; // 38-43: Chip this image is for - unsigned char boardid[16]; // 44-59: Board name - unsigned char big_endian[2]; // 60-61: Map endianness -- 1 BE 0 LE - unsigned char totalLength[IMAGE_LEN]; // 62-71: Total length of image - unsigned char cfeAddress[ADDRESS_LEN]; // 72-83: Address in memory of CFE - unsigned char cfeLength[IMAGE_LEN]; // 84-93: Size of CFE - unsigned char flashImageStart[ADDRESS_LEN]; // 94-105: Address in memory of kernel (start of image) - unsigned char flashRootLength[IMAGE_LEN]; // 106-115: Size of rootfs + deadcode (web flash uses this + kernelLength to determine the size of the kernel+rootfs flash image) - unsigned char kernelAddress[ADDRESS_LEN]; // 116-127: Address in memory of kernel - unsigned char kernelLength[IMAGE_LEN]; // 128-137: Size of kernel - unsigned char dualImage[2]; // 138-139: Unused at present - unsigned char inactiveFlag[2]; // 140-141: Unused at present - unsigned char information1[TAGINFO_LEN]; // 142-161: Unused at present; Some vendors use this for optional information - unsigned char tagId[6]; // 162-167: Identifies which type of tag this is, currently two-letter company code, and then three digits for version of broadcom code in which this tag was first introduced - unsigned char tagIdCRC[4]; // 168-171: CRC32 to ensure validity of tagId - unsigned char rootAddress[ADDRESS_LEN]; // 172-183: Address in memory of rootfs partition - unsigned char rootLength[IMAGE_LEN]; // 184-193: Size of rootfs partition - unsigned char reserved1[22]; // 193-215: Reserved area not in use - unsigned char imageCRC[4]; // 216-219: CRC32 of images - unsigned char rootfsCRC[4]; // 220-227: CRC32 of rootfs partition - unsigned char kernelCRC[4]; // 224-227: CRC32 of kernel partition - unsigned char reserved2[8]; // 228-235: Unused at present - unsigned char headerCRC[4]; // 235-239: CRC32 of header excluding tagVersion - unsigned char reserved3[16]; // 240-255: Unused at present -}; - -union bcm_tag { - struct bcm_tag_bccfe bccfe; - struct bcm_tag_bc300 bc300; - struct bcm_tag_ag306 ag306; - struct bcm_tag_bc221 bc221; - struct bcm_tag_bc310 bc310; -}; - -#endif /* __BCM63XX_TAG_H */ diff --git a/tools/firmware-utils/src/bcm_tag.h b/tools/firmware-utils/src/bcm_tag.h new file mode 120000 index 000000000..2e977a2d7 --- /dev/null +++ b/tools/firmware-utils/src/bcm_tag.h @@ -0,0 +1 @@ +../../../target/linux/brcm63xx/files/arch/mips/include/asm/mach-bcm63xx/bcm_tag.h \ No newline at end of file diff --git a/tools/firmware-utils/src/lzma2eva.c b/tools/firmware-utils/src/lzma2eva.c index 6424dde1d..0bc13fa4f 100644 --- a/tools/firmware-utils/src/lzma2eva.c +++ b/tools/firmware-utils/src/lzma2eva.c @@ -22,16 +22,11 @@ #include #include /* crc32 */ - -#define ARRAY_SIZE(x) (sizeof(x) / sizeof((x)[0])) - #define checksum_add32(csum, data) \ - do { \ - csum += (((data) >> 0) & 0x000000FF); \ - csum += (((data) >> 8) & 0x000000FF); \ - csum += (((data) >> 16) & 0x000000FF); \ - csum += (((data) >> 24) & 0x000000FF); \ - } while (0) + csum += ((uint8_t *)&data)[0]; \ + csum += ((uint8_t *)&data)[1]; \ + csum += ((uint8_t *)&data)[2]; \ + csum += ((uint8_t *)&data)[3]; void usage(void) @@ -47,68 +42,10 @@ pexit(const char *msg) exit(1); } -/* Read an 8bit value */ -static int fread_8(uint8_t *buf, FILE *fd) -{ - return (fread(buf, sizeof(*buf), 1, fd) == 1) ? 0 : -1; -} - -/* Read a 32bit little endian value and convert to host endianness. */ -static int fread_le32(uint32_t *buf, FILE *fd) -{ - size_t count; - uint8_t tmp[4]; - unsigned int i; - - if (fread(tmp, sizeof(tmp), 1, fd) != 1) - return -1; - *buf = 0; - for (i = 0; i < ARRAY_SIZE(tmp); i++) - *buf |= (uint32_t)(tmp[i]) << (i * 8); - - return 0; -} - -/* Read a 64bit little endian value and convert to host endianness. */ -static int fread_le64(uint64_t *buf, FILE *fd) -{ - size_t count; - uint8_t tmp[8]; - unsigned int i; - - if (fread(tmp, sizeof(tmp), 1, fd) != 1) - return -1; - *buf = 0; - for (i = 0; i < ARRAY_SIZE(tmp); i++) - *buf |= (uint64_t)(tmp[i]) << (i * 8); - - return 0; -} - -/* Write an 8bit value */ -static int fwrite_8(uint8_t buf, FILE *fd) -{ - return (fwrite(&buf, sizeof(buf), 1, fd) == 1) ? 0 : -1; -} - -/* Convert to little endian and write a 32bit value */ -static int fwrite_le32(uint32_t buf, FILE *fd) -{ - size_t count; - uint8_t tmp[4]; - unsigned int i; - - for (i = 0; i < ARRAY_SIZE(tmp); i++) - tmp[i] = buf >> (i * 8); - if (fwrite(tmp, sizeof(tmp), 1, fd) != 1) - return -1; - - return 0; -} - int main(int argc, char *argv[]) { + const char *infile, *outfile; FILE *in, *out; static const uint8_t buf[4096]; @@ -130,6 +67,7 @@ main(int argc, char *argv[]) uint32_t datasize32 = 0; uint32_t datacrc32 = crc32(0, 0, 0); + uint32_t zero = 0; uint32_t entry = 0; if (argc != 5) @@ -149,43 +87,43 @@ main(int argc, char *argv[]) pexit("fopen"); /* read LZMA header */ - if (fread_8(&properties, in)) + if (1 != fread(&properties, sizeof properties, 1, in)) pexit("fread"); - if (fread_le32(&dictsize, in)) + if (1 != fread(&dictsize, sizeof dictsize, 1, in)) pexit("fread"); - if (fread_le64(&datasize, in)) + if (1 != fread(&datasize, sizeof datasize, 1, in)) pexit("fread"); /* write EVA header */ - if (fwrite_le32(magic, out)) + if (1 != fwrite(&magic, sizeof magic, 1, out)) pexit("fwrite"); if (fgetpos(out, &reclengthpos)) pexit("fgetpos"); - if (fwrite_le32(reclength, out)) + if (1 != fwrite(&reclength, sizeof reclength, 1, out)) pexit("fwrite"); - if (fwrite_le32(loadaddress, out)) + if (1 != fwrite(&loadaddress, sizeof loadaddress, 1, out)) pexit("fwrite"); - if (fwrite_le32(type, out)) + if (1 != fwrite(&type, sizeof type, 1, out)) pexit("fwrite"); /* write EVA LZMA header */ if (fgetpos(out, &compsizepos)) pexit("fgetpos"); - if (fwrite_le32(compsize, out)) + if (1 != fwrite(&compsize, sizeof compsize, 1, out)) pexit("fwrite"); /* XXX check length */ datasize32 = (uint32_t)datasize; - if (fwrite_le32(datasize32, out)) + if (1 != fwrite(&datasize32, sizeof datasize32, 1, out)) pexit("fwrite"); - if (fwrite_le32(datacrc32, out)) + if (1 != fwrite(&datacrc32, sizeof datacrc32, 1, out)) pexit("fwrite"); /* write modified LZMA header */ - if (fwrite_8(properties, out)) + if (1 != fwrite(&properties, sizeof properties, 1, out)) pexit("fwrite"); - if (fwrite_le32(dictsize, out)) + if (1 != fwrite(&dictsize, sizeof dictsize, 1, out)) pexit("fwrite"); - if (fwrite_le32(0, out)) + if (1 != fwrite(&zero, 3, 1, out)) pexit("fwrite"); /* copy compressed data, calculate crc32 */ @@ -203,17 +141,17 @@ main(int argc, char *argv[]) reclength = compsize + 24; if (fsetpos(out, &reclengthpos)) pexit("fsetpos"); - if (fwrite_le32(reclength, out)) + if (1 != fwrite(&reclength, sizeof reclength, 1, out)) pexit("fwrite"); /* re-write EVA LZMA header including size and data crc */ if (fsetpos(out, &compsizepos)) pexit("fsetpos"); - if (fwrite_le32(compsize, out)) + if (1 != fwrite(&compsize, sizeof compsize, 1, out)) pexit("fwrite"); - if (fwrite_le32(datasize32, out)) + if (1 != fwrite(&datasize32, sizeof datasize32, 1, out)) pexit("fwrite"); - if (fwrite_le32(datacrc32, out)) + if (1 != fwrite(&datacrc32, sizeof datacrc32, 1, out)) pexit("fwrite"); /* calculate record checksum */ @@ -236,13 +174,13 @@ main(int argc, char *argv[]) pexit("fseek"); checksum = ~checksum + 1; - if (fwrite_le32(checksum, out)) + if (1 != fwrite(&checksum, sizeof checksum, 1, out)) pexit("fwrite"); /* write entry record */ - if (fwrite_le32(0, out)) + if (1 != fwrite(&zero, sizeof zero, 1, out)) pexit("fwrite"); - if (fwrite_le32(entry, out)) + if (1 != fwrite(&entry, sizeof entry, 1, out)) pexit("fwrite"); if (fclose(out)) diff --git a/tools/firmware-utils/src/trx.c b/tools/firmware-utils/src/trx.c index b9830239a..44bd06a06 100644 --- a/tools/firmware-utils/src/trx.c +++ b/tools/firmware-utils/src/trx.c @@ -35,6 +35,12 @@ * February 19, 2005 - mbm * * Add -a (align offset) and -b (absolute offset) + * + * March 24, 2010 - markus + * + * extend trx header struct for new version + * assume v1 for as default + * Add option -2 to allow v2 header */ #include @@ -59,7 +65,6 @@ uint32_t crc32buf(char *buf, size_t len); /* from trxhdr.h */ #define TRX_MAGIC 0x30524448 /* "HDR0" */ -#define TRX_VERSION 1 #define TRX_MAX_LEN 0x720000 #define TRX_NO_HEADER 1 /* Do not write TRX header */ @@ -68,7 +73,7 @@ struct trx_header { uint32_t len; /* Length of file including header */ uint32_t crc32; /* 32-bit CRC from flag_version to end of file */ uint32_t flag_version; /* 0:15 flags, 16:31 version */ - uint32_t offsets[3]; /* Offsets of partitions from start of header */ + uint32_t offsets[4]; /* Offsets of partitions from start of header */ }; /**********************************************************************/ @@ -77,7 +82,9 @@ void usage(void) __attribute__ (( __noreturn__ )); void usage(void) { - fprintf(stderr, "Usage: trx [-o outfile] [-m maxlen] [-a align] [-b offset] [-f file] [-f file [-f file]]\n"); + fprintf(stderr, "Usage:\n"); + fprintf(stderr, " trx [-2] [-o outfile] [-m maxlen] [-a align] [-b absolute offset] [-x relative offset]\n"); + fprintf(stderr, " [-f file] [-f file [-f file [-f file (v2 only)]]]\n"); exit(EXIT_FAILURE); } @@ -90,9 +97,11 @@ int main(int argc, char **argv) char *e; int c, i, append = 0; size_t n; + ssize_t n2; uint32_t cur_len; unsigned long maxlen = TRX_MAX_LEN; struct trx_header *p; + char trx_version = 1; fprintf(stderr, "mjn3's trx replacement - v0.81.1\n"); @@ -104,14 +113,24 @@ int main(int argc, char **argv) p = (struct trx_header *) buf; p->magic = STORE32_LE(TRX_MAGIC); - cur_len = sizeof(struct trx_header); - p->flag_version = STORE32_LE((TRX_VERSION << 16)); + cur_len = sizeof(struct trx_header) - 4; /* assume v1 header */ + p->flag_version = STORE32_LE((trx_version << 16)); in = NULL; i = 0; - while ((c = getopt(argc, argv, "-:o:m:a:b:f:A:")) != -1) { + while ((c = getopt(argc, argv, "-:2o:m:a:x:b:f:A:")) != -1) { switch (c) { + case '2': + /* take care that nothing was written to buf so far */ + if (cur_len != sizeof(struct trx_header) - 4) { + fprintf(stderr, "-2 has to be used before any other argument!\n"); + } + else { + trx_version = 2; + cur_len += 4; + } + break; case 'A': append = 1; /* fall through */ @@ -200,6 +219,25 @@ int main(int argc, char **argv) memset(buf + cur_len, 0, n - cur_len); cur_len = n; } + break; + case 'x': + errno = 0; + n2 = strtol(optarg, &e, 0); + if (errno || (e == optarg) || *e) { + fprintf(stderr, "illegal numeric string\n"); + usage(); + } + if (n2 < 0) { + if (-n2 > cur_len) { + fprintf(stderr, "WARNING: current length smaller then -x %d offset\n",n2); + cur_len = 0; + } else + cur_len += n2; + } else { + memset(buf + cur_len, 0, n2); + cur_len += n2; + } + break; default: usage();