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ar71xx: add AR934x specific UART clock initialization
Signed-off-by: Jaiganesh Narayanan <jnarayanan@atheros.com> git-svn-id: svn://svn.openwrt.org/openwrt/trunk@26511 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -1,10 +1,12 @@
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/*
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/*
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* Atheros AR71xx SoC platform devices
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* Atheros AR71xx SoC platform devices
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*
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*
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* Copyright (C) 2010-2011 Jaiganesh Narayanan <jnarayanan@atheros.com>
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* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008-2009 Gabor Juhos <juhosg@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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* Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
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*
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*
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* Parts of this file are based on Atheros' 2.6.15 BSP
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* Parts of this file are based on Atheros 2.6.15 BSP
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* Parts of this file are based on Atheros 2.6.31 BSP
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*
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*
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* This program is free software; you can redistribute it and/or modify it
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 as published
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* under the terms of the GNU General Public License version 2 as published
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@ -57,7 +59,28 @@ static struct platform_device ar71xx_uart_device = {
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void __init ar71xx_add_device_uart(void)
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void __init ar71xx_add_device_uart(void)
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{
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{
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switch (ar71xx_soc) {
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case AR71XX_SOC_AR7130:
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case AR71XX_SOC_AR7141:
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case AR71XX_SOC_AR7161:
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case AR71XX_SOC_AR7240:
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case AR71XX_SOC_AR7241:
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case AR71XX_SOC_AR7242:
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case AR71XX_SOC_AR9130:
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case AR71XX_SOC_AR9132:
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ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
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ar71xx_uart_data[0].uartclk = ar71xx_ahb_freq;
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break;
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case AR71XX_SOC_AR9341:
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case AR71XX_SOC_AR9342:
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case AR71XX_SOC_AR9344:
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ar71xx_uart_data[0].uartclk = ar934x_ref_freq;
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break;
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default:
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BUG();
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}
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platform_device_register(&ar71xx_uart_device);
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platform_device_register(&ar71xx_uart_device);
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}
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}
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