mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2025-03-13 11:29:15 +02:00
ar71xx: sync ethernet driver changes with trunk to fix MDIO issues on ar7240
git-svn-id: svn://svn.openwrt.org/openwrt/branches/backfire@26672 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
parent
c8564630f3
commit
2d335ddc1c
@ -136,6 +136,7 @@ static void __init dir_600_a1_setup(void)
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ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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ar71xx_eth0_data.speed = SPEED_100;
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ar71xx_eth0_data.duplex = DUPLEX_FULL;
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ar71xx_eth0_data.phy_mask = BIT(4);
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/* LAN ports */
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ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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@ -121,6 +121,7 @@ static void __init rb750_setup(void)
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ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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ar71xx_eth0_data.speed = SPEED_100;
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ar71xx_eth0_data.duplex = DUPLEX_FULL;
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ar71xx_eth0_data.phy_mask = BIT(4);
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/* LAN ports */
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ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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@ -114,6 +114,7 @@ static void __init tl_wr741nd_setup(void)
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ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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ar71xx_eth0_data.speed = SPEED_100;
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ar71xx_eth0_data.duplex = DUPLEX_FULL;
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ar71xx_eth0_data.phy_mask = BIT(4);
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/* LAN ports */
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ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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@ -190,12 +190,12 @@ static inline struct ag71xx_platform_data *ag71xx_get_pdata(struct ag71xx *ag)
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static inline int ag71xx_desc_empty(struct ag71xx_desc *desc)
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{
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return ((desc->ctrl & DESC_EMPTY) != 0);
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return (desc->ctrl & DESC_EMPTY) != 0;
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}
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static inline int ag71xx_desc_pktlen(struct ag71xx_desc *desc)
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{
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return (desc->ctrl & DESC_PKTLEN_M);
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return desc->ctrl & DESC_PKTLEN_M;
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}
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/* Register offsets */
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@ -432,7 +432,7 @@ static inline u32 ag71xx_mii_ctrl_rr(struct ag71xx *ag)
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return __raw_readl(ag->mii_ctrl);
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}
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static void inline ag71xx_mii_ctrl_set_if(struct ag71xx *ag,
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static inline void ag71xx_mii_ctrl_set_if(struct ag71xx *ag,
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unsigned int mii_if)
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{
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u32 t;
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@ -443,7 +443,7 @@ static void inline ag71xx_mii_ctrl_set_if(struct ag71xx *ag,
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ag71xx_mii_ctrl_wr(ag, t);
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}
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static void inline ag71xx_mii_ctrl_set_speed(struct ag71xx *ag,
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static inline void ag71xx_mii_ctrl_set_speed(struct ag71xx *ag,
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unsigned int speed)
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{
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u32 t;
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@ -503,4 +503,12 @@ void ag71xx_ar7240_stop(struct ag71xx *ag);
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int ag71xx_ar7240_init(struct ag71xx *ag);
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void ag71xx_ar7240_cleanup(struct ag71xx *ag);
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int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg);
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void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val);
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u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr,
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unsigned reg_addr);
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int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr,
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unsigned reg_addr, u16 reg_val);
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#endif /* _AG71XX_H */
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@ -195,7 +195,6 @@
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struct ar7240sw {
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struct mii_bus *mii_bus;
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struct mutex reg_mutex;
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struct switch_dev swdev;
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bool vlan;
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u16 vlan_id[AR7240_MAX_VLANS];
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@ -210,109 +209,107 @@ struct ar7240sw_hw_stat {
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int reg;
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};
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static DEFINE_MUTEX(reg_mutex);
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static inline void ar7240sw_init(struct ar7240sw *as, struct mii_bus *mii)
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{
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as->mii_bus = mii;
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mutex_init(&as->reg_mutex);
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}
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static inline u16 mk_phy_addr(u32 reg)
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{
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return (0x17 & ((reg >> 4) | 0x10));
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return 0x17 & ((reg >> 4) | 0x10);
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}
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static inline u16 mk_phy_reg(u32 reg)
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{
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return ((reg << 1) & 0x1e);
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return (reg << 1) & 0x1e;
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}
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static inline u16 mk_high_addr(u32 reg)
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{
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return ((reg >> 7) & 0x1ff);
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return (reg >> 7) & 0x1ff;
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}
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static u32 __ar7240sw_reg_read(struct ar7240sw *as, u32 reg)
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static u32 __ar7240sw_reg_read(struct mii_bus *mii, u32 reg)
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{
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struct mii_bus *mii = as->mii_bus;
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u16 phy_addr;
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u16 phy_reg;
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u32 hi, lo;
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reg = (reg & 0xfffffffc) >> 2;
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mdiobus_write(mii, 0x1f, 0x10, mk_high_addr(reg));
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ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg));
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phy_addr = mk_phy_addr(reg);
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phy_reg = mk_phy_reg(reg);
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lo = (u32) mdiobus_read(mii, phy_addr, phy_reg);
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hi = (u32) mdiobus_read(mii, phy_addr, phy_reg + 1);
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lo = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg);
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hi = (u32) ag71xx_mdio_mii_read(mii->priv, phy_addr, phy_reg + 1);
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return ((hi << 16) | lo);
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return (hi << 16) | lo;
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}
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static void __ar7240sw_reg_write(struct ar7240sw *as, u32 reg, u32 val)
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static void __ar7240sw_reg_write(struct mii_bus *mii, u32 reg, u32 val)
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{
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struct mii_bus *mii = as->mii_bus;
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u16 phy_addr;
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u16 phy_reg;
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reg = (reg & 0xfffffffc) >> 2;
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mdiobus_write(mii, 0x1f, 0x10, mk_high_addr(reg));
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ag71xx_mdio_mii_write(mii->priv, 0x1f, 0x10, mk_high_addr(reg));
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phy_addr = mk_phy_addr(reg);
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phy_reg = mk_phy_reg(reg);
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mdiobus_write(mii, phy_addr, phy_reg + 1, (val >> 16));
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mdiobus_write(mii, phy_addr, phy_reg, (val & 0xffff));
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ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg + 1, (val >> 16));
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ag71xx_mdio_mii_write(mii->priv, phy_addr, phy_reg, (val & 0xffff));
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}
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static u32 ar7240sw_reg_read(struct ar7240sw *as, u32 reg_addr)
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static u32 ar7240sw_reg_read(struct mii_bus *mii, u32 reg_addr)
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{
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u32 ret;
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mutex_lock(&as->reg_mutex);
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ret = __ar7240sw_reg_read(as, reg_addr);
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mutex_unlock(&as->reg_mutex);
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mutex_lock(®_mutex);
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ret = __ar7240sw_reg_read(mii, reg_addr);
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mutex_unlock(®_mutex);
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return ret;
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}
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static void ar7240sw_reg_write(struct ar7240sw *as, u32 reg_addr, u32 reg_val)
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static void ar7240sw_reg_write(struct mii_bus *mii, u32 reg_addr, u32 reg_val)
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{
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mutex_lock(&as->reg_mutex);
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__ar7240sw_reg_write(as, reg_addr, reg_val);
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mutex_unlock(&as->reg_mutex);
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mutex_lock(®_mutex);
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__ar7240sw_reg_write(mii, reg_addr, reg_val);
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mutex_unlock(®_mutex);
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}
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static u32 ar7240sw_reg_rmw(struct ar7240sw *as, u32 reg, u32 mask, u32 val)
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static u32 ar7240sw_reg_rmw(struct mii_bus *mii, u32 reg, u32 mask, u32 val)
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{
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u32 t;
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mutex_lock(&as->reg_mutex);
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t = __ar7240sw_reg_read(as, reg);
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mutex_lock(®_mutex);
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t = __ar7240sw_reg_read(mii, reg);
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t &= ~mask;
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t |= val;
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__ar7240sw_reg_write(as, reg, t);
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mutex_unlock(&as->reg_mutex);
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__ar7240sw_reg_write(mii, reg, t);
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mutex_unlock(®_mutex);
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return t;
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}
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static void ar7240sw_reg_set(struct ar7240sw *as, u32 reg, u32 val)
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static void ar7240sw_reg_set(struct mii_bus *mii, u32 reg, u32 val)
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{
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u32 t;
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mutex_lock(&as->reg_mutex);
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t = __ar7240sw_reg_read(as, reg);
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mutex_lock(®_mutex);
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t = __ar7240sw_reg_read(mii, reg);
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t |= val;
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__ar7240sw_reg_write(as, reg, t);
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mutex_unlock(&as->reg_mutex);
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__ar7240sw_reg_write(mii, reg, t);
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mutex_unlock(®_mutex);
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}
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static int ar7240sw_reg_wait(struct ar7240sw *as, u32 reg, u32 mask, u32 val,
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static int __ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val,
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unsigned timeout)
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{
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int i;
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@ -320,7 +317,7 @@ static int ar7240sw_reg_wait(struct ar7240sw *as, u32 reg, u32 mask, u32 val,
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for (i = 0; i < timeout; i++) {
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u32 t;
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t = ar7240sw_reg_read(as, reg);
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t = __ar7240sw_reg_read(mii, reg);
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if ((t & mask) == val)
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return 0;
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@ -330,32 +327,44 @@ static int ar7240sw_reg_wait(struct ar7240sw *as, u32 reg, u32 mask, u32 val,
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return -ETIMEDOUT;
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}
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static u16 ar7240sw_phy_read(struct ar7240sw *as, unsigned phy_addr,
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static int ar7240sw_reg_wait(struct mii_bus *mii, u32 reg, u32 mask, u32 val,
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unsigned timeout)
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{
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int ret;
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mutex_lock(®_mutex);
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ret = __ar7240sw_reg_wait(mii, reg, mask, val, timeout);
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mutex_unlock(®_mutex);
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return ret;
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}
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u16 ar7240sw_phy_read(struct mii_bus *mii, unsigned phy_addr,
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unsigned reg_addr)
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{
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u32 t;
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u32 t, val = 0xffff;
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int err;
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if (phy_addr >= AR7240_NUM_PHYS)
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return 0xffff;
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mutex_lock(®_mutex);
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t = (reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) |
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(phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) |
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AR7240_MDIO_CTRL_MASTER_EN |
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AR7240_MDIO_CTRL_BUSY |
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AR7240_MDIO_CTRL_CMD_READ;
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ar7240sw_reg_write(as, AR7240_REG_MDIO_CTRL, t);
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err = ar7240sw_reg_wait(as, AR7240_REG_MDIO_CTRL,
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__ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t);
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err = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL,
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AR7240_MDIO_CTRL_BUSY, 0, 5);
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if (err)
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return 0xffff;
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if (!err)
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val = __ar7240sw_reg_read(mii, AR7240_REG_MDIO_CTRL);
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mutex_unlock(®_mutex);
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t = ar7240sw_reg_read(as, AR7240_REG_MDIO_CTRL);
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return (t & AR7240_MDIO_CTRL_DATA_M);
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return val & AR7240_MDIO_CTRL_DATA_M;
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}
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static int ar7240sw_phy_write(struct ar7240sw *as, unsigned phy_addr,
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int ar7240sw_phy_write(struct mii_bus *mii, unsigned phy_addr,
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unsigned reg_addr, u16 reg_val)
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{
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u32 t;
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@ -364,6 +373,7 @@ static int ar7240sw_phy_write(struct ar7240sw *as, unsigned phy_addr,
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if (phy_addr >= AR7240_NUM_PHYS)
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return -EINVAL;
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mutex_lock(®_mutex);
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t = (phy_addr << AR7240_MDIO_CTRL_PHY_ADDR_S) |
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(reg_addr << AR7240_MDIO_CTRL_REG_ADDR_S) |
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AR7240_MDIO_CTRL_MASTER_EN |
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@ -371,34 +381,38 @@ static int ar7240sw_phy_write(struct ar7240sw *as, unsigned phy_addr,
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AR7240_MDIO_CTRL_CMD_WRITE |
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reg_val;
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ar7240sw_reg_write(as, AR7240_REG_MDIO_CTRL, t);
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ret = ar7240sw_reg_wait(as, AR7240_REG_MDIO_CTRL,
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__ar7240sw_reg_write(mii, AR7240_REG_MDIO_CTRL, t);
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ret = __ar7240sw_reg_wait(mii, AR7240_REG_MDIO_CTRL,
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AR7240_MDIO_CTRL_BUSY, 0, 5);
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mutex_unlock(®_mutex);
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return ret;
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}
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static int ar7240sw_capture_stats(struct ar7240sw *as)
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{
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struct mii_bus *mii = as->mii_bus;
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int ret;
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/* Capture the hardware statistics for all ports */
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ar7240sw_reg_write(as, AR7240_REG_MIB_FUNCTION0,
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ar7240sw_reg_write(mii, AR7240_REG_MIB_FUNCTION0,
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(AR7240_MIB_FUNC_CAPTURE << AR7240_MIB_FUNC_S));
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/* Wait for the capturing to complete. */
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ret = ar7240sw_reg_wait(as, AR7240_REG_MIB_FUNCTION0,
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ret = ar7240sw_reg_wait(mii, AR7240_REG_MIB_FUNCTION0,
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AR7240_MIB_BUSY, 0, 10);
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return ret;
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}
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static void ar7240sw_disable_port(struct ar7240sw *as, unsigned port)
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{
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ar7240sw_reg_write(as, AR7240_REG_PORT_CTRL(port),
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ar7240sw_reg_write(as->mii_bus, AR7240_REG_PORT_CTRL(port),
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AR7240_PORT_CTRL_STATE_DISABLED);
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}
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static int ar7240sw_reset(struct ar7240sw *as)
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{
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struct mii_bus *mii = as->mii_bus;
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int ret;
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int i;
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@ -410,41 +424,44 @@ static int ar7240sw_reset(struct ar7240sw *as)
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msleep(2);
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/* Reset the switch. */
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ar7240sw_reg_write(as, AR7240_REG_MASK_CTRL,
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ar7240sw_reg_write(mii, AR7240_REG_MASK_CTRL,
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AR7240_MASK_CTRL_SOFT_RESET);
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ret = ar7240sw_reg_wait(as, AR7240_REG_MASK_CTRL,
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ret = ar7240sw_reg_wait(mii, AR7240_REG_MASK_CTRL,
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AR7240_MASK_CTRL_SOFT_RESET, 0, 1000);
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return ret;
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}
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static void ar7240sw_setup(struct ar7240sw *as)
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{
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struct mii_bus *mii = as->mii_bus;
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/* Enable CPU port, and disable mirror port */
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ar7240sw_reg_write(as, AR7240_REG_CPU_PORT,
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ar7240sw_reg_write(mii, AR7240_REG_CPU_PORT,
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AR7240_CPU_PORT_EN |
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(15 << AR7240_MIRROR_PORT_S));
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/* Setup TAG priority mapping */
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ar7240sw_reg_write(as, AR7240_REG_TAG_PRIORITY, 0xfa50);
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ar7240sw_reg_write(mii, AR7240_REG_TAG_PRIORITY, 0xfa50);
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/* Enable ARP frame acknowledge */
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ar7240sw_reg_set(as, AR7240_REG_AT_CTRL, AR7240_AT_CTRL_ARP_EN);
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ar7240sw_reg_set(mii, AR7240_REG_AT_CTRL, AR7240_AT_CTRL_ARP_EN);
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/* Enable Broadcast frames transmitted to the CPU */
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ar7240sw_reg_set(as, AR7240_REG_FLOOD_MASK,
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ar7240sw_reg_set(mii, AR7240_REG_FLOOD_MASK,
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AR7240_FLOOD_MASK_BROAD_TO_CPU);
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/* setup MTU */
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ar7240sw_reg_rmw(as, AR7240_REG_GLOBAL_CTRL, AR7240_GLOBAL_CTRL_MTU_M,
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ar7240sw_reg_rmw(mii, AR7240_REG_GLOBAL_CTRL, AR7240_GLOBAL_CTRL_MTU_M,
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1536);
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/* setup Service TAG */
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ar7240sw_reg_rmw(as, AR7240_REG_SERVICE_TAG, AR7240_SERVICE_TAG_M, 0);
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ar7240sw_reg_rmw(mii, AR7240_REG_SERVICE_TAG, AR7240_SERVICE_TAG_M, 0);
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}
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static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port, u8 portmask)
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{
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struct mii_bus *mii = as->mii_bus;
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u32 ctrl;
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u32 dest_ports;
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u32 vlan;
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@ -453,7 +470,7 @@ static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port, u8 portmask)
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AR7240_PORT_CTRL_SINGLE_VLAN;
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if (port == AR7240_PORT_CPU) {
|
||||
ar7240sw_reg_write(as, AR7240_REG_PORT_STATUS(port),
|
||||
ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port),
|
||||
AR7240_PORT_STATUS_SPEED_1000 |
|
||||
AR7240_PORT_STATUS_TXFLOW |
|
||||
AR7240_PORT_STATUS_RXFLOW |
|
||||
@ -461,7 +478,7 @@ static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port, u8 portmask)
|
||||
AR7240_PORT_STATUS_RXMAC |
|
||||
AR7240_PORT_STATUS_DUPLEX);
|
||||
} else {
|
||||
ar7240sw_reg_write(as, AR7240_REG_PORT_STATUS(port),
|
||||
ar7240sw_reg_write(mii, AR7240_REG_PORT_STATUS(port),
|
||||
AR7240_PORT_STATUS_LINK_AUTO);
|
||||
}
|
||||
|
||||
@ -499,19 +516,20 @@ static void ar7240sw_setup_port(struct ar7240sw *as, unsigned port, u8 portmask)
|
||||
/* set default VID and and destination ports for this VLAN */
|
||||
vlan |= (portmask << AR7240_PORT_VLAN_DEST_PORTS_S);
|
||||
|
||||
ar7240sw_reg_write(as, AR7240_REG_PORT_CTRL(port), ctrl);
|
||||
ar7240sw_reg_write(as, AR7240_REG_PORT_VLAN(port), vlan);
|
||||
ar7240sw_reg_write(mii, AR7240_REG_PORT_CTRL(port), ctrl);
|
||||
ar7240sw_reg_write(mii, AR7240_REG_PORT_VLAN(port), vlan);
|
||||
}
|
||||
|
||||
static int ar7240_set_addr(struct ar7240sw *as, u8 *addr)
|
||||
{
|
||||
struct mii_bus *mii = as->mii_bus;
|
||||
u32 t;
|
||||
|
||||
t = (addr[4] << 8) | addr[5];
|
||||
ar7240sw_reg_write(as, AR7240_REG_MAC_ADDR0, t);
|
||||
ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR0, t);
|
||||
|
||||
t = (addr[0] << 24) | (addr[1] << 16) | (addr[2] << 8) | addr[3];
|
||||
ar7240sw_reg_write(as, AR7240_REG_MAC_ADDR1, t);
|
||||
ar7240sw_reg_write(mii, AR7240_REG_MAC_ADDR1, t);
|
||||
|
||||
return 0;
|
||||
}
|
||||
@ -633,16 +651,18 @@ ar7240_get_vlan(struct switch_dev *dev, const struct switch_attr *attr,
|
||||
static void
|
||||
ar7240_vtu_op(struct ar7240sw *as, u32 op, u32 val)
|
||||
{
|
||||
if (ar7240sw_reg_wait(as, AR7240_REG_VTU, AR7240_VTU_ACTIVE, 0, 5))
|
||||
struct mii_bus *mii = as->mii_bus;
|
||||
|
||||
if (ar7240sw_reg_wait(mii, AR7240_REG_VTU, AR7240_VTU_ACTIVE, 0, 5))
|
||||
return;
|
||||
|
||||
if ((op & AR7240_VTU_OP) == AR7240_VTU_OP_LOAD) {
|
||||
val &= AR7240_VTUDATA_MEMBER;
|
||||
val |= AR7240_VTUDATA_VALID;
|
||||
ar7240sw_reg_write(as, AR7240_REG_VTU_DATA, val);
|
||||
ar7240sw_reg_write(mii, AR7240_REG_VTU_DATA, val);
|
||||
}
|
||||
op |= AR7240_VTU_ACTIVE;
|
||||
ar7240sw_reg_write(as, AR7240_REG_VTU, op);
|
||||
ar7240sw_reg_write(mii, AR7240_REG_VTU, op);
|
||||
}
|
||||
|
||||
static int
|
||||
@ -766,16 +786,17 @@ static struct ar7240sw *ar7240_probe(struct ag71xx *ag)
|
||||
|
||||
ar7240sw_init(as, mii);
|
||||
|
||||
ctrl = ar7240sw_reg_read(as, AR7240_REG_MASK_CTRL);
|
||||
ctrl = ar7240sw_reg_read(mii, AR7240_REG_MASK_CTRL);
|
||||
|
||||
ver = (ctrl >> AR7240_MASK_CTRL_VERSION_S) & AR7240_MASK_CTRL_VERSION_M;
|
||||
if (ver != 1) {
|
||||
pr_err("%s: unsupported chip, ctrl=%08x\n", ag->dev->name, ctrl);
|
||||
pr_err("%s: unsupported chip, ctrl=%08x\n",
|
||||
ag->dev->name, ctrl);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
phy_id1 = ar7240sw_phy_read(as, 0, MII_PHYSID1);
|
||||
phy_id2 = ar7240sw_phy_read(as, 0, MII_PHYSID2);
|
||||
phy_id1 = ar7240sw_phy_read(mii, 0, MII_PHYSID1);
|
||||
phy_id2 = ar7240sw_phy_read(mii, 0, MII_PHYSID2);
|
||||
if (phy_id1 != AR7240_PHY_ID1 || phy_id2 != AR7240_PHY_ID2) {
|
||||
pr_err("%s: unknown phy id '%04x:%04x'\n",
|
||||
ag->dev->name, phy_id1, phy_id2);
|
||||
@ -794,7 +815,7 @@ static struct ar7240sw *ar7240_probe(struct ag71xx *ag)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
printk("%s: Found an AR7240 built-in switch\n", ag->dev->name);
|
||||
pr_info("%s: Found an AR7240 built-in switch\n", ag->dev->name);
|
||||
|
||||
/* initialize defaults */
|
||||
for (i = 0; i < AR7240_MAX_VLANS; i++)
|
||||
@ -824,7 +845,7 @@ void ag71xx_ar7240_stop(struct ag71xx *ag)
|
||||
{
|
||||
}
|
||||
|
||||
int __init ag71xx_ar7240_init(struct ag71xx *ag)
|
||||
int __devinit ag71xx_ar7240_init(struct ag71xx *ag)
|
||||
{
|
||||
struct ar7240sw *as;
|
||||
|
||||
@ -838,7 +859,7 @@ int __init ag71xx_ar7240_init(struct ag71xx *ag)
|
||||
return 0;
|
||||
}
|
||||
|
||||
void __exit ag71xx_ar7240_cleanup(struct ag71xx *ag)
|
||||
void __devexit ag71xx_ar7240_cleanup(struct ag71xx *ag)
|
||||
{
|
||||
struct ar7240sw *as = ag->phy_priv;
|
||||
|
||||
|
@ -119,7 +119,8 @@ static int ag71xx_ring_alloc(struct ag71xx_ring *ring, unsigned int size)
|
||||
}
|
||||
|
||||
for (i = 0; i < size; i++) {
|
||||
ring->buf[i].desc = (struct ag71xx_desc *)&ring->descs_cpu[i * ring->desc_size];
|
||||
int idx = i * ring->desc_size;
|
||||
ring->buf[i].desc = (struct ag71xx_desc *)&ring->descs_cpu[idx];
|
||||
DBG("ag71xx: ring %p, desc %d at %p\n",
|
||||
ring, i, ring->buf[i].desc);
|
||||
}
|
||||
@ -573,16 +574,12 @@ static void ag71xx_hw_stop(struct ag71xx *ag)
|
||||
static int ag71xx_open(struct net_device *dev)
|
||||
{
|
||||
struct ag71xx *ag = netdev_priv(dev);
|
||||
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
|
||||
int ret;
|
||||
|
||||
ret = ag71xx_rings_init(ag);
|
||||
if (ret)
|
||||
goto err;
|
||||
|
||||
if (pdata->is_ar724x)
|
||||
ag71xx_hw_init(ag);
|
||||
|
||||
napi_enable(&ag->napi);
|
||||
|
||||
netif_carrier_off(dev);
|
||||
@ -685,7 +682,6 @@ static netdev_tx_t ag71xx_hard_start_xmit(struct sk_buff *skb,
|
||||
|
||||
static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
|
||||
{
|
||||
struct mii_ioctl_data *data = (struct mii_ioctl_data *) &ifr->ifr_data;
|
||||
struct ag71xx *ag = netdev_priv(dev);
|
||||
int ret;
|
||||
|
||||
@ -717,7 +713,7 @@ static int ag71xx_do_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
|
||||
if (ag->phy_dev == NULL)
|
||||
break;
|
||||
|
||||
return phy_mii_ioctl(ag->phy_dev, data, cmd);
|
||||
return phy_mii_ioctl(ag->phy_dev, ifr, cmd);
|
||||
|
||||
default:
|
||||
break;
|
||||
@ -747,8 +743,13 @@ static void ag71xx_tx_timeout(struct net_device *dev)
|
||||
static void ag71xx_restart_work_func(struct work_struct *work)
|
||||
{
|
||||
struct ag71xx *ag = container_of(work, struct ag71xx, restart_work);
|
||||
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
|
||||
|
||||
ag71xx_stop(ag->dev);
|
||||
|
||||
if (pdata->is_ar724x)
|
||||
ag71xx_hw_init(ag);
|
||||
|
||||
ag71xx_open(ag->dev);
|
||||
}
|
||||
|
||||
@ -991,7 +992,7 @@ static const struct net_device_ops ag71xx_netdev_ops = {
|
||||
#endif
|
||||
};
|
||||
|
||||
static int __init ag71xx_probe(struct platform_device *pdev)
|
||||
static int __devinit ag71xx_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct net_device *dev;
|
||||
struct resource *res;
|
||||
@ -1058,7 +1059,7 @@ static int __init ag71xx_probe(struct platform_device *pdev)
|
||||
|
||||
dev->irq = platform_get_irq(pdev, 0);
|
||||
err = request_irq(dev->irq, ag71xx_interrupt,
|
||||
IRQF_DISABLED | IRQF_SAMPLE_RANDOM,
|
||||
IRQF_DISABLED,
|
||||
dev->name, dev);
|
||||
if (err) {
|
||||
dev_err(&pdev->dev, "unable to request IRQ %d\n", dev->irq);
|
||||
@ -1123,7 +1124,7 @@ static int __init ag71xx_probe(struct platform_device *pdev)
|
||||
return err;
|
||||
}
|
||||
|
||||
static int __exit ag71xx_remove(struct platform_device *pdev)
|
||||
static int __devexit ag71xx_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct net_device *dev = platform_get_drvdata(pdev);
|
||||
|
||||
|
@ -47,7 +47,7 @@ static void ag71xx_mdio_dump_regs(struct ag71xx_mdio *am)
|
||||
ag71xx_mdio_rr(am, AG71XX_REG_MII_IND));
|
||||
}
|
||||
|
||||
static int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg)
|
||||
int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg)
|
||||
{
|
||||
int ret;
|
||||
int i;
|
||||
@ -77,8 +77,7 @@ static int ag71xx_mdio_mii_read(struct ag71xx_mdio *am, int addr, int reg)
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void ag71xx_mdio_mii_write(struct ag71xx_mdio *am,
|
||||
int addr, int reg, u16 val)
|
||||
void ag71xx_mdio_mii_write(struct ag71xx_mdio *am, int addr, int reg, u16 val)
|
||||
{
|
||||
int i;
|
||||
|
||||
@ -122,6 +121,9 @@ static int ag71xx_mdio_read(struct mii_bus *bus, int addr, int reg)
|
||||
{
|
||||
struct ag71xx_mdio *am = bus->priv;
|
||||
|
||||
if (am->pdata->is_ar7240)
|
||||
return ar7240sw_phy_read(bus, addr, reg);
|
||||
else
|
||||
return ag71xx_mdio_mii_read(am, addr, reg);
|
||||
}
|
||||
|
||||
@ -129,11 +131,14 @@ static int ag71xx_mdio_write(struct mii_bus *bus, int addr, int reg, u16 val)
|
||||
{
|
||||
struct ag71xx_mdio *am = bus->priv;
|
||||
|
||||
if (am->pdata->is_ar7240)
|
||||
ar7240sw_phy_write(bus, addr, reg, val);
|
||||
else
|
||||
ag71xx_mdio_mii_write(am, addr, reg, val);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int __init ag71xx_mdio_probe(struct platform_device *pdev)
|
||||
static int __devinit ag71xx_mdio_probe(struct platform_device *pdev)
|
||||
{
|
||||
struct ag71xx_mdio_platform_data *pdata;
|
||||
struct ag71xx_mdio *am;
|
||||
@ -209,7 +214,7 @@ static int __init ag71xx_mdio_probe(struct platform_device *pdev)
|
||||
return err;
|
||||
}
|
||||
|
||||
static int __exit ag71xx_mdio_remove(struct platform_device *pdev)
|
||||
static int __devexit ag71xx_mdio_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct ag71xx_mdio *am = platform_get_drvdata(pdev);
|
||||
|
||||
@ -232,7 +237,7 @@ static struct platform_driver ag71xx_mdio_driver = {
|
||||
}
|
||||
};
|
||||
|
||||
int ag71xx_mdio_driver_init(void)
|
||||
int __init ag71xx_mdio_driver_init(void)
|
||||
{
|
||||
return platform_driver_register(&ag71xx_mdio_driver);
|
||||
}
|
||||
|
@ -190,7 +190,7 @@ static struct mii_bus *dev_to_mii_bus(struct device *dev)
|
||||
return NULL;
|
||||
}
|
||||
|
||||
int ag71xx_phy_connect(struct ag71xx *ag)
|
||||
int __devinit ag71xx_phy_connect(struct ag71xx *ag)
|
||||
{
|
||||
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
|
||||
|
||||
@ -217,7 +217,7 @@ int ag71xx_phy_connect(struct ag71xx *ag)
|
||||
return ag71xx_phy_connect_fixed(ag);
|
||||
}
|
||||
|
||||
void ag71xx_phy_disconnect(struct ag71xx *ag)
|
||||
void __devexit ag71xx_phy_disconnect(struct ag71xx *ag)
|
||||
{
|
||||
struct ag71xx_platform_data *pdata = ag71xx_get_pdata(ag);
|
||||
|
||||
|
Loading…
x
Reference in New Issue
Block a user