mirror of
git://projects.qi-hardware.com/openwrt-xburst.git
synced 2024-11-18 10:30:36 +02:00
Corrected inverted DCD/DTR logic
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@7145 3c298f89-4303-0410-b956-a3cf2f4a3e73
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@ -10,9 +10,9 @@
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+ * USART 0 - Drive DTR and RI pins manually
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+ * USART 0 - Drive DTR and RI pins manually
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+ */
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+ */
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+ if (mctrl & TIOCM_DTR)
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+ if (mctrl & TIOCM_DTR)
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+ at91_set_gpio_value(AT91_PIN_PA19, 0);
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+ at91_set_gpio_value(AT91_PIN_PB6, 0);
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+ else
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+ else
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+ at91_set_gpio_value(AT91_PIN_PA19, 1);
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+ at91_set_gpio_value(AT91_PIN_PB6, 1);
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+ if (mctrl & TIOCM_RI)
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+ if (mctrl & TIOCM_RI)
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+ at91_set_gpio_value(AT91_PIN_PB7, 0);
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+ at91_set_gpio_value(AT91_PIN_PB7, 0);
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+ else
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+ else
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@ -25,9 +25,9 @@
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+ */
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+ */
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+ if (port->mapbase == AT91RM9200_BASE_US3) {
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+ if (port->mapbase == AT91RM9200_BASE_US3) {
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+ if (mctrl & TIOCM_DTR)
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+ if (mctrl & TIOCM_DTR)
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+ at91_set_gpio_value(AT91_PIN_PA24, 0);
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+ at91_set_gpio_value(AT91_PIN_PB29, 0);
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+ else
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+ else
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+ at91_set_gpio_value(AT91_PIN_PA24, 1);
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+ at91_set_gpio_value(AT91_PIN_PB29, 1);
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+ if (mctrl & TIOCM_RI)
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+ if (mctrl & TIOCM_RI)
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+ at91_set_gpio_value(AT91_PIN_PB2, 0);
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+ at91_set_gpio_value(AT91_PIN_PB2, 0);
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+ else
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+ else
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@ -60,10 +60,10 @@
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+ * Read the GPIO's for the FDL VersaLink special case
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+ * Read the GPIO's for the FDL VersaLink special case
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+ */
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+ */
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+ if (port->mapbase == AT91RM9200_BASE_US0)
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+ if (port->mapbase == AT91RM9200_BASE_US0)
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+ if (!(at91_get_gpio_value(AT91_PIN_PB6)))
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+ if (!(at91_get_gpio_value(AT91_PIN_PA19)))
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+ ret |= TIOCM_CD;
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+ ret |= TIOCM_CD;
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+ if (port->mapbase == AT91RM9200_BASE_US3)
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+ if (port->mapbase == AT91RM9200_BASE_US3)
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+ if (!(at91_get_gpio_value(AT91_PIN_PB29)))
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+ if (!(at91_get_gpio_value(AT91_PIN_PA24)))
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+ ret |= TIOCM_CD;
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+ ret |= TIOCM_CD;
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+
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+
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return ret;
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return ret;
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