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[ar71xx] pb42: fix ethernet, remove USB registration, add default network configuration
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@14876 3c298f89-4303-0410-b956-a3cf2f4a3e73
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16
target/linux/ar71xx/base-files/etc/defconfig/pb42/network
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16
target/linux/ar71xx/base-files/etc/defconfig/pb42/network
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@ -0,0 +1,16 @@
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config interface loopback
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option ifname lo
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option proto static
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option ipaddr 127.0.0.1
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option netmask 255.0.0.0
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config interface lan
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option ifname eth1
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option type bridge
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option proto static
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option ipaddr 192.168.1.1
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option netmask 255.255.255.0
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config interface wan
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option ifname eth0
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option proto dhcp
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@ -19,6 +19,9 @@ ar71xx_board_name() {
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*MZK-W04NU)
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*MZK-W04NU)
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name="mzk-w04nu"
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name="mzk-w04nu"
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;;
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;;
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*PB42)
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name="pb42"
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;;
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*RB-411)
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*RB-411)
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name="rb-411"
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name="rb-411"
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;;
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;;
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@ -10,6 +10,7 @@
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*/
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*/
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#include <linux/init.h>
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#include <linux/init.h>
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#include <linux/bitops.h>
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#include <linux/platform_device.h>
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#include <linux/platform_device.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/spi.h>
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#include <linux/spi/flash.h>
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#include <linux/spi/flash.h>
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@ -45,24 +46,28 @@ static struct ar71xx_pci_irq pb42_pci_irqs[] __initdata = {
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}
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}
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};
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};
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#define PB42_WAN_PHYMASK BIT(20)
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#define PB42_LAN_PHYMASK (BIT(16) | BIT(17) | BIT(18) | BIT(19))
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#define PB42_MDIO_PHYMASK (PB42_LAN_PHYMASK | PB42_WAN_PHYMASK)
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static void __init pb42_init(void)
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static void __init pb42_init(void)
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{
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{
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ar71xx_add_device_spi(NULL, pb42_spi_info,
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ar71xx_add_device_spi(NULL, pb42_spi_info,
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ARRAY_SIZE(pb42_spi_info));
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ARRAY_SIZE(pb42_spi_info));
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ar71xx_add_device_mdio(0xffe0ffff);
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ar71xx_add_device_mdio(~PB42_MDIO_PHYMASK);
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ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
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ar71xx_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_MII;
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ar71xx_eth0_data.phy_mask = 0x000f0000;
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ar71xx_eth0_data.phy_mask = PB42_WAN_PHYMASK;
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ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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ar71xx_eth1_data.phy_if_mode = PHY_INTERFACE_MODE_RMII;
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ar71xx_eth1_data.phy_mask = 0x00100000;
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ar71xx_eth1_data.phy_mask = PB42_LAN_PHYMASK;
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ar71xx_eth1_data.speed = SPEED_100;
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ar71xx_eth1_data.duplex = DUPLEX_FULL;
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ar71xx_add_device_eth(0);
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ar71xx_add_device_eth(0);
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ar71xx_add_device_eth(1);
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ar71xx_add_device_eth(1);
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ar71xx_add_device_usb();
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ar71xx_pci_init(ARRAY_SIZE(pb42_pci_irqs), pb42_pci_irqs);
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ar71xx_pci_init(ARRAY_SIZE(pb42_pci_irqs), pb42_pci_irqs);
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}
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}
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