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detect ar7 at runtime in set_except_vector and remove useless volatile

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@8824 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
matteo 2007-09-17 12:45:38 +00:00
parent f07284d46f
commit 351a3d1a64
1 changed files with 25 additions and 21 deletions
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32
target/linux/ar7/patches-2.6.22/100-board_support.patch
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@ -26,28 +26,32 @@ diff -urN linux-2.6.22/arch/mips/Kconfig linux-2.6.22.new/arch/mips/Kconfig
diff -urN linux-2.6.22/arch/mips/kernel/traps.c linux-2.6.22.new/arch/mips/kernel/traps.c diff -urN linux-2.6.22/arch/mips/kernel/traps.c linux-2.6.22.new/arch/mips/kernel/traps.c
--- linux-2.6.22/arch/mips/kernel/traps.c 2007-07-09 01:32:17.000000000 +0200 --- linux-2.6.22/arch/mips/kernel/traps.c 2007-07-09 01:32:17.000000000 +0200
+++ linux-2.6.22.new/arch/mips/kernel/traps.c 2007-07-11 02:32:39.000000000 +0200 +++ linux-2.6.22.new/arch/mips/kernel/traps.c 2007-07-11 02:32:39.000000000 +0200
@@ -1075,9 +1075,23 @@ void *set_except_vector(int n, void *addr) @@ -1074,11 +1074,23 @@ void *set_except_vector(int n, void *addr)
unsigned long old_handler = exception_handlers[n];
exception_handlers[n] = handler; exception_handlers[n] = handler;
if (n == 0 && cpu_has_divec) { - if (n == 0 && cpu_has_divec) {
+#ifdef CONFIG_AR7 - *(volatile u32 *)(ebase + 0x200) = 0x08000000 |
- (0x03ffffff & (handler >> 2));
- flush_icache_range(ebase + 0x200, ebase + 0x204);
- }
+ if (n == 0 && cpu_has_divec)
+ if ((handler ^ (ebase + 4)) & 0xfc000000) {
+ /* lui k0, 0x0000 */ + /* lui k0, 0x0000 */
+ *(volatile u32 *)(ebase + 0x200) = + *(u32 *)(ebase + 0x200) = 0x3c1a0000 | (handler >> 16);
+ 0x3c1a0000 | (handler >> 16);
+ /* ori k0, 0x0000 */ + /* ori k0, 0x0000 */
+ *(volatile u32 *)(ebase + 0x204) = + *(u32 *)(ebase + 0x204) =
+ 0x375a0000 | (handler & 0xffff); + 0x375a0000 | (handler & 0xffff);
+ /* jr k0 */ + /* jr k0 */
+ *(volatile u32 *)(ebase + 0x208) = 0x03400008; + *(u32 *)(ebase + 0x208) = 0x03400008;
+ /* nop */ + /* nop */
+ *(volatile u32 *)(ebase + 0x20C) = 0x00000000; + *(u32 *)(ebase + 0x20C) = 0x00000000;
+ flush_icache_range(ebase + 0x200, ebase + 0x210); + flush_icache_range(ebase + 0x200, ebase + 0x210);
+#else + } else {
*(volatile u32 *)(ebase + 0x200) = 0x08000000 | + *(volatile u32 *)(ebase + 0x200) =
(0x03ffffff & (handler >> 2)); + 0x08000000 | (0x03ffffff & (handler >> 2));
flush_icache_range(ebase + 0x200, ebase + 0x204); + flush_icache_range(ebase + 0x200, ebase + 0x204);
+#endif + }
}
return (void *)old_handler; return (void *)old_handler;
} }