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ar71xx: add device registration code for the AR934x NAND flash controller

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33387 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2012-09-13 07:26:25 +00:00
parent 8788b410ee
commit 39bdbbc7fc
7 changed files with 141 additions and 7 deletions

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@ -0,0 +1,95 @@
/*
* Atheros AR934X SoCs built-in NAND flash controller support
*
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/irq.h>
#include <linux/dma-mapping.h>
#include <linux/etherdevice.h>
#include <linux/platform_device.h>
#include <linux/platform/ar934x_nfc.h>
#include <asm/mach-ath79/ath79.h>
#include <asm/mach-ath79/ar71xx_regs.h>
#include "dev-nfc.h"
static struct resource ath79_nfc_resources[2];
static u64 ar934x_nfc_dmamask = DMA_BIT_MASK(32);
static struct ar934x_nfc_platform_data ath79_nfc_data;
static struct platform_device ath79_nfc_device = {
.name = AR934X_NFC_DRIVER_NAME,
.id = -1,
.resource = ath79_nfc_resources,
.num_resources = ARRAY_SIZE(ath79_nfc_resources),
.dev = {
.dma_mask = &ar934x_nfc_dmamask,
.coherent_dma_mask = DMA_BIT_MASK(32),
.platform_data = &ath79_nfc_data,
},
};
static void ar934x_nfc_hw_reset(bool active)
{
if (active) {
ath79_device_reset_set(AR934X_RESET_NANDF);
udelay(100);
ath79_device_reset_set(AR934X_RESET_ETH_SWITCH_ANALOG);
udelay(250);
} else {
ath79_device_reset_clear(AR934X_RESET_ETH_SWITCH_ANALOG);
udelay(250);
ath79_device_reset_clear(AR934X_RESET_NANDF);
udelay(100);
}
}
static void ar934x_nfc_setup(void)
{
ath79_nfc_resources[0].start = AR934X_NFC_BASE;
ath79_nfc_resources[0].end = AR934X_NFC_BASE + AR934X_NFC_SIZE - 1;
ath79_nfc_resources[0].flags = IORESOURCE_MEM;
ath79_nfc_resources[1].start = ATH79_MISC_IRQ(21);
ath79_nfc_resources[1].end = ATH79_MISC_IRQ(21);
ath79_nfc_resources[1].flags = IORESOURCE_IRQ;
ath79_nfc_data.hw_reset = ar934x_nfc_hw_reset;
platform_device_register(&ath79_nfc_device);
}
void __init ath79_nfc_set_select_chip(void (*f)(int chip_no))
{
ath79_nfc_data.select_chip = f;
}
void __init ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd))
{
ath79_nfc_data.scan_fixup = f;
}
void __init ath79_nfc_set_parts(struct mtd_partition *parts, int nr_parts)
{
ath79_nfc_data.parts = parts;
ath79_nfc_data.nr_parts = nr_parts;
}
void __init ath79_register_nfc(void)
{
if (soc_is_ar934x())
ar934x_nfc_setup();
else
BUG();
}

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@ -0,0 +1,27 @@
/*
* Atheros AR934X SoCs built-in NAND Flash Controller support
*
* Copyright (C) 2011-2012 Gabor Juhos <juhosg@openwrt.org>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License version 2 as published
* by the Free Software Foundation.
*/
#ifndef _ATH79_DEV_NFC_H
#define _ATH79_DEV_NFC_H
#ifdef CONFIG_ATH79_DEV_NFC
void ath79_nfc_set_parts(struct mtd_partition *parts, int nr_parts);
void ath79_nfc_set_select_chip(void (*f)(int chip_no));
void ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd));
void ath79_register_nfc(void);
#else
static inline void ath79_nfc_set_parts(struct mtd_partition *parts,
int nr_parts) {}
static inline void ath79_nfc_set_select_chip(void (*f)(int chip_no)) {}
static inline void ath79_nfc_set_scan_fixup(int (*f)(struct mtd_info *mtd)) {}
static inline void ath79_register_nfc(void) {}
#endif
#endif /* _ATH79_DEV_NFC_H */

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@ -21,7 +21,18 @@
config PCI_AR724X
def_bool n
@@ -125,4 +139,13 @@ config ATH79_DEV_WMAC
@@ -115,6 +129,10 @@ config ATH79_DEV_GPIO_BUTTONS
config ATH79_DEV_LEDS_GPIO
def_bool n
+config ATH79_DEV_NFC
+ depends on (SOC_AR934X)
+ def_bool n
+
config ATH79_DEV_SPI
def_bool n
@@ -125,4 +143,13 @@ config ATH79_DEV_WMAC
depends on (SOC_AR913X || SOC_AR933X || SOC_AR934X || SOC_QCA955X)
def_bool n
@ -37,7 +48,7 @@
endif
--- a/arch/mips/ath79/Makefile
+++ b/arch/mips/ath79/Makefile
@@ -17,13 +17,24 @@ obj-$(CONFIG_PCI) += pci.o
@@ -17,13 +17,25 @@ obj-$(CONFIG_PCI) += pci.o
# Devices
#
obj-y += dev-common.o
@ -47,6 +58,7 @@
obj-$(CONFIG_ATH79_DEV_GPIO_BUTTONS) += dev-gpio-buttons.o
obj-$(CONFIG_ATH79_DEV_LEDS_GPIO) += dev-leds-gpio.o
+obj-$(CONFIG_ATH79_DEV_M25P80) += dev-m25p80.o
+obj-$(CONFIG_ATH79_DEV_NFC) += dev-nfc.o
obj-$(CONFIG_ATH79_DEV_SPI) += dev-spi.o
obj-$(CONFIG_ATH79_DEV_USB) += dev-usb.o
obj-$(CONFIG_ATH79_DEV_WMAC) += dev-wmac.o

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@ -671,7 +671,7 @@
def_bool n
config ATH79_DEV_GPIO_BUTTONS
@@ -156,4 +671,7 @@ config ATH79_PCI_ATH9K_FIXUP
@@ -160,4 +675,7 @@ config ATH79_PCI_ATH9K_FIXUP
config ATH79_ROUTERBOOT
def_bool n
@ -681,7 +681,7 @@
endif
--- a/arch/mips/ath79/Makefile
+++ b/arch/mips/ath79/Makefile
@@ -37,9 +37,62 @@ obj-$(CONFIG_ATH79_ROUTERBOOT) += route
@@ -38,9 +38,62 @@ obj-$(CONFIG_ATH79_ROUTERBOOT) += route
#
# Machines
#

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@ -19,7 +19,7 @@
select SOC_AR71XX
--- a/arch/mips/ath79/Makefile
+++ b/arch/mips/ath79/Makefile
@@ -68,6 +68,7 @@ obj-$(CONFIG_ATH79_MACH_RB750) += mach-
@@ -69,6 +69,7 @@ obj-$(CONFIG_ATH79_MACH_RB750) += mach-
obj-$(CONFIG_ATH79_MACH_RW2458N) += mach-rw2458n.o
obj-$(CONFIG_ATH79_MACH_TEW_632BRP) += mach-tew-632brp.o
obj-$(CONFIG_ATH79_MACH_TEW_673GRU) += mach-tew-673gru.o

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@ -18,7 +18,7 @@
select SOC_AR724X
--- a/arch/mips/ath79/Makefile
+++ b/arch/mips/ath79/Makefile
@@ -40,6 +40,7 @@ obj-$(CONFIG_ATH79_ROUTERBOOT) += route
@@ -41,6 +41,7 @@ obj-$(CONFIG_ATH79_ROUTERBOOT) += route
obj-$(CONFIG_ATH79_MACH_ALFA_AP96) += mach-alfa-ap96.o
obj-$(CONFIG_ATH79_MACH_ALFA_NX) += mach-alfa-nx.o
obj-$(CONFIG_ATH79_MACH_ALL0258N) += mach-all0258n.o

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@ -24,7 +24,7 @@
ATH79_MACH_TEW_673GRU, /* TRENDnet TEW-673GRU */
--- a/arch/mips/ath79/Makefile
+++ b/arch/mips/ath79/Makefile
@@ -66,6 +66,7 @@ obj-$(CONFIG_ATH79_MACH_PB44) += mach-p
@@ -67,6 +67,7 @@ obj-$(CONFIG_ATH79_MACH_PB44) += mach-p
obj-$(CONFIG_ATH79_MACH_PB92) += mach-pb92.o
obj-$(CONFIG_ATH79_MACH_RB4XX) += mach-rb4xx.o
obj-$(CONFIG_ATH79_MACH_RB750) += mach-rb750.o