From 3b8d5515c17c131e1a6859fe2e4b77e2d70093eb Mon Sep 17 00:00:00 2001 From: Xiangfu Liu Date: Wed, 27 Oct 2010 18:00:57 +0800 Subject: [PATCH] [uboot-xburst] cleanup the lcm init - cleanup code style - remove useless code - make the color correct in u-boot Signed-off-by: Xiangfu Liu --- .../files/arch/mips/include/asm/jz4740.h | 1 - .../files/drivers/video/nanonote_gpm940b0.c | 8 +- .../files/drivers/video/nanonote_gpm940b0.h | 158 +++++------------- .../files/include/configs/nanonote.h | 10 +- 4 files changed, 52 insertions(+), 125 deletions(-) diff --git a/package/uboot-xburst/files/arch/mips/include/asm/jz4740.h b/package/uboot-xburst/files/arch/mips/include/asm/jz4740.h index 30b8c67f9..bc12d72f3 100644 --- a/package/uboot-xburst/files/arch/mips/include/asm/jz4740.h +++ b/package/uboot-xburst/files/arch/mips/include/asm/jz4740.h @@ -193,7 +193,6 @@ static inline void jz_flush_icache(void) #define RTC_HWRSR_PIN (1 << 1) /* Wakeup pin status bit */ #define RTC_HWRSR_ALM (1 << 0) /* RTC alarm status bit */ - /************************************************************************* * CPM (Clock reset and Power control Management) *************************************************************************/ diff --git a/package/uboot-xburst/files/drivers/video/nanonote_gpm940b0.c b/package/uboot-xburst/files/drivers/video/nanonote_gpm940b0.c index 4c98d2943..203bebecc 100644 --- a/package/uboot-xburst/files/drivers/video/nanonote_gpm940b0.c +++ b/package/uboot-xburst/files/drivers/video/nanonote_gpm940b0.c @@ -1,7 +1,7 @@ /* * JzRISC lcd controller * - * xiangfu liu + * Xiangfu Liu * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -56,7 +56,6 @@ vidinfo_t panel_info = { }; int lcd_line_length; - int lcd_color_fg; int lcd_color_bg; /* @@ -74,8 +73,8 @@ void lcd_disable (void); static int jz_lcd_init_mem(void *lcdbase, vidinfo_t *vid); static void jz_lcd_desc_init(vidinfo_t *vid); -static int jz_lcd_hw_init( vidinfo_t *vid ); -extern int flush_cache_all(void); +static int jz_lcd_hw_init(vidinfo_t *vid); +extern int flush_cache_all(void); void lcd_ctrl_init (void *lcdbase) { @@ -91,7 +90,6 @@ void lcd_ctrl_init (void *lcdbase) /* * Before enabled lcd controller, lcd registers should be configured correctly. */ - void lcd_enable (void) { REG_LCD_CTRL &= ~(1<<4); /* LCDCTRL.DIS */ diff --git a/package/uboot-xburst/files/drivers/video/nanonote_gpm940b0.h b/package/uboot-xburst/files/drivers/video/nanonote_gpm940b0.h index 33ded23ff..7cafaa496 100644 --- a/package/uboot-xburst/files/drivers/video/nanonote_gpm940b0.h +++ b/package/uboot-xburst/files/drivers/video/nanonote_gpm940b0.h @@ -1,7 +1,7 @@ /* * JzRISC lcd controller * - * xiangfu liu + * Xiangfu Liu * * This program is free software; you can redistribute it and/or * modify it under the terms of the GNU General Public License as @@ -86,126 +86,56 @@ struct lcd_desc{ /* * LCD panel specific definition */ -#define MODE 0xc9 /* 8bit serial RGB */ -#define SPEN (32*2+21) /*LCD_SPL */ -#define SPCK (32*2+23) /*LCD_CLS */ -#define SPDA (32*2+22) /*LCD_D12 */ -#define LCD_RET (32*3+27) +#define MODE (0xc9) /* 8bit serial RGB */ -#define __spi_write_reg1(reg, val) \ -do { \ - unsigned char no;\ - unsigned short value;\ - unsigned char a=0;\ - unsigned char b=0;\ - a=reg;\ - b=val;\ - __gpio_set_pin(SPEN);\ - __gpio_set_pin(SPCK);\ - __gpio_clear_pin(SPDA);\ - __gpio_clear_pin(SPEN);\ - udelay(25);\ - value=((a<<8)|(b&0xFF));\ - for(no=0;no<16;no++)\ - {\ - __gpio_clear_pin(SPCK);\ - if((value&0x8000)==0x8000)\ - __gpio_set_pin(SPDA);\ - else\ - __gpio_clear_pin(SPDA);\ - udelay(25);\ - __gpio_set_pin(SPCK);\ - value=(value<<1); \ - udelay(25);\ - }\ - __gpio_set_pin(SPEN);\ - udelay(100);\ +#define __spi_write_reg1(reg, val) \ +do { \ + unsigned char no; \ + unsigned short value; \ + unsigned char a=reg; \ + unsigned char b=val; \ + __gpio_set_pin(SPEN); \ + __gpio_set_pin(SPCK); \ + __gpio_clear_pin(SPDA); \ + __gpio_clear_pin(SPEN); \ + udelay(25); \ + value=((a<<8)|(b&0xFF)); \ + for(no=0;no<16;no++) \ + { \ + __gpio_clear_pin(SPCK); \ + if((value&0x8000)==0x8000) \ + __gpio_set_pin(SPDA); \ + else \ + __gpio_clear_pin(SPDA); \ + udelay(25); \ + __gpio_set_pin(SPCK); \ + value=(value<<1); \ + udelay(25); \ + } \ + __gpio_set_pin(SPEN); \ + udelay(100); \ } while (0) -#define __spi_write_reg(reg, val) \ -do {\ - __spi_write_reg1((reg<<2|2), val);\ - udelay(100); \ -}while(0) - -#define __lcd_special_pin_init() \ -do { \ - __gpio_as_output(SPEN); /* use SPDA */\ - __gpio_as_output(SPCK); /* use SPCK */\ - __gpio_as_output(SPDA); /* use SPDA */\ - __gpio_as_output(LCD_RET);\ +#define __lcd_display_pin_init() \ +do { \ + __cpm_start_tcu(); \ + __gpio_as_output(SPEN); /* use SPDA */ \ + __gpio_as_output(SPCK); /* use SPCK */ \ + __gpio_as_output(SPDA); /* use SPDA */ \ } while (0) -#define __lcd_special_on() \ -do { \ - __spi_write_reg1(0x05, 0x1e); \ - udelay(50);\ - __spi_write_reg1(0x05, 0x5d); \ - __spi_write_reg1(0x0B, 0x81); \ - __spi_write_reg1(0x01, 0x95); \ - __spi_write_reg1(0x00, 0x07); \ - __spi_write_reg1(0x06, 0x15); \ - __spi_write_reg1(0x07, 0x8d); \ - __spi_write_reg1(0x04, 0x0f); \ - __spi_write_reg1(0x0d, 0x3d); \ - __spi_write_reg1(0x10, 0x42); \ - __spi_write_reg1(0x11, 0x3a); \ - __spi_write_reg1(0x05, 0x5f); \ +#define __lcd_display_on() \ +do { \ + __spi_write_reg1(0x05, 0x1e); \ + __spi_write_reg1(0x05, 0xc6); \ + __spi_write_reg1(0x07, 0x8d); \ + __spi_write_reg1(0x13, 0x01); \ + __spi_write_reg1(0x05, 0xc7); \ } while (0) -#define __lcd_special_off() \ -do { \ - __spi_write_reg1(0x05, 0x5e); \ +#define __lcd_display_off() \ +do { \ + __spi_write_reg1(0x05, 0x5e); \ } while (0) -#define __lcd_set_backlight_level(n)\ -do { \ - __gpio_as_output(LCD_RET); \ - __gpio_set_pin(LCD_RET); \ -} while (0) - -#if defined(CONFIG_SAKC) -#define __lcd_close_backlight() \ -do { \ - __gpio_as_output(GPIO_PWM); \ - __gpio_clear_pin(GPIO_PWM); \ -} while (0) -#endif - -#if defined(CONFIG_SAKC) -#define __lcd_display_pin_init() \ -do { \ - __cpm_start_tcu(); \ - __lcd_special_pin_init(); \ -} while (0) - -#define __lcd_display_on() \ -do { \ - __lcd_special_on(); \ -} while (0) - -#define __lcd_display_off() \ -do { \ - __lcd_special_off(); \ -} while (0) -#else -#define __lcd_display_pin_init() \ -do { \ - __cpm_start_tcu(); \ - __lcd_special_pin_init(); \ -} while (0) - -#define __lcd_display_on() \ -do { \ - __gpio_set_pin(GPIO_DISP_OFF_N); \ - __lcd_special_on(); \ -} while (0) - -#define __lcd_display_off() \ -do { \ - __lcd_special_off(); \ - __gpio_clear_pin(GPIO_DISP_OFF_N); \ -} while (0) -#endif - #endif /* __QI_LB60_GPM940B0_H__ */ diff --git a/package/uboot-xburst/files/include/configs/nanonote.h b/package/uboot-xburst/files/include/configs/nanonote.h index a331b0def..6b7d63513 100644 --- a/package/uboot-xburst/files/include/configs/nanonote.h +++ b/package/uboot-xburst/files/include/configs/nanonote.h @@ -178,16 +178,13 @@ * GPIO definition */ #define GPIO_LCD_CS (2 * 32 + 21) -#define GPIO_DISP_OFF_N (3 * 32 + 21) -#define GPIO_PWM (3 * 32 + 27) - #define GPIO_AMP_EN (3 * 32 + 4) #define GPIO_SDPW_EN (3 * 32 + 2) #define GPIO_SD_DETECT (3 * 32 + 0) -#define GPIO_USB_DETECT (3 * 32 + 27) -#define GPIO_BUZZ_PWM (3 * 32 + 28) +#define GPIO_BUZZ_PWM (3 * 32 + 27) +#define GPIO_USB_DETECT (3 * 32 + 28) #define GPIO_AUDIO_POP (1 * 32 + 29) #define GPIO_COB_TEST (1 * 32 + 30) @@ -199,4 +196,7 @@ #define GPIO_SD_CD_N GPIO_SD_DETECT /* SD Card insert detect */ #define GPIO_SD_VCC_EN_N GPIO_SDPW_EN /* SD Card Power Enable */ +#define SPEN GPIO_LCD_CS /* LCDCS :Serial command enable */ +#define SPDA (2 * 32 + 22) /* LCDSCL:Serial command clock input */ +#define SPCK (2 * 32 + 23) /* LCDSDA:Serial command data input */ #endif /* __CONFIG_NANONOTE_H */