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ar71xx: fix CPU/DDR frequency calculation for SRIF PLLs on AR934x

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@33335 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg
2012-09-08 13:39:09 +00:00
parent 6f0a45267a
commit 41be3a0bd3
11 changed files with 238 additions and 32 deletions
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2
target/linux/ar71xx/patches-3.3/620-MIPS-ath79-OTP-support.patch
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@@ -149,7 +149,7 @@
#endif /* _ATH79_DEV_WMAC_H */
--- a/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
+++ b/arch/mips/include/asm/mach-ath79/ar71xx_regs.h
@@ -123,6 +123,14 @@
@@ -125,6 +125,14 @@
#define QCA955X_GMAC_BASE (AR71XX_APB_BASE + 0x00070000)
#define QCA955X_GMAC_SIZE 0x40