qi-hardware/openwrt-xburst
1
0
Fork 0
mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2025-04-21 12:27:27 +03:00
Code Activity

kernel: update bcma and ssb to version master-2012-04-12 from wireless-testing

Browse Source 
git-svn-id: svn://svn.openwrt.org/openwrt/trunk@31278 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
hauke
2012-04-13 19:35:40 +00:00
parent 0871a01e42
commit 4ad28d6429
50 changed files with 19944 additions and 4722 deletions
Download Patch File Download Diff File Expand all files Collapse all files

493
target/linux/generic/patches-2.6.32/975-ssb_update.patch
View File

@@ -164,8 +164,49 @@
* Copyright 2007, Broadcom Corporation
*
* Licensed under the GNU/GPL. See COPYING for details.
@@ -332,6 +332,12 @@ static void ssb_pmu_pll_init(struct ssb_
@@ -12,6 +12,9 @@
#include <linux/ssb/ssb_regs.h>
#include <linux/ssb/ssb_driver_chipcommon.h>
#include <linux/delay.h>
+#ifdef CONFIG_BCM47XX
+#include <asm/mach-bcm47xx/nvram.h>
+#endif
#include "ssb_private.h"
@@ -91,10 +94,6 @@ static void ssb_pmu0_pllinit_r0(struct s
u32 pmuctl, tmp, pllctl;
unsigned int i;
- if ((bus->chip_id == 0x5354) && !crystalfreq) {
- /* The 5354 crystal freq is 25MHz */
- crystalfreq = 25000;
- }
if (crystalfreq)
e = pmu0_plltab_find_entry(crystalfreq);
if (!e)
@@ -320,7 +319,11 @@ static void ssb_pmu_pll_init(struct ssb_
u32 crystalfreq = 0; /* in kHz. 0 = keep default freq. */
if (bus->bustype == SSB_BUSTYPE_SSB) {
- /* TODO: The user may override the crystal frequency. */
+#ifdef CONFIG_BCM47XX
+ char buf[20];
+ if (nvram_getenv("xtalfreq", buf, sizeof(buf)) >= 0)
+ crystalfreq = simple_strtoul(buf, NULL, 0);
+#endif
}
switch (bus->chip_id) {
@@ -329,9 +332,19 @@ static void ssb_pmu_pll_init(struct ssb_
ssb_pmu1_pllinit_r0(cc, crystalfreq);
break;
case 0x4328:
+ ssb_pmu0_pllinit_r0(cc, crystalfreq);
+ break;
case 0x5354:
+ if (crystalfreq == 0)
+ crystalfreq = 25000;
ssb_pmu0_pllinit_r0(cc, crystalfreq);
break;
+ case 0x4322:
@@ -177,7 +218,7 @@
default:
ssb_printk(KERN_ERR PFX
"ERROR: PLL init unknown for device %04X\n",
@@ -411,12 +417,15 @@ static void ssb_pmu_resources_init(struc
@@ -411,12 +424,15 @@ static void ssb_pmu_resources_init(struc
u32 min_msk = 0, max_msk = 0;
unsigned int i;
const struct pmu_res_updown_tab_entry *updown_tab = NULL;
@@ -195,7 +236,7 @@
/* We keep the default settings:
* min_msk = 0xCBB
* max_msk = 0x7FFFF
@@ -495,9 +504,9 @@ static void ssb_pmu_resources_init(struc
@@ -495,9 +511,9 @@ static void ssb_pmu_resources_init(struc
chipco_write32(cc, SSB_CHIPCO_PMU_MAXRES_MSK, max_msk);
}
@@ -206,7 +247,7 @@
u32 pmucap;
if (!(cc->capabilities & SSB_CHIPCO_CAP_PMU))
@@ -509,15 +518,12 @@ void ssb_pmu_init(struct ssb_chipcommon
@@ -509,15 +525,12 @@ void ssb_pmu_init(struct ssb_chipcommon
ssb_dprintk(KERN_DEBUG PFX "Found rev %u PMU (capabilities 0x%08X)\n",
cc->pmu.rev, pmucap);
@@ -228,6 +269,41 @@
ssb_pmu_pll_init(cc);
ssb_pmu_resources_init(cc);
}
@@ -600,3 +613,34 @@ void ssb_pmu_set_ldo_paref(struct ssb_ch
EXPORT_SYMBOL(ssb_pmu_set_ldo_voltage);
EXPORT_SYMBOL(ssb_pmu_set_ldo_paref);
+
+u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc)
+{
+ struct ssb_bus *bus = cc->dev->bus;
+
+ switch (bus->chip_id) {
+ case 0x5354:
+ /* 5354 chip uses a non programmable PLL of frequency 240MHz */
+ return 240000000;
+ default:
+ ssb_printk(KERN_ERR PFX
+ "ERROR: PMU cpu clock unknown for device %04X\n",
+ bus->chip_id);
+ return 0;
+ }
+}
+
+u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc)
+{
+ struct ssb_bus *bus = cc->dev->bus;
+
+ switch (bus->chip_id) {
+ case 0x5354:
+ return 120000000;
+ default:
+ ssb_printk(KERN_ERR PFX
+ "ERROR: PMU controlclock unknown for device %04X\n",
+ bus->chip_id);
+ return 0;
+ }
+}
--- a/drivers/ssb/driver_gige.c
+++ b/drivers/ssb/driver_gige.c
@@ -3,7 +3,7 @@
@@ -292,7 +368,17 @@
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
@@ -270,7 +270,6 @@ void ssb_mipscore_init(struct ssb_mipsco
@@ -208,6 +208,9 @@ u32 ssb_cpu_clock(struct ssb_mipscore *m
struct ssb_bus *bus = mcore->dev->bus;
u32 pll_type, n, m, rate = 0;
+ if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU)
+ return ssb_pmu_get_cpu_clock(&bus->chipco);
+
if (bus->extif.dev) {
ssb_extif_get_clockcontrol(&bus->extif, &pll_type, &n, &m);
} else if (bus->chipco.dev) {
@@ -270,7 +273,6 @@ void ssb_mipscore_init(struct ssb_mipsco
set_irq(dev, irq++);
}
break;
@@ -300,7 +386,7 @@
case SSB_DEV_PCI:
case SSB_DEV_ETHERNET:
case SSB_DEV_ETHERNET_GBIT:
@@ -281,6 +280,10 @@ void ssb_mipscore_init(struct ssb_mipsco
@@ -281,6 +283,10 @@ void ssb_mipscore_init(struct ssb_mipsco
set_irq(dev, irq++);
break;
}
@@ -334,6 +420,15 @@
static inline
u32 pcicore_read32(struct ssb_pcicore *pc, u16 offset)
@@ -69,7 +74,7 @@ static u32 get_cfgspace_addr(struct ssb_
u32 tmp;
/* We do only have one cardbus device behind the bridge. */
- if (pc->cardbusmode && (dev >= 1))
+ if (pc->cardbusmode && (dev > 1))
goto out;
if (bus == 0) {
@@ -246,20 +251,12 @@ static struct pci_controller ssb_pcicore
.pci_ops = &ssb_pcicore_pciops,
.io_resource = &ssb_pcicore_io_resource,
@@ -767,27 +862,7 @@
#include <pcmcia/cs_types.h>
#include <pcmcia/cs.h>
@@ -140,6 +142,19 @@ static void ssb_device_put(struct ssb_de
put_device(dev->dev);
}
+static inline struct ssb_driver *ssb_driver_get(struct ssb_driver *drv)
+{
+ if (drv)
+ get_driver(&drv->drv);
+ return drv;
+}
+
+static inline void ssb_driver_put(struct ssb_driver *drv)
+{
+ if (drv)
+ put_driver(&drv->drv);
+}
+
static int ssb_device_resume(struct device *dev)
{
struct ssb_device *ssb_dev = dev_to_ssb_dev(dev);
@@ -210,90 +225,81 @@ int ssb_bus_suspend(struct ssb_bus *bus)
@@ -210,90 +212,78 @@ int ssb_bus_suspend(struct ssb_bus *bus)
EXPORT_SYMBOL(ssb_bus_suspend);
#ifdef CONFIG_SSB_SPROM
@@ -842,19 +917,18 @@
- if (!dev->dev ||
- !dev->dev->driver ||
- !device_is_registered(dev->dev))
+ sdrv = ssb_driver_get(drv_to_ssb_drv(sdev->dev->driver));
+ if (!sdrv || SSB_WARN_ON(!sdrv->remove)) {
+ ssb_device_put(sdev);
continue;
- continue;
- drv = drv_to_ssb_drv(dev->dev->driver);
- if (!drv)
- continue;
+ sdrv = drv_to_ssb_drv(sdev->dev->driver);
+ if (SSB_WARN_ON(!sdrv->remove))
continue;
- err = drv->suspend(dev, state);
- if (err) {
- ssb_printk(KERN_ERR PFX "Failed to freeze device %s\n",
- dev_name(dev->dev));
- goto err_unwind;
}
- }
+ sdrv->remove(sdev);
+ ctx->device_frozen[i] = 1;
}
@@ -921,7 +995,6 @@
+ dev_name(sdev->dev));
+ result = err;
}
+ ssb_driver_put(sdrv);
+ ssb_device_put(sdev);
}
@@ -930,7 +1003,7 @@
}
#endif /* CONFIG_SSB_SPROM */
@@ -380,6 +386,35 @@ static int ssb_device_uevent(struct devi
@@ -380,6 +370,35 @@ static int ssb_device_uevent(struct devi
ssb_dev->id.revision);
}
@@ -966,7 +1039,7 @@
static struct bus_type ssb_bustype = {
.name = "ssb",
.match = ssb_bus_match,
@@ -389,6 +424,7 @@ static struct bus_type ssb_bustype = {
@@ -389,6 +408,7 @@ static struct bus_type ssb_bustype = {
.suspend = ssb_device_suspend,
.resume = ssb_device_resume,
.uevent = ssb_device_uevent,
@@ -974,7 +1047,7 @@
};
static void ssb_buses_lock(void)
@@ -481,6 +517,7 @@ static int ssb_devices_register(struct s
@@ -481,6 +501,7 @@ static int ssb_devices_register(struct s
#ifdef CONFIG_SSB_PCIHOST
sdev->irq = bus->host_pci->irq;
dev->parent = &bus->host_pci->dev;
@@ -982,7 +1055,7 @@
#endif
break;
case SSB_BUSTYPE_PCMCIA:
@@ -490,13 +527,13 @@ static int ssb_devices_register(struct s
@@ -490,13 +511,13 @@ static int ssb_devices_register(struct s
#endif
break;
case SSB_BUSTYPE_SDIO:
@@ -998,7 +1071,7 @@
break;
}
@@ -523,7 +560,7 @@ error:
@@ -523,7 +544,7 @@ error:
}
/* Needs ssb_buses_lock() */
@@ -1007,7 +1080,7 @@
{
struct ssb_bus *bus, *n;
int err = 0;
@@ -734,9 +771,9 @@ out:
@@ -734,9 +755,9 @@ out:
return err;
}
@@ -1020,7 +1093,7 @@
{
int err;
@@ -817,8 +854,8 @@ err_disable_xtal:
@@ -817,8 +838,8 @@ err_disable_xtal:
}
#ifdef CONFIG_SSB_PCIHOST
@@ -1031,7 +1104,7 @@
{
int err;
@@ -830,6 +867,9 @@ int ssb_bus_pcibus_register(struct ssb_b
@@ -830,6 +851,9 @@ int ssb_bus_pcibus_register(struct ssb_b
if (!err) {
ssb_printk(KERN_INFO PFX "Sonics Silicon Backplane found on "
"PCI device %s\n", dev_name(&host_pci->dev));
@@ -1041,7 +1114,7 @@
}
return err;
@@ -838,9 +878,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register);
@@ -838,9 +862,9 @@ EXPORT_SYMBOL(ssb_bus_pcibus_register);
#endif /* CONFIG_SSB_PCIHOST */
#ifdef CONFIG_SSB_PCMCIAHOST
@@ -1054,7 +1127,7 @@
{
int err;
@@ -860,8 +900,9 @@ EXPORT_SYMBOL(ssb_bus_pcmciabus_register
@@ -860,8 +884,9 @@ EXPORT_SYMBOL(ssb_bus_pcmciabus_register
#endif /* CONFIG_SSB_PCMCIAHOST */
#ifdef CONFIG_SSB_SDIOHOST
@@ -1066,7 +1139,7 @@
{
int err;
@@ -881,9 +922,9 @@ int ssb_bus_sdiobus_register(struct ssb_
@@ -881,9 +906,9 @@ int ssb_bus_sdiobus_register(struct ssb_
EXPORT_SYMBOL(ssb_bus_sdiobus_register);
#endif /* CONFIG_SSB_PCMCIAHOST */
@@ -1079,7 +1152,7 @@
{
int err;
@@ -964,8 +1005,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32
@@ -964,8 +989,8 @@ u32 ssb_calc_clock_rate(u32 plltype, u32
switch (plltype) {
case SSB_PLLTYPE_6: /* 100/200 or 120/240 only */
if (m & SSB_CHIPCO_CLK_T6_MMASK)
@@ -1090,7 +1163,17 @@
case SSB_PLLTYPE_1: /* 48Mhz base, 3 dividers */
case SSB_PLLTYPE_3: /* 25Mhz, 2 dividers */
case SSB_PLLTYPE_4: /* 48Mhz, 4 dividers */
@@ -1080,23 +1121,22 @@ static u32 ssb_tmslow_reject_bitmask(str
@@ -1055,6 +1080,9 @@ u32 ssb_clockspeed(struct ssb_bus *bus)
u32 plltype;
u32 clkctl_n, clkctl_m;
+ if (bus->chipco.capabilities & SSB_CHIPCO_CAP_PMU)
+ return ssb_pmu_get_controlclock(&bus->chipco);
+
if (ssb_extif_available(&bus->extif))
ssb_extif_get_clockcontrol(&bus->extif, &plltype,
&clkctl_n, &clkctl_m);
@@ -1080,23 +1108,22 @@ static u32 ssb_tmslow_reject_bitmask(str
{
u32 rev = ssb_read32(dev, SSB_IDLOW) & SSB_IDLOW_SSBREV;
@@ -1121,7 +1204,7 @@
}
int ssb_device_is_enabled(struct ssb_device *dev)
@@ -1155,10 +1195,10 @@ void ssb_device_enable(struct ssb_device
@@ -1155,10 +1182,10 @@ void ssb_device_enable(struct ssb_device
}
EXPORT_SYMBOL(ssb_device_enable);
@@ -1135,7 +1218,7 @@
{
int i;
u32 val;
@@ -1166,7 +1206,7 @@ static int ssb_wait_bit(struct ssb_devic
@@ -1166,7 +1193,7 @@ static int ssb_wait_bit(struct ssb_devic
for (i = 0; i < timeout; i++) {
val = ssb_read32(dev, reg);
if (set) {
@@ -1144,7 +1227,7 @@
return 0;
} else {
if (!(val & bitmask))
@@ -1183,20 +1223,38 @@ static int ssb_wait_bit(struct ssb_devic
@@ -1183,20 +1210,38 @@ static int ssb_wait_bit(struct ssb_devic
void ssb_device_disable(struct ssb_device *dev, u32 core_specific_flags)
{
@@ -1192,7 +1275,7 @@
ssb_write32(dev, SSB_TMSLOW,
reject | SSB_TMSLOW_RESET |
@@ -1205,13 +1263,34 @@ void ssb_device_disable(struct ssb_devic
@@ -1205,13 +1250,34 @@ void ssb_device_disable(struct ssb_devic
}
EXPORT_SYMBOL(ssb_device_disable);
@@ -1228,7 +1311,7 @@
default:
__ssb_dma_not_implemented(dev);
}
@@ -1328,20 +1407,20 @@ EXPORT_SYMBOL(ssb_bus_may_powerdown);
@@ -1328,20 +1394,20 @@ EXPORT_SYMBOL(ssb_bus_may_powerdown);
int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl)
{
@@ -1253,7 +1336,7 @@
return 0;
error:
ssb_printk(KERN_ERR PFX "Bus powerup failed\n");
@@ -1349,6 +1428,37 @@ error:
@@ -1349,6 +1415,37 @@ error:
}
EXPORT_SYMBOL(ssb_bus_powerup);
@@ -1319,10 +1402,40 @@
/* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
#define SPEX16(_outvar, _offset, _mask, _shift) \
out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
@@ -405,6 +406,46 @@ static void sprom_extract_r123(struct ss
out->antenna_gain.ghz5.a3 = gain;
}
@@ -330,7 +331,6 @@ static void sprom_extract_r123(struct ss
{
int i;
u16 v;
- s8 gain;
u16 loc[3];
if (out->revision == 3) /* rev 3 moved MAC */
@@ -389,20 +389,52 @@ static void sprom_extract_r123(struct ss
SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
/* Extract the antenna gain values. */
- gain = r123_extract_antgain(out->revision, in,
- SSB_SPROM1_AGAIN_BG,
- SSB_SPROM1_AGAIN_BG_SHIFT);
- out->antenna_gain.ghz24.a0 = gain;
- out->antenna_gain.ghz24.a1 = gain;
- out->antenna_gain.ghz24.a2 = gain;
- out->antenna_gain.ghz24.a3 = gain;
- gain = r123_extract_antgain(out->revision, in,
- SSB_SPROM1_AGAIN_A,
- SSB_SPROM1_AGAIN_A_SHIFT);
- out->antenna_gain.ghz5.a0 = gain;
- out->antenna_gain.ghz5.a1 = gain;
- out->antenna_gain.ghz5.a2 = gain;
- out->antenna_gain.ghz5.a3 = gain;
+ out->antenna_gain.a0 = r123_extract_antgain(out->revision, in,
+ SSB_SPROM1_AGAIN_BG,
+ SSB_SPROM1_AGAIN_BG_SHIFT);
+ out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
+ SSB_SPROM1_AGAIN_A,
+ SSB_SPROM1_AGAIN_A_SHIFT);
+}
+
+/* Revs 4 5 and 8 have partially shared layout */
+static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
+{
@@ -1361,12 +1474,10 @@
+ SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
+ SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
+ SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
+}
+
}
static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
{
int i;
@@ -427,10 +468,14 @@ static void sprom_extract_r45(struct ssb
@@ -427,10 +459,14 @@ static void sprom_extract_r45(struct ssb
SPEX(country_code, SSB_SPROM4_CCODE, 0xFFFF, 0);
SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
@@ -1381,15 +1492,30 @@
}
SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
SSB_SPROM4_ANTAVAIL_A_SHIFT);
@@ -470,13 +515,21 @@ static void sprom_extract_r45(struct ssb
memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
sizeof(out->antenna_gain.ghz5));
@@ -459,16 +495,16 @@ static void sprom_extract_r45(struct ssb
}
+ sprom_extract_r458(out, in);
/* Extract the antenna gain values. */
- SPEX(antenna_gain.ghz24.a0, SSB_SPROM4_AGAIN01,
+ SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01,
SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
- SPEX(antenna_gain.ghz24.a1, SSB_SPROM4_AGAIN01,
+ SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01,
SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
- SPEX(antenna_gain.ghz24.a2, SSB_SPROM4_AGAIN23,
+ SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23,
SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
- SPEX(antenna_gain.ghz24.a3, SSB_SPROM4_AGAIN23,
+ SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23,
SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
- memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
- sizeof(out->antenna_gain.ghz5));
+
+ sprom_extract_r458(out, in);
/* TODO - get remaining rev 4 stuff needed */
}
@@ -476,7 +512,13 @@ static void sprom_extract_r45(struct ssb
static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
{
int i;
@@ -1404,10 +1530,25 @@
/* extract the MAC address */
for (i = 0; i < 3; i++) {
@@ -560,6 +613,63 @@ static void sprom_extract_r8(struct ssb_
memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
sizeof(out->antenna_gain.ghz5));
@@ -549,16 +591,71 @@ static void sprom_extract_r8(struct ssb_
SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
/* Extract the antenna gain values. */
- SPEX(antenna_gain.ghz24.a0, SSB_SPROM8_AGAIN01,
+ SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
- SPEX(antenna_gain.ghz24.a1, SSB_SPROM8_AGAIN01,
+ SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
- SPEX(antenna_gain.ghz24.a2, SSB_SPROM8_AGAIN23,
+ SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
- SPEX(antenna_gain.ghz24.a3, SSB_SPROM8_AGAIN23,
+ SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
- memcpy(&out->antenna_gain.ghz5, &out->antenna_gain.ghz24,
- sizeof(out->antenna_gain.ghz5));
+
+ /* Extract cores power info info */
+ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
+ o = pwr_info_offset[i];
@@ -1464,11 +1605,10 @@
+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
+
+ sprom_extract_r458(out, in);
+
/* TODO - get remaining rev 8 stuff needed */
}
@@ -572,37 +682,34 @@ static int sprom_extract(struct ssb_bus
@@ -572,37 +669,34 @@ static int sprom_extract(struct ssb_bus
ssb_dprintk(KERN_DEBUG PFX "SPROM revision %d detected.\n", out->revision);
memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
memset(out->et1mac, 0xFF, 6);
@@ -1527,7 +1667,7 @@
}
if (out->boardflags_lo == 0xFFFF)
@@ -616,15 +723,14 @@ static int sprom_extract(struct ssb_bus
@@ -616,15 +710,14 @@ static int sprom_extract(struct ssb_bus
static int ssb_pci_sprom_get(struct ssb_bus *bus,
struct ssb_sprom *sprom)
{
@@ -1545,7 +1685,7 @@
/*
* get SPROM offset: SSB_SPROM_BASE1 except for
* chipcommon rev >= 31 or chip ID is 0x4312 and
@@ -644,7 +750,7 @@ static int ssb_pci_sprom_get(struct ssb_
@@ -644,7 +737,7 @@ static int ssb_pci_sprom_get(struct ssb_
buf = kcalloc(SSB_SPROMSIZE_WORDS_R123, sizeof(u16), GFP_KERNEL);
if (!buf)
@@ -1554,7 +1694,7 @@
bus->sprom_size = SSB_SPROMSIZE_WORDS_R123;
sprom_do_read(bus, buf);
err = sprom_check_crc(buf, bus->sprom_size);
@@ -654,17 +760,24 @@ static int ssb_pci_sprom_get(struct ssb_
@@ -654,17 +747,24 @@ static int ssb_pci_sprom_get(struct ssb_
buf = kcalloc(SSB_SPROMSIZE_WORDS_R4, sizeof(u16),
GFP_KERNEL);
if (!buf)
@@ -1584,7 +1724,7 @@
err = 0;
goto out_free;
}
@@ -676,19 +789,15 @@ static int ssb_pci_sprom_get(struct ssb_
@@ -676,19 +776,15 @@ static int ssb_pci_sprom_get(struct ssb_
out_free:
kfree(buf);
@@ -1673,7 +1813,7 @@
*
* Licensed under the GNU/GPL. See COPYING for details.
*/
@@ -617,136 +617,140 @@ static int ssb_pcmcia_sprom_check_crc(co
@@ -617,136 +617,136 @@ static int ssb_pcmcia_sprom_check_crc(co
} \
} while (0)
@@ -1753,14 +1893,10 @@
+ case SSB_PCMCIA_CIS_ANTGAIN:
+ GOTO_ERROR_ON(tuple->TupleDataLen != 2,
+ "antg tpl size");
+ sprom->antenna_gain.ghz24.a0 = tuple->TupleData[1];
+ sprom->antenna_gain.ghz24.a1 = tuple->TupleData[1];
+ sprom->antenna_gain.ghz24.a2 = tuple->TupleData[1];
+ sprom->antenna_gain.ghz24.a3 = tuple->TupleData[1];
+ sprom->antenna_gain.ghz5.a0 = tuple->TupleData[1];
+ sprom->antenna_gain.ghz5.a1 = tuple->TupleData[1];
+ sprom->antenna_gain.ghz5.a2 = tuple->TupleData[1];
+ sprom->antenna_gain.ghz5.a3 = tuple->TupleData[1];
+ sprom->antenna_gain.a0 = tuple->TupleData[1];
+ sprom->antenna_gain.a1 = tuple->TupleData[1];
+ sprom->antenna_gain.a2 = tuple->TupleData[1];
+ sprom->antenna_gain.a3 = tuple->TupleData[1];
+ break;
+ case SSB_PCMCIA_CIS_BFLAGS:
+ GOTO_ERROR_ON((tuple->TupleDataLen != 3) &&
@@ -1961,7 +2097,17 @@
bus->chip_package = 0;
} else {
bus->chip_id = 0x4710;
@@ -354,7 +356,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
@@ -318,6 +320,9 @@ int ssb_bus_scan(struct ssb_bus *bus,
bus->chip_package = 0;
}
}
+ ssb_printk(KERN_INFO PFX "Found chip with id 0x%04X, rev 0x%02X and "
+ "package 0x%02X\n", bus->chip_id, bus->chip_rev,
+ bus->chip_package);
if (!bus->nr_devices)
bus->nr_devices = chipid_to_nrcores(bus->chip_id);
if (bus->nr_devices > ARRAY_SIZE(bus->devices)) {
@@ -354,7 +359,7 @@ int ssb_bus_scan(struct ssb_bus *bus,
dev->bus = bus;
dev->ops = bus->ops;
@@ -1970,7 +2116,7 @@
"Core %d found: %s "
"(cc 0x%03X, rev 0x%02X, vendor 0x%04X)\n",
i, ssb_core_name(dev->id.coreid),
@@ -422,6 +424,16 @@ int ssb_bus_scan(struct ssb_bus *bus,
@@ -422,6 +427,16 @@ int ssb_bus_scan(struct ssb_bus *bus,
bus->pcicore.dev = dev;
#endif /* CONFIG_SSB_DRIVER_PCICORE */
break;
@@ -2151,12 +2297,16 @@
static inline int b43_pci_ssb_bridge_init(void)
{
return 0;
@@ -196,6 +205,6 @@ static inline int b43_pci_ssb_bridge_ini
@@ -196,6 +205,10 @@ static inline int b43_pci_ssb_bridge_ini
static inline void b43_pci_ssb_bridge_exit(void)
{
}
-#endif /* CONFIG_SSB_PCIHOST */
+#endif /* CONFIG_SSB_B43_PCI_BRIDGE */
+
+/* driver_chipcommon_pmu.c */
+extern u32 ssb_pmu_get_cpu_clock(struct ssb_chipcommon *cc);
+extern u32 ssb_pmu_get_controlclock(struct ssb_chipcommon *cc);
#endif /* LINUX_SSB_PRIVATE_H_ */
--- a/include/linux/ssb/ssb.h
@@ -2168,36 +2318,57 @@
+struct ssb_sprom_core_pwr_info {
+ u8 itssi_2g, itssi_5g;
+ u8 maxpwr_2g, maxpwr_5gl, maxpwr_5g, maxpwr_5gh;
+ u16 pa_2g[3], pa_5gl[3], pa_5g[3], pa_5gh[3];
+ u16 pa_2g[4], pa_5gl[4], pa_5g[4], pa_5gh[4];
+};
+
struct ssb_sprom {
u8 revision;
u8 il0mac[6]; /* MAC address for 802.11b/g */
@@ -25,8 +31,10 @@ struct ssb_sprom {
@@ -25,8 +31,13 @@ struct ssb_sprom {
u8 et1phyaddr; /* MII address for enet1 */
u8 et0mdcport; /* MDIO for enet0 */
u8 et1mdcport; /* MDIO for enet1 */
- u8 board_rev; /* Board revision number from SPROM. */
+ u16 board_rev; /* Board revision number from SPROM. */
+ u16 board_num; /* Board number from SPROM. */
+ u16 board_type; /* Board type from SPROM. */
u8 country_code; /* Country Code */
+ u16 leddc_on_time; /* LED Powersave Duty Cycle On Count */
+ u16 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
+ char alpha2[2]; /* Country Code as two chars like EU or US */
+ u8 leddc_on_time; /* LED Powersave Duty Cycle On Count */
+ u8 leddc_off_time; /* LED Powersave Duty Cycle Off Count */
u8 ant_available_a; /* 2GHz antenna available bits (up to 4) */
u8 ant_available_bg; /* 5GHz antenna available bits (up to 4) */
u16 pa0b0;
@@ -55,6 +63,10 @@ struct ssb_sprom {
@@ -45,18 +56,22 @@ struct ssb_sprom {
u8 gpio1; /* GPIO pin 1 */
u8 gpio2; /* GPIO pin 2 */
u8 gpio3; /* GPIO pin 3 */
- u16 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
- u16 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
- u16 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
- u16 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
+ u8 maxpwr_bg; /* 2.4GHz Amplifier Max Power (in dBm Q5.2) */
+ u8 maxpwr_al; /* 5.2GHz Amplifier Max Power (in dBm Q5.2) */
+ u8 maxpwr_a; /* 5.3GHz Amplifier Max Power (in dBm Q5.2) */
+ u8 maxpwr_ah; /* 5.8GHz Amplifier Max Power (in dBm Q5.2) */
u8 itssi_a; /* Idle TSSI Target for A-PHY */
u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
u8 tri2g; /* 2.4GHz TX isolation */
u8 tri5gl; /* 5.2GHz TX isolation */
u8 tri5g; /* 5.3GHz TX isolation */
u8 tri5gh; /* 5.8GHz TX isolation */
- u8 rxpo2g; /* 2GHz RX power offset */
- u8 rxpo5g; /* 5GHz RX power offset */
+ u8 txpid2g[4]; /* 2GHz TX power index */
+ u8 txpid5gl[4]; /* 4.9 - 5.1GHz TX power index */
+ u8 txpid5g[4]; /* 5.1 - 5.5GHz TX power index */
+ u8 txpid5gh[4]; /* 5.5 - ...GHz TX power index */
u8 rxpo2g; /* 2GHz RX power offset */
u8 rxpo5g; /* 5GHz RX power offset */
+ s8 rxpo2g; /* 2GHz RX power offset */
+ s8 rxpo5g; /* 5GHz RX power offset */
u8 rssisav2g; /* 2GHz RSSI params */
@@ -76,6 +88,8 @@ struct ssb_sprom {
u8 rssismc2g;
u8 rssismf2g;
@@ -76,26 +91,104 @@ struct ssb_sprom {
u16 boardflags2_hi; /* Board flags (bits 48-63) */
/* TODO store board flags in a single u64 */
@@ -2206,10 +2377,17 @@
/* Antenna gain values for up to 4 antennas
* on each band. Values in dBm/4 (Q5.2). Negative gain means the
* loss in the connectors is bigger than the gain. */
@@ -88,6 +102,15 @@ struct ssb_sprom {
} ghz5; /* 5GHz band */
struct {
- struct {
- s8 a0, a1, a2, a3;
- } ghz24; /* 2.4GHz band */
- struct {
- s8 a0, a1, a2, a3;
- } ghz5; /* 5GHz band */
+ s8 a0, a1, a2, a3;
} antenna_gain;
- /* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
+ struct {
+ struct {
+ u8 tssipos, extpa_gain, pdet_range, tr_iso, antswlut;
@@ -2219,10 +2397,82 @@
+ } ghz5;
+ } fem;
+
/* TODO - add any parameters needed from rev 2, 3, 4, 5 or 8 SPROMs */
+ u16 mcs2gpo[8];
+ u16 mcs5gpo[8];
+ u16 mcs5glpo[8];
+ u16 mcs5ghpo[8];
+ u8 opo;
+
+ u8 rxgainerr2ga[3];
+ u8 rxgainerr5gla[3];
+ u8 rxgainerr5gma[3];
+ u8 rxgainerr5gha[3];
+ u8 rxgainerr5gua[3];
+
+ u8 noiselvl2ga[3];
+ u8 noiselvl5gla[3];
+ u8 noiselvl5gma[3];
+ u8 noiselvl5gha[3];
+ u8 noiselvl5gua[3];
+
+ u8 regrev;
+ u8 txchain;
+ u8 rxchain;
+ u8 antswitch;
+ u16 cddpo;
+ u16 stbcpo;
+ u16 bw40po;
+ u16 bwduppo;
+
+ u8 tempthresh;
+ u8 tempoffset;
+ u16 rawtempsense;
+ u8 measpower;
+ u8 tempsense_slope;
+ u8 tempcorrx;
+ u8 tempsense_option;
+ u8 freqoffset_corr;
+ u8 iqcal_swp_dis;
+ u8 hw_iqcal_en;
+ u8 elna2g;
+ u8 elna5g;
+ u8 phycal_tempdelta;
+ u8 temps_period;
+ u8 temps_hysteresis;
+ u8 measpower1;
+ u8 measpower2;
+ u8 pcieingress_war;
+
+ /* power per rate from sromrev 9 */
+ u16 cckbw202gpo;
+ u16 cckbw20ul2gpo;
+ u32 legofdmbw202gpo;
+ u32 legofdmbw20ul2gpo;
+ u32 legofdmbw205glpo;
+ u32 legofdmbw20ul5glpo;
+ u32 legofdmbw205gmpo;
+ u32 legofdmbw20ul5gmpo;
+ u32 legofdmbw205ghpo;
+ u32 legofdmbw20ul5ghpo;
+ u32 mcsbw202gpo;
+ u32 mcsbw20ul2gpo;
+ u32 mcsbw402gpo;
+ u32 mcsbw205glpo;
+ u32 mcsbw20ul5glpo;
+ u32 mcsbw405glpo;
+ u32 mcsbw205gmpo;
+ u32 mcsbw20ul5gmpo;
+ u32 mcsbw405gmpo;
+ u32 mcsbw205ghpo;
+ u32 mcsbw20ul5ghpo;
+ u32 mcsbw405ghpo;
+ u16 mcs32po;
+ u16 legofdm40duppo;
+ u8 sar2g;
+ u8 sar5g;
};
@@ -95,7 +118,7 @@ struct ssb_sprom {
/* Information about the PCB the circuitry is soldered on. */
struct ssb_boardinfo {
u16 vendor;
u16 type;
@@ -2231,7 +2481,7 @@
};
@@ -167,7 +190,7 @@ struct ssb_device {
@@ -167,7 +260,7 @@ struct ssb_device {
* is an optimization. */
const struct ssb_bus_ops *ops;
@@ -2240,7 +2490,7 @@
struct ssb_bus *bus;
struct ssb_device_id id;
@@ -225,10 +248,9 @@ struct ssb_driver {
@@ -225,10 +318,9 @@ struct ssb_driver {
#define drv_to_ssb_drv(_drv) container_of(_drv, struct ssb_driver, drv)
extern int __ssb_driver_register(struct ssb_driver *drv, struct module *owner);
@@ -2254,7 +2504,7 @@
extern void ssb_driver_unregister(struct ssb_driver *drv);
@@ -269,7 +291,8 @@ struct ssb_bus {
@@ -269,7 +361,8 @@ struct ssb_bus {
const struct ssb_bus_ops *ops;
@@ -2264,7 +2514,7 @@
struct ssb_device *mapped_device;
union {
/* Currently mapped PCMCIA segment. (bustype == SSB_BUSTYPE_PCMCIA only) */
@@ -281,14 +304,17 @@ struct ssb_bus {
@@ -281,14 +374,17 @@ struct ssb_bus {
* On PCMCIA-host busses this is used to protect the whole MMIO access. */
spinlock_t bar_lock;
@@ -2289,7 +2539,7 @@
/* See enum ssb_quirks */
unsigned int quirks;
@@ -300,7 +326,7 @@ struct ssb_bus {
@@ -300,7 +396,7 @@ struct ssb_bus {
/* ID information about the Chip. */
u16 chip_id;
@@ -2298,7 +2548,7 @@
u16 sprom_offset;
u16 sprom_size; /* number of words in sprom */
u8 chip_package;
@@ -396,7 +422,9 @@ extern bool ssb_is_sprom_available(struc
@@ -396,7 +492,9 @@ extern bool ssb_is_sprom_available(struc
/* Set a fallback SPROM.
* See kdoc at the function definition for complete documentation. */
@@ -2309,7 +2559,7 @@
/* Suspend a SSB bus.
* Call this from the parent bus suspend routine. */
@@ -667,6 +695,7 @@ extern int ssb_bus_may_powerdown(struct
@@ -667,6 +765,7 @@ extern int ssb_bus_may_powerdown(struct
* Otherwise static always-on powercontrol will be used. */
extern int ssb_bus_powerup(struct ssb_bus *bus, bool dynamic_pctl);
@@ -2930,3 +3180,32 @@
*
* Licensed under the GNU/GPL. See COPYING for details.
*
@@ -551,14 +551,10 @@ int ssb_sdio_get_invariants(struct ssb_b
case SSB_SDIO_CIS_ANTGAIN:
GOTO_ERROR_ON(tuple->size != 2,
"antg tpl size");
- sprom->antenna_gain.ghz24.a0 = tuple->data[1];
- sprom->antenna_gain.ghz24.a1 = tuple->data[1];
- sprom->antenna_gain.ghz24.a2 = tuple->data[1];
- sprom->antenna_gain.ghz24.a3 = tuple->data[1];
- sprom->antenna_gain.ghz5.a0 = tuple->data[1];
- sprom->antenna_gain.ghz5.a1 = tuple->data[1];
- sprom->antenna_gain.ghz5.a2 = tuple->data[1];
- sprom->antenna_gain.ghz5.a3 = tuple->data[1];
+ sprom->antenna_gain.a0 = tuple->data[1];
+ sprom->antenna_gain.a1 = tuple->data[1];
+ sprom->antenna_gain.a2 = tuple->data[1];
+ sprom->antenna_gain.a3 = tuple->data[1];
break;
case SSB_SDIO_CIS_BFLAGS:
GOTO_ERROR_ON((tuple->size != 3) &&
--- a/include/linux/ssb/ssb_driver_gige.h
+++ b/include/linux/ssb/ssb_driver_gige.h
@@ -2,6 +2,7 @@
#define LINUX_SSB_DRIVER_GIGE_H_
#include <linux/ssb/ssb.h>
+#include <linux/bug.h>
#include <linux/pci.h>
#include <linux/spinlock.h>