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[ar7] use the righ value in the DSP clock calculation

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git-svn-id: svn://svn.openwrt.org/openwrt/trunk@11123 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2008-05-12 11:56:21 +00:00
parent 10874bfa96
commit 4f91cc821b
1 changed files with 1 additions and 1 deletions
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2
target/linux/ar7/files/arch/mips/ar7/clock.c
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@ -437,7 +437,7 @@ static void __init tnetd7200_init_clocks(void)
printk(KERN_INFO "Clocks: Sync 1:1 mode\n");
printk(KERN_INFO "Clocks: Setting DSP clock\n");
calculate(dsp_base, TNETD7200_DEF_CPU_CLK, &dsp_prediv,
calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv,
&dsp_postdiv, &dsp_mul);
ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul)
/ dsp_postdiv;