bump ifxmips to .30

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@17817 3c298f89-4303-0410-b956-a3cf2f4a3e73

target/linux/ifxmips/files/arch/mips/ifxmips/board.c

@@ -34,6 +34,7 @@
 #include <asm/bootinfo.h>
 #include <asm/irq.h>
 #include <asm/ifxmips/ifxmips.h>
+#include <asm/ifxmips/ifxmips_irq.h>
 
 #define MAX_BOARD_NAME_LEN		32
 #define MAX_IFXMIPS_DEVS		9
@@ -132,6 +133,7 @@ static struct gpio_led arv4519_gpio_leds[] = {
 	{ .name = "ifx:green:internet", .gpio = 5, .active_low = 1, },
 	{ .name = "ifx:red:internet", .gpio = 8, .active_low = 1, },
 	{ .name = "ifx:green:wlan", .gpio = 6, .active_low = 1, },
+	{ .name = "ifx:green:usbpwr", .gpio = 14, .active_low = 1, },
 	{ .name = "ifx:green:usb", .gpio = 19, .active_low = 1, },
 };
 
@@ -146,18 +148,41 @@ static struct platform_device ifxmips_gpio_leds = {
 };
 #endif
 
+static struct resource dwc_usb_res[] = {
+	{
+		.name = "dwc_usb_membase",
+		.flags = IORESOURCE_MEM,
+		.start = 0x1E101000,
+		.end = 0x1E101FFF
+	},
+	{
+		.name = "dwc_usb_irq",
+		.flags = IORESOURCE_IRQ,
+		.start = IFXMIPS_USB_INT,
+	}
+};
+
+static struct platform_device dwc_usb =
+{
+	.id = 0,
+	.name = "dwc_usb",
+	.resource = dwc_usb_res,
+	.num_resources = ARRAY_SIZE(dwc_usb_res),
+};
+
 struct platform_device *easy50712_devs[] = {
 	&ifxmips_led, &ifxmips_gpio, &ifxmips_mii,
-	&ifxmips_mtd, &ifxmips_wdt, &ifxmips_gpio_dev
+	&ifxmips_mtd, &ifxmips_wdt, &ifxmips_gpio_dev, &dwc_usb
 };
 
 struct platform_device *easy4010_devs[] = {
 	&ifxmips_led, &ifxmips_gpio, &ifxmips_mii,
-	&ifxmips_mtd, &ifxmips_wdt, &ifxmips_gpio_dev
+	&ifxmips_mtd, &ifxmips_wdt, &ifxmips_gpio_dev, &dwc_usb
 };
 
 struct platform_device *arv5419_devs[] = {
-	&ifxmips_gpio, &ifxmips_mii, &ifxmips_mtd, &ifxmips_wdt,
+	&ifxmips_gpio, &ifxmips_mii, &ifxmips_mtd,
+	&ifxmips_gpio_dev, &ifxmips_wdt, &dwc_usb,
 #ifdef CONFIG_LEDS_GPIO
 	&ifxmips_gpio_leds,
 #endif

target/linux/ifxmips/files/arch/mips/ifxmips/clock.c

@@ -30,40 +30,7 @@
 #include <asm/div64.h>
 #include <linux/errno.h>
 #include <asm/ifxmips/ifxmips.h>
-
-#define BASIC_INPUT_CLOCK_FREQUENCY_1   35328000
-#define BASIC_INPUT_CLOCK_FREQUENCY_2   36000000
-
-#define BASIS_INPUT_CRYSTAL_USB         12000000
-
-#define GET_BITS(x, msb, lsb)           (((x) & ((1 << ((msb) + 1)) - 1)) >> (lsb))
-
-
-#define CGU_PLL0_PHASE_DIVIDER_ENABLE   (ifxmips_r32(IFXMIPS_CGU_PLL0_CFG) & (1 << 31))
-#define CGU_PLL0_BYPASS                 (ifxmips_r32(IFXMIPS_CGU_PLL0_CFG) & (1 << 30))
-#define CGU_PLL0_CFG_DSMSEL             (ifxmips_r32(IFXMIPS_CGU_PLL0_CFG) & (1 << 28))
-#define CGU_PLL0_CFG_FRAC_EN            (ifxmips_r32(IFXMIPS_CGU_PLL0_CFG) & (1 << 27))
-#define CGU_PLL1_SRC                    (ifxmips_r32(IFXMIPS_CGU_PLL1_CFG) & (1 << 31))
-#define CGU_PLL1_BYPASS                 (ifxmips_r32(IFXMIPS_CGU_PLL1_CFG) & (1 << 30))
-#define CGU_PLL1_CFG_DSMSEL             (ifxmips_r32(IFXMIPS_CGU_PLL1_CFG) & (1 << 28))
-#define CGU_PLL1_CFG_FRAC_EN            (ifxmips_r32(IFXMIPS_CGU_PLL1_CFG) & (1 << 27))
-#define CGU_PLL2_PHASE_DIVIDER_ENABLE   (ifxmips_r32(IFXMIPS_CGU_PLL2_CFG) & (1 << 20))
-#define CGU_PLL2_BYPASS                 (ifxmips_r32(IFXMIPS_CGU_PLL2_CFG) & (1 << 19))
-#define CGU_SYS_FPI_SEL                 (1 << 6)
-#define CGU_SYS_DDR_SEL                 0x3
-#define CGU_PLL0_SRC                    (1 << 29)
-
-#define CGU_PLL0_CFG_PLLK               GET_BITS(*IFXMIPS_CGU_PLL0_CFG, 26, 17)
-#define CGU_PLL0_CFG_PLLN               GET_BITS(*IFXMIPS_CGU_PLL0_CFG, 12, 6)
-#define CGU_PLL0_CFG_PLLM               GET_BITS(*IFXMIPS_CGU_PLL0_CFG, 5, 2)
-#define CGU_PLL1_CFG_PLLK               GET_BITS(*IFXMIPS_CGU_PLL1_CFG, 26, 17)
-#define CGU_PLL1_CFG_PLLN               GET_BITS(*IFXMIPS_CGU_PLL1_CFG, 12, 6)
-#define CGU_PLL1_CFG_PLLM               GET_BITS(*IFXMIPS_CGU_PLL1_CFG, 5, 2)
-#define CGU_PLL2_SRC                    GET_BITS(*IFXMIPS_CGU_PLL2_CFG, 18, 17)
-#define CGU_PLL2_CFG_INPUT_DIV          GET_BITS(*IFXMIPS_CGU_PLL2_CFG, 16, 13)
-#define CGU_PLL2_CFG_PLLN               GET_BITS(*IFXMIPS_CGU_PLL2_CFG, 12, 6)
-#define CGU_PLL2_CFG_PLLM               GET_BITS(*IFXMIPS_CGU_PLL2_CFG, 5, 2)
-#define CGU_IF_CLK_PCI_CLK              GET_BITS(*IFXMIPS_CGU_IF_CLK, 23, 20)
+#include <asm/mach-ifxmips/cgu.h>
 
 static unsigned int cgu_get_pll0_fdiv(void);
 unsigned int ifxmips_clocks[] = {CLOCK_167M, CLOCK_133M, CLOCK_111M, CLOCK_83M };
@@ -185,14 +152,6 @@ unsigned int cgu_get_io_region_clock(void)
 	}
 }
 
-unsigned int cgu_get_fpi_bus_clock(int fpi)
-{
-	unsigned int ret = cgu_get_io_region_clock();
-	if ((fpi == 2) && (ifxmips_r32(IFXMIPS_CGU_SYS) & CGU_SYS_FPI_SEL))
-		ret >>= 1;
-	return ret;
-}
-
 void cgu_setup_pci_clk(int external_clock)
 {
 	/* set clock to 33Mhz */
@@ -200,7 +159,7 @@ void cgu_setup_pci_clk(int external_clock)
 		IFXMIPS_CGU_IFCCR);
 	ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) | 0x800000,
 		IFXMIPS_CGU_IFCCR);
-	if (external_clock) 	{
+	if (external_clock) {
 		ifxmips_w32(ifxmips_r32(IFXMIPS_CGU_IFCCR) & ~(1 << 16),
 			IFXMIPS_CGU_IFCCR);
 		ifxmips_w32((1 << 30), IFXMIPS_CGU_PCICR);
@@ -211,6 +170,15 @@ void cgu_setup_pci_clk(int external_clock)
 	}
 }
 
+unsigned int cgu_get_fpi_bus_clock(int fpi)
+{
+	unsigned int ret = cgu_get_io_region_clock();
+	if ((fpi == 2) && (ifxmips_r32(IFXMIPS_CGU_SYS) & CGU_SYS_FPI_SEL))
+		ret >>= 1;
+	return ret;
+}
+EXPORT_SYMBOL(cgu_get_fpi_bus_clock);
+
 unsigned int ifxmips_get_cpu_hz(void)
 {
 	unsigned int ddr_clock = DDR_HZ;

target/linux/ifxmips/files/arch/mips/ifxmips/setup.c

@@ -30,7 +30,7 @@
 #include <asm/ifxmips/ifxmips.h>
 #include <asm/ifxmips/ifxmips_irq.h>
 #include <asm/ifxmips/ifxmips_pmu.h>
-#include <asm/ifxmips/ifxmips_cgu.h>
+#include <asm/mach-ifxmips/cgu.h>
 #include <asm/ifxmips/ifxmips_prom.h>
 
 static unsigned int r4k_offset;

target/linux/ifxmips/files/arch/mips/ifxmips/timer.c

@@ -15,7 +15,7 @@
 
 #include <asm/ifxmips/ifxmips.h>
 #include <asm/ifxmips/ifxmips_irq.h>
-#include <asm/ifxmips/ifxmips_cgu.h>
+#include <asm/mach-ifxmips/cgu.h>
 #include <asm/ifxmips/ifxmips_gptu.h>
 #include <asm/ifxmips/ifxmips_pmu.h>
 

target/linux/ifxmips/files/arch/mips/include/asm/ifxmips/ifxmips_irq.h

@@ -63,6 +63,8 @@
 #define IFXMIPS_DMA_CH18_INT		(INT_NUM_IM2_IRL0 + 16)
 #define IFXMIPS_DMA_CH19_INT		(INT_NUM_IM2_IRL0 + 21)
 
+#define IFXMIPS_PPE_MBOX_INT		(INT_NUM_IM2_IRL0 + 24)
+
 #define IFXMIPS_USB_INT			(INT_NUM_IM4_IRL0 + 22)
 #define IFXMIPS_USB_OC_INT		(INT_NUM_IM4_IRL0 + 23)
 

target/linux/ifxmips/files/arch/mips/include/asm/ifxmips/ifxmips_pmu.h

@@ -18,8 +18,10 @@
 #ifndef _IFXMIPS_PMU_H__
 #define _IFXMIPS_PMU_H__
 
-#define IFXMIPS_PMU_PWDCR_DMA		0x20
-#define IFXMIPS_PMU_PWDCR_LED		0x800
+
+#define IFXMIPS_PMU_PWDCR_DMA		0x0020
+#define IFXMIPS_PMU_PWDCR_USB		0x8041
+#define IFXMIPS_PMU_PWDCR_LED		0x0800
 #define IFXMIPS_PMU_PWDCR_GPT		0x1000
 #define IFXMIPS_PMU_PWDCR_PPE		0x2000
 #define IFXMIPS_PMU_PWDCR_FPI		0x4000

target/linux/ifxmips/files/arch/mips/include/asm/mach-ifxmips/cgu.h

@@ -0,0 +1,64 @@
+/*
+ *   This program is free software; you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ *   GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program; if not, write to the Free Software
+ *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
+ *
+ *   Copyright (C) 2007 John Crispin <blogic@openwrt.org> 
+ */
+
+#ifndef _IFXMIPS_CGU_H__
+#define _IFXMIPS_CGU_H__
+
+#define BASIC_INPUT_CLOCK_FREQUENCY_1   35328000
+#define BASIC_INPUT_CLOCK_FREQUENCY_2   36000000
+
+#define BASIS_INPUT_CRYSTAL_USB         12000000
+
+#define GET_BITS(x, msb, lsb)           (((x) & ((1 << ((msb) + 1)) - 1)) >> (lsb))
+
+#define CGU_PLL0_PHASE_DIVIDER_ENABLE   (ifxmips_r32(IFXMIPS_CGU_PLL0_CFG) & (1 << 31))
+#define CGU_PLL0_BYPASS                 (ifxmips_r32(IFXMIPS_CGU_PLL0_CFG) & (1 << 30))
+#define CGU_PLL0_CFG_DSMSEL             (ifxmips_r32(IFXMIPS_CGU_PLL0_CFG) & (1 << 28))
+#define CGU_PLL0_CFG_FRAC_EN            (ifxmips_r32(IFXMIPS_CGU_PLL0_CFG) & (1 << 27))
+#define CGU_PLL1_SRC                    (ifxmips_r32(IFXMIPS_CGU_PLL1_CFG) & (1 << 31))
+#define CGU_PLL1_BYPASS                 (ifxmips_r32(IFXMIPS_CGU_PLL1_CFG) & (1 << 30))
+#define CGU_PLL1_CFG_DSMSEL             (ifxmips_r32(IFXMIPS_CGU_PLL1_CFG) & (1 << 28))
+#define CGU_PLL1_CFG_FRAC_EN            (ifxmips_r32(IFXMIPS_CGU_PLL1_CFG) & (1 << 27))
+#define CGU_PLL2_PHASE_DIVIDER_ENABLE   (ifxmips_r32(IFXMIPS_CGU_PLL2_CFG) & (1 << 20))
+#define CGU_PLL2_BYPASS                 (ifxmips_r32(IFXMIPS_CGU_PLL2_CFG) & (1 << 19))
+#define CGU_SYS_FPI_SEL                 (1 << 6)
+#define CGU_SYS_DDR_SEL                 0x3
+#define CGU_PLL0_SRC                    (1 << 29)
+
+#define CGU_PLL0_CFG_PLLK               GET_BITS(*IFXMIPS_CGU_PLL0_CFG, 26, 17)
+#define CGU_PLL0_CFG_PLLN               GET_BITS(*IFXMIPS_CGU_PLL0_CFG, 12, 6)
+#define CGU_PLL0_CFG_PLLM               GET_BITS(*IFXMIPS_CGU_PLL0_CFG, 5, 2)
+#define CGU_PLL1_CFG_PLLK               GET_BITS(*IFXMIPS_CGU_PLL1_CFG, 26, 17)
+#define CGU_PLL1_CFG_PLLN               GET_BITS(*IFXMIPS_CGU_PLL1_CFG, 12, 6)
+#define CGU_PLL1_CFG_PLLM               GET_BITS(*IFXMIPS_CGU_PLL1_CFG, 5, 2)
+#define CGU_PLL2_SRC                    GET_BITS(*IFXMIPS_CGU_PLL2_CFG, 18, 17)
+#define CGU_PLL2_CFG_INPUT_DIV          GET_BITS(*IFXMIPS_CGU_PLL2_CFG, 16, 13)
+#define CGU_PLL2_CFG_PLLN               GET_BITS(*IFXMIPS_CGU_PLL2_CFG, 12, 6)
+#define CGU_PLL2_CFG_PLLM               GET_BITS(*IFXMIPS_CGU_PLL2_CFG, 5, 2)
+#define CGU_IF_CLK_PCI_CLK              GET_BITS(*IFXMIPS_CGU_IF_CLK, 23, 20)
+
+
+unsigned int cgu_get_mips_clock(int cpu);
+unsigned int cgu_get_io_region_clock(void);
+unsigned int cgu_get_fpi_bus_clock(int fpi);
+void cgu_setup_pci_clk(int internal_clock);
+unsigned int ifxmips_get_ddr_hz(void);
+unsigned int ifxmips_get_fpi_hz(void);
+unsigned int ifxmips_get_cpu_hz(void);
+
+#endif

target/linux/ifxmips/files/arch/mips/include/asm/mach-ifxmips/gpio.h

@@ -99,7 +99,7 @@ static inline void gpio_set_value_cansleep(unsigned gpio, int value)
 
 static inline int gpio_is_valid(int number)
 {
-	return ((unsigned)number) < 8;
+	return ((unsigned)number) < 16;
 }
 
 #endif

target/linux/ifxmips/files/arch/mips/pci/pci-ifxmips.c

@@ -6,7 +6,7 @@
 #include <linux/mm.h>
 #include <asm/ifxmips/ifxmips.h>
 #include <asm/ifxmips/ifxmips_irq.h>
-#include <asm/ifxmips/ifxmips_cgu.h>
+#include <asm/mach-ifxmips/cgu.h>
 #include <asm/addrspace.h>
 #include <linux/vmalloc.h>
 

target/linux/ifxmips/files/drivers/mtd/maps/ifxmips.c

@@ -134,8 +134,8 @@ int find_uImage_size(unsigned long start_offset)
 	unsigned long magic;
 	unsigned long temp;
 	ifxmips_copy_from(&ifxmips_map, &magic, start_offset, 4);
-	if (!(ntohl(magic) == 0x27051956)) {
-		printk(KERN_INFO "ifxmips_mtd: invalid magic (0x%08X) of kernel at 0x%08lx \n", ntohl(magic), start_offset);
+	if (le32_to_cpu(magic) != 0x56190527) {
+		printk(KERN_INFO "ifxmips_mtd: invalid magic (0x%08X) of kernel at 0x%08lx \n", le32_to_cpu(magic), start_offset);
 		return 0;
 	}
 	ifxmips_copy_from(&ifxmips_map, &temp, start_offset + 12, 4);
@@ -159,7 +159,7 @@ int detect_squashfs_partition(unsigned long start_offset)
 {
 	unsigned long temp;
 	ifxmips_copy_from(&ifxmips_map, &temp, start_offset, 4);
-	return temp == SQUASHFS_MAGIC;
+	return le32_to_cpu(temp) == SQUASHFS_MAGIC;
 }
 
 static int ifxmips_mtd_probe(struct platform_device *dev)

target/linux/ifxmips/files/drivers/net/ifxmips_mii0.c

@@ -79,7 +79,7 @@ EXPORT_SYMBOL(ifxmips_read_mdio);
 
 int ifxmips_ifxmips_mii_open(struct net_device *dev)
 {
-	struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
+	struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
 	struct dma_device_info *dma_dev = priv->dma_device;
 	int i;
 
@@ -93,7 +93,7 @@ int ifxmips_ifxmips_mii_open(struct net_device *dev)
 
 int ifxmips_mii_release(struct net_device *dev)
 {
-	struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
+	struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
 	struct dma_device_info *dma_dev = priv->dma_device;
 	int i;
 
@@ -105,7 +105,7 @@ int ifxmips_mii_release(struct net_device *dev)
 
 int ifxmips_mii_hw_receive(struct net_device *dev, struct dma_device_info *dma_dev)
 {
-	struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
+	struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
 	unsigned char *buf = NULL;
 	struct sk_buff *skb = NULL;
 	int len = 0;
@@ -154,7 +154,7 @@ ifxmips_mii_hw_receive_err_exit:
 int ifxmips_mii_hw_tx(char *buf, int len, struct net_device *dev)
 {
 	int ret = 0;
-	struct ifxmips_mii_priv *priv = dev->priv;
+	struct ifxmips_mii_priv *priv = netdev_priv(dev);
 	struct dma_device_info *dma_dev = priv->dma_device;
 	ret = dma_device_write(dma_dev, buf, len, priv->skb);
 	return ret;
@@ -164,7 +164,7 @@ int ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
 {
 	int len;
 	char *data;
-	struct ifxmips_mii_priv *priv = dev->priv;
+	struct ifxmips_mii_priv *priv = netdev_priv(dev);
 	struct dma_device_info *dma_dev = priv->dma_device;
 
 	len = skb->len < ETH_ZLEN ? ETH_ZLEN : skb->len;
@@ -192,7 +192,7 @@ int ifxmips_mii_tx(struct sk_buff *skb, struct net_device *dev)
 void ifxmips_mii_tx_timeout(struct net_device *dev)
 {
 	int i;
-	struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)dev->priv;
+	struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
 
 	priv->stats.tx_errors++;
 	for (i = 0; i < priv->dma_device->max_tx_chan_num; i++)
@@ -261,14 +261,13 @@ void ifxmips_etop_dma_buffer_free(unsigned char *dataptr, void *opt)
 
 static struct net_device_stats *ifxmips_get_stats(struct net_device *dev)
 {
-	return (struct net_device_stats *)dev->priv;
+	return &((struct ifxmips_mii_priv *)netdev_priv(dev))->stats;
 }
 
 static int ifxmips_mii_dev_init(struct net_device *dev)
 {
 	int i;
-	struct ifxmips_mii_priv *priv;
-
+	struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(dev);
 	ether_setup(dev);
 	printk(KERN_INFO "ifxmips_mii0: %s is up\n", dev->name);
 	dev->open = ifxmips_ifxmips_mii_open;
@@ -277,8 +276,7 @@ static int ifxmips_mii_dev_init(struct net_device *dev)
 	dev->get_stats = ifxmips_get_stats;
 	dev->tx_timeout = ifxmips_mii_tx_timeout;
 	dev->watchdog_timeo = 10 * HZ;
-	memset(dev->priv, 0, sizeof(struct ifxmips_mii_priv));
-	priv = dev->priv;
+	memset(priv, 0, sizeof(struct ifxmips_mii_priv));
 	priv->dma_device = dma_device_reserve("PPE");
 	if (!priv->dma_device) {
 		BUG();
@@ -347,14 +345,13 @@ out:
 
 static int ifxmips_mii_remove(struct platform_device *dev)
 {
-	struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)ifxmips_mii0_dev->priv;
+	struct ifxmips_mii_priv *priv = (struct ifxmips_mii_priv *)netdev_priv(ifxmips_mii0_dev);
 
 	printk(KERN_INFO "ifxmips_mii0: ifxmips_mii0 cleanup\n");
 
 	dma_device_unregister(priv->dma_device);
 	dma_device_release(priv->dma_device);
 	kfree(priv->dma_device);
-	kfree(ifxmips_mii0_dev->priv);
 	unregister_netdev(ifxmips_mii0_dev);
 	return 0;
 }

target/linux/ifxmips/files/drivers/watchdog/ifxmips_wdt.c

@@ -25,7 +25,7 @@
 #include <linux/platform_device.h>
 #include <linux/uaccess.h>
 
-#include <asm/ifxmips/ifxmips_cgu.h>
+#include <asm/mach-ifxmips/cgu.h>
 #include <asm/ifxmips/ifxmips.h>
 
 #define IFXMIPS_WDT_PW1			0x00BE0000

target/linux/ifxmips/files/include/asm-mips/ifxmips/ifxmips_cgu.h

@@ -1,29 +0,0 @@
-/*
- *   This program is free software; you can redistribute it and/or modify
- *   it under the terms of the GNU General Public License as published by
- *   the Free Software Foundation; either version 2 of the License, or
- *   (at your option) any later version.
- *
- *   This program is distributed in the hope that it will be useful,
- *   but WITHOUT ANY WARRANTY; without even the implied warranty of
- *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *   GNU General Public License for more details.
- *
- *   You should have received a copy of the GNU General Public License
- *   along with this program; if not, write to the Free Software
- *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA.
- *
- *   Copyright (C) 2007 John Crispin <blogic@openwrt.org> 
- */
-#ifndef _IFXMIPS_CGU_H__
-#define _IFXMIPS_CGU_H__
-
-unsigned int cgu_get_mips_clock(int cpu);
-unsigned int cgu_get_io_region_clock(void);
-unsigned int cgu_get_fpi_bus_clock(int fpi);
-void cgu_setup_pci_clk(int internal_clock);
-unsigned int ifxmips_get_ddr_hz(void);
-unsigned int ifxmips_get_fpi_hz(void);
-unsigned int ifxmips_get_cpu_hz(void);
-
-#endif