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mirror of git://projects.qi-hardware.com/openwrt-xburst.git synced 2024-12-24 18:34:37 +02:00

ar71xx: use a dummy callback for interfaces with fixed speed

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@30913 3c298f89-4303-0410-b956-a3cf2f4a3e73
This commit is contained in:
juhosg 2012-03-12 20:38:58 +00:00
parent 710f4ecdd1
commit 510f76eab5

View File

@ -273,16 +273,6 @@ static void ath79_set_speed_ge1(int speed)
ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed);
}
static void ar724x_set_speed_ge0(int speed)
{
/* TODO */
}
static void ar724x_set_speed_ge1(int speed)
{
/* TODO */
}
static void ar7242_set_speed_ge0(int speed)
{
u32 val = ath79_get_eth_pll(0, speed);
@ -311,24 +301,13 @@ static void ar91xx_set_speed_ge1(int speed)
ath79_mii_ctrl_set_speed(AR71XX_MII_REG_MII1_CTRL, speed);
}
static void ar933x_set_speed_ge0(int speed)
{
/* TODO */
}
static void ar933x_set_speed_ge1(int speed)
{
/* TODO */
}
static void ar934x_set_speed_ge0(int speed)
{
/* TODO */
}
static void ar934x_set_speed_ge1(int speed)
static void ath79_set_speed_dummy(int speed)
{
/* TODO */
}
static void ath79_ddr_no_flush(void)
@ -703,7 +682,7 @@ void __init ath79_register_eth(unsigned int id)
pdata->reset_bit |= AR724X_RESET_GE1_MDIO |
AR71XX_RESET_GE1_PHY;
pdata->ddr_flush = ar724x_ddr_flush_ge1;
pdata->set_speed = ar724x_set_speed_ge1;
pdata->set_speed = ath79_set_speed_dummy;
}
pdata->has_gbit = 1;
pdata->is_ar724x = 1;
@ -726,13 +705,13 @@ void __init ath79_register_eth(unsigned int id)
if (id == 0) {
pdata->reset_bit |= AR71XX_RESET_GE0_PHY;
pdata->ddr_flush = ar724x_ddr_flush_ge0;
pdata->set_speed = ar724x_set_speed_ge0;
pdata->set_speed = ath79_set_speed_dummy;
pdata->phy_mask = BIT(4);
} else {
pdata->reset_bit |= AR71XX_RESET_GE1_PHY;
pdata->ddr_flush = ar724x_ddr_flush_ge1;
pdata->set_speed = ar724x_set_speed_ge1;
pdata->set_speed = ath79_set_speed_dummy;
pdata->speed = SPEED_1000;
pdata->duplex = DUPLEX_FULL;
@ -780,14 +759,14 @@ void __init ath79_register_eth(unsigned int id)
pdata->reset_bit = AR933X_RESET_GE0_MAC |
AR933X_RESET_GE0_MDIO;
pdata->ddr_flush = ar933x_ddr_flush_ge0;
pdata->set_speed = ar933x_set_speed_ge0;
pdata->set_speed = ath79_set_speed_dummy;
pdata->phy_mask = BIT(4);
} else {
pdata->reset_bit = AR933X_RESET_GE1_MAC |
AR933X_RESET_GE1_MDIO;
pdata->ddr_flush = ar933x_ddr_flush_ge1;
pdata->set_speed = ar933x_set_speed_ge1;
pdata->set_speed = ath79_set_speed_dummy;
pdata->speed = SPEED_1000;
pdata->duplex = DUPLEX_FULL;
@ -815,7 +794,7 @@ void __init ath79_register_eth(unsigned int id)
} else {
pdata->reset_bit = AR934X_RESET_GE1_MAC |
AR934X_RESET_GE1_MDIO;
pdata->set_speed = ar934x_set_speed_ge1;
pdata->set_speed = ath79_set_speed_dummy;
pdata->switch_data = &ath79_switch_data;
}