sync ssb with upstream

git-svn-id: svn://svn.openwrt.org/openwrt/trunk@9302 3c298f89-4303-0410-b956-a3cf2f4a3e73
2025-04-21 12:27:27 +03:00 · 2007-10-14 02:47:36 +00:00
parent d124ab28a8
commit 532249b507
37 changed files with 926 additions and 4665 deletions
--- a/target/linux/generic-2.6/patches-2.6.23/300-ssb_integrate.patch
+++ b/target/linux/generic-2.6/patches-2.6.23/300-ssb_integrate.patch
@@ -1,78 +0,0 @@
-Index: linux-2.6.23-rc6/drivers/usb/host/Kconfig
-===================================================================
--- linux-2.6.23-rc6.orig/drivers/usb/host/Kconfig	2007-09-21 16:23:52.000000000 +0800
-+++ linux-2.6.23-rc6/drivers/usb/host/Kconfig	2007-09-21 16:24:07.000000000 +0800
-@@ -154,6 +154,19 @@
- 	  Enables support for PCI-bus plug-in USB controller cards.
- 	  If unsure, say Y.
- 
-+config USB_OHCI_HCD_SSB
-+	bool "OHCI support for the Broadcom SSB OHCI core (embedded systems only)"
-+	depends on USB_OHCI_HCD && ((USB_OHCI_HCD=m && SSB) || (USB_OHCI_HCD=y && SSB=y)) && EXPERIMENTAL
-+	default n
-+	---help---
-+	  Support for the Sonics Silicon Backplane (SSB) attached
-+	  Broadcom USB OHCI core.
-+
-+	  This device is only present in some embedded devices with
-+	  Broadcom based SSB bus.
-+
-+	  If unsure, say N.
-+
- config USB_OHCI_BIG_ENDIAN_DESC
- 	bool
- 	depends on USB_OHCI_HCD
-Index: linux-2.6.23-rc6/drivers/usb/host/ohci-hcd.c
-===================================================================
--- linux-2.6.23-rc6.orig/drivers/usb/host/ohci-hcd.c	2007-09-21 16:23:52.000000000 +0800
-+++ linux-2.6.23-rc6/drivers/usb/host/ohci-hcd.c	2007-09-21 16:24:07.000000000 +0800
-@@ -926,11 +926,17 @@
- #define PS3_SYSTEM_BUS_DRIVER	ps3_ohci_driver
- #endif
- 
-+#ifdef CONFIG_USB_OHCI_HCD_SSB
-+#include "ohci-ssb.c"
-+#define SSB_OHCI_DRIVER		ssb_ohci_driver
-+#endif
-+
- #if	!defined(PCI_DRIVER) &&		\
- 	!defined(PLATFORM_DRIVER) &&	\
- 	!defined(OF_PLATFORM_DRIVER) &&	\
- 	!defined(SA1111_DRIVER) &&	\
-	!defined(PS3_SYSTEM_BUS_DRIVER)
-+	!defined(PS3_SYSTEM_BUS_DRIVER) && \
-+	!defined(SSB_OHCI_DRIVER)
- #error "missing bus glue for ohci-hcd"
- #endif
- 
-@@ -975,10 +981,20 @@
- 		goto error_pci;
- #endif
- 
-+#ifdef SSB_OHCI_DRIVER
-+	retval = ssb_driver_register(&SSB_OHCI_DRIVER);
-+	if (retval)
-+		goto error_ssb;
-+#endif
-+
- 	return retval;
- 
- 	/* Error path */
-+#ifdef SSB_OHCI_DRIVER
-+ error_ssb:
-+#endif
- #ifdef PCI_DRIVER
-+	pci_unregister_driver(&PCI_DRIVER);
-  error_pci:
- #endif
- #ifdef SA1111_DRIVER
-@@ -1003,6 +1019,9 @@
- 
- static void __exit ohci_hcd_mod_exit(void)
- {
-+#ifdef SSB_OHCI_DRIVER
-+	ssb_driver_unregister(&SSB_OHCI_DRIVER);
-+#endif
- #ifdef PCI_DRIVER
- 	pci_unregister_driver(&PCI_DRIVER);
- #endif
--- a/target/linux/generic-2.6/patches-2.6.23/310-ssb_pcicore_fixes.patch
+++ b/target/linux/generic-2.6/patches-2.6.23/310-ssb_pcicore_fixes.patch
@@ -1,54 +0,0 @@
-Index: linux-2.6.23/drivers/ssb/driver_pcicore.c
-===================================================================
--- linux-2.6.23.orig/drivers/ssb/driver_pcicore.c	2007-10-13 04:20:23.235499369 +0200
-+++ linux-2.6.23/drivers/ssb/driver_pcicore.c	2007-10-13 04:21:28.895241103 +0200
-@@ -93,10 +93,13 @@
- 
- 	/* Enable PCI bridge BAR1 prefetch and burst */
- 	pci_write_config_dword(dev, SSB_BAR1_CONTROL, 3);
-+
-+	/* Make sure our latency is high enough to handle the devices behind us */
-+	pci_write_config_byte(dev, PCI_LATENCY_TIMER, 0xa8);
- }
- DECLARE_PCI_FIXUP_EARLY(PCI_ANY_ID, PCI_ANY_ID, ssb_fixup_pcibridge);
- 
-int __init pcibios_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin)
- {
- 	return ssb_mips_irq(extpci_core->dev) + 2;
- }
-@@ -110,7 +113,7 @@
- 
- 	if (unlikely(pc->cardbusmode && dev > 1))
- 		goto out;
-	if (bus == 0) {
-+	if (bus == 0) {//FIXME busnumber ok?
- 		/* Type 0 transaction */
- 		if (unlikely(dev >= SSB_PCI_SLOT_MAX))
- 			goto out;
-@@ -224,7 +227,7 @@
- 		val = *((const u32 *)buf);
- 		break;
- 	}
-	writel(*((const u32 *)buf), mmio);
-+	writel(val, mmio);
- 
- 	err = 0;
- unmap:
-@@ -307,6 +310,8 @@
- 	udelay(150);
- 	val |= SSB_PCICORE_CTL_RST; /* Deassert RST# */
- 	pcicore_write32(pc, SSB_PCICORE_CTL, val);
-+	val = SSB_PCICORE_ARBCTL_INTERN;
-+	pcicore_write32(pc, SSB_PCICORE_ARBCTL, val);
- 	udelay(1);
- 
- 	//TODO cardbus mode
-@@ -336,6 +341,7 @@
- 	 * The following needs change, if we want to port hostmode
- 	 * to non-MIPS platform. */
- 	set_io_port_base((unsigned long)ioremap_nocache(SSB_PCI_MEM, 0x04000000));
-+	mdelay(300);
- 	register_pci_controller(&ssb_pcicore_controller);
- }
-